MLK-10050 dma: imx-sdma: add support for sdma memory copy
This patch is just created by so many confilict while cherry-pick from v3.10 a6a6cf911f85a3a09f763195478d422c571b9565. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit c070364148de0331152700850f5cb5577dbb504e)
This commit is contained in:
Robin Gong
committed by
Octavian Purdila
Octavian Purdila
parent
2d99e1bbb5
commit
665ced16cf
@ -285,6 +285,7 @@ struct sdma_context_data {
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} __attribute__ ((packed));
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#define NUM_BD (int)(PAGE_SIZE / sizeof(struct sdma_buffer_descriptor))
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#define SDMA_BD_MAX_CNT 0xfffc /* align with 4 bytes */
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struct sdma_engine;
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@ -318,6 +319,7 @@ struct sdma_channel {
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bool bd_iram;
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unsigned int pc_from_device, pc_to_device;
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unsigned int device_to_device;
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unsigned int pc_to_pc;
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unsigned long flags;
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dma_addr_t per_address, per_address2;
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unsigned long event_mask[2];
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@ -800,11 +802,12 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
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* These are needed once we start to support transfers between
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* two peripherals or memory-to-memory transfers
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*/
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int per_2_per = 0;
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int per_2_per = 0, emi_2_emi = 0;
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sdmac->pc_from_device = 0;
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sdmac->pc_to_device = 0;
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sdmac->device_to_device = 0;
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sdmac->pc_to_pc = 0;
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switch (peripheral_type) {
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case IMX_DMATYPE_MEMORY:
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@ -883,6 +886,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
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sdmac->pc_from_device = per_2_emi;
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sdmac->pc_to_device = emi_2_per;
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sdmac->device_to_device = per_2_per;
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sdmac->pc_to_pc = emi_2_emi;
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}
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static int sdma_load_context(struct sdma_channel *sdmac)
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@ -899,6 +903,8 @@ static int sdma_load_context(struct sdma_channel *sdmac)
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load_address = sdmac->pc_from_device;
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else if (sdmac->direction == DMA_DEV_TO_DEV)
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load_address = sdmac->device_to_device;
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else if (sdmac->direction == DMA_MEM_TO_MEM)
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load_address = sdmac->pc_to_pc;
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else
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load_address = sdmac->pc_to_device;
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@ -1199,52 +1205,168 @@ static void sdma_free_chan_resources(struct dma_chan *chan)
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clk_disable(sdma->clk_ahb);
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}
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static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
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struct dma_chan *chan, struct scatterlist *sgl,
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unsigned int sg_len, enum dma_transfer_direction direction,
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unsigned long flags, void *context)
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static int sdma_transfer_init(struct sdma_channel *sdmac,
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enum dma_transfer_direction direction)
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{
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int ret = 0;
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sdmac->status = DMA_IN_PROGRESS;
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sdmac->buf_tail = 0;
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sdmac->flags = 0;
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sdmac->direction = direction;
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ret = sdma_load_context(sdmac);
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if (ret)
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return ret;
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sdmac->chn_count = 0;
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return ret;
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}
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static int check_bd_buswidth(struct sdma_buffer_descriptor *bd,
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struct sdma_channel *sdmac, int count,
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dma_addr_t dma_dst, dma_addr_t dma_src)
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{
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int ret = 0;
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switch (sdmac->word_size) {
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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bd->mode.command = 0;
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if ((count | dma_dst | dma_src) & 3)
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ret = -EINVAL;
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break;
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case DMA_SLAVE_BUSWIDTH_2_BYTES:
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bd->mode.command = 2;
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if ((count | dma_dst | dma_src) & 1)
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ret = -EINVAL;
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break;
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case DMA_SLAVE_BUSWIDTH_1_BYTE:
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bd->mode.command = 1;
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break;
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default:
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return -EINVAL;
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}
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return ret;
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}
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static struct dma_async_tx_descriptor *sdma_prep_memcpy(
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struct dma_chan *chan, dma_addr_t dma_dst,
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dma_addr_t dma_src, size_t len, unsigned long flags)
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{
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struct sdma_channel *sdmac = to_sdma_chan(chan);
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struct sdma_engine *sdma = sdmac->sdma;
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int channel = sdmac->channel;
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size_t count;
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int i = 0, param;
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struct sdma_buffer_descriptor *bd;
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if (!chan || !len || sdmac->status == DMA_IN_PROGRESS)
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return NULL;
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if (len >= NUM_BD * SDMA_BD_MAX_CNT) {
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dev_err(sdma->dev, "channel%d: maximum bytes exceeded:%zu > %d\n",
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channel, len, NUM_BD * SDMA_BD_MAX_CNT);
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goto err_out;
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}
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dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n",
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&dma_src, &dma_dst, len, channel);
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if (sdma_transfer_init(sdmac, DMA_MEM_TO_MEM))
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goto err_out;
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do {
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count = min_t(size_t, len, SDMA_BD_MAX_CNT);
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bd = &sdmac->bd[i];
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bd->buffer_addr = dma_src;
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bd->ext_buffer_addr = dma_dst;
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bd->mode.count = count;
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if (check_bd_buswidth(bd, sdmac, count, dma_dst, dma_src))
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goto err_out;
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dma_src += count;
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dma_dst += count;
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len -= count;
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i++;
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param = BD_DONE | BD_EXTD | BD_CONT;
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/* last bd */
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if (!len) {
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param |= BD_INTR;
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param |= BD_LAST;
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param &= ~BD_CONT;
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}
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dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%u %s%s\n",
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i, count, bd->buffer_addr,
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param & BD_WRAP ? "wrap" : "",
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param & BD_INTR ? " intr" : "");
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bd->mode.status = param;
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sdmac->chn_count += count;
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} while (len);
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sdmac->num_bd = i;
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sdma->channel_control[channel].current_bd_ptr = sdmac->bd_phys;
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return &sdmac->desc;
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err_out:
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sdmac->status = DMA_ERROR;
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return NULL;
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}
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/*
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* Please ensure dst_nents no smaller than src_nents , also every sg_len of
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* dst_sg node no smaller than src_sg. To simply things, please use the same
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* size of dst_sg as src_sg.
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*/
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static struct dma_async_tx_descriptor *sdma_prep_sg(
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struct dma_chan *chan,
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struct scatterlist *dst_sg, unsigned int dst_nents,
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struct scatterlist *src_sg, unsigned int src_nents,
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enum dma_transfer_direction direction)
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{
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struct sdma_channel *sdmac = to_sdma_chan(chan);
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struct sdma_engine *sdma = sdmac->sdma;
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int ret, i, count;
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int channel = sdmac->channel;
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struct scatterlist *sg;
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struct scatterlist *sg_src = src_sg, *sg_dst = dst_sg;
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if (sdmac->status == DMA_IN_PROGRESS)
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return NULL;
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sdmac->status = DMA_IN_PROGRESS;
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sdmac->flags = 0;
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sdmac->buf_tail = 0;
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dev_dbg(sdma->dev, "setting up %d entries for channel %d.\n",
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sg_len, channel);
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src_nents, channel);
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sdmac->direction = direction;
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ret = sdma_load_context(sdmac);
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if (ret)
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goto err_out;
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if (sg_len > NUM_BD) {
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if (src_nents > NUM_BD) {
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dev_err(sdma->dev, "SDMA channel %d: maximum number of sg exceeded: %d > %d\n",
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channel, sg_len, NUM_BD);
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channel, src_nents, NUM_BD);
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ret = -EINVAL;
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goto err_out;
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}
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sdmac->chn_count = 0;
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for_each_sg(sgl, sg, sg_len, i) {
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if (sdma_transfer_init(sdmac, direction))
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goto err_out;
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for_each_sg(src_sg, sg_src, src_nents, i) {
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struct sdma_buffer_descriptor *bd = &sdmac->bd[i];
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int param;
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bd->buffer_addr = sg->dma_address;
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bd->buffer_addr = sg_src->dma_address;
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count = sg_dma_len(sg);
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if (direction == DMA_MEM_TO_MEM) {
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BUG_ON(!sg_dst);
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bd->ext_buffer_addr = sg_dst->dma_address;
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}
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if (count > 0xffff) {
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count = sg_dma_len(sg_src);
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if (count > SDMA_BD_MAX_CNT) {
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dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n",
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channel, count, 0xffff);
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channel, count, SDMA_BD_MAX_CNT);
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ret = -EINVAL;
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goto err_out;
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}
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@ -1252,46 +1374,35 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
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bd->mode.count = count;
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sdmac->chn_count += count;
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if (sdmac->word_size > DMA_SLAVE_BUSWIDTH_4_BYTES) {
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ret = -EINVAL;
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if (direction == DMA_MEM_TO_MEM)
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ret = check_bd_buswidth(bd, sdmac, count,
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sg_dst->dma_address,
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sg_src->dma_address);
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else
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ret = check_bd_buswidth(bd, sdmac, count, 0,
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sg_src->dma_address);
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if (ret)
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goto err_out;
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}
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switch (sdmac->word_size) {
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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bd->mode.command = 0;
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if (count & 3 || sg->dma_address & 3)
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return NULL;
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break;
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case DMA_SLAVE_BUSWIDTH_2_BYTES:
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bd->mode.command = 2;
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if (count & 1 || sg->dma_address & 1)
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return NULL;
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break;
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case DMA_SLAVE_BUSWIDTH_1_BYTE:
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bd->mode.command = 1;
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break;
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default:
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return NULL;
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}
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param = BD_DONE | BD_EXTD | BD_CONT;
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if (i + 1 == sg_len) {
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if (i + 1 == src_nents) {
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param |= BD_INTR;
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param |= BD_LAST;
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param &= ~BD_CONT;
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}
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dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n",
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i, count, (u64)sg->dma_address,
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dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%pad %s%s\n",
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i, count, &sg_src->dma_address,
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param & BD_WRAP ? "wrap" : "",
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param & BD_INTR ? " intr" : "");
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bd->mode.status = param;
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if (direction == DMA_MEM_TO_MEM)
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sg_dst = sg_next(sg_dst);
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}
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sdmac->num_bd = sg_len;
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sdmac->num_bd = src_nents;
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sdma->channel_control[channel].current_bd_ptr = sdmac->bd_phys;
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return &sdmac->desc;
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@ -1300,6 +1411,24 @@ err_out:
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return NULL;
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}
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static struct dma_async_tx_descriptor *sdma_prep_memcpy_sg(
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struct dma_chan *chan,
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struct scatterlist *dst_sg, unsigned int dst_nents,
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struct scatterlist *src_sg, unsigned int src_nents,
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unsigned long flags)
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{
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return sdma_prep_sg(chan, dst_sg, dst_nents, src_sg, src_nents,
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DMA_MEM_TO_MEM);
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}
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static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
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struct dma_chan *chan, struct scatterlist *sgl,
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unsigned int sg_len, enum dma_transfer_direction direction,
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unsigned long flags, void *context)
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{
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return sdma_prep_sg(chan, NULL, 0, sgl, sg_len, direction);
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}
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static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
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struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len,
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size_t period_len, enum dma_transfer_direction direction,
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@ -1338,9 +1467,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
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goto err_out;
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}
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if (period_len > 0xffff) {
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dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %d > %d\n",
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channel, period_len, 0xffff);
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if (period_len > SDMA_BD_MAX_CNT) {
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dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n",
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channel, period_len, SDMA_BD_MAX_CNT);
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goto err_out;
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}
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@ -1366,8 +1495,8 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
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if (i + 1 == num_periods)
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param |= BD_WRAP;
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dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n",
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i, period_len, (u64)dma_addr,
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dev_dbg(sdma->dev, "entry %d: count: %d dma: %pad %s%s\n",
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i, period_len, &dma_addr,
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param & BD_WRAP ? "wrap" : "",
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param & BD_INTR ? " intr" : "");
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@ -1410,6 +1539,8 @@ static int sdma_config(struct dma_chan *chan,
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sdmac->per_address = dmaengine_cfg->src_addr;
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sdmac->per_address2 = dmaengine_cfg->dst_addr;
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sdmac->watermark_level = 0;
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} else if (dmaengine_cfg->direction == DMA_MEM_TO_MEM) {
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sdmac->word_size = dmaengine_cfg->dst_addr_width;
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} else {
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sdmac->per_address = dmaengine_cfg->dst_addr;
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sdmac->watermark_level = dmaengine_cfg->dst_maxburst *
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@ -1807,6 +1938,7 @@ static int sdma_probe(struct platform_device *pdev)
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dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask);
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dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask);
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dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask);
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INIT_LIST_HEAD(&sdma->dma_device.channels);
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/* Initialize channel parameters */
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@ -1884,6 +2016,8 @@ static int sdma_probe(struct platform_device *pdev)
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sdma->dma_device.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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sdma->dma_device.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy;
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sdma->dma_device.device_prep_dma_sg = sdma_prep_memcpy_sg;
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sdma->dma_device.device_issue_pending = sdma_issue_pending;
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sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
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dma_set_max_seg_size(sdma->dma_device.dev, 65535);
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