MLK-15068: ASoC: fsl_ssi: fix the noise issue with S20_3LE Mono bitsream
In master mode, clock of S20_3LE mono bistream is calculated by formula
"2 * params_width * params_rate", and this clock can't be divided from
clock soure, so switch to use the "2 * params_physical_width * params_rate"
formula to fix this issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 52a91e870b)
This commit is contained in:
committed by
Leonard Crestez
parent
f757e8ab9a
commit
6ce4e9c184
@ -731,17 +731,23 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,
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u64 sub, savesub = 100000;
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unsigned int freq;
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bool baudclk_is_used;
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snd_pcm_format_t sample_format = params_format(hw_params);
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/* Prefer the explicitly set bitclock frequency */
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if (ssi_private->bitclk_freq)
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freq = ssi_private->bitclk_freq;
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else {
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if (params_channels(hw_params) == 1)
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if (params_channels(hw_params) == 1) {
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freq = 2 * params_width(hw_params) *
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params_rate(hw_params);
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else
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if (sample_format == SNDRV_PCM_FORMAT_S20_3LE)
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freq = 2 * params_physical_width(hw_params) *
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params_rate(hw_params);
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} else {
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freq = params_channels(hw_params) * 32 *
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params_rate(hw_params);
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}
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}
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/* Don't apply it to any non-baudclk circumstance */
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