MLK-15068: ASoC: fsl_ssi: fix the noise issue with S20_3LE Mono bitsream

In master mode, clock of S20_3LE mono bistream is calculated by formula
"2 * params_width * params_rate", and this clock can't be divided from
clock soure, so switch to use the "2 * params_physical_width * params_rate"
formula to fix this issue.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 52a91e870b)
This commit is contained in:
Shengjiu Wang
2017-06-15 13:07:20 +08:00
committed by Leonard Crestez
parent f757e8ab9a
commit 6ce4e9c184

View File

@ -731,17 +731,23 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,
u64 sub, savesub = 100000;
unsigned int freq;
bool baudclk_is_used;
snd_pcm_format_t sample_format = params_format(hw_params);
/* Prefer the explicitly set bitclock frequency */
if (ssi_private->bitclk_freq)
freq = ssi_private->bitclk_freq;
else {
if (params_channels(hw_params) == 1)
if (params_channels(hw_params) == 1) {
freq = 2 * params_width(hw_params) *
params_rate(hw_params);
else
if (sample_format == SNDRV_PCM_FORMAT_S20_3LE)
freq = 2 * params_physical_width(hw_params) *
params_rate(hw_params);
} else {
freq = params_channels(hw_params) * 32 *
params_rate(hw_params);
}
}
/* Don't apply it to any non-baudclk circumstance */