MLK-16839-2: ARM64: dts: add clock source for asrc

add IMX8QM_ACM_AUD_CLK0_SEL and IMX8QM_ACM_AUD_CLK1_SEL for
asrc clock source. There is no clock gate for them, only
clock mux.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
This commit is contained in:
Shengjiu Wang
2017-11-17 16:38:41 +08:00
committed by Nitin Garg
parent 9cea0f38f1
commit 7e05dcf668
2 changed files with 8 additions and 8 deletions

View File

@ -2866,8 +2866,8 @@
<&clk IMX8QM_AUD_ASRC_0_MEM>,
<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>,
<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_ACM_AUD_CLK0_SEL>,
<&clk IMX8QM_ACM_AUD_CLK1_SEL>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_CLK_DUMMY>,
@ -2906,8 +2906,8 @@
<&clk IMX8QM_AUD_ASRC_1_MEM>,
<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>,
<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_ACM_AUD_CLK0_SEL>,
<&clk IMX8QM_ACM_AUD_CLK1_SEL>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_CLK_DUMMY>,
<&clk IMX8QM_CLK_DUMMY>,

View File

@ -2018,8 +2018,8 @@
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>,
<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_ACM_AUD_CLK0_SEL>,
<&clk IMX8QXP_ACM_AUD_CLK1_SEL>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_CLK_DUMMY>,
@ -2058,8 +2058,8 @@
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>,
<&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_ACM_AUD_CLK0_CLK>,
<&clk IMX8QXP_ACM_AUD_CLK1_CLK>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_CLK_DUMMY>,
<&clk IMX8QXP_CLK_DUMMY>,