MLK-15937-4: ASoC: fsl_spdif: Use DMA workaround for SPDIF
Similar with commit 2f756e7aa88407 ("MLK-15004-4: ASoC: fsl_esai: esai
workaround for imx8qxp Rev1") this is needed because of a hardware
issue where SPDIF DMA request signal is active low but the DMA
input is active high.
The workaround uses GPT to convert DMA request signal to EDMA.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This commit is contained in:
committed by
Leonard Crestez
parent
12000eab3d
commit
e76fb2786d
@ -7,7 +7,8 @@ a fibre cable.
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Required properties:
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- compatible : Compatible list, must contain "fsl,imx35-spdif",
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"fsl,vf610-spdif", "fsl,imx8qm-spdif".
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"fsl,vf610-spdif", "fsl,imx8qm-spdif",
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"fsl,imx8qxp-v1-spdif"
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- reg : Offset and length of the register set for the device.
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@ -48,6 +48,7 @@
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};
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&spdif0 {
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compatible = "fsl,imx8qxp-v1-spdif";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif0>;
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dmas = <&edma2 23 0 7>, <&edma2 21 0 6>;
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@ -29,6 +29,7 @@
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#include "fsl_spdif.h"
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#include "imx-pcm.h"
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#include "fsl_dma_workaround.h"
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#define FSL_SPDIF_TXFIFO_WML 0x8
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#define FSL_SPDIF_RXFIFO_WML 0x8
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@ -51,6 +52,7 @@ static u8 srpc_dpll_locked[] = { 0x0, 0x1, 0x2, 0x3, 0x4, 0xa, 0xb };
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struct fsl_spdif_soc_data {
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bool imx;
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bool constrain_period_size;
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bool dma_workaround;
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u32 tx_burst;
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u32 rx_burst;
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u32 interrupts;
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@ -120,6 +122,7 @@ struct fsl_spdif_priv {
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struct clk *sysclk;
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struct clk *spbaclk;
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const struct fsl_spdif_soc_data *soc;
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struct fsl_dma_workaround_info *dma_info;
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struct snd_dmaengine_dai_dma_data dma_params_tx;
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struct snd_dmaengine_dai_dma_data dma_params_rx;
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/* regcache for SRPC */
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@ -128,6 +131,7 @@ struct fsl_spdif_priv {
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static struct fsl_spdif_soc_data fsl_spdif_vf610 = {
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.imx = false,
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.dma_workaround = false,
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.tx_burst = FSL_SPDIF_TXFIFO_WML,
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.rx_burst = FSL_SPDIF_RXFIFO_WML,
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.interrupts = 1,
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@ -137,6 +141,7 @@ static struct fsl_spdif_soc_data fsl_spdif_vf610 = {
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static struct fsl_spdif_soc_data fsl_spdif_imx35 = {
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.imx = true,
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.dma_workaround = false,
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.tx_burst = FSL_SPDIF_TXFIFO_WML,
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.rx_burst = FSL_SPDIF_RXFIFO_WML,
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.interrupts = 1,
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@ -144,8 +149,24 @@ static struct fsl_spdif_soc_data fsl_spdif_imx35 = {
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.constrain_period_size = false,
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};
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/*
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* In imx8qxp rev 1, the DMA request signal is not reverted. For SPDIF
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* DMA request is low valid, but EDMA assert is high valid, so we
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* need to use GPT to transfer the DMA request signal
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*/
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static struct fsl_spdif_soc_data fsl_spdif_imx8qxp_v1 = {
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.imx = true,
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.dma_workaround = true,
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.tx_burst = 2,
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.rx_burst = 2,
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.interrupts = 2,
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.tx_formats = SNDRV_PCM_FMTBIT_S24_LE,
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.constrain_period_size = true,
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};
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static struct fsl_spdif_soc_data fsl_spdif_imx8qm = {
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.imx = true,
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.dma_workaround = false,
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.tx_burst = 2,
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.rx_burst = 2,
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.interrupts = 2,
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@ -615,6 +636,9 @@ static int fsl_spdif_hw_params(struct snd_pcm_substream *substream,
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u32 sample_rate = params_rate(params);
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int ret = 0;
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if (spdif_priv->soc->dma_workaround)
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configure_gpt_dma(substream, spdif_priv->dma_info);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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ret = spdif_set_sample_rate(substream, sample_rate);
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if (ret) {
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@ -663,11 +687,24 @@ static int fsl_spdif_trigger(struct snd_pcm_substream *substream,
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return 0;
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}
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static int fsl_spdif_hw_free(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct fsl_spdif_priv *spdif_priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
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if (spdif_priv->soc->dma_workaround)
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clear_gpt_dma(substream, spdif_priv->dma_info);
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return 0;
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}
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static struct snd_soc_dai_ops fsl_spdif_dai_ops = {
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.startup = fsl_spdif_startup,
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.hw_params = fsl_spdif_hw_params,
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.trigger = fsl_spdif_trigger,
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.shutdown = fsl_spdif_shutdown,
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.hw_free = fsl_spdif_hw_free,
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};
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@ -1298,6 +1335,7 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
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}
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static const struct of_device_id fsl_spdif_dt_ids[] = {
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{ .compatible = "fsl,imx8qxp-v1-spdif", .data = &fsl_spdif_imx8qxp_v1, },
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{ .compatible = "fsl,imx8qm-spdif", .data = &fsl_spdif_imx8qm, },
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{ .compatible = "fsl,imx35-spdif", .data = &fsl_spdif_imx35, },
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{ .compatible = "fsl,vf610-spdif", .data = &fsl_spdif_vf610, },
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@ -1448,6 +1486,12 @@ static int fsl_spdif_probe(struct platform_device *pdev)
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if (of_property_read_u32(np, "fsl,dma-buffer-size", &buffer_size))
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buffer_size = IMX_SPDIF_DMABUF_SIZE;
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if (spdif_priv->soc->dma_workaround)
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spdif_priv->dma_info =
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fsl_dma_workaround_alloc_info("tcd_pool_spdif",
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&pdev->dev,
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"nxp,imx8qm-acm",
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FSL_DMA_WORKAROUND_SPDIF);
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ret = imx_pcm_dma_init(pdev, buffer_size);
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if (ret)
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dev_err(&pdev->dev, "imx_pcm_dma_init failed: %d\n", ret);
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@ -1455,6 +1499,16 @@ static int fsl_spdif_probe(struct platform_device *pdev)
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return ret;
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}
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static int fsl_spdif_remove(struct platform_device *pdev)
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{
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struct fsl_spdif_priv *spdif_priv = dev_get_drvdata(&pdev->dev);
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if (spdif_priv->soc->dma_workaround)
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fsl_dma_workaround_free_info(spdif_priv->dma_info, &pdev->dev);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int fsl_spdif_suspend(struct device *dev)
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{
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@ -1522,6 +1576,7 @@ static struct platform_driver fsl_spdif_driver = {
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.pm = &fsl_spdif_pm,
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},
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.probe = fsl_spdif_probe,
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.remove = fsl_spdif_remove,
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};
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module_platform_driver(fsl_spdif_driver);
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