Ronald Wahl abe960b761 clk: at91: Fix division by zero in PLL recalc_rate() ...

commit 0f5cb0e622 upstream.

Commit a982e45dc1 ("clk: at91: PLL recalc_rate() now using cached MUL
and DIV values") removed a check that prevents a division by zero. This
now causes a stacktrace when booting the kernel on a at91 platform if
the PLL DIV register contains zero. This commit reintroduces this check.

Fixes: a982e45dc1 ("clk: at91: PLL recalc_rate() now using cached...")
Cc: <stable@vger.kernel.org>
Signed-off-by: Ronald Wahl <rwahl@gmx.de>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2018-11-21 09:24:07 +01:00

..

clk-audio-pll.c

clk: at91: add audio pll clock drivers

2017-09-01 15:46:52 -07:00

clk-generated.c

clk: at91: clk-generated: make gclk determine audio_pll rate

2017-09-01 15:46:54 -07:00

clk-h32mx.c

…

clk-main.c

…

clk-master.c

…

clk-peripheral.c

clk: at91: Add sama5d2 suspend/resume

2017-06-29 18:47:35 -07:00

clk-pll.c

clk: at91: Fix division by zero in PLL recalc_rate()

2018-11-21 09:24:07 +01:00

clk-plldiv.c

…

clk-programmable.c

…

clk-slow.c

…

clk-smd.c

…

clk-system.c

…

clk-usb.c

…

clk-utmi.c

…

Makefile

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

2017-11-02 11:10:55 +01:00

pmc.c

clk: at91: pmc: Wait for clocks when resuming

2018-03-24 11:01:28 +01:00

pmc.h

clk: at91: Add sama5d2 suspend/resume

2017-06-29 18:47:35 -07:00

sckc.c

…