387a950fec
Merge CDN_1_0_38 release to HDP API. v1_0_38 release notes: DP: Added functionality for setting own PHY register values related to voltage swing and pre-emphasis. Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
118 lines
5.7 KiB
C
118 lines
5.7 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2016-2017 Cadence Design Systems, Inc.
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* All rights reserved worldwide.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
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* INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
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* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Copyright 2017-2018 NXP
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*
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******************************************************************************
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*
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* This file was auto-generated. Do not edit it manually.
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*
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******************************************************************************
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*
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* opcodes.h
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*
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******************************************************************************
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*/
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#ifndef OPCODES_H_
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#define OPCODES_H_
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#define DP_TX_MAIL_HANDLER_H
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#define DP_TX_MAIL_HANDLER_REQUEST_BUFFER_LEN 256
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#define DPTX_SET_POWER_MNG 0x00
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#define DPTX_SET_HOST_CAPABILITIES 0x01
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#define DPTX_GET_EDID 0x02
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#define DPTX_READ_DPCD 0x03
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#define DPTX_WRITE_DPCD 0x04
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#define DPTX_ENABLE_EVENT 0x05
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#define DPTX_WRITE_REGISTER 0x06
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#define DPTX_READ_REGISTER 0x07
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#define DPTX_WRITE_FIELD 0x08
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#define DPTX_TRAINING_CONTROL 0x09
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#define DPTX_READ_EVENT 0x0A
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#define DPTX_READ_LINK_STAT 0x0B
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#define DPTX_SET_VIDEO 0x0C
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#define DPTX_SET_AUDIO 0x0D
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#define DPTX_GET_LAST_AUX_STAUS 0x0E
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#define DPTX_SET_LINK_BREAK_POINT 0x0F
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#define DPTX_FORCE_LANES 0x10
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#define DPTX_HPD_STATE 0x11
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#define DPTX_EDP_RATE_TRAINING 0x12
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#define DPTX_SET_PHY_COEFFICIENTS 0x13
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#define DPTX_DBG_SET 0xF0
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#define DP_TX_OPCODE_READ_I2C_REQUEST 0xA5
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#define DP_TX_OPCODE_WRITE_I2C_REQUEST 0xA6
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#define DP_TX_OPCODE_MESSAGE_FILTER 0xA7
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#define DPTX_EDID_RESP 0x02
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#define DPTX_DPCD_READ_RESP 0x03
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#define DPTX_DPCD_WRITE_RESP 0x04
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#define DPTX_READ_EVENT_RESP 0x0A
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#define DPTX_READ_REGISTER_RESP 0x07
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#define DP_TX_OPCODE_MESSAGE 0x10
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#define DP_TX_OPCODE_READ_I2C_RESPONSE 0x50
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#define DP_TX_OPCODE_WRITE_I2C_RESPONSE 0x60
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#define DP_TX_OPCODE_LOOPBACK_TEST 0xFE
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#define DP_TX_OPCODE_BIT_TEST 0xFF
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#define DP_TX_EVENT_ENABLE_HPD_BIT 0x00
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#define DP_TX_EVENT_ENABLE_TRAINING_BIT 0x01
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#define DP_TX_EVENT_CODE_HPD_HIGH 0x01
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#define DP_TX_EVENT_CODE_HPD_LOW 0x02
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#define DP_TX_EVENT_CODE_HPD_PULSE 0x04
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#define DP_TX_EVENT_CODE_HPD_STATE_HIGH 0x08
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#define DP_TX_EVENT_CODE_HPD_STATE_LOW 0x00
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#define DP_TX_EVENT_CODE_TRAINING_FULL_STARTED 0x01
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#define DP_TX_EVENT_CODE_TRAINING_FAST_STARTED 0x02
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#define DP_TX_EVENT_CODE_TRAINING_FINISHED_CR 0x04
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#define DP_TX_EVENT_CODE_TRAINING_FINISHED_EQ 0x08
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#define DP_TX_EVENT_CODE_TRAINING_FINISHED_FAST 0x10
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#define DP_TX_EVENT_CODE_TRAINING_FAILED_CR 0x20
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#define DP_TX_EVENT_CODE_TRAINING_FAILED_EQ 0x40
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#define DP_TX_EVENT_CODE_TRAINING_FAILED_FAST 0x80
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#define MB_MODULE_ID_DP_TX 0x01
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#define MB_MODULE_ID_DP_RX 0x02
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#define MB_MODULE_ID_HDMI_TX 0x03
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#define MB_MODULE_ID_HDMI_RX 0x04
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#define MB_MODULE_ID_MHL_TX 0x05
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#define MB_MODULE_ID_MHL_RX 0x06
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#define MB_MODULE_ID_HDCP_TX 0x07
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#define MB_MODULE_ID_HDCP_RX 0x08
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#define MB_MODULE_ID_HDCP_GENERAL 0x09
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#define MB_MODULE_ID_GENERAL 0x0A
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#define MB_MODULE_ID 1
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#endif
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