7cfcb8f70e
We use PRG x/y offset to do in-micro-tile cropping for new DPR/PRG IPs. When tile resolving is enabled by using the new IPs, the design team indicates that DPU fetch unit base address and DPU/PRG stride need to be calculated in the below steps: 1) prg_Baddr = dpr_Baddr 2) tmp_dpu_Baddr = prg_Baddr + prg_x_offset * bytes_per_pixel 3) tmp_burst_size = 1 << (ffs(tmp_dpu_Baddr) - 1) tmp_burst_size = round_up(tmp_burst_size, 8) burst_size = min(tmp_burst_size, 128) 4) tmp_dpu_stride = dpu_width * bytes_per_pixel 5) dpu_stride = round_up(tmp_dpu_stride + round_up(tmp_dpu_Baddr % 8, 8), burst_size) 6) dpu_Baddr = tmp_dpu_Baddr + prg_y_offset * dpu_stride 7) prg_stride = dpu_stride The legacy DPR/PRG IPs and linear formats driver logic should not be essentially touched. This patch implements the above calculation method in the drivers so that all valid in-micro-tile x/y cropping arguments can be supported. Without this, at least, some cropping cases with odd x value would fail. Signed-off-by: Liu Ying <victor.liu@nxp.com>
75 lines
2.9 KiB
C
75 lines
2.9 KiB
C
/*
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* Copyright 2017-2018 NXP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef _IMX8_PREFETCH_H_
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#define _IMX8_PREFETCH_H_
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#define PRG_HANDSHAKE_8LINES 8
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#define PRG_HANDSHAKE_4LINES 4
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#define AMPHION_STRIPE_WIDTH 8
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#define AMPHION_STRIPE_HEIGHT 128
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#define AMPHION_UV_STRIPE_HEIGHT AMPHION_STRIPE_HEIGHT
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#define AMPHION_Y_STRIPE_HEIGHT (2 * AMPHION_STRIPE_HEIGHT)
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#define VIVANTE_TILE_WIDTH 4
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#define VIVANTE_TILE_HEIGHT 4
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#define VIVANTE_SUPER_TILE_WIDTH 64
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#define VIVANTE_SUPER_TILE_HEIGHT 64
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struct prg;
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struct prg *
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prg_lookup_by_phandle(struct device *dev, const char *name, int index);
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void prg_enable(struct prg *prg);
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void prg_disable(struct prg *prg);
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void prg_configure(struct prg *prg, unsigned int width, unsigned int height,
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unsigned int x_offset, unsigned int y_offset,
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unsigned int stride, unsigned int bits_per_pixel,
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unsigned long baddr, u32 format, u64 modifier,
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bool start);
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void prg_reg_update(struct prg *prg);
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void prg_shadow_enable(struct prg *prg);
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bool prg_stride_supported(struct prg *prg, unsigned int stride);
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bool prg_stride_double_check(struct prg *prg,
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unsigned int width, unsigned int x_offset,
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unsigned int bits_per_pixel, u64 modifier,
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unsigned int stride, dma_addr_t baddr);
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void prg_set_auxiliary(struct prg *prg);
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void prg_set_primary(struct prg *prg);
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void prg_set_blit(struct prg *prg);
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struct dprc;
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struct dprc *
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dprc_lookup_by_phandle(struct device *dev, const char *name, int index);
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void dprc_enable(struct dprc *dprc);
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void dprc_disable(struct dprc *dprc);
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void dprc_configure(struct dprc *dprc, unsigned int stream_id,
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unsigned int width, unsigned int height,
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unsigned int x_offset, unsigned int y_offset,
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unsigned int stride, u32 format, u64 modifier,
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unsigned long baddr, unsigned long uv_baddr,
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bool start, bool aux_start, bool interlace_frame);
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void dprc_reg_update(struct dprc *dprc);
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void dprc_first_frame_handle(struct dprc *dprc);
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void dprc_irq_handle(struct dprc *dprc);
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void dprc_enable_ctrl_done_irq(struct dprc *dprc);
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bool dprc_format_supported(struct dprc *dprc, u32 format, u64 modifier);
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bool dprc_stride_supported(struct dprc *dprc,
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unsigned int stride, unsigned int uv_stride,
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unsigned int width, u32 format);
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bool dprc_stride_double_check(struct dprc *dprc,
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unsigned int width, unsigned int x_offset,
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u32 format, u64 modifier,
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dma_addr_t baddr, dma_addr_t uv_baddr);
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#endif
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