8cdf030f2c
Due to TSC pin conflict with I2C1 bus, and PMIC is this I2C1 bus's slave, this patch add new TSC config for i.mx6ull_14x14_ddr3_arm2 board, disable PMIC and ldo bypass check. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
6 lines
194 B
Plaintext
6 lines
194 B
Plaintext
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_ddr3_arm2/imximage.cfg,MX6ULL_DDR3_ARM2_TSC_REWORK"
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CONFIG_ARM=y
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CONFIG_ARCH_MX6=y
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CONFIG_TARGET_MX6ULL_DDR3_ARM2=y
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CONFIG_CMD_GPIO=y
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