f8386b3521
drm/amdgpu: add new flag AMD_PG_SUPPORT_MMHUB
...
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-29 12:43:46 -04:00
6b0fa871a9
drm/amdgpu: fix vulkan test performance drop and hang on VI
...
caused by not program dynamic_cu_mask_addr in the KIQ MQD.
v2: create struct vi_mqd_allocation in FB which will contain
1. PM4 MQD structure.
2. Write Pointer Poll Memory.
3. Read Pointer Report Memory
4. Dynamic CU Mask.
5. Dynamic RB Mask.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-29 12:43:43 -04:00
1191d110c3
drm/amdgpu: remove mmhub ip
...
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-06 16:59:09 -04:00
373f592325
drm/amdgpu: remove gfxhub ip
...
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-06 16:59:03 -04:00
040cd2d1f5
drm/amd/powerplay: Align with VBIOS to support AVFS parameters.
...
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-01 16:00:19 -04:00
d0b63bb338
drm/amdkfd: allow split HQD on per-queue granularity v5
...
Update the KGD to KFD interface to allow sharing pipes with queue
granularity instead of pipe granularity.
This allows for more interesting pipe/queue splits.
v2: fix overflow check for res.queue_mask
v3: fix shift overflow when setting res.queue_mask
v4: fix comment in is_pipeline_enabled()
v5: clamp res.queue_mask to the first MEC only
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Andres Rodriguez <andresx7@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-31 16:48:54 -04:00
78c1683423
drm/amdgpu: allow split of queues with kfd at queue granularity v4
...
Previously the queue/pipe split with kfd operated with pipe
granularity. This patch allows amdgpu to take ownership of an arbitrary
set of queues.
It also consolidates the last few magic numbers in the compute
initialization process into mec_init.
v2: support for gfx9
v3: renamed AMDGPU_MAX_QUEUES to AMDGPU_MAX_COMPUTE_QUEUES
v4: fix off-by-one in num_mec checks in *_compute_queue_acquire
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Andres Rodriguez <andresx7@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-31 16:48:53 -04:00
a6ca5ac746
drm/amd: Add DCN ivsrcids (v2)
...
v2: squash in some updates (Alex)
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:55 -04:00
f4afe799cf
drm/amdgpu: add raven related define in pptable.h.
...
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:50 -04:00
3ea975e4ff
drm/amdgpu: add vcn ip block and type
...
Signed-off-by: Leo Liu <leo.liu@amd.com >
Acked-by: Chunming Zhou <david1.zhou@amd.com >
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:27 -04:00
2ca8a5d2eb
drm/amdgpu: add RAVEN family id definition
...
RAVEN is a new APU.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:49 -04:00
702f9292ad
drm/amdgpu: add register headers for VCN 1.0
...
Add registers for Video Controller Next 1.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:48 -04:00
bfd86c1ab3
drm/amdgpu: add register headers for THM 10.0
...
Add registers for THerMal control 10.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:47 -04:00
ce869c637e
drm/amdgpu: add register headers for SDMA 4.1
...
Add registers for SDMA 4.1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:46 -04:00
c4dc7b1a54
drm/amdgpu: add register headers for NBIO 7.0
...
Add registers for NBIO 7.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:45 -04:00
cfeb9192fe
drm/amdgpu: add register headers for MP 10.0
...
Add registers for MP 10.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:44 -04:00
96ded7747c
drm/amdgpu: add register headers for MMHUB 9.1
...
Add registers for the MultiMedia Hub 9.1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:44 -04:00
7582d7e649
drm/amdgpu: add register headers for GC 9.1
...
Registers for Graphics Controller 9.1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:43 -04:00
752ca077d5
drm/amdgpu: add register headers for DCN 1.0
...
Registers for Display Controller Next 1.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:42 -04:00
4caca70668
drm/amdgpu: add DP audio support for si dce6 (v3)
...
v2: refine dce_v6_0_audio_endpt_wreg() and unify inconsistent method names
v3: fix num_pins for tahiti, pitcairn, verde and oland
Signed-off-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com >
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:58 -04:00
4f93f09e5c
drm/amdgpu: add amd fan ctrl mode enums.
...
Add common fan enums that can be used for both
powerplay and dpm.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-10 13:36:14 -04:00
2c55b16bf0
drm/amdgpu: remove unused and mostly unimplemented CGS functions v2
...
Those functions are all unused and some not even implemented.
v2: keep cgs_get_pci_resource, it is used by the ACP driver.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-28 17:33:12 -04:00
e5f586c763
drm/amdgpu: Add interrupt entries for CRTC_VERTICAL_INTERRUPT0.
...
This used by DAL ISR logic for VBLANK handling.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com >
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:43 -04:00
cca02cd3d4
drm/amdgpu/gfx9: impl gfx9 meta data emit
...
Insert ce meta prior to cntx_cntl and de follow it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:01 -04:00
a2dd023a77
drm/amd: add structures for display/powerplay interface
...
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Tony Cheng <tony.cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:53 -04:00
0e5ca0d1ac
drm/amdgpu: add PSP driver for vega10 (v2)
...
PSP is responsible for firmware loading on SOC-15 asics.
v2: fix memory leak (Ken)
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:48 -04:00
e60f8db5e4
drm/amdgpu: Add GMC 9.0 support (v2)
...
On SOC-15 parts, the GMC (Graphics Memory Controller) consists
of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce).
v2: drop sdma from Makefile, fix duplicate return statement.
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:44 -04:00
d4196f011c
drm/amdgpu: add vega10 chip name
...
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:32 -04:00
4b219123e9
drm/amd: Add MQD structs for GFX V9
...
This header defines the gfx v9 MEC structures.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:29 -04:00
f6c3947893
drm/amdgpu: add the VCE 4.0 register headers
...
These are the Video Compression Engine registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:28 -04:00
7008d577d6
drm/amdgpu: add the UVD 7.0 register headers
...
These are the Unifed Video Decoder registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:28 -04:00
893f25540e
drm/amdgpu: add THM 9.0 register headers
...
These are the THerMal control registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:27 -04:00
63d311d9b4
drm/amdgpu: add SMUIO 9.0 register headers
...
These are the System Managment Unit IO registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:26 -04:00
456f97704f
drm/amdgpu: add SDMA 4.0 register headers
...
These are the System DMA register headers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:26 -04:00
5a8288c0f9
drm/amdgpu: add OSSSYS 4.0 register headers
...
These are the OS Services register headers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:25 -04:00
198b746016
drm/amdgpu: add NBIO 6.1 register headers
...
These are the Bus IO registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:24 -04:00
61e04478b2
drm/amdgpu: add NBIF 6.1 register headers
...
These are the Bus InterFace registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:23 -04:00
3ec127a075
drm/amdgpu: add MP 9.0 register headers
...
MP is the system management controller on vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:23 -04:00
68c7d13052
drm/amdgpu: add the MMHUB 1.0 register headers
...
Add the MultiMedia Hub registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:22 -04:00
bcfb47cdd7
drm/amdgpu: add the HDP 4.0 register headers
...
These are the Host Data Path registers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:21 -04:00
5585476e44
drm/amdgpu: add the GC 9.0 register headers
...
Add the Graphics Core register headers for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:21 -04:00
4adc5ab813
drm/amdgpu: Add the DCE 12.0 register headers
...
These are the register headers for the Display
and Composition Engine on vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:20 -04:00
7fee1fd93b
drm/amdgpu: Add ATHUB 1.0 register headers
...
ATHUB is part of the memory controller on soc15 asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:19 -04:00
733acf561e
drm/amdgpu: add vega10_enum.h
...
This adds the register bitfield enums for vega10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:19 -04:00
1fd1cc5640
drm/amdgpu: add soc15ip.h
...
This header defines the IP layout for soc15 based SoCs.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:18 -04:00
1fadf42ed5
drm/amdgpu: add the new atomfirmware interface header
...
soc15 asics have a new vbios interface. These headers
define that interface.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:15 -04:00
1c622002b1
drm/amd/powerplay: add a new register define for APU in VI.
...
the ixcurrent_pg_status addr is different between APU and DGPU.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:06 -04:00
8285052ef1
drm/amdgpu: add new ATIF ACPI method
...
Used for fetching external GPU information.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:53:49 -04:00
c773a632a9
drm/amdgpu: add DF MGCG flag
...
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:53:42 -04:00
e929c98d2e
drm/amdgpu: add DRM MGCG header
...
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:53:42 -04:00
