cfd84fd365
drm/amd/display: separate dc_debug into dc_debug_options and dc_debug data
...
[why]
confusing as to which part of debug is informational, and which part causes behavioral change
Signed-off-by: Jun Lei <Jun.Lei@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Leo Li <sunpeng.li@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-24 15:15:59 -05:00
30cdbfaa6a
drm/amd/display: dcc always on for bw calculations on raven
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-13 14:48:55 -05:00
f3efec54ed
drm/amd/display: Allow option to use worst-case watermark
...
use worse case watermark (consider both DCC and VM)
to keep golden consistent regardless of DCC
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:45 -05:00
69d6bb171f
drm/amd/display: remove dcn1 watermark sets b, c and d
...
Currently dcn1 will not switch between watermark sets so we can
save time by not calculating 3 extra sets.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:42 -05:00
33a6a7eb80
drm/amd/display: fix dcn1 watermark range reporting
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:42 -05:00
b9c1c67aeb
drm/amd/display: clean rq/dlg/ttu reg structs before calculations
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:39 -05:00
d578839ca0
drm/amd/display: get rid of cur_clks from dcn_bw_output
...
Cleans up dcn_bw_output to only contain calculated info,
actual programmed values will now be stored in respective blocks.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:32 -05:00
92276a06f9
drm/amd/display: Introduce pp-smu raven functions
...
DM powerplay calls for DCN10 allowing to bypass PPLib
and call directly to the SMU functions.
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:30 -05:00
e2e0a1dcd3
drm/amd/display: move clock programming from set_bandwidth to dccg
...
This change moves dcn clock programming(with exception of dispclk)
into dccg. This should have no functional effect.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:28 -05:00
fab55d61b9
drm/amd/display: redesign dce/dcn clock voltage update request
...
The goal of this change is to move clock programming and voltage
requests to a single function. As of this change only dce is affected.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:28 -05:00
765b268364
drm/amd/display: replace clocks_value struct with dc_clocks
...
This will avoid structs with duplicate information. Also
removes pixel clock voltage request. This has no effect since
pixel clock does not affect dcn voltage and this function only
matters for dcn.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-07-05 16:38:27 -05:00
eb0e515464
drm/amd/display: get rid of 32.32 unsigned fixed point
...
32.32 is redundant, 31.32 does everything we use 32.32 for
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-05-18 16:08:21 -05:00
3032deb52a
drm/amd/display: Correct print types in DC_LOGS
...
Correct the types used for printing in logs. This is needed for adding
dynamic printing (LINUX), otherwise we get warnings.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-04-11 13:07:44 -05:00
17ac50368f
drm/amd/display: clean up dcn pplib notification call
...
We have unused variables being populated when notifying pplib.
This change amends that.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-03-14 16:01:14 -05:00
45bb8dd696
drm/amd/display: Set disp clk in a safe way to avoid over high dpp clk. (v2)
...
Increase clock, if current dpp div is 0 and request dpp div is 1, request clk is
higher than maximum dpp clk as per dpm table.
set dispclk to the value of maximum supported dpp clk
set div to 1
set dispclk to request value.
Decrease clock, currrent dpp div is 1 and request dpp div is 0, current clk is
higher than maximum dpp clk as per dpm table.
set dispclk to the value of maximum supported dpp clk
set div to 0
set dispclk to request value.
v2: squash in !DCN build fix
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-03-14 15:16:34 -05:00
28d4175413
drm/amd/display: fix dcn1 dppclk when min dispclk patch applies
...
Applying min dispclk patch would result in incorrect dppclk divider
without this change
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-03-05 15:35:20 -05:00
1296423bf2
drm/amd/display: define DC_LOGGER for logger
...
Created a DC_LOGGER define. This is used to
pass the logger into the macros.
Anywhere we need to use the logger we need to define
DC_LOGGER
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-03-05 15:35:13 -05:00
2f3fd67a8a
drm/amd/display: Use MACROS instead of dm_logger
...
Created MACROS for all log levels. Also Replaced
usage of dm_logger_write to the defined MACROS
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-03-05 15:35:06 -05:00
f553e68102
drm/amd/display: add per pipe dppclk
...
v2: Fix commit title
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-03-05 15:34:33 -05:00
c7d76452d2
drm/amd/display: revert to hacking bounding box for pipe split
...
Directly editing pipe config outside of formula is error prone
and results in higher clocks being used when splitting.
For this reason we reverted to using bounding box hacking
to split. Since sometimes this erroneusly results in higher dpm
being required we unhack the bounding box and recalculate to allow
dpm0 is possible.
Side effect is we will lose some stutter efficiency
in non dpm0 cases. This is not a big concern since increased stutter
efficiency saves an order of magnitude less power than lower dpm.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:18:38 -05:00
e07f541f50
drm/amd/display: Use real BE and FE index to program regs.
...
In case of some pipes are fused, pipe_idx should not
be used to program pipe regs. Instead of that, BE and FE
inst number should be used for reg index.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2018-02-19 14:17:29 -05:00
2961fef705
drm/amd/display: fix global sync param retrieval when not pipe splitting
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-20 14:47:11 -05:00
5a095c405e
drm/amd/display: clean up dcn soc params
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-20 14:46:51 -05:00
7bc6f1ca9d
drm/amd/display: add assert to verify dcn_calc input validity
...
This reverts commit 978482d0de86 Revert noisy assert messages
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-14 10:57:05 -05:00
bce14857bd
drm/amd/display: set chroma taps to 1 when not scaling
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-14 10:56:24 -05:00
a018298ff8
drm/amd/display: Add disclaimer to BW and DML code provided by HW
...
This code can sometimes look troubling but we trust it as it comes from
HW teams with a guarantee of correctness. Add a note to these files to
explain this.
v2: thing -> things
Signed-off-by: Harry Wentland <harry.wentland@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-14 10:55:02 -05:00
7260d1187e
drm/amd/display: Set full update flag in dcn_validate_bandwidth
...
Doing bandwidth validation implies that this is a full update. Set the
flag inside the function in case whatever is calling
dcn_validate_bandwidth doesn't set it.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:12 -05:00
69cff5a4e3
drm/amd/display: Rename output_bpc to opp_input_bpc
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:11 -05:00
fb7ae8505e
drm/amd/display: fix refclk conversion from khz int to mhz float
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:10 -05:00
e6c258cb4e
drm/amd/display: Refactor disable front end pipes.
...
There are different code to disable front end, it is
difficult to debug and adding new process.
This refactor makes all disable front end call the same
functions.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:47:30 -05:00
00893681a0
drm/amd/display: Reject PPLib clock values if they are invalid
...
We should be sticking with the default clock values if the values
obtained from PPLib are bogus.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-04 16:41:34 -05:00
bf5563ede9
amdgpu/dc: fix indentation warning from smatch.
...
This fixes all the current smatch:
warn: inconsistent indenting
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Dave Airlie <airlied@redhat.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-11-07 16:22:04 -05:00
215a6f05bc
drm/amd/display: add performance trace macro to dc
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:50:00 -04:00
d94585a06b
drm/amd/display: rename transform to dpp for dcn
...
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com >
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:49:40 -04:00
8feabd03d3
drm/amd/display: rename struct mem_input to hubp for dcn
...
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:48:26 -04:00
6d04ee9dc1
drm/amd/display: Restructuring and cleaning up DML
...
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:45:24 -04:00
441ad74173
drm/amd/display: Add override for reporting wm ranges
...
For verification of watermark select with SMU team, proper
implementation will follow
Signed-off-by: Eric Yang <Eric.Yang2@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:44:26 -04:00
6512387a54
drm/amd/display: align DCLK to voltage level
...
in past program SMU will use all voltage headroom. RV does not
if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:44:13 -04:00
9f945eab79
drm/amd/display: fix bug in force_single_disp_pipe_split
...
should only lower dpp clock.
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:43:47 -04:00
db64fbe732
drm/amd/display: enable optional pipe split for single display
...
also refactor debug option. now pipe_split_policy are
dynamic = no hack around dcn_calcs. will split based on HW recommendation
avoid = avoid split if we can support the config with higher voltage
avoid_multi_display = allow split with single display output.
force_single_disp_pipe_split
force single display to pipe split to improve stutter efficiency
by using DET buffers using 2 HUBP.
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:43:30 -04:00
fcbbe3da0a
drm/amd/display: Use active + border for bw validation
...
When doing SLS, KMD gives us clipped v_addressable with
border. This results in bw validation failure.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:42:48 -04:00
4f4ee68686
drm/amd/display: screen flickers when connected to ext monitor in clone
...
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com >
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-21 16:42:38 -04:00
44858055bb
amdgpu/dc: set a bunch of functions to static.
...
All of these are unused outside the file they are in.
Signed-off-by: Dave Airlie <airlied@redhat.com >
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-10-06 13:07:58 -04:00
2004f45ef8
drm/amd/display: Use kernel alloc/free
...
Abstractions are frowned upon.
cocci script:
virtual context
virtual patch
virtual org
virtual report
@@
expression ptr;
@@
- dm_alloc(ptr)
+ kzalloc(ptr, GFP_KERNEL)
@@
expression ptr, size;
@@
- dm_realloc(ptr, size)
+ krealloc(ptr, size, GFP_KERNEL)
@@
expression ptr;
@@
- dm_free(ptr)
+ kfree(ptr)
v2: use GFP_KERNEL, not GFP_ATOMIC. add cocci script
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-28 16:46:15 -04:00
fd96c1775a
drm/amd/display: delete dead code
...
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-26 18:17:23 -04:00
608ac7bb39
drm/amd/display: Rename dc validate_context and current_context
...
Rename all the dc validate_context to dc_state and
dc current_context to current_state.
Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com >
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-26 18:17:14 -04:00
e1b522bff3
drm/amd/display: work around for 8k sleep crash
...
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com >
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-26 18:17:09 -04:00
1565904542
drm/amd/display: Clean up flattening core_dc to dc
...
Clean up some code related to flattening core_dc commit
(Remove redundent dc = dc, which was the result of removing
DC_TO_CORE() macro)
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com >
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-26 18:17:07 -04:00
a185048ca8
drm/amd/display: refactor pplib/smu communication
...
new per SoC interface instead legacy interface with lots of un-used
field that only cause confusion
model pp_smu like one of our HW objects with func_ptr interface
to call into it. struct pp_smu as handle to call pp/smu
Signed-off-by: Tony Cheng <tony.cheng@amd.com >
Reviewed-by: Jun Lei <Jun.Lei@amd.com >
Acked-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-26 18:16:46 -04:00
fb3466a450
drm/amd/display: Flattening core_dc to dc
...
-Flattening core_dc to dc
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com >
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-09-26 18:16:40 -04:00