Steven Rostedt 5b2bdbc845 x86: Init per-cpu shadow copy of CR4 on 32-bit CPUs too ...

Commit:

   1e02ce4ccc ("x86: Store a per-cpu shadow copy of CR4")

added a shadow CR4 such that reads and writes that do not
modify the CR4 execute much faster than always reading the
register itself.

The change modified cpu_init() in common.c, so that the
shadow CR4 gets initialized before anything uses it.

Unfortunately, there's two cpu_init()s in common.c. There's
one for 64-bit and one for 32-bit. The commit only added
the shadow init to the 64-bit path, but the 32-bit path
needs the init too.

Link: http://lkml.kernel.org/r/20150227125208.71c36402@gandalf.local.home Fixes: 1e02ce4ccc "x86: Store a per-cpu shadow copy of CR4"
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Acked-by: Andy Lutomirski <luto@amacapital.net>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/20150227145019.2bdd4354@gandalf.local.home
Signed-off-by: Ingo Molnar <mingo@kernel.org>

2015-02-28 08:04:20 +01:00

..

mcheck

Merge tag 'please-pull-fixmcelog' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras

2015-02-17 17:03:07 -08:00

microcode

Merge tag 'microcode_fixes_for-3.21' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/urgent

2015-02-19 13:32:42 +01:00

mtrr

x86: Store a per-cpu shadow copy of CR4

2015-02-04 12:10:42 +01:00

.gitignore

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amd.c

Merge branch 'perf/hw_breakpoints' into perf/core

2015-01-28 15:48:59 +01:00

bugs_64.c

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bugs.c

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centaur.c

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common.c

x86: Init per-cpu shadow copy of CR4 on 32-bit CPUs too

2015-02-28 08:04:20 +01:00

cpu.h

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cyrix.c

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hypervisor.c

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intel_cacheinfo.c

x86: use %*pb[l] to print bitmaps including cpumasks and nodemasks

2015-02-13 21:21:37 -08:00

intel.c

x86/cpu/intel: Fix trivial typo in intel_tlb_table[]

2015-02-22 08:55:58 +01:00

Makefile

x86/build: Clean auto-generated processor feature files

2014-12-23 15:37:06 +01:00

match.c

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mkcapflags.sh

x86: Fix mkcapflags.sh bash-ism

2014-12-23 15:34:57 +01:00

mshyperv.c

x86, hyperv: Mark the Hyper-V clocksource as being continuous

2015-01-20 14:36:25 +01:00

perf_event_amd_ibs.c

perf/x86/amd/ibs: Update IBS MSRs and feature definitions

2014-11-12 15:12:32 +01:00

perf_event_amd_iommu.c

cpumask: factor out show_cpumap into separate helper function

2014-11-07 11:45:00 -08:00

perf_event_amd_iommu.h

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perf_event_amd_uncore.c

cpumask: factor out show_cpumap into separate helper function

2014-11-07 11:45:00 -08:00

perf_event_amd.c

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perf_event_intel_ds.c

perf/x86/intel: Fix bug for "cycles:p" and "cycles:pp" on SLM

2015-01-16 09:06:59 +01:00

perf_event_intel_lbr.c

x86: Remove arbitrary instruction size limit in instruction decoder

2014-11-18 00:58:52 +01:00

perf_event_intel_rapl.c

perf/rapl: Fix crash in rapl_scale()

2015-01-28 13:04:35 +01:00

perf_event_intel_uncore_nhmex.c

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perf_event_intel_uncore_snb.c

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perf_event_intel_uncore_snbep.c

perf/x86/uncore/hsw-ep: Handle systems with only two SBOXes

2015-01-09 11:12:30 +01:00

perf_event_intel_uncore.c

perf/x86/intel/uncore: Move uncore_box_init() out of driver initialization

2015-01-28 13:04:34 +01:00

perf_event_intel_uncore.h

perf/x86/intel/uncore: Move uncore_box_init() out of driver initialization

2015-01-28 13:04:34 +01:00

perf_event_intel.c

perf/x86/intel: Add model number for Airmont

2015-01-28 13:17:32 +01:00

perf_event_knc.c

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perf_event_p4.c

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perf_event_p6.c

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perf_event.c

perf/x86: Add /sys/devices/cpu/rdpmc=2 to allow rdpmc for all tasks

2015-02-04 12:10:49 +01:00

perf_event.h

perf/x86: Only allow rdpmc if a perf_event is mapped

2015-02-04 12:10:47 +01:00

perfctr-watchdog.c

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powerflags.c

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proc.c

x86: Replace seq_printf() with seq_puts()

2014-12-08 11:48:15 +01:00

rdrand.c

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scattered.c

x86: Add support for Intel HWP feature detection.

2014-11-12 00:04:37 +01:00

topology.c

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transmeta.c

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umc.c

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vmware.c

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