Update CHANGELOIG, prepare for -rc4

Signed-off-by: Wolfgang Denk <wd@denx.de>

MAKEALL

@@ -301,10 +301,12 @@ LIST_83xx="		\
 	MPC8313ERDB_66	\
 	MPC8323ERDB	\
 	MPC832XEMDS	\
+	MPC832XEMDS_ATM	\
 	MPC8349EMDS	\
 	MPC8349ITX	\
 	MPC8349ITXGP	\
 	MPC8360EMDS	\
+	MPC8360EMDS_ATM	\
 	sbc8349		\
 	TQM834x		\
 "

Makefile

@@ -24,7 +24,7 @@
 VERSION = 1
 PATCHLEVEL = 3
 SUBLEVEL = 0
-EXTRAVERSION = -rc3
+EXTRAVERSION = -rc4
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 VERSION_FILE = $(obj)include/version_autogenerated.h
 
@@ -393,7 +393,7 @@ BC3450_config:	unconfig
 cpci5200_config:  unconfig
 	@$(MKCONFIG) -a cpci5200  ppc mpc5xxx cpci5200 esd
 
-hmi1001_config:         unconfig
+hmi1001_config:	unconfig
 	@$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001
 
 Lite5200_config				\
@@ -435,7 +435,7 @@ icecube_5100_config:			unconfig
 		}
 	@$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
 
-jupiter_config:         unconfig
+jupiter_config:	unconfig
 	@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
 
 v38b_config: unconfig
@@ -640,9 +640,9 @@ TQM5200_STK100_config:	unconfig
 		{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
 		}
 	@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200
-uc101_config:         unconfig
+uc101_config:		unconfig
 	@$(MKCONFIG) uc101 ppc mpc5xxx uc101
-motionpro_config:         unconfig
+motionpro_config:	unconfig
 	@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
 
 
@@ -930,7 +930,7 @@ RPXlite_DW_NVRAM_config		\
 RPXlite_DW_NVRAM_64_config      \
 RPXlite_DW_NVRAM_LCD_config	\
 RPXlite_DW_NVRAM_64_LCD_config  \
-RPXlite_DW_config:         unconfig
+RPXlite_DW_config:	unconfig
 	@mkdir -p $(obj)include
 	@ >$(obj)include/config.h
 	@[ -z "$(findstring _64,$@)" ] || \
@@ -1733,9 +1733,13 @@ M54455EVB_i66_config :	unconfig
 	>include/config.h ; \
 	if [ "$${FLASH}" == "INTEL" ] ; then \
 		echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
+		echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+		cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		echo "... with INTEL boot..." ; \
 	else \
 		echo "#define CFG_ATMEL_BOOT"	>> $(obj)include/config.h ; \
+		echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+		cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		echo "... with ATMEL boot..." ; \
 	fi; \
 	echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
@@ -1766,7 +1770,8 @@ MPC8323ERDB_config:	unconfig
 MPC832XEMDS_config \
 MPC832XEMDS_HOST_33_config \
 MPC832XEMDS_HOST_66_config \
-MPC832XEMDS_SLAVE_config:	unconfig
+MPC832XEMDS_SLAVE_config \
+MPC832XEMDS_ATM_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "" >$(obj)include/config.h ; \
 	if [ "$(findstring _HOST_,$@)" ] ; then \
@@ -1781,10 +1786,17 @@ MPC832XEMDS_SLAVE_config:	unconfig
 	if [ "$(findstring _33_,$@)" ] ; then \
 		echo -n "...33M ..." ; \
 		echo "#define PCI_33M" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
 		echo -n "...66M..." ; \
 		echo "#define PCI_66M" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+	fi ; \
+	if [ "$(findstring _ATM_,$@)" ] ; then \
+		echo -n "...ATM..." ; \
+		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PQ_MDS_PIB_ATM     1" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale
 
@@ -1808,7 +1820,8 @@ MPC8349ITXGP_config:	unconfig
 MPC8360EMDS_config \
 MPC8360EMDS_HOST_33_config \
 MPC8360EMDS_HOST_66_config \
-MPC8360EMDS_SLAVE_config:	unconfig
+MPC8360EMDS_SLAVE_config \
+MPC8360EMDS_ATM_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "" >$(obj)include/config.h ; \
 	if [ "$(findstring _HOST_,$@)" ] ; then \
@@ -1823,10 +1836,17 @@ MPC8360EMDS_SLAVE_config:	unconfig
 	if [ "$(findstring _33_,$@)" ] ; then \
 		echo -n "...33M ..." ; \
 		echo "#define PCI_33M" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
 		echo -n "...66M..." ; \
 		echo "#define PCI_66M" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+	fi ; \
+	if [ "$(findstring _ATM_,$@)" ] ; then \
+		echo -n "...ATM..." ; \
+		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PQ_MDS_PIB_ATM     1" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale
 
@@ -1985,13 +2005,13 @@ AmigaOneG3SE_config:	unconfig
 BAB7xx_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx bab7xx eltec
 
-CPCI750_config:        unconfig
+CPCI750_config:	unconfig
 	@$(MKCONFIG) CPCI750 ppc 74xx_7xx cpci750 esd
 
-DB64360_config:  unconfig
+DB64360_config:	unconfig
 	@$(MKCONFIG) DB64360 ppc 74xx_7xx db64360 Marvell
 
-DB64460_config:  unconfig
+DB64460_config:	unconfig
 	@$(MKCONFIG) DB64460 ppc 74xx_7xx db64460 Marvell
 
 ELPPC_config: unconfig

README

@@ -2123,7 +2123,7 @@ to save the current settings.
 	to be a good choice since it makes it far enough from the
 	start of the data area as well as from the stack pointer.
 
-Please note that the environment is read-only as long as the monitor
+Please note that the environment is read-only until the monitor
 has been relocated to RAM and a RAM copy of the environment has been
 created; also, when using EEPROM you will have to use getenv_r()
 until then to read environment variables.

blackfin_config.mk

@@ -21,4 +21,4 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
+PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN -D__BLACKFIN__

board/ads5121/u-boot.lds

@@ -51,6 +51,7 @@ SECTIONS
   {
     cpu/mpc512x/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

board/amcc/sequoia/cmd_sequoia.c

@@ -25,6 +25,7 @@
 #include <common.h>
 #include <command.h>
 #include <i2c.h>
+#include <asm/io.h>
 
 /*
  * There are 2 versions of production Sequoia & Rainier platforms.
@@ -39,7 +40,7 @@
  * All Sequoias & Rainiers select from two possible EEPROMs in Boot
  * Config F. One for 33MHz PCI, one for 66MHz PCI. The following
  * values are for the 33MHz PCI configuration. Byte 5 (0 base) is
- * the only  value affected for a 66MHz PCI and simply needs a +0x10.
+ * the only value affected for a 33MHz PCI and simply needs a | 0x08.
  */
 
 #define NAND_COMPATIBLE	0x01
@@ -56,6 +57,7 @@ static char *config_labels[] = {
 	"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
 	"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
 	"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+	"CPU: 667 PLB: 133 OPB: 66 EBC: 66",
 	"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
 	NULL
 };
@@ -96,6 +98,11 @@ static u8 boot_configs[][17] = {
 		0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40,
 		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
 	},
+	{
+		(NOR_COMPATIBLE),
+		0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40,
+		0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+	},
 	{
 		(NAND_COMPATIBLE | NOR_COMPATIBLE),
 		0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
@@ -200,8 +207,12 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 
 	/* check CPLD register +5 for PCI 66MHz flag */
-	if (in8(CFG_BCSR_BASE + 5) & 0x01)
-		buf[5] += 0x10;
+	if ((in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN) == 0)
+		/*
+		 * PLB-to-PCI divisor = 3 for 33MHz sync PCI
+		 * instead of 2 for 66MHz systems
+		 */
+		buf[5] |= 0x08;
 
 	if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
 		printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);

board/amcc/sequoia/sequoia.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * (C) Copyright 2006
@@ -24,6 +24,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <ppc440.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -362,8 +363,8 @@ int checkboard(void)
 	printf("Board: Rainier - AMCC PPC440GRx Evaluation Board");
 #endif
 
-	rev = in8(CFG_BCSR_BASE + 0);
-	val = in8(CFG_BCSR_BASE + 5) & 0x01;
+	rev = in_8((void *)(CFG_BCSR_BASE + 0));
+	val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 
 	if (s != NULL) {

board/amcc/yosemite/yosemite.c

@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2006-2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -22,6 +24,7 @@
 #include <common.h>
 #include <ppc4xx.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <spd_sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -181,8 +184,8 @@ int checkboard(void)
 	printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board");
 #endif
 
-	rev = *(u8 *)(CFG_CPLD + 0);
-	val = *(u8 *)(CFG_CPLD + 5) & 0x01;
+	rev = in_8((void *)(CFG_BCSR_BASE + 0));
+	val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 
 	if (s != NULL) {

board/cds/common/ft_board.c

@@ -37,17 +37,24 @@ static void cds_pci_fixup(void *blob)
 
 	map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len);
 
-	len /= sizeof(u32);
+	if (!map)
+		map = ft_get_prop(blob, "/" OF_PCI "/interrupt-map", &len);
 
-	slot = get_pci_slot();
+	if (map) {
+		len /= sizeof(u32);
 
-	for (i=0;i<len;i+=7) {
-		/* We rotate the interrupt pins so that the mapping
-		 * changes depending on the slot the carrier card is in.
-		 */
-		map[3] = ((map[3] + slot - 2) % 4) + 1;
+		slot = get_pci_slot();
 
-		map+=7;
+		for (i=0;i<len;i+=7) {
+			/* We rotate the interrupt pins so that the mapping
+			 * changes depending on the slot the carrier card is in.
+			 */
+			map[3] = ((map[3] + slot - 2) % 4) + 1;
+
+			map+=7;
+		}
+	} else {
+		printf("*** Warning - No PCI node found\n");
 	}
 }
 #endif

board/cogent/u-boot.lds

@@ -55,6 +55,7 @@ SECTIONS
   {
     *(.text)
     common/environment.o(.text)
+    *(.fixup)
     *(.got1)
   }
   _etext = .;

board/dbau1x00/dbau1x00.c

@@ -25,6 +25,7 @@
 #include <command.h>
 #include <asm/au1x00.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 
 long int initdram(int board_type)
 {
@@ -77,6 +78,9 @@ int checkboard (void)
 	default:
 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
 	}
+
+	set_io_port_base(0);
+
 #ifdef CONFIG_IDE_PCMCIA
 	/* Enable 3.3 V on slot 0 ( VCC )
 	   No 5V */

board/dbau1x00/u-boot.lds

@@ -43,14 +43,14 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	_gp = ALIGN(16);
-
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 

board/freescale/common/pixis.c

@@ -207,13 +207,16 @@ void read_from_px_regs_altbank(int set)
 	out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp);
 }
 
+#ifndef CFG_PIXIS_VBOOT_MASK
+#define CFG_PIXIS_VBOOT_MASK	0x40
+#endif
 
 void set_altbank(void)
 {
 	u8 tmp;
 
 	tmp = in8(PIXIS_BASE + PIXIS_VBOOT);
-	tmp ^= 0x40;
+	tmp ^= CFG_PIXIS_VBOOT_MASK;
 
 	out8(PIXIS_BASE + PIXIS_VBOOT, tmp);
 }

board/freescale/common/pq-mds-pib.c

@@ -79,19 +79,19 @@ int pib_init(void)
 
 	printf("QOC3 ATM card on PMC0\n");
 #elif defined(CONFIG_MPC832XEMDS)
-	val = 0;
-	i2c_write(0x26, 0x7, 1, &val, 1);
-	val = 0xf7;
-	i2c_write(0x26, 0x3, 1, &val, 1);
+	val8 = 0;
+	i2c_write(0x26, 0x7, 1, &val8, 1);
+	val8 = 0xf7;
+	i2c_write(0x26, 0x3, 1, &val8, 1);
 
-	val = 0;
-	i2c_write(0x21, 0x6, 1, &val, 1);
-	i2c_write(0x21, 0x7, 1, &val, 1);
+	val8 = 0;
+	i2c_write(0x21, 0x6, 1, &val8, 1);
+	i2c_write(0x21, 0x7, 1, &val8, 1);
 
-	val = 0xdf;
-	i2c_write(0x21, 0x2, 1, &val, 1);
-	val = 0xef;
-	i2c_write(0x21, 0x3, 1, &val, 1);
+	val8 = 0xdf;
+	i2c_write(0x21, 0x2, 1, &val8, 1);
+	val8 = 0xef;
+	i2c_write(0x21, 0x3, 1, &val8, 1);
 
 	eieio();
 

board/freescale/m54455evb/config.mk

@@ -22,4 +22,6 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)

board/freescale/m54455evb/u-boot.atm

@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf5445x/start.o		(.text)
+    lib_m68k/traps.o		(.text)
+    lib_m68k/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/environment.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}

board/freescale/m54455evb/u-boot.int

@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf5445x/start.o		(.text)
+    lib_m68k/traps.o		(.text)
+    lib_m68k/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}

board/gth2/gth2.c

@@ -26,14 +26,13 @@
 #include <asm/au1x00.h>
 #include <asm/addrspace.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 #include <watchdog.h>
 
 #include "ee_access.h"
 
 static int wdi_status = 0;
 
-unsigned long mips_io_port_base = 0;
-
 #define SDRAM_SIZE ((64*1024*1024)-(12*4096))
 
 
@@ -147,6 +146,9 @@ int checkboard (void)
 	default:
 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
 	}
+
+	set_io_port_base(0);
+
 #ifdef CONFIG_IDE_PCMCIA
 	/* PCMCIA is on a 36 bit physical address.
 	   We need to map it into a 32 bit addresses */

board/gth2/u-boot.lds

@@ -43,14 +43,14 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	_gp = ALIGN(16);
-
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 

board/hymod/u-boot.lds

@@ -69,6 +69,7 @@ SECTIONS
     common/environment.o(.text)
 
     *(.text)
+    *(.fixup)
     *(.got1)
   }
   _etext = .;

board/ids8247/ids8247.c

@@ -25,6 +25,12 @@
 #include <ioports.h>
 #include <mpc8260.h>
 
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <libfdt_env.h>
+#include <fdt_support.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -38,12 +44,12 @@ const iop_conf_t iop_conf_tab[4][32] = {
 
     /* Port A configuration */
     {	/*	      conf ppar psor pdir podr pdat */
-	/* PA31 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 COL */
-	/* PA30 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 CRS */
-	/* PA29 */ {   0,   1,	 1,   1,   0,	0   }, /* FCC1 TXER */
-	/* PA28 */ {   0,   1,	 1,   1,   0,	0   }, /* FCC1 TXEN */
-	/* PA27 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 RXDV */
-	/* PA26 */ {   0,   1,	 1,   0,   0,	0   }, /* FCC1 RXER */
+	/* PA31 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 COL */
+	/* PA30 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 CRS */
+	/* PA29 */ {   1,   1,	 1,   1,   0,	0   }, /* FCC1 TXER */
+	/* PA28 */ {   1,   1,	 1,   1,   0,	0   }, /* FCC1 TXEN */
+	/* PA27 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 RXDV */
+	/* PA26 */ {   1,   1,	 1,   0,   0,	0   }, /* FCC1 RXER */
 	/* PA25 */ {   0,   0,	 0,   0,   1,	0   }, /* 8247_P0 */
 #if defined(CONFIG_SOFT_I2C)
 	/* PA24 */ {   1,   0,	 0,   0,   1,	1   }, /* I2C_SDA2 */
@@ -53,14 +59,14 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PA23 */ {   0,   0,	 0,   1,   0,	0   }, /* PA23 */
 #endif
 	/* PA22 */ {   0,   0,	 0,   0,   1,	0   }, /* SMC2_DCD */
-	/* PA21 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD3 */
-	/* PA20 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD2 */
-	/* PA19 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD1 */
-	/* PA18 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC1 TXD0 */
-	/* PA17 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD0 */
-	/* PA16 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD1 */
-	/* PA15 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD2 */
-	/* PA14 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC1 RXD3 */
+	/* PA21 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD3 */
+	/* PA20 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD2 */
+	/* PA19 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD1 */
+	/* PA18 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC1 TXD0 */
+	/* PA17 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD0 */
+	/* PA16 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD1 */
+	/* PA15 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD2 */
+	/* PA14 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 RXD3 */
 	/* PA13 */ {   0,   0,	 0,   1,   1,	0   }, /* SMC2_RTS */
 	/* PA12 */ {   0,   0,	 0,   0,   1,	0   }, /* SMC2_CTS */
 	/* PA11 */ {   0,   0,	 0,   1,   1,	0   }, /* SMC2_DTR */
@@ -79,20 +85,20 @@ const iop_conf_t iop_conf_tab[4][32] = {
 
     /* Port B configuration */
     {	/*	      conf ppar psor pdir podr pdat */
-	/* PB31 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TX_ER */
-	/* PB30 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_DV */
-	/* PB29 */ {   1,   1,	 1,   1,   0,	0   }, /* FCC2 MII TX_EN */
-	/* PB28 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_ER */
-	/* PB27 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII COL */
-	/* PB26 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII CRS */
-	/* PB25 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[3] */
-	/* PB24 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[2] */
-	/* PB23 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[1] */
-	/* PB22 */ {   1,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[0] */
-	/* PB21 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[0] */
-	/* PB20 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[1] */
-	/* PB19 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[2] */
-	/* PB18 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[3] */
+	/* PB31 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TX_ER */
+	/* PB30 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_DV */
+	/* PB29 */ {   0,   1,	 1,   1,   0,	0   }, /* FCC2 MII TX_EN */
+	/* PB28 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_ER */
+	/* PB27 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII COL */
+	/* PB26 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII CRS */
+	/* PB25 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[3] */
+	/* PB24 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[2] */
+	/* PB23 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[1] */
+	/* PB22 */ {   0,   1,	 0,   1,   0,	0   }, /* FCC2 MII TxD[0] */
+	/* PB21 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[0] */
+	/* PB20 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[1] */
+	/* PB19 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[2] */
+	/* PB18 */ {   0,   1,	 0,   0,   0,	0   }, /* FCC2 MII RxD[3] */
 	/* PB17 */ {   0,   0,	 0,   0,   0,	0   }, /* PB17 */
 	/* PB16 */ {   0,   0,	 0,   0,   0,	0   }, /* PB16 */
 	/* PB15 */ {   0,   0,	 0,   0,   0,	0   }, /* PB15 */
@@ -123,8 +129,8 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PC26 */ {   0,   0,	 0,   1,   0,	0   }, /* PC26 */
 	/* PC25 */ {   0,   1,	 1,   0,   0,	0   }, /* SYNC_IN */
 	/* PC24 */ {   0,   0,	 0,   1,   0,	0   }, /* PC24 */
-	/* PC23 */ {   0,   1,	 0,   1,   0,	0   }, /* ATMTFCLK */
-	/* PC22 */ {   0,   1,	 0,   0,   0,	0   }, /* ATMRFCLK */
+	/* PC23 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 MII TX_CLK */
+	/* PC22 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC1 MII RX_CLK */
 	/* PC21 */ {   0,   1,	 0,   0,   0,	0   }, /* SCC1 EN RXCLK */
 	/* PC20 */ {   0,   1,	 0,   0,   0,	0   }, /* SCC1 EN TXCLK */
 	/* PC19 */ {   1,   1,	 0,   0,   0,	0   }, /* FCC2 MII RX_CLK */
@@ -180,7 +186,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
 	/* PD10 */ {   0,   0,	 0,   0,   0,	0   }, /* PD10 */
 	/* PD9	*/ {   0,   0,	 0,   0,   0,	0   }, /* PD9 */
 	/* PD8	*/ {   0,   0,	 0,   0,   0,	0   }, /* PD8 */
-	/* PD7	*/ {   0,   0,	 0,   1,   0,	1   }, /* MII_MDIO */
+	/* PD7	*/ {   1,   0,	 0,   1,   0,	1   }, /* MII_MDIO */
 	/* PD6	*/ {   0,   0,	 0,   1,   0,	1   }, /* PD6 */
 	/* PD5	*/ {   0,   0,	 0,   1,   0,	1   }, /* PD5 */
 	/* PD4	*/ {   0,   0,	 0,   1,   0,	1   }, /* PD4 */
@@ -224,7 +230,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 	 * mapped by the controller. That means, that the initial mapping has
 	 * to be (at least) twice as large as the maximum expected size.
 	 */
-	maxsize = (1 + (~orx | 0x7fff)) / 2;
+	maxsize = (1 + (~orx | 0x7fff))/* / 2*/;
 
 	sdmr_ptr = &memctl->memc_psdmr;
 	orx_ptr = &memctl->memc_or2;
@@ -315,4 +321,38 @@ nand_init (void)
 	printf ("%4lu MB\n", totlen >>20);
 }
 
-#endif
+#endif	/* CFG_CMD_NAND */
+
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+/*
+ * update "memory" property in the blob
+ */
+void ft_blob_update(void *blob, bd_t *bd)
+{
+	int ret, nodeoffset = 0;
+	ulong memory_data[2] = {0};
+
+	memory_data[0] = cpu_to_be32(bd->bi_memstart);
+	memory_data[1] = cpu_to_be32(bd->bi_memsize);
+
+	nodeoffset = fdt_find_node_by_path (blob, "/memory");
+	if (nodeoffset >= 0) {
+		ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
+					sizeof(memory_data));
+	if (ret < 0)
+		printf("ft_blob_update): cannot set /memory/reg "
+			"property err:%s\n", fdt_strerror(ret));
+	}
+	else {
+		/* memory node is required in dts */
+		printf("ft_blob_update(): cannot find /memory node "
+		"err:%s\n", fdt_strerror(nodeoffset));
+	}
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup( blob, bd);
+	ft_blob_update(blob, bd);
+}
+#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */

board/incaip/incaip.c

@@ -25,7 +25,7 @@
 #include <command.h>
 #include <asm/addrspace.h>
 #include <asm/inca-ip.h>
-
+#include <asm/io.h>
 
 extern uint incaip_get_cpuclk(void);
 
@@ -85,7 +85,6 @@ long int initdram(int board_type)
 
 int checkboard (void)
 {
-
 	unsigned long chipid = *INCA_IP_WDT_CHIPID;
 	int part_num;
 
@@ -107,5 +106,7 @@ int checkboard (void)
 
 	printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
 
+	set_io_port_base(0);
+
 	return 0;
 }

board/incaip/u-boot.lds

@@ -43,14 +43,14 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	_gp = ALIGN(16);
-
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 

board/innokom/innokom.c

@@ -72,7 +72,7 @@ int i2c_init_board(void)
 
 int misc_init_r(void)
 {
-	uchar *str;
+	char *str;
 
 	/* determine if the software update key is pressed during startup   */
 	if (GPLR0 & 0x00000800) {

board/lwmon5/lwmon5.c

@@ -96,6 +96,23 @@ int board_early_init_f(void)
 
 	gpio_write_bit(CFG_GPIO_FLASH_WP, 1);
 
+	/*
+	 * Reset PHY's:
+	 * The PHY's need a 2nd reset pulse, since the MDIO address is latched
+	 * upon reset, and with the first reset upon powerup, the addresses are
+	 * not latched reliable, since the IRQ line is multiplexed with an
+	 * MDIO address. A 2nd reset at this time will make sure, that the
+	 * correct address is latched.
+	 */
+	gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
+	gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
+	udelay(1000);
+	gpio_write_bit(CFG_GPIO_PHY0_RST, 0);
+	gpio_write_bit(CFG_GPIO_PHY1_RST, 0);
+	udelay(1000);
+	gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
+	gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
+
 	return 0;
 }
 
@@ -230,15 +247,6 @@ int misc_init_r(void)
 	/* Write lime controller memory parameters */
 	out_be32((void *)CFG_LIME_MMR, CFG_LIME_MMR_VALUE);
 
-	/*
-	 * Reset PHY's
-	 */
-	gpio_write_bit(CFG_GPIO_PHY0_RST, 0);
-	gpio_write_bit(CFG_GPIO_PHY1_RST, 0);
-	udelay(100);
-	gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
-	gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
-
 	/*
 	 * Init display controller
 	 */

board/m5282evb/m5282evb.c

@@ -89,4 +89,5 @@ long int initdram (int board_type)
 		/* Write to the SDRAM Mode Register */
 		*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696;
 	}
+	return dramsize;
 }

board/motionpro/motionpro.c

@@ -138,6 +138,12 @@ long int initdram(int board_type)
 #ifndef CFG_RAMBOOT
 	ulong test1, test2;
 
+	/* According to AN3221 (MPC5200B SDRAM Initialization and
+	 * Configuration), the SDelay register must be written a value of
+	 * 0x00000004 as the first step of the SDRAM contorller configuration.
+	 */
+	*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+
 	/* configure SDRAM start/end for detection */
 	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
 	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */

board/mousse/u-boot.lds

@@ -60,6 +60,7 @@ SECTIONS
     lib_generic/crc32.o		(.text)
     lib_generic/zlib.o		(.text)
 
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

board/pb1x00/pb1x00.c

@@ -25,6 +25,7 @@
 #include <command.h>
 #include <asm/au1x00.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 
 long int initdram(int board_type)
 {
@@ -69,6 +70,9 @@ int checkboard (void)
 	default:
 		printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
 	}
+
+	set_io_port_base(0);
+
 #if defined(CONFIG_IDE_PCMCIA) && 0
 	/* Enable 3.3 V on slot 0 ( VCC )
 	   No 5V */

board/pb1x00/u-boot.lds

@@ -43,14 +43,14 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	_gp = ALIGN(16);
-
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 

board/purple/flash.c

@@ -299,7 +299,7 @@ void flash_print_info (flash_info_t *info)
 	int i;
 	uchar *boottype;
 	uchar *bootletter;
-	uchar *fmt;
+	char *fmt;
 	uchar botbootletter[] = "B";
 	uchar topbootletter[] = "T";
 	uchar botboottype[] = "bottom boot sector";

board/purple/purple.c

@@ -26,6 +26,7 @@
 #include <asm/inca-ip.h>
 #include <asm/regdef.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/cacheops.h>
 
@@ -145,6 +146,8 @@ int checkboard (void)
 
 	printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000);
 
+	set_io_port_base(0);
+
 	return 0;
 }
 

board/purple/u-boot.lds

@@ -53,14 +53,14 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	_gp = ALIGN(16);
-
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 

board/pxa255_idp/Makefile

@@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS	:= pxa_idp.o
-SOBJS	:= memsetup.o
+SOBJS	:= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

board/pxa255_idp/config.mk

@@ -1,3 +1,3 @@
 #TEXT_BASE = 0xa1700000
-TEXT_BASE = 0xa3000000
+TEXT_BASE = 0xa3080000
 #TEXT_BASE = 0

board/pxa255_idp/lowlevel_init.S

@@ -3,7 +3,7 @@
  *
  * NOTE: I haven't clean this up considerably, just enough to get it
  * running. See hal_platform_setup.h for the source. See
- * board/cradle/memsetup.S for another PXA250 setup that is
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
  * much cleaner.
  *
  * See file CREDITS for list of people who contributed to this
@@ -41,8 +41,8 @@ DRAM_SIZE:  .long   CFG_DRAM_SIZE
 /*
  * 	Memory setup
  */
-.globl memsetup
-memsetup:
+.globl lowlevel_init
+lowlevel_init:
 
 	mov      r10, lr
 
@@ -395,7 +395,7 @@ initclks:
 
 	/* Save SDRAM size */
 	ldr     r1, =DRAM_SIZE
-	 str	   r8, [r1]
+	str     r8, [r1]
 
 	/* Interrupt init: Mask all interrupts                              */
 	ldr	r0, =ICMR /* enable no sources */
@@ -426,7 +426,7 @@ initclks:
 	bl 	blink
 #endif
 
-endmemsetup:
+endlowlevel_init:
 
 	mov     pc, r10
 

board/pxa255_idp/u-boot.lds

@@ -44,6 +44,7 @@ SECTIONS
 	. = ALIGN(4);
 	.got : { *(.got) }
 
+	. = .;
 	__u_boot_cmd_start = .;
 	.u_boot_cmd : { *(.u_boot_cmd) }
 	__u_boot_cmd_end = .;

board/rsdproto/rsdproto.c

@@ -210,7 +210,7 @@ void read_RS5C372_time (struct tm *timedate)
 
 #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
 
-	if (i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) {
+	if (! i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) {
 		timedate->tm_sec = BCD_TO_BIN (buffer[0]);
 		timedate->tm_min = BCD_TO_BIN (buffer[1]);
 		timedate->tm_hour = BCD_TO_BIN (buffer[2]);
@@ -231,7 +231,7 @@ int read_LM84_temp (int address)
 	unsigned char buffer[8];
 	/*int rc;*/
 
-	if (i2c_read (address, 0, 1, buffer, 1)) {
+	if (! i2c_read (address, 0, 1, buffer, 1)) {
 		return (int) buffer[0];
 	} else {
 		/*printf("i2c error %02x\n", rc); */

board/rsdproto/u-boot.lds

@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc8260/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     /*. = env_offset; */
   }

board/tb0229/tb0229.c

@@ -13,10 +13,9 @@
 #include <command.h>
 #include <asm/addrspace.h>
 #include <asm/inca-ip.h>
+#include <asm/io.h>
 #include <pci.h>
 
-unsigned long mips_io_port_base = 0;
-
 #if defined(CONFIG_PCI)
 static struct pci_controller hose;
 
@@ -26,17 +25,17 @@ void pci_init_board (void)
 }
 #endif
 
-
 long int initdram(int board_type)
 {
 	return get_ram_size (CFG_SDRAM_BASE, 0x8000000);
 }
 
-
 int checkboard (void)
 {
 	printf("Board: TANBAC TB0229 ");
 	printf("(CPU Speed %d MHz)\n", (int)CPU_CLOCK_RATE/1000000);
 
+	set_io_port_base(0);
+
 	return 0;
 }

board/tb0229/u-boot.lds

@@ -43,14 +43,14 @@ SECTIONS
 	. = ALIGN(4);
 	.data  : { *(.data) }
 
-	. = ALIGN(4);
-	.sdata  : { *(.sdata) }
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
 
-	_gp = ALIGN(16);
-
-	__got_start = .;
-	.got  : { *(.got) }
-	__got_end = .;
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
 
 	.sdata  : { *(.sdata) }
 

board/tqm5200/cmd_stk52xx.c

@@ -561,7 +561,7 @@ void led_init(void)
 	gpt->gpt6.emsr |=  0x00000024;
 	gpt->gpt7.emsr |=  0x00000024;
 
-
+#ifndef CONFIG_TQM5200S
 	/* enable SM501 GPIO control (in both power modes) */
 	*(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |=
 		POWER_MODE_GATE_GPIO_PWM_I2C;
@@ -574,6 +574,7 @@ void led_init(void)
 
 	/* configure SM501 gpio pins 48-51 as output */
 	*(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |= (0xF << 16);
+#endif /* !CONFIG_TQM5200S */
 }
 
 /*
@@ -650,7 +651,7 @@ int do_led(char *argv[])
 			gpt->gpt7.emsr &=  ~(1 << 4);
 		}
 		break;
-
+#ifndef CONFIG_TQM5200S
 	case 24:
 		if (strcmp (argv[3], "on") == 0) {
 			*(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
@@ -730,7 +731,7 @@ int do_led(char *argv[])
 				~(0x1 << 19);
 		}
 		break;
-
+#endif /* !CONFIG_TQM5200S */
 	default:
 		printf ("%s: invalid led number %s\n", __FUNCTION__, argv[2]);
 		return 1;
@@ -1110,7 +1111,7 @@ int do_rs232(char *argv[])
 	return error_status;
 }
 
-#ifndef CONFIG_FO300
+#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S)
 static void sm501_backlight (unsigned int state)
 {
 	if (state == BL_ON) {
@@ -1120,7 +1121,7 @@ static void sm501_backlight (unsigned int state)
 		*(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
 			~((1 << 26) | (1 << 27));
 }
-#endif
+#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
 
 int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
@@ -1160,7 +1161,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			else
 				printf ("Error\n");
 			return rcode;
-#ifndef CONFIG_FO300
+#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S)
 		} else if (strncmp (argv[1], "backlight", 4) == 0) {
 			if (strncmp (argv[2], "on", 2) == 0) {
 				sm501_backlight (BL_ON);
@@ -1170,7 +1171,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 				sm501_backlight (BL_OFF);
 				return 0;
 			}
-#endif
+#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
 		}
 		break;
 
@@ -1228,8 +1229,10 @@ U_BOOT_CMD(
 	"     - loopback plug for X83 required\n"
 	"fkt rs232 number\n"
 	"     - loopback plug(s) for X2 required\n"
+#ifndef CONFIG_TQM5200S
 	"fkt backlight on/off\n"
 	"     - switch backlight on or off\n"
+#endif /* !CONFIG_TQM5200S */
 );
 #elif defined(CONFIG_FO300)
 U_BOOT_CMD(

board/tqm5200/tqm5200.c

@@ -441,15 +441,21 @@ ulong post_word_load (void)
 }
 #endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/
 
-#ifdef CONFIG_PS2MULT
 #ifdef CONFIG_BOARD_EARLY_INIT_R
 int board_early_init_r (void)
 {
+#ifdef CONFIG_PS2MULT
 	ps2mult_early_init();
+#endif /* CONFIG_PS2MULT */
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+	/* Low level USB init, required for proper kernel operation */
+	usb_cpu_init();
+#endif
+
 	return (0);
 }
 #endif
-#endif /* CONFIG_PS2MULT */
 
 #ifdef CONFIG_FO300
 int silent_boot (void)
@@ -543,6 +549,7 @@ int last_stage_init (void)
 		__asm__ volatile ("sync");
 	}
 
+#ifndef CONFIG_TQM5200S	/* The TQM5200S has no SM501 grafic controller */
 	/*
 	 * Check for Grafic Controller
 	 */
@@ -586,6 +593,7 @@ int last_stage_init (void)
 #endif
 
 	return 0;
+#endif /* !CONFIG_TQM5200S */
 }
 
 #ifdef CONFIG_VIDEO_SM501

board/tqm8xx/tqm8xx.c

@@ -354,6 +354,8 @@ long int initdram (int board_type)
 	udelay (10000);
 
 #ifdef	CONFIG_CAN_DRIVER
+	/* UPM initialization for CAN @ CLKOUT <= 66 MHz */
+
 	/* Initialize OR3 / BR3 */
 	memctl->memc_or3 = CFG_OR3_CAN;
 	memctl->memc_br3 = CFG_BR3_CAN;
@@ -362,7 +364,7 @@ long int initdram (int board_type)
 	memctl->memc_mbmr = MBMR_GPL_B4DIS;	/* GPL_B4 ouput line Disable */
 
 	/* Initialize UPMB for CAN: single read */
-	memctl->memc_mdr = 0xFFFFC004;
+	memctl->memc_mdr = 0xFFFFCC04;
 	memctl->memc_mcr = 0x0100 | UPMB;
 
 	memctl->memc_mdr = 0x0FFFD004;
@@ -374,23 +376,23 @@ long int initdram (int board_type)
 	memctl->memc_mdr = 0x3FFFC004;
 	memctl->memc_mcr = 0x0103 | UPMB;
 
-	memctl->memc_mdr = 0xFFFFDC05;
+	memctl->memc_mdr = 0xFFFFDC07;
 	memctl->memc_mcr = 0x0104 | UPMB;
 
 	/* Initialize UPMB for CAN: single write */
-	memctl->memc_mdr = 0xFFFCC004;
+	memctl->memc_mdr = 0xFFFCCC04;
 	memctl->memc_mcr = 0x0118 | UPMB;
 
-	memctl->memc_mdr = 0xCFFCD004;
+	memctl->memc_mdr = 0xCFFCDC04;
 	memctl->memc_mcr = 0x0119 | UPMB;
 
-	memctl->memc_mdr = 0x0FFCC000;
+	memctl->memc_mdr = 0x3FFCC000;
 	memctl->memc_mcr = 0x011A | UPMB;
 
-	memctl->memc_mdr = 0x7FFCC004;
+	memctl->memc_mdr = 0xFFFCC004;
 	memctl->memc_mcr = 0x011B | UPMB;
 
-	memctl->memc_mdr = 0xFFFDCC05;
+	memctl->memc_mdr = 0xFFFDC405;
 	memctl->memc_mcr = 0x011C | UPMB;
 #endif							/* CONFIG_CAN_DRIVER */
 

board/xsengine/flash.c

@@ -46,11 +46,11 @@ unsigned long flash_init (void)
 	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
 		switch (i) {
 		case 0:
-			flash_get_size ((long *) PHYS_FLASH_1, &flash_info[i]);
+			flash_get_size ((vu_long *) PHYS_FLASH_1, &flash_info[i]);
 			flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
 			break;
 		case 1:
-			flash_get_size ((long *) PHYS_FLASH_2, &flash_info[i]);
+			flash_get_size ((vu_long *) PHYS_FLASH_2, &flash_info[i]);
 			flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
 			break;
 		default:

common/cmd_bootm.c

@@ -466,7 +466,7 @@ U_BOOT_CMD(
  	"\t'arg' can be the address of an initrd image\n"
 #if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)
 	"\tWhen booting a Linux kernel which requires a flat device-tree\n"
-	"\ta third argument is required which is the address of the of the\n"
+	"\ta third argument is required which is the address of the\n"
 	"\tdevice-tree blob. To boot that kernel without an initrd image,\n"
 	"\tuse a '-' for the second argument. If you do not pass a third\n"
 	"\ta bd_info struct will be passed instead\n"

common/cmd_dtt.c

@@ -57,7 +57,7 @@ int do_dtt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 
 U_BOOT_CMD(
 	  dtt,	1,	1,	do_dtt,
-	  "dtt     - Digital Thermometer and Themostat\n",
+	  "dtt     - Digital Thermometer and Thermostat\n",
 	  "        - Read temperature from digital thermometer and thermostat.\n"
 );
 

common/cmd_ide.c

@@ -54,10 +54,6 @@
 
 #ifndef __PPC__
 #include <asm/io.h>
-#ifdef __MIPS__
-/* Macros depend on this variable */
-unsigned long mips_io_port_base = 0;
-#endif
 #endif
 
 #ifdef CONFIG_IDE_8xx_DIRECT
@@ -1136,9 +1132,9 @@ static void ide_ident (block_dev_desc_t *dev_desc)
 
 	input_swap_data (device, iobuf, ATA_SECTORWORDS);
 
-	ident_cpy (dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
-	ident_cpy (dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
-	ident_cpy (dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
+	ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
+	ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
+	ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
 #ifdef __LITTLE_ENDIAN
 	/*
 	 * firmware revision and model number have Big Endian Byte
@@ -1953,9 +1949,9 @@ static void	atapi_inquiry(block_dev_desc_t * dev_desc)
 		return;
 
 	/* copy device ident strings */
-	ident_cpy(dev_desc->vendor,&iobuf[8],8);
-	ident_cpy(dev_desc->product,&iobuf[16],16);
-	ident_cpy(dev_desc->revision,&iobuf[32],5);
+	ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
+	ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
+	ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
 
 	dev_desc->lun=0;
 	dev_desc->lba=0;

common/cmd_mii.c

@@ -112,9 +112,11 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 					"OUI = 0x%04X, "
 					"Model = 0x%02X, "
 					"Rev = 0x%02X, "
-					"%3dbaseT, %s\n",
+					"%3dbase%s, %s\n",
 					j, oui, model, rev,
 					miiphy_speed (devname, j),
+					miiphy_is_1000base_x (devname, j)
+						? "X" : "T",
 					(miiphy_duplex (devname, j) == FULL)
 						? "FDX" : "HDX");
 			}
@@ -496,9 +498,11 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 					"OUI = 0x%04X, "
 					"Model = 0x%02X, "
 					"Rev = 0x%02X, "
-					"%3dbaseT, %s\n",
+					"%3dbase%s, %s\n",
 					j, oui, model, rev,
 					miiphy_speed (devname, j),
+					miiphy_is_1000base_x (devname, j)
+						? "X" : "T",
 					(miiphy_duplex (devname, j) == FULL)
 						? "FDX" : "HDX");
 			}

common/miiphyutil.c

@@ -49,10 +49,10 @@
 struct mii_dev {
 	struct list_head link;
 	char *name;
-	int (* read)(char *devname, unsigned char addr,
-			unsigned char reg, unsigned short *value);
-	int (* write)(char *devname, unsigned char addr,
-			unsigned char reg, unsigned short value);
+	int (*read) (char *devname, unsigned char addr,
+		     unsigned char reg, unsigned short *value);
+	int (*write) (char *devname, unsigned char addr,
+		      unsigned char reg, unsigned short value);
 };
 
 static struct list_head mii_devs;
@@ -62,21 +62,21 @@ static struct mii_dev *current_mii;
  *
  * Initialize global data. Need to be called before any other miiphy routine.
  */
-void miiphy_init()
+void miiphy_init ()
 {
-		INIT_LIST_HEAD(&mii_devs);
-		current_mii = NULL;
+	INIT_LIST_HEAD (&mii_devs);
+	current_mii = NULL;
 }
 
 /*****************************************************************************
  *
  * Register read and write MII access routines for the device <name>.
  */
-void miiphy_register(char *name,
-		int (* read)(char *devname, unsigned char addr,
-			unsigned char reg, unsigned short *value),
-		int (* write)(char *devname, unsigned char addr,
-			unsigned char reg, unsigned short value))
+void miiphy_register (char *name,
+		      int (*read) (char *devname, unsigned char addr,
+				   unsigned char reg, unsigned short *value),
+		      int (*write) (char *devname, unsigned char addr,
+				    unsigned char reg, unsigned short value))
 {
 	struct list_head *entry;
 	struct mii_dev *new_dev;
@@ -84,63 +84,64 @@ void miiphy_register(char *name,
 	unsigned int name_len;
 
 	/* check if we have unique name */
-	list_for_each(entry, &mii_devs) {
-		miidev = list_entry(entry, struct mii_dev, link);
-		if (strcmp(miidev->name, name) == 0) {
-			printf("miiphy_register: non unique device name '%s'\n",
-					name);
+	list_for_each (entry, &mii_devs) {
+		miidev = list_entry (entry, struct mii_dev, link);
+		if (strcmp (miidev->name, name) == 0) {
+			printf ("miiphy_register: non unique device name "
+				"'%s'\n", name);
 			return;
 		}
 	}
 
 	/* allocate memory */
-	name_len = strlen(name);
-	new_dev = (struct mii_dev *)malloc(sizeof(struct mii_dev) + name_len + 1);
+	name_len = strlen (name);
+	new_dev =
+	    (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
 
-	if(new_dev == NULL) {
-		printf("miiphy_register: cannot allocate memory for '%s'\n",
-				name);
+	if (new_dev == NULL) {
+		printf ("miiphy_register: cannot allocate memory for '%s'\n",
+			name);
 		return;
 	}
-	memset(new_dev, 0, sizeof(struct mii_dev) + name_len);
+	memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
 
 	/* initalize mii_dev struct fields */
-	INIT_LIST_HEAD(&new_dev->link);
+	INIT_LIST_HEAD (&new_dev->link);
 	new_dev->read = read;
 	new_dev->write = write;
 	new_dev->name = (char *)(new_dev + 1);
-	strncpy(new_dev->name, name, name_len);
+	strncpy (new_dev->name, name, name_len);
 	new_dev->name[name_len] = '\0';
 
-	debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
-			new_dev->name, new_dev->read, new_dev->write);
+	debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
+	       new_dev->name, new_dev->read, new_dev->write);
 
 	/* add it to the list */
-	list_add_tail(&new_dev->link, &mii_devs);
+	list_add_tail (&new_dev->link, &mii_devs);
 
 	if (!current_mii)
 		current_mii = new_dev;
 }
 
-int miiphy_set_current_dev(char *devname)
+int miiphy_set_current_dev (char *devname)
 {
 	struct list_head *entry;
 	struct mii_dev *dev;
 
-	list_for_each(entry, &mii_devs) {
-		dev = list_entry(entry, struct mii_dev, link);
+	list_for_each (entry, &mii_devs) {
+		dev = list_entry (entry, struct mii_dev, link);
 
-		if (strcmp(devname, dev->name) == 0) {
+		if (strcmp (devname, dev->name) == 0) {
 			current_mii = dev;
 			return 0;
 		}
 	}
 
-	printf("No such device: %s\n", devname);
+	printf ("No such device: %s\n", devname);
 	return 1;
 }
 
-char *miiphy_get_current_dev()
+char *miiphy_get_current_dev ()
 {
 	if (current_mii)
 		return current_mii->name;
@@ -156,8 +157,8 @@ char *miiphy_get_current_dev()
  * Returns:
  *   0 on success
  */
-int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
-		unsigned short *value)
+int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+		 unsigned short *value)
 {
 	struct list_head *entry;
 	struct mii_dev *dev;
@@ -165,22 +166,22 @@ int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
 	int read_ret = 0;
 
 	if (!devname) {
-		printf("NULL device name!\n");
+		printf ("NULL device name!\n");
 		return 1;
 	}
 
-	list_for_each(entry, &mii_devs) {
-		dev = list_entry(entry, struct mii_dev, link);
+	list_for_each (entry, &mii_devs) {
+		dev = list_entry (entry, struct mii_dev, link);
 
-		if (strcmp(devname, dev->name) == 0) {
+		if (strcmp (devname, dev->name) == 0) {
 			found_dev = 1;
-			read_ret = dev->read(devname, addr, reg, value);
+			read_ret = dev->read (devname, addr, reg, value);
 			break;
 		}
 	}
 
 	if (found_dev == 0)
-		printf("No such device: %s\n", devname);
+		printf ("No such device: %s\n", devname);
 
 	return ((found_dev) ? read_ret : 1);
 }
@@ -193,8 +194,8 @@ int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
  * Returns:
  *   0 on success
  */
-int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
-		unsigned short value)
+int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+		  unsigned short value)
 {
 	struct list_head *entry;
 	struct mii_dev *dev;
@@ -202,22 +203,22 @@ int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
 	int write_ret = 0;
 
 	if (!devname) {
-		printf("NULL device name!\n");
+		printf ("NULL device name!\n");
 		return 1;
 	}
 
-	list_for_each(entry, &mii_devs) {
-		dev = list_entry(entry, struct mii_dev, link);
+	list_for_each (entry, &mii_devs) {
+		dev = list_entry (entry, struct mii_dev, link);
 
-		if (strcmp(devname, dev->name) == 0) {
+		if (strcmp (devname, dev->name) == 0) {
 			found_dev = 1;
-			write_ret = dev->write(devname, addr, reg, value);
+			write_ret = dev->write (devname, addr, reg, value);
 			break;
 		}
 	}
 
 	if (found_dev == 0)
-		printf("No such device: %s\n", devname);
+		printf ("No such device: %s\n", devname);
 
 	return ((found_dev) ? write_ret : 1);
 }
@@ -226,23 +227,22 @@ int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
  *
  * Print out list of registered MII capable devices.
  */
-void miiphy_listdev(void)
+void miiphy_listdev (void)
 {
 	struct list_head *entry;
 	struct mii_dev *dev;
 
-	puts("MII devices: ");
-	list_for_each(entry, &mii_devs) {
-		dev = list_entry(entry, struct mii_dev, link);
-		printf("'%s' ", dev->name);
+	puts ("MII devices: ");
+	list_for_each (entry, &mii_devs) {
+		dev = list_entry (entry, struct mii_dev, link);
+		printf ("'%s' ", dev->name);
 	}
-	puts("\n");
+	puts ("\n");
 
 	if (current_mii)
-		printf("Current device: '%s'\n", current_mii->name);
+		printf ("Current device: '%s'\n", current_mii->name);
 }
 
-
 /*****************************************************************************
  *
  * Read the OUI, manufacture's model number, and revision number.
@@ -254,9 +254,7 @@ void miiphy_listdev(void)
  * Returns:
  *   0 on success
  */
-int miiphy_info (char *devname,
-		 unsigned char addr,
-		 unsigned int *oui,
+int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
 		 unsigned char *model, unsigned char *rev)
 {
 	unsigned int reg = 0;
@@ -288,13 +286,12 @@ int miiphy_info (char *devname,
 #ifdef DEBUG
 	printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
 #endif
-	*oui   =                 ( reg >> 10);
-	*model = (unsigned char) ((reg >>  4) & 0x0000003F);
-	*rev   = (unsigned char) ( reg        & 0x0000000F);
+	*oui = (reg >> 10);
+	*model = (unsigned char)((reg >> 4) & 0x0000003F);
+	*rev = (unsigned char)(reg & 0x0000000F);
 	return (0);
 }
 
-
 /*****************************************************************************
  *
  * Reset the PHY.
@@ -345,104 +342,138 @@ int miiphy_reset (char *devname, unsigned char addr)
 	return (0);
 }
 
-
 /*****************************************************************************
  *
- * Determine the ethernet speed (10/100).
+ * Determine the ethernet speed (10/100/1000).  Return 10 on error.
  */
 int miiphy_speed (char *devname, unsigned char addr)
 {
-	unsigned short reg;
+	u16 bmcr, anlpar;
 
 #if defined(CONFIG_PHY_GIGE)
-	if (miiphy_read (devname, addr, PHY_1000BTSR, &reg)) {
-		printf ("PHY 1000BT Status read failed\n");
-	} else {
-		if (reg != 0xFFFF) {
-			if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
-				return (_1000BASET);
-			}
-		}
+	u16 btsr;
+
+	/*
+	 * Check for 1000BASE-X.  If it is supported, then assume that the speed
+	 * is 1000.
+	 */
+	if (miiphy_is_1000base_x (devname, addr)) {
+		return _1000BASET;
+	}
+	/*
+	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
+	 */
+	/* Check for 1000BASE-T. */
+	if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
+		printf ("PHY 1000BT status");
+		goto miiphy_read_failed;
+	}
+	if (btsr != 0xFFFF &&
+	    (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) {
+		return _1000BASET;
 	}
 #endif /* CONFIG_PHY_GIGE */
 
 	/* Check Basic Management Control Register first. */
-	if (miiphy_read (devname, addr, PHY_BMCR, &reg)) {
-		puts ("PHY speed read failed, assuming 10bT\n");
-		return (_10BASET);
+	if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
+		printf ("PHY speed");
+		goto miiphy_read_failed;
 	}
 	/* Check if auto-negotiation is on. */
-	if ((reg & PHY_BMCR_AUTON) != 0) {
+	if (bmcr & PHY_BMCR_AUTON) {
 		/* Get auto-negotiation results. */
-		if (miiphy_read (devname, addr, PHY_ANLPAR, &reg)) {
-			puts ("PHY AN speed read failed, assuming 10bT\n");
-			return (_10BASET);
-		}
-		if ((reg & PHY_ANLPAR_100) != 0) {
-			return (_100BASET);
-		} else {
-			return (_10BASET);
+		if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
+			printf ("PHY AN speed");
+			goto miiphy_read_failed;
 		}
+		return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET;
 	}
 	/* Get speed from basic control settings. */
-	else if (reg & PHY_BMCR_100MB) {
-		return (_100BASET);
-	} else {
-		return (_10BASET);
-	}
+	return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
 
+      miiphy_read_failed:
+	printf (" read failed, assuming 10BASE-T\n");
+	return _10BASET;
 }
 
-
 /*****************************************************************************
  *
- * Determine full/half duplex.
+ * Determine full/half duplex.  Return half on error.
  */
 int miiphy_duplex (char *devname, unsigned char addr)
 {
-	unsigned short reg;
+	u16 bmcr, anlpar;
 
 #if defined(CONFIG_PHY_GIGE)
-	if (miiphy_read (devname, addr, PHY_1000BTSR, &reg)) {
-		printf ("PHY 1000BT Status read failed\n");
-	} else {
-		if ( (reg != 0xFFFF) &&
-		     (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
-			if ((reg & PHY_1000BTSR_1000FD) !=0) {
-				return (FULL);
-			} else {
-				return (HALF);
-			}
+	u16 btsr;
+
+	/* Check for 1000BASE-X. */
+	if (miiphy_is_1000base_x (devname, addr)) {
+		/* 1000BASE-X */
+		if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
+			printf ("1000BASE-X PHY AN duplex");
+			goto miiphy_read_failed;
+		}
+	}
+	/*
+	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
+	 */
+	/* Check for 1000BASE-T. */
+	if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
+		printf ("PHY 1000BT status");
+		goto miiphy_read_failed;
+	}
+	if (btsr != 0xFFFF) {
+		if (btsr & PHY_1000BTSR_1000FD) {
+			return FULL;
+		} else if (btsr & PHY_1000BTSR_1000HD) {
+			return HALF;
 		}
 	}
 #endif /* CONFIG_PHY_GIGE */
 
 	/* Check Basic Management Control Register first. */
-	if (miiphy_read (devname, addr, PHY_BMCR, &reg)) {
-		puts ("PHY duplex read failed, assuming half duplex\n");
-		return (HALF);
+	if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
+		puts ("PHY duplex");
+		goto miiphy_read_failed;
 	}
 	/* Check if auto-negotiation is on. */
-	if ((reg & PHY_BMCR_AUTON) != 0) {
+	if (bmcr & PHY_BMCR_AUTON) {
 		/* Get auto-negotiation results. */
-		if (miiphy_read (devname, addr, PHY_ANLPAR, &reg)) {
-			puts ("PHY AN duplex read failed, assuming half duplex\n");
-			return (HALF);
-		}
-
-		if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
-			return (FULL);
-		} else {
-			return (HALF);
+		if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
+			puts ("PHY AN duplex");
+			goto miiphy_read_failed;
 		}
+		return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ?
+		    FULL : HALF;
 	}
 	/* Get speed from basic control settings. */
-	else if (reg & PHY_BMCR_DPLX) {
-		return (FULL);
-	} else {
-		return (HALF);
-	}
+	return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
 
+      miiphy_read_failed:
+	printf (" read failed, assuming half duplex\n");
+	return HALF;
+}
+
+/*****************************************************************************
+ *
+ * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
+ * 1000BASE-T, or on error.
+ */
+int miiphy_is_1000base_x (char *devname, unsigned char addr)
+{
+#if defined(CONFIG_PHY_GIGE)
+	u16 exsr;
+
+	if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) {
+		printf ("PHY extended status read failed, assuming no "
+			"1000BASE-X\n");
+		return 0;
+	}
+	return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH));
+#else
+	return 0;
+#endif
 }
 
 #ifdef CFG_FAULT_ECHO_LINK_DOWN
@@ -455,7 +486,7 @@ int miiphy_link (char *devname, unsigned char addr)
 	unsigned short reg;
 
 	/* dummy read; needed to latch some phys */
-	(void)miiphy_read(devname, addr, PHY_BMSR, &reg);
+	(void)miiphy_read (devname, addr, PHY_BMSR, &reg);
 	if (miiphy_read (devname, addr, PHY_BMSR, &reg)) {
 		puts ("PHY_BMSR read failed, assuming no link\n");
 		return (0);
@@ -469,5 +500,4 @@ int miiphy_link (char *devname, unsigned char addr)
 	}
 }
 #endif
-
 #endif /* CONFIG_MII */

common/spartan2.c

@@ -516,7 +516,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 				(*fn->clk) (FALSE, TRUE, cookie);
 				CONFIG_FPGA_DELAY ();
 				/* Write data */
-				(*fn->wr) ((val < 0), TRUE, cookie);
+				(*fn->wr) ((val & 0x80), TRUE, cookie);
 				CONFIG_FPGA_DELAY ();
 				/* Assert the clock */
 				(*fn->clk) (TRUE, TRUE, cookie);

common/spartan3.c

@@ -521,7 +521,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 				(*fn->clk) (FALSE, TRUE, cookie);
 				CONFIG_FPGA_DELAY ();
 				/* Write data */
-				(*fn->wr) ((val < 0), TRUE, cookie);
+				(*fn->wr) ((val & 0x80), TRUE, cookie);
 				CONFIG_FPGA_DELAY ();
 				/* Assert the clock */
 				(*fn->clk) (TRUE, TRUE, cookie);

common/usb_kbd.c

@@ -257,7 +257,7 @@ static int usb_kbd_translate(unsigned char scancode,unsigned char modifier,int p
 		repeat_delay=REPEAT_DELAY;
 	}
 	keycode=0;
-	if((scancode>3) && (scancode<0x1d)) { /* alpha numeric values */
+	if((scancode>3) && (scancode<=0x1d)) { /* alpha numeric values */
 		keycode=scancode-4 + 0x61;
 		if(caps_lock)
 			keycode&=~CAPITAL_MASK; /* switch to capital Letters */

config.mk

@@ -69,10 +69,6 @@ PLATFORM_CPPFLAGS+= -D__ARM__
 endif
 endif
 
-ifeq ($(ARCH),blackfin)
-PLATFORM_CPPFLAGS+= -D__BLACKFIN__
-endif
-
 ifdef	ARCH
 sinclude $(TOPDIR)/$(ARCH)_config.mk	# include architecture dependend rules
 endif

cpu/arm920t/at91rm9200/usb.c

@@ -28,7 +28,7 @@
 
 #include <asm/arch/hardware.h>
 
-int usb_cpu_init()
+int usb_cpu_init(void)
 {
 	/* Enable USB host clock. */
 	*AT91C_PMC_SCER = AT91C_PMC_UHP;	/* 48MHz clock enabled for UHP */
@@ -36,7 +36,7 @@ int usb_cpu_init()
 	return 0;
 }
 
-int usb_cpu_stop()
+int usb_cpu_stop(void)
 {
 	/* Initialization failed */
 	*AT91C_PMC_PCDR = 1 << AT91C_ID_UHP;	/* Peripheral Clock Disable Register */
@@ -44,9 +44,9 @@ int usb_cpu_stop()
 	return 0;
 }
 
-int usb_cpu_init_fail()
+int usb_cpu_init_fail(void)
 {
-	usb_cpu_stop();
+	return usb_cpu_stop();
 }
 
 # endif /* CONFIG_AT91RM9200 */

cpu/mcf523x/config.mk

@@ -24,4 +24,8 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+PLATFORM_CPPFLAGS += -mcpu=5235 -fPIC
+else
 PLATFORM_CPPFLAGS += -m5307 -fPIC
+endif

cpu/mcf52x2/config.mk

@@ -24,4 +24,33 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+
+cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
+is5249=$(shell grep CONFIG_M5249 $(TOPDIR)/include/$(cfg))
+is5253=$(shell grep CONFIG_M5253 $(TOPDIR)/include/$(cfg))
+is5271=$(shell grep CONFIG_M5271 $(TOPDIR)/include/$(cfg))
+is5272=$(shell grep CONFIG_M5272 $(TOPDIR)/include/$(cfg))
+is5282=$(shell grep CONFIG_M5282 $(TOPDIR)/include/$(cfg))
+
+
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+
+ifneq (,$(findstring CONFIG_M5249,$(is5249)))
+PLATFORM_CPPFLAGS += -mcpu=5249
+endif
+ifneq (,$(findstring CONFIG_M5253,$(is5253)))
+PLATFORM_CPPFLAGS += -mcpu=5253
+endif
+ifneq (,$(findstring CONFIG_M5271,$(is5271)))
+PLATFORM_CPPFLAGS += -mcpu=5271
+endif
+ifneq (,$(findstring CONFIG_M5272,$(is5272)))
+PLATFORM_CPPFLAGS += -mcpu=5272
+endif
+ifneq (,$(findstring CONFIG_M5282,$(is5282)))
+PLATFORM_CPPFLAGS += -mcpu=5282
+endif
+
+else
 PLATFORM_CPPFLAGS += -m5307
+endif

cpu/mcf52x2/start.S

@@ -58,7 +58,7 @@ _vectors:
 .long	0x00000000		/* Flash offset is 0 until we setup CS0 */
 #if defined(CONFIG_R5200)
 .long	0x400
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
 .long	_start - TEXT_BASE
 #else
 .long	_START
@@ -177,7 +177,11 @@ _after_flashbar_copy:
 	 * therefore no VBR to set
 	 */
 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
+#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
+	move.l	#CFG_INT_FLASH_BASE, %d0
+#else
 	move.l	#CFG_FLASH_BASE, %d0
+#endif
 	movec	%d0, %VBR
 #endif
 

cpu/mcf532x/config.mk

@@ -24,4 +24,8 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+PLATFORM_CPPFLAGS += -mcpu=5329 -fPIC
+else
 PLATFORM_CPPFLAGS += -m5307 -fPIC
+endif

cpu/mcf532x/cpu.c

@@ -35,14 +35,10 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
-	volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+	volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 
-	wdp->cr = 0;
 	udelay(1000);
-
-	/* enable watchdog, set timeout to 0 and wait */
-	wdp->cr = WTM_WCR_EN;
-	while (1) ;
+	rcm->rcr |= RCM_RCR_SOFTRST;
 
 	/* we don't return! */
 	return 0;

cpu/mcf532x/start.S

@@ -131,7 +131,7 @@ _start:
 	movec	%d0, %VBR
 
 	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR0
+	movec	%d0, %RAMBAR1
 
 	/* invalidate and disable cache */
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
@@ -268,7 +268,7 @@ _int_handler:
 icache_enable:
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0
+	move.l	#(CFG_SDRAM_BASE + 0x1c000), %d0
 	movec	%d0, %ACR0			/* Enable cache */
 
 	move.l	#0x80000200, %d0		/* Setup cache mask */

cpu/mcf5445x/config.mk

@@ -24,4 +24,8 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+PLATFORM_CPPFLAGS += -mcpu=54455 -fPIC
+else
 PLATFORM_CPPFLAGS += -m5407 -fPIC
+endif

cpu/mcf5445x/start.S

@@ -136,7 +136,7 @@ _start:
 	movec	%d0, %VBR
 
 	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR0
+	movec	%d0, %RAMBAR1
 
 	/* initialize general use internal ram */
 	move.l #0, %d0

cpu/mips/config.mk

@@ -35,6 +35,6 @@ else
 ENDIANNESS = -EB
 endif
 
-MIPSFLAGS += $(ENDIANNESS) -mabicalls
+MIPSFLAGS += $(ENDIANNESS)
 
 PLATFORM_CPPFLAGS += $(MIPSFLAGS)

cpu/mips/start.S

@@ -234,11 +234,11 @@ reset:
 	li	t0, CONF_CM_UNCACHED
 	mtc0	t0, CP0_CONFIG
 
-	/* Initialize GOT pointer.
+	/* Initialize $gp.
 	*/
 	bal     1f
 	nop
-	.word   _GLOBAL_OFFSET_TABLE_
+	.word	_gp
 	1:
 	move    gp, ra
 	lw      t1, 0(ra)
@@ -306,9 +306,9 @@ relocate_code:
 	move	t1, a2
 
 	/*
-	 * Fix GOT pointer:
+	 * Fix $gp:
 	 *
-	 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
+	 * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address
 	 */
 	move	t6, gp
 	sub	gp, CFG_MONITOR_BASE
@@ -341,15 +341,22 @@ relocate_code:
 	j	t0
 	nop
 
+	.gpword	_GLOBAL_OFFSET_TABLE_	/* _GLOBAL_OFFSET_TABLE_ - _gp	*/
 	.word	uboot_end_data
 	.word	uboot_end
 	.word	num_got_entries
 
 in_ram:
-	/* Now we want to update GOT.
+	/*
+	 * Now we want to update GOT.
+	 *
+	 * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object
+	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)	/* t3 <-- num_got_entries	*/
-	addi	t4, gp, 8	/* Skipping first two entries.	*/
+	lw	t4, -16(t0)	/* t4 <-- (_GLOBAL_OFFSET_TABLE_ - _gp)	*/
+	add	t4, t4, gp	/* t4 now holds _GLOBAL_OFFSET_TABLE_	*/
+	addi	t4, t4, 8	/* Skipping first two entries.	*/
 	li	t2, 2
 1:
 	lw	t1, 0(t4)

cpu/mpc512x/config.mk

@@ -19,7 +19,7 @@
 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 # MA 02111-1307 USA
 #
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
 			-ffixed-r2 -ffixed-r29 -msoft-float -mcpu=603e

cpu/mpc5xx/config.mk

@@ -28,7 +28,7 @@
 #
 
 
-PLATFORM_RELFLAGS += 	-fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += 	-fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS +=	-DCONFIG_5xx -ffixed-r2 -ffixed-r29 -mpowerpc -msoft-float
 

cpu/mpc5xx/u-boot.lds

@@ -59,6 +59,7 @@ SECTIONS
     cpu/mpc5xx/start.o	(.text)
 
     *(.text)
+    *(.fixup)
     *(.got1)
   }
   _etext = .;

cpu/mpc5xxx/config.mk

@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 -ffixed-r29 \
 		     -mstring -mcpu=603e -mmultiple

cpu/mpc5xxx/u-boot-customlayout.lds

@@ -66,6 +66,7 @@ SECTIONS
     common/environment.o        (.ppcenv)
 
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

cpu/mpc5xxx/u-boot.lds

@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc5xxx/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

cpu/mpc8220/config.mk

@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 -ffixed-r29 \
 		     -mstring -mcpu=603e -mmultiple

cpu/mpc8220/u-boot.lds

@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc8220/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

cpu/mpc824x/config.mk

@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -ffixed-r29 -mstring -mcpu=603e -msoft-float
 

cpu/mpc824x/interrupts.c

@@ -86,7 +86,7 @@ void irq_free_handler (int vec)
  vga?
  */
 
-void timer_interrupt_cpu (struct pt_regs *regs, ulong timestamp)
+void timer_interrupt_cpu (struct pt_regs *regs)
 {
 	/* nothing to do here */
 	return;

cpu/mpc824x/u-boot.lds

@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc824x/start.o		(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

cpu/mpc8260/config.mk

@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 -ffixed-r29 \
 		     -mstring -mcpu=603e -mmultiple

cpu/mpc8260/cpu.c

@@ -47,6 +47,11 @@
 #include <asm/processor.h>
 #include <asm/cpm_8260.h>
 
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <libfdt_env.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_GET_CPU_STR_F)
@@ -294,3 +299,36 @@ void watchdog_reset (void)
 #endif /* CONFIG_WATCHDOG */
 
 /* ------------------------------------------------------------------------- */
+#if defined(CONFIG_OF_LIBFDT)
+static void do_fixup(void *fdt, const char *node, const char *prop,
+			const void *val, int len, int create)
+{
+#if defined(DEBUG)
+	int i;
+	debug("Updating property '%s/%s' = ", node, prop);
+	for (i = 0; i < len; i++)
+		debug(" %.2x", *(u8*)(val+i));
+	debug("\n");
+#endif
+	int rc = fdt_find_and_setprop(fdt, node, prop, val, len, create);
+	if (rc)
+		printf("Unable to update property %s:%s, err=%s\n",
+			node, prop, fdt_strerror(rc));
+}
+
+static void do_fixup_u32(void *fdt, const char *node, const char *prop,
+			 u32 val, int create)
+{
+	val = cpu_to_fdt32(val);
+	do_fixup(fdt, node, prop, &val, sizeof(val), create);
+}
+
+void ft_cpu_setup (void *blob, bd_t *bd)
+{
+	char * cpu_path = "/cpus/" OF_CPU;
+
+	do_fixup_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
+	do_fixup_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
+	do_fixup_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
+}
+#endif /* CONFIG_OF_LIBFDT */

cpu/mpc8260/u-boot.lds

@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc8260/start.o		(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

cpu/mpc83xx/config.mk

@@ -20,7 +20,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \
 			-ffixed-r2 -ffixed-r29 -msoft-float

cpu/mpc83xx/u-boot.lds

@@ -52,6 +52,7 @@ SECTIONS
   {
     cpu/mpc83xx/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)

cpu/mpc85xx/cpu.c

@@ -163,7 +163,12 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 	 * Initiate hard reset in debug control register DBCR0
 	 * Make sure MSR[DE] = 1
 	 */
-		unsigned long val;
+		unsigned long val, msr;
+
+		msr = mfmsr ();
+		msr |= MSR_DE;
+		mtmsr (msr);
+
 		val = mfspr(DBCR0);
 		val |= 0x70000000;
 		mtspr(DBCR0,val);

cpu/mpc85xx/start.S

@@ -218,6 +218,8 @@ _start_e500:
 	bdnz	0b
 
 	/* Clear and set up some registers. */
+	li      r0,0
+	mtmsr   r0
 	li	r0,0x0000
 	lis	r1,0xffff
 	mtspr	DEC,r0			/* prevent dec exceptions */
@@ -266,18 +268,17 @@ _start_e500:
 	 */
 	lis	r3,CFG_INIT_RAM_ADDR@h
 	ori	r3,r3,CFG_INIT_RAM_ADDR@l
-	li	r2,512 /* 512*32=16K */
+	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
 	mtctr	r2
 	li	r0,0
 1:
 	dcbz	r0,r3
 	dcbtls	0,r0,r3
-	addi	r3,r3,32
+	addi	r3,r3,CFG_CACHELINE_SIZE
 	bdnz	1b
 
 	/* Jump out the last 4K page and continue to 'normal' start */
 #ifdef CFG_RAMBOOT
-	bl	3f
 	b	_start_cont
 #else
 	/* Calculate absolute address in FLASH and jump there		*/
@@ -286,15 +287,9 @@ _start_e500:
 	ori	r3,r3,CFG_MONITOR_BASE@l
 	addi	r3,r3,_start_cont - _start + _START_OFFSET
 	mtlr	r3
+	blr
 #endif
 
-3:	li	r0,0
-	mtspr	SRR1,r0		/* Keep things disabled for now */
-	mflr	r1
-	mtspr	SRR0,r1
-	rfi
-	isync
-
 	.text
 	.globl	_start
 _start:
@@ -701,6 +696,7 @@ in8:
 	.globl	out8
 out8:
 	stb	r4,0x0000(r3)
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -710,6 +706,7 @@ out8:
 	.globl	out16
 out16:
 	sth	r4,0x0000(r3)
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -719,6 +716,7 @@ out16:
 	.globl	out16r
 out16r:
 	sthbrx	r4,r0,r3
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -728,6 +726,7 @@ out16r:
 	.globl	out32
 out32:
 	stw	r4,0x0000(r3)
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -737,6 +736,7 @@ out32:
 	.globl	out32r
 out32r:
 	stwbrx	r4,r0,r3
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -1061,11 +1061,11 @@ unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
 	lis	r3,(CFG_INIT_RAM_ADDR & ~31)@h
 	ori	r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-	li	r4,512
+	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
 	mtctr	r4
 1:	icbi	r0,r3
 	dcbi	r0,r3
-	addi	r3,r3,32
+	addi	r3,r3,CFG_CACHELINE_SIZE
 	bdnz	1b
 	sync			/* Wait for all icbi to complete on bus */
 	isync

cpu/mpc86xx/cpu.c

@@ -120,7 +120,7 @@ checkcpu(void)
 static inline void
 soft_restart(unsigned long addr)
 {
-#ifndef CONFIG_MPC8641HPCN
+#if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
 
 	/*
 	 * SRR0 has system reset vector, SRR1 has default MSR value
@@ -148,7 +148,7 @@ soft_restart(unsigned long addr)
 void
 do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-#ifndef CONFIG_MPC8641HPCN
+#if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
 
 #ifdef CFG_RESET_ADDRESS
 	ulong addr = CFG_RESET_ADDRESS;

cpu/mpc86xx/spd_sdram.c

@@ -948,19 +948,25 @@ unsigned int enable_ddr(unsigned int ddr_num)
 	 * Read both dimm slots and decide whether
 	 * or not to enable this controller.
 	 */
-	memset((void *)&spd1,0,sizeof(spd1));
-	memset((void *)&spd2,0,sizeof(spd2));
+	memset((void *)&spd1, 0, sizeof(spd1));
+	memset((void *)&spd2, 0, sizeof(spd2));
 
 	if (ddr_num == 1) {
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS1,
 			     0, 1, (uchar *) &spd1, sizeof(spd1));
+#if defined(SPD_EEPROM_ADDRESS2)
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS2,
 			     0, 1, (uchar *) &spd2, sizeof(spd2));
+#endif
 	} else {
+#if defined(SPD_EEPROM_ADDRESS3)
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS3,
 			     0, 1, (uchar *) &spd1, sizeof(spd1));
+#endif
+#if defined(SPD_EEPROM_ADDRESS4)
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS4,
 			     0, 1, (uchar *) &spd2, sizeof(spd2));
+#endif
 	}
 
 	/*
@@ -1105,21 +1111,25 @@ spd_sdram(void)
 {
 	int memsize_ddr1_dimm1 = 0;
 	int memsize_ddr1_dimm2 = 0;
+	int memsize_ddr1 = 0;
+	unsigned int law_size_ddr1;
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
+	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
+
+#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
 	int memsize_ddr2_dimm1 = 0;
 	int memsize_ddr2_dimm2 = 0;
-	int memsize_total = 0;
-	int memsize_ddr1 = 0;
 	int memsize_ddr2 = 0;
+	unsigned int law_size_ddr2;
+#endif
+
 	unsigned int ddr1_enabled = 0;
 	unsigned int ddr2_enabled = 0;
-	unsigned int law_size_ddr1;
-	unsigned int law_size_ddr2;
-	volatile immap_t *immap = (immap_t *)CFG_IMMR;
-	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
+	int memsize_total = 0;
 
 #ifdef CONFIG_DDR_INTERLEAVE
 	unsigned int law_size_interleaved;
-	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
 	volatile ccsr_ddr_t *ddr2 = &immap->im_ddr2;
 
 	memsize_ddr1_dimm1 = spd_init(SPD_EEPROM_ADDRESS1,
@@ -1194,9 +1204,11 @@ spd_sdram(void)
 				      (unsigned int)memsize_total * 1024*1024);
 	memsize_total += memsize_ddr1_dimm1;
 
+#if defined(SPD_EEPROM_ADDRESS2)
 	memsize_ddr1_dimm2 = spd_init(SPD_EEPROM_ADDRESS2,
 				      1, 2,
 				      (unsigned int)memsize_total * 1024*1024);
+#endif
 	memsize_total += memsize_ddr1_dimm2;
 
 	/*
@@ -1258,10 +1270,12 @@ spd_sdram(void)
 		debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8);
 		debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8);
 	}
+
+	debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2);
+
 #endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */
 
-	debug("\nMemory sizes are DDR1 = 0x%08lx, DDR2 = 0x%08lx\n",
-	      memsize_ddr1, memsize_ddr2);
+	debug("\nMemory size of DDR1 = 0x%08lx\n", memsize_ddr1);
 
 	/*
 	 * If neither DDR controller is enabled return 0.

cpu/pxa/config.mk

@@ -25,8 +25,7 @@
 PLATFORM_RELFLAGS += -fno-strict-aliasing  -fno-common -ffixed-r8 \
 	-msoft-float
 
-#PLATFORM_CPPFLAGS += -mapcs-32 -march=armv4 -mtune=strongarm1100
-PLATFORM_CPPFLAGS += -march=armv5 -mtune=xscale
+PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale
 # =========================================================================
 #
 # Supply options according to compiler version

cpu/pxa/serial.c

@@ -35,17 +35,17 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define FFUART	0
-#define BTUART	1
-#define STUART	2
+#define FFUART_INDEX	0
+#define BTUART_INDEX	1
+#define STUART_INDEX	2
 
 #ifndef CONFIG_SERIAL_MULTI
 #if defined (CONFIG_FFUART)
-#define UART_INDEX	FFUART
+#define UART_INDEX	FFUART_INDEX
 #elif defined (CONFIG_BTUART)
-#define UART_INDEX	BTUART
+#define UART_INDEX	BTUART_INDEX
 #elif defined (CONFIG_STUART)
-#define UART_INDEX	STUART
+#define UART_INDEX	STUART_INDEX
 #else
 #error "Bad: you didn't configure serial ..."
 #endif
@@ -71,7 +71,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
 		hang ();
 
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 #ifdef CONFIG_CPU_MONAHANS
 			CKENA |= CKENA_22_FFUART;
 #else
@@ -90,7 +90,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
 			FFIER = IER_UUE;	/* Enable FFUART */
 		break;
 
-		case BTUART:
+		case BTUART_INDEX:
 #ifdef CONFIG_CPU_MONAHANS
 			CKENA |= CKENA_21_BTUART;
 #else
@@ -110,7 +110,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
 
 		break;
 
-		case STUART:
+		case STUART_INDEX:
 #ifdef CONFIG_CPU_MONAHANS
 			CKENA |= CKENA_23_STUART;
 #else
@@ -154,20 +154,20 @@ int pxa_init_dev (unsigned int uart_index)
 void pxa_putc_dev (unsigned int uart_index,const char c)
 {
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 		/* wait for room in the tx FIFO on FFUART */
 			while ((FFLSR & LSR_TEMT) == 0)
 				WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			FFTHR = c;
 			break;
 
-		case BTUART:
+		case BTUART_INDEX:
 			while ((BTLSR & LSR_TEMT ) == 0 )
 				WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			BTTHR = c;
 			break;
 
-		case STUART:
+		case STUART_INDEX:
 			while ((STLSR & LSR_TEMT ) == 0 )
 				WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			STTHR = c;
@@ -187,11 +187,11 @@ void pxa_putc_dev (unsigned int uart_index,const char c)
 int pxa_tstc_dev (unsigned int uart_index)
 {
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 			return FFLSR & LSR_DR;
-		case BTUART:
+		case BTUART_INDEX:
 			return BTLSR & LSR_DR;
-		case STUART:
+		case STUART_INDEX:
 			return STLSR & LSR_DR;
 	}
 	return -1;
@@ -205,16 +205,16 @@ int pxa_tstc_dev (unsigned int uart_index)
 int pxa_getc_dev (unsigned int uart_index)
 {
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 			while (!(FFLSR & LSR_DR))
 			WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			return (char) FFRBR & 0xff;
 
-		case BTUART:
+		case BTUART_INDEX:
 			while (!(BTLSR & LSR_DR))
 			WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			return (char) BTRBR & 0xff;
-		case STUART:
+		case STUART_INDEX:
 			while (!(STLSR & LSR_DR))
 			WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			return (char) STRBR & 0xff;
@@ -233,32 +233,32 @@ pxa_puts_dev (unsigned int uart_index,const char *s)
 #if defined (CONFIG_FFUART)
 static int ffuart_init(void)
 {
-	return pxa_init_dev(FFUART);
+	return pxa_init_dev(FFUART_INDEX);
 }
 
 static void ffuart_setbrg(void)
 {
-	return pxa_setbrg_dev(FFUART);
+	return pxa_setbrg_dev(FFUART_INDEX);
 }
 
 static void ffuart_putc(const char c)
 {
-	return pxa_putc_dev(FFUART,c);
+	return pxa_putc_dev(FFUART_INDEX,c);
 }
 
 static void ffuart_puts(const char *s)
 {
-	return pxa_puts_dev(FFUART,s);
+	return pxa_puts_dev(FFUART_INDEX,s);
 }
 
 static int ffuart_getc(void)
 {
-	return pxa_getc_dev(FFUART);
+	return pxa_getc_dev(FFUART_INDEX);
 }
 
 static int ffuart_tstc(void)
 {
-	return pxa_tstc_dev(FFUART);
+	return pxa_tstc_dev(FFUART_INDEX);
 }
 
 struct serial_device serial_ffuart_device =
@@ -277,32 +277,32 @@ struct serial_device serial_ffuart_device =
 #if defined (CONFIG_BTUART)
 static int btuart_init(void)
 {
-	return pxa_init_dev(BTUART);
+	return pxa_init_dev(BTUART_INDEX);
 }
 
 static void btuart_setbrg(void)
 {
-	return pxa_setbrg_dev(BTUART);
+	return pxa_setbrg_dev(BTUART_INDEX);
 }
 
 static void btuart_putc(const char c)
 {
-	return pxa_putc_dev(BTUART,c);
+	return pxa_putc_dev(BTUART_INDEX,c);
 }
 
 static void btuart_puts(const char *s)
 {
-	return pxa_puts_dev(BTUART,s);
+	return pxa_puts_dev(BTUART_INDEX,s);
 }
 
 static int btuart_getc(void)
 {
-	return pxa_getc_dev(BTUART);
+	return pxa_getc_dev(BTUART_INDEX);
 }
 
 static int btuart_tstc(void)
 {
-	return pxa_tstc_dev(BTUART);
+	return pxa_tstc_dev(BTUART_INDEX);
 }
 
 struct serial_device serial_btuart_device =
@@ -321,32 +321,32 @@ struct serial_device serial_btuart_device =
 #if defined (CONFIG_STUART)
 static int stuart_init(void)
 {
-	return pxa_init_dev(STUART);
+	return pxa_init_dev(STUART_INDEX);
 }
 
 static void stuart_setbrg(void)
 {
-	return pxa_setbrg_dev(STUART);
+	return pxa_setbrg_dev(STUART_INDEX);
 }
 
 static void stuart_putc(const char c)
 {
-	return pxa_putc_dev(STUART,c);
+	return pxa_putc_dev(STUART_INDEX,c);
 }
 
 static void stuart_puts(const char *s)
 {
-	return pxa_puts_dev(STUART,s);
+	return pxa_puts_dev(STUART_INDEX,s);
 }
 
 static int stuart_getc(void)
 {
-	return pxa_getc_dev(STUART);
+	return pxa_getc_dev(STUART_INDEX);
 }
 
 static int stuart_tstc(void)
 {
-	return pxa_tstc_dev(STUART);
+	return pxa_tstc_dev(STUART_INDEX);
 }
 
 struct serial_device serial_stuart_device =

cpu/pxa/start.S

@@ -166,13 +166,17 @@ _start_armboot: .word start_armboot
 /*									    */
 /****************************************************************************/
 /* mk@tbd: Fix this! */
-#ifdef CONFIG_CPU_MONAHANS
+#if defined(CONFIG_PXA250) || defined(CONFIG_CPU_MONAHANS)
 #undef ICMR
 #undef OSMR3
 #undef OSCR
 #undef OWER
 #undef OIER
 #endif
+#ifdef CONFIG_PXA250
+#undef RCSR
+#undef CCCR
+#endif
 
 /* Interrupt-Controller base address					    */
 IC_BASE:	   .word	   0x40d00000

cpu/pxa/usb.c

@@ -27,8 +27,9 @@
 # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
 
 #include <asm/arch/pxa-regs.h>
+#include <usb.h>
 
-int usb_cpu_init()
+int usb_cpu_init(void)
 {
 #if defined(CONFIG_CPU_MONAHANS)
 	/* Enable USB host clock. */
@@ -65,12 +66,28 @@ int usb_cpu_init()
 	return 0;
 }
 
-int usb_cpu_stop()
+int usb_cpu_stop(void)
 {
+	UHCHR |= UHCHR_FHR;
+	udelay(11);
+	UHCHR &= ~UHCHR_FHR;
+
+	UHCCOMS |= 1;
+	udelay(10);
+
+#if defined(CONFIG_CPU_MONAHANS)
+	UHCHR |= UHCHR_SSEP0;
+#endif
+#if defined(CONFIG_PXA27X)
+	UHCHR |= UHCHR_SSEP2;
+#endif
+	UHCHR |= UHCHR_SSEP1;
+	UHCHR |= UHCHR_SSE;
+
 	return 0;
 }
 
-int usb_cpu_init_fail()
+int usb_cpu_init_fail(void)
 {
 	return 0;
 }

drivers/Makefile

@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2000-2006
+# (C) Copyright 2000-2007
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -27,34 +27,33 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)libdrivers.a
 
-COBJS	= 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o atmel_usart.o \
+COBJS	= 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o \
+	  ati_radeon_fb.o atmel_usart.o \
 	  bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
 	  cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
-	  e1000.o eepro100.o enc28j60.o \
-	  i8042.o inca-ip_sw.o isp116x-hcd.o keyboard.o \
-	  lan91c96.o macb.o \
+	  ds1722.o e1000.o eepro100.o enc28j60.o \
+	  fsl_i2c.o fsl_pci_init.o \
+	  i8042.o inca-ip_sw.o isp116x-hcd.o \
+	  keyboard.o ks8695eth.o \
+	  lan91c96.o macb.o mpc8xx_pcmcia.o mw_eeprom.o \
 	  natsemi.o ne2000.o netarm_eth.o netconsole.o \
 	  ns16550.o ns8382x.o ns87308.o ns7520_eth.o omap1510_i2c.o \
-	  omap24xx_i2c.o pci.o pci_auto.o pci_indirect.o \
-	  pcnet.o plb2800_eth.o \
-	  ps2ser.o ps2mult.o pc_keyb.o \
-	  rtl8019.o rtl8139.o rtl8169.o \
+	  omap24xx_i2c.o pc_keyb.o \
+	  pci.o pci_auto.o pci_indirect.o \
+	  pcnet.o plb2800_eth.o ps2ser.o ps2mult.o pxa_pcmcia.o \
+	  rpx_pcmcia.o rtl8019.o rtl8139.o rtl8169.o uli526x.o\
 	  s3c4510b_eth.o s3c4510b_uart.o \
 	  sed13806.o sed156x.o \
 	  serial.o serial_max3100.o \
-	  serial_pl010.o serial_pl011.o serial_xuartlite.o \
+	  serial_xuartlite.o \
 	  sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
 	  status_led.o sym53c8xx.o systemace.o ahci.o \
-	  ti_pci1410a.o tigon3.o tsec.o \
+	  ti_pci1410a.o tigon3.o tqm8xx_pcmcia.o tsec.o \
 	  tsi108_eth.o tsi108_i2c.o tsi108_pci.o \
 	  usb_ohci.o \
 	  usbdcore.o usbdcore_ep0.o usbdcore_mpc8xx.o usbdcore_omap1510.o \
 	  usbtty.o \
-	  videomodes.o w83c553f.o \
-	  ks8695eth.o \
-	  pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o	\
-	  rpx_pcmcia.o \
-	  fsl_i2c.o fsl_pci_init.o ati_radeon_fb.o
+	  videomodes.o w83c553f.o
 
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

drivers/ds1722.c

@@ -1,10 +1,10 @@
 
 #include <common.h>
 
-#include <ssi.h>
-
 #ifdef CONFIG_DS1722
 
+#include <ssi.h>
+
 static void ds1722_select(int dev)
 {
 	ssi_set_interface(4096, 0, 0, 0);

drivers/fsl_pci_init.c

@@ -54,6 +54,7 @@ fsl_pci_init(struct pci_controller *hose)
 	u8 temp8;
 	int r;
 	int bridge;
+	int inbound = 0;
 	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) hose->cfg_addr;
 	pci_dev_t dev = PCI_BDF(busno,0,0);
 
@@ -74,6 +75,7 @@ fsl_pci_init(struct pci_controller *hose)
 				PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP |
 				(__ilog2(hose->regions[r].size) - 1);
 			pi++;
+			inbound = hose->regions[r].size > 0;
 		} else { /* Outbound */
 			po->powbar = (hose->regions[r].phys_start >> 12) & 0x000fffff;
 			po->potar = (hose->regions[r].bus_start >> 12) & 0x000fffff;
@@ -138,6 +140,12 @@ fsl_pci_init(struct pci_controller *hose)
 	pciauto_setup_device(hose, dev, 0, hose->pci_mem,
 			     hose->pci_prefetch, hose->pci_io);
 
+	if (inbound) {
+		pci_hose_read_config_word(hose, dev, PCI_COMMAND, &temp16);
+		pci_hose_write_config_word(hose, dev, PCI_COMMAND,
+					   temp16 | PCI_COMMAND_MEMORY);
+	}
+
 #ifndef CONFIG_PCI_NOSCAN
 	printf ("               Scanning PCI bus %02x\n", hose->current_busno);
 	hose->last_busno = pci_hose_scan_bus(hose,hose->current_busno);

drivers/isp116x-hcd.c

@@ -113,9 +113,9 @@ static const char hcd_name[] = "isp116x-hcd";
 
 struct isp116x isp116x_dev;
 struct isp116x_platform_data isp116x_board;
-int got_rhsc = 0;		/* root hub status change */
+static int got_rhsc;		/* root hub status change */
 struct usb_device *devgone;	/* device which was disconnected */
-int rh_devnum = 0;		/* address of Root Hub endpoint */
+static int rh_devnum;		/* address of Root Hub endpoint */
 
 /* ------------------------------------------------------------------------- */
 
@@ -522,11 +522,13 @@ static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
 		done += PTD_GET_LEN(&ptd[i]);
 
 		cc = PTD_GET_CC(&ptd[i]);
-		if (cc == TD_DATAUNDERRUN) {	/* underrun is no error... */
-			DBG("allowed data underrun");
-			cc = TD_CC_NOERROR;
-		}
-		if (cc != TD_CC_NOERROR && ret == TD_CC_NOERROR)
+
+		/* Data underrun means basically that we had more buffer space than
+		 * the function had data. It is perfectly normal but upper levels have
+		 * to know how much we actually transferred.
+		 */
+		if (cc == TD_NOTACCESSED ||
+				(cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
 			ret = cc;
 	}
 
@@ -592,11 +594,19 @@ static int isp116x_interrupt(struct isp116x *isp116x)
 	return ret;
 }
 
-#define PTD_NUM			64	/* it should be enougth... */
-struct ptd ptd[PTD_NUM];
+/* With one PTD we can transfer almost 1K in one go;
+ * HC does the splitting into endpoint digestible transactions
+ */
+struct ptd ptd[1];
+
 static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
 {
-	return min(PTD_NUM * usb_maxpacket(dev, pipe), PTD_NUM * 16);
+	unsigned mpck = usb_maxpacket(dev, pipe);
+
+	/* One PTD can transfer 1023 bytes but try to always
+	 * transfer multiples of endpoint buffer size
+	 */
+	return 1023 / mpck * mpck;
 }
 
 /* Do an USB transfer
@@ -610,13 +620,21 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
 	int max = usb_maxpacket(dev, pipe);
 	int dir_out = usb_pipeout(pipe);
 	int speed_low = usb_pipeslow(pipe);
-	int i, done, stat, timeout, cc;
-	int retries = 10;
+	int i, done = 0, stat, timeout, cc;
+
+	/* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
+	int retries = 500;
 
 	DBG("------------------------------------------------");
 	dump_msg(dev, pipe, buffer, len, "SUBMIT");
 	DBG("------------------------------------------------");
 
+	if (len >= 1024) {
+		ERR("Too big job");
+		dev->status = USB_ST_CRC_ERR;
+		return -1;
+	}
+
 	if (isp116x->disabled) {
 		ERR("EPIPE");
 		dev->status = USB_ST_CRC_ERR;
@@ -653,29 +671,15 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
 	isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
 
 	/* Prepare the PTD data */
-	done = 0;
-	i = 0;
-	do {
-		ptd[i].count = PTD_CC_MSK | PTD_ACTIVE_MSK |
-		    PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
-		ptd[i].mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum);
-		ptd[i].len = PTD_LEN(max > len - done ? len - done : max) |
-		    PTD_DIR(dir);
-		ptd[i].faddr = PTD_FA(usb_pipedevice(pipe));
-
-		usb_dotoggle(dev, epnum, dir_out);
-		done += PTD_GET_LEN(&ptd[i]);
-		i++;
-		if (i >= PTD_NUM) {
-			ERR("****** Cannot pack buffer! ******");
-			dev->status = USB_ST_BUF_ERR;
-			return -1;
-		}
-	} while (done < len);
-	ptd[i - 1].mps |= PTD_LAST_MSK;
+	ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
+		PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
+	ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
+	ptd->len = PTD_LEN(len) | PTD_DIR(dir);
+	ptd->faddr = PTD_FA(usb_pipedevice(pipe));
 
+retry_same:
 	/* Pack data into FIFO ram */
-	pack_fifo(isp116x, dev, pipe, ptd, i, buffer, len);
+	pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
 #ifdef EXTRA_DELAY
 	wait_ms(EXTRA_DELAY);
 #endif
@@ -738,17 +742,42 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
 	}
 
 	/* Unpack data from FIFO ram */
-	cc = unpack_fifo(isp116x, dev, pipe, ptd, i, buffer, len);
+	cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
 
-	/* Mmm... sometime we get 0x0f as cc which is a non sense!
-	 * Just retry the transfer...
+	i = PTD_GET_COUNT(ptd);
+	done += i;
+	buffer += i;
+	len -= i;
+
+	/* There was some kind of real problem; Prepare the PTD again
+	 * and retry from the failed transaction on
 	 */
-	if (cc == 0x0f && retries-- > 0) {
-		usb_dotoggle(dev, epnum, dir_out);
-		goto retry;
+	if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
+		if (retries >= 100) {
+			retries -= 100;
+			/* The chip will have toggled the toggle bit for the failed
+			 * transaction too. We have to toggle it back.
+			 */
+			usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
+			goto retry;
+		}
+	}
+	/* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
+	 * the transactions from the first on for the whole frame. It may be busy and we retry
+	 * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
+	 * PTD didn't make it because the function was busy or the frame ended before the PTD
+	 * finished. We prepare the rest of the data and try again.
+	 */
+	else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
+		if (retries) {
+			--retries;
+			if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
+			usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
+			goto retry;
+		}
 	}
 
-	if (cc != TD_CC_NOERROR) {
+	if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
 		DBG("****** completition code error %x ******", cc);
 		switch (cc) {
 		case TD_CC_BITSTUFFING:
@@ -766,6 +795,7 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
 		}
 		return -cc;
 	}
+	else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
 
 	dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
 
@@ -1369,6 +1399,8 @@ int usb_lowlevel_init(void)
 
 	DBG("");
 
+	got_rhsc = rh_devnum = 0;
+
 	/* Init device registers addr */
 	isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
 	isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;

drivers/mw_eeprom.c

@@ -1,11 +1,11 @@
 /* Three-wire (MicroWire) serial eeprom driver (for 93C46 and compatibles) */
 
 #include <common.h>
-#include <ssi.h>
-
 
 #ifdef CONFIG_MW_EEPROM
 
+#include <ssi.h>
+
 /*
  * Serial EEPROM opcodes, including start bit
  */

drivers/ne2000.c

@@ -723,7 +723,8 @@ static hw_info_t hw_info[] = {
 	{ /* SuperSocket RE450T */ 0x0110, 0x00, 0xe0, 0x98, 0 },
 	{ /* Volktek NPL-402CT */ 0x0060, 0x00, 0x40, 0x05, 0 },
 	{ /* NEC PC-9801N-J12 */ 0x0ff0, 0x00, 0x00, 0x4c, 0 },
-	{ /* PCMCIA Technology OEM */ 0x01c8, 0x00, 0xa0, 0x0c, 0 }
+	{ /* PCMCIA Technology OEM */ 0x01c8, 0x00, 0xa0, 0x0c, 0 },
+	{ /* Qemu */ 0x0, 0x52, 0x54, 0x00, 0 }
 };
 
 #define NR_INFO		(sizeof(hw_info)/sizeof(hw_info_t))
@@ -745,17 +746,15 @@ static void pcnet_reset_8390(void)
 
 	PRINTK("nic base is %lx\n", nic_base);
 
-#if 1
 	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
 	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
 	n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
 	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
 	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
 	PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
-#endif
 	n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
 
-	n2k_outb(n2k_inb(nic_base + PCNET_RESET), PCNET_RESET);
+	n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
 
 	for (i = 0; i < 100; i++) {
 		if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
@@ -826,27 +825,22 @@ static hw_info_t * get_prom(void ) {
 
 /* U-boot specific routines */
 
-#define NB 5
 
 static unsigned char *pbuf = NULL;
-static int plen[NB];
-static int nrx = 0;
 
 static int pkey = -1;
+static int initialized=0;
 
 void uboot_push_packet_len(int len) {
-	PRINTK("pushed len = %d, nrx = %d\n", len, nrx);
+	PRINTK("pushed len = %d\n", len);
 	if (len>=2000) {
 		printf("NE2000: packet too big\n");
 		return;
 	}
-	if (nrx >= NB) {
-		printf("losing packets in rx\n");
-		return;
-	}
-	plen[nrx] = len;
-	dp83902a_recv(&pbuf[nrx*2000], len);
-	nrx++;
+	dp83902a_recv(&pbuf[0], len);
+
+	/*Just pass it to the upper layer*/
+	NetReceive(&pbuf[0], len);
 }
 
 void uboot_push_tx_done(int key, int val) {
@@ -861,9 +855,9 @@ int eth_init(bd_t *bd) {
 	PRINTK("### eth_init\n");
 
 	if (!pbuf) {
-		pbuf = malloc(NB*2000);
+		pbuf = malloc(2000);
 		if (!pbuf) {
-			printf("Cannot allocate rx buffers\n");
+			printf("Cannot allocate rx buffer\n");
 			return -1;
 		}
 	}
@@ -903,37 +897,21 @@ int eth_init(bd_t *bd) {
 	if (dp83902a_init() == false)
 		return -1;
 	dp83902a_start(dev_addr);
+	initialized=1;
 	return 0;
 }
 
 void eth_halt() {
 
 	PRINTK("### eth_halt\n");
-
-	dp83902a_stop();
+	if(initialized)
+		dp83902a_stop();
+	initialized=0;
 }
 
 int eth_rx() {
-	int j, tmo;
-
-	PRINTK("### eth_rx\n");
-
-	tmo = get_timer (0) + TOUT * CFG_HZ;
-	while(1) {
-		dp83902a_poll();
-		if (nrx > 0) {
-			for(j=0; j<nrx; j++) {
-				NetReceive(&pbuf[j*2000], plen[j]);
-			}
-			nrx = 0;
-			return 1;
-		}
-		if (get_timer (0) >= tmo) {
-			printf("timeout during rx\n");
-			return 0;
-		}
-	}
-	return 0;
+dp83902a_poll();
+return 1;
 }
 
 int eth_send(volatile void *packet, int length) {
@@ -959,5 +937,4 @@ int eth_send(volatile void *packet, int length) {
 	}
 	return 0;
 }
-
 #endif

drivers/ne2000.h

@@ -42,7 +42,7 @@ are GPL, so this is, of course, GPL.
  this file might be covered by the GNU General Public License.
 
  Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
- at http://sources.redhat.com/ecos/ecos-license/ */
+ at http://sources.redhat.com/ecos/ecos-license/
  -------------------------------------------
 ####ECOSGPLCOPYRIGHTEND####
 ####BSDCOPYRIGHTBEGIN####

drivers/serial/Makefile

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB 	:= $(obj)libserial.a
 
-COBJS 	:= mcfuart.o
+COBJS 	:= mcfuart.o serial_pl010.o serial_pl011.o
 
 SRCS 	:= $(COBJS:.o=.c)
 OBJS 	:= $(addprefix $(obj),$(COBJS))