999f41b7e4
Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC: - only one AXI port - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2) The STM32MP15x SOC have 2 AXI ports and 32 bits support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I3c50158401b3eb022059c7394e48980af23b9582 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/195458 Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>