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MLK-24060-1: dts: arm64: freescale: imx8mm ab2 fix sai3 pads

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Fix SAI3 pads for ak5552 dac support, add multi
clock entries to support all sample rates
Use fsl,imx-audio-ak5552 and disable ak4458_3 to
follow default config

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
This commit is contained in:
Adrian Alonso
2020-05-16 16:41:28 -05:00
parent 8fb5fb0a66
commit 2c6742bbe5
1 changed files with 12 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
arch/arm64/boot/dts/freescale/imx8mm-ab2.dts
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@ -133,7 +133,7 @@
};
sound-ak5552 {
compatible = "fsl,imx-audio-ak5558";
compatible = "fsl,imx-audio-ak5552";
model = "ak5552-audio";
audio-cpu = <&sai3>;
audio-codec = <&ak5552>;
@ -208,7 +208,12 @@
pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
assigned-clock-rates = <49152000>;
clocks = <&clk IMX8MM_CLK_SAI3_IPG>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_SAI3_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
<&clk IMX8MM_AUDIO_PLL2_OUT>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
status = "okay";
};
@ -503,6 +508,7 @@
reg = <0x12>;
AVDD-supply = <&reg_ab2_ana_pwr>;
DVDD-supply = <&reg_ab2_vdd_pwr_5v0>;
status = "disabled";
};
ak5552: ak5552@13 {
@ -632,7 +638,6 @@
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0xd6
@ -656,10 +661,10 @@
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
>;
};