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MLK-21509-2 gpu: imx: dpu: disengcfg: Add signature select support

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This patch adds helper disengcfg_sig_select() support so that
users may select different taps(FrameGen, GammaCor, Matrix or
Dither) to do signature computation.  Also, select FrameGen as
the default tap in _dpu_dec_init() and call it in dpu_dec_init().

Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
This commit is contained in:
Liu Ying
2019-04-12 15:31:28 +08:00
committed by Dong Aisheng
parent 1b6e7b6175
commit b3d8cd81f8
2 changed files with 25 additions and 1 deletions
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18
drivers/gpu/imx/dpu/dpu-disengcfg.c
View File

@ -1,6 +1,6 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
* Copyright 2017-2019 NXP
* Copyright 2017-2020 NXP
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@ -31,6 +31,7 @@ typedef enum {
#define POLEN_HIGH BIT(2)
#define PIXINV_INV BIT(3)
#define SRCSELECT 0x10
#define SIG_SELECT_MASK 0x3
struct dpu_disengcfg {
void __iomem *base;
@ -51,6 +52,19 @@ static inline void dpu_dec_write(struct dpu_disengcfg *dec,
writel(value, dec->base + offset);
}
void disengcfg_sig_select(struct dpu_disengcfg *dec, dec_sig_sel_t sig_sel)
{
u32 val;
mutex_lock(&dec->mutex);
val = dpu_dec_read(dec, SRCSELECT);
val &= ~SIG_SELECT_MASK;
val |= sig_sel;
dpu_dec_write(dec, SRCSELECT, val);
mutex_unlock(&dec->mutex);
}
EXPORT_SYMBOL_GPL(disengcfg_sig_select);
struct dpu_disengcfg *dpu_dec_get(struct dpu_soc *dpu, int id)
{
struct dpu_disengcfg *dec;
@ -115,6 +129,8 @@ void _dpu_dec_init(struct dpu_soc *dpu, unsigned int id)
val &= ~POLHS_HIGH;
val &= ~POLVS_HIGH;
dpu_dec_write(dec, POLARITYCTRL, val);
disengcfg_sig_select(dec, DEC_SIG_SEL_FRAMEGEN);
}
int dpu_dec_init(struct dpu_soc *dpu, unsigned int id,

8
include/video/dpu.h
View File

@ -109,6 +109,13 @@ typedef enum {
ID_LAYERBLEND3 = 0x24, /* 36 */
} dpu_block_id_t;
typedef enum {
DEC_SIG_SEL_FRAMEGEN = 0,
DEC_SIG_SEL_GAMMACOR,
DEC_SIG_SEL_MATRIX,
DEC_SIG_SEL_DITHER,
} dec_sig_sel_t;
typedef enum {
ED_SRC_DISABLE = ID_NONE,
ED_SRC_BLITBLEND9 = ID_BLITBLEND9,
@ -409,6 +416,7 @@ struct dpu_constframe *dpu_aux_cf_peek(struct dpu_constframe *cf);
/* Display Engine Configuration Unit */
struct dpu_disengcfg;
void disengcfg_sig_select(struct dpu_disengcfg *dec, dec_sig_sel_t sig_sel);
struct dpu_disengcfg *dpu_dec_get(struct dpu_soc *dpu, int id);
void dpu_dec_put(struct dpu_disengcfg *dec);
struct dpu_disengcfg *dpu_aux_dec_peek(struct dpu_disengcfg *dec);