MLK-13975: ASoC: fsl: add AMIX device driver
Add audio mixer device driver. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
This commit is contained in:
committed by
Leonard Crestez
parent
752b6d17ca
commit
e749afb481
67
Documentation/devicetree/bindings/sound/fsl,amix.txt
Normal file
67
Documentation/devicetree/bindings/sound/fsl,amix.txt
Normal file
@ -0,0 +1,67 @@
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NXP Audio Mixer (AMIX).
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The Audio Mixer is a on-chip functional module that allows mixing of two audio
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streams into a single audio stream. Audio Mixer has two input serial audio
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interfaces. These are driven by two Synchronous Audio interface modules (SAI).
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Each input serial interface carries 8 audio channels in its frame in TDM manner.
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Mixer mixes audio samples of corresponding channels from two interfaces into a
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single sample. Before mixing, audio samples of two inputs can be attenuated
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based on configuration. The output of the Audio Mixer is also a serial audio
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interface. Like input interfaces it has the same TDM frame format. This output
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is used to drive the serial DAC TDM interface of audio codec and also sent to
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the external pins along with the receive path of normal audio SAI module for
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readback by the CPU.
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The output of Audio mixer can be selected from any of the three streams
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- serial audio input 1
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- serial audio input 2
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- Mixed audio
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Mixing operation is independent of audio sample rate but the two audio input
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streams must have same audio sample rate with same number of channels in TDM
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frame to be eligible for mixing.
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Device driver required properties:
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=================================
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- compatible : Compatible list, contains "fsl,imx8qm-amix"
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- reg : Offset and length of the register set for the device.
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names : Must include the "ipg" for register access.
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- power-domains : Must contain the phandle to the AMIX power domain node
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Device driver configuration example:
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======================================
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amix: amix@59840000 {
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compatible = "fsl,imx8qm-amix";
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reg = <0x0 0x59840000 0x0 0x10000>;
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clocks = <&clk IMX8QXP_AUD_AMIX_IPG>;
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clock-names = "ipg";
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power-domains = <&pd_amix>;
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};
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Machine driver required properties:
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===================================
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- compatible : Compatible list, contains "fsl,imx-audio-amix"
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- model : Short audio card description.
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- dais : Must contain a list of phandles to AMIX connected
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DAIs. The current implementation requires two phandles
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to SAI interfaces to be provided, the first SAI in the
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list being used to route the AMIX output.
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- amix-controller : Must contain the phandle to the AMIX device node.
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Machine driver configuration example:
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====================================
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sound-amix-sai {
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compatible = "fsl,imx-audio-amix";
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model = "amix-audio-sai";
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dais = <&sai4>, <&sai5>;
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amix-controller = <&amix>;
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};
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@ -32,6 +32,15 @@ config SND_SOC_FSL_ACM
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This option is only useful for out-of-tree drivers since
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in-tree drivers select it automatically.
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config SND_SOC_FSL_AMIX
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tristate "Audio Mixer (AMIX) module support"
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select REGMAP_MMIO
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help
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Say Y if you want to add Audio Mixer (AMIX)
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support for the Freescale CPUs.
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This option is only useful for out-of-tree drivers since
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in-tree drivers select it automatically.
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config SND_SOC_FSL_SSI
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tristate "Synchronous Serial Interface module (SSI) support"
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select SND_SOC_IMX_PCM_DMA if SND_IMX_SOC != n
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@ -12,6 +12,7 @@ obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o
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# Freescale SSI/DMA/SAI/SPDIF Support
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snd-soc-fsl-acm-objs := fsl_acm.o
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snd-soc-fsl-amix-objs := fsl_amix.o
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snd-soc-fsl-asrc-objs := fsl_asrc.o fsl_asrc_dma.o
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snd-soc-fsl-dma-workaround-objs := fsl_dma_workaround.o
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snd-soc-fsl-hifi4-objs := fsl_hifi4.o
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@ -26,6 +27,7 @@ snd-soc-fsl-rpmsg-i2s-objs := fsl_rpmsg_i2s.o
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snd-soc-fsl-hdmi-objs := fsl_hdmi.o
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snd-soc-fsl-asoc-card-objs := fsl-asoc-card.o
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obj-$(CONFIG_SND_SOC_FSL_ACM) += snd-soc-fsl-acm.o
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obj-$(CONFIG_SND_SOC_FSL_AMIX) += snd-soc-fsl-amix.o
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obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc.o
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obj-$(CONFIG_SND_SOC_FSL_HIFI4) += snd-soc-fsl-hifi4.o
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obj-$(CONFIG_SND_SOC_FSL_SAI) += snd-soc-fsl-sai.o
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451
sound/soc/fsl/fsl_amix.c
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451
sound/soc/fsl/fsl_amix.c
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@ -0,0 +1,451 @@
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/*
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* NXP AMIX ALSA SoC Digital Audio Interface (DAI) driver
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*
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* Copyright 2017 NXP
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*
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* Author: Viorel Suman <viorel.suman@nxp.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include <sound/soc.h>
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#include <sound/pcm_params.h>
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#include "fsl_amix.h"
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#define SOC_ENUM_SINGLE_S(xreg, xshift, xtexts) \
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SOC_ENUM_SINGLE(xreg, xshift, ARRAY_SIZE(xtexts), xtexts)
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static const char
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*tdm_sel[] = { "TDM1", "TDM2", },
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*mode_sel[] = { "Disabled", "TDM1", "TDM2", "Mixed", },
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*width_sel[] = { "16b", "18b", "20b", "24b", "32b", },
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*pol_sel[] = { "Positive edge", "Negative edge", },
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*endis_sel[] = { "Disabled", "Enabled", },
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*updn_sel[] = { "Downward", "Upward", },
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*mask_sel[] = { "Unmask", "Mask", };
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static const struct soc_enum fsl_amix_enum[] = {
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/* FSL_AMIX_CTR enums */
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_MIXCLK_SHIFT, tdm_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_OUTSRC_SHIFT, mode_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_OUTWIDTH_SHIFT, width_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_OUTCKPOL_SHIFT, pol_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_MASKRTDF_SHIFT, mask_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_MASKCKDF_SHIFT, mask_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_SYNCMODE_SHIFT, endis_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_CTR, FSL_AMIX_CTR_SYNCSRC_SHIFT, tdm_sel),
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/* FSL_AMIX_ATCR0 enums */
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SOC_ENUM_SINGLE_S(FSL_AMIX_ATCR0, 0, endis_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_ATCR0, 1, updn_sel),
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/* FSL_AMIX_ATCR1 enums */
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SOC_ENUM_SINGLE_S(FSL_AMIX_ATCR1, 0, endis_sel),
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SOC_ENUM_SINGLE_S(FSL_AMIX_ATCR1, 1, updn_sel),
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};
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static const struct snd_kcontrol_new fsl_amix_snd_controls[] = {
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/* FSL_AMIX_CTR controls */
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SOC_ENUM("Mixing Clock Source", fsl_amix_enum[0]),
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SOC_ENUM("Output Source", fsl_amix_enum[1]),
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SOC_ENUM("Output Width", fsl_amix_enum[2]),
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SOC_ENUM("Output Clock Polarity", fsl_amix_enum[3]),
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SOC_ENUM("Frame Rate Diff Error", fsl_amix_enum[4]),
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SOC_ENUM("Clock Freq Diff Error", fsl_amix_enum[5]),
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SOC_ENUM("Sync Mode Config", fsl_amix_enum[6]),
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SOC_ENUM("Sync Mode Clk Source", fsl_amix_enum[7]),
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/* TDM1 Attenuation controls */
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SOC_ENUM("TDM1 Attenuation", fsl_amix_enum[8]),
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SOC_ENUM("TDM1 Attenuation Direction", fsl_amix_enum[9]),
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SOC_SINGLE("TDM1 Attenuation Step Divider", FSL_AMIX_ATCR0,
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2, 0x0fff, 0),
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SOC_SINGLE("TDM1 Attenuation Initial Value", FSL_AMIX_ATIVAL0,
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0, 0x3fff, 0),
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SOC_SINGLE("TDM1 Attenuation Step Up Factor", FSL_AMIX_ATSTPUP0,
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0, 0x3fff, 0),
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SOC_SINGLE("TDM1 Attenuation Step Down Factor", FSL_AMIX_ATSTPDN0,
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0, 0x3fff, 0),
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SOC_SINGLE("TDM1 Attenuation Step Target", FSL_AMIX_ATSTPTGT0,
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0, 0x3fff, 0),
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/* TDM2 Attenuation controls */
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SOC_ENUM("TDM2 Attenuation", fsl_amix_enum[10]),
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SOC_ENUM("TDM2 Attenuation Direction", fsl_amix_enum[11]),
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SOC_SINGLE("TDM2 Attenuation Step Divider", FSL_AMIX_ATCR1,
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2, 0x0fff, 0),
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SOC_SINGLE("TDM2 Attenuation Initial Value", FSL_AMIX_ATIVAL1,
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0, 0x3fff, 0),
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SOC_SINGLE("TDM2 Attenuation Step Up Factor", FSL_AMIX_ATSTPUP1,
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0, 0x3fff, 0),
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SOC_SINGLE("TDM2 Attenuation Step Down Factor", FSL_AMIX_ATSTPDN1,
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0, 0x3fff, 0),
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SOC_SINGLE("TDM2 Attenuation Step Target", FSL_AMIX_ATSTPTGT1,
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0, 0x3fff, 0),
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};
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struct amix_dais_st {
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u8 input;
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u8 output;
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};
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static void fsl_amix_get_dais_status(struct snd_soc_pcm_runtime *be_rtd,
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struct amix_dais_st *status)
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{
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struct snd_soc_dpcm *dpcm;
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struct snd_soc_pcm_runtime *fe_rtd = NULL;
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struct snd_pcm_substream *fe_ss = NULL;
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struct snd_soc_dai *fe_dai, *be_dai = be_rtd->cpu_dai;
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int stream = SNDRV_PCM_STREAM_PLAYBACK;
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/* find active frontends for this backend */
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list_for_each_entry(dpcm, &be_rtd->dpcm[stream].fe_clients, list_fe) {
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if (dpcm->be != be_rtd)
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continue;
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fe_rtd = dpcm->fe;
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fe_dai = fe_rtd->cpu_dai;
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fe_ss = snd_soc_dpcm_get_substream(fe_rtd, stream);
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if (fe_ss && fe_ss->pcm->device < FSL_AMIX_MAX_DAIS) {
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if (fe_dai->playback_active)
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status->input |= BIT(fe_ss->pcm->device);
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if (fe_dai->capture_active)
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status->output |= BIT(fe_ss->pcm->device);
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} else if (fe_ss) {
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dev_err(be_dai->dev, "Wrong device number: %d\n",
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fe_ss->pcm->device);
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}
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}
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}
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static int fsl_amix_update(struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_soc_dai *dai = rtd->cpu_dai;
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struct fsl_amix *priv = snd_soc_dai_get_drvdata(dai);
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u32 mask = 0, ctr = 0, val, old_input;
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struct amix_dais_st status = { .input = 0, .output = 0 };
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fsl_amix_get_dais_status(rtd, &status);
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regmap_read(priv->regmap, FSL_AMIX_CTR, &val);
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old_input = ((val & FSL_AMIX_CTR_OUTSRC_MASK) >> FSL_AMIX_CTR_OUTSRC_SHIFT);
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dev_dbg(dai->dev, "old_input=x%08x, input=x%08x\n", old_input, status.input);
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if (old_input == status.input) {
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dev_dbg(dai->dev, "State unchanged, input=x%08x\n", status.input);
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return 0;
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}
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/**
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* Mixing clock selection. Make sure the currently selected clock source
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* has the TDM enabled. If not, switch clock source to enabled TDM.
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*/
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switch (status.input) {
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case 0: /* Both TDMs are disabled, keep the clock source unchanged */
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case 3: /* Both TDMs are enabled, keep the clock source unchanged */
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break;
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case 1:
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case 2:
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val &= 1;
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if (FSL_AMIX_CTR_MIXCLK(status.input) != val) {
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mask |= FSL_AMIX_CTR_MIXCLK_MASK;
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ctr |= FSL_AMIX_CTR_MIXCLK(status.input);
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}
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break;
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}
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/* Output source selection */
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mask |= FSL_AMIX_CTR_OUTSRC_MASK;
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ctr |= FSL_AMIX_CTR_OUTSRC(status.input);
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regmap_update_bits(priv->regmap, FSL_AMIX_CTR, mask, ctr);
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dev_dbg(dai->dev, "Set AMIX_CTR[0x%08x]=0x%08x, in=0x%08x, out=0x%08x\n",
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mask, ctr, status.input, status.output);
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return 0;
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}
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static int fsl_amix_dai_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
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{
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struct snd_soc_card *card = dai->component->card;
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struct snd_soc_pcm_runtime *rtd;
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rtd = snd_soc_get_pcm_runtime(card, "HiFi-AMIX-BE");
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return fsl_amix_update(rtd);
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}
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static void fsl_amix_dai_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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fsl_amix_update(rtd);
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}
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static int fsl_amix_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct fsl_amix *priv = snd_soc_dai_get_drvdata(dai);
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u32 mask = 0, ctr = 0;
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/* AMIX is working in DSP_A format only */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_A:
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break;
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default:
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return -EINVAL;
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}
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/* For playback the AMIX is slave, and for record is master */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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case SND_SOC_DAIFMT_CBS_CFS:
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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/* Output data will be written on positive edge of the clock */
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ctr |= FSL_AMIX_CTR_OUTCKPOL(0);
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break;
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case SND_SOC_DAIFMT_IB_NF:
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/* Output data will be written on negative edge of the clock */
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ctr |= FSL_AMIX_CTR_OUTCKPOL(1);
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break;
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default:
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return -EINVAL;
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}
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mask |= FSL_AMIX_CTR_OUTCKPOL_MASK;
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return regmap_update_bits(priv->regmap, FSL_AMIX_CTR, mask, ctr);
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}
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static struct snd_soc_dai_ops fsl_amix_dai_ops = {
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.shutdown = fsl_amix_dai_shutdown,
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.mute_stream = fsl_amix_dai_mute_stream,
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.set_fmt = fsl_amix_dai_set_fmt,
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};
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static struct snd_soc_dai_driver fsl_amix_dai = {
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.playback = {
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.stream_name = "AMIX-Playback",
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.channels_min = 8,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = FSL_AMIX_FORMATS,
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},
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.capture = {
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.stream_name = "AMIX-Capture",
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.channels_min = 8,
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.channels_max = 8,
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.rate_min = 8000,
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.rate_max = 96000,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = FSL_AMIX_FORMATS,
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},
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.ops = &fsl_amix_dai_ops,
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};
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static const struct snd_soc_component_driver fsl_amix_component = {
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.name = "fsl-amix-dai",
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.controls = fsl_amix_snd_controls,
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.num_controls = ARRAY_SIZE(fsl_amix_snd_controls),
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};
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static bool fsl_amix_readable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case FSL_AMIX_CTR:
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case FSL_AMIX_STR:
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case FSL_AMIX_ATCR0:
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case FSL_AMIX_ATIVAL0:
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case FSL_AMIX_ATSTPUP0:
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case FSL_AMIX_ATSTPDN0:
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case FSL_AMIX_ATSTPTGT0:
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case FSL_AMIX_ATTNVAL0:
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case FSL_AMIX_ATSTP0:
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case FSL_AMIX_ATCR1:
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case FSL_AMIX_ATIVAL1:
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case FSL_AMIX_ATSTPUP1:
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case FSL_AMIX_ATSTPDN1:
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case FSL_AMIX_ATSTPTGT1:
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case FSL_AMIX_ATTNVAL1:
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case FSL_AMIX_ATSTP1:
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return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool fsl_amix_writeable_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case FSL_AMIX_CTR:
|
||||
case FSL_AMIX_ATCR0:
|
||||
case FSL_AMIX_ATIVAL0:
|
||||
case FSL_AMIX_ATSTPUP0:
|
||||
case FSL_AMIX_ATSTPDN0:
|
||||
case FSL_AMIX_ATSTPTGT0:
|
||||
case FSL_AMIX_ATCR1:
|
||||
case FSL_AMIX_ATIVAL1:
|
||||
case FSL_AMIX_ATSTPUP1:
|
||||
case FSL_AMIX_ATSTPDN1:
|
||||
case FSL_AMIX_ATSTPTGT1:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static struct reg_default fsl_amix_reg[] = {
|
||||
{ FSL_AMIX_CTR, 0x00060 },
|
||||
{ FSL_AMIX_STR, 0x00003 },
|
||||
{ FSL_AMIX_ATCR0, 0x00000 },
|
||||
{ FSL_AMIX_ATIVAL0, 0x3FFFF },
|
||||
{ FSL_AMIX_ATSTPUP0, 0x2AAAA },
|
||||
{ FSL_AMIX_ATSTPDN0, 0x30000 },
|
||||
{ FSL_AMIX_ATSTPTGT0, 0x00010 },
|
||||
{ FSL_AMIX_ATTNVAL0, 0x00000 },
|
||||
{ FSL_AMIX_ATSTP0, 0x00000 },
|
||||
{ FSL_AMIX_ATCR1, 0x00000 },
|
||||
{ FSL_AMIX_ATIVAL1, 0x3FFFF },
|
||||
{ FSL_AMIX_ATSTPUP1, 0x2AAAA },
|
||||
{ FSL_AMIX_ATSTPDN1, 0x30000 },
|
||||
{ FSL_AMIX_ATSTPTGT1, 0x00010 },
|
||||
{ FSL_AMIX_ATTNVAL1, 0x00000 },
|
||||
{ FSL_AMIX_ATSTP1, 0x00000 },
|
||||
};
|
||||
|
||||
static const struct regmap_config fsl_amix_regmap_config = {
|
||||
.reg_bits = 32,
|
||||
.reg_stride = 4,
|
||||
.val_bits = 32,
|
||||
.max_register = FSL_AMIX_ATSTP1,
|
||||
.reg_defaults = fsl_amix_reg,
|
||||
.num_reg_defaults = ARRAY_SIZE(fsl_amix_reg),
|
||||
.readable_reg = fsl_amix_readable_reg,
|
||||
.writeable_reg = fsl_amix_writeable_reg,
|
||||
.cache_type = REGCACHE_FLAT,
|
||||
};
|
||||
|
||||
static int fsl_amix_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct fsl_amix *priv;
|
||||
struct resource *res;
|
||||
void __iomem *regs;
|
||||
int ret;
|
||||
|
||||
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->pdev = pdev;
|
||||
|
||||
/* Get the addresses */
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(regs))
|
||||
return PTR_ERR(regs);
|
||||
|
||||
priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "ipg", regs,
|
||||
&fsl_amix_regmap_config);
|
||||
if (IS_ERR(priv->regmap)) {
|
||||
dev_err(&pdev->dev, "failed to init regmap\n");
|
||||
return PTR_ERR(priv->regmap);
|
||||
}
|
||||
|
||||
priv->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
|
||||
if (IS_ERR(priv->ipg_clk)) {
|
||||
dev_err(&pdev->dev, "failed to get ipg clock\n");
|
||||
return PTR_ERR(priv->ipg_clk);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, priv);
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
ret = devm_snd_soc_register_component(&pdev->dev, &fsl_amix_component,
|
||||
&fsl_amix_dai, 1);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to register ASoC DAI\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int fsl_amix_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct fsl_amix *priv = dev_get_drvdata(dev);
|
||||
|
||||
return clk_prepare_enable(priv->ipg_clk);
|
||||
}
|
||||
|
||||
static int fsl_amix_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct fsl_amix *priv = dev_get_drvdata(dev);
|
||||
|
||||
clk_disable_unprepare(priv->ipg_clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int fsl_amix_suspend(struct device *dev)
|
||||
{
|
||||
struct fsl_amix *priv = dev_get_drvdata(dev);
|
||||
|
||||
regcache_cache_only(priv->regmap, true);
|
||||
regcache_mark_dirty(priv->regmap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int fsl_amix_resume(struct device *dev)
|
||||
{
|
||||
struct fsl_amix *priv = dev_get_drvdata(dev);
|
||||
|
||||
regcache_cache_only(priv->regmap, false);
|
||||
regcache_sync(priv->regmap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PM_SLEEP */
|
||||
|
||||
static const struct dev_pm_ops fsl_amix_pm = {
|
||||
SET_RUNTIME_PM_OPS(fsl_amix_runtime_suspend, fsl_amix_runtime_resume, NULL)
|
||||
SET_SYSTEM_SLEEP_PM_OPS(fsl_amix_suspend, fsl_amix_resume)
|
||||
};
|
||||
|
||||
static const struct of_device_id fsl_amix_ids[] = {
|
||||
{ .compatible = "fsl,imx8qm-amix", },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, fsl_amix_ids);
|
||||
|
||||
static struct platform_driver fsl_amix_driver = {
|
||||
.probe = fsl_amix_probe,
|
||||
.driver = {
|
||||
.name = "fsl-amix",
|
||||
.of_match_table = fsl_amix_ids,
|
||||
.pm = &fsl_amix_pm,
|
||||
},
|
||||
};
|
||||
module_platform_driver(fsl_amix_driver);
|
||||
|
||||
MODULE_DESCRIPTION("NXP AMIX ASoC DAI driver");
|
||||
MODULE_AUTHOR("Viorel Suman <viorel.suman@nxp.com>");
|
||||
MODULE_ALIAS("platform:fsl-amix");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
101
sound/soc/fsl/fsl_amix.h
Normal file
101
sound/soc/fsl/fsl_amix.h
Normal file
@ -0,0 +1,101 @@
|
||||
/*
|
||||
* Copyright 2017 NXP Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __FSL_AMIX_H
|
||||
#define __FSL_AMIX_H
|
||||
|
||||
#define FSL_AMIX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
|
||||
SNDRV_PCM_FMTBIT_S24_LE |\
|
||||
SNDRV_PCM_FMTBIT_S32_LE)
|
||||
/* AMIX Registers */
|
||||
#define FSL_AMIX_CTR 0x200 /* Control */
|
||||
#define FSL_AMIX_STR 0x204 /* Status */
|
||||
|
||||
#define FSL_AMIX_ATCR0 0x208 /* Attenuation Control */
|
||||
#define FSL_AMIX_ATIVAL0 0x20c /* Attenuation Initial Value */
|
||||
#define FSL_AMIX_ATSTPUP0 0x210 /* Attenuation step up factor */
|
||||
#define FSL_AMIX_ATSTPDN0 0x214 /* Attenuation step down factor */
|
||||
#define FSL_AMIX_ATSTPTGT0 0x218 /* Attenuation step target */
|
||||
#define FSL_AMIX_ATTNVAL0 0x21c /* Attenuation Value */
|
||||
#define FSL_AMIX_ATSTP0 0x220 /* Attenuation step number */
|
||||
|
||||
#define FSL_AMIX_ATCR1 0x228 /* Attenuation Control */
|
||||
#define FSL_AMIX_ATIVAL1 0x22c /* Attenuation Initial Value */
|
||||
#define FSL_AMIX_ATSTPUP1 0x230 /* Attenuation step up factor */
|
||||
#define FSL_AMIX_ATSTPDN1 0x234 /* Attenuation step down factor */
|
||||
#define FSL_AMIX_ATSTPTGT1 0x238 /* Attenuation step target */
|
||||
#define FSL_AMIX_ATTNVAL1 0x23c /* Attenuation Value */
|
||||
#define FSL_AMIX_ATSTP1 0x240 /* Attenuation step number */
|
||||
|
||||
/* AMIX Control Register */
|
||||
#define FSL_AMIX_CTR_MIXCLK_SHIFT 0
|
||||
#define FSL_AMIX_CTR_MIXCLK_MASK (1 << FSL_AMIX_CTR_MIXCLK_SHIFT)
|
||||
#define FSL_AMIX_CTR_MIXCLK(i) (i - 1)
|
||||
#define FSL_AMIX_CTR_OUTSRC_SHIFT 1
|
||||
#define FSL_AMIX_CTR_OUTSRC_MASK (0x3 << FSL_AMIX_CTR_OUTSRC_SHIFT)
|
||||
#define FSL_AMIX_CTR_OUTSRC(i) ((i << FSL_AMIX_CTR_OUTSRC_SHIFT) \
|
||||
& FSL_AMIX_CTR_OUTSRC_MASK)
|
||||
#define FSL_AMIX_CTR_OUTWIDTH_SHIFT 3
|
||||
#define FSL_AMIX_CTR_OUTWIDTH_MASK (0x7 << FSL_AMIX_CTR_OUTWIDTH_SHIFT)
|
||||
#define FSL_AMIX_CTR_OUTWIDTH(i) ((i << FSL_AMIX_CTR_OUTWIDTH_SHIFT) \
|
||||
& FSL_AMIX_CTR_OUTWIDTH_MASK)
|
||||
#define FSL_AMIX_CTR_OUTCKPOL_SHIFT 6
|
||||
#define FSL_AMIX_CTR_OUTCKPOL_MASK (1 << FSL_AMIX_CTR_OUTCKPOL_SHIFT)
|
||||
#define FSL_AMIX_CTR_OUTCKPOL(i) (i << FSL_AMIX_CTR_OUTCKPOL_SHIFT)
|
||||
#define FSL_AMIX_CTR_MASKRTDF_SHIFT 7
|
||||
#define FSL_AMIX_CTR_MASKRTDF_MASK (1 << FSL_AMIX_CTR_MASKRTDF_SHIFT)
|
||||
#define FSL_AMIX_CTR_MASKRTDF(i) (i << FSL_AMIX_CTR_MASKRTDF_SHIFT)
|
||||
#define FSL_AMIX_CTR_MASKCKDF_SHIFT 8
|
||||
#define FSL_AMIX_CTR_MASKCKDF_MASK (1 << FSL_AMIX_CTR_MASKCKDF_SHIFT)
|
||||
#define FSL_AMIX_CTR_MASKCKDF(i) (i << FSL_AMIX_CTR_MASKCKDF_SHIFT)
|
||||
#define FSL_AMIX_CTR_SYNCMODE_SHIFT 9
|
||||
#define FSL_AMIX_CTR_SYNCMODE_MASK (1 << FSL_AMIX_CTR_SYNCMODE_SHIFT)
|
||||
#define FSL_AMIX_CTR_SYNCMODE(i) (i << FSL_AMIX_CTR_SYNCMODE_SHIFT)
|
||||
#define FSL_AMIX_CTR_SYNCSRC_SHIFT 10
|
||||
#define FSL_AMIX_CTR_SYNCSRC_MASK (1 << FSL_AMIX_CTR_SYNCSRC_SHIFT)
|
||||
#define FSL_AMIX_CTR_SYNCSRC(i) (i << FSL_AMIX_CTR_SYNCSRC_SHIFT)
|
||||
|
||||
/* AMIX Status Register */
|
||||
#define FSL_AMIX_STR_RATEDIFF BIT(0)
|
||||
#define FSL_AMIX_STR_CLKDIFF BIT(1)
|
||||
#define FSL_AMIX_STR_MIXSTAT_SHIFT 2
|
||||
#define FSL_AMIX_STR_MIXSTAT_MASK (0x3 << FSL_AMIX_STR_MIXSTAT_SHIFT)
|
||||
#define FSL_AMIX_STR_MIXSTAT(i) ((i & FSL_AMIX_STR_MIXSTAT_MASK) \
|
||||
>> FSL_AMIX_STR_MIXSTAT_SHIFT)
|
||||
/* AMIX Attenuation Control Register */
|
||||
#define FSL_AMIX_ATCR_AT_EN BIT(0)
|
||||
#define FSL_AMIX_ATCR_AT_UPDN BIT(1)
|
||||
#define FSL_AMIX_ATCR_ATSTPDIF_SHIFT 2
|
||||
#define FSL_AMIX_ATCR_ATSTPDFI_MASK (0xfff << FSL_AMIX_ATCR_ATSTPDIF_SHIFT)
|
||||
|
||||
/* AMIX Attenuation Initial Value Register */
|
||||
#define FSL_AMIX_ATIVAL_ATINVAL_MASK 0x3FFFF
|
||||
|
||||
/* AMIX Attenuation Step Up Factor Register */
|
||||
#define FSL_AMIX_ATSTPUP_ATSTEPUP_MASK 0x3FFFF
|
||||
|
||||
/* AMIX Attenuation Step Down Factor Register */
|
||||
#define FSL_AMIX_ATSTPDN_ATSTEPDN_MASK 0x3FFFF
|
||||
|
||||
/* AMIX Attenuation Step Target Register */
|
||||
#define FSL_AMIX_ATSTPTGT_ATSTPTG_MASK 0x3FFFF
|
||||
|
||||
/* AMIX Attenuation Value Register */
|
||||
#define FSL_AMIX_ATTNVAL_ATCURVAL_MASK 0x3FFFF
|
||||
|
||||
/* AMIX Attenuation Step Number Register */
|
||||
#define FSL_AMIX_ATSTP_STPCTR_MASK 0x3FFFF
|
||||
|
||||
#define FSL_AMIX_MAX_DAIS 2
|
||||
struct fsl_amix {
|
||||
struct platform_device *pdev;
|
||||
struct regmap *regmap;
|
||||
struct clk *ipg_clk;
|
||||
};
|
||||
|
||||
#endif /* __FSL_AMIX_H */
|
||||
Reference in New Issue
Block a user