According to V4L2 doc, cap_q_ctx is for "output to memory"
queue and out_q_ctx is for "input from memory", so capature
should represent for output of ISI and output should represent
for ISI's input. But I reversed their relationship, so correct
it.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
According to SP800-56A section 5.6.2.1, the public key to be processed
for the ECDH operation shall be checked for appropriateness. When the
public key is considered to be an ephemeral key, the partial validation
test as defined in SP800-56A section 5.6.2.3.4 can be applied.
The partial verification test requires the presence of the field
elements of a and b. For the implemented NIST curves, b is defined in
FIPS 186-4 appendix D.1.2. The element a is implicitly given with the
Weierstrass equation given in D.1.2 where a = p - 3.
Without the test, the NIST ACVP testing fails. After adding this check,
the NIST ACVP testing passes.
Signed-off-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
On the quest to remove all VLAs from the kernel[1], this avoids VLAs
by just using the maximum allocation size (4 bytes) for stack arrays.
All the VLAs in ecc were either 3 or 4 bytes (or a multiple), so just
make it 4 bytes all the time. Initialization routines are adjusted to
check that ndigits does not end up larger than the arrays.
This includes a removal of the earlier attempt at this fix from
commit a963834b4742 ("crypto/ecc: Remove stack VLA usage")
[1] https://lkml.org/lkml/2018/3/7/621
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Since MU now is NOT in WU irq domain, so there is no irq_set_wake
callback available, below message will come out during kernel boot
up:
imx8mu_init: set_irq_wake failed: -6
GIC/MU now are powered off during suspend, so it is unnecessary to
call irq_set_irq_wake() for MU, we can remove it to avoid the failure
message.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
The it6263 bridge contains two I2C devices on the same I2C bus
to control HDMI and LVDS modules respectively. However, they
have different I2C addresses. Thus, one of the two devices should
be registered as dummy device and bound with dummy driver. This
is what the helper i2c_new_dummy() is designed for. The HDMI I2C
device is normally registered as a real I2C device and bound with
a real driver, so the LVDS I2C device should be dummy.
This patch fixes the issue to access the LVDS I2C device's sys nodes,
like /sys/kernel/debug/regmap/2-0033/name.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Generally DDC function is not work with no edid.
Add max pixel clock support rate 297MHz for no edid case.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Pixel combiner function is ready in patch set for MLK-19413.
Remove variable is_4kp60 from driver.
4Kp60 are supported for all platforms.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
VIC code check is introduced in 4.14.y,
if a mode is found in HDMI 1.4b 4K modes.
HDMI driver should send its VIC in vendor infoframes.
Add vendor infoframe setting.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Merge CDN_1_0_38 release to HDP API.
v1_0_38 release notes:
DP: Added functionality for setting own PHY register values related to
voltage swing and pre-emphasis.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
As suggested by designer for safety's sake, this patch tunes
kachuck from slave tcon to generate it 2 lines later than
master tcon.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch corrects master extdst when the relevant plane_ed of
the CRTC is slave. This is code change only because there is no
real usecase supported by existing hardwares may trigger the issue.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
When early_power_on is present in power domain dtb node, it
will be powered on during resume regardless of whether the
related module is enabled or NOT, this will cause cm4_intmux
always power ON after first time resume when cm4_intmux is
NOT enabled.
So move this early_power_on property to board level dtb, ONLY
when cm4_intmux is enabled, then this property is added.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
When early_power_on is present in power domain dtb node, it
will be powered on during resume regardless of whether the
related module is enabled or NOT, this will cause cm4_intmux
always power ON after first time resume when cm4_intmux is
NOT enabled.
So move this early_power_on property to board level dtb, ONLY
when cm4_intmux is enabled, then this property is added.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
1. Dom0 dts include fsl-imx8qm-mek.dtsi
2. Add /memreserve/ according to reserved-memory no-map node, then
xen will not use these memory. The memory region are used by
vpu/dsp/rpmsg, so xen should not touch them.
3. correct dom0 cma area, CM4 has limitation that the max access address
is 0xE0000000, so the alloc-ranges should consider the limitation,
otherwise rpmsg dma allocation will alloc memory higher than
0xE0000000 and M4 will crash.
4. Hook CM41 with SMMU, added the addresses the CM41 will access, then
after SMMU enabled, CM41 could access the address. To support
Rear-View Camera, CM41 is kicked off by SCU at very early stage,
DomU memory almost has no chance to have machine address 0x90000000
included which is the vring desc buffer. So we have to enable SMMU
to let CM41 access the memory.
5. Since DomU Guest RAM0 base is moved to 0x80000000, Let's change DomU
ip address space to their machine address, since there is no conflict
now.
6. Add reserved-memory in DomU dts, we enabled xen xl to copy that
to DomU dtb.
7. Mark PCI/VPU as xen,passthrough, but not supported in DomU now.
8. Add Pixel_combiner2 passthrough to make dpu2 display work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Rename fsl-imx8qm-mek.dts to fsl-imx8qm-mek.dtsi and keep /dts-v1/ in
fsl-imx8qm-mek.dts, then let fsl-imx8qm-mek.dts include
fsl-imx8qm-mek.dtsi.
This is to prepare adding /memreserve/ for mek dom0 dts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
commit 7f3ff14b7e ("dmaengine: imx-sdma: add 1ms delay to ensure
SDMA channel is stopped") add 1ms delay to ensure no dma done interrupt
come in after channel disabled. This 1ms may cause SAI underrun issue
between two times playback, because ALSA framework stop SAI module after
dma terminate, thus the 1ms timing window trigger continuous 'underrun'
interrupt. Actually, don't need 1ms delay anymore since virt-dma could
handle the interrupt after channel terminated.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Since sdma_resume will restore all context in case sdma power off after
suspend, sdma_channel_resume does not need to restore again. Besides,
'suspend_off' can be removed too.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
request_firmware_nowait() is async so that can't make sure sdma firmware
loaded when sdma_resume return back. Add wait code to make sure firmware
ready.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Context switch mode should be set to static before channel0 running
after sdma bootup. Do that after sdma power up again in case mega/fast
mix off.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Adjust passive trip point temperature to be 20 degree C
below than the critical trip point temperature on i.MX8X
platforms.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit cefa63c1b9)
For mfgtool (UUU) requirement, it needs to build in IPv6 for nfs
rootfs mount.
Generated with the following commands:
make defconfig
make savedefconfig
cp defconfig arch/arm64/configs/defconfig
Reviewed-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
There is error log after suspend resume with asrc alsa plugin.
"fsl-asrc 2034000.asrc: Pair A: failed to process buffer: -16"
"asrc_pair_convert_s16: Convert ASRC pair 0 failed,
[0x989410][440][0x9895d0][1764]"
Which is caused by the return value is -EBUSY when signal_pending, in this
case we can use the -ERESTARTSYS to instead, that system will recall the
convert function after resume.
Fixes commit e1e9de8e93 ("MLK-10048-2: ASoC: fsl_asrc: change
the return value")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
If the initialization is not finished, then we input data to
the FIFO will fail, which still cause the error
"output dma task timeout"
So we need to ad initial check in the resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
There will be "output DMA task timeout" after suspend and resume.
The reason is there is not enough data in the input FIFO.
In the fsl_asrc_start_pair function we initialize the FIFO with
zero data after pair is enabled, it looks like we add more data
to input FIFO. For example if the input buffer length is 100,
but the actual length is 100 + channel*4. so we need to do same
work in resume for the asrc pair is disabled in suspend, the
input FIFO is cleared.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
runtime pm suspend should be called in error path during fsl-quadspi
driver probe. change the code to handle it properly.
Add one more hwcaps SNOR_HWCAPS_READ_1_1_4 for the Spansion QSPI nor
s25fl128s since it only indicate this mode as the best performance mode
in SFDP table.
Signed-off-by: Han Xu <han.xu@nxp.com>
Commit 943fa02282 ("ASoC: hdmi-codec: Use different name for playback
streams") broke hdmi-codec's routing between it's output "TX" widget
and the S/PDIF or I2S streams by renaming the streams.
Whether an error occurs or not is dependent on whether there is another
widget called "Playback" registered by some other component - if there
is, that widget will be (incorrectly) bound to the HDMI codec's "TX"
output widget. If we end up connecting "TX" incorrectly, it can result
in components not being started, causing no audio output.
Since the I2S and S/PDIF streams now have different names, we can't
use a static route at component level to describe the relationship, so
arrange to dynamically create the route when the DAI driver is probed.
Fixes: 943fa02282 ("ASoC: hdmi-codec: Use different name for playback streams")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit d30e23d699)
According to IC engineer suggestion, set ssc_range as -4003 ppm
will have more tolerence for EMI, and suitable for more boards.
Besides, one customer board needs to set this value to pass TX
SSC test.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
It may be used by xhci platform driver, fixed below error when
building xhci as module.
ERROR: "xhci_bus_suspend" [drivers/usb/cdns3/cdns3.ko] undefined!
linux-imx/scripts/Makefile.modpost:92: recipe for target '__modpost' failed
make[2]: *** [__modpost] Error 1
linux-imx/Makefile:1231: recipe for target 'modules' failed
make[1]: *** [modules] Error 2
Reported-by: Bruce Zhang <bo.zhang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Use MQ specific ak5558 sound card compatible string in order to
handle properly 1:2 bclk:mclk SAI ratio.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 20d6d65c330a1560407bc99e0a7f90225ceaf7d8)
According to AK5558 MCLK frequence must not exceed 36.864 MHz.
Limit maximum supported rate as function of max MCLK frequency,
sample bits and number of slots.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 236796cad225daa39d5b77d763a1d964dd4de4c9)
This patch adds dual mode support in the i.MX HDP driver.
The single mode and dual mode can be switched dynamically
according to the input video mode(pixel clock rate and
active horizontal display width).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pixel combiner support in the DPU KMS driver.
Pretty much logics are implemented to allocate/organize the
CRTC resources(extdst, framegen, tcon, pixel combiner, etc)
and plane resources(extdst, fetchunit, layerblend, etc) which
are needed to drive a high pixel rate display via pixel combiner.
Additional logics are implemented to support sync up mode fixup
found in the new version of DPU IP.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch moves several basic structures and helpers of DPU CRTC from
the DPU CRTC driver to dpu-crtc.h so that more DPU CRTC information can
be exported there.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds extdst_pixengcfg_syncmode_master() helper support
so that the callers may control if a extdst is master or slave
when it works in sync mode. The bit16 of extdst's PIXENGCFG_STATIC
register controls this and it's a part of sync mode fixup logic.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds framegen_secondary_is_syncup() and
framegen_wait_for_secondary_syncup() helpers support so that
the callers may know a framegen's syncup status for the
secondary input.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Bit7 of framegen's SECSTATCONFIG register is used to control
the sync mode fixup logic implemented in framegen. This patch
adds framegen_syncmode_fixup() helper so that the callers
may enable/disable the fixup logic for a framegen.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Bit16 of store9's PIXENGCFG_STATIC register is used to control
the sync mode fixup logic implemented in store9. So, let's
add store9 support in the DPU core driver and export a function
for users to enable/disable the fixup logic.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds constframe_framedimenstions_copy_prim() helper support
so that callers may may copy frame dimensions from a primary constframe
to the relevant secondary constframe.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pixel combiner support in the DPU core driver.
Users may get and enable/disable/control a pixel combiner instant
via tcon functions and may tell if pixel combiner is available for
a particular DPU variant via the dpu_has_pc() helper and if it is
needed in a specific usecase via the dpu_get_syncmode_min_prate()
and dpu_get_singlemode_max_width() helpers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Cache the auxiliary CRTC resources in struct dpu_crtc via the
dpu_aux_{unit}_peek() helpers so that the DPU CRTC driver may
use them later.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DPU CRTC device driver may get the CRTC group id from
the pdata of the device. Let's cache it in struct dpu_crtc
so that the driver may use it later.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The pixel clock of the slave framegen comes from the master framegen
when the two framegens work in sync mode, so we cannot get pixel clock
from the pixel clock rate from the slave framegen directly to calculate
the timeout value when waiting for it's done. Instead, we can tell
the rate from the video mode. So, we take this fallback way to get
the rate in this case and don't warn.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds side-by-side support for tcon so that
two tcons can participate in the dual display streams
to work with pixel combiner to drive a high pixel rate
display.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
