rpmsg core didn't take care of high memory case which may be triggered
in 1:3 kernel/userspace memory split. Get correct page by vmalloc_to_page
instead of virt_to_page.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Alllign header format as M4 defined, no need revert order. Correct
the data to u8 instead of u32 as M4 defined. Call the header define
in imx_rpmsg.h derectly.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Add PM RPMSG for i.MX7ULP power management, currently
it handles heart beat function which will notify M4
that linux is alive every 30 seconds, and when system
enters/exit VLLS mode, it will notify M4 for proper
power management.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
The ret is assigned as 0, but never changed afterwards, fix this
"Logically dead code" warning.
Fixes: 385c47481600 ("usb: chipidea: Only read/write OTGSC from one place")
Signed-off-by: Peter Chen <peter.chen@nxp.com>
After commit 4967018428 ("usb: chipidea: otg: change workqueue
ci_otg as freezable"), we have fixed the bug that ID removed
wakeup (ID: 0->1) will lock up system resume, we delete the
workaround code in this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For i.mx6q systems the mmdc handshake on channel 0 is kept enabled (while
channel 1 is bypassed). This is ok for lpddr2 systems operating on 1ch-mode,
but not true for 2ch-mode. On this case the handshake needs to be set for
both channels, otherwise a kernel panic or Oops error might be observed
after resuming from suspend.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
To configure the suspend settings for lpddr2 systems is necessary
to know if mmdc is operating on 1ch-mode or 2ch-mode.
Here, the imx_get_lpddr2_2ch_mode api is introduced to get this info
when needed and decide accordingly.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
Using the CLK_GET_RATE_NOCACHE flag on the clock dividers will allow
the recalculation of the rate instead of just caching its value.
For instance, this allows the mmdc clock to be properly updated,
after being modified by the busfreq driver, within an iram routine
by calling the clk_get_rate api. Using this flag allows to call only
to the .recalc_rate functions instead of additionally call the
.set_rate ones.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
The mmdc clk rate needs to be explicitly updated when moving to
high audio rate by the busfreq module for the i.mx6q lpddr2 systems.
In order to make the mmdc_ch0_axi clk visible by this driver, it
needs to be included on the clocks/clock-names list.
For the imx6dqscm-1gb-evb systems the clocks list for the busfreq
module is originally inherited from imx6q.dtsi. To include the mmdc
clk, the full clocks list plus the mmdc clk needs to be overwriten
on the individual dts files.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
As periph_pre_clk's parent is not changed when going to high audio frequency,
the clk framework will not update its children's frequency. This cause
the the mmdc_ch0_axi clk_rate does not reflect the right frequency when
reading it from userspace like:
cat /sys/kernel/debug/clk/mmdc_ch0_axi/clk_rate
Since the mmdc_ch0_axi_podf is changed in the asm busfreq routine, then the
mmdc rate needs to be updated to make sure clk tree is right, although it
will not do any change to hardware.
To do this the clk_get_rate api is used to update the mmdc_clk which
needs to be dereferenced from the device tree. Since for other cases like
ddr3, the update of the rate of the mmdc clk is not needed, the absense of
this parameter (on the device tree) don't make throw an error, instead, NULL
checks are used to check if the mmdc clk needs to be updated or not.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
After a frequency transition, like 400MHz to 24Mhz, on i.mx6DQ SCM
systems (which use lpddr2), the curr_ddr_rate variable retains its
previous cached value causing the next frequency update transition
to fail by following a wrong flow which results in a complete hang
of the system.
Issuing an L1 cache flush during the freq update routine (as in in
MXSCM-241-1) and moving up the curr_ddr_rate variable before calling
tge freq update alleviates the problem.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
Flush and disable L1 before disabling L2, to let data to be coherent.
Flushing L1 pushes everyhting to L2. L2 is sync later, but it can still
have dirty lines.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
Fixes the following lockdep message:
INFO: trying to register non-static key.
the code is fine but needs lockdep annotation.
turning off the locking correctness validator.
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.1.30-02225-g55e4b9e #8
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[<800162b0>] (unwind_backtrace) from [<80012ba0>] (show_stack+0x10/0x14)
[<80012ba0>] (show_stack) from [<808d09d0>] (dump_stack+0xa8/0xd4)
[<808d09d0>] (dump_stack) from [<8007aed0>] (__lock_acquire+0x1eb0/0x2224)
[<8007aed0>] (__lock_acquire) from [<8007b840>] (lock_acquire+0xa4/0xd0)
[<8007b840>] (lock_acquire) from [<808dc28c>] (_raw_spin_lock+0x3c/0x4c)
[<808dc28c>] (_raw_spin_lock) from [<80666724>] (sm_keystore_slot_alloc+0x24/0x74)
[<80666724>] (sm_keystore_slot_alloc) from [<806677c8>] (caam_sm_example_init+0x1ec/0xb68)
[<806677c8>] (caam_sm_example_init) from [<80c6ff48>] (caam_sm_test_init+0x50/0x58)
[<80c6ff48>] (caam_sm_test_init) from [<80009770>] (do_one_initcall+0x8c/0x1d8)
[<80009770>] (do_one_initcall) from [<80c26dc8>] (kernel_init_freeable+0x144/0x1e4)
[<80c26dc8>] (kernel_init_freeable) from [<808cbff0>] (kernel_init+0x8/0xe8)
[<808cbff0>] (kernel_init) from [<8000f618>] (ret_from_fork+0x14/0x3c)
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: Dan Douglass <dan.douglass@nxp.com>
The deadlock scenario is the following:
1. We schedule low_bus_freq_handle() but it does not run yet.
2. We run set_high_bus_freq() or some other function, that does the
following two things: (a) takes the busfreq mutex and (b)
synchronously cancel the low_bus_freq_handle work
If between (a) and (b) the low_bus_freq_handle work starts running, it
will take the bus freq mutex and block which will cause (b) to
deadlock since the work will never finish now.
To fix this issue avoid synchronously canceling the work and instead
use a new global variable (protected by the busfreq mutex) to mark the
cancellation and abort the work when it is scheduled. In order to
avoid unnecessary schedules we also try to cancel the work with
cancel_delayed_work().
======================================================
[ INFO: possible circular locking dependency detected ]
4.9.0-rc4-00776-gd4f2779 #348 Tainted: G W
-------------------------------------------------------
kworker/3:1/68 is trying to acquire lock:
(
bus_freq_mutex
){+.+...}
, at:
[<c0128a20>] reduce_bus_freq_handler+0x1c/0x30
but task is already holding lock:
(
(&(&low_bus_freq_handler)->work)
){+.+...}
, at:
[<c014f4ec>] process_one_work+0x128/0x418
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #1
(
(&(&low_bus_freq_handler)->work)
){+.+...}
:
[<c014dafc>] flush_work+0x44/0x234
[<c0150348>] __cancel_work_timer+0x98/0x1c8
[<c01504a4>] cancel_delayed_work_sync+0x14/0x18
[<c0129d9c>] request_bus_freq+0x9c/0x150
[<c06b2b28>] imx6q_cpufreq_init+0x8c/0xb8
[<c06afc9c>] cpufreq_online+0xc0/0x67c
[<c06b0308>] cpufreq_add_dev+0xb0/0xd4
[<c05251b0>] subsys_interface_register+0x9c/0xd8
[<c06af124>] cpufreq_register_driver+0x130/0x1dc
[<c06b3224>] imx6q_cpufreq_probe+0x5c8/0x8a0
[<c0528768>] platform_drv_probe+0x54/0xb8
[<c0526bf8>] driver_probe_device+0x20c/0x2c4
[<c0526e4c>] __device_attach_driver+0x9c/0xb4
[<c0524e3c>] bus_for_each_drv+0x6c/0xa0
[<c05268c8>] __device_attach+0xb8/0x11c
[<c0526fc4>] device_initial_probe+0x14/0x18
[<c0525ee8>] bus_probe_device+0x90/0x98
[<c052401c>] device_add+0x3c8/0x578
[<c052846c>] platform_device_add+0xa8/0x208
[<c0529030>] platform_device_register+0x28/0x2c
[<c0d0f63c>] imx6q_init_late+0x180/0x1c8
[<c0d03880>] init_machine_late+0x24/0x98
[<c01019ec>] do_one_initcall+0x44/0x180
[<c0d00e28>] kernel_init_freeable+0x12c/0x1f4
[<c0978ba8>] kernel_init+0x10/0x120
[<c0107ff0>] ret_from_fork+0x14/0x24
-> #0
(
bus_freq_mutex
){+.+...}
:
[<c01811e4>] lock_acquire+0x78/0x98
[<c097cedc>] mutex_lock_nested+0x54/0x3e4
[<c0128a20>] reduce_bus_freq_handler+0x1c/0x30
[<c014f558>] process_one_work+0x194/0x418
[<c014f810>] worker_thread+0x34/0x4fc
[<c0155e44>] kthread+0xdc/0xf8
[<c0107ff0>] ret_from_fork+0x14/0x24
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0 CPU1
---- ----
lock( (&(&low_bus_freq_handler)->work) );
lock( bus_freq_mutex );
lock( (&(&low_bus_freq_handler)->work) );
lock( bus_freq_mutex );
*** DEADLOCK ***
2 locks held by kworker/3:1/68:
#0:
(
"events"
){.+.+.+}
, at:
[<c014f4ec>] process_one_work+0x128/0x418
#1:
(
(&(&low_bus_freq_handler)->work)
){+.+...}
, at:
[<c014f4ec>] process_one_work+0x128/0x418
stack backtrace:
CPU: 3 PID: 68 Comm: kworker/3:1 Tainted: G W 4.9.0-rc4-00776-gd4f2779 #348
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
Workqueue: events reduce_bus_freq_handler
Backtrace:
[<c010c538>] (dump_backtrace) from [<c010c730>] (show_stack+0x18/0x1c)
[<c010c718>] (show_stack) from [<c0403a58>] (dump_stack+0xb4/0xe8)
[<c04039a4>] (dump_stack) from [<c017d4f0>] (print_circular_bug+0x1d4/0x318)
[<c017d31c>] (print_circular_bug) from [<c0180bb4>] (__lock_acquire+0x1864/0x1ad4)
[<c017f350>] (__lock_acquire) from [<c01811e4>] (lock_acquire+0x78/0x98)
[<c018116c>] (lock_acquire) from [<c097cedc>] (mutex_lock_nested+0x54/0x3e4)
[<c097ce88>] (mutex_lock_nested) from [<c0128a20>] (reduce_bus_freq_handler+0x1c/0x30)
[<c0128a04>] (reduce_bus_freq_handler) from [<c014f558>] (process_one_work+0x194/0x418)
[<c014f3c4>] (process_one_work) from [<c014f810>] (worker_thread+0x34/0x4fc)
[<c014f7dc>] (worker_thread) from [<c0155e44>] (kthread+0xdc/0xf8)
[<c0155d68>] (kthread) from [<c0107ff0>] (ret_from_fork+0x14/0x24)
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Bank0/Bank1 are not in ECC mode, so no need to check.
Each bank contains 8 words, so we check (phy_index > 15).
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add ULP1 OTP support.
No timing required for ULP1 OTP.
The CTRL_ADDR is 8 bits width.
When finished access to OTP, gate the power to OTP memory to save power.
Fix store, when invalid args, not return 0, but return the error values.
To ULP, fuse only support being programmed once, so add a check before
program.
Test log:
root@imx6qdlsolo:/sys/fsl_otp# cat HW_OCOTP_GP84
0x0
root@imx6qdlsolo:/sys/fsl_otp# echo 1 > HW_OCOTP_GP84
root@imx6qdlsolo:/sys/fsl_otp# cat HW_OCOTP_GP84
0x1
root@imx6qdlsolo:/sys/fsl_otp# echo 1 > HW_OCOTP_GP84
-sh: echo: write error: Operation not permitted
root@imx6qdlsolo:/sys/fsl_otp# echo fg > HW_OCOTP_GP84
-sh: echo: write error: Invalid argument
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The iomux PAD setting for QSPI on i.MX7ULP should belong to
iomuxc0(refers to iomuxc in dtsi file) rather than iomuxc1.
Signed-off-by: Han Xu <han.xu@nxp.com>
Below error happen when boot up imx6ul/imx6ull 9x9 board. which is caused by
that dts is not updated in commit 0a4c5844f91de8 ("MLK-12059 ARM: dts:
imx6ul-14x14-evk: add mic detect gpio to support headset Jack")
[ 1.871240] imx-wm8960 sound: ASoC: Failed to add route HP_L -> direct -> Headset Jack
[ 1.884002] imx-wm8960 sound: ASoC: Failed to add route HP_R -> direct -> Headset Jack
[ 1.896532] imx-wm8960 sound: ASoC: Failed to add route Hp MIC -> direct -> LINPUT2
[ 1.909936] imx-wm8960 sound: ASoC: Failed to add route Hp MIC -> direct -> LINPUT3
[ 1.923511] imx-wm8960 sound: ASoC: Failed to add route MICB -> direct -> Hp MIC
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The untrimmed chip firc clock is 50Mhz after manually tuning.
Now the trimmed chip firc clock is stable to 48Mhz, so change
the lpuart module clock rate to 48Mhz.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Because i.mx6sll support mega_fast power off, sdma driver can sync
with i.mx6ul which support this feature. Modify compatible name
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
In overlayfb_enable(), unchecked the return value of lock_fb_info function, if
it return zero, it maybe cause mistakes.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
- use different LUT setting and coefficient setting for different quantization
bits.
- clear CTRL0_MUX14_SEL to 0 only when use dithering algorithm, set to 1 for
not using dithering module.
- bypass PXP_OUT_AS for dithering and add DITHER_STORE_SIZE setting
Signed-off-by: Robby Cai <robby.cai@nxp.com>
In mxsfb_overlay_exit, a pointer to freed memory is dereferenced, used as a
function argument, exchange the reference and freed function position.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
Description: Initial VCO oscillation may fail under
corner conditions such as cold temperature. It causes
PCIe PLL fail to lock in initialization phase.
Project Impact: iMX7 PCIe PLL fails to lock and iMX7D
PCIe doesn't work.
Workarounds: To toggle internal PLL_PD signal to make
VCO oscillate after G_RST signal is de-asserted by
following the sequences:
- De-asserted G_RST signal
- Toggle internal PLL_PD signal:
- Write "0x04" to the address "0x306D_0054"
- Write "0xA4" to the address "0x306D_0054"
- Write "0x04" to the address "0x306D_0054"
- De-asserted CMN_RST signal
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
In order to remove the hard-coded vring buffer in
the driver, input the vring buffer by device tree
node.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
The USB core may call reset_resume when it fails resume asix device.
And USB core can recovery this abnormal resume at low level driver,
the same .resume at asix driver can work too. Add .reset_resume can
avoid disconnecting after backing from system resume, and NFS can
still be mounted after this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When the vbus is off during the suspend controller is powered off, if we
do not want to see disconnection from USB core, we need to make sure the
device pulls DP up before USB core resume runs. However, several devices
are slow to pull DP up when see vbus (maybe it needs vbus to power up
system), so we need to wait connection at platform code.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At some systems, the pinctrl setting will be lost or needs to
set as "sleep" state to save power consumption. So, we need to
configure pinctrl as "sleep" state when system enters suspend,
and as "default" state after system resumes. In this way, the
pinctrl value can be recovered as "default" state after resuming.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At some systems, the pinctrl setting will be lost or needs to
set as "sleep" state to save power consumption. So, we need to
configure pinctrl as "sleep" state when system enters suspend,
and as "default" state after system resumes. In this way, the
pinctrl value can be recovered as "default" state after resuming.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The vbus should be output, and the id should be input.
Without this change, the GPIO configuration (through pinctrl
register) is incorrect from system suspend.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At imx7ulp VLLS mode, the power of iomux1 is lost, so we need to
recover pinctrl value when back from this mode.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The overlay function of LCDIF only support when the bpp of fb0
and fb1 are the same. So add this check on overlayfb_check_var().
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The 'usage' field of mxsfb_layer is used to record the
overlay fb user counts. So change its type to atomic_t
to avoid race problem.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
After the last close of the fb1 open, the fb_info var structure
contains the information in the last overlay display. This may
cause the next overlay display contains old and invalid var
info. So re-init the var info on every fb1 open.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Add global alpha mode for overlay framebuffer when the
overlay fb has no alpha channel, which means set a fix
alpha value which is used during the alpha blending
between AS and framebuffer.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
