Compare commits
30 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 9d0231c207 | |||
| 7c51cb723a | |||
| 3601bce60f | |||
| 00863fc272 | |||
| b207384ec8 | |||
| 2edcb814b3 | |||
| 852c3a36c2 | |||
| c9353a7b06 | |||
| 884d833e27 | |||
| 03b762ab87 | |||
| f334f74575 | |||
| 23cfecf979 | |||
| 77d04b76d6 | |||
| 90d9b5dce1 | |||
| 422204b779 | |||
| aec14f459c | |||
| 60d08dde8e | |||
| a0cbc2da8e | |||
| 736020248c | |||
| 5f892ebab0 | |||
| 82546bf5cc | |||
| 39141a87c7 | |||
| 07c07e5269 | |||
| 801cb74a25 | |||
| e0de290452 | |||
| 3d794f8723 | |||
| bb937c6a47 | |||
| 838d7aabe2 | |||
| 3039fb27d5 | |||
| ec00c9c49a |
2
Makefile
2
Makefile
@ -1,6 +1,6 @@
|
||||
VERSION = 3
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 6
|
||||
SUBLEVEL = 7
|
||||
EXTRAVERSION =
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
|
||||
@ -374,7 +374,7 @@ int __init pci_xen_init(void)
|
||||
|
||||
int __init pci_xen_hvm_init(void)
|
||||
{
|
||||
if (!xen_feature(XENFEAT_hvm_pirqs))
|
||||
if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
|
||||
@ -31,11 +31,6 @@ static inline u64 Maj(u64 x, u64 y, u64 z)
|
||||
return (x & y) | (z & (x | y));
|
||||
}
|
||||
|
||||
static inline u64 RORu64(u64 x, u64 y)
|
||||
{
|
||||
return (x >> y) | (x << (64 - y));
|
||||
}
|
||||
|
||||
static const u64 sha512_K[80] = {
|
||||
0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
|
||||
0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
|
||||
@ -66,10 +61,10 @@ static const u64 sha512_K[80] = {
|
||||
0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL,
|
||||
};
|
||||
|
||||
#define e0(x) (RORu64(x,28) ^ RORu64(x,34) ^ RORu64(x,39))
|
||||
#define e1(x) (RORu64(x,14) ^ RORu64(x,18) ^ RORu64(x,41))
|
||||
#define s0(x) (RORu64(x, 1) ^ RORu64(x, 8) ^ (x >> 7))
|
||||
#define s1(x) (RORu64(x,19) ^ RORu64(x,61) ^ (x >> 6))
|
||||
#define e0(x) (ror64(x,28) ^ ror64(x,34) ^ ror64(x,39))
|
||||
#define e1(x) (ror64(x,14) ^ ror64(x,18) ^ ror64(x,41))
|
||||
#define s0(x) (ror64(x, 1) ^ ror64(x, 8) ^ (x >> 7))
|
||||
#define s1(x) (ror64(x,19) ^ ror64(x,61) ^ (x >> 6))
|
||||
|
||||
static inline void LOAD_OP(int I, u64 *W, const u8 *input)
|
||||
{
|
||||
@ -78,7 +73,7 @@ static inline void LOAD_OP(int I, u64 *W, const u8 *input)
|
||||
|
||||
static inline void BLEND_OP(int I, u64 *W)
|
||||
{
|
||||
W[I % 16] += s1(W[(I-2) % 16]) + W[(I-7) % 16] + s0(W[(I-15) % 16]);
|
||||
W[I & 15] += s1(W[(I-2) & 15]) + W[(I-7) & 15] + s0(W[(I-15) & 15]);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -89,46 +84,42 @@ sha512_transform(u64 *state, const u8 *input)
|
||||
int i;
|
||||
u64 W[16];
|
||||
|
||||
/* load the input */
|
||||
for (i = 0; i < 16; i++)
|
||||
LOAD_OP(i, W, input);
|
||||
|
||||
/* load the state into our registers */
|
||||
a=state[0]; b=state[1]; c=state[2]; d=state[3];
|
||||
e=state[4]; f=state[5]; g=state[6]; h=state[7];
|
||||
|
||||
#define SHA512_0_15(i, a, b, c, d, e, f, g, h) \
|
||||
t1 = h + e1(e) + Ch(e, f, g) + sha512_K[i] + W[i]; \
|
||||
t2 = e0(a) + Maj(a, b, c); \
|
||||
d += t1; \
|
||||
h = t1 + t2
|
||||
/* now iterate */
|
||||
for (i=0; i<80; i+=8) {
|
||||
if (!(i & 8)) {
|
||||
int j;
|
||||
|
||||
#define SHA512_16_79(i, a, b, c, d, e, f, g, h) \
|
||||
BLEND_OP(i, W); \
|
||||
t1 = h + e1(e) + Ch(e, f, g) + sha512_K[i] + W[(i)%16]; \
|
||||
t2 = e0(a) + Maj(a, b, c); \
|
||||
d += t1; \
|
||||
h = t1 + t2
|
||||
if (i < 16) {
|
||||
/* load the input */
|
||||
for (j = 0; j < 16; j++)
|
||||
LOAD_OP(i + j, W, input);
|
||||
} else {
|
||||
for (j = 0; j < 16; j++) {
|
||||
BLEND_OP(i + j, W);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < 16; i += 8) {
|
||||
SHA512_0_15(i, a, b, c, d, e, f, g, h);
|
||||
SHA512_0_15(i + 1, h, a, b, c, d, e, f, g);
|
||||
SHA512_0_15(i + 2, g, h, a, b, c, d, e, f);
|
||||
SHA512_0_15(i + 3, f, g, h, a, b, c, d, e);
|
||||
SHA512_0_15(i + 4, e, f, g, h, a, b, c, d);
|
||||
SHA512_0_15(i + 5, d, e, f, g, h, a, b, c);
|
||||
SHA512_0_15(i + 6, c, d, e, f, g, h, a, b);
|
||||
SHA512_0_15(i + 7, b, c, d, e, f, g, h, a);
|
||||
}
|
||||
for (i = 16; i < 80; i += 8) {
|
||||
SHA512_16_79(i, a, b, c, d, e, f, g, h);
|
||||
SHA512_16_79(i + 1, h, a, b, c, d, e, f, g);
|
||||
SHA512_16_79(i + 2, g, h, a, b, c, d, e, f);
|
||||
SHA512_16_79(i + 3, f, g, h, a, b, c, d, e);
|
||||
SHA512_16_79(i + 4, e, f, g, h, a, b, c, d);
|
||||
SHA512_16_79(i + 5, d, e, f, g, h, a, b, c);
|
||||
SHA512_16_79(i + 6, c, d, e, f, g, h, a, b);
|
||||
SHA512_16_79(i + 7, b, c, d, e, f, g, h, a);
|
||||
t1 = h + e1(e) + Ch(e,f,g) + sha512_K[i ] + W[(i & 15)];
|
||||
t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2;
|
||||
t1 = g + e1(d) + Ch(d,e,f) + sha512_K[i+1] + W[(i & 15) + 1];
|
||||
t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2;
|
||||
t1 = f + e1(c) + Ch(c,d,e) + sha512_K[i+2] + W[(i & 15) + 2];
|
||||
t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2;
|
||||
t1 = e + e1(b) + Ch(b,c,d) + sha512_K[i+3] + W[(i & 15) + 3];
|
||||
t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2;
|
||||
t1 = d + e1(a) + Ch(a,b,c) + sha512_K[i+4] + W[(i & 15) + 4];
|
||||
t2 = e0(e) + Maj(e,f,g); h+=t1; d=t1+t2;
|
||||
t1 = c + e1(h) + Ch(h,a,b) + sha512_K[i+5] + W[(i & 15) + 5];
|
||||
t2 = e0(d) + Maj(d,e,f); g+=t1; c=t1+t2;
|
||||
t1 = b + e1(g) + Ch(g,h,a) + sha512_K[i+6] + W[(i & 15) + 6];
|
||||
t2 = e0(c) + Maj(c,d,e); f+=t1; b=t1+t2;
|
||||
t1 = a + e1(f) + Ch(f,g,h) + sha512_K[i+7] + W[(i & 15) + 7];
|
||||
t2 = e0(b) + Maj(b,c,d); e+=t1; a=t1+t2;
|
||||
}
|
||||
|
||||
state[0] += a; state[1] += b; state[2] += c; state[3] += d;
|
||||
|
||||
@ -208,17 +208,8 @@ intel_dp_link_clock(uint8_t link_bw)
|
||||
*/
|
||||
|
||||
static int
|
||||
intel_dp_link_required(struct intel_dp *intel_dp, int pixel_clock, int check_bpp)
|
||||
intel_dp_link_required(int pixel_clock, int bpp)
|
||||
{
|
||||
struct drm_crtc *crtc = intel_dp->base.base.crtc;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
int bpp = 24;
|
||||
|
||||
if (check_bpp)
|
||||
bpp = check_bpp;
|
||||
else if (intel_crtc)
|
||||
bpp = intel_crtc->bpp;
|
||||
|
||||
return (pixel_clock * bpp + 9) / 10;
|
||||
}
|
||||
|
||||
@ -245,12 +236,11 @@ intel_dp_mode_valid(struct drm_connector *connector,
|
||||
return MODE_PANEL;
|
||||
}
|
||||
|
||||
mode_rate = intel_dp_link_required(intel_dp, mode->clock, 0);
|
||||
mode_rate = intel_dp_link_required(mode->clock, 24);
|
||||
max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
|
||||
|
||||
if (mode_rate > max_rate) {
|
||||
mode_rate = intel_dp_link_required(intel_dp,
|
||||
mode->clock, 18);
|
||||
mode_rate = intel_dp_link_required(mode->clock, 18);
|
||||
if (mode_rate > max_rate)
|
||||
return MODE_CLOCK_HIGH;
|
||||
else
|
||||
@ -683,7 +673,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
|
||||
int lane_count, clock;
|
||||
int max_lane_count = intel_dp_max_lane_count(intel_dp);
|
||||
int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
|
||||
int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 0;
|
||||
int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
|
||||
static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
|
||||
|
||||
if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
|
||||
@ -701,7 +691,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
|
||||
for (clock = 0; clock <= max_clock; clock++) {
|
||||
int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
|
||||
|
||||
if (intel_dp_link_required(intel_dp, mode->clock, bpp)
|
||||
if (intel_dp_link_required(mode->clock, bpp)
|
||||
<= link_avail) {
|
||||
intel_dp->link_bw = bws[clock];
|
||||
intel_dp->lane_count = lane_count;
|
||||
|
||||
@ -692,6 +692,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = intel_no_lvds_dmi_callback,
|
||||
.ident = "AOpen i45GMx-I",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = intel_no_lvds_dmi_callback,
|
||||
.ident = "Aopen i945GTt-VFA",
|
||||
|
||||
@ -159,7 +159,7 @@ static inline void f75375_write8(struct i2c_client *client, u8 reg,
|
||||
static inline void f75375_write16(struct i2c_client *client, u8 reg,
|
||||
u16 value)
|
||||
{
|
||||
int err = i2c_smbus_write_byte_data(client, reg, (value << 8));
|
||||
int err = i2c_smbus_write_byte_data(client, reg, (value >> 8));
|
||||
if (err)
|
||||
return;
|
||||
i2c_smbus_write_byte_data(client, reg + 1, (value & 0xFF));
|
||||
@ -311,7 +311,7 @@ static int set_pwm_enable_direct(struct i2c_client *client, int nr, int val)
|
||||
fanmode |= (3 << FAN_CTRL_MODE(nr));
|
||||
break;
|
||||
case 2: /* AUTOMATIC*/
|
||||
fanmode |= (2 << FAN_CTRL_MODE(nr));
|
||||
fanmode |= (1 << FAN_CTRL_MODE(nr));
|
||||
break;
|
||||
case 3: /* fan speed */
|
||||
break;
|
||||
|
||||
@ -965,11 +965,14 @@ static void atmci_start_request(struct atmel_mci *host,
|
||||
host->data_status = 0;
|
||||
|
||||
if (host->need_reset) {
|
||||
iflags = atmci_readl(host, ATMCI_IMR);
|
||||
iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB);
|
||||
atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
|
||||
atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
|
||||
atmci_writel(host, ATMCI_MR, host->mode_reg);
|
||||
if (host->caps.has_cfg_reg)
|
||||
atmci_writel(host, ATMCI_CFG, host->cfg_reg);
|
||||
atmci_writel(host, ATMCI_IER, iflags);
|
||||
host->need_reset = false;
|
||||
}
|
||||
atmci_writel(host, ATMCI_SDCR, slot->sdc_reg);
|
||||
|
||||
@ -22,7 +22,6 @@
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/stat.h>
|
||||
@ -502,8 +501,14 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data)
|
||||
host->dir_status = DW_MCI_SEND_STATUS;
|
||||
|
||||
if (dw_mci_submit_data_dma(host, data)) {
|
||||
int flags = SG_MITER_ATOMIC;
|
||||
if (host->data->flags & MMC_DATA_READ)
|
||||
flags |= SG_MITER_TO_SG;
|
||||
else
|
||||
flags |= SG_MITER_FROM_SG;
|
||||
|
||||
sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
|
||||
host->sg = data->sg;
|
||||
host->pio_offset = 0;
|
||||
host->part_buf_start = 0;
|
||||
host->part_buf_count = 0;
|
||||
|
||||
@ -953,6 +958,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
|
||||
* generates a block interrupt, hence setting
|
||||
* the scatter-gather pointer to NULL.
|
||||
*/
|
||||
sg_miter_stop(&host->sg_miter);
|
||||
host->sg = NULL;
|
||||
ctrl = mci_readl(host, CTRL);
|
||||
ctrl |= SDMMC_CTRL_FIFO_RESET;
|
||||
@ -1286,54 +1292,44 @@ static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt)
|
||||
|
||||
static void dw_mci_read_data_pio(struct dw_mci *host)
|
||||
{
|
||||
struct scatterlist *sg = host->sg;
|
||||
void *buf = sg_virt(sg);
|
||||
unsigned int offset = host->pio_offset;
|
||||
struct sg_mapping_iter *sg_miter = &host->sg_miter;
|
||||
void *buf;
|
||||
unsigned int offset;
|
||||
struct mmc_data *data = host->data;
|
||||
int shift = host->data_shift;
|
||||
u32 status;
|
||||
unsigned int nbytes = 0, len;
|
||||
unsigned int remain, fcnt;
|
||||
|
||||
do {
|
||||
len = host->part_buf_count +
|
||||
(SDMMC_GET_FCNT(mci_readl(host, STATUS)) << shift);
|
||||
if (offset + len <= sg->length) {
|
||||
dw_mci_pull_data(host, (void *)(buf + offset), len);
|
||||
if (!sg_miter_next(sg_miter))
|
||||
goto done;
|
||||
|
||||
host->sg = sg_miter->__sg;
|
||||
buf = sg_miter->addr;
|
||||
remain = sg_miter->length;
|
||||
offset = 0;
|
||||
|
||||
do {
|
||||
fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS))
|
||||
<< shift) + host->part_buf_count;
|
||||
len = min(remain, fcnt);
|
||||
if (!len)
|
||||
break;
|
||||
dw_mci_pull_data(host, (void *)(buf + offset), len);
|
||||
offset += len;
|
||||
nbytes += len;
|
||||
|
||||
if (offset == sg->length) {
|
||||
flush_dcache_page(sg_page(sg));
|
||||
host->sg = sg = sg_next(sg);
|
||||
if (!sg)
|
||||
goto done;
|
||||
|
||||
offset = 0;
|
||||
buf = sg_virt(sg);
|
||||
}
|
||||
} else {
|
||||
unsigned int remaining = sg->length - offset;
|
||||
dw_mci_pull_data(host, (void *)(buf + offset),
|
||||
remaining);
|
||||
nbytes += remaining;
|
||||
|
||||
flush_dcache_page(sg_page(sg));
|
||||
host->sg = sg = sg_next(sg);
|
||||
if (!sg)
|
||||
goto done;
|
||||
|
||||
offset = len - remaining;
|
||||
buf = sg_virt(sg);
|
||||
dw_mci_pull_data(host, buf, offset);
|
||||
nbytes += offset;
|
||||
}
|
||||
remain -= len;
|
||||
} while (remain);
|
||||
sg_miter->consumed = offset;
|
||||
|
||||
status = mci_readl(host, MINTSTS);
|
||||
mci_writel(host, RINTSTS, SDMMC_INT_RXDR);
|
||||
if (status & DW_MCI_DATA_ERROR_FLAGS) {
|
||||
host->data_status = status;
|
||||
data->bytes_xfered += nbytes;
|
||||
sg_miter_stop(sg_miter);
|
||||
host->sg = NULL;
|
||||
smp_wmb();
|
||||
|
||||
set_bit(EVENT_DATA_ERROR, &host->pending_events);
|
||||
@ -1342,65 +1338,66 @@ static void dw_mci_read_data_pio(struct dw_mci *host)
|
||||
return;
|
||||
}
|
||||
} while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/
|
||||
host->pio_offset = offset;
|
||||
data->bytes_xfered += nbytes;
|
||||
|
||||
if (!remain) {
|
||||
if (!sg_miter_next(sg_miter))
|
||||
goto done;
|
||||
sg_miter->consumed = 0;
|
||||
}
|
||||
sg_miter_stop(sg_miter);
|
||||
return;
|
||||
|
||||
done:
|
||||
data->bytes_xfered += nbytes;
|
||||
sg_miter_stop(sg_miter);
|
||||
host->sg = NULL;
|
||||
smp_wmb();
|
||||
set_bit(EVENT_XFER_COMPLETE, &host->pending_events);
|
||||
}
|
||||
|
||||
static void dw_mci_write_data_pio(struct dw_mci *host)
|
||||
{
|
||||
struct scatterlist *sg = host->sg;
|
||||
void *buf = sg_virt(sg);
|
||||
unsigned int offset = host->pio_offset;
|
||||
struct sg_mapping_iter *sg_miter = &host->sg_miter;
|
||||
void *buf;
|
||||
unsigned int offset;
|
||||
struct mmc_data *data = host->data;
|
||||
int shift = host->data_shift;
|
||||
u32 status;
|
||||
unsigned int nbytes = 0, len;
|
||||
unsigned int fifo_depth = host->fifo_depth;
|
||||
unsigned int remain, fcnt;
|
||||
|
||||
do {
|
||||
len = ((host->fifo_depth -
|
||||
SDMMC_GET_FCNT(mci_readl(host, STATUS))) << shift)
|
||||
- host->part_buf_count;
|
||||
if (offset + len <= sg->length) {
|
||||
host->push_data(host, (void *)(buf + offset), len);
|
||||
if (!sg_miter_next(sg_miter))
|
||||
goto done;
|
||||
|
||||
host->sg = sg_miter->__sg;
|
||||
buf = sg_miter->addr;
|
||||
remain = sg_miter->length;
|
||||
offset = 0;
|
||||
|
||||
do {
|
||||
fcnt = ((fifo_depth -
|
||||
SDMMC_GET_FCNT(mci_readl(host, STATUS)))
|
||||
<< shift) - host->part_buf_count;
|
||||
len = min(remain, fcnt);
|
||||
if (!len)
|
||||
break;
|
||||
host->push_data(host, (void *)(buf + offset), len);
|
||||
offset += len;
|
||||
nbytes += len;
|
||||
if (offset == sg->length) {
|
||||
host->sg = sg = sg_next(sg);
|
||||
if (!sg)
|
||||
goto done;
|
||||
|
||||
offset = 0;
|
||||
buf = sg_virt(sg);
|
||||
}
|
||||
} else {
|
||||
unsigned int remaining = sg->length - offset;
|
||||
|
||||
host->push_data(host, (void *)(buf + offset),
|
||||
remaining);
|
||||
nbytes += remaining;
|
||||
|
||||
host->sg = sg = sg_next(sg);
|
||||
if (!sg)
|
||||
goto done;
|
||||
|
||||
offset = len - remaining;
|
||||
buf = sg_virt(sg);
|
||||
host->push_data(host, (void *)buf, offset);
|
||||
nbytes += offset;
|
||||
}
|
||||
remain -= len;
|
||||
} while (remain);
|
||||
sg_miter->consumed = offset;
|
||||
|
||||
status = mci_readl(host, MINTSTS);
|
||||
mci_writel(host, RINTSTS, SDMMC_INT_TXDR);
|
||||
if (status & DW_MCI_DATA_ERROR_FLAGS) {
|
||||
host->data_status = status;
|
||||
data->bytes_xfered += nbytes;
|
||||
sg_miter_stop(sg_miter);
|
||||
host->sg = NULL;
|
||||
|
||||
smp_wmb();
|
||||
|
||||
@ -1410,12 +1407,20 @@ static void dw_mci_write_data_pio(struct dw_mci *host)
|
||||
return;
|
||||
}
|
||||
} while (status & SDMMC_INT_TXDR); /* if TXDR write again */
|
||||
host->pio_offset = offset;
|
||||
data->bytes_xfered += nbytes;
|
||||
|
||||
if (!remain) {
|
||||
if (!sg_miter_next(sg_miter))
|
||||
goto done;
|
||||
sg_miter->consumed = 0;
|
||||
}
|
||||
sg_miter_stop(sg_miter);
|
||||
return;
|
||||
|
||||
done:
|
||||
data->bytes_xfered += nbytes;
|
||||
sg_miter_stop(sg_miter);
|
||||
host->sg = NULL;
|
||||
smp_wmb();
|
||||
set_bit(EVENT_XFER_COMPLETE, &host->pending_events);
|
||||
}
|
||||
@ -1618,6 +1623,7 @@ static void dw_mci_work_routine_card(struct work_struct *work)
|
||||
* block interrupt, hence setting the
|
||||
* scatter-gather pointer to NULL.
|
||||
*/
|
||||
sg_miter_stop(&host->sg_miter);
|
||||
host->sg = NULL;
|
||||
|
||||
ctrl = mci_readl(host, CTRL);
|
||||
|
||||
@ -4965,7 +4965,8 @@ static int igb_find_enabled_vfs(struct igb_adapter *adapter)
|
||||
vf_devfn = pdev->devfn + 0x80;
|
||||
pvfdev = pci_get_device(hw->vendor_id, device_id, NULL);
|
||||
while (pvfdev) {
|
||||
if (pvfdev->devfn == vf_devfn)
|
||||
if (pvfdev->devfn == vf_devfn &&
|
||||
(pvfdev->bus->number >= pdev->bus->number))
|
||||
vfs_found++;
|
||||
vf_devfn += vf_stride;
|
||||
pvfdev = pci_get_device(hw->vendor_id,
|
||||
|
||||
@ -67,7 +67,8 @@ static int ixgbe_find_enabled_vfs(struct ixgbe_adapter *adapter)
|
||||
vf_devfn = pdev->devfn + 0x80;
|
||||
pvfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID, device_id, NULL);
|
||||
while (pvfdev) {
|
||||
if (pvfdev->devfn == vf_devfn)
|
||||
if (pvfdev->devfn == vf_devfn &&
|
||||
(pvfdev->bus->number >= pdev->bus->number))
|
||||
vfs_found++;
|
||||
vf_devfn += 2;
|
||||
pvfdev = pci_get_device(IXGBE_INTEL_VENDOR_ID,
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
config NET_VENDOR_TOSHIBA
|
||||
bool "Toshiba devices"
|
||||
default y
|
||||
depends on PCI && (PPC_IBM_CELL_BLADE || PPC_CELLEB) || PPC_PS3
|
||||
depends on PCI && (PPC_IBM_CELL_BLADE || PPC_CELLEB || MIPS) || PPC_PS3
|
||||
---help---
|
||||
If you have a network (Ethernet) card belonging to this class, say Y
|
||||
and read the Ethernet-HOWTO, available from
|
||||
|
||||
@ -1034,13 +1034,16 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
|
||||
|
||||
/*
|
||||
* Workaround for early ACK timeouts, add an offset to match the
|
||||
* initval's 64us ack timeout value.
|
||||
* initval's 64us ack timeout value. Use 48us for the CTS timeout.
|
||||
* This was initially only meant to work around an issue with delayed
|
||||
* BA frames in some implementations, but it has been found to fix ACK
|
||||
* timeout issues in other cases as well.
|
||||
*/
|
||||
if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
|
||||
if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ) {
|
||||
acktimeout += 64 - sifstime - ah->slottime;
|
||||
ctstimeout += 48 - sifstime - ah->slottime;
|
||||
}
|
||||
|
||||
|
||||
ath9k_hw_set_sifs_time(ah, sifstime);
|
||||
ath9k_hw_setslottime(ah, slottime);
|
||||
|
||||
@ -775,6 +775,11 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
|
||||
ARRAY_SIZE(ath9k_tpt_blink));
|
||||
#endif
|
||||
|
||||
INIT_WORK(&sc->hw_reset_work, ath_reset_work);
|
||||
INIT_WORK(&sc->hw_check_work, ath_hw_check);
|
||||
INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
|
||||
INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);
|
||||
|
||||
/* Register with mac80211 */
|
||||
error = ieee80211_register_hw(hw);
|
||||
if (error)
|
||||
@ -793,10 +798,6 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
|
||||
goto error_world;
|
||||
}
|
||||
|
||||
INIT_WORK(&sc->hw_reset_work, ath_reset_work);
|
||||
INIT_WORK(&sc->hw_check_work, ath_hw_check);
|
||||
INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
|
||||
INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);
|
||||
sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
|
||||
|
||||
ath_init_leds(sc);
|
||||
|
||||
@ -824,6 +824,14 @@ static bool ath9k_rx_accept(struct ath_common *common,
|
||||
(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
|
||||
ATH9K_RXERR_KEYMISS));
|
||||
|
||||
/*
|
||||
* Key miss events are only relevant for pairwise keys where the
|
||||
* descriptor does contain a valid key index. This has been observed
|
||||
* mostly with CCMP encryption.
|
||||
*/
|
||||
if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID)
|
||||
rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;
|
||||
|
||||
if (!rx_stats->rs_datalen)
|
||||
return false;
|
||||
/*
|
||||
|
||||
@ -756,10 +756,11 @@ standard_receive3(struct TCP_Server_Info *server, struct mid_q_entry *mid)
|
||||
cifs_dump_mem("Bad SMB: ", buf,
|
||||
min_t(unsigned int, server->total_read, 48));
|
||||
|
||||
if (mid)
|
||||
handle_mid(mid, server, smb_buffer, length);
|
||||
if (!mid)
|
||||
return length;
|
||||
|
||||
return length;
|
||||
handle_mid(mid, server, smb_buffer, length);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
|
||||
@ -492,7 +492,7 @@ cifs_lookup(struct inode *parent_dir_inode, struct dentry *direntry,
|
||||
{
|
||||
int xid;
|
||||
int rc = 0; /* to get around spurious gcc warning, set to zero here */
|
||||
__u32 oplock = 0;
|
||||
__u32 oplock = enable_oplocks ? REQ_OPLOCK : 0;
|
||||
__u16 fileHandle = 0;
|
||||
bool posix_open = false;
|
||||
struct cifs_sb_info *cifs_sb;
|
||||
|
||||
@ -47,14 +47,6 @@ struct wb_writeback_work {
|
||||
struct completion *done; /* set if the caller waits */
|
||||
};
|
||||
|
||||
/*
|
||||
* Include the creation of the trace points after defining the
|
||||
* wb_writeback_work structure so that the definition remains local to this
|
||||
* file.
|
||||
*/
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include <trace/events/writeback.h>
|
||||
|
||||
/*
|
||||
* We don't actually have pdflush, but this one is exported though /proc...
|
||||
*/
|
||||
@ -87,6 +79,14 @@ static inline struct inode *wb_inode(struct list_head *head)
|
||||
return list_entry(head, struct inode, i_wb_list);
|
||||
}
|
||||
|
||||
/*
|
||||
* Include the creation of the trace points after defining the
|
||||
* wb_writeback_work structure and inline functions so that the definition
|
||||
* remains local to this file.
|
||||
*/
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include <trace/events/writeback.h>
|
||||
|
||||
/* Wakeup flusher thread or forker thread to fork it. Requires bdi->wb_lock. */
|
||||
static void bdi_wakeup_flusher(struct backing_dev_info *bdi)
|
||||
{
|
||||
|
||||
@ -49,6 +49,26 @@ static inline unsigned long hweight_long(unsigned long w)
|
||||
return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
|
||||
}
|
||||
|
||||
/**
|
||||
* rol64 - rotate a 64-bit value left
|
||||
* @word: value to rotate
|
||||
* @shift: bits to roll
|
||||
*/
|
||||
static inline __u64 rol64(__u64 word, unsigned int shift)
|
||||
{
|
||||
return (word << shift) | (word >> (64 - shift));
|
||||
}
|
||||
|
||||
/**
|
||||
* ror64 - rotate a 64-bit value right
|
||||
* @word: value to rotate
|
||||
* @shift: bits to roll
|
||||
*/
|
||||
static inline __u64 ror64(__u64 word, unsigned int shift)
|
||||
{
|
||||
return (word >> shift) | (word << (64 - shift));
|
||||
}
|
||||
|
||||
/**
|
||||
* rol32 - rotate a 32-bit value left
|
||||
* @word: value to rotate
|
||||
|
||||
@ -14,6 +14,8 @@
|
||||
#ifndef LINUX_MMC_DW_MMC_H
|
||||
#define LINUX_MMC_DW_MMC_H
|
||||
|
||||
#include <linux/scatterlist.h>
|
||||
|
||||
#define MAX_MCI_SLOTS 2
|
||||
|
||||
enum dw_mci_state {
|
||||
@ -40,7 +42,7 @@ struct mmc_data;
|
||||
* @lock: Spinlock protecting the queue and associated data.
|
||||
* @regs: Pointer to MMIO registers.
|
||||
* @sg: Scatterlist entry currently being processed by PIO code, if any.
|
||||
* @pio_offset: Offset into the current scatterlist entry.
|
||||
* @sg_miter: PIO mapping scatterlist iterator.
|
||||
* @cur_slot: The slot which is currently using the controller.
|
||||
* @mrq: The request currently being processed on @cur_slot,
|
||||
* or NULL if the controller is idle.
|
||||
@ -115,7 +117,7 @@ struct dw_mci {
|
||||
void __iomem *regs;
|
||||
|
||||
struct scatterlist *sg;
|
||||
unsigned int pio_offset;
|
||||
struct sg_mapping_iter sg_miter;
|
||||
|
||||
struct dw_mci_slot *cur_slot;
|
||||
struct mmc_request *mrq;
|
||||
|
||||
@ -81,7 +81,11 @@ void prop_inc_percpu(struct prop_descriptor *pd, struct prop_local_percpu *pl)
|
||||
* Limit the time part in order to ensure there are some bits left for the
|
||||
* cycle counter and fraction multiply.
|
||||
*/
|
||||
#if BITS_PER_LONG == 32
|
||||
#define PROP_MAX_SHIFT (3*BITS_PER_LONG/4)
|
||||
#else
|
||||
#define PROP_MAX_SHIFT (BITS_PER_LONG/2)
|
||||
#endif
|
||||
|
||||
#define PROP_FRAC_SHIFT (BITS_PER_LONG - PROP_MAX_SHIFT - 1)
|
||||
#define PROP_FRAC_BASE (1UL << PROP_FRAC_SHIFT)
|
||||
|
||||
@ -47,7 +47,10 @@ DECLARE_EVENT_CLASS(writeback_work_class,
|
||||
__field(int, reason)
|
||||
),
|
||||
TP_fast_assign(
|
||||
strncpy(__entry->name, dev_name(bdi->dev), 32);
|
||||
struct device *dev = bdi->dev;
|
||||
if (!dev)
|
||||
dev = default_backing_dev_info.dev;
|
||||
strncpy(__entry->name, dev_name(dev), 32);
|
||||
__entry->nr_pages = work->nr_pages;
|
||||
__entry->sb_dev = work->sb ? work->sb->s_dev : 0;
|
||||
__entry->sync_mode = work->sync_mode;
|
||||
@ -418,7 +421,7 @@ DECLARE_EVENT_CLASS(writeback_single_inode_template,
|
||||
|
||||
TP_fast_assign(
|
||||
strncpy(__entry->name,
|
||||
dev_name(inode->i_mapping->backing_dev_info->dev), 32);
|
||||
dev_name(inode_to_bdi(inode)->dev), 32);
|
||||
__entry->ino = inode->i_ino;
|
||||
__entry->state = inode->i_state;
|
||||
__entry->dirtied_when = inode->dirtied_when;
|
||||
|
||||
@ -164,10 +164,14 @@ depopulate:
|
||||
*/
|
||||
static struct rchan_buf *relay_create_buf(struct rchan *chan)
|
||||
{
|
||||
struct rchan_buf *buf = kzalloc(sizeof(struct rchan_buf), GFP_KERNEL);
|
||||
if (!buf)
|
||||
struct rchan_buf *buf;
|
||||
|
||||
if (chan->n_subbufs > UINT_MAX / sizeof(size_t *))
|
||||
return NULL;
|
||||
|
||||
buf = kzalloc(sizeof(struct rchan_buf), GFP_KERNEL);
|
||||
if (!buf)
|
||||
return NULL;
|
||||
buf->padding = kmalloc(chan->n_subbufs * sizeof(size_t *), GFP_KERNEL);
|
||||
if (!buf->padding)
|
||||
goto free_buf;
|
||||
@ -574,6 +578,8 @@ struct rchan *relay_open(const char *base_filename,
|
||||
|
||||
if (!(subbuf_size && n_subbufs))
|
||||
return NULL;
|
||||
if (subbuf_size > UINT_MAX / n_subbufs)
|
||||
return NULL;
|
||||
|
||||
chan = kzalloc(sizeof(struct rchan), GFP_KERNEL);
|
||||
if (!chan)
|
||||
|
||||
@ -318,7 +318,7 @@ static void wakeup_timer_fn(unsigned long data)
|
||||
if (bdi->wb.task) {
|
||||
trace_writeback_wake_thread(bdi);
|
||||
wake_up_process(bdi->wb.task);
|
||||
} else {
|
||||
} else if (bdi->dev) {
|
||||
/*
|
||||
* When bdi tasks are inactive for long time, they are killed.
|
||||
* In this case we have to wake-up the forker thread which
|
||||
@ -584,6 +584,8 @@ EXPORT_SYMBOL(bdi_register_dev);
|
||||
*/
|
||||
static void bdi_wb_shutdown(struct backing_dev_info *bdi)
|
||||
{
|
||||
struct task_struct *task;
|
||||
|
||||
if (!bdi_cap_writeback_dirty(bdi))
|
||||
return;
|
||||
|
||||
@ -604,9 +606,14 @@ static void bdi_wb_shutdown(struct backing_dev_info *bdi)
|
||||
* unfreeze of the thread before calling kthread_stop(), otherwise
|
||||
* it would never exet if it is currently stuck in the refrigerator.
|
||||
*/
|
||||
if (bdi->wb.task) {
|
||||
thaw_process(bdi->wb.task);
|
||||
kthread_stop(bdi->wb.task);
|
||||
spin_lock_bh(&bdi->wb_lock);
|
||||
task = bdi->wb.task;
|
||||
bdi->wb.task = NULL;
|
||||
spin_unlock_bh(&bdi->wb_lock);
|
||||
|
||||
if (task) {
|
||||
thaw_process(task);
|
||||
kthread_stop(task);
|
||||
}
|
||||
}
|
||||
|
||||
@ -627,7 +634,9 @@ static void bdi_prune_sb(struct backing_dev_info *bdi)
|
||||
|
||||
void bdi_unregister(struct backing_dev_info *bdi)
|
||||
{
|
||||
if (bdi->dev) {
|
||||
struct device *dev = bdi->dev;
|
||||
|
||||
if (dev) {
|
||||
bdi_set_min_ratio(bdi, 0);
|
||||
trace_writeback_bdi_unregister(bdi);
|
||||
bdi_prune_sb(bdi);
|
||||
@ -636,8 +645,12 @@ void bdi_unregister(struct backing_dev_info *bdi)
|
||||
if (!bdi_cap_flush_forker(bdi))
|
||||
bdi_wb_shutdown(bdi);
|
||||
bdi_debug_unregister(bdi);
|
||||
device_unregister(bdi->dev);
|
||||
|
||||
spin_lock_bh(&bdi->wb_lock);
|
||||
bdi->dev = NULL;
|
||||
spin_unlock_bh(&bdi->wb_lock);
|
||||
|
||||
device_unregister(dev);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(bdi_unregister);
|
||||
|
||||
@ -616,7 +616,7 @@ static void ieee80211_sta_reorder_release(struct ieee80211_hw *hw,
|
||||
index = seq_sub(tid_agg_rx->head_seq_num, tid_agg_rx->ssn) %
|
||||
tid_agg_rx->buf_size;
|
||||
if (!tid_agg_rx->reorder_buf[index] &&
|
||||
tid_agg_rx->stored_mpdu_num > 1) {
|
||||
tid_agg_rx->stored_mpdu_num) {
|
||||
/*
|
||||
* No buffers ready to be released, but check whether any
|
||||
* frames in the reorder buffer have timed out.
|
||||
|
||||
@ -4213,8 +4213,26 @@ enum {
|
||||
PINFIX_PB_M5210,
|
||||
PINFIX_ACER_ASPIRE_7736,
|
||||
PINFIX_ASUS_W90V,
|
||||
ALC889_FIXUP_DAC_ROUTE,
|
||||
};
|
||||
|
||||
/* Fix the connection of some pins for ALC889:
|
||||
* At least, Acer Aspire 5935 shows the connections to DAC3/4 don't
|
||||
* work correctly (bko#42740)
|
||||
*/
|
||||
static void alc889_fixup_dac_route(struct hda_codec *codec,
|
||||
const struct alc_fixup *fix, int action)
|
||||
{
|
||||
if (action == ALC_FIXUP_ACT_PRE_PROBE) {
|
||||
hda_nid_t conn1[2] = { 0x0c, 0x0d };
|
||||
hda_nid_t conn2[2] = { 0x0e, 0x0f };
|
||||
snd_hda_override_conn_list(codec, 0x14, 2, conn1);
|
||||
snd_hda_override_conn_list(codec, 0x15, 2, conn1);
|
||||
snd_hda_override_conn_list(codec, 0x18, 2, conn2);
|
||||
snd_hda_override_conn_list(codec, 0x1a, 2, conn2);
|
||||
}
|
||||
}
|
||||
|
||||
static const struct alc_fixup alc882_fixups[] = {
|
||||
[PINFIX_ABIT_AW9D_MAX] = {
|
||||
.type = ALC_FIXUP_PINS,
|
||||
@ -4251,10 +4269,15 @@ static const struct alc_fixup alc882_fixups[] = {
|
||||
{ }
|
||||
}
|
||||
},
|
||||
[ALC889_FIXUP_DAC_ROUTE] = {
|
||||
.type = ALC_FIXUP_FUNC,
|
||||
.v.func = alc889_fixup_dac_route,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct snd_pci_quirk alc882_fixup_tbl[] = {
|
||||
SND_PCI_QUIRK(0x1025, 0x0155, "Packard-Bell M5120", PINFIX_PB_M5210),
|
||||
SND_PCI_QUIRK(0x1025, 0x0259, "Acer Aspire 5935", ALC889_FIXUP_DAC_ROUTE),
|
||||
SND_PCI_QUIRK(0x1043, 0x1873, "ASUS W90V", PINFIX_ASUS_W90V),
|
||||
SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Y530", PINFIX_LENOVO_Y530),
|
||||
SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", PINFIX_ABIT_AW9D_MAX),
|
||||
|
||||
@ -665,6 +665,9 @@ static void via_auto_init_analog_input(struct hda_codec *codec)
|
||||
/* init input-src */
|
||||
for (i = 0; i < spec->num_adc_nids; i++) {
|
||||
int adc_idx = spec->inputs[spec->cur_mux[i]].adc_idx;
|
||||
/* secondary ADCs must have the unique MUX */
|
||||
if (i > 0 && !spec->mux_nids[i])
|
||||
break;
|
||||
if (spec->mux_nids[adc_idx]) {
|
||||
int mux_idx = spec->inputs[spec->cur_mux[i]].mux_idx;
|
||||
snd_hda_codec_write(codec, spec->mux_nids[adc_idx], 0,
|
||||
|
||||
@ -2100,6 +2100,12 @@ static struct ac97_quirk ac97_quirks[] __devinitdata = {
|
||||
.name = "MSI P4 ATX 645 Ultra",
|
||||
.type = AC97_TUNE_HP_ONLY
|
||||
},
|
||||
{
|
||||
.subvendor = 0x161f,
|
||||
.subdevice = 0x202f,
|
||||
.name = "Gateway M520",
|
||||
.type = AC97_TUNE_INV_EAPD
|
||||
},
|
||||
{
|
||||
.subvendor = 0x161f,
|
||||
.subdevice = 0x203a,
|
||||
|
||||
@ -1,2 +1,8 @@
|
||||
|
||||
#include "../../../arch/x86/lib/memcpy_64.S"
|
||||
/*
|
||||
* We need to provide note.GNU-stack section, saying that we want
|
||||
* NOT executable stack. Otherwise the final linking will assume that
|
||||
* the ELF stack should not be restricted at all and set it RWX.
|
||||
*/
|
||||
.section .note.GNU-stack,"",@progbits
|
||||
|
||||
@ -390,6 +390,7 @@ int perf_event__parse_sample(const union perf_event *event, u64 type,
|
||||
|
||||
data->cpu = data->pid = data->tid = -1;
|
||||
data->stream_id = data->id = data->time = -1ULL;
|
||||
data->period = 1;
|
||||
|
||||
if (event->header.type != PERF_RECORD_SAMPLE) {
|
||||
if (!sample_id_all)
|
||||
|
||||
Reference in New Issue
Block a user