Compare commits
49 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| cb5d016a9d | |||
| 87d6616d78 | |||
| 17b6c49b08 | |||
| a8284cfff8 | |||
| 8af6ecc2db | |||
| ec07719bcd | |||
| 88277ac7c8 | |||
| 150b065da3 | |||
| c018058de7 | |||
| 47d2e117d6 | |||
| 73933444b8 | |||
| 36fc8758ef | |||
| 0480b22114 | |||
| 720aa4d979 | |||
| 4c31498751 | |||
| 768235b2aa | |||
| 70c6cb0fad | |||
| 6a667db201 | |||
| b36aa57992 | |||
| ebf5f663ed | |||
| 0efaa26dab | |||
| c9eb7cf7f1 | |||
| ebc12d64e7 | |||
| 46848795ad | |||
| 92b23841fc | |||
| 759896fa82 | |||
| 88540ad082 | |||
| c64c7600e6 | |||
| ceeddeea91 | |||
| 0187dcdecf | |||
| 6c4c6ae572 | |||
| 14ca6ce452 | |||
| e09db64b3e | |||
| 80e84e00f9 | |||
| 72c6187f03 | |||
| ac8aa11e3d | |||
| 4e584cfe7d | |||
| c8661aaae7 | |||
| a7fac751dd | |||
| 8cf61e57d8 | |||
| 35e0251bfa | |||
| f090888f59 | |||
| ec370e27f4 | |||
| 6bd1000a33 | |||
| f38d80a51b | |||
| e87e0de4b5 | |||
| 540ce809d3 | |||
| 0b09f2d432 | |||
| 107d026ae1 |
@ -30,4 +30,6 @@ Returns: -ENODEV: PMUv3 not supported
|
||||
attribute
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||||
-EBUSY: PMUv3 already initialized
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||||
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||||
Request the initialization of the PMUv3.
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||||
Request the initialization of the PMUv3. This must be done after creating the
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||||
in-kernel irqchip. Creating a PMU with a userspace irqchip is currently not
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||||
supported.
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||||
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||||
2
Makefile
2
Makefile
@ -1,6 +1,6 @@
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||||
VERSION = 4
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||||
PATCHLEVEL = 8
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SUBLEVEL = 0
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SUBLEVEL = 2
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EXTRAVERSION =
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NAME = Psychotic Stoned Sheep
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||||
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||||
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@ -47,6 +47,8 @@
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#include "armada-39x.dtsi"
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||||
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/ {
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compatible = "marvell,armada390";
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soc {
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internal-regs {
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pinctrl@18000 {
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@ -54,4 +56,5 @@
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reg = <0x18000 0x20>;
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};
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};
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};
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};
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@ -5,6 +5,7 @@
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#include <dt-bindings/reset/qcom,gcc-msm8960.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
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#include <dt-bindings/soc/qcom,gsbi.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Qualcomm APQ8064";
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@ -559,22 +560,50 @@
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compatible = "qcom,pm8921-gpio",
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"qcom,ssbi-gpio";
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reg = <0x150>;
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interrupts = <192 1>, <193 1>, <194 1>,
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<195 1>, <196 1>, <197 1>,
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<198 1>, <199 1>, <200 1>,
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<201 1>, <202 1>, <203 1>,
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<204 1>, <205 1>, <206 1>,
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<207 1>, <208 1>, <209 1>,
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<210 1>, <211 1>, <212 1>,
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<213 1>, <214 1>, <215 1>,
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<216 1>, <217 1>, <218 1>,
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<219 1>, <220 1>, <221 1>,
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<222 1>, <223 1>, <224 1>,
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<225 1>, <226 1>, <227 1>,
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<228 1>, <229 1>, <230 1>,
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<231 1>, <232 1>, <233 1>,
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<234 1>, <235 1>;
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interrupts = <192 IRQ_TYPE_NONE>,
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<193 IRQ_TYPE_NONE>,
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<194 IRQ_TYPE_NONE>,
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<195 IRQ_TYPE_NONE>,
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<196 IRQ_TYPE_NONE>,
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<197 IRQ_TYPE_NONE>,
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<198 IRQ_TYPE_NONE>,
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<199 IRQ_TYPE_NONE>,
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<200 IRQ_TYPE_NONE>,
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<201 IRQ_TYPE_NONE>,
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<202 IRQ_TYPE_NONE>,
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<203 IRQ_TYPE_NONE>,
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<204 IRQ_TYPE_NONE>,
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<205 IRQ_TYPE_NONE>,
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<206 IRQ_TYPE_NONE>,
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<207 IRQ_TYPE_NONE>,
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<208 IRQ_TYPE_NONE>,
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<209 IRQ_TYPE_NONE>,
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<210 IRQ_TYPE_NONE>,
|
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<211 IRQ_TYPE_NONE>,
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<212 IRQ_TYPE_NONE>,
|
||||
<213 IRQ_TYPE_NONE>,
|
||||
<214 IRQ_TYPE_NONE>,
|
||||
<215 IRQ_TYPE_NONE>,
|
||||
<216 IRQ_TYPE_NONE>,
|
||||
<217 IRQ_TYPE_NONE>,
|
||||
<218 IRQ_TYPE_NONE>,
|
||||
<219 IRQ_TYPE_NONE>,
|
||||
<220 IRQ_TYPE_NONE>,
|
||||
<221 IRQ_TYPE_NONE>,
|
||||
<222 IRQ_TYPE_NONE>,
|
||||
<223 IRQ_TYPE_NONE>,
|
||||
<224 IRQ_TYPE_NONE>,
|
||||
<225 IRQ_TYPE_NONE>,
|
||||
<226 IRQ_TYPE_NONE>,
|
||||
<227 IRQ_TYPE_NONE>,
|
||||
<228 IRQ_TYPE_NONE>,
|
||||
<229 IRQ_TYPE_NONE>,
|
||||
<230 IRQ_TYPE_NONE>,
|
||||
<231 IRQ_TYPE_NONE>,
|
||||
<232 IRQ_TYPE_NONE>,
|
||||
<233 IRQ_TYPE_NONE>,
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||||
<234 IRQ_TYPE_NONE>,
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||||
<235 IRQ_TYPE_NONE>;
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gpio-controller;
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||||
#gpio-cells = <2>;
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||||
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||||
@ -587,9 +616,18 @@
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||||
gpio-controller;
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||||
#gpio-cells = <2>;
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||||
interrupts =
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<128 1>, <129 1>, <130 1>, <131 1>,
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<132 1>, <133 1>, <134 1>, <135 1>,
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||||
<136 1>, <137 1>, <138 1>, <139 1>;
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||||
<128 IRQ_TYPE_NONE>,
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||||
<129 IRQ_TYPE_NONE>,
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||||
<130 IRQ_TYPE_NONE>,
|
||||
<131 IRQ_TYPE_NONE>,
|
||||
<132 IRQ_TYPE_NONE>,
|
||||
<133 IRQ_TYPE_NONE>,
|
||||
<134 IRQ_TYPE_NONE>,
|
||||
<135 IRQ_TYPE_NONE>,
|
||||
<136 IRQ_TYPE_NONE>,
|
||||
<137 IRQ_TYPE_NONE>,
|
||||
<138 IRQ_TYPE_NONE>,
|
||||
<139 IRQ_TYPE_NONE>;
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||||
};
|
||||
|
||||
rtc@11d {
|
||||
|
||||
@ -2,6 +2,7 @@
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8660.h>
|
||||
#include <dt-bindings/soc/qcom,gsbi.h>
|
||||
@ -159,21 +160,50 @@
|
||||
"qcom,ssbi-gpio";
|
||||
reg = <0x150>;
|
||||
interrupt-parent = <&pmicintc>;
|
||||
interrupts = <192 1>, <193 1>, <194 1>,
|
||||
<195 1>, <196 1>, <197 1>,
|
||||
<198 1>, <199 1>, <200 1>,
|
||||
<201 1>, <202 1>, <203 1>,
|
||||
<204 1>, <205 1>, <206 1>,
|
||||
<207 1>, <208 1>, <209 1>,
|
||||
<210 1>, <211 1>, <212 1>,
|
||||
<213 1>, <214 1>, <215 1>,
|
||||
<216 1>, <217 1>, <218 1>,
|
||||
<219 1>, <220 1>, <221 1>,
|
||||
<222 1>, <223 1>, <224 1>,
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||||
<225 1>, <226 1>, <227 1>,
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||||
<228 1>, <229 1>, <230 1>,
|
||||
<231 1>, <232 1>, <233 1>,
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||||
<234 1>, <235 1>;
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||||
interrupts = <192 IRQ_TYPE_NONE>,
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||||
<193 IRQ_TYPE_NONE>,
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||||
<194 IRQ_TYPE_NONE>,
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||||
<195 IRQ_TYPE_NONE>,
|
||||
<196 IRQ_TYPE_NONE>,
|
||||
<197 IRQ_TYPE_NONE>,
|
||||
<198 IRQ_TYPE_NONE>,
|
||||
<199 IRQ_TYPE_NONE>,
|
||||
<200 IRQ_TYPE_NONE>,
|
||||
<201 IRQ_TYPE_NONE>,
|
||||
<202 IRQ_TYPE_NONE>,
|
||||
<203 IRQ_TYPE_NONE>,
|
||||
<204 IRQ_TYPE_NONE>,
|
||||
<205 IRQ_TYPE_NONE>,
|
||||
<206 IRQ_TYPE_NONE>,
|
||||
<207 IRQ_TYPE_NONE>,
|
||||
<208 IRQ_TYPE_NONE>,
|
||||
<209 IRQ_TYPE_NONE>,
|
||||
<210 IRQ_TYPE_NONE>,
|
||||
<211 IRQ_TYPE_NONE>,
|
||||
<212 IRQ_TYPE_NONE>,
|
||||
<213 IRQ_TYPE_NONE>,
|
||||
<214 IRQ_TYPE_NONE>,
|
||||
<215 IRQ_TYPE_NONE>,
|
||||
<216 IRQ_TYPE_NONE>,
|
||||
<217 IRQ_TYPE_NONE>,
|
||||
<218 IRQ_TYPE_NONE>,
|
||||
<219 IRQ_TYPE_NONE>,
|
||||
<220 IRQ_TYPE_NONE>,
|
||||
<221 IRQ_TYPE_NONE>,
|
||||
<222 IRQ_TYPE_NONE>,
|
||||
<223 IRQ_TYPE_NONE>,
|
||||
<224 IRQ_TYPE_NONE>,
|
||||
<225 IRQ_TYPE_NONE>,
|
||||
<226 IRQ_TYPE_NONE>,
|
||||
<227 IRQ_TYPE_NONE>,
|
||||
<228 IRQ_TYPE_NONE>,
|
||||
<229 IRQ_TYPE_NONE>,
|
||||
<230 IRQ_TYPE_NONE>,
|
||||
<231 IRQ_TYPE_NONE>,
|
||||
<232 IRQ_TYPE_NONE>,
|
||||
<233 IRQ_TYPE_NONE>,
|
||||
<234 IRQ_TYPE_NONE>,
|
||||
<235 IRQ_TYPE_NONE>;
|
||||
gpio-controller;
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||||
#gpio-cells = <2>;
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||||
|
||||
@ -187,9 +217,18 @@
|
||||
#gpio-cells = <2>;
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||||
interrupt-parent = <&pmicintc>;
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||||
interrupts =
|
||||
<128 1>, <129 1>, <130 1>, <131 1>,
|
||||
<132 1>, <133 1>, <134 1>, <135 1>,
|
||||
<136 1>, <137 1>, <138 1>, <139 1>;
|
||||
<128 IRQ_TYPE_NONE>,
|
||||
<129 IRQ_TYPE_NONE>,
|
||||
<130 IRQ_TYPE_NONE>,
|
||||
<131 IRQ_TYPE_NONE>,
|
||||
<132 IRQ_TYPE_NONE>,
|
||||
<133 IRQ_TYPE_NONE>,
|
||||
<134 IRQ_TYPE_NONE>,
|
||||
<135 IRQ_TYPE_NONE>,
|
||||
<136 IRQ_TYPE_NONE>,
|
||||
<137 IRQ_TYPE_NONE>,
|
||||
<138 IRQ_TYPE_NONE>,
|
||||
<139 IRQ_TYPE_NONE>;
|
||||
};
|
||||
|
||||
pwrkey@1c {
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
#include <asm/param.h> /* HZ */
|
||||
|
||||
#define MAX_UDELAY_MS 2
|
||||
#define UDELAY_MULT UL(2047 * HZ + 483648 * HZ / 1000000)
|
||||
#define UDELAY_MULT UL(2147 * HZ + 483648 * HZ / 1000000)
|
||||
#define UDELAY_SHIFT 31
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
@ -435,8 +435,10 @@ NOKPROBE_SYMBOL(kernel_active_single_step);
|
||||
/* ptrace API */
|
||||
void user_enable_single_step(struct task_struct *task)
|
||||
{
|
||||
set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
|
||||
set_regs_spsr_ss(task_pt_regs(task));
|
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struct thread_info *ti = task_thread_info(task);
|
||||
|
||||
if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP))
|
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set_regs_spsr_ss(task_pt_regs(task));
|
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}
|
||||
NOKPROBE_SYMBOL(user_enable_single_step);
|
||||
|
||||
|
||||
@ -43,6 +43,9 @@ int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame)
|
||||
unsigned long fp = frame->fp;
|
||||
unsigned long irq_stack_ptr;
|
||||
|
||||
if (!tsk)
|
||||
tsk = current;
|
||||
|
||||
/*
|
||||
* Switching between stacks is valid when tracing current and in
|
||||
* non-preemptible context.
|
||||
@ -67,7 +70,7 @@ int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame)
|
||||
frame->pc = READ_ONCE_NOCHECK(*(unsigned long *)(fp + 8));
|
||||
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
if (tsk && tsk->ret_stack &&
|
||||
if (tsk->ret_stack &&
|
||||
(frame->pc == (unsigned long)return_to_handler)) {
|
||||
/*
|
||||
* This is a case where function graph tracer has
|
||||
|
||||
@ -142,6 +142,11 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
|
||||
unsigned long irq_stack_ptr;
|
||||
int skip;
|
||||
|
||||
pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
|
||||
|
||||
if (!tsk)
|
||||
tsk = current;
|
||||
|
||||
/*
|
||||
* Switching between stacks is valid when tracing current and in
|
||||
* non-preemptible context.
|
||||
@ -151,11 +156,6 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
|
||||
else
|
||||
irq_stack_ptr = 0;
|
||||
|
||||
pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
|
||||
|
||||
if (!tsk)
|
||||
tsk = current;
|
||||
|
||||
if (tsk == current) {
|
||||
frame.fp = (unsigned long)__builtin_frame_address(0);
|
||||
frame.sp = current_stack_pointer;
|
||||
|
||||
@ -846,6 +846,47 @@ enum emulation_result kvm_mips_emul_tlbr(struct kvm_vcpu *vcpu)
|
||||
return EMULATE_FAIL;
|
||||
}
|
||||
|
||||
/**
|
||||
* kvm_mips_invalidate_guest_tlb() - Indicates a change in guest MMU map.
|
||||
* @vcpu: VCPU with changed mappings.
|
||||
* @tlb: TLB entry being removed.
|
||||
*
|
||||
* This is called to indicate a single change in guest MMU mappings, so that we
|
||||
* can arrange TLB flushes on this and other CPUs.
|
||||
*/
|
||||
static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu,
|
||||
struct kvm_mips_tlb *tlb)
|
||||
{
|
||||
int cpu, i;
|
||||
bool user;
|
||||
|
||||
/* No need to flush for entries which are already invalid */
|
||||
if (!((tlb->tlb_lo[0] | tlb->tlb_lo[1]) & ENTRYLO_V))
|
||||
return;
|
||||
/* User address space doesn't need flushing for KSeg2/3 changes */
|
||||
user = tlb->tlb_hi < KVM_GUEST_KSEG0;
|
||||
|
||||
preempt_disable();
|
||||
|
||||
/*
|
||||
* Probe the shadow host TLB for the entry being overwritten, if one
|
||||
* matches, invalidate it
|
||||
*/
|
||||
kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
|
||||
|
||||
/* Invalidate the whole ASID on other CPUs */
|
||||
cpu = smp_processor_id();
|
||||
for_each_possible_cpu(i) {
|
||||
if (i == cpu)
|
||||
continue;
|
||||
if (user)
|
||||
vcpu->arch.guest_user_asid[i] = 0;
|
||||
vcpu->arch.guest_kernel_asid[i] = 0;
|
||||
}
|
||||
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
/* Write Guest TLB Entry @ Index */
|
||||
enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
@ -865,11 +906,8 @@ enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
|
||||
}
|
||||
|
||||
tlb = &vcpu->arch.guest_tlb[index];
|
||||
/*
|
||||
* Probe the shadow host TLB for the entry being overwritten, if one
|
||||
* matches, invalidate it
|
||||
*/
|
||||
kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
|
||||
|
||||
kvm_mips_invalidate_guest_tlb(vcpu, tlb);
|
||||
|
||||
tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
|
||||
tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
|
||||
@ -898,11 +936,7 @@ enum emulation_result kvm_mips_emul_tlbwr(struct kvm_vcpu *vcpu)
|
||||
|
||||
tlb = &vcpu->arch.guest_tlb[index];
|
||||
|
||||
/*
|
||||
* Probe the shadow host TLB for the entry being overwritten, if one
|
||||
* matches, invalidate it
|
||||
*/
|
||||
kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
|
||||
kvm_mips_invalidate_guest_tlb(vcpu, tlb);
|
||||
|
||||
tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
|
||||
tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
|
||||
@ -1026,6 +1060,7 @@ enum emulation_result kvm_mips_emulate_CP0(union mips_instruction inst,
|
||||
enum emulation_result er = EMULATE_DONE;
|
||||
u32 rt, rd, sel;
|
||||
unsigned long curr_pc;
|
||||
int cpu, i;
|
||||
|
||||
/*
|
||||
* Update PC and hold onto current PC in case there is
|
||||
@ -1135,8 +1170,16 @@ enum emulation_result kvm_mips_emulate_CP0(union mips_instruction inst,
|
||||
& KVM_ENTRYHI_ASID,
|
||||
nasid);
|
||||
|
||||
preempt_disable();
|
||||
/* Blow away the shadow host TLBs */
|
||||
kvm_mips_flush_host_tlb(1);
|
||||
cpu = smp_processor_id();
|
||||
for_each_possible_cpu(i)
|
||||
if (i != cpu) {
|
||||
vcpu->arch.guest_user_asid[i] = 0;
|
||||
vcpu->arch.guest_kernel_asid[i] = 0;
|
||||
}
|
||||
preempt_enable();
|
||||
}
|
||||
kvm_write_c0_guest_entryhi(cop0,
|
||||
vcpu->arch.gprs[rt]);
|
||||
|
||||
@ -737,6 +737,7 @@
|
||||
#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
|
||||
#define SPRN_MMCR1 798
|
||||
#define SPRN_MMCR2 785
|
||||
#define SPRN_UMMCR2 769
|
||||
#define SPRN_MMCRA 0x312
|
||||
#define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
|
||||
#define MMCRA_SDAR_DCACHE_MISS 0x40000000UL
|
||||
|
||||
@ -498,6 +498,7 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
|
||||
case SPRN_MMCR0:
|
||||
case SPRN_MMCR1:
|
||||
case SPRN_MMCR2:
|
||||
case SPRN_UMMCR2:
|
||||
#endif
|
||||
break;
|
||||
unprivileged:
|
||||
@ -640,6 +641,7 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
|
||||
case SPRN_MMCR0:
|
||||
case SPRN_MMCR1:
|
||||
case SPRN_MMCR2:
|
||||
case SPRN_UMMCR2:
|
||||
case SPRN_TIR:
|
||||
#endif
|
||||
*spr_val = 0;
|
||||
|
||||
@ -2038,7 +2038,7 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
||||
if (type == KVMPPC_DEBUG_NONE)
|
||||
continue;
|
||||
|
||||
if (type & !(KVMPPC_DEBUG_WATCH_READ |
|
||||
if (type & ~(KVMPPC_DEBUG_WATCH_READ |
|
||||
KVMPPC_DEBUG_WATCH_WRITE |
|
||||
KVMPPC_DEBUG_BREAKPOINT))
|
||||
return -EINVAL;
|
||||
|
||||
@ -27,11 +27,12 @@
|
||||
XFEATURE_MASK_YMM | \
|
||||
XFEATURE_MASK_OPMASK | \
|
||||
XFEATURE_MASK_ZMM_Hi256 | \
|
||||
XFEATURE_MASK_Hi16_ZMM | \
|
||||
XFEATURE_MASK_PKRU)
|
||||
XFEATURE_MASK_Hi16_ZMM)
|
||||
|
||||
/* Supported features which require eager state saving */
|
||||
#define XFEATURE_MASK_EAGER (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)
|
||||
#define XFEATURE_MASK_EAGER (XFEATURE_MASK_BNDREGS | \
|
||||
XFEATURE_MASK_BNDCSR | \
|
||||
XFEATURE_MASK_PKRU)
|
||||
|
||||
/* All currently supported features */
|
||||
#define XCNTXT_MASK (XFEATURE_MASK_LAZY | XFEATURE_MASK_EAGER)
|
||||
|
||||
@ -56,8 +56,8 @@
|
||||
#define INTEL_FAM6_ATOM_SILVERMONT1 0x37 /* BayTrail/BYT / Valleyview */
|
||||
#define INTEL_FAM6_ATOM_SILVERMONT2 0x4D /* Avaton/Rangely */
|
||||
#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* CherryTrail / Braswell */
|
||||
#define INTEL_FAM6_ATOM_MERRIFIELD1 0x4A /* Tangier */
|
||||
#define INTEL_FAM6_ATOM_MERRIFIELD2 0x5A /* Annidale */
|
||||
#define INTEL_FAM6_ATOM_MERRIFIELD 0x4A /* Tangier */
|
||||
#define INTEL_FAM6_ATOM_MOOREFIELD 0x5A /* Annidale */
|
||||
#define INTEL_FAM6_ATOM_GOLDMONT 0x5C
|
||||
#define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */
|
||||
|
||||
|
||||
@ -6,7 +6,6 @@
|
||||
#include <asm/x86_init.h>
|
||||
#include <asm/apicdef.h>
|
||||
|
||||
extern int apic_version[];
|
||||
extern int pic_mode;
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
@ -40,6 +39,7 @@ extern int mp_bus_id_to_type[MAX_MP_BUSSES];
|
||||
extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
|
||||
|
||||
extern unsigned int boot_cpu_physical_apicid;
|
||||
extern u8 boot_cpu_apic_version;
|
||||
extern unsigned long mp_lapic_addr;
|
||||
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
|
||||
@ -182,7 +182,7 @@ static int acpi_register_lapic(int id, u32 acpiid, u8 enabled)
|
||||
}
|
||||
|
||||
if (boot_cpu_physical_apicid != -1U)
|
||||
ver = apic_version[boot_cpu_physical_apicid];
|
||||
ver = boot_cpu_apic_version;
|
||||
|
||||
cpu = generic_processor_info(id, ver);
|
||||
if (cpu >= 0)
|
||||
|
||||
@ -64,6 +64,8 @@ unsigned disabled_cpus;
|
||||
unsigned int boot_cpu_physical_apicid = -1U;
|
||||
EXPORT_SYMBOL_GPL(boot_cpu_physical_apicid);
|
||||
|
||||
u8 boot_cpu_apic_version;
|
||||
|
||||
/*
|
||||
* The highest APIC ID seen during enumeration.
|
||||
*/
|
||||
@ -1816,8 +1818,7 @@ void __init init_apic_mappings(void)
|
||||
* since smp_sanity_check is prepared for such a case
|
||||
* and disable smp mode
|
||||
*/
|
||||
apic_version[new_apicid] =
|
||||
GET_APIC_VERSION(apic_read(APIC_LVR));
|
||||
boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
|
||||
}
|
||||
}
|
||||
|
||||
@ -1832,13 +1833,10 @@ void __init register_lapic_address(unsigned long address)
|
||||
}
|
||||
if (boot_cpu_physical_apicid == -1U) {
|
||||
boot_cpu_physical_apicid = read_apic_id();
|
||||
apic_version[boot_cpu_physical_apicid] =
|
||||
GET_APIC_VERSION(apic_read(APIC_LVR));
|
||||
boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
|
||||
}
|
||||
}
|
||||
|
||||
int apic_version[MAX_LOCAL_APIC];
|
||||
|
||||
/*
|
||||
* Local APIC interrupts
|
||||
*/
|
||||
@ -2130,11 +2128,10 @@ int generic_processor_info(int apicid, int version)
|
||||
cpu, apicid);
|
||||
version = 0x10;
|
||||
}
|
||||
apic_version[apicid] = version;
|
||||
|
||||
if (version != apic_version[boot_cpu_physical_apicid]) {
|
||||
if (version != boot_cpu_apic_version) {
|
||||
pr_warning("BIOS bug: APIC version mismatch, boot CPU: %x, CPU %d: version %x\n",
|
||||
apic_version[boot_cpu_physical_apicid], cpu, version);
|
||||
boot_cpu_apic_version, cpu, version);
|
||||
}
|
||||
|
||||
physid_set(apicid, phys_cpu_present_map);
|
||||
@ -2277,7 +2274,7 @@ int __init APIC_init_uniprocessor(void)
|
||||
* Complain if the BIOS pretends there is one.
|
||||
*/
|
||||
if (!boot_cpu_has(X86_FEATURE_APIC) &&
|
||||
APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
|
||||
APIC_INTEGRATED(boot_cpu_apic_version)) {
|
||||
pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
|
||||
boot_cpu_physical_apicid);
|
||||
return -1;
|
||||
|
||||
@ -1593,7 +1593,7 @@ void __init setup_ioapic_ids_from_mpc(void)
|
||||
* no meaning without the serial APIC bus.
|
||||
*/
|
||||
if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
|
||||
|| APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
|
||||
|| APIC_XAPIC(boot_cpu_apic_version))
|
||||
return;
|
||||
setup_ioapic_ids_from_mpc_nocheck();
|
||||
}
|
||||
@ -2423,7 +2423,7 @@ static int io_apic_get_unique_id(int ioapic, int apic_id)
|
||||
static u8 io_apic_unique_id(int idx, u8 id)
|
||||
{
|
||||
if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
|
||||
!APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
|
||||
!APIC_XAPIC(boot_cpu_apic_version))
|
||||
return io_apic_get_unique_id(idx, id);
|
||||
else
|
||||
return id;
|
||||
|
||||
@ -152,7 +152,7 @@ early_param("apic", parse_apic);
|
||||
|
||||
void __init default_setup_apic_routing(void)
|
||||
{
|
||||
int version = apic_version[boot_cpu_physical_apicid];
|
||||
int version = boot_cpu_apic_version;
|
||||
|
||||
if (num_possible_cpus() > 8) {
|
||||
switch (boot_cpu_data.x86_vendor) {
|
||||
|
||||
@ -661,11 +661,28 @@ void irq_complete_move(struct irq_cfg *cfg)
|
||||
*/
|
||||
void irq_force_complete_move(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_data *irqdata = irq_desc_get_irq_data(desc);
|
||||
struct apic_chip_data *data = apic_chip_data(irqdata);
|
||||
struct irq_cfg *cfg = data ? &data->cfg : NULL;
|
||||
struct irq_data *irqdata;
|
||||
struct apic_chip_data *data;
|
||||
struct irq_cfg *cfg;
|
||||
unsigned int cpu;
|
||||
|
||||
/*
|
||||
* The function is called for all descriptors regardless of which
|
||||
* irqdomain they belong to. For example if an IRQ is provided by
|
||||
* an irq_chip as part of a GPIO driver, the chip data for that
|
||||
* descriptor is specific to the irq_chip in question.
|
||||
*
|
||||
* Check first that the chip_data is what we expect
|
||||
* (apic_chip_data) before touching it any further.
|
||||
*/
|
||||
irqdata = irq_domain_get_irq_data(x86_vector_domain,
|
||||
irq_desc_get_irq(desc));
|
||||
if (!irqdata)
|
||||
return;
|
||||
|
||||
data = apic_chip_data(irqdata);
|
||||
cfg = data ? &data->cfg : NULL;
|
||||
|
||||
if (!cfg)
|
||||
return;
|
||||
|
||||
|
||||
@ -348,7 +348,7 @@ int __init sanitize_e820_map(struct e820entry *biosmap, int max_nr_map,
|
||||
* continue building up new bios map based on this
|
||||
* information
|
||||
*/
|
||||
if (current_type != last_type || current_type == E820_PRAM) {
|
||||
if (current_type != last_type) {
|
||||
if (last_type != 0) {
|
||||
new_bios[new_bios_entry].size =
|
||||
change_point[chgidx]->addr - last_addr;
|
||||
@ -754,7 +754,7 @@ u64 __init early_reserve_e820(u64 size, u64 align)
|
||||
/*
|
||||
* Find the highest page frame number we have available
|
||||
*/
|
||||
static unsigned long __init e820_end_pfn(unsigned long limit_pfn)
|
||||
static unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type)
|
||||
{
|
||||
int i;
|
||||
unsigned long last_pfn = 0;
|
||||
@ -765,11 +765,7 @@ static unsigned long __init e820_end_pfn(unsigned long limit_pfn)
|
||||
unsigned long start_pfn;
|
||||
unsigned long end_pfn;
|
||||
|
||||
/*
|
||||
* Persistent memory is accounted as ram for purposes of
|
||||
* establishing max_pfn and mem_map.
|
||||
*/
|
||||
if (ei->type != E820_RAM && ei->type != E820_PRAM)
|
||||
if (ei->type != type)
|
||||
continue;
|
||||
|
||||
start_pfn = ei->addr >> PAGE_SHIFT;
|
||||
@ -794,12 +790,12 @@ static unsigned long __init e820_end_pfn(unsigned long limit_pfn)
|
||||
}
|
||||
unsigned long __init e820_end_of_ram_pfn(void)
|
||||
{
|
||||
return e820_end_pfn(MAX_ARCH_PFN);
|
||||
return e820_end_pfn(MAX_ARCH_PFN, E820_RAM);
|
||||
}
|
||||
|
||||
unsigned long __init e820_end_of_low_ram_pfn(void)
|
||||
{
|
||||
return e820_end_pfn(1UL << (32-PAGE_SHIFT));
|
||||
return e820_end_pfn(1UL << (32 - PAGE_SHIFT), E820_RAM);
|
||||
}
|
||||
|
||||
static void early_panic(char *msg)
|
||||
|
||||
@ -110,12 +110,13 @@ void __show_regs(struct pt_regs *regs, int all)
|
||||
get_debugreg(d7, 7);
|
||||
|
||||
/* Only print out debug registers if they are in their non-default state. */
|
||||
if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
|
||||
(d6 == DR6_RESERVED) && (d7 == 0x400))
|
||||
return;
|
||||
|
||||
printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
|
||||
printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
|
||||
if (!((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
|
||||
(d6 == DR6_RESERVED) && (d7 == 0x400))) {
|
||||
printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n",
|
||||
d0, d1, d2);
|
||||
printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n",
|
||||
d3, d6, d7);
|
||||
}
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_OSPKE))
|
||||
printk(KERN_DEFAULT "PKRU: %08x\n", read_pkru());
|
||||
|
||||
@ -173,8 +173,8 @@ unsigned long kernel_stack_pointer(struct pt_regs *regs)
|
||||
return sp;
|
||||
|
||||
prev_esp = (u32 *)(context);
|
||||
if (prev_esp)
|
||||
return (unsigned long)prev_esp;
|
||||
if (*prev_esp)
|
||||
return (unsigned long)*prev_esp;
|
||||
|
||||
return (unsigned long)regs;
|
||||
}
|
||||
|
||||
@ -690,7 +690,7 @@ wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
udelay(200);
|
||||
if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
|
||||
if (APIC_INTEGRATED(boot_cpu_apic_version)) {
|
||||
maxlvt = lapic_get_maxlvt();
|
||||
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
|
||||
apic_write(APIC_ESR, 0);
|
||||
@ -717,7 +717,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[phys_apicid])) {
|
||||
if (APIC_INTEGRATED(boot_cpu_apic_version)) {
|
||||
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
@ -756,7 +756,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
|
||||
* Determine this based on the APIC version.
|
||||
* If we don't have an integrated APIC, don't send the STARTUP IPIs.
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[phys_apicid]))
|
||||
if (APIC_INTEGRATED(boot_cpu_apic_version))
|
||||
num_starts = 2;
|
||||
else
|
||||
num_starts = 0;
|
||||
@ -994,7 +994,7 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
|
||||
if (APIC_INTEGRATED(boot_cpu_apic_version)) {
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
}
|
||||
@ -1249,7 +1249,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
|
||||
/*
|
||||
* If we couldn't find a local APIC, then get out of here now!
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
|
||||
if (APIC_INTEGRATED(boot_cpu_apic_version) &&
|
||||
!boot_cpu_has(X86_FEATURE_APIC)) {
|
||||
if (!disable_apic) {
|
||||
pr_err("BIOS bug, local APIC #%d not detected!...\n",
|
||||
@ -1406,9 +1406,21 @@ __init void prefill_possible_map(void)
|
||||
{
|
||||
int i, possible;
|
||||
|
||||
/* no processor from mptable or madt */
|
||||
if (!num_processors)
|
||||
num_processors = 1;
|
||||
/* No boot processor was found in mptable or ACPI MADT */
|
||||
if (!num_processors) {
|
||||
int apicid = boot_cpu_physical_apicid;
|
||||
int cpu = hard_smp_processor_id();
|
||||
|
||||
pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);
|
||||
|
||||
/* Make sure boot cpu is enumerated */
|
||||
if (apic->cpu_present_to_apicid(0) == BAD_APICID &&
|
||||
apic->apic_id_valid(apicid))
|
||||
generic_processor_info(apicid, boot_cpu_apic_version);
|
||||
|
||||
if (!num_processors)
|
||||
num_processors = 1;
|
||||
}
|
||||
|
||||
i = setup_max_cpus ?: 1;
|
||||
if (setup_possible_cpus == -1) {
|
||||
|
||||
@ -155,7 +155,7 @@ static void punit_dbgfs_unregister(void)
|
||||
|
||||
static const struct x86_cpu_id intel_punit_cpu_ids[] = {
|
||||
ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
|
||||
ICPU(INTEL_FAM6_ATOM_MERRIFIELD1, punit_device_tng),
|
||||
ICPU(INTEL_FAM6_ATOM_MERRIFIELD, punit_device_tng),
|
||||
ICPU(INTEL_FAM6_ATOM_AIRMONT, punit_device_cht),
|
||||
{}
|
||||
};
|
||||
|
||||
@ -354,7 +354,7 @@ static int mid_pwr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mid_set_initial_state(struct mid_pwr *pwr)
|
||||
static int mid_set_initial_state(struct mid_pwr *pwr, const u32 *states)
|
||||
{
|
||||
unsigned int i, j;
|
||||
int ret;
|
||||
@ -379,10 +379,10 @@ static int mid_set_initial_state(struct mid_pwr *pwr)
|
||||
* NOTE: The actual device mapping is provided by a platform at run
|
||||
* time using vendor capability of PCI configuration space.
|
||||
*/
|
||||
mid_pwr_set_state(pwr, 0, 0xffffffff);
|
||||
mid_pwr_set_state(pwr, 1, 0xffffffff);
|
||||
mid_pwr_set_state(pwr, 2, 0xffffffff);
|
||||
mid_pwr_set_state(pwr, 3, 0xffffffff);
|
||||
mid_pwr_set_state(pwr, 0, states[0]);
|
||||
mid_pwr_set_state(pwr, 1, states[1]);
|
||||
mid_pwr_set_state(pwr, 2, states[2]);
|
||||
mid_pwr_set_state(pwr, 3, states[3]);
|
||||
|
||||
/* Send command to SCU */
|
||||
ret = mid_pwr_wait_for_cmd(pwr, CMD_SET_CFG);
|
||||
@ -397,13 +397,41 @@ static int mid_set_initial_state(struct mid_pwr *pwr)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct mid_pwr_device_info mid_info = {
|
||||
.set_initial_state = mid_set_initial_state,
|
||||
static int pnw_set_initial_state(struct mid_pwr *pwr)
|
||||
{
|
||||
/* On Penwell SRAM must stay powered on */
|
||||
const u32 states[] = {
|
||||
0xf00fffff, /* PM_SSC(0) */
|
||||
0xffffffff, /* PM_SSC(1) */
|
||||
0xffffffff, /* PM_SSC(2) */
|
||||
0xffffffff, /* PM_SSC(3) */
|
||||
};
|
||||
return mid_set_initial_state(pwr, states);
|
||||
}
|
||||
|
||||
static int tng_set_initial_state(struct mid_pwr *pwr)
|
||||
{
|
||||
const u32 states[] = {
|
||||
0xffffffff, /* PM_SSC(0) */
|
||||
0xffffffff, /* PM_SSC(1) */
|
||||
0xffffffff, /* PM_SSC(2) */
|
||||
0xffffffff, /* PM_SSC(3) */
|
||||
};
|
||||
return mid_set_initial_state(pwr, states);
|
||||
}
|
||||
|
||||
static const struct mid_pwr_device_info pnw_info = {
|
||||
.set_initial_state = pnw_set_initial_state,
|
||||
};
|
||||
|
||||
static const struct mid_pwr_device_info tng_info = {
|
||||
.set_initial_state = tng_set_initial_state,
|
||||
};
|
||||
|
||||
/* This table should be in sync with the one in drivers/pci/pci-mid.c */
|
||||
static const struct pci_device_id mid_pwr_pci_ids[] = {
|
||||
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PENWELL), (kernel_ulong_t)&mid_info },
|
||||
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_TANGIER), (kernel_ulong_t)&mid_info },
|
||||
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PENWELL), (kernel_ulong_t)&pnw_info },
|
||||
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_TANGIER), (kernel_ulong_t)&tng_info },
|
||||
{}
|
||||
};
|
||||
|
||||
|
||||
@ -87,6 +87,12 @@ static void cpu_bringup(void)
|
||||
cpu_data(cpu).x86_max_cores = 1;
|
||||
set_cpu_sibling_map(cpu);
|
||||
|
||||
/*
|
||||
* identify_cpu() may have set logical_pkg_id to -1 due
|
||||
* to incorrect phys_proc_id. Let's re-comupte it.
|
||||
*/
|
||||
topology_update_package_map(apic->cpu_present_to_apicid(cpu), cpu);
|
||||
|
||||
xen_setup_cpu_clockevents();
|
||||
|
||||
notify_cpu_starting(cpu);
|
||||
|
||||
@ -251,6 +251,7 @@ static const struct usb_device_id blacklist_table[] = {
|
||||
{ USB_DEVICE(0x0cf3, 0xe300), .driver_info = BTUSB_QCA_ROME },
|
||||
{ USB_DEVICE(0x0cf3, 0xe360), .driver_info = BTUSB_QCA_ROME },
|
||||
{ USB_DEVICE(0x0489, 0xe092), .driver_info = BTUSB_QCA_ROME },
|
||||
{ USB_DEVICE(0x04ca, 0x3011), .driver_info = BTUSB_QCA_ROME },
|
||||
|
||||
/* Broadcom BCM2035 */
|
||||
{ USB_DEVICE(0x0a5c, 0x2009), .driver_info = BTUSB_BCM92035 },
|
||||
|
||||
@ -145,7 +145,7 @@ static ssize_t tpm_write(struct file *file, const char __user *buf,
|
||||
return -EPIPE;
|
||||
}
|
||||
out_size = tpm_transmit(priv->chip, priv->data_buffer,
|
||||
sizeof(priv->data_buffer));
|
||||
sizeof(priv->data_buffer), 0);
|
||||
|
||||
tpm_put_ops(priv->chip);
|
||||
if (out_size < 0) {
|
||||
|
||||
@ -330,8 +330,8 @@ EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration);
|
||||
/*
|
||||
* Internal kernel interface to transmit TPM commands
|
||||
*/
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
|
||||
size_t bufsiz)
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const u8 *buf, size_t bufsiz,
|
||||
unsigned int flags)
|
||||
{
|
||||
ssize_t rc;
|
||||
u32 count, ordinal;
|
||||
@ -350,7 +350,8 @@ ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
|
||||
return -E2BIG;
|
||||
}
|
||||
|
||||
mutex_lock(&chip->tpm_mutex);
|
||||
if (!(flags & TPM_TRANSMIT_UNLOCKED))
|
||||
mutex_lock(&chip->tpm_mutex);
|
||||
|
||||
rc = chip->ops->send(chip, (u8 *) buf, count);
|
||||
if (rc < 0) {
|
||||
@ -393,20 +394,21 @@ out_recv:
|
||||
dev_err(&chip->dev,
|
||||
"tpm_transmit: tpm_recv: error %zd\n", rc);
|
||||
out:
|
||||
mutex_unlock(&chip->tpm_mutex);
|
||||
if (!(flags & TPM_TRANSMIT_UNLOCKED))
|
||||
mutex_unlock(&chip->tpm_mutex);
|
||||
return rc;
|
||||
}
|
||||
|
||||
#define TPM_DIGEST_SIZE 20
|
||||
#define TPM_RET_CODE_IDX 6
|
||||
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, void *cmd,
|
||||
int len, const char *desc)
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, const void *cmd,
|
||||
int len, unsigned int flags, const char *desc)
|
||||
{
|
||||
struct tpm_output_header *header;
|
||||
const struct tpm_output_header *header;
|
||||
int err;
|
||||
|
||||
len = tpm_transmit(chip, (u8 *) cmd, len);
|
||||
len = tpm_transmit(chip, (const u8 *)cmd, len, flags);
|
||||
if (len < 0)
|
||||
return len;
|
||||
else if (len < TPM_HEADER_SIZE)
|
||||
@ -453,7 +455,8 @@ ssize_t tpm_getcap(struct tpm_chip *chip, __be32 subcap_id, cap_t *cap,
|
||||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = subcap_id;
|
||||
}
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, desc);
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
desc);
|
||||
if (!rc)
|
||||
*cap = tpm_cmd.params.getcap_out.cap;
|
||||
return rc;
|
||||
@ -469,7 +472,7 @@ void tpm_gen_interrupt(struct tpm_chip *chip)
|
||||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
"attempting to determine the timeouts");
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tpm_gen_interrupt);
|
||||
@ -490,7 +493,7 @@ static int tpm_startup(struct tpm_chip *chip, __be16 startup_type)
|
||||
start_cmd.header.in = tpm_startup_header;
|
||||
|
||||
start_cmd.params.startup_in.startup_type = startup_type;
|
||||
return tpm_transmit_cmd(chip, &start_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
return tpm_transmit_cmd(chip, &start_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
"attempting to start the TPM");
|
||||
}
|
||||
|
||||
@ -521,7 +524,8 @@ int tpm_get_timeouts(struct tpm_chip *chip)
|
||||
tpm_cmd.params.getcap_in.cap = TPM_CAP_PROP;
|
||||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT;
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, NULL);
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
NULL);
|
||||
|
||||
if (rc == TPM_ERR_INVALID_POSTINIT) {
|
||||
/* The TPM is not started, we are the first to talk to it.
|
||||
@ -535,7 +539,7 @@ int tpm_get_timeouts(struct tpm_chip *chip)
|
||||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_TIMEOUT;
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
NULL);
|
||||
0, NULL);
|
||||
}
|
||||
if (rc) {
|
||||
dev_err(&chip->dev,
|
||||
@ -596,7 +600,7 @@ duration:
|
||||
tpm_cmd.params.getcap_in.subcap_size = cpu_to_be32(4);
|
||||
tpm_cmd.params.getcap_in.subcap = TPM_CAP_PROP_TIS_DURATION;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &tpm_cmd, TPM_INTERNAL_RESULT_SIZE, 0,
|
||||
"attempting to determine the durations");
|
||||
if (rc)
|
||||
return rc;
|
||||
@ -652,7 +656,7 @@ static int tpm_continue_selftest(struct tpm_chip *chip)
|
||||
struct tpm_cmd_t cmd;
|
||||
|
||||
cmd.header.in = continue_selftest_header;
|
||||
rc = tpm_transmit_cmd(chip, &cmd, CONTINUE_SELFTEST_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, CONTINUE_SELFTEST_RESULT_SIZE, 0,
|
||||
"continue selftest");
|
||||
return rc;
|
||||
}
|
||||
@ -672,7 +676,7 @@ int tpm_pcr_read_dev(struct tpm_chip *chip, int pcr_idx, u8 *res_buf)
|
||||
|
||||
cmd.header.in = pcrread_header;
|
||||
cmd.params.pcrread_in.pcr_idx = cpu_to_be32(pcr_idx);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE, 0,
|
||||
"attempting to read a pcr value");
|
||||
|
||||
if (rc == 0)
|
||||
@ -770,7 +774,7 @@ int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash)
|
||||
cmd.header.in = pcrextend_header;
|
||||
cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(pcr_idx);
|
||||
memcpy(cmd.params.pcrextend_in.hash, hash, TPM_DIGEST_SIZE);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, 0,
|
||||
"attempting extend a PCR value");
|
||||
|
||||
tpm_put_ops(chip);
|
||||
@ -809,7 +813,7 @@ int tpm_do_selftest(struct tpm_chip *chip)
|
||||
/* Attempt to read a PCR value */
|
||||
cmd.header.in = pcrread_header;
|
||||
cmd.params.pcrread_in.pcr_idx = cpu_to_be32(0);
|
||||
rc = tpm_transmit(chip, (u8 *) &cmd, READ_PCR_RESULT_SIZE);
|
||||
rc = tpm_transmit(chip, (u8 *) &cmd, READ_PCR_RESULT_SIZE, 0);
|
||||
/* Some buggy TPMs will not respond to tpm_tis_ready() for
|
||||
* around 300ms while the self test is ongoing, keep trying
|
||||
* until the self test duration expires. */
|
||||
@ -879,7 +883,7 @@ int tpm_send(u32 chip_num, void *cmd, size_t buflen)
|
||||
if (chip == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, cmd, buflen, "attempting tpm_cmd");
|
||||
rc = tpm_transmit_cmd(chip, cmd, buflen, 0, "attempting tpm_cmd");
|
||||
|
||||
tpm_put_ops(chip);
|
||||
return rc;
|
||||
@ -981,14 +985,15 @@ int tpm_pm_suspend(struct device *dev)
|
||||
cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(tpm_suspend_pcr);
|
||||
memcpy(cmd.params.pcrextend_in.hash, dummy_hash,
|
||||
TPM_DIGEST_SIZE);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, 0,
|
||||
"extending dummy pcr before suspend");
|
||||
}
|
||||
|
||||
/* now do the actual savestate */
|
||||
for (try = 0; try < TPM_RETRY; try++) {
|
||||
cmd.header.in = savestate_header;
|
||||
rc = tpm_transmit_cmd(chip, &cmd, SAVESTATE_RESULT_SIZE, NULL);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, SAVESTATE_RESULT_SIZE, 0,
|
||||
NULL);
|
||||
|
||||
/*
|
||||
* If the TPM indicates that it is too busy to respond to
|
||||
@ -1072,8 +1077,8 @@ int tpm_get_random(u32 chip_num, u8 *out, size_t max)
|
||||
tpm_cmd.params.getrandom_in.num_bytes = cpu_to_be32(num_bytes);
|
||||
|
||||
err = tpm_transmit_cmd(chip, &tpm_cmd,
|
||||
TPM_GETRANDOM_RESULT_SIZE + num_bytes,
|
||||
"attempting get random");
|
||||
TPM_GETRANDOM_RESULT_SIZE + num_bytes,
|
||||
0, "attempting get random");
|
||||
if (err)
|
||||
break;
|
||||
|
||||
|
||||
@ -39,7 +39,7 @@ static ssize_t pubek_show(struct device *dev, struct device_attribute *attr,
|
||||
struct tpm_chip *chip = to_tpm_chip(dev);
|
||||
|
||||
tpm_cmd.header.in = tpm_readpubek_header;
|
||||
err = tpm_transmit_cmd(chip, &tpm_cmd, READ_PUBEK_RESULT_SIZE,
|
||||
err = tpm_transmit_cmd(chip, &tpm_cmd, READ_PUBEK_RESULT_SIZE, 0,
|
||||
"attempting to read the PUBEK");
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
@ -476,12 +476,16 @@ extern dev_t tpm_devt;
|
||||
extern const struct file_operations tpm_fops;
|
||||
extern struct idr dev_nums_idr;
|
||||
|
||||
enum tpm_transmit_flags {
|
||||
TPM_TRANSMIT_UNLOCKED = BIT(0),
|
||||
};
|
||||
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const u8 *buf, size_t bufsiz,
|
||||
unsigned int flags);
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, const void *cmd, int len,
|
||||
unsigned int flags, const char *desc);
|
||||
ssize_t tpm_getcap(struct tpm_chip *chip, __be32 subcap_id, cap_t *cap,
|
||||
const char *desc);
|
||||
ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf,
|
||||
size_t bufsiz);
|
||||
ssize_t tpm_transmit_cmd(struct tpm_chip *chip, void *cmd, int len,
|
||||
const char *desc);
|
||||
extern int tpm_get_timeouts(struct tpm_chip *);
|
||||
extern void tpm_gen_interrupt(struct tpm_chip *);
|
||||
int tpm1_auto_startup(struct tpm_chip *chip);
|
||||
|
||||
@ -282,7 +282,7 @@ int tpm2_pcr_read(struct tpm_chip *chip, int pcr_idx, u8 *res_buf)
|
||||
sizeof(cmd.params.pcrread_in.pcr_select));
|
||||
cmd.params.pcrread_in.pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting to read a pcr value");
|
||||
if (rc == 0) {
|
||||
buf = cmd.params.pcrread_out.digest;
|
||||
@ -330,7 +330,7 @@ int tpm2_pcr_extend(struct tpm_chip *chip, int pcr_idx, const u8 *hash)
|
||||
cmd.params.pcrextend_in.hash_alg = cpu_to_be16(TPM2_ALG_SHA1);
|
||||
memcpy(cmd.params.pcrextend_in.digest, hash, TPM_DIGEST_SIZE);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting extend a PCR value");
|
||||
|
||||
return rc;
|
||||
@ -376,7 +376,7 @@ int tpm2_get_random(struct tpm_chip *chip, u8 *out, size_t max)
|
||||
cmd.header.in = tpm2_getrandom_header;
|
||||
cmd.params.getrandom_in.size = cpu_to_be16(num_bytes);
|
||||
|
||||
err = tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
err = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting get random");
|
||||
if (err)
|
||||
break;
|
||||
@ -434,12 +434,12 @@ static void tpm2_buf_append_auth(struct tpm_buf *buf, u32 session_handle,
|
||||
}
|
||||
|
||||
/**
|
||||
* tpm2_seal_trusted() - seal a trusted key
|
||||
* @chip_num: A specific chip number for the request or TPM_ANY_NUM
|
||||
* @options: authentication values and other options
|
||||
* tpm2_seal_trusted() - seal the payload of a trusted key
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Returns < 0 on error and 0 on success.
|
||||
* Return: < 0 on error and 0 on success.
|
||||
*/
|
||||
int tpm2_seal_trusted(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
@ -512,7 +512,7 @@ int tpm2_seal_trusted(struct tpm_chip *chip,
|
||||
goto out;
|
||||
}
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "sealing data");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, 0, "sealing data");
|
||||
if (rc)
|
||||
goto out;
|
||||
|
||||
@ -538,10 +538,18 @@ out:
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int tpm2_load(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 *blob_handle)
|
||||
/**
|
||||
* tpm2_load_cmd() - execute a TPM2_Load command
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Return: same as with tpm_transmit_cmd
|
||||
*/
|
||||
static int tpm2_load_cmd(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 *blob_handle, unsigned int flags)
|
||||
{
|
||||
struct tpm_buf buf;
|
||||
unsigned int private_len;
|
||||
@ -576,7 +584,7 @@ static int tpm2_load(struct tpm_chip *chip,
|
||||
goto out;
|
||||
}
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "loading blob");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, flags, "loading blob");
|
||||
if (!rc)
|
||||
*blob_handle = be32_to_cpup(
|
||||
(__be32 *) &buf.data[TPM_HEADER_SIZE]);
|
||||
@ -590,7 +598,16 @@ out:
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
|
||||
/**
|
||||
* tpm2_flush_context_cmd() - execute a TPM2_FlushContext command
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Return: same as with tpm_transmit_cmd
|
||||
*/
|
||||
static void tpm2_flush_context_cmd(struct tpm_chip *chip, u32 handle,
|
||||
unsigned int flags)
|
||||
{
|
||||
struct tpm_buf buf;
|
||||
int rc;
|
||||
@ -604,7 +621,8 @@ static void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
|
||||
|
||||
tpm_buf_append_u32(&buf, handle);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "flushing context");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, flags,
|
||||
"flushing context");
|
||||
if (rc)
|
||||
dev_warn(&chip->dev, "0x%08x was not flushed, rc=%d\n", handle,
|
||||
rc);
|
||||
@ -612,10 +630,18 @@ static void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
|
||||
tpm_buf_destroy(&buf);
|
||||
}
|
||||
|
||||
static int tpm2_unseal(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 blob_handle)
|
||||
/**
|
||||
* tpm2_unseal_cmd() - execute a TPM2_Unload command
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Return: same as with tpm_transmit_cmd
|
||||
*/
|
||||
static int tpm2_unseal_cmd(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
struct trusted_key_options *options,
|
||||
u32 blob_handle, unsigned int flags)
|
||||
{
|
||||
struct tpm_buf buf;
|
||||
u16 data_len;
|
||||
@ -635,7 +661,7 @@ static int tpm2_unseal(struct tpm_chip *chip,
|
||||
options->blobauth /* hmac */,
|
||||
TPM_DIGEST_SIZE);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, "unsealing");
|
||||
rc = tpm_transmit_cmd(chip, buf.data, PAGE_SIZE, flags, "unsealing");
|
||||
if (rc > 0)
|
||||
rc = -EPERM;
|
||||
|
||||
@ -654,12 +680,12 @@ static int tpm2_unseal(struct tpm_chip *chip,
|
||||
}
|
||||
|
||||
/**
|
||||
* tpm_unseal_trusted() - unseal a trusted key
|
||||
* @chip_num: A specific chip number for the request or TPM_ANY_NUM
|
||||
* @options: authentication values and other options
|
||||
* tpm_unseal_trusted() - unseal the payload of a trusted key
|
||||
* @chip_num: TPM chip to use
|
||||
* @payload: the key data in clear and encrypted form
|
||||
* @options: authentication values and other options
|
||||
*
|
||||
* Returns < 0 on error and 0 on success.
|
||||
* Return: < 0 on error and 0 on success.
|
||||
*/
|
||||
int tpm2_unseal_trusted(struct tpm_chip *chip,
|
||||
struct trusted_key_payload *payload,
|
||||
@ -668,14 +694,17 @@ int tpm2_unseal_trusted(struct tpm_chip *chip,
|
||||
u32 blob_handle;
|
||||
int rc;
|
||||
|
||||
rc = tpm2_load(chip, payload, options, &blob_handle);
|
||||
mutex_lock(&chip->tpm_mutex);
|
||||
rc = tpm2_load_cmd(chip, payload, options, &blob_handle,
|
||||
TPM_TRANSMIT_UNLOCKED);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = tpm2_unseal(chip, payload, options, blob_handle);
|
||||
|
||||
tpm2_flush_context(chip, blob_handle);
|
||||
goto out;
|
||||
|
||||
rc = tpm2_unseal_cmd(chip, payload, options, blob_handle,
|
||||
TPM_TRANSMIT_UNLOCKED);
|
||||
tpm2_flush_context_cmd(chip, blob_handle, TPM_TRANSMIT_UNLOCKED);
|
||||
out:
|
||||
mutex_unlock(&chip->tpm_mutex);
|
||||
return rc;
|
||||
}
|
||||
|
||||
@ -701,7 +730,7 @@ ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value,
|
||||
cmd.params.get_tpm_pt_in.property_id = cpu_to_be32(property_id);
|
||||
cmd.params.get_tpm_pt_in.property_cnt = cpu_to_be32(1);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), desc);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0, desc);
|
||||
if (!rc)
|
||||
*value = be32_to_cpu(cmd.params.get_tpm_pt_out.value);
|
||||
|
||||
@ -735,7 +764,7 @@ static int tpm2_startup(struct tpm_chip *chip, u16 startup_type)
|
||||
cmd.header.in = tpm2_startup_header;
|
||||
|
||||
cmd.params.startup_in.startup_type = cpu_to_be16(startup_type);
|
||||
return tpm_transmit_cmd(chip, &cmd, sizeof(cmd),
|
||||
return tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0,
|
||||
"attempting to start the TPM");
|
||||
}
|
||||
|
||||
@ -763,7 +792,7 @@ void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type)
|
||||
cmd.header.in = tpm2_shutdown_header;
|
||||
cmd.params.startup_in.startup_type = cpu_to_be16(shutdown_type);
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), "stopping the TPM");
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0, "stopping the TPM");
|
||||
|
||||
/* In places where shutdown command is sent there's no much we can do
|
||||
* except print the error code on a system failure.
|
||||
@ -828,7 +857,7 @@ static int tpm2_start_selftest(struct tpm_chip *chip, bool full)
|
||||
cmd.header.in = tpm2_selftest_header;
|
||||
cmd.params.selftest_in.full_test = full;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, &cmd, TPM2_SELF_TEST_IN_SIZE,
|
||||
rc = tpm_transmit_cmd(chip, &cmd, TPM2_SELF_TEST_IN_SIZE, 0,
|
||||
"continue selftest");
|
||||
|
||||
/* At least some prototype chips seem to give RC_TESTING error
|
||||
@ -880,7 +909,7 @@ static int tpm2_do_selftest(struct tpm_chip *chip)
|
||||
cmd.params.pcrread_in.pcr_select[1] = 0x00;
|
||||
cmd.params.pcrread_in.pcr_select[2] = 0x00;
|
||||
|
||||
rc = tpm_transmit_cmd(chip, (u8 *) &cmd, sizeof(cmd), NULL);
|
||||
rc = tpm_transmit_cmd(chip, &cmd, sizeof(cmd), 0, NULL);
|
||||
if (rc < 0)
|
||||
break;
|
||||
|
||||
@ -928,7 +957,7 @@ int tpm2_probe(struct tpm_chip *chip)
|
||||
cmd.params.get_tpm_pt_in.property_id = cpu_to_be32(0x100);
|
||||
cmd.params.get_tpm_pt_in.property_cnt = cpu_to_be32(1);
|
||||
|
||||
rc = tpm_transmit(chip, (const char *) &cmd, sizeof(cmd));
|
||||
rc = tpm_transmit(chip, (const u8 *)&cmd, sizeof(cmd), 0);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
else if (rc < TPM_HEADER_SIZE)
|
||||
|
||||
@ -142,6 +142,11 @@ static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
|
||||
struct crb_priv *priv = dev_get_drvdata(&chip->dev);
|
||||
int rc = 0;
|
||||
|
||||
/* Zero the cancel register so that the next command will not get
|
||||
* canceled.
|
||||
*/
|
||||
iowrite32(0, &priv->cca->cancel);
|
||||
|
||||
if (len > ioread32(&priv->cca->cmd_size)) {
|
||||
dev_err(&chip->dev,
|
||||
"invalid command count value %x %zx\n",
|
||||
@ -175,8 +180,6 @@ static void crb_cancel(struct tpm_chip *chip)
|
||||
|
||||
if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
|
||||
dev_err(&chip->dev, "ACPI Start failed\n");
|
||||
|
||||
iowrite32(0, &priv->cca->cancel);
|
||||
}
|
||||
|
||||
static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
|
||||
|
||||
@ -121,6 +121,7 @@ static int __init arm_idle_init(void)
|
||||
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev) {
|
||||
pr_err("Failed to allocate cpuidle device\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_fail;
|
||||
}
|
||||
dev->cpu = cpu;
|
||||
|
||||
@ -1549,6 +1549,7 @@ config MFD_WM8350
|
||||
config MFD_WM8350_I2C
|
||||
bool "Wolfson Microelectronics WM8350 with I2C"
|
||||
select MFD_WM8350
|
||||
select REGMAP_I2C
|
||||
depends on I2C=y
|
||||
help
|
||||
The WM8350 is an integrated audio and power management
|
||||
|
||||
@ -50,8 +50,9 @@ static int regmap_atmel_hlcdc_reg_write(void *context, unsigned int reg,
|
||||
if (reg <= ATMEL_HLCDC_DIS) {
|
||||
u32 status;
|
||||
|
||||
readl_poll_timeout(hregmap->regs + ATMEL_HLCDC_SR, status,
|
||||
!(status & ATMEL_HLCDC_SIP), 1, 100);
|
||||
readl_poll_timeout_atomic(hregmap->regs + ATMEL_HLCDC_SR,
|
||||
status, !(status & ATMEL_HLCDC_SIP),
|
||||
1, 100);
|
||||
}
|
||||
|
||||
writel(val, hregmap->regs + reg);
|
||||
|
||||
@ -46,9 +46,6 @@ static void rtsx_usb_sg_timed_out(unsigned long data)
|
||||
|
||||
dev_dbg(&ucr->pusb_intf->dev, "%s: sg transfer timed out", __func__);
|
||||
usb_sg_cancel(&ucr->current_sg);
|
||||
|
||||
/* we know the cancellation is caused by time-out */
|
||||
ucr->current_sg.status = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
static int rtsx_usb_bulk_transfer_sglist(struct rtsx_ucr *ucr,
|
||||
@ -67,12 +64,15 @@ static int rtsx_usb_bulk_transfer_sglist(struct rtsx_ucr *ucr,
|
||||
ucr->sg_timer.expires = jiffies + msecs_to_jiffies(timeout);
|
||||
add_timer(&ucr->sg_timer);
|
||||
usb_sg_wait(&ucr->current_sg);
|
||||
del_timer_sync(&ucr->sg_timer);
|
||||
if (!del_timer_sync(&ucr->sg_timer))
|
||||
ret = -ETIMEDOUT;
|
||||
else
|
||||
ret = ucr->current_sg.status;
|
||||
|
||||
if (act_len)
|
||||
*act_len = ucr->current_sg.bytes;
|
||||
|
||||
return ucr->current_sg.status;
|
||||
return ret;
|
||||
}
|
||||
|
||||
int rtsx_usb_transfer_data(struct rtsx_ucr *ucr, unsigned int pipe,
|
||||
|
||||
@ -60,8 +60,13 @@ static struct pci_platform_pm_ops mid_pci_platform_pm = {
|
||||
|
||||
#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
|
||||
|
||||
/*
|
||||
* This table should be in sync with the one in
|
||||
* arch/x86/platform/intel-mid/pwr.c.
|
||||
*/
|
||||
static const struct x86_cpu_id lpss_cpu_ids[] = {
|
||||
ICPU(INTEL_FAM6_ATOM_MERRIFIELD1),
|
||||
ICPU(INTEL_FAM6_ATOM_PENWELL),
|
||||
ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
|
||||
{}
|
||||
};
|
||||
|
||||
|
||||
@ -40,6 +40,7 @@
|
||||
#include <linux/power_supply.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/reset.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/usb/of.h>
|
||||
#include <linux/workqueue.h>
|
||||
|
||||
@ -112,7 +113,7 @@ struct sun4i_usb_phy_data {
|
||||
void __iomem *base;
|
||||
const struct sun4i_usb_phy_cfg *cfg;
|
||||
enum usb_dr_mode dr_mode;
|
||||
struct mutex mutex;
|
||||
spinlock_t reg_lock; /* guard access to phyctl reg */
|
||||
struct sun4i_usb_phy {
|
||||
struct phy *phy;
|
||||
void __iomem *pmu;
|
||||
@ -179,9 +180,10 @@ static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
|
||||
struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
|
||||
u32 temp, usbc_bit = BIT(phy->index * 2);
|
||||
void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
mutex_lock(&phy_data->mutex);
|
||||
spin_lock_irqsave(&phy_data->reg_lock, flags);
|
||||
|
||||
if (phy_data->cfg->type == sun8i_a33_phy) {
|
||||
/* A33 needs us to set phyctl to 0 explicitly */
|
||||
@ -218,7 +220,8 @@ static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
|
||||
|
||||
data >>= 1;
|
||||
}
|
||||
mutex_unlock(&phy_data->mutex);
|
||||
|
||||
spin_unlock_irqrestore(&phy_data->reg_lock, flags);
|
||||
}
|
||||
|
||||
static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
|
||||
@ -577,7 +580,7 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
mutex_init(&data->mutex);
|
||||
spin_lock_init(&data->reg_lock);
|
||||
INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
|
||||
dev_set_drvdata(dev, data);
|
||||
data->cfg = of_device_get_match_data(dev);
|
||||
|
||||
@ -1154,8 +1154,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
|
||||
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_SILVERMONT1, rapl_defaults_byt),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_AIRMONT, rapl_defaults_cht),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD1, rapl_defaults_tng),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD2, rapl_defaults_ann),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_MERRIFIELD, rapl_defaults_tng),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_MOOREFIELD, rapl_defaults_ann),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_GOLDMONT, rapl_defaults_core),
|
||||
RAPL_CPU(INTEL_FAM6_ATOM_DENVERTON, rapl_defaults_core),
|
||||
|
||||
|
||||
@ -391,11 +391,11 @@ static void fbtft_update_display(struct fbtft_par *par, unsigned start_line,
|
||||
|
||||
if (unlikely(timeit)) {
|
||||
ts_end = ktime_get();
|
||||
if (ktime_to_ns(par->update_time))
|
||||
if (!ktime_to_ns(par->update_time))
|
||||
par->update_time = ts_start;
|
||||
|
||||
par->update_time = ts_start;
|
||||
fps = ktime_us_delta(ts_start, par->update_time);
|
||||
par->update_time = ts_start;
|
||||
fps = fps ? 1000000 / fps : 0;
|
||||
|
||||
throughput = ktime_us_delta(ts_end, ts_start);
|
||||
|
||||
@ -141,6 +141,7 @@ static void usbtmc_delete(struct kref *kref)
|
||||
struct usbtmc_device_data *data = to_usbtmc_data(kref);
|
||||
|
||||
usb_put_dev(data->usb_dev);
|
||||
kfree(data);
|
||||
}
|
||||
|
||||
static int usbtmc_open(struct inode *inode, struct file *filp)
|
||||
@ -1379,7 +1380,7 @@ static int usbtmc_probe(struct usb_interface *intf,
|
||||
|
||||
dev_dbg(&intf->dev, "%s called\n", __func__);
|
||||
|
||||
data = devm_kzalloc(&intf->dev, sizeof(*data), GFP_KERNEL);
|
||||
data = kmalloc(sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
|
||||
@ -348,7 +348,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
|
||||
* IN transfers due to a mishandled error condition. Synopsys
|
||||
* STAR 9000614252.
|
||||
*/
|
||||
if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
|
||||
if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) &&
|
||||
(dwc->gadget.speed >= USB_SPEED_SUPER))
|
||||
cmd |= DWC3_DEPCMD_CLEARPENDIN;
|
||||
|
||||
memset(¶ms, 0, sizeof(params));
|
||||
|
||||
@ -898,24 +898,6 @@ static int tower_probe (struct usb_interface *interface, const struct usb_device
|
||||
dev->interrupt_in_interval = interrupt_in_interval ? interrupt_in_interval : dev->interrupt_in_endpoint->bInterval;
|
||||
dev->interrupt_out_interval = interrupt_out_interval ? interrupt_out_interval : dev->interrupt_out_endpoint->bInterval;
|
||||
|
||||
/* we can register the device now, as it is ready */
|
||||
usb_set_intfdata (interface, dev);
|
||||
|
||||
retval = usb_register_dev (interface, &tower_class);
|
||||
|
||||
if (retval) {
|
||||
/* something prevented us from registering this driver */
|
||||
dev_err(idev, "Not able to get a minor for this device.\n");
|
||||
usb_set_intfdata (interface, NULL);
|
||||
goto error;
|
||||
}
|
||||
dev->minor = interface->minor;
|
||||
|
||||
/* let the user know what node this device is now attached to */
|
||||
dev_info(&interface->dev, "LEGO USB Tower #%d now attached to major "
|
||||
"%d minor %d\n", (dev->minor - LEGO_USB_TOWER_MINOR_BASE),
|
||||
USB_MAJOR, dev->minor);
|
||||
|
||||
/* get the firmware version and log it */
|
||||
result = usb_control_msg (udev,
|
||||
usb_rcvctrlpipe(udev, 0),
|
||||
@ -936,6 +918,23 @@ static int tower_probe (struct usb_interface *interface, const struct usb_device
|
||||
get_version_reply.minor,
|
||||
le16_to_cpu(get_version_reply.build_no));
|
||||
|
||||
/* we can register the device now, as it is ready */
|
||||
usb_set_intfdata (interface, dev);
|
||||
|
||||
retval = usb_register_dev (interface, &tower_class);
|
||||
|
||||
if (retval) {
|
||||
/* something prevented us from registering this driver */
|
||||
dev_err(idev, "Not able to get a minor for this device.\n");
|
||||
usb_set_intfdata (interface, NULL);
|
||||
goto error;
|
||||
}
|
||||
dev->minor = interface->minor;
|
||||
|
||||
/* let the user know what node this device is now attached to */
|
||||
dev_info(&interface->dev, "LEGO USB Tower #%d now attached to major "
|
||||
"%d minor %d\n", (dev->minor - LEGO_USB_TOWER_MINOR_BASE),
|
||||
USB_MAJOR, dev->minor);
|
||||
|
||||
exit:
|
||||
return retval;
|
||||
|
||||
@ -118,6 +118,7 @@ static const struct usb_device_id id_table[] = {
|
||||
{ USB_DEVICE(0x10C4, 0x8411) }, /* Kyocera GPS Module */
|
||||
{ USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */
|
||||
{ USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */
|
||||
{ USB_DEVICE(0x10C4, 0x8470) }, /* Juniper Networks BX Series System Console */
|
||||
{ USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */
|
||||
{ USB_DEVICE(0x10C4, 0x84B6) }, /* Starizona Hyperion */
|
||||
{ USB_DEVICE(0x10C4, 0x85EA) }, /* AC-Services IBUS-IF */
|
||||
|
||||
@ -1070,17 +1070,17 @@ int usb_stor_probe2(struct us_data *us)
|
||||
result = usb_stor_acquire_resources(us);
|
||||
if (result)
|
||||
goto BadDevice;
|
||||
usb_autopm_get_interface_no_resume(us->pusb_intf);
|
||||
snprintf(us->scsi_name, sizeof(us->scsi_name), "usb-storage %s",
|
||||
dev_name(&us->pusb_intf->dev));
|
||||
result = scsi_add_host(us_to_host(us), dev);
|
||||
if (result) {
|
||||
dev_warn(dev,
|
||||
"Unable to add the scsi host\n");
|
||||
goto BadDevice;
|
||||
goto HostAddErr;
|
||||
}
|
||||
|
||||
/* Submit the delayed_work for SCSI-device scanning */
|
||||
usb_autopm_get_interface_no_resume(us->pusb_intf);
|
||||
set_bit(US_FLIDX_SCAN_PENDING, &us->dflags);
|
||||
|
||||
if (delay_use > 0)
|
||||
@ -1090,6 +1090,8 @@ int usb_stor_probe2(struct us_data *us)
|
||||
return 0;
|
||||
|
||||
/* We come here if there are any problems */
|
||||
HostAddErr:
|
||||
usb_autopm_put_interface_no_suspend(us->pusb_intf);
|
||||
BadDevice:
|
||||
usb_stor_dbg(us, "storage_probe() failed\n");
|
||||
release_everything(us);
|
||||
|
||||
@ -142,7 +142,7 @@ static int v_recv_cmd_submit(struct vudc *udc,
|
||||
urb_p->urb->status = -EINPROGRESS;
|
||||
|
||||
/* FIXME: more pipe setup to please usbip_common */
|
||||
urb_p->urb->pipe &= ~(11 << 30);
|
||||
urb_p->urb->pipe &= ~(3 << 30);
|
||||
switch (urb_p->ep->type) {
|
||||
case USB_ENDPOINT_XFER_BULK:
|
||||
urb_p->urb->pipe |= (PIPE_BULK << 30);
|
||||
|
||||
@ -350,7 +350,7 @@ static inline int pm80x_dev_suspend(struct device *dev)
|
||||
int irq = platform_get_irq(pdev, 0);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
set_bit((1 << irq), &chip->wu_flag);
|
||||
set_bit(irq, &chip->wu_flag);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -362,7 +362,7 @@ static inline int pm80x_dev_resume(struct device *dev)
|
||||
int irq = platform_get_irq(pdev, 0);
|
||||
|
||||
if (device_may_wakeup(dev))
|
||||
clear_bit((1 << irq), &chip->wu_flag);
|
||||
clear_bit(irq, &chip->wu_flag);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -257,7 +257,7 @@ static inline void workingset_node_pages_inc(struct radix_tree_node *node)
|
||||
|
||||
static inline void workingset_node_pages_dec(struct radix_tree_node *node)
|
||||
{
|
||||
VM_BUG_ON(!workingset_node_pages(node));
|
||||
VM_WARN_ON_ONCE(!workingset_node_pages(node));
|
||||
node->count--;
|
||||
}
|
||||
|
||||
@ -273,7 +273,7 @@ static inline void workingset_node_shadows_inc(struct radix_tree_node *node)
|
||||
|
||||
static inline void workingset_node_shadows_dec(struct radix_tree_node *node)
|
||||
{
|
||||
VM_BUG_ON(!workingset_node_shadows(node));
|
||||
VM_WARN_ON_ONCE(!workingset_node_shadows(node));
|
||||
node->count -= 1U << RADIX_TREE_COUNT_SHIFT;
|
||||
}
|
||||
|
||||
|
||||
@ -403,8 +403,11 @@ static __always_inline u64 __ktime_get_fast_ns(struct tk_fast *tkf)
|
||||
tkr = tkf->base + (seq & 0x01);
|
||||
now = ktime_to_ns(tkr->base);
|
||||
|
||||
now += clocksource_delta(tkr->read(tkr->clock),
|
||||
tkr->cycle_last, tkr->mask);
|
||||
now += timekeeping_delta_to_ns(tkr,
|
||||
clocksource_delta(
|
||||
tkr->read(tkr->clock),
|
||||
tkr->cycle_last,
|
||||
tkr->mask));
|
||||
} while (read_seqcount_retry(&tkf->seq, seq));
|
||||
|
||||
return now;
|
||||
|
||||
@ -190,7 +190,7 @@ int ima_appraise_measurement(enum ima_hooks func,
|
||||
{
|
||||
static const char op[] = "appraise_data";
|
||||
char *cause = "unknown";
|
||||
struct dentry *dentry = file->f_path.dentry;
|
||||
struct dentry *dentry = file_dentry(file);
|
||||
struct inode *inode = d_backing_inode(dentry);
|
||||
enum integrity_status status = INTEGRITY_UNKNOWN;
|
||||
int rc = xattr_len, hash_start = 0;
|
||||
@ -295,7 +295,7 @@ out:
|
||||
*/
|
||||
void ima_update_xattr(struct integrity_iint_cache *iint, struct file *file)
|
||||
{
|
||||
struct dentry *dentry = file->f_path.dentry;
|
||||
struct dentry *dentry = file_dentry(file);
|
||||
int rc = 0;
|
||||
|
||||
/* do not collect and update hash for digital signatures */
|
||||
|
||||
@ -228,7 +228,7 @@ static int process_measurement(struct file *file, char *buf, loff_t size,
|
||||
if ((action & IMA_APPRAISE_SUBMASK) ||
|
||||
strcmp(template_desc->name, IMA_TEMPLATE_IMA_NAME) != 0)
|
||||
/* read 'security.ima' */
|
||||
xattr_len = ima_read_xattr(file->f_path.dentry, &xattr_value);
|
||||
xattr_len = ima_read_xattr(file_dentry(file), &xattr_value);
|
||||
|
||||
hash_algo = ima_get_hash_algo(xattr_value, xattr_len);
|
||||
|
||||
|
||||
@ -1408,6 +1408,7 @@ snd_ali_playback_pointer(struct snd_pcm_substream *substream)
|
||||
spin_unlock(&codec->reg_lock);
|
||||
dev_dbg(codec->card->dev, "playback pointer returned cso=%xh.\n", cso);
|
||||
|
||||
cso %= runtime->buffer_size;
|
||||
return cso;
|
||||
}
|
||||
|
||||
@ -1428,6 +1429,7 @@ static snd_pcm_uframes_t snd_ali_pointer(struct snd_pcm_substream *substream)
|
||||
cso = inw(ALI_REG(codec, ALI_CSO_ALPHA_FMS + 2));
|
||||
spin_unlock(&codec->reg_lock);
|
||||
|
||||
cso %= runtime->buffer_size;
|
||||
return cso;
|
||||
}
|
||||
|
||||
|
||||
@ -261,6 +261,7 @@ enum {
|
||||
CXT_FIXUP_HP_530,
|
||||
CXT_FIXUP_CAP_MIX_AMP_5047,
|
||||
CXT_FIXUP_MUTE_LED_EAPD,
|
||||
CXT_FIXUP_HP_SPECTRE,
|
||||
};
|
||||
|
||||
/* for hda_fixup_thinkpad_acpi() */
|
||||
@ -765,6 +766,14 @@ static const struct hda_fixup cxt_fixups[] = {
|
||||
.type = HDA_FIXUP_FUNC,
|
||||
.v.func = cxt_fixup_mute_led_eapd,
|
||||
},
|
||||
[CXT_FIXUP_HP_SPECTRE] = {
|
||||
.type = HDA_FIXUP_PINS,
|
||||
.v.pins = (const struct hda_pintbl[]) {
|
||||
/* enable NID 0x1d for the speaker on top */
|
||||
{ 0x1d, 0x91170111 },
|
||||
{ }
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
static const struct snd_pci_quirk cxt5045_fixups[] = {
|
||||
@ -814,6 +823,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = {
|
||||
SND_PCI_QUIRK(0x1025, 0x0543, "Acer Aspire One 522", CXT_FIXUP_STEREO_DMIC),
|
||||
SND_PCI_QUIRK(0x1025, 0x054c, "Acer Aspire 3830TG", CXT_FIXUP_ASPIRE_DMIC),
|
||||
SND_PCI_QUIRK(0x1025, 0x054f, "Acer Aspire 4830T", CXT_FIXUP_ASPIRE_DMIC),
|
||||
SND_PCI_QUIRK(0x103c, 0x8174, "HP Spectre x360", CXT_FIXUP_HP_SPECTRE),
|
||||
SND_PCI_QUIRK(0x1043, 0x138d, "Asus", CXT_FIXUP_HEADPHONE_MIC_PIN),
|
||||
SND_PCI_QUIRK(0x152d, 0x0833, "OLPC XO-1.5", CXT_FIXUP_OLPC_XO),
|
||||
SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo T400", CXT_PINCFG_LENOVO_TP410),
|
||||
|
||||
@ -5806,6 +5806,13 @@ static const struct hda_model_fixup alc269_fixup_models[] = {
|
||||
{0x14, 0x90170110}, \
|
||||
{0x15, 0x0221401f}
|
||||
|
||||
#define ALC295_STANDARD_PINS \
|
||||
{0x12, 0xb7a60130}, \
|
||||
{0x14, 0x90170110}, \
|
||||
{0x17, 0x21014020}, \
|
||||
{0x18, 0x21a19030}, \
|
||||
{0x21, 0x04211020}
|
||||
|
||||
#define ALC298_STANDARD_PINS \
|
||||
{0x12, 0x90a60130}, \
|
||||
{0x21, 0x03211020}
|
||||
@ -5845,6 +5852,10 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
|
||||
{0x12, 0x90a60160},
|
||||
{0x14, 0x90170120},
|
||||
{0x21, 0x02211030}),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
{0x14, 0x90170110},
|
||||
{0x1b, 0x02011020},
|
||||
{0x21, 0x0221101f}),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
{0x14, 0x90170130},
|
||||
{0x1b, 0x01014020},
|
||||
@ -5910,6 +5921,10 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
|
||||
{0x12, 0x90a60180},
|
||||
{0x14, 0x90170120},
|
||||
{0x21, 0x02211030}),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
{0x12, 0xb7a60130},
|
||||
{0x14, 0x90170110},
|
||||
{0x21, 0x02211020}),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0256, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
ALC256_STANDARD_PINS),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC280_FIXUP_HP_GPIO4,
|
||||
@ -6021,6 +6036,8 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
|
||||
SND_HDA_PIN_QUIRK(0x10ec0293, 0x1028, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
ALC292_STANDARD_PINS,
|
||||
{0x13, 0x90a60140}),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0295, 0x1028, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
ALC295_STANDARD_PINS),
|
||||
SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE,
|
||||
ALC298_STANDARD_PINS,
|
||||
{0x17, 0x90170110}),
|
||||
|
||||
@ -29,7 +29,7 @@
|
||||
/*
|
||||
This is Line 6's MIDI manufacturer ID.
|
||||
*/
|
||||
const unsigned char line6_midi_id[] = {
|
||||
const unsigned char line6_midi_id[3] = {
|
||||
0x00, 0x01, 0x0c
|
||||
};
|
||||
EXPORT_SYMBOL_GPL(line6_midi_id);
|
||||
|
||||
@ -1831,6 +1831,7 @@ void snd_usb_mixer_rc_memory_change(struct usb_mixer_interface *mixer,
|
||||
}
|
||||
|
||||
static void snd_dragonfly_quirk_db_scale(struct usb_mixer_interface *mixer,
|
||||
struct usb_mixer_elem_info *cval,
|
||||
struct snd_kcontrol *kctl)
|
||||
{
|
||||
/* Approximation using 10 ranges based on output measurement on hw v1.2.
|
||||
@ -1848,10 +1849,19 @@ static void snd_dragonfly_quirk_db_scale(struct usb_mixer_interface *mixer,
|
||||
41, 50, TLV_DB_MINMAX_ITEM(-441, 0),
|
||||
);
|
||||
|
||||
usb_audio_info(mixer->chip, "applying DragonFly dB scale quirk\n");
|
||||
kctl->tlv.p = scale;
|
||||
kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
|
||||
kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
|
||||
if (cval->min == 0 && cval->max == 50) {
|
||||
usb_audio_info(mixer->chip, "applying DragonFly dB scale quirk (0-50 variant)\n");
|
||||
kctl->tlv.p = scale;
|
||||
kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
|
||||
kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
|
||||
|
||||
} else if (cval->min == 0 && cval->max <= 1000) {
|
||||
/* Some other clearly broken DragonFly variant.
|
||||
* At least a 0..53 variant (hw v1.0) exists.
|
||||
*/
|
||||
usb_audio_info(mixer->chip, "ignoring too narrow dB range on a DragonFly device");
|
||||
kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
|
||||
}
|
||||
}
|
||||
|
||||
void snd_usb_mixer_fu_apply_quirk(struct usb_mixer_interface *mixer,
|
||||
@ -1860,8 +1870,8 @@ void snd_usb_mixer_fu_apply_quirk(struct usb_mixer_interface *mixer,
|
||||
{
|
||||
switch (mixer->chip->usb_id) {
|
||||
case USB_ID(0x21b4, 0x0081): /* AudioQuest DragonFly */
|
||||
if (unitid == 7 && cval->min == 0 && cval->max == 50)
|
||||
snd_dragonfly_quirk_db_scale(mixer, kctl);
|
||||
if (unitid == 7 && cval->control == UAC_FU_VOLUME)
|
||||
snd_dragonfly_quirk_db_scale(mixer, cval, kctl);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -423,6 +423,14 @@ static int kvm_arm_pmu_v3_init(struct kvm_vcpu *vcpu)
|
||||
if (!kvm_arm_support_pmu_v3())
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* We currently require an in-kernel VGIC to use the PMU emulation,
|
||||
* because we do not support forwarding PMU overflow interrupts to
|
||||
* userspace yet.
|
||||
*/
|
||||
if (!irqchip_in_kernel(vcpu->kvm) || !vgic_initialized(vcpu->kvm))
|
||||
return -ENODEV;
|
||||
|
||||
if (!test_bit(KVM_ARM_VCPU_PMU_V3, vcpu->arch.features) ||
|
||||
!kvm_arm_pmu_irq_initialized(vcpu))
|
||||
return -ENXIO;
|
||||
|
||||
@ -645,6 +645,9 @@ next:
|
||||
/* Sync back the hardware VGIC state into our emulation after a guest's run. */
|
||||
void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (unlikely(!vgic_initialized(vcpu->kvm)))
|
||||
return;
|
||||
|
||||
vgic_process_maintenance_interrupt(vcpu);
|
||||
vgic_fold_lr_state(vcpu);
|
||||
vgic_prune_ap_list(vcpu);
|
||||
@ -653,6 +656,9 @@ void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
|
||||
/* Flush our emulation state into the GIC hardware before entering the guest. */
|
||||
void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
if (unlikely(!vgic_initialized(vcpu->kvm)))
|
||||
return;
|
||||
|
||||
spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
|
||||
vgic_flush_lr_state(vcpu);
|
||||
spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
|
||||
|
||||
Reference in New Issue
Block a user