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i2S-6ULL: rework the eMMC variant

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This commit is contained in:
SteveChen
2018-04-03 00:12:21 +08:00
parent 5e56f8119d
commit 5e22ce1fca
1 changed files with 40 additions and 88 deletions
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128
board/i2som/i2s_6ull_14x14/i2s_6ull_14x14.c
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@ -30,6 +30,7 @@
#include <usb/ehci-fsl.h>
#include <asm/imx-common/video.h>
#include <pwm.h>
#include <nand.h>
#ifdef CONFIG_FSL_FASTBOOT
#include <fsl_fastboot.h>
@ -333,6 +334,7 @@ static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
/* MicroSD */
static iomux_v3_cfg_t const usdhc1_pads[] = {
MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@ -341,22 +343,14 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
/* usdhc1 connect to SDCard slot, not use VSELECT and RESET */
/* VSELECT */
//MX6_PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL),
/* CD */
//MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
/* RST_B */
//MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
/*
* mx6ull_14x14_evk board default supports sd card. If want to use
* EMMC, need to do board rework for sd2.
* Introduce CONFIG_MX6ULL_EVK_EMMC_REWORK, if sd2 reworked to support
* emmc, need to define this macro.
* i2S-6ULL has eMMC variant, it conflict with NAND signal.
*/
#if defined(CONFIG_MX6ULL_EVK_EMMC_REWORK)
#if defined(CONFIG_SYS_BOOT_EMMC)
static iomux_v3_cfg_t const usdhc2_emmc_pads[] = {
MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@ -369,33 +363,9 @@ static iomux_v3_cfg_t const usdhc2_emmc_pads[] = {
MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
/*
* RST_B
*/
/* RST_B */
MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
#else
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
};
static iomux_v3_cfg_t const usdhc2_cd_pads[] = {
/*
* The evk board uses DAT3 to detect CD card plugin,
* in u-boot we mux the pin to GPIO when doing board_mmc_getcd.
*/
MX6_PAD_NAND_DATA03__GPIO4_IO05 | MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL),
};
static iomux_v3_cfg_t const usdhc2_dat3_pads[] = {
MX6_PAD_NAND_DATA03__USDHC2_DATA3 |
MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL),
};
#endif
static void setup_iomux_uart(void)
@ -431,12 +401,10 @@ static int board_qspi_init(void)
#endif
#ifdef CONFIG_FSL_ESDHC
static struct fsl_esdhc_cfg usdhc_cfg[2] = {
static struct fsl_esdhc_cfg usdhc_cfg[] = {
{USDHC1_BASE_ADDR, 0, 4},
#if defined(CONFIG_MX6ULL_EVK_EMMC_REWORK)
#if defined(CONFIG_SYS_BOOT_EMMC)
{USDHC2_BASE_ADDR, 0, 8},
#else
{USDHC2_BASE_ADDR, 0, 4},
#endif
};
@ -468,25 +436,12 @@ int board_mmc_getcd(struct mmc *mmc)
switch (cfg->esdhc_base) {
case USDHC1_BASE_ADDR:
//ret = !gpio_get_value(USDHC1_CD_GPIO);
ret = !gpio_get_value(USDHC1_CD_GPIO);
ret = 1;
break;
case USDHC2_BASE_ADDR:
#if defined(CONFIG_MX6ULL_EVK_EMMC_REWORK)
#if defined(CONFIG_SYS_BOOT_EMMC)
ret = 1;
#else
imx_iomux_v3_setup_multiple_pads(usdhc2_cd_pads,
ARRAY_SIZE(usdhc2_cd_pads));
gpio_direction_input(USDHC2_CD_GPIO);
/*
* Since it is the DAT3 pin, this pin is pulled to
* low voltage if no card
*/
ret = gpio_get_value(USDHC2_CD_GPIO);
imx_iomux_v3_setup_multiple_pads(usdhc2_dat3_pads,
ARRAY_SIZE(usdhc2_dat3_pads));
#endif
break;
}
@ -528,17 +483,10 @@ void board_late_mmc_env_init(void)
int board_mmc_init(bd_t *bis)
{
#ifdef CONFIG_SPL_BUILD
#if defined(CONFIG_MX6ULL_EVK_EMMC_REWORK)
#if defined(CONFIG_SYS_BOOT_EMMC)
imx_iomux_v3_setup_multiple_pads(usdhc2_emmc_pads,
ARRAY_SIZE(usdhc2_emmc_pads));
#else
imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
#endif
/*
gpio_direction_output(USDHC2_PWR_GPIO, 0);
udelay(500);
gpio_direction_output(USDHC2_PWR_GPIO, 1);
*/
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
#else
@ -555,24 +503,14 @@ int board_mmc_init(bd_t *bis)
case 0:
imx_iomux_v3_setup_multiple_pads(
usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
//gpio_direction_input(USDHC1_CD_GPIO);
gpio_direction_input(USDHC1_CD_GPIO);
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
/* i2c-b6ull SDCard not use VSELECT
gpio_direction_output(USDHC1_PWR_GPIO, 0);
udelay(500);
gpio_direction_output(USDHC1_PWR_GPIO, 1);
*/
break;
case 1:
#if defined(CONFIG_MX6ULL_EVK_EMMC_REWORK)
#if defined(CONFIG_SYS_BOOT_EMMC)
imx_iomux_v3_setup_multiple_pads(
usdhc2_emmc_pads, ARRAY_SIZE(usdhc2_emmc_pads));
#else
#ifndef CONFIG_SYS_USE_NAND
imx_iomux_v3_setup_multiple_pads(
usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
#endif
#endif
/*
gpio_direction_output(USDHC2_PWR_GPIO, 0);
@ -687,8 +625,9 @@ static iomux_v3_cfg_t const fec1_pads[] = {
MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_RX_ER__ENET1_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_RX_EN__ENET1_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
/* PHY Reset */
MX6_PAD_SNVS_TAMPER6__GPIO5_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL),
/* PHY Reset */
MX6_PAD_SNVS_TAMPER6__GPIO5_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
static iomux_v3_cfg_t const fec2_pads[] = {
@ -712,10 +651,10 @@ static void setup_iomux_fec(int fec_id)
imx_iomux_v3_setup_multiple_pads(fec1_pads,
ARRAY_SIZE(fec1_pads));
/* Reset the PHY */
gpio_direction_output(IMX_GPIO_NR(5, 6) , 0);
udelay(500);
gpio_direction_output(IMX_GPIO_NR(5, 6) , 1);
/* Reset the PHY */
gpio_direction_output(IMX_GPIO_NR(5, 6) , 0);
udelay(500);
gpio_direction_output(IMX_GPIO_NR(5, 6) , 1);
}else
imx_iomux_v3_setup_multiple_pads(fec2_pads,
ARRAY_SIZE(fec2_pads));
@ -856,9 +795,9 @@ void do_enable_parallel_lcd(struct display_info_t const *dev)
/* Set Brightness to high */
#ifdef CONFIG_PWM_IMX
pwm_init(0, 0, 0);
pwm_config(0, 625000, 1250000);
pwm_enable(0);
pwm_init(0, 0, 0);
pwm_config(0, 625000, 1250000);
pwm_enable(0);
#else
gpio_direction_output(IMX_GPIO_NR(1, 8) , 1);
#endif
@ -899,10 +838,6 @@ int board_init(void)
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
imx_iomux_v3_setup_multiple_pads(iox_pads, ARRAY_SIZE(iox_pads));
iox74lv_init();
#ifdef CONFIG_SYS_I2C_MXC
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
@ -936,6 +871,22 @@ static const struct boot_mode board_boot_modes[] = {
};
#endif
void create_partition_table(void)
{
struct mtd_info *nand = &nand_info[0];
uint32_t nand_size_mb = nand->size / SZ_1M;
switch (nand_size_mb) {
case 512:
setenv("mtdparts", MTDPARTS_512MB);
break;
case 256:
default:
setenv("mtdparts", MTDPARTS_256MB);
break;
}
}
int board_late_init(void)
{
#ifdef CONFIG_CMD_BMODE
@ -945,6 +896,7 @@ int board_late_init(void)
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#ifdef CONFIG_SYS_BOOT_NAND
setenv("board_name", "I2S-6ULL-NAND");
create_partition_table();
#elif defined(CONFIG_SYS_BOOT_QSPI)
setenv("board_name", "I2S-6ULL-QSPI");
#else