Since iMX6ULL is derivative of iMX6UL, most of design are same, so enable
CONFIG_MX6UL to reduce duplicated effort.
We can use CONFIG_MX6ULL for the difference between these two chips.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit b3b0a429ef)
Add iomux headers according the file SDK_IOMaps_i.MX6ULL_Headers_b151218.zip
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit a78b5b07bd)
We have runtime checking now, since SNVS_LP_BASE_ADDR is only for i.MX6UL
now, so it will break building for other i.MX6[x].
Introduce MX6UL_SNVS_LP_BASE_ADDR to avoid build break.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
From TO1.1, SNVS adds internal pull up control for POR_B,
the register filed is GPBIT[1:0], after system boot up,
it can be set to 2b'01 to disable internal pull up.
It can save about 30uA power in SNVS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 5fd1cb9478)
On mx6qsabreauto and mx6sx ARM2 boards, the EIMNOR sector size is 128KB.
And its u-boot environment offset is 4 sectors (512KB). But u-boot size has
exceeds it, so change to 6 sectors offset (768KB).
To align the environment configurations for all i.MX, also change the configuration
for mx6ul and mx7d, which has EIMNOR with 256KB sectors.
Signed-off-by: Ye Li <ye.li@nxp.com>
Since the u-boot size has exceeded the 512KB on some platforms,
so we set the environment offset to 768KB for all i.MX6 and i.MX7
reference boards.
Signed-off-by: Ye Li <ye.li@nxp.com>
Since the QSPI needs to rework on this board, at default the QSPI is disabled.
So bind the M4 QSPI boot with QSPI enabled u-boot image, set default
M4 boot to TCM. Need to use TCM m4 image at default.
Additional, on SDB there is only one QSPI flash. Considering the A7 QSPI boot
case, we have to move M4 image to 1M offset to give enough space for u-boot
and env.
Signed-off-by: Ye Li <ye.li@nxp.com>
Since from mx7, we use fixed IVT offset for all boot devices.
Introduce a new configuration CONFIG_IMX_FIXED_IVT_OFFSET for this.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 88e0a3552b)
(cherry picked from commit 3d52e221ed)
On mx7d 12x12 lpddr3 arm2 board, POR_B reset in uboot will fail stress
reset test, and hangs in rom code. Rom log buffer show thats wrong
hab_image_entry and runs into serial download mode. Also there is no
time delay reset circuit for this board.
We found when disable CONFIG_VIDEO, all seems fine. Actually,
only the following piece of code can make stress reset ok,
"
writel(LCDIF_CTRL1_VSYNC_EDGE_IRQ, ®s->hw_lcdif_ctrl1_clr);
while (--timeout) {
if (readl(®s->hw_lcdif_ctrl1) & LCDIF_CTRL1_VSYNC_EDGE_IRQ)
break;
udelay(1);
}
"
Here we use lcdif_power_down API which is better to shutdown lcdif same as
the way used in arch_preboot_os.
Implement reset_misc for mx7, since it does not hurt for others boards.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit cd1bd6ee94)
Update settings for PRE. Value for Saturation THR of PREx,
changed from 0x20 to 0x10 to make system more stable.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 02e7090604)
(cherry picked from commit f7c5cf580f)
Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3.
If LCD_nPWREN is high, output is 2.4V which is not correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix 74LV OE gpio index. pinmux is correct, but gpio index
is wrong, so gpio output will not have effect, since we
use wrong GPIO5_IO18, but not correct GPIO5_IO8.
And at the end of the initialization of 74lv init, should
keep OE voltage level at LOW, but not high.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register the bit[17]
for mmdc_ch0 is reserved and its proper state should be 1. When clear this bit,
the periph_clk_sel cannot be set and that CDHIPR[periph_clk_sel_busy] handshake
never clears.
Signed-off-by: Ye Li <ye.li@nxp.com>
Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
module fuse check. And modify board level codes for SD, FEC and EIM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.
Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF.
Signed-off-by: Ye Li <ye.li@nxp.com>
Implement a functionality to read the soc fuses and check if any module
is fused. For fused module, we have to disable it in u-boot dynamically,
and change the its node in FDT to "disabled" status before starting the kernel.
In this patch, we implement the ft_system_setup for FDT fixup. This function will
be called during boot process or by "fdt systemsetup" command.
To enable the module fuse checking, two configurations must be defined:
CONFIG_MODULE_FUSE
CONFIG_OF_SYSTEM_SETUP
Signed-off-by: Ye Li <ye.li@nxp.com>
The fdt command "fdt systemsetup" can't work because the do_fdt check the
start char 's' for command "fdt set". So the fdt systemsetup will also go into
the "fdt set" in fault. Fix this problem by checking the whole word "set" for
"fdt set" command.
Signed-off-by: Ye Li <ye.li@nxp.com>
Setup MMDC in two channel fixed mode
Initialize dram banks for two channel fixed mode
DRAM bank = 0x00000000
-> start = 0x10000000
-> size = 0x20000000
DRAM bank = 0x00000001
-> start = 0x80000000
-> size = 0x20000000
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Since DDR enter retention mode after kernel enter DSM mode, we have to exit DDR
retention mode before uboot boot, so add this in DCD and plugin code.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 62248ef80d)
Debug monitor will print out last failed AXI access info when
system reboot is caused by AXI access failure, only works when
debug monitor is enabled.
Enable this module on i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit df6ac8531d)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Since the following piece settings can not be in DCD table, we
add them in enable_ipu_clock.
"
setmem /32 0x00bb048c = 0x00000002 ## Bypass IPU1 QoS generator
setmem /32 0x00bb050c = 0x00000002 ## Bypass IPU2 QoS generator
setmem /32 0x00bb0690 = 0x00000200 ## Bandwidth THR for of PRE0
setmem /32 0x00bb0710 = 0x00000200 ## Bandwidth THR for of PRE1
setmem /32 0x00bb0790 = 0x00000200 ## Bandwidth THR for of PRE2
setmem /32 0x00bb0810 = 0x00000200 ## Bandwidth THR for of PRE3
setmem /32 0x00bb0694 = 0x00000020 ## Saturation THR for of PRE0
setmem /32 0x00bb0714 = 0x00000020 ## Saturation THR for of PRE1
setmem /32 0x00bb0794 = 0x00000020 ## Saturation THR for of PRE2
setmem /32 0x00bb0814 = 0x00000020 ## Saturation THR for of PRE
"
CONFIG_VIDEO_IPUV3 is always defined in mx6sabre_common.h,
the settings sure will effect.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 61cec88a59)
Apply errata based on PL310 version instead of compile
time. Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 31751fa9cf)
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.
Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6e250796d6)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
From i2c spec, if device pull down the SDA line that causes
i2c bus dead, host can send out 9 clock to let device release
SDA.
But for some special device like pfuze100, it pull down SDA line
and the solution cannot take effort.
The patch just add NACK and STOP signal after 8 dummy clock, and pmic
can release SDA line after the recovery. Test case catch 375 times of
i2c hang, and all are recovered.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit 53118db42d)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit b8dcb81240)
Set the CONFIG_SUPPORT_EMMC_BOOT in mx6_common.h to enable the eMMC
boot support for all mx6 platforms. Remove the duplicated definition
in board's header file.
Signed-off-by: Ye Li <ye.li@nxp.com>
The ARM errata 751472, 794072, 761320, 845369 only applied
to the following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors
i.MX6 family does not have the ACP and thus only the MPCore system
will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
(cherry picked from commit 0db960784b)
Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 70ad44e523)
When using watchdog timeout in kernel, the reset does not output the
WDOG_B signal, so the power supply won't be reset. To solve the problem,
we enable it in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
When using watchdog timeout in kernel, the reset does not output the
WDOG_B signal, so the power supply won't be reset. To solve the problem,
we enable it in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Set the ID pin pad to pull up not the pull down at default, otherwise
we can't enter the device mode, but always detect as host.
After this change we have to use portA cable to play as host,
and use portB cable for device.
Signed-off-by: Ye.Li <B37916@freescale.com>
Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.
(cherry picked from commit ec78595a24)
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
imx6sl doesn't have the pcie module, mask the pcie
related codes from imx6sl.
Signed-off-by: Richard Zhu <r65037@freescale.com>
(cherry picked from commit acaff11da3)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
There are about 0.02% percentage on some imx6q/dl/solo
hw boards, random pcie link down when warm-reset is used.
Make sure to clear the ref_ssp_en bit16 of gpr1 before
warm-rst, and set ref_ssp_en after the pcie clks are
stable to workaround it.
rootcause:
* gpr regisers wouldn't be reset by warm-rst, while the
ref_ssp_en is required to be reset by pcie.
(work-around in u-boot)
* ref_ssp_en should be set after pcie clks are stable.
(work-around in kernel)
Signed-off-by: Richard Zhu <r65037@freescale.com>
(cherry picked from commit 5cc825b12c)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 6193cf4e33)
To resolve USB camera bandwidth issue, the patch sets recommended AQoS
setting from IC team value for peripheral and only on imx6qp.
The address is: 0xbb0608, the value is: 0x80000201
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 11906c712a)
Shutdown VDDPU and PCIE phy to save power.
For PCIE, the i.MX6SL and i.MX6UL does not have this module,
so don't need it.
For VDDPU, the i.MX6UL does not have GPU, does not need it. And on
i.MX6QP there is narrow window that PRE driver is ready but GPU driver probe later,
and the later GPU driver turn on PU may cause 'PRE hang' issue. To simplify
thing, do not turn off PU in u-boot.
Reference:
commit: 6b0787b726e2ff32210d742d93ecd3f4bb2ae402
commit: 4bd0032c0e
Signed-off-by: Ye Li <ye.li@nxp.com>
As M4 is sourcing UART clk from OSC, to make UART work
when M4 is enabled, need to select OSC as clk parent,
24M OSC is enough for debug UART in uboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit b5e1b39319)
According to the design team's requirement, on i.MX6UL, the PMIC_STBY_REQ_PAD
should be configured to open drain 100K. The TO1.1 has fixed the issue,
add work around for TO1.0.
Signed-off-by: Ye Li <ye.li@nxp.com>
