Prepare v2009.06

Update CHANGELOG, fix minor coding stylke issue. Update Makefile.

Signed-off-by: Wolfgang Denk <wd@denx.de>

CHANGELOG

@@ -1,3 +1,721 @@
+commit c3147c1762f8caf99649051116a2411bdf887c10
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Jun 14 20:31:36 2009 +0200
+
+    Revert "SMC911x driver fixed for NFS boot"
+
+    This reverts commit ca9c8a1e10fac01e6a1129f82a7ce18bd818fa43,
+    which causes compile warnings ("large integer implicitly truncated
+    to unsigned type") on all systems that use this driver. The warning
+    results from passing long constants (TX_CFG, RX_CFG) into
+    smc911x_set_mac_csr() which is declared to accept "unsigned
+    character" arguments only.
+
+    Being close to a release, with nobody available to actually test the
+    code or the suggested fixes, it seems better to revert the patch.
+
+commit e7563aff174f77aa61dab1ef5d9b47bebaa43702
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Jun 11 23:42:35 2009 -0500
+
+    fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
+
+    The ddr code computes most things as 64-bit quantities and had some places
+    in the middle that it was using phy_addr_t and phys_size_t.
+
+    Instead we use unsigned long long through out and only at the last stage of
+    setting the LAWs and reporting the amount of memory to the board code do we
+    truncate down to what we can cover via phys_size_t.
+
+    This has the added benefit that the DDR controller itself is always setup
+    the same way regardless of how much memory we have.  Its only the LAW
+    setup that limits what is visible to the system.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d4b130dc80761b430dc5b410159cd158fca1a348
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Jun 11 23:40:34 2009 -0500
+
+    85xx: Use print_size to report amount of memory not mapped by TLBs
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 6e2aebc33fa740c068fe28d40eaf0319b7c7287e
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date:	Wed May 20 12:30:42 2009 -0400
+
+    85xx: Add README for MPC8569MDS
+
+    Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b2aab386e957ba684d4f2a466bfaa91770e5058a
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date:	Wed May 20 12:30:33 2009 -0400
+
+    85xx: Add UART1 support for MPC8569MDS
+
+    MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
+    those pins before using UART1.
+
+    Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 399b53cbab0b377ac4c5c16c19c6e41b68a9c719
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date:	Wed May 20 12:30:32 2009 -0400
+
+    85xx: Add PIB support at CS4/CS5 for MPC8569MDS
+
+    Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+    Signed-off-by: Yu Liu <Yu.Liu@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit fb27949059f1bc84381a6216a819090f0cdbaa70
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date:	Thu Jun 4 16:12:39 2009 -0400
+
+    85xx: Fix some settings for MPC8569MDS board
+
+    - Increase the size of malloc to 512KB because MPC8569MDS needs more memory for
+    malloc to support up to eight Ethernet interfaces.
+    - Move Environment address out of uboot thus the saved environment variables
+    will not be erased after u-boot is re-programmed.
+
+    Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c7f60fd29f2d638d080cdf1a49ad985b85f9429d
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date:	Wed May 20 12:30:30 2009 -0400
+
+    85xx: Fix MURAM size for MPC8569
+
+    MPC8569 has 128K bytes MURAM.
+
+    Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a53c997dd7fc858f2a27f5a47b200567b9343ae5
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Fri May 22 20:23:51 2009 +0200
+
+    at91/cpu.c: add missing Copyright & GPL header
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit aa446a591aca46ef2b53cc6598ea8091feb45444
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date:	Sun Jun 7 21:45:16 2009 +0900
+
+    apollon: Fix a OBJCFLAGS typo
+
+    Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
+
+commit 580611cb0932143fc2d7a735cfa9ce1ef34d6002
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Jun 10 00:19:28 2009 +0200
+
+    Prepare 2009.06-rc3
+
+    Update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3a76ab5c166d5956885f803ce975e7151cc0ca0e
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Jun 10 00:15:11 2009 +0200
+
+    rmu board: fix error: 'CONFIG_ENV_SECT_SIZE' undeclared
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 165f9859b64ff59f0cfae3cc70a7e7ded7aaa4a7
+Author: Daniel Mack <daniel@caiaq.de>
+Date:	Thu Jun 4 19:44:12 2009 +0200
+
+    ubifs: fix small error path mismatch
+
+    In do_readpage(), don't free 'dn' if its allocation failed.
+
+    Signed-off-by: Daniel Mack <daniel@caiaq.de>
+
+commit de7cf709ebd3c01fbd094e8853dabb410c0370a1
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Jun 4 00:31:07 2009 +0200
+
+    EP88x: fix broken linker script
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Tested-by: Mikhail Zaturenskiy <mzaturenskiy@shoppertrak.com>
+
+commit 7a2063bd80d3b58b2dd5d5e58f4411f8d250576c
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri May 15 00:16:02 2009 +0200
+
+    TQM85xx: minor config file cleanup
+
+    Remove "saveenv" from "update" definition: the environment is outside
+    the U-Boot image on TQM85xx and therefor not affected by updates.
+
+    Also "beautify" code a bit (vertical alignment).
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c0296b1801fc9426d772fa75fe58458db605dfee
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri May 15 00:16:01 2009 +0200
+
+    TQM85xx: adapt for new flash types
+
+    Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM
+    series while new boards have 'N' type Flashes from the S29GLxxxN
+    series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB.
+
+    We now change the configuration to the new flash types for all
+    boards; this also works on old boards - we just waste two flash
+    sectors for the environment which could be smaller there.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6735104924f06340071a6914a9ee3345607fc102
+Author: Dave Liu <daveliu@freescale.com>
+Date:	Mon May 18 17:49:23 2009 +0800
+
+    85xx: Fix the wrong SYS_CLK_IN for 8569MDS
+
+    The SYS_CLK_IN of MPC8569MDS is 66.66MHz,
+    The DDR_CLK_IN is same with SYS_CLK_IN in 8569 processor.
+    so, change the SYS_CLK_IN from 66MHz to 66.66MHz.
+
+    Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 16e7559c08b6f29db4596d795b92914c01e6a1b3
+Author: Dave Liu <daveliu@freescale.com>
+Date:	Fri May 15 10:27:44 2009 +0800
+
+    85xx: Fix the wrong BCSR address of 8569MDS
+
+    The BCSR17[7] = 1 will unlock the write protect of FLASH.
+    The WP# pin only controls the write protect of top/bottom sector,
+    That is why we can save env, but we can't write the first sector
+    before the patch.
+
+    Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 90d13b8ac3d515349626d7c8a3dc34ef38c43fa6
+Author: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
+Date:	Tue Jun 2 16:27:10 2009 -0500
+
+    85xx: bugfix for reading maximum TLB size on mpc85xx
+
+    The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
+    This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
+    (256 MB)
+    which made u-boot hang in board_init_f() when trying to create a new stack
+    in RAM.
+    I have an mpc8540 with one 1GB dimm.
+
+    Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
+    Signed-off-by: Andy Fleming <afleming@freescale.com>
+    Acked-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1b5291dddf5f16c7ae10e3cb165882fa96038b26
+Author: Dave Liu <daveliu@freescale.com>
+Date:	Fri Mar 27 14:32:43 2009 +0800
+
+    85xx: Fix the clock adjust of mpc8569mds board
+
+    Currently the clk_adj is 6 (3/4 cycle), The settings will cause
+    the DDR controller hang at the data init. Change the clk_adj
+    from 6 to 4 (1/2 cycle), make the memory system stable.
+
+    Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit faa14babd7466dfade358f9cac128ae246b9bf1b
+Author: RONETIX - Ilko Iliev <iliev@ronetix.at>
+Date:	Fri Jun 5 16:54:31 2009 +0200
+
+    at91: fix a USB problem for AT91SAM9261
+
+    This patch corrects the missing PLLB initialization in usb_cpu_init()
+    for AT91SAM9261.
+    Because of the missing PLLB initialization, the USB support for all
+    AT91SAM9261 based boards will work only if the PLLB is configured by a
+    precedent bootloader.
+
+    Signed-off-by: Ilko Iliev <iliev@ronetix.at>
+    Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+    Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 0c24dec550ddb7d86b8bfdd8645b18479f73e6e2
+Author: Felix Radensky <felix@embedded-sol.com>
+Date:	Sun May 31 20:44:15 2009 +0300
+
+    ppc4xx/net: Fix MDIO clock setup
+
+    This patch fixes MDIO clock setup in case when OPB frequency is 100MHz.
+    Current code assumes that the value of sysinfo.freqOPB is 100000000
+    when OPB frequency is 100MHz. In reality it is 100000001. As a result
+    MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating
+    the standard. This in not a problem on boards equipped with Marvell PHYs
+    (e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz,
+    but can be a problem for other PHYs (e.g. Realtek ones).
+
+    Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d65e34d12514de2bbe3b8f519761d641c081bad0
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date:	Wed Feb 25 14:27:29 2009 +0900
+
+    rtl8169: fix PCI system memory address
+
+    When PCI device use system memory, some PCI host controller should be
+    set physical memory address.
+
+    Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit ca9c8a1e10fac01e6a1129f82a7ce18bd818fa43
+Author: Manikandan Pillai <mani.pillai@ti.com>
+Date:	Wed Apr 8 09:14:35 2009 +0530
+
+    SMC911x driver fixed for NFS boot
+
+    eth_halt() function in the smc911x drivers used to call the
+    smc911x_reset() function. eth_halt() used to be called after
+    tftp transfers. This used to put the ethernet chip in reset
+    while the linux boots up resulting in the ethernet driver
+    not coming up. NFS boot used to fail as a result.
+
+    This patch calls smc911x_shutdown() instead of smc911x_reset().
+    Some comments received has also been fixed.
+
+    Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e5a3bc2401a23f1890611f020f57f94824a534db
+Author: Remy Bohmer <linux@bohmer.net>
+Date:	Sun May 3 12:11:40 2009 +0200
+
+    Add config option for disabling DM9000-SROM support.
+
+    Some boards do not have SROM support for the DM9000 network adapter.
+    Instead of listing these board names in the driver code, make this
+    option configurable from the board config file.
+
+    It also removes a build warning for the at91sam9261ek board:
+    'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
+
+    And it repaires the trizepsiv board build which was broken around the
+    same routines
+
+    Signed-off-by: Remy Bohmer <linux@bohmer.net>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3c9b1ee17e19bd6d80344678d41a85e52b0be713
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date:	Fri Jun 5 14:11:33 2009 -0500
+
+    mpc83xx: don't set SICRH_TSOBI1 to RMII/RTBI operation
+
+    In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
+    impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
+    SICRH[TSIOB1] was erroneously being set high.
+
+    U-Boot always operated this PHY interface in GMII mode.  It is assumed this
+    was missed in the clean up by the original board porters, and copied along
+    to the TQM and sbc boards.
+
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+    Acked-by: Ira Snyder <iws@ovro.caltech.edu>
+    Reviewed-by: David Hawkins <dwh@ovro.caltech.edu>
+    Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+    CC: Dave Liu <DaveLiu@freescale.com>
+
+commit 2c0234fa79122a5aa77c4e17c33eb2fe184b61a7
+Author: Daniel Mack <daniel@caiaq.de>
+Date:	Wed Apr 8 13:23:37 2009 +0200
+
+    smc911x: write back the manually set MAC address
+
+    If the MAX address is given by the environment, write it back to the
+    hardware.
+
+    Signed-off-by: Daniel Mack <daniel@caiaq.de>
+    Cc: Sascha Hauer <s.hauer@pengutronix.de>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit dfcd7f21607fd847236b04bb1a8d59a7c10ab99c
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri May 15 00:16:03 2009 +0200
+
+    Redundant Environment: protect full sector size
+
+    Several boards used different ways to specify the size of the
+    protected area when enabling flash write protection for the sectors
+    holding the environment variables: some used CONFIG_ENV_SIZE and
+    CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
+    a mix of both for the "normal" and the "redundant" areas.
+
+    Normally, this makes no difference at all. However, things are
+    different when you have to deal with boards that can come with
+    different types of flash chips, which may have different sector
+    sizes.
+
+    Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
+    biggest sector size, which may include several sectors on boards using
+    the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
+    or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
+    case that only the first of these sectors get protected, while the
+    following ones aren't.
+
+    This is no real problem, but it can be confusing for the user -
+    especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
+    "normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
+    "redundant" area.
+
+    To avoid such inconsistencies, I changed all sucn boards that I found
+    to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
+    not cause any functional changes to the code.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Paul Ruhland
+    Cc: Pantelis Antoniou <panto@intracom.gr>
+    Cc: Stefan Roese <sr@denx.de>
+    Cc: Gary Jennejohn <garyj@denx.de>
+    Cc: Dave Ellis <DGE@sixnetio.com>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit b81830f6e3b3e6ed114d071eb107965e49fa9b5a
+Author: Ilya Yanok <yanok@emcraft.com>
+Date:	Thu May 14 14:03:09 2009 +0400
+
+    mmc: it's safe to ignore mmc_send_if_cond() return value
+
+    Return value of mmc_send_if_cond() can be safely ignored (as it is
+    done in Linux). This makes older cards work with MXC MCI controller.
+
+    Signed-off-by: Ilya Yanok <yanok@emcraft.com>
+
+commit dba6fcf6517faa5dda7df8109febe03c9c72a6f5
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon May 11 15:54:13 2009 +0200
+
+    cfi_mtd: Fix bug in last sector detection
+
+    This patch now enabled this cfi-mtd wrapper to correctly detect and
+    erase the last sector in an NOR FLASH device.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4e3d89ba948eef801ffd46ef862cdede5b3f8320
+Author: Yauhen Kharuzhy <jekhor@gmail.com>
+Date:	Thu May 7 00:43:30 2009 +0300
+
+    mmc: Fix decoding of SCR & function switch data on little-endian machines
+
+    SCR & switch data are read from card as big-endian words and should be
+    converted to CPU byte order.
+
+    Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
+    Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit f33cb34b3971dabe3720d577b0e1b8601c09fe17
+Author: Yauhen Kharuzhy <jekhor@gmail.com>
+Date:	Thu May 7 13:08:53 2009 +0300
+
+    mmc: Remove return from mmc_init for non SD 2.0 compatible cards.
+
+    Cards which are not compatible with SD 2.0 standard, may return response
+    for CMD8 command, but it will be invalid in terms of SD 2.0. We should
+    accept this case as admissible, just like Linux does.
+
+    Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
+    Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 998be3dd59ed0af4bec38324047fecfa88ac45db
+Author: Rabin Vincent <rabin@rab.in>
+Date:	Sun Apr 5 13:30:56 2009 +0530
+
+    mmc: drop unnecessary casts
+
+    Now that response is a uint, we can drop all the casts.
+
+    Signed-off-by: Rabin Vincent <rabin@rab.in>
+
+commit 0b453ffe28bb9227d86ddbe0893bd19c93f04ed7
+Author: Rabin Vincent <rabin@rab.in>
+Date:	Sun Apr 5 13:30:55 2009 +0530
+
+    mmc: fix response decoding on little endian
+
+    The mmc code defines the response as an array of chars.  However, it
+    access the response bytes both as (i) an array of four uints (with
+    casts) and (ii) as individual chars.  The former case is used more
+    often, including by the driver when it assigns the response.
+
+    The char-wise accesses are broken on little endian systems because they
+    assume that the bytes in the uints are in big endian byte order.
+
+    This patch fixes this by changing the response to be an array of four
+    uints and replacing the char-wise accesses with equivalent uint-wise
+    accesses.
+
+    Signed-off-by: Rabin Vincent <rabin@rab.in>
+
+commit 9b1f942c09dd942e6de3185caa81c111b14de567
+Author: Rabin Vincent <rabin@rab.in>
+Date:	Sun Apr 5 13:30:54 2009 +0530
+
+    mmc: use lldiv to fix arm eabi build
+
+    The generic MMC core uses direct long long divisions, which do not build
+    with ARM EABI toolchains.  Use lldiv() instead, which works everywhere.
+
+    Signed-off-by: Rabin Vincent <rabin@rab.in>
+
+commit e85649c7e683faea1ccfddc9fa9abc62f38e4201
+Author: Rabin Vincent <rabin@rab.in>
+Date:	Sun Apr 5 13:30:53 2009 +0530
+
+    mmc: check find_mmc_device return value
+
+    find_mmc_device returns NULL if an invalid device number is specified.
+    Check for this to avoid dereferencing NULL pointers.
+
+    Signed-off-by: Rabin Vincent <rabin@rab.in>
+
+commit ac0865ff33870cdf2cd480165045e1bc311e9fa2
+Author: Rabin Vincent <rabin@rab.in>
+Date:	Sun Apr 5 13:30:52 2009 +0530
+
+    mmc: clean up help texts
+
+    Remove some repeated words and superfluous newlines in the mmc command
+    help entries.
+
+    Signed-off-by: Rabin Vincent <rabin@rab.in>
+
+commit 7d6900ebe16d679c0e03f8d1584b64057a64ce39
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Fri May 29 17:01:48 2009 -0400
+
+    Blackfin: spi: fix pin handling of SPI0 SSEL4
+
+    CS4 on SPI0 has a dedicated PH8 pin which needs to be enabled as a
+    peripheral in order to work.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2157359dad2533987f5eb0181ef543693fad6a33
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Tue May 26 02:51:57 2009 -0400
+
+    Blackfin: fix if() logic in bootrom evt1 check
+
+    A missing set of parenthesis caused the silicon revision to apply only to
+    the BF533 and not the BF531/BF532 variants.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 76b5883da2cf049cd410901c04ea450e5f5c27c3
+Author: Stefan Roese <sr@denx.de>
+Date:	Sat May 16 12:04:22 2009 +0200
+
+    jffs2/mtdparts: Fix problem with usage from JFFS2 and MTDPARTS together
+
+    Currently using JFFS2 with MTDPARTS enabled doesn't work. This is because
+    mtdparts_init() is available in both files, cmd_mtdparts.c and
+    cmd_jffs2.c. Please note that in the original cmd_jffs2.c file (before
+    the jffs2/mtdparts command/file split those 2 different versions
+    already existed. So this is nothing new. The main problem is that the
+    variables "current_dev" and "current_partnum" are declared in both
+    files now. This doesn't work.
+
+    This patch now changes the names of those variable to more specific
+    names: "current_mtd_dev" and "current_mtd_partnum". This is because
+    this patch also changes the declaration from static to global, so
+    that they can be used from both files.
+
+    Please note that my first tests were not successful. The MTD devices
+    selected via mtdparts are now accessed but I'm failing to see the
+    directory listed via the "ls" command. Nothing is displayed. Perhaps
+    I didn't generate the JFFS2 image correctly (I never used JFFS2 in
+    U-Boot before). Not sure. Perhaps somebody else could take a look at
+    this as well. I'll continue looking into this on Monday.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Cc: Wolfgang Denk <wd@denx.de>
+    Cc: Detlev Zundel <dzu@denx.de>
+    Cc: Ilya Yanok <yanok@emcraft.com>
+    Cc: Renaud barbier <renaud.barbier@ge.com>
+
+commit ab687907980fa28940a1a992d3f1c5d17cdbbf5d
+Author: Graf Yang <graf.yang@analog.com>
+Date:	Sun May 24 02:34:34 2009 -0400
+
+    Blackfin: bf518f-ezbrd: setup portmux for async flash
+
+    The pins for async memory where parallel flash lives are not enabled by
+    default, so make sure we mux them as needed.
+
+    Signed-off-by: Graf Yang <graf.yang@analog.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit f40f6db278f602b55820693634a7256b0b4e4b80
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed May 20 10:58:03 2009 +0200
+
+    nand: Fix problem with ECC ordering for PPC4xx NDFC platforms
+
+    This patch enables Smart Media (SMC) ECC byte ordering which is used
+    on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
+    incompatible ECC byte ordering to the Linux kernel NDFC driver.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Scott Wood <scottwood@freescale.com>
+
+commit 399aab7748bef053d59612211e1bd7a3fabfce18
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed May 20 10:58:02 2009 +0200
+
+    ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platforms
+
+    This patch now uses the correct ECC byte order (Smart Media - SMC)
+    to be used on the 4xx NAND FLASH driver. Without this patch we have
+    incompatible ECC byte ordering to the Linux kernel NDFC driver.
+
+    Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
+    drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
+    a seperate patch.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Scott Wood <scottwood@freescale.com>
+
+commit 5d841fac8249a2b3f9a814da2140132be0a9f60d
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed May 20 10:58:01 2009 +0200
+
+    ppc4xx: Move definition for PPC4xx NAND FLASH controller to header
+
+    This patch moves the definition for the PPC4xx NAND FLASH controller
+    (NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the
+    upcoming fix for the ECC byte ordering of the NDFC driver.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Scott Wood <scottwood@freescale.com>
+
+commit 2df72b82bc9e17b88dc82735a067749220beb025
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date:	Tue May 19 12:53:36 2009 -0500
+
+    common: fix inline--weak error spotted by gcc 4.4
+
+    cmd_ide.c:547: error: inline function 'ide_inb' cannot be declared weak
+
+    removing the inline attribute fixes it.
+
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 9fd9abedcc3c10cf89353265cbe05f58609d51f3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date:	Tue May 19 12:53:32 2009 -0500
+
+    TQM834x: remove defines causing gcc4.4 warnings
+
+    Configuring for TQM834x board...
+    cpu_init.c: In function 'cpu_init_f':
+    cpu_init.c:262: warning: array subscript is above array bounds
+    cpu_init.c:263: warning: array subscript is above array bounds
+    cpu_init.c:270: warning: array subscript is above array bounds
+    ...
+
+    Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 0850301747228a3327f2815a85284d26ade3de95
+Author: Andreas Huber <andreas.huber@keymile.com>
+Date:	Tue May 19 11:06:30 2009 +0200
+
+    UBI: fix return code in ubi_volume_read
+
+    Return -ENODEV instead of 0 when trying to read from a non existing volume.
+
+    Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ec01481ddc4cf302c7f6d760b776ca94819ec21e
+Author: Graf Yang <graf.yang@analog.com>
+Date:	Tue May 19 04:40:08 2009 -0400
+
+    Blackfin: fix timer_init()/timer_reset()
+
+    The timer_init() function was not using the right csync instruction, nor
+    was it doing it right after disabling the core timer.
+
+    The timer_reset() function would reset the timestamp, but not the actual
+    timer, so there was a common edge case where get_timer() return a jump of
+    one timestamp (couple milliseconds) right after resetting.	This caused
+    many functions to improperly timeout right away.
+
+    Signed-off-by: Graf Yang <graf.yang@analog.com>
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c06326c73bf90e48a8e1cf8893ad31c575423f50
+Author: Shinya Kuribayashi <skuribay@pobox.com>
+Date:	Sat May 16 09:12:09 2009 +0900
+
+    MIPS: lib_mips/board.c: Remove unused variables
+
+    This fixes the following build warnings:
+
+    board.c: In function 'board_init_r':
+    board.c:328: warning: unused variable 'i'
+    board.c:326: warning: unused variable 'e'
+
+    Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
+
+commit 47f6a36cc3f3427cc8e4f1d0f3e6678be6f33769
+Author: Shinya Kuribayashi <skuribay@pobox.com>
+Date:	Sat May 16 09:12:09 2009 +0900
+
+    MIPS: Make all extern-ed functions in bitops.h static
+
+    All these functions are expected to be static inline-ed.
+    This patch also fixes the following build warnings on MIPS targets:
+
+    include/asm/bitops.h: In function 'ext2_find_next_zero_bit':
+    include/asm/bitops.h:862: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
+    include/asm/bitops.h:885: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
+    include/asm/bitops.h:887: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
+
+    Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
+
+commit 87423d740b91329b8d1d0b73cafd6930993b558a
+Author: Thomas Lange <thomas@corelatus.se>
+Date:	Fri Apr 24 16:22:16 2009 +0200
+
+    MIPS: Implement ethernet halt for au1x00
+
+    Implement ethernet halt() by putting MAC0 in reset.
+    If we do not do this, we will get memory corruption
+    when ethernet frames are received during early OS boot.
+
+    Signed-off-by: Thomas Lange <thomas@corelatus.se>
+    Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
+
+commit a2e0ffcf2d9a22c582a93e84a4bef20fd3877f47
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri May 15 23:29:23 2009 +0200
+
+    Prepare v2009.06-rc2
+
+    Update CHANGELOG.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit f4317ea91942f44cc1c433277927b61618e9b0a5
 Author: Daniel Mack <daniel@caiaq.de>
 Date:	Tue May 5 12:48:29 2009 +0200

Makefile

@@ -24,7 +24,7 @@
 VERSION = 2009
 PATCHLEVEL = 06
 SUBLEVEL =
-EXTRAVERSION = -rc2
+EXTRAVERSION =
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else

board/bf518f-ezbrd/bf518f-ezbrd.c

@@ -146,3 +146,19 @@ int misc_init_r(void)
 
 	return 0;
 }
+
+int board_early_init_f(void)
+{
+#if !defined(CONFIG_SYS_NO_FLASH)
+	/* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
+	bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
+	bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
+
+# if !defined(CONFIG_BFIN_SPI)
+	/* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
+	bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
+	bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
+# endif
+#endif
+	return 0;
+}

board/ep88x/u-boot.lds

@@ -90,11 +90,13 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  . = .;
   __u_boot_cmd_start = .;
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;
 
 
+  . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;

board/freescale/mpc8569mds/bcsr.c

@@ -27,7 +27,7 @@
 
 void enable_8569mds_flash_write()
 {
-	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 11), BCSR17_FLASH_nWP);
+	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
 }
 
 void disable_8569mds_flash_write()

board/freescale/mpc8569mds/ddr.c

@@ -54,7 +54,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 	 *	0110	3/4 cycle late
 	 *	0111	7/8 cycle late
 	 */
-	popts->clk_adjust = 6;
+	popts->clk_adjust = 4;
 
 	/*
 	 * Factors to consider for CPO:

board/freescale/mpc8569mds/mpc8569mds.c

@@ -77,6 +77,12 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
 	{2,  3, 2, 0, 1}, /* ENET2_GRXCLK              */
 	{2,  2, 1, 0, 2}, /* ENET2_GTXCLK              */
 
+	/* UART1 is muxed with QE PortF bit [9-12].*/
+	{5, 12, 2, 0, 3}, /* UART1_SIN */
+	{5, 9,  1, 0, 3}, /* UART1_SOUT */
+	{5, 10, 2, 0, 3}, /* UART1_CTS_B */
+	{5, 11, 1, 0, 2}, /* UART1_RTS_B */
+
 	{0,  0, 0, 0, QE_IOP_TAB_END} /* END of table */
 };
 

board/lpd7a40x/flash.c

@@ -98,12 +98,12 @@ ulong flash_init (void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/mcc200/mcc200.c

@@ -270,7 +270,7 @@ int misc_init_r (void)
 		/* Redundant environment protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
 			       CONFIG_ENV_ADDR_REDUND,
-			       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 	}
 

board/netphone/flash.c

@@ -73,13 +73,13 @@ unsigned long flash_init(void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/netta/flash.c

@@ -69,13 +69,13 @@ unsigned long flash_init(void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/netta2/flash.c

@@ -70,13 +70,13 @@ unsigned long flash_init(void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/netvia/flash.c

@@ -69,13 +69,13 @@ unsigned long flash_init(void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/pleb2/flash.c

@@ -110,13 +110,13 @@ unsigned long flash_init (void)
 #ifdef CONFIG_ENV_ADDR
 	flash_protect (FLAG_PROTECT_SET,
 		       CONFIG_ENV_ADDR,
-		       CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
+		       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
 #endif
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect (FLAG_PROTECT_SET,
 		       CONFIG_ENV_ADDR_REDUND,
-		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 		       &flash_info[0]);
 #endif
 

board/prodrive/pdnb3/flash.c

@@ -78,7 +78,7 @@ unsigned long flash_init(void)
 	/* Redundant environment protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CONFIG_ENV_ADDR_REDUND,
-		      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+		      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 		      &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 
 	flash_info[0].size = size;

board/rmu/flash.c

@@ -85,18 +85,18 @@ unsigned long flash_init (void)
 	/* ENV protection ON by default */
 	flash_protect(FLAG_PROTECT_SET,
 		      CONFIG_ENV_ADDR,
-		      CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1,
+		      CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
 		      &flash_info[0]);
 #endif
 
 #if defined(CONFIG_ENV_ADDR_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND)
 	debug ("Protect redundand environment: %08lx ... %08lx\n",
 		(ulong)CONFIG_ENV_ADDR_REDUND,
-		(ulong)CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE - 1);
+		(ulong)CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1);
 
 	flash_protect(FLAG_PROTECT_SET,
 		      CONFIG_ENV_ADDR_REDUND,
-		      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+		      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 		      &flash_info[0]);
 #endif
 

board/samsung/smdk2400/flash.c

@@ -98,12 +98,12 @@ ulong flash_init (void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/sixnet/flash.c

@@ -111,13 +111,13 @@ unsigned long flash_init (void)
 #ifdef CONFIG_ENV_ADDR
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
 #endif
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/socrates/socrates.c

@@ -136,7 +136,7 @@ int misc_init_r (void)
 		/* Redundant environment protection ON by default */
 		flash_protect (FLAG_PROTECT_SET,
 			       CONFIG_ENV_ADDR_REDUND,
-			       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 	}
 

board/tqc/tqm85xx/tqm85xx.c

@@ -328,7 +328,7 @@ int misc_init_r (void)
 	/* Redundant environment protection ON by default */
 	flash_protect (FLAG_PROTECT_SET,
 		       CONFIG_ENV_ADDR_REDUND,
-		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 		       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 #endif
 

board/trab/flash.c

@@ -108,12 +108,12 @@ ulong flash_init (void)
 
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR,
-			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
+			CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
 
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect ( FLAG_PROTECT_SET,
 			CONFIG_ENV_ADDR_REDUND,
-			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+			CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			&flash_info[0]);
 #endif
 

board/trizepsiv/eeprom.c

@@ -23,17 +23,17 @@
 
 #include <common.h>
 #include <command.h>
-
-extern u16 read_srom_word(int);
-extern void write_srom_word(int offset, u16 val);
+#include <dm9000.h>
 
 static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
-	int i;
+	unsigned int i;
+	u8 data[2];
 
 	for (i=0; i < 0x40; i++) {
 		if (!(i % 0x10))
-			printf("\n%08lx:", i);
-		printf(" %04x", read_srom_word(i));
+			printf("\n%08x:", i);
+		dm9000_read_srom_word(i, data);
+		printf(" %02x%02x", data[1], data[0]);
 	}
 	printf ("\n");
 	return (0);
@@ -54,7 +54,7 @@ static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *
 		cmd_usage(cmdtp);
 		return 1;
 	}
-	write_srom_word(offset, value);
+	dm9000_write_srom_word(offset, value);
 	return (0);
 }
 

common/cmd_ide.c

@@ -532,7 +532,7 @@ __ide_outb(int dev, int port, unsigned char val)
 		dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
 	outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
 }
-void inline ide_outb (int dev, int port, unsigned char val)
+void ide_outb (int dev, int port, unsigned char val)
 		__attribute__((weak, alias("__ide_outb")));
 
 unsigned char inline
@@ -544,7 +544,7 @@ __ide_inb(int dev, int port)
 		dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
 	return val;
 }
-unsigned char inline ide_inb(int dev, int port)
+unsigned char ide_inb(int dev, int port)
 			__attribute__((weak, alias("__ide_inb")));
 
 #ifdef CONFIG_TUNE_PIO

common/cmd_jffs2.c

@@ -137,8 +137,15 @@
 #define MTD_WRITEABLE_CMD		1
 
 /* current active device and partition number */
-static struct mtd_device *current_dev = NULL;
-static u8 current_partnum = 0;
+#ifdef CONFIG_CMD_MTDPARTS
+/* Use the ones declared in cmd_mtdparts.c */
+extern struct mtd_device *current_mtd_dev;
+extern u8 current_mtd_partnum;
+#else
+/* Use local ones */
+struct mtd_device *current_mtd_dev = NULL;
+u8 current_mtd_partnum = 0;
+#endif
 
 #if defined(CONFIG_CMD_CRAMFS)
 extern int cramfs_check (struct part_info *info);
@@ -346,6 +353,9 @@ static inline u32 get_part_sector_size(struct mtdids *id, struct part_info *part
  * Parse and initialize global mtdids mapping and create global
  * device/partition list.
  *
+ * 'Static' version of command line mtdparts_init() routine. Single partition on
+ * a single device configuration.
+ *
  * @return 0 on success, 1 otherwise
  */
 int mtdparts_init(void)
@@ -360,18 +370,18 @@ int mtdparts_init(void)
 		struct part_info *part;
 
 		initialized = 1;
-		current_dev = (struct mtd_device *)
+		current_mtd_dev = (struct mtd_device *)
 			malloc(sizeof(struct mtd_device) +
 					sizeof(struct part_info) +
 					sizeof(struct mtdids));
-		if (!current_dev) {
+		if (!current_mtd_dev) {
 			printf("out of memory\n");
 			return 1;
 		}
-		memset(current_dev, 0, sizeof(struct mtd_device) +
-					sizeof(struct part_info) + sizeof(struct mtdids));
+		memset(current_mtd_dev, 0, sizeof(struct mtd_device) +
+		       sizeof(struct part_info) + sizeof(struct mtdids));
 
-		id = (struct mtdids *)(current_dev + 1);
+		id = (struct mtdids *)(current_mtd_dev + 1);
 		part = (struct part_info *)(id + 1);
 
 		/* id */
@@ -386,7 +396,7 @@ int mtdparts_init(void)
 		if ((mtd_id_parse(dev_name, NULL, &id->type, &id->num) != 0) ||
 				(mtd_device_validate(id->type, id->num, &size) != 0)) {
 			printf("incorrect device: %s%d\n", MTD_DEV_TYPE(id->type), id->num);
-			free(current_dev);
+			free(current_mtd_dev);
 			return 1;
 		}
 		id->size = size;
@@ -413,7 +423,7 @@ int mtdparts_init(void)
 
 		part->sector_size = get_part_sector_size(id, part);
 
-		part->dev = current_dev;
+		part->dev = current_mtd_dev;
 		INIT_LIST_HEAD(&part->link);
 
 		/* recalculate size if needed */
@@ -424,11 +434,11 @@ int mtdparts_init(void)
 				part->name, part->size, part->offset);
 
 		/* device */
-		current_dev->id = id;
-		INIT_LIST_HEAD(&current_dev->link);
-		current_dev->num_parts = 1;
-		INIT_LIST_HEAD(&current_dev->parts);
-		list_add(&part->link, &current_dev->parts);
+		current_mtd_dev->id = id;
+		INIT_LIST_HEAD(&current_mtd_dev->link);
+		current_mtd_dev->num_parts = 1;
+		INIT_LIST_HEAD(&current_mtd_dev->parts);
+		list_add(&part->link, &current_mtd_dev->parts);
 	}
 
 	return 0;
@@ -516,7 +526,7 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (mtdparts_init() !=0)
 		return 1;
 
-	if ((part = jffs2_part_info(current_dev, current_partnum))){
+	if ((part = jffs2_part_info(current_mtd_dev, current_mtd_partnum))){
 
 		/* check partition type for cramfs */
 		fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2");
@@ -567,7 +577,7 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (mtdparts_init() !=0)
 		return 1;
 
-	if ((part = jffs2_part_info(current_dev, current_partnum))){
+	if ((part = jffs2_part_info(current_mtd_dev, current_mtd_partnum))){
 
 		/* check partition type for cramfs */
 		if (cramfs_check(part)) {
@@ -602,7 +612,7 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (mtdparts_init() !=0)
 		return 1;
 
-	if ((part = jffs2_part_info(current_dev, current_partnum))){
+	if ((part = jffs2_part_info(current_mtd_dev, current_mtd_partnum))){
 
 		/* check partition type for cramfs */
 		fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2");

common/cmd_mmc.c

@@ -135,8 +135,9 @@ int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	return 0;
 }
 
-U_BOOT_CMD(mmcinfo, 2, 0, do_mmcinfo, "mmcinfo <dev num>-- display MMC info\n",
-		NULL);
+U_BOOT_CMD(mmcinfo,	2,	0,	do_mmcinfo,
+	"print MMC information",
+	"<dev num>\n");
 
 int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
@@ -148,6 +149,9 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			int dev = simple_strtoul(argv[2], NULL, 10);
 			struct mmc *mmc = find_mmc_device(dev);
 
+			if (!mmc)
+				return 1;
+
 			mmc_init(mmc);
 
 			return 0;
@@ -174,6 +178,9 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			u32 blk = simple_strtoul(argv[4], NULL, 16);
 			struct mmc *mmc = find_mmc_device(dev);
 
+			if (!mmc)
+				return 1;
+
 			printf("\nMMC read: dev # %d, block # %d, count %d ... ",
 				dev, blk, cnt);
 
@@ -196,6 +203,9 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 			int blk = simple_strtoul(argv[4], NULL, 16);
 
+			if (!mmc)
+				return 1;
+
 			printf("\nMMC write: dev # %d, block # %d, count %d ... ",
 				dev, blk, cnt);
 
@@ -218,8 +228,8 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 U_BOOT_CMD(
 	mmc, 6, 1, do_mmcops,
 	"MMC sub system",
-	"mmc read <device num> addr blk# cnt\n"
+	"read <device num> addr blk# cnt\n"
 	"mmc write <device num> addr blk# cnt\n"
 	"mmc rescan <device num>\n"
-	"mmc list - lists available devices\n");
+	"mmc list - list available devices\n");
 #endif

common/cmd_mtdparts.c

@@ -166,8 +166,8 @@ struct list_head mtdids;
 struct list_head devices;
 
 /* current active device and partition number */
-static struct mtd_device *current_dev = NULL;
-static u8 current_partnum = 0;
+struct mtd_device *current_mtd_dev = NULL;
+u8 current_mtd_partnum = 0;
 
 static struct part_info* mtd_part_info(struct mtd_device *dev, unsigned int part_num);
 
@@ -251,12 +251,12 @@ static void index_partitions(void)
 
 	DEBUGF("--- index partitions ---\n");
 
-	if (current_dev) {
+	if (current_mtd_dev) {
 		mtddevnum = 0;
 		list_for_each(dentry, &devices) {
 			dev = list_entry(dentry, struct mtd_device, link);
-			if (dev == current_dev) {
-				mtddevnum += current_partnum;
+			if (dev == current_mtd_dev) {
+				mtddevnum += current_mtd_partnum;
 				sprintf(buf, "%d", mtddevnum);
 				setenv("mtddevnum", buf);
 				break;
@@ -264,7 +264,7 @@ static void index_partitions(void)
 			mtddevnum += dev->num_parts;
 		}
 
-		part = mtd_part_info(current_dev, current_partnum);
+		part = mtd_part_info(current_mtd_dev, current_mtd_partnum);
 		setenv("mtddevname", part->name);
 
 		DEBUGF("=> mtddevnum %d,\n=> mtddevname %s\n", mtddevnum, part->name);
@@ -285,9 +285,9 @@ static void current_save(void)
 
 	DEBUGF("--- current_save ---\n");
 
-	if (current_dev) {
-		sprintf(buf, "%s%d,%d", MTD_DEV_TYPE(current_dev->id->type),
-					current_dev->id->num, current_partnum);
+	if (current_mtd_dev) {
+		sprintf(buf, "%s%d,%d", MTD_DEV_TYPE(current_mtd_dev->id->type),
+					current_mtd_dev->id->num, current_mtd_partnum);
 
 		setenv("partition", buf);
 		strncpy(last_partition, buf, 16);
@@ -498,18 +498,18 @@ static int part_del(struct mtd_device *dev, struct part_info *part)
 
 	/* otherwise just delete this partition */
 
-	if (dev == current_dev) {
+	if (dev == current_mtd_dev) {
 		/* we are modyfing partitions for the current device,
 		 * update current */
 		struct part_info *curr_pi;
-		curr_pi = mtd_part_info(current_dev, current_partnum);
+		curr_pi = mtd_part_info(current_mtd_dev, current_mtd_partnum);
 
 		if (curr_pi) {
 			if (curr_pi == part) {
 				printf("current partition deleted, resetting current to 0\n");
-				current_partnum = 0;
+				current_mtd_partnum = 0;
 			} else if (part->offset <= curr_pi->offset) {
-				current_partnum--;
+				current_mtd_partnum--;
 			}
 			current_save_needed = 1;
 		}
@@ -579,8 +579,8 @@ static int part_sort_add(struct mtd_device *dev, struct part_info *part)
 
 	/* get current partition info if we are updating current device */
 	curr_pi = NULL;
-	if (dev == current_dev)
-		curr_pi = mtd_part_info(current_dev, current_partnum);
+	if (dev == current_mtd_dev)
+		curr_pi = mtd_part_info(current_mtd_dev, current_mtd_partnum);
 
 	list_for_each(entry, &dev->parts) {
 		struct part_info *pi;
@@ -600,7 +600,7 @@ static int part_sort_add(struct mtd_device *dev, struct part_info *part)
 			if (curr_pi && (pi->offset <= curr_pi->offset)) {
 				/* we are modyfing partitions for the current
 				 * device, update current */
-				current_partnum++;
+				current_mtd_partnum++;
 				current_save();
 			} else {
 				index_partitions();
@@ -842,15 +842,15 @@ static int device_del(struct mtd_device *dev)
 	list_del(&dev->link);
 	free(dev);
 
-	if (dev == current_dev) {
+	if (dev == current_mtd_dev) {
 		/* we just deleted current device */
 		if (list_empty(&devices)) {
-			current_dev = NULL;
+			current_mtd_dev = NULL;
 		} else {
 			/* reset first partition from first dev from the
 			 * devices list as current */
-			current_dev = list_entry(devices.next, struct mtd_device, link);
-			current_partnum = 0;
+			current_mtd_dev = list_entry(devices.next, struct mtd_device, link);
+			current_mtd_partnum = 0;
 		}
 		current_save();
 		return 0;
@@ -893,8 +893,8 @@ static void device_add(struct mtd_device *dev)
 	u8 current_save_needed = 0;
 
 	if (list_empty(&devices)) {
-		current_dev = dev;
-		current_partnum = 0;
+		current_mtd_dev = dev;
+		current_mtd_partnum = 0;
 		current_save_needed = 1;
 	}
 
@@ -1050,7 +1050,7 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_
 static int mtd_devices_init(void)
 {
 	last_parts[0] = '\0';
-	current_dev = NULL;
+	current_mtd_dev = NULL;
 	current_save();
 
 	return device_delall(&devices);
@@ -1330,13 +1330,13 @@ static void list_partitions(void)
 	if (list_empty(&devices))
 		printf("no partitions defined\n");
 
-	/* current_dev is not NULL only when we have non empty device list */
-	if (current_dev) {
-		part = mtd_part_info(current_dev, current_partnum);
+	/* current_mtd_dev is not NULL only when we have non empty device list */
+	if (current_mtd_dev) {
+		part = mtd_part_info(current_mtd_dev, current_mtd_partnum);
 		if (part) {
 			printf("\nactive partition: %s%d,%d - (%s) 0x%08x @ 0x%08x\n",
-					MTD_DEV_TYPE(current_dev->id->type),
-					current_dev->id->num, current_partnum,
+					MTD_DEV_TYPE(current_mtd_dev->id->type),
+					current_mtd_dev->id->num, current_mtd_partnum,
 					part->name, part->size, part->offset);
 		} else {
 			printf("could not get current partition info\n\n");
@@ -1709,13 +1709,13 @@ int mtdparts_init(void)
 		strncpy(last_parts, parts, MTDPARTS_MAXLEN);
 
 		/* reset first partition from first dev from the list as current */
-		current_dev = list_entry(devices.next, struct mtd_device, link);
-		current_partnum = 0;
+		current_mtd_dev = list_entry(devices.next, struct mtd_device, link);
+		current_mtd_partnum = 0;
 		current_save();
 
-		DEBUGF("mtdparts_init: current_dev  = %s%d, current_partnum = %d\n",
-				MTD_DEV_TYPE(current_dev->id->type),
-				current_dev->id->num, current_partnum);
+		DEBUGF("mtdparts_init: current_mtd_dev  = %s%d, current_mtd_partnum = %d\n",
+				MTD_DEV_TYPE(current_mtd_dev->id->type),
+				current_mtd_dev->id->num, current_mtd_partnum);
 	}
 
 	/* mtdparts variable was reset to NULL, delete all devices/partitions */
@@ -1735,8 +1735,8 @@ int mtdparts_init(void)
 		DEBUGF("--- getting current partition: %s\n", tmp_ep);
 
 		if (find_dev_and_part(tmp_ep, &cdev, &pnum, &p) == 0) {
-			current_dev = cdev;
-			current_partnum = pnum;
+			current_mtd_dev = cdev;
+			current_mtd_partnum = pnum;
 			current_save();
 		}
 	} else if (getenv("partition") == NULL) {
@@ -1820,8 +1820,8 @@ int do_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (find_dev_and_part(argv[1], &dev, &pnum, &part) != 0)
 		return 1;
 
-	current_dev = dev;
-	current_partnum = pnum;
+	current_mtd_dev = dev;
+	current_mtd_partnum = pnum;
 	current_save();
 
 	printf("partition changed to %s%d,%d\n",

common/cmd_ubi.c

@@ -327,7 +327,7 @@ static int ubi_volume_read(char *volume, char *buf, size_t size)
 	}
 	if (i == ubi->vtbl_slots) {
 		printf("%s volume not found\n", volume);
-		return 0;
+		return -ENODEV;
 	}
 
 	printf("read %i bytes from volume %d to %x(buf address)\n",

cpu/arm926ejs/at91/cpu.c

@@ -1,3 +1,26 @@
+/*
+ * (C) Copyright 2009
+ * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
 #include <config.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pmc.h>

cpu/blackfin/interrupts.c

@@ -95,11 +95,12 @@ void udelay(unsigned long usec)
 int timer_init(void)
 {
 	*pTCNTL = 0x1;
+	CSYNC();
 	*pTSCALE = 0x0;
 	*pTCOUNT = MAX_TIM_LOAD;
 	*pTPERIOD = MAX_TIM_LOAD;
 	*pTCNTL = 0x7;
-	asm("CSYNC;");
+	CSYNC();
 
 	timestamp = 0;
 	last_time = 0;
@@ -151,5 +152,5 @@ ulong get_timer(ulong base)
 
 void reset_timer(void)
 {
-	timestamp = 0;
+	timer_init();
 }

cpu/mips/au1x00_eth.c

@@ -276,6 +276,10 @@ static int au1x00_init(struct eth_device* dev, bd_t * bd){
 }
 
 static void au1x00_halt(struct eth_device* dev){
+	volatile u32 *macen = (volatile u32*)MAC0_ENABLE;
+
+	/* Put MAC0 in reset */
+	*macen = 0;
 }
 
 int au1x00_enet_initialize(bd_t *bis){

cpu/mpc85xx/tlb.c

@@ -134,7 +134,7 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
 	unsigned int tlb_size;
 	unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
 	unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
-	unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
+	unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
 	u64 size, memsize = (u64)memsize_in_meg << 20;
 
 	size = min(memsize, CONFIG_MAX_MEM_MAPPED);
@@ -165,7 +165,7 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
 	}
 
 	if (memsize)
-		printf("%lldM left unmapped\n", memsize >> 20);
+		print_size(memsize, " left unmapped\n");
 
 	/*
 	 * Confirm that the requested amount of memory was mapped.

cpu/mpc8xxx/ddr/ctrl_regs.c

@@ -1199,8 +1199,7 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts,
 
 	/* Chip Select Memory Bounds (CSn_BNDS) */
 	for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
-		phys_size_t sa = 0;
-		phys_size_t ea = 0;
+		unsigned long long ea = 0, sa = 0;
 
 		if (popts->ba_intlv_ctl && (i > 0) &&
 			((popts->ba_intlv_ctl & 0x60) != FSL_DDR_CS2_CS3 )) {

cpu/mpc8xxx/ddr/ddr.h

@@ -54,7 +54,7 @@ typedef struct {
 #define STEP_PROGRAM_REGS            (1 << 6)
 #define STEP_ALL                     0xFFF
 
-extern phys_size_t
+extern unsigned long long
 fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step);
 
 extern const char * step_to_string(unsigned int step);

cpu/mpc8xxx/ddr/ddr1_dimm_params.c

@@ -33,10 +33,10 @@
  * 2 or 5 bits off and shifting them up to the top.
  */
 
-static phys_size_t
+static unsigned long long
 compute_ranksize(unsigned int mem_type, unsigned char row_dens)
 {
-	phys_size_t bsize;
+	unsigned long long bsize;
 
 	/* Bottom 2 bits up to the top. */
 	bsize = ((row_dens >> 2) | ((row_dens & 3) << 6));

cpu/mpc8xxx/ddr/ddr2_dimm_params.c

@@ -32,10 +32,10 @@
  * 2 or 5 bits off and shifting them up to the top.
  *
  */
-static phys_size_t
+static unsigned long long
 compute_ranksize(unsigned int mem_type, unsigned char row_dens)
 {
-	phys_size_t bsize;
+	unsigned long long bsize;
 
 	/* Bottom 5 bits up to the top. */
 	bsize = ((row_dens >> 5) | ((row_dens & 31) << 3));

cpu/mpc8xxx/ddr/ddr3_dimm_params.c

@@ -52,10 +52,10 @@
  * 	011		32bits
  *
  */
-static phys_size_t
+static unsigned long long
 compute_ranksize(const ddr3_spd_eeprom_t *spd)
 {
-	phys_size_t bsize;
+	unsigned long long bsize;
 
 	int nbit_sdram_cap_bsize = 0;
 	int nbit_primary_bus_width = 0;

cpu/mpc8xxx/ddr/main.c

@@ -215,9 +215,7 @@ int step_assign_addresses(fsl_ddr_info_t *pinfo,
 	}
 
 	if (*memctl_interleaving) {
-		phys_addr_t addr;
-		phys_size_t total_mem_per_ctlr = 0;
-
+		unsigned long long addr, total_mem_per_ctlr = 0;
 		/*
 		 * If interleaving between memory controllers,
 		 * make each controller start at a base address
@@ -235,14 +233,13 @@ int step_assign_addresses(fsl_ddr_info_t *pinfo,
 
 		for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
 			addr = 0;
-			pinfo->common_timing_params[i].base_address =
-						(phys_addr_t)addr;
+			pinfo->common_timing_params[i].base_address = 0ull;
 			for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
 				unsigned long long cap
 					= pinfo->dimm_params[i][j].capacity;
 
 				pinfo->dimm_params[i][j].base_address = addr;
-				addr += (phys_addr_t)(cap >> dbw_cap_adj[i]);
+				addr += cap >> dbw_cap_adj[i];
 				total_mem_per_ctlr += cap >> dbw_cap_adj[i];
 			}
 		}
@@ -252,18 +249,17 @@ int step_assign_addresses(fsl_ddr_info_t *pinfo,
 		 * Simple linear assignment if memory
 		 * controllers are not interleaved.
 		 */
-		phys_size_t cur_memsize = 0;
+		unsigned long long cur_memsize = 0;
 		for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
-			phys_size_t total_mem_per_ctlr = 0;
+			u64 total_mem_per_ctlr = 0;
 			pinfo->common_timing_params[i].base_address =
-						(phys_addr_t)cur_memsize;
+						cur_memsize;
 			for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
 				/* Compute DIMM base addresses. */
 				unsigned long long cap =
 					pinfo->dimm_params[i][j].capacity;
-
 				pinfo->dimm_params[i][j].base_address =
-					(phys_addr_t)cur_memsize;
+					cur_memsize;
 				cur_memsize += cap >> dbw_cap_adj[i];
 				total_mem_per_ctlr += cap >> dbw_cap_adj[i];
 			}
@@ -275,13 +271,13 @@ int step_assign_addresses(fsl_ddr_info_t *pinfo,
 	return 0;
 }
 
-phys_size_t
+unsigned long long
 fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step)
 {
 	unsigned int i, j;
 	unsigned int all_controllers_memctl_interleaving = 0;
 	unsigned int all_controllers_rank_interleaving = 0;
-	phys_size_t total_mem = 0;
+	unsigned long long total_mem = 0;
 
 	fsl_ddr_cfg_regs_t *ddr_reg = pinfo->fsl_ddr_config_reg;
 	common_timing_params_t *timing_params = pinfo->common_timing_params;
@@ -424,15 +420,6 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step)
 			}
 		}
 
-#if !defined(CONFIG_PHYS_64BIT)
-		/* Check for 4G or more with a 32-bit phys_addr_t.  Bad. */
-		if (max_end >= 0xff) {
-			printf("This U-Boot only supports < 4G of DDR\n");
-			printf("You could rebuild it with CONFIG_PHYS_64BIT\n");
-			return CONFIG_MAX_MEM_MAPPED;
-		}
-#endif
-
 		total_mem = 1 + (((unsigned long long)max_end << 24ULL)
 				    | 0xFFFFFFULL);
 	}
@@ -450,7 +437,7 @@ phys_size_t fsl_ddr_sdram(void)
 {
 	unsigned int i;
 	unsigned int memctl_interleaved;
-	phys_size_t total_memory;
+	unsigned long long total_memory;
 	fsl_ddr_info_t info;
 
 	/* Reset info structure. */
@@ -515,7 +502,17 @@ phys_size_t fsl_ddr_sdram(void)
 		}
 	}
 
-	debug("total_memory = %llu\n", (u64)total_memory);
+	debug("total_memory = %llu\n", total_memory);
+
+#if !defined(CONFIG_PHYS_64BIT)
+	/* Check for 4G or more.  Bad. */
+	if (total_memory >= (1ull << 32)) {
+		printf("Detected %lld MB of memory\n", total_memory >> 20);
+		printf("This U-Boot only supports < 4G of DDR\n");
+		printf("You could rebuild it with CONFIG_PHYS_64BIT\n");
+		total_memory = CONFIG_MAX_MEM_MAPPED;
+	}
+#endif
 
 	return total_memory;
 }

cpu/mpc8xxx/ddr/util.c

@@ -64,6 +64,9 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params,
 			   unsigned int memctl_interleaved,
 			   unsigned int ctrl_num)
 {
+	unsigned long long base = memctl_common_params->base_address;
+	unsigned long long size = memctl_common_params->total_mem;
+
 	/*
 	 * If no DIMMs on this controller, do not proceed any further.
 	 */
@@ -71,6 +74,13 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params,
 		return;
 	}
 
+#if !defined(CONFIG_PHYS_64BIT)
+	if (base >= CONFIG_MAX_MEM_MAPPED)
+		return;
+	if ((base + size) >= CONFIG_MAX_MEM_MAPPED)
+		size = CONFIG_MAX_MEM_MAPPED - base;
+#endif
+
 	if (ctrl_num == 0) {
 		/*
 		 * Set up LAW for DDR controller 1 space.
@@ -78,16 +88,12 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params,
 		unsigned int lawbar1_target_id = memctl_interleaved
 			? LAW_TRGT_IF_DDR_INTRLV : LAW_TRGT_IF_DDR_1;
 
-		if (set_ddr_laws(memctl_common_params->base_address,
-				memctl_common_params->total_mem,
-				lawbar1_target_id) < 0) {
+		if (set_ddr_laws(base, size, lawbar1_target_id) < 0) {
 			printf("ERROR\n");
 			return ;
 		}
 	} else if (ctrl_num == 1) {
-		if (set_ddr_laws(memctl_common_params->base_address,
-				memctl_common_params->total_mem,
-				LAW_TRGT_IF_DDR_2) < 0) {
+		if (set_ddr_laws(base, size, LAW_TRGT_IF_DDR_2) < 0) {
 			printf("ERROR\n");
 			return ;
 		}

cpu/ppc4xx/ndfc.c

@@ -1,9 +1,9 @@
 /*
  * Overview:
  *   Platform independend driver for NDFC (NanD Flash Controller)
- *   integrated into EP440 cores
+ *   integrated into IBM/AMCC PPC4xx cores
  *
- * (C) Copyright 2006-2007
+ * (C) Copyright 2006-2009
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * Based on original work by
@@ -32,10 +32,7 @@
 #include <common.h>
 
 #if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
-	(defined(CONFIG_440EP) || defined(CONFIG_440GR) ||	     \
-	 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||	     \
-	 defined(CONFIG_405EZ) || defined(CONFIG_405EX) ||	     \
-	 defined(CONFIG_460EX) || defined(CONFIG_460GT))
+    defined(CONFIG_NAND_NDFC)
 
 #include <nand.h>
 #include <linux/mtd/ndfc.h>
@@ -96,8 +93,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
 
 	/* The NDFC uses Smart Media (SMC) bytes order
 	 */
-	ecc_code[0] = p[1];
-	ecc_code[1] = p[2];
+	ecc_code[0] = p[2];
+	ecc_code[1] = p[1];
 	ecc_code[2] = p[3];
 
 	return 0;

doc/README.mpc8569mds

@@ -0,0 +1,77 @@
+Overview
+--------
+MPC8569MDS is composed of two boards - PB (Processor Board) and PIB (Platform
+I/O Board). The mpc8569 PowerTM processor is mounted on PB board.
+
+Building U-boot
+-----------
+	make MPC8569MDS_config
+	make
+
+Memory Map
+----------
+0x0000_0000   0x7fff_ffff     DDR                     2G
+0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
+0xe000_0000   0xe00f_ffff     CCSRBAR                 1M
+0xe280_0000   0xe2ff_ffff     PCIe I/O                8M
+0xc000_0000   0xdfff_ffff     SRIO                    512MB
+0xf000_0000   0xf3ff_ffff     SDRAM                   64MB
+0xf800_0000   0xf800_7fff     BCSR                    32KB
+0xf800_8000   0xf800_ffff     PIB (CS4)               32KB
+0xf801_0000   0xf801_7fff     PIB (CS5)               32KB
+0xfe00_0000   0xffff_ffff     Flash                   32MB
+
+
+Flashing u-boot Images
+---------------
+
+Use the following commands to program u-boot image into flash:
+
+	=> tftp 1000000 u-boot.bin
+	=> protect off all
+	=> erase fff80000 ffffffff
+	=> cp.b 1000000 fff80000 80000
+
+
+Setting the correct MAC addresses
+-----------------------
+The command - "mac", is introduced to set on-board system EEPROM in the format
+defined in board/freescale/common/sys_eeprom.c. we must set all 8 MAC
+addresses for the MPC8569MDS's 8 Ethernet ports and save it by "mac save" when
+we first get the board. The commands are as follows:
+	=> mac i NXID	/* Set NXID to this EEPROM */
+	=> mac e 01	/* Set Errata, this value is not defined by hardware
+			   designer, we can set whatever we want */
+	=> mac n a0	/* Set Serial Number. This is not defined by hardware
+			   designer, we can set whatever we want */
+	=> mac date 090512080000  /* Set the date in YYMMDDhhmmss format */
+
+	=> mac p 8	/* Set the number of mac ports, it should be 8 */
+	=> mac 0 xx:xx:xx:xx:xx:xx  /* xx:xx:xx:xx:xx:xx should be the real mac
+				       address, you can refer to the value on
+				       the sticker of the rear side of the board
+				     */
+	.....
+	=> mac 7 xx:xx:xx:xx:xx:xx
+	=> mac read
+	=> mac save
+
+After resetting the board, the ethxaddrs will be filled with the mac addresses
+if such environment variables are blank(never been set before). If the ethxaddr
+has been set but we want to update it, we can use the following commands:
+	=> setenv ethxaddr	/* x = "none",1,2,3,4,5,6,7 */
+	=> save
+	=> reset
+
+
+Programming the ucode to flash
+---------------------------------
+MPC8569 doesn't have ROM in QE, so we must upload the microcode(ucode) to QE's
+IRAM so that the QE can work. The ucode binary can be downloaded from
+http://opensource.freescale.com/firmware/, and it must be programmed to
+the address 0xfff0000 in the flash. Otherwise, the QE can't work and uboot
+hangs at "Net:"
+
+
+Please note the above two steps(setting mac addresses and programming ucode) are
+very important to get the board booting up and working properly.

drivers/mmc/fsl_esdhc.c

@@ -206,12 +206,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 		cmdrsp2 = in_be32(&regs->cmdrsp2);
 		cmdrsp1 = in_be32(&regs->cmdrsp1);
 		cmdrsp0 = in_be32(&regs->cmdrsp0);
-		((uint *)(cmd->response))[0] = (cmdrsp3 << 8) | (cmdrsp2 >> 24);
-		((uint *)(cmd->response))[1] = (cmdrsp2 << 8) | (cmdrsp1 >> 24);
-		((uint *)(cmd->response))[2] = (cmdrsp1 << 8) | (cmdrsp0 >> 24);
-		((uint *)(cmd->response))[3] = (cmdrsp0 << 8);
+		cmd->response[0] = (cmdrsp3 << 8) | (cmdrsp2 >> 24);
+		cmd->response[1] = (cmdrsp2 << 8) | (cmdrsp1 >> 24);
+		cmd->response[2] = (cmdrsp1 << 8) | (cmdrsp0 >> 24);
+		cmd->response[3] = (cmdrsp0 << 8);
 	} else
-		((uint *)(cmd->response))[0] = in_be32(&regs->cmdrsp0);
+		cmd->response[0] = in_be32(&regs->cmdrsp0);
 
 	/* Wait until all of the blocks are transferred */
 	if (data) {

drivers/mmc/mmc.c

@@ -31,6 +31,7 @@
 #include <malloc.h>
 #include <linux/list.h>
 #include <mmc.h>
+#include <div64.h>
 
 static struct list_head mmc_devices;
 static int cur_dev_num = -1;
@@ -155,8 +156,8 @@ int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size)
 	char *buffer;
 	int i;
 	int blklen = mmc->read_bl_len;
-	int startblock = src / blklen;
-	int endblock = (src + size - 1) / blklen;
+	int startblock = lldiv(src, mmc->read_bl_len);
+	int endblock = lldiv(src + size - 1, mmc->read_bl_len);
 	int err = 0;
 
 	/* Make a buffer big enough to hold all the blocks we might read */
@@ -291,7 +292,7 @@ sd_send_op_cond(struct mmc *mmc)
 	if (mmc->version != SD_VERSION_2)
 		mmc->version = SD_VERSION_1_0;
 
-	mmc->ocr = ((uint *)(cmd.response))[0];
+	mmc->ocr = cmd.response[0];
 
 	mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 	mmc->rca = 0;
@@ -326,7 +327,7 @@ int mmc_send_op_cond(struct mmc *mmc)
 		return UNUSABLE_ERR;
 
 	mmc->version = MMC_VERSION_UNKNOWN;
-	mmc->ocr = ((uint *)(cmd.response))[0];
+	mmc->ocr = cmd.response[0];
 
 	mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 	mmc->rca = 0;
@@ -486,8 +487,8 @@ retry_scr:
 		return err;
 	}
 
-	mmc->scr[0] = scr[0];
-	mmc->scr[1] = scr[1];
+	mmc->scr[0] = __be32_to_cpu(scr[0]);
+	mmc->scr[1] = __be32_to_cpu(scr[1]);
 
 	switch ((mmc->scr[0] >> 24) & 0xf) {
 		case 0:
@@ -517,7 +518,7 @@ retry_scr:
 			return err;
 
 		/* The high-speed function is busy.  Try again */
-		if (!switch_status[7] & SD_HIGHSPEED_BUSY)
+		if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
 			break;
 	}
 
@@ -525,7 +526,7 @@ retry_scr:
 		mmc->card_caps |= MMC_MODE_4BIT;
 
 	/* If high-speed isn't supported, we return */
-	if (!(switch_status[3] & SD_HIGHSPEED_SUPPORTED))
+	if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
 		return 0;
 
 	err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)&switch_status);
@@ -533,7 +534,7 @@ retry_scr:
 	if (err)
 		return err;
 
-	if ((switch_status[4] & 0x0f000000) == 0x01000000)
+	if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
 		mmc->card_caps |= MMC_MODE_HS;
 
 	return 0;
@@ -631,7 +632,7 @@ int mmc_startup(struct mmc *mmc)
 		return err;
 
 	if (IS_SD(mmc))
-		mmc->rca = (((uint *)(cmd.response))[0] >> 16) & 0xffff;
+		mmc->rca = (cmd.response[0] >> 16) & 0xffff;
 
 	/* Get the Card-Specific Data */
 	cmd.cmdidx = MMC_CMD_SEND_CSD;
@@ -644,13 +645,13 @@ int mmc_startup(struct mmc *mmc)
 	if (err)
 		return err;
 
-	mmc->csd[0] = ((uint *)(cmd.response))[0];
-	mmc->csd[1] = ((uint *)(cmd.response))[1];
-	mmc->csd[2] = ((uint *)(cmd.response))[2];
-	mmc->csd[3] = ((uint *)(cmd.response))[3];
+	mmc->csd[0] = cmd.response[0];
+	mmc->csd[1] = cmd.response[1];
+	mmc->csd[2] = cmd.response[2];
+	mmc->csd[3] = cmd.response[3];
 
 	if (mmc->version == MMC_VERSION_UNKNOWN) {
-		int version = (cmd.response[0] >> 2) & 0xf;
+		int version = (cmd.response[0] >> 26) & 0xf;
 
 		switch (version) {
 			case 0:
@@ -675,17 +676,17 @@ int mmc_startup(struct mmc *mmc)
 	}
 
 	/* divide frequency by 10, since the mults are 10x bigger */
-	freq = fbase[(cmd.response[3] & 0x7)];
-	mult = multipliers[((cmd.response[3] >> 3) & 0xf)];
+	freq = fbase[(cmd.response[0] & 0x7)];
+	mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
 
 	mmc->tran_speed = freq * mult;
 
-	mmc->read_bl_len = 1 << ((((uint *)(cmd.response))[1] >> 16) & 0xf);
+	mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
 
 	if (IS_SD(mmc))
 		mmc->write_bl_len = mmc->read_bl_len;
 	else
-		mmc->write_bl_len = 1 << ((((uint *)(cmd.response))[3] >> 22) & 0xf);
+		mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
 
 	if (mmc->high_capacity) {
 		csize = (mmc->csd[1] & 0x3f) << 16
@@ -789,14 +790,14 @@ int mmc_startup(struct mmc *mmc)
 	mmc->block_dev.lun = 0;
 	mmc->block_dev.type = 0;
 	mmc->block_dev.blksz = mmc->read_bl_len;
-	mmc->block_dev.lba = mmc->capacity/mmc->read_bl_len;
-	sprintf(mmc->block_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x%02x",
-			mmc->cid[0], mmc->cid[1], mmc->cid[2],
-			mmc->cid[9], mmc->cid[10], mmc->cid[11], mmc->cid[12]);
-	sprintf(mmc->block_dev.product,"%c%c%c%c%c", mmc->cid[3],
-			mmc->cid[4], mmc->cid[5], mmc->cid[6], mmc->cid[7]);
-	sprintf(mmc->block_dev.revision,"%d.%d", mmc->cid[8] >> 4,
-			mmc->cid[8] & 0xf);
+	mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
+	sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8,
+			(mmc->cid[2] << 8) | (mmc->cid[3] >> 24));
+	sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff,
+			(mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
+			(mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
+	sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28,
+			(mmc->cid[2] >> 24) & 0xf);
 	init_part(&mmc->block_dev);
 
 	return 0;
@@ -818,7 +819,7 @@ int mmc_send_if_cond(struct mmc *mmc)
 	if (err)
 		return err;
 
-	if ((((uint *)(cmd.response))[0] & 0xff) != 0xaa)
+	if ((cmd.response[0] & 0xff) != 0xaa)
 		return UNUSABLE_ERR;
 	else
 		mmc->version = SD_VERSION_2;
@@ -846,7 +847,7 @@ block_dev_desc_t *mmc_get_dev(int dev)
 {
 	struct mmc *mmc = find_mmc_device(dev);
 
-	return &mmc->block_dev;
+	return mmc ? &mmc->block_dev : NULL;
 }
 
 int mmc_init(struct mmc *mmc)
@@ -867,10 +868,6 @@ int mmc_init(struct mmc *mmc)
 	/* Test for SD version 2 */
 	err = mmc_send_if_cond(mmc);
 
-	/* If we got an error other than timeout, we bail */
-	if (err && err != TIMEOUT)
-		return err;
-
 	/* Now try to get the SD card's operating condition */
 	err = sd_send_op_cond(mmc);
 

drivers/mtd/cfi_flash.c

@@ -2098,7 +2098,7 @@ unsigned long flash_init (void)
 #ifdef CONFIG_ENV_ADDR_REDUND
 	flash_protect (FLAG_PROTECT_SET,
 		       CONFIG_ENV_ADDR_REDUND,
-		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
+		       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 		       flash_get_info(CONFIG_ENV_ADDR_REDUND));
 #endif
 

drivers/mtd/cfi_mtd.c

@@ -43,11 +43,16 @@ static int cfi_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
 	int s_last = -1;
 	int error, sect;
 
-	for (sect = 0; sect < fi->sector_count - 1; sect++) {
+	for (sect = 0; sect < fi->sector_count; sect++) {
 		if (a_start == fi->start[sect])
 			s_first = sect;
 
-		if (a_end == fi->start[sect + 1]) {
+		if (sect < fi->sector_count - 1) {
+			if (a_end == fi->start[sect + 1]) {
+				s_last = sect;
+				break;
+			}
+		} else {
 			s_last = sect;
 			break;
 		}

drivers/mtd/nand/nand_ecc.c

@@ -48,6 +48,11 @@
 #include <asm/errno.h>
 #include <linux/mtd/mtd.h>
 
+/* The PPC4xx NDFC uses Smart Media (SMC) bytes order */
+#ifdef CONFIG_NAND_NDFC
+#define CONFIG_MTD_NAND_ECC_SMC
+#endif
+
 /*
  * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(),
  * only nand_correct_data() is needed

drivers/net/4xx_enet.c

@@ -871,6 +871,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
     defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
     defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
     defined(CONFIG_405EX)
+	u32 opbfreq;
 	sys_info_t sysinfo;
 #if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
@@ -997,12 +998,13 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	/* Whack the M1 register */
 	mode_reg = 0x0;
 	mode_reg &= ~0x00000038;
-	if (sysinfo.freqOPB <= 50000000);
-	else if (sysinfo.freqOPB <= 66666667)
+	opbfreq = sysinfo.freqOPB / 1000000;
+	if (opbfreq <= 50);
+	else if (opbfreq <= 66)
 		mode_reg |= EMAC_M1_OBCI_66;
-	else if (sysinfo.freqOPB <= 83333333)
+	else if (opbfreq <= 83)
 		mode_reg |= EMAC_M1_OBCI_83;
-	else if (sysinfo.freqOPB <= 100000000)
+	else if (opbfreq <= 100)
 		mode_reg |= EMAC_M1_OBCI_100;
 	else
 		mode_reg |= EMAC_M1_OBCI_GT100;

drivers/net/dm9000x.c

@@ -53,7 +53,7 @@ v1.2   03/18/2003       Weilun Huang <weilun_huang@davicom.com.tw>:
 			  notes (i.e. double reset)
 			- some minor code cleanups
 			These changes are tested with DM9000{A,EP,E} together
-			with a 200MHz Atmel AT91SAM92161 core
+			with a 200MHz Atmel AT91SAM9261 core
 
 TODO: external MII is not functional, only internal at the moment.
 */
@@ -62,6 +62,7 @@ TODO: external MII is not functional, only internal at the moment.
 #include <command.h>
 #include <net.h>
 #include <asm/io.h>
+#include <dm9000.h>
 
 #include "dm9000x.h"
 
@@ -113,7 +114,6 @@ void eth_halt(void);
 static int dm9000_probe(void);
 static u16 phy_read(int);
 static void phy_write(int, u16);
-static void read_srom_word(int, u8 *);
 static u8 DM9000_ior(int);
 static void DM9000_iow(int reg, u8 value);
 
@@ -347,9 +347,9 @@ eth_init(bd_t * bd)
 
 	/* Set Node address */
 	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
-#if !defined(CONFIG_AT91SAM9261EK)
+#if !defined(CONFIG_DM9000_NO_SROM)
 		for (i = 0; i < 3; i++)
-			read_srom_word(i, enetaddr + 2 * i);
+			dm9000_read_srom_word(i, enetaddr + 2 * i);
 		eth_setenv_enetaddr("ethaddr", enetaddr);
 #endif
 	}
@@ -541,7 +541,8 @@ eth_rx(void)
 /*
   Read a word data from SROM
 */
-static void read_srom_word(int offset, u8 *to)
+#if !defined(CONFIG_DM9000_NO_SROM)
+void dm9000_read_srom_word(int offset, u8 *to)
 {
 	DM9000_iow(DM9000_EPAR, offset);
 	DM9000_iow(DM9000_EPCR, 0x4);
@@ -551,8 +552,7 @@ static void read_srom_word(int offset, u8 *to)
 	to[1] = DM9000_ior(DM9000_EPDRH);
 }
 
-void
-write_srom_word(int offset, u16 val)
+void dm9000_write_srom_word(int offset, u16 val)
 {
 	DM9000_iow(DM9000_EPAR, offset);
 	DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
@@ -561,7 +561,7 @@ write_srom_word(int offset, u16 val)
 	udelay(8000);
 	DM9000_iow(DM9000_EPCR, 0);
 }
-
+#endif
 
 /*
    Read a byte from I/O port

drivers/net/rtl8169.c

@@ -110,6 +110,9 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 #define ETH_ALEN	MAC_ADDR_LEN
 #define ETH_ZLEN	60
 
+#define bus_to_phys(a)	pci_mem_to_phys((pci_dev_t)dev->priv, (pci_addr_t)a)
+#define phys_to_bus(a)	pci_phys_to_mem((pci_dev_t)dev->priv, (phys_addr_t)a)
+
 enum RTL8169_registers {
 	MAC0 = 0,		/* Ethernet hardware address. */
 	MAR0 = 8,		/* Multicast filter. */
@@ -438,7 +441,7 @@ static int rtl_recv(struct eth_device *dev)
 				tpc->RxDescArray[cur_rx].status =
 					cpu_to_le32(OWNbit + RX_BUF_SIZE);
 			tpc->RxDescArray[cur_rx].buf_addr =
-				cpu_to_le32((unsigned long)tpc->RxBufferRing[cur_rx]);
+				cpu_to_le32(bus_to_phys(tpc->RxBufferRing[cur_rx]));
 			flush_cache((unsigned long)tpc->RxBufferRing[cur_rx],
 					RX_BUF_SIZE);
 		} else {
@@ -488,7 +491,7 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
 		ptxb[len++] = '\0';
 
 	tpc->TxDescArray[entry].buf_Haddr = 0;
-	tpc->TxDescArray[entry].buf_addr = cpu_to_le32((unsigned long)ptxb);
+	tpc->TxDescArray[entry].buf_addr = cpu_to_le32(bus_to_phys(ptxb));
 	if (entry != (NUM_TX_DESC - 1)) {
 		tpc->TxDescArray[entry].status =
 			cpu_to_le32((OWNbit | FSbit | LSbit) |
@@ -593,9 +596,9 @@ static void rtl8169_hw_start(struct eth_device *dev)
 
 	tpc->cur_rx = 0;
 
-	RTL_W32(TxDescStartAddrLow, (unsigned long)tpc->TxDescArray);
+	RTL_W32(TxDescStartAddrLow, bus_to_phys(tpc->TxDescArray));
 	RTL_W32(TxDescStartAddrHigh, (unsigned long)0);
-	RTL_W32(RxDescStartAddrLow, (unsigned long)tpc->RxDescArray);
+	RTL_W32(RxDescStartAddrLow, bus_to_phys(tpc->RxDescArray));
 	RTL_W32(RxDescStartAddrHigh, (unsigned long)0);
 
 	/* RTL-8169sc/8110sc or later version */
@@ -646,7 +649,7 @@ static void rtl8169_init_ring(struct eth_device *dev)
 
 		tpc->RxBufferRing[i] = &rxb[i * RX_BUF_SIZE];
 		tpc->RxDescArray[i].buf_addr =
-			cpu_to_le32((unsigned long)tpc->RxBufferRing[i]);
+			cpu_to_le32(bus_to_phys(tpc->RxBufferRing[i]));
 		flush_cache((unsigned long)tpc->RxBufferRing[i], RX_BUF_SIZE);
 	}
 

drivers/net/smc911x.c

@@ -41,8 +41,13 @@ static int smx911x_handle_mac_address(bd_t *bd)
 	unsigned long addrh, addrl;
 	uchar m[6];
 
-	/* if the environment has a valid mac address then use it */
-	if (!eth_getenv_enetaddr("ethaddr", m)) {
+	if (eth_getenv_enetaddr("ethaddr", m)) {
+		/* if the environment has a valid mac address then use it */
+		addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
+		addrh = m[4] | (m[5] << 8);
+		smc911x_set_mac_csr(ADDRL, addrl);
+		smc911x_set_mac_csr(ADDRH, addrh);
+	} else {
 		/* if not, try to get one from the eeprom */
 		addrh = smc911x_get_mac_csr(ADDRH);
 		addrl = smc911x_get_mac_csr(ADDRL);

drivers/spi/bfin_spi.c

@@ -156,7 +156,7 @@ static void spi_portmux(struct spi_slave *slave)
 			case 1: SET_MUX(f, 2, 1); f_fer |= PF7;  break;
 			case 2: /* see G above */ g_fer |= PG15; break;
 			case 3: SET_MUX(h, 1, 3); f_fer |= PH4;  break;
-			case 4: /* no muxing */                  break;
+			case 4: /* no muxing */   h_fer |= PH8;  break;
 			case 5: SET_MUX(g, 1, 3); h_fer |= PG3;  break;
 			case 6: /* no muxing */                  break;
 			case 7: /* no muxing */                  break;

drivers/usb/host/ohci-at91.c

@@ -34,7 +34,8 @@ int usb_cpu_init(void)
 {
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
+    defined(CONFIG_AT91SAM9261)
 	/* Enable PLLB */
 	at91_sys_write(AT91_CKGR_PLLBR, get_pllb_init());
 	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)

fs/ubifs/ubifs.c

@@ -554,10 +554,8 @@ static int do_readpage(struct ubifs_info *c, struct inode *inode, struct page *p
 	}
 
 	dn = kmalloc(UBIFS_MAX_DATA_NODE_SZ, GFP_NOFS);
-	if (!dn) {
-		err = -ENOMEM;
-		goto error;
-	}
+	if (!dn)
+		return -ENOMEM;
 
 	i = 0;
 	while (1) {

include/asm-blackfin/blackfin-config-pre.h

@@ -55,7 +55,7 @@ static inline const char *get_bfin_boot_mode(int bfin_boot)
 #endif
 
 /* Most bootroms allow for EVT1 redirection */
-#if (defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) \
+#if ((defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__)) \
      && __SILICON_REVISION__ < 3) || defined(__ADSPBF561__)
 # undef CONFIG_BFIN_BOOTROM_USES_EVT1
 #else

include/asm-mips/bitops.h

@@ -60,7 +60,7 @@
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void
+static __inline__ void
 set_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -84,7 +84,7 @@ set_bit(int nr, volatile void *addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __set_bit(int nr, volatile void * addr)
+static __inline__ void __set_bit(int nr, volatile void * addr)
 {
 	unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
 
@@ -101,7 +101,7 @@ extern __inline__ void __set_bit(int nr, volatile void * addr)
  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  * in order to ensure changes are visible on other processors.
  */
-extern __inline__ void
+static __inline__ void
 clear_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -125,7 +125,7 @@ clear_bit(int nr, volatile void *addr)
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void
+static __inline__ void
 change_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -149,7 +149,7 @@ change_bit(int nr, volatile void *addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __change_bit(int nr, volatile void * addr)
+static __inline__ void __change_bit(int nr, volatile void * addr)
 {
 	unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
 
@@ -164,7 +164,7 @@ extern __inline__ void __change_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int
+static __inline__ int
 test_and_set_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -194,7 +194,7 @@ test_and_set_bit(int nr, volatile void *addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
 {
 	int mask, retval;
 	volatile int *a = addr;
@@ -215,7 +215,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int
+static __inline__ int
 test_and_clear_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -246,7 +246,7 @@ test_and_clear_bit(int nr, volatile void *addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -267,7 +267,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int
+static __inline__ int
 test_and_change_bit(int nr, volatile void *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -297,7 +297,7 @@ test_and_change_bit(int nr, volatile void *addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -322,7 +322,7 @@ extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void set_bit(int nr, volatile void * addr)
+static __inline__ void set_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -344,7 +344,7 @@ extern __inline__ void set_bit(int nr, volatile void * addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __set_bit(int nr, volatile void * addr)
+static __inline__ void __set_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -364,7 +364,7 @@ extern __inline__ void __set_bit(int nr, volatile void * addr)
  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  * in order to ensure changes are visible on other processors.
  */
-extern __inline__ void clear_bit(int nr, volatile void * addr)
+static __inline__ void clear_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -386,7 +386,7 @@ extern __inline__ void clear_bit(int nr, volatile void * addr)
  * Note that @nr may be almost arbitrarily large; this function is not
  * restricted to acting on a single-word quantity.
  */
-extern __inline__ void change_bit(int nr, volatile void * addr)
+static __inline__ void change_bit(int nr, volatile void * addr)
 {
 	int	mask;
 	volatile int	*a = addr;
@@ -408,7 +408,7 @@ extern __inline__ void change_bit(int nr, volatile void * addr)
  * If it's called on the same region of memory simultaneously, the effect
  * may be that only one operation succeeds.
  */
-extern __inline__ void __change_bit(int nr, volatile void * addr)
+static __inline__ void __change_bit(int nr, volatile void * addr)
 {
 	unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
 
@@ -423,7 +423,7 @@ extern __inline__ void __change_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int test_and_set_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -448,7 +448,7 @@ extern __inline__ int test_and_set_bit(int nr, volatile void * addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -469,7 +469,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -494,7 +494,7 @@ extern __inline__ int test_and_clear_bit(int nr, volatile void * addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -515,7 +515,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
  * This operation is atomic and cannot be reordered.
  * It also implies a memory barrier.
  */
-extern __inline__ int test_and_change_bit(int nr, volatile void * addr)
+static __inline__ int test_and_change_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -540,7 +540,7 @@ extern __inline__ int test_and_change_bit(int nr, volatile void * addr)
  * If two examples of this operation race, one can appear to succeed
  * but actually fail.  You must protect multiple accesses with a lock.
  */
-extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
 {
 	int	mask, retval;
 	volatile int	*a = addr;
@@ -565,7 +565,7 @@ extern __inline__ int __test_and_change_bit(int nr, volatile void * addr)
  * @nr: bit number to test
  * @addr: Address to start counting from
  */
-extern __inline__ int test_bit(int nr, volatile void *addr)
+static __inline__ int test_bit(int nr, volatile void *addr)
 {
 	return ((1UL << (nr & 31)) & (((const unsigned int *) addr)[nr >> 5])) != 0;
 }
@@ -582,7 +582,7 @@ extern __inline__ int test_bit(int nr, volatile void *addr)
  * Returns the bit-number of the first zero bit, not the number of the byte
  * containing a bit.
  */
-extern __inline__ int find_first_zero_bit (void *addr, unsigned size)
+static __inline__ int find_first_zero_bit (void *addr, unsigned size)
 {
 	unsigned long dummy;
 	int res;
@@ -633,7 +633,7 @@ extern __inline__ int find_first_zero_bit (void *addr, unsigned size)
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
-extern __inline__ int find_next_zero_bit (void * addr, int size, int offset)
+static __inline__ int find_next_zero_bit (void * addr, int size, int offset)
 {
 	unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
 	int set = 0, bit = offset & 31, res;
@@ -679,7 +679,7 @@ extern __inline__ int find_next_zero_bit (void * addr, int size, int offset)
  *
  * Undefined if no zero exists, so code should check against ~0UL first.
  */
-extern __inline__ unsigned long ffz(unsigned long word)
+static __inline__ unsigned long ffz(unsigned long word)
 {
 	unsigned int	__res;
 	unsigned int	mask = 1;
@@ -736,7 +736,7 @@ extern __inline__ unsigned long ffz(unsigned long word)
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
-extern __inline__ int find_next_zero_bit(void *addr, int size, int offset)
+static __inline__ int find_next_zero_bit(void *addr, int size, int offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;
@@ -785,7 +785,7 @@ found_middle:
  * Returns the bit-number of the first zero bit, not the number of the byte
  * containing a bit.
  */
-extern int find_first_zero_bit (void *addr, unsigned size);
+static int find_first_zero_bit (void *addr, unsigned size);
 #endif
 
 #define find_first_zero_bit(addr, size) \
@@ -796,7 +796,7 @@ extern int find_first_zero_bit (void *addr, unsigned size);
 /* Now for the ext2 filesystem bit operations and helper routines. */
 
 #ifdef __MIPSEB__
-extern __inline__ int ext2_set_bit(int nr, void * addr)
+static __inline__ int ext2_set_bit(int nr, void * addr)
 {
 	int		mask, retval, flags;
 	unsigned char	*ADDR = (unsigned char *) addr;
@@ -810,7 +810,7 @@ extern __inline__ int ext2_set_bit(int nr, void * addr)
 	return retval;
 }
 
-extern __inline__ int ext2_clear_bit(int nr, void * addr)
+static __inline__ int ext2_clear_bit(int nr, void * addr)
 {
 	int		mask, retval, flags;
 	unsigned char	*ADDR = (unsigned char *) addr;
@@ -824,7 +824,7 @@ extern __inline__ int ext2_clear_bit(int nr, void * addr)
 	return retval;
 }
 
-extern __inline__ int ext2_test_bit(int nr, const void * addr)
+static __inline__ int ext2_test_bit(int nr, const void * addr)
 {
 	int			mask;
 	const unsigned char	*ADDR = (const unsigned char *) addr;
@@ -837,7 +837,7 @@ extern __inline__ int ext2_test_bit(int nr, const void * addr)
 #define ext2_find_first_zero_bit(addr, size) \
 	ext2_find_next_zero_bit((addr), (size), 0)
 
-extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
+static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;

include/asm-ppc/immap_qe.h

@@ -582,9 +582,12 @@ typedef struct qe_immap {
 	u8 res14[0x300];
 	u8 res15[0x3A00];
 	u8 res16[0x8000];	/* 0x108000 -  0x110000 */
-#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569)
+#if defined(CONFIG_MPC8568)
 	u8 muram[0x10000];	/* 0x1_0000 -  0x2_0000 Multi-user RAM */
 	u8 res17[0x20000];	/* 0x2_0000 -  0x4_0000 */
+#elif defined(CONFIG_MPC8569)
+	u8 muram[0x20000];	/* 0x1_0000 -  0x3_0000 Multi-user RAM */
+	u8 res17[0x10000];	/* 0x3_0000 -  0x4_0000 */
 #else
 	u8 muram[0xC000];	/* 0x110000 -  0x11C000 Multi-user RAM */
 	u8 res17[0x24000];	/* 0x11C000 -  0x140000 */
@@ -594,8 +597,10 @@ typedef struct qe_immap {
 
 extern qe_map_t *qe_immr;
 
-#if defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569)
+#if defined(CONFIG_MPC8568)
 #define QE_MURAM_SIZE		0x10000UL
+#elif defined(CONFIG_MPC8569)
+#define QE_MURAM_SIZE		0x20000UL
 #elif defined(CONFIG_MPC8360)
 #define QE_MURAM_SIZE		0xc000UL
 #elif defined(CONFIG_MPC832X)

include/configs/MPC8349EMDS.h

@@ -598,7 +598,7 @@
 #define CONFIG_SYS_SCCR_TSEC2CM	1	/* TSEC2 & I2C0 clock mode (0-3) */
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT	0x000000000

include/configs/MPC8569MDS.h

@@ -55,8 +55,8 @@
 extern unsigned long get_clock_freq(void);
 #endif
 /* Replace a call to get_clock_freq (after it is implemented)*/
-#define CONFIG_SYS_CLK_FREQ	66000000
-#define CONFIG_DDR_CLK_FREQ	66000000
+#define CONFIG_SYS_CLK_FREQ	66666666
+#define CONFIG_DDR_CLK_FREQ	CONFIG_SYS_CLK_FREQ
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -156,10 +156,18 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_BR0_PRELIM		0xfe000801
 #define	CONFIG_SYS_OR0_PRELIM		0xfe000ff7
 
-/*Chip slelect 1 - BCSR*/
+/*Chip select 1 - BCSR*/
 #define CONFIG_SYS_BR1_PRELIM		0xf8000801
 #define	CONFIG_SYS_OR1_PRELIM		0xffffe9f7
 
+/*Chip select 4 - PIB*/
+#define CONFIG_SYS_BR4_PRELIM		0xf8008801
+#define CONFIG_SYS_OR4_PRELIM		0xffffe9f7
+
+/*Chip select 5 - PIB*/
+#define CONFIG_SYS_BR5_PRELIM		0xf8010801
+#define CONFIG_SYS_OR5_PRELIM		0xffffe9f7
+
 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* sectors per device */
 #undef	CONFIG_SYS_FLASH_CHECKSUM
@@ -194,7 +202,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)	/* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN	(128 * 1024)	/* Reserved for malloc */
+#define CONFIG_SYS_MALLOC_LEN	(512 * 1024)	/* Reserved for malloc */
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX		1
@@ -327,9 +335,9 @@ extern unsigned long get_clock_freq(void);
  * Environment
  */
 #define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + 0x40000)
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SECT_SIZE	0x20000	/* 256K(one sector) for env */
-#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
 
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change */

include/configs/TQM834x.h

@@ -140,26 +140,6 @@ extern int tqm834x_num_flash_banks;
 #define CONFIG_SYS_LBLAWBAR3_PRELIM	0x00000000
 #define CONFIG_SYS_LBLAWAR3_PRELIM	0x00000000
 
-#define CONFIG_SYS_BR4_PRELIM		0x00000000
-#define CONFIG_SYS_OR4_PRELIM		0x00000000
-#define CONFIG_SYS_LBLAWBAR4_PRELIM	0x00000000
-#define CONFIG_SYS_LBLAWAR4_PRELIM	0x00000000
-
-#define CONFIG_SYS_BR5_PRELIM		0x00000000
-#define CONFIG_SYS_OR5_PRELIM		0x00000000
-#define CONFIG_SYS_LBLAWBAR5_PRELIM	0x00000000
-#define CONFIG_SYS_LBLAWAR5_PRELIM	0x00000000
-
-#define CONFIG_SYS_BR6_PRELIM		0x00000000
-#define CONFIG_SYS_OR6_PRELIM		0x00000000
-#define CONFIG_SYS_LBLAWBAR6_PRELIM	0x00000000
-#define CONFIG_SYS_LBLAWAR6_PRELIM	0x00000000
-
-#define CONFIG_SYS_BR7_PRELIM		0x00000000
-#define CONFIG_SYS_OR7_PRELIM		0x00000000
-#define CONFIG_SYS_LBLAWBAR7_PRELIM	0x00000000
-#define CONFIG_SYS_LBLAWAR7_PRELIM	0x00000000
-
 /*
  * Monitor config
  */
@@ -413,7 +393,7 @@ extern int tqm834x_num_flash_banks;
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH	SICRH_TSOBI1
+#define CONFIG_SYS_SICRH	0
 #define CONFIG_SYS_SICRL	SICRL_LDP_A
 
 /* i-cache and d-cache disabled */

include/configs/TQM85xx.h

@@ -165,15 +165,6 @@
 #define CONFIG_DDR_DEFAULT_CL	30		/* CAS latency 3	*/
 #endif /* CONFIG_TQM8541 || CONFIG_TQM8555 || CONFIG_TQM8548 */
 
-/*
- * Old TQM85xx boards have 'M' type Spansion Flashes from the S29GLxxxM
- * series while new boards have 'N' type Flashes from the S29GLxxxN
- * series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB.
- */
-#ifdef CONFIG_TQM8548
-#define CONFIG_TQM_FLASH_N_TYPE
-#endif /* CONFIG_TQM8548 */
-
 /*
  * Flash on the Local Bus
  */
@@ -547,11 +538,7 @@
  */
 #define CONFIG_ENV_IS_IN_FLASH	1
 
-#ifdef CONFIG_TQM_FLASH_N_TYPE
 #define CONFIG_ENV_SECT_SIZE	0x40000 /* 256K (one sector) for env	*/
-#else /* !CONFIG_TQM_FLASH_N_TYPE */
-#define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) for env	*/
-#endif /* CONFIG_TQM_FLASH_N_TYPE */
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
@@ -680,7 +667,7 @@
 #define	CONFIG_EXTRA_ENV_SETTINGS					\
 	CONFIG_ENV_BOOTFILE						\
 	CONFIG_ENV_FDT_FILE						\
-	CONFIG_ENV_CONSDEV							\
+	CONFIG_ENV_CONSDEV						\
 	"netdev=eth0\0"							\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 		"nfsroot=$serverip:$rootpath\0"				\
@@ -704,12 +691,11 @@
 	"fdt_addr=ffec0000\0"						\
 	"kernel_addr=ffd00000\0"					\
 	"ramdisk_addr=ff800000\0"					\
-	CONFIG_ENV_UBOOT							\
+	CONFIG_ENV_UBOOT						\
 	"load=tftp 100000 $uboot\0"					\
 	"update=protect off $uboot_addr +$filesize;"			\
 		"erase $uboot_addr +$filesize;"				\
-		"cp.b 100000 $uboot_addr $filesize;"			\
-		"setenv filesize;saveenv\0"				\
+		"cp.b 100000 $uboot_addr $filesize"			\
 	"upd=run load update\0"						\
 	""
 #define CONFIG_BOOTCOMMAND	"run flash_self"

include/configs/at91sam9261ek.h

@@ -137,6 +137,7 @@
 #define DM9000_IO			CONFIG_DM9000_BASE
 #define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
 #define CONFIG_DM9000_USE_16BIT		1
+#define CONFIG_DM9000_NO_SROM		1
 #define CONFIG_NET_RETRY_COUNT		20
 #define CONFIG_RESET_PHY_R		1
 

include/configs/bf518f-ezbrd.h

@@ -132,6 +132,7 @@
 /*
  * Misc Settings
  */
+#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 #define CONFIG_RTC_BFIN
 #define CONFIG_UART_CONSOLE	0

include/configs/rmu.h

@@ -190,7 +190,8 @@
 
 #define	CONFIG_ENV_IS_IN_FLASH	1
 #define CONFIG_ENV_ADDR		((TEXT_BASE) + 0x40000)
-#define	CONFIG_ENV_SIZE		0x40000	/* Total Size of Environment Sector	*/
+#define	CONFIG_ENV_SECT_SIZE	0x40000		/* Total Size of Environment Sector	*/
+#define	CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE	/* Used size for environment	*/
 
 /* Address and size of Redundant Environment Sector	*/
 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR+CONFIG_ENV_SIZE)

include/configs/sbc8349.h

@@ -519,7 +519,7 @@
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT	0x000000000

include/dm9000.h

@@ -0,0 +1,20 @@
+/*
+ * NOTE:        DAVICOM DM9000 ethernet driver interface
+ *
+ * Authors:     Remy Bohmer <linux@bohmer.net>
+ *
+ *              This program is free software; you can redistribute it and/or
+ *              modify it under the terms of the GNU General Public License
+ *              as published by the Free Software Foundation; either version
+ *              2 of the License, or (at your option) any later version.
+ */
+#ifndef __DM9000_H__
+#define __DM9000_H__
+
+/******************  function prototypes **********************/
+#if !defined(CONFIG_DM9000_NO_SROM)
+void dm9000_write_srom_word(int offset, u16 val);
+void dm9000_read_srom_word(int offset, u8 *to);
+#endif
+
+#endif /* __DM9000_H__ */

include/mmc.h

@@ -91,7 +91,7 @@
 #define MMC_HS_TIMING		0x00000100
 #define MMC_HS_52MHZ		0x2
 
-#define OCR_BUSY	0x80
+#define OCR_BUSY	0x80000000
 #define OCR_HCS		0x40000000
 
 #define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
@@ -223,7 +223,7 @@ struct mmc_cmd {
 	ushort cmdidx;
 	uint resp_type;
 	uint cmdarg;
-	char response[18];
+	uint response[4];
 	uint flags;
 };
 
@@ -253,7 +253,7 @@ struct mmc {
 	uint ocr;
 	uint scr[2];
 	uint csd[4];
-	char cid[16];
+	uint cid[4];
 	ushort rca;
 	uint tran_speed;
 	uint read_bl_len;

include/ppc4xx.h

@@ -46,6 +46,13 @@
 #define CONFIG_SDRAM_PPC4xx_IBM_DDR2	/* IBM DDR(2) controller */
 #endif
 
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) ||	\
+    defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||	\
+    defined(CONFIG_405EZ) || defined(CONFIG_405EX) ||	\
+    defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define CONFIG_NAND_NDFC
+#endif
+
 /* PLB4 CrossBar Arbiter Core supported across PPC4xx families */
 #if defined(CONFIG_405EX) || \
     defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \

lib_mips/board.c

@@ -323,9 +323,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
 #ifndef CONFIG_ENV_IS_NOWHERE
 	extern char * env_name_spec;
 #endif
-	char *s, *e;
+	char *s;
 	bd_t *bd;
-	int i;
 
 	gd = id;
 	gd->flags |= GD_FLG_RELOC;	/* tell others: relocation done */

onenand_ipl/board/apollon/Makefile

@@ -6,7 +6,7 @@ LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds
 LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
 AFLAGS	+= -DCONFIG_ONENAND_IPL
 CFLAGS	+= -DCONFIG_ONENAND_IPL
-OBJCLFAGS += --gap-fill=0x00
+OBJCFLAGS += --gap-fill=0x00
 
 SOBJS	:= low_levelinit.o
 SOBJS	+= start.o