MLK-12497-2 mx7d: Add reference DDR script for mx7d TO1.0

On i.MX7D TO1.1, design team adds a mux cell at the CKE path to fix the suspend
mode reset issue, but seems it add extra delay on CKE path, so CKE-CK timing violated.
When DDR enters self-refresh or retention for long time(> 15seconds per testing on some boards),
DDR data corruption occured, not able to decrease CKE delay, so we have to add extra
delay on all other signals to balance it.
DDR script needs to be fine-tuned according to this hardware change.

For DDR3, since the timing margin is not good, we have to decrease the DDR frequency from
533Mhz to 400Mhz.

We uses TO1.1 script at default, and retains the TO1.0 script for reference.

Compass link:
http://compass.freescale.net/livelink/livelink?func=ll&objid=235010235&objAction=browse&sort=name

Signed-off-by: Ye Li <ye.li@nxp.com>
This commit is contained in:
Ye Li
2016-03-08 11:23:08 +08:00
parent 349137a296
commit d7e218133f
12 changed files with 745 additions and 0 deletions

View File

@ -0,0 +1,107 @@
/*
* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* sd/onenand, nor
*/
#ifdef CONFIG_SYS_BOOT_EIMNOR
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7d_12x12_ddr3_arm2/plugin.bin 0x00910000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x30340004 0x4F400005
DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x03040001
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
DATA 4 0x307a0064 0x0040005e
DATA 4 0x307a0490 0x00000001
DATA 4 0x307a00d0 0x00020001
DATA 4 0x307a00d4 0x00010000
DATA 4 0x307a00dc 0x09300004
DATA 4 0x307a00e0 0x04080000
DATA 4 0x307a00e4 0x00090004
DATA 4 0x307a00f4 0x0000033f
DATA 4 0x307a0100 0x0908120a
DATA 4 0x307a0104 0x0002020e
DATA 4 0x307a0108 0x03040407
DATA 4 0x307a010c 0x00002006
DATA 4 0x307a0110 0x04020204
DATA 4 0x307a0114 0x03030202
DATA 4 0x307a0120 0x03030803
DATA 4 0x307a0180 0x00800020
DATA 4 0x307a0190 0x02098204
DATA 4 0x307a0194 0x00030303
DATA 4 0x307a0200 0x00000016
DATA 4 0x307a0204 0x00171717
DATA 4 0x307a0214 0x04040404
DATA 4 0x307a0218 0x00040404
DATA 4 0x307a0240 0x06000601
DATA 4 0x307a0244 0x00001323
DATA 4 0x30391000 0x00000000
DATA 4 0x30790000 0x17420f40
DATA 4 0x30790004 0x10210100
DATA 4 0x30790010 0x00060807
DATA 4 0x3079009c 0x00000d6e
DATA 4 0x30790020 0x08080808
DATA 4 0x30790030 0x08080808
DATA 4 0x30790050 0x01000010
DATA 4 0x30790050 0x00000010
DATA 4 0x307900c0 0x0e407304
DATA 4 0x307900c0 0x0e447304
DATA 4 0x307900c0 0x0e447306
CHECK_BITS_SET 4 0x307900c4 0x1
DATA 4 0x307900c0 0x0e447304
DATA 4 0x307900c0 0x0e407304
DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x00000178
DATA 4 0x30384130 0x00000002
DATA 4 0x30790018 0x0000000f
CHECK_BITS_SET 4 0x307a0004 0x1
#endif

View File

@ -0,0 +1,121 @@
/*
* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7d_12x12_lpddr3_arm2/plugin.bin 0x00910000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x30340004 0x4F400005
/* Clear then set bit30 to ensure exit from DDR retention */
DATA 4 0x30360388 0x40000000
DATA 4 0x30360384 0x40000000
DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x03040008
DATA 4 0x307a0064 0x00200038
DATA 4 0x307a0490 0x00000001
DATA 4 0x307a00d0 0x00350001
DATA 4 0x307a00dc 0x00c3000a
DATA 4 0x307a00e0 0x00010000
DATA 4 0x307a00e4 0x00110006
DATA 4 0x307a00f4 0x0000033f
DATA 4 0x307a0100 0x0a0e110b
DATA 4 0x307a0104 0x00020211
DATA 4 0x307a0108 0x03060708
DATA 4 0x307a010c 0x00a0500c
DATA 4 0x307a0110 0x05020307
DATA 4 0x307a0114 0x02020404
DATA 4 0x307a0118 0x02020003
DATA 4 0x307a011c 0x00000202
DATA 4 0x307a0120 0x00000202
DATA 4 0x307a0180 0x00600018
DATA 4 0x307a0184 0x00e00100
DATA 4 0x307a0190 0x02098205
DATA 4 0x307a0194 0x00060303
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
DATA 4 0x307a0200 0x00000016
DATA 4 0x307a0204 0x00171717
DATA 4 0x307a0210 0x00000f00
DATA 4 0x307a0214 0x05050505
DATA 4 0x307a0218 0x0f0f0505
DATA 4 0x307a0240 0x06000601
DATA 4 0x307a0244 0x00000000
DATA 4 0x30391000 0x00000000
DATA 4 0x30790000 0x17421e40
DATA 4 0x30790004 0x10210100
DATA 4 0x30790008 0x00010000
DATA 4 0x30790010 0x0007080c
DATA 4 0x307900b0 0x1010007e
DATA 4 0x3079001C 0x01010000
DATA 4 0x3079009c 0x0db60d6e
DATA 4 0x30790030 0x06060606
DATA 4 0x30790020 0x0a0a0a0a
DATA 4 0x30790050 0x01000008
DATA 4 0x30790050 0x00000008
DATA 4 0x30790018 0x0000000f
DATA 4 0x307900c0 0x1e487304
DATA 4 0x307900c0 0x1e487304
DATA 4 0x307900c0 0x1e487306
DATA 4 0x307900c0 0x1e4c7304
CHECK_BITS_SET 4 0x307900c4 0x1
DATA 4 0x307900c0 0x1e487304
DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x00000178
DATA 4 0x30384130 0x00000002
CHECK_BITS_SET 4 0x307a0004 0x1
#endif

View File

@ -0,0 +1,110 @@
/*
* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7d_19x19_ddr3_arm2/plugin.bin 0x00910000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x30340004 0x4F400005
DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x03040001
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
DATA 4 0x307a0064 0x0040005e
DATA 4 0x307a0490 0x00000001
DATA 4 0x307a00d0 0x00020001
DATA 4 0x307a00d4 0x00010000
DATA 4 0x307a00dc 0x09300004
DATA 4 0x307a00e0 0x04080000
DATA 4 0x307a00e4 0x00090004
DATA 4 0x307a00f4 0x0000033f
DATA 4 0x307a0100 0x0908120a
DATA 4 0x307a0104 0x0002020e
DATA 4 0x307a0108 0x03040407
DATA 4 0x307a010c 0x00002006
DATA 4 0x307a0110 0x04020204
DATA 4 0x307a0114 0x03030202
DATA 4 0x307a0120 0x03030803
DATA 4 0x307a0180 0x00800020
DATA 4 0x307a0190 0x02098204
DATA 4 0x307a0194 0x00030303
DATA 4 0x307a0200 0x00000016
DATA 4 0x307a0204 0x00171717
DATA 4 0x307a0214 0x04040404
DATA 4 0x307a0218 0x00040404
DATA 4 0x307a0240 0x06000601
DATA 4 0x307a0244 0x00001323
DATA 4 0x30391000 0x00000000
DATA 4 0x30790000 0x17420f40
DATA 4 0x30790004 0x10210100
DATA 4 0x30790010 0x00060807
DATA 4 0x3079009c 0x00000d6e
DATA 4 0x30790020 0x08080808
DATA 4 0x30790030 0x08080808
DATA 4 0x30790050 0x01000010
DATA 4 0x30790050 0x00000010
DATA 4 0x307900c0 0x0e407304
DATA 4 0x307900c0 0x0e447304
DATA 4 0x307900c0 0x0e447306
CHECK_BITS_SET 4 0x307900c4 0x1
DATA 4 0x307900c0 0x0e447304
DATA 4 0x307900c0 0x0e407304
DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x00000178
DATA 4 0x30384130 0x00000002
DATA 4 0x30790018 0x0000000f
CHECK_BITS_SET 4 0x307a0004 0x1
#endif

View File

@ -0,0 +1,118 @@
/*
* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7d_19x19_lpddr3_arm2/plugin.bin 0x00910000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x30340004 0x4F400005
DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x03040008
DATA 4 0x307a0064 0x00200038
DATA 4 0x307a0490 0x00000001
DATA 4 0x307a00d0 0x00350001
DATA 4 0x307a00dc 0x00c3000a
DATA 4 0x307a00e0 0x00010000
DATA 4 0x307a00e4 0x00110006
DATA 4 0x307a00f4 0x0000033f
DATA 4 0x307a0100 0x0a0e110b
DATA 4 0x307a0104 0x00020211
DATA 4 0x307a0108 0x03060708
DATA 4 0x307a010c 0x00a0500c
DATA 4 0x307a0110 0x05020307
DATA 4 0x307a0114 0x02020404
DATA 4 0x307a0118 0x02020003
DATA 4 0x307a011c 0x00000202
DATA 4 0x307a0120 0x00000202
DATA 4 0x307a0180 0x00600018
DATA 4 0x307a0184 0x00e00100
DATA 4 0x307a0190 0x02098205
DATA 4 0x307a0194 0x00060303
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
DATA 4 0x307a0200 0x00000016
DATA 4 0x307a0204 0x00171717
DATA 4 0x307a0210 0x00000f00
DATA 4 0x307a0214 0x05050505
DATA 4 0x307a0218 0x0f0f0505
DATA 4 0x307a0240 0x06000601
DATA 4 0x307a0244 0x00000000
DATA 4 0x30391000 0x00000000
DATA 4 0x30790000 0x17421e40
DATA 4 0x30790004 0x10210100
DATA 4 0x30790008 0x00010000
DATA 4 0x30790010 0x0007080c
DATA 4 0x307900b0 0x1010007e
DATA 4 0x3079001C 0x01010000
DATA 4 0x3079009c 0x0db60d6e
DATA 4 0x30790030 0x06060606
DATA 4 0x30790020 0x0a0a0a0a
DATA 4 0x30790050 0x01000008
DATA 4 0x30790050 0x00000008
DATA 4 0x30790018 0x0000000f
DATA 4 0x307900c0 0x1e487304
DATA 4 0x307900c0 0x1e487304
DATA 4 0x307900c0 0x1e487306
DATA 4 0x307900c0 0x1e4c7304
CHECK_BITS_SET 4 0x307900c4 0x1
DATA 4 0x307900c0 0x1e487304
DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x00000178
DATA 4 0x30384130 0x00000002
CHECK_BITS_SET 4 0x307a0004 0x1
#endif

View File

@ -0,0 +1,119 @@
/*
* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7d_19x19_lpddr3_arm2/plugin.bin 0x00910000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x30340004 0x4F400005
DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x03020004
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
DATA 4 0x307a0064 0x00200023
DATA 4 0x307a0490 0x00000001
DATA 4 0x307a00d0 0x00350001
DATA 4 0x307a00d8 0x00001105
DATA 4 0x307a00dc 0x00c20006
DATA 4 0x307a00e0 0x00020000
DATA 4 0x307a00e4 0x00110006
DATA 4 0x307a00f4 0x0000033f
DATA 4 0x307a0100 0x080e110b
DATA 4 0x307a0104 0x00020211
DATA 4 0x307a0108 0x02040706
DATA 4 0x307a010c 0x00504000
DATA 4 0x307a0110 0x05010307
DATA 4 0x307a0114 0x02020404
DATA 4 0x307a0118 0x02020003
DATA 4 0x307a011c 0x00000202
DATA 4 0x307a0120 0x00000202
DATA 4 0x307a0180 0x00600018
DATA 4 0x307a0184 0x00e00100
DATA 4 0x307a0190 0x02098203
DATA 4 0x307a0194 0x00060303
DATA 4 0x307a0200 0x00000015
DATA 4 0x307a0204 0x00161616
DATA 4 0x307a0210 0x00000f0f
DATA 4 0x307a0214 0x04040404
DATA 4 0x307a0218 0x0f0f0404
DATA 4 0x307a0240 0x06000600
DATA 4 0x307a0244 0x00000000
DATA 4 0x30391000 0x00000000
DATA 4 0x30790000 0x17421640
DATA 4 0x30790004 0x10210100
DATA 4 0x30790008 0x00010000
DATA 4 0x30790010 0x00050408
DATA 4 0x307900b0 0x1010007e
DATA 4 0x3079001C 0x01010000
DATA 4 0x3079009C 0x00000d6e
DATA 4 0x30790018 0x0000000f
DATA 4 0x30790030 0x06060606
DATA 4 0x30790020 0x0a0a0a0a
DATA 4 0x30790050 0x01000008
DATA 4 0x30790050 0x00000008
DATA 4 0x307900c0 0x0e487304
DATA 4 0x307900c0 0x0e4c7304
DATA 4 0x307900c0 0x0e4c7306
CHECK_BITS_SET 4 0x307900c4 0x1
DATA 4 0x307900c0 0x0e4c7304
DATA 4 0x307900c0 0x0e487304
DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x000001f8
DATA 4 0x30384130 0x00000002
CHECK_BITS_SET 4 0x307a0004 0x1
#endif

View File

@ -0,0 +1,116 @@
/*
* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7dsabresd/plugin.bin 0x00910000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x30340004 0x4F400005
/* Clear then set bit30 to ensure exit from DDR retention */
DATA 4 0x30360388 0x40000000
DATA 4 0x30360384 0x40000000
DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x01040001
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
DATA 4 0x307a0064 0x00400046
DATA 4 0x307a0490 0x00000001
DATA 4 0x307a00d0 0x00020083
DATA 4 0x307a00d4 0x00690000
DATA 4 0x307a00dc 0x09300004
DATA 4 0x307a00e0 0x04080000
DATA 4 0x307a00e4 0x00100004
DATA 4 0x307a00f4 0x0000033f
DATA 4 0x307a0100 0x09081109
DATA 4 0x307a0104 0x0007020d
DATA 4 0x307a0108 0x03040407
DATA 4 0x307a010c 0x00002006
DATA 4 0x307a0110 0x04020205
DATA 4 0x307a0114 0x03030202
DATA 4 0x307a0120 0x00000803
DATA 4 0x307a0180 0x00800020
DATA 4 0x307a0184 0x02000100
DATA 4 0x307a0190 0x02098204
DATA 4 0x307a0194 0x00030303
DATA 4 0x307a0200 0x00000016
DATA 4 0x307a0204 0x00171717
DATA 4 0x307a0214 0x04040404
DATA 4 0x307a0218 0x0f040404
DATA 4 0x307a0240 0x06000604
DATA 4 0x307a0244 0x00000001
DATA 4 0x30391000 0x00000000
DATA 4 0x30790000 0x17420f40
DATA 4 0x30790004 0x10210100
DATA 4 0x30790010 0x00060807
DATA 4 0x307900b0 0x1010007e
DATA 4 0x3079009c 0x00000d6e
DATA 4 0x30790020 0x08080808
DATA 4 0x30790030 0x08080808
DATA 4 0x30790050 0x01000010
DATA 4 0x30790050 0x00000010
DATA 4 0x307900c0 0x0e407304
DATA 4 0x307900c0 0x0e447304
DATA 4 0x307900c0 0x0e447306
CHECK_BITS_SET 4 0x307900c4 0x1
DATA 4 0x307900c0 0x0e447304
DATA 4 0x307900c0 0x0e407304
DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x00000178
DATA 4 0x30384130 0x00000002
DATA 4 0x30790018 0x0000000f
CHECK_BITS_SET 4 0x307a0004 0x1
#endif

View File

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_TARGET_MX7D_12X12_DDR3_ARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7d_12x12_ddr3_arm2/imximage_TO_1_0.cfg,DEFAULT_FDT_FILE=\"imx7d-12x12-ddr3-arm2.dtb\""
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y

View File

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_TARGET_MX7D_12X12_LPDDR3_ARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7d_12x12_lpddr3_arm2/imximage_TO_1_0.cfg,DEFAULT_FDT_FILE=\"imx7d-12x12-lpddr3-arm2.dtb\""
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y

View File

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_TARGET_MX7D_19X19_DDR3_ARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7d_19x19_ddr3_arm2/imximage_TO_1_0.cfg,DEFAULT_FDT_FILE=\"imx7d-19x19-ddr3-arm2.dtb\""
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y

View File

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_TARGET_MX7D_19X19_LPDDR2_ARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7d_19x19_lpddr3_arm2/imximage_lpddr2_TO_1_0.cfg,DEFAULT_FDT_FILE=\"imx7d-19x19-lpddr2-arm2.dtb\""
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y

View File

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_TARGET_MX7D_19X19_LPDDR3_ARM2=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7d_19x19_lpddr3_arm2/imximage_TO_1_0.cfg,DEFAULT_FDT_FILE=\"imx7d-19x19-lpddr3-arm2.dtb\""
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y

View File

@ -0,0 +1,9 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_TARGET_MX7DSABRESD=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage_TO_1_0.cfg"
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y