Commit 800eb0964 "POST cleanup." removed file
arch/powerpc/cpu/mpc512x/common.c but failed to remove the reference
to it from arch/powerpc/cpu/mpc512x/Makefile which causes somewhat
obscure build errors:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/arch/powerpc/cpu/mpc512x/.depend', needed by `_depend'. Stop.
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds missing pinmux setup for 4 GPIO signals used on the Beagle xM:
- USB hub reset (gpio_56)
- P8 USB hub reset (gpio_63)
- DVI enable (gpio_129)
- P8 DVI enable (gpio_170)
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Calculate the SDRAM size from DMM configuration registers instead of using
hard-coded values. This gives correct values for all different boards.
It's assumed that DMM sections do not overlap memory areas.
Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch corrects the pinmux settings to enable proper functioning
of the wifi/bluetooth module.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The version numbering scheme was changed in Oct, 2008.
This patch brings the documentation to the actual level.
The description is taken from:
http://www.denx.de/wiki/U-Boot/ReleaseCycle
Signed-off-by: Thomas Weber <weber@corscience.de>
Changed text slightly.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 2ee951ba (UBI: Enable re-initializing of the "ubi part" command)
reset mtd_devs in ubi_exit() but missed ubi_init()'s failure path.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the behaviour of the fdt_fixup_nor_flash_node()
function. Now it doesn't patch the size of the "reg" property with the
chip-select size, but with the size returned from the new function
flash_get_bank_size(). This function will return per weak default the
flash size of the bank (bank = chip-select numer) detected by the flash
driver. If this does not fit your needs, this function may be overridden
by a board specific one.
For this the parameters needed to be changed. So I intentionally squashed
the PPC4xx stuff using this routine into this patch. Otherwise it would
not be git-bisectable anymore.
The board specific function for the AMCC/APM Ebony eval board is now
included in this patch version.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Detlev Zundel <dzu@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Cc: Wolfgang Denk <wd@denx.de>
This patch fixes a problem in the PPC4xx POST UART driver. This driver
incorrectly used the in/out8() io-accessor functions. This could lead to
problems since these functions don't guarantee execution ordering. This
patch now replaces these functions with the correct ones.
Additionally the driver is converted to using the NS16550 struct instead
of macros for the register offsets.
And some common code is factored out for better maintainability.
Signed-off-by: Stefan Roese <sr@denx.de>
Linux uses an offset of 8 to switch from hardware cs to a gpio cs,
so have u-boot use the same value. Also make sure it is public
for boards to access.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CURSOR_ON, CURSOR_OFF, and CURSOR_SET macros are defined incorrectly. If
cursor support is disabled, then these macros are defined to nothing, but
then they are used like this:
if (console_col < CONSOLE_COLS)
CURSOR_OFF
console_row++;
which was compiled like this:
if (console_col < CONSOLE_COLS)
console_row++;
This is obviously not what was intended.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Rather than using a custom "Usage:", use the common cmd_usage() function,
and tail into it now that it returns 1 for us.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If working out of a custom git tree that lacks annotated tags, the
'git describe' operation spews "fatal: cannot describe" errors all
over the place. So add some fallback code in case the best naming
was unable to locate something useful.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch is to save environment data to mmc card.
It uses interfaces defined in generic mmc.
Signed-off-by: Terry Lv <r65388@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Commit d2bf29e3 caused a number of compiler warnings:
mmc.c: In function 'mmc_bwrite':
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
mmc.c: In function 'mmc_bread':
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
In commit bd7b26f8 (Tools: set multiple variable with fw_setenv utility),
the option parsing was changed to getopt_long(3), but option "-n"
of fw_printenv was not included.
This leads to an error message "invalid option -- 'n'" on stderr,
although the output on stdout is correct.
Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
The CURSOR_ON, CURSOR_OFF, and CURSOR_SET macros are defined incorrectly. If
cursor support is disabled, then these macros are defined to nothing, but
then they are used like this:
if (console_col < CONSOLE_COLS)
CURSOR_OFF
console_row++;
which was compiled like this:
if (console_col < CONSOLE_COLS)
console_row++;
This is obviously not what was intended.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.
See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
The SC520 CDP boards originally implemented by Daniel Engström are now
very broken. Attempts to contact Daniel via the email address on the
copyright notice have failed. Remove these boards from mainline
Commit 077e1958ca broke the ability of the
x86 port to boot from a cold-reset by removing the initial IDT. Re-
instate the initial IDT to allow cold-booting of x86 boards
Commit 54841ab50c made the argv parameter
to do_go_exec() const but did not allow for the fact that argv[-1] is
set to point to the global data structure and relies on argv being non-
const.
With this patch, do_go_exec() creates a new copy of the argv array with
an extra element to store global data pointer rather than simply
clobbering an arbitrary memory location.
The Blackfin implementation of musb has a TXCOUNT register that needs to
be programmed when transmitting data.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
commit 47e26b1b "cmd_usage(): simplify return code handling" caused
the following compile warnings:
bedbug_860.c: In function 'bedbug860_do_break':
bedbug_860.c:73: warning: 'return' with a value, in function returning void
bedbug_860.c:121: warning: 'return' with a value, in function returning void
Fix the return type.
Actually these files could need some cleanup - commands should
return proper error codes, and there are coding style issues.
=> To be fixed later.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Correctly set PAD1_FREF_CLK4_REQ and PAD0_FREF_CLK4_OUT to enable and
activate both LEDs while setting pad mux.
Since this increases the line length, this patch also adjusts the white
space in this section of code to allign the pad mux signal description
comments.
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
An upcoming version of Overo uses a Wifi/BT module with 1.8V signaling,
eliminating the need for an external transceiver to handle the level
shifting. This patch detects whether an external transceiver is present
and adjusts the pinmux settings as appropriate.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the Beagle xM. It uses the board ID
GPIO bits to recognize this revision and perform appropriate setup.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Future versions of these boards have options for POP memory with no NAND.
This option prevents display of error messages when no NAND is detected.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This printk was added recently and results in ugly output on systems
with no NAND:
NAND: nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB
instead of:
NAND: 0 MiB
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB
per bank. This patches uses the SDRC settings from x-load or the config
header to set up timing properly.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This
patch uses the reset bit appropriate for each CPU architecture.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The workarounds for errata 621766 and 725233 should only be applied
on affected Cortex-A8 revisions. Recent chips use r3px cores where
these have been fixed.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This function consists entirely of inline asm statements, so writing
it directly in a .S file is simpler. Additionally, the inline asm is
not safe as is, since registers are not guaranteed to be preserved
between asm() statements.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
so an SMC call to the ROM monitor is required. On later versions,
and on newer devices, this bit is banked and we can set it directly.
The code checked only the ES revision of the chip, and hence incorrectly
used the ROM call on ES1.0 versions of other devices.
This patch adds a check for chip family as well as revision, and also
removes some code duplication between the enable and disable functions.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch configures clocks properly when a 36XX/37XX
processor is detected.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TI has added new processors to the OMAP3 family. This patch enhances
the code in sysinfo.c to detect which family member is present.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Confiures GPMC timings for both chips and also configures pinmux
for GPIO_65, which is used as the interrupt signal for the second chip
Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch enhances the revision detection function and adds
support for the C4 revision. The board revision is printed
and approriate revision specific setup is done automatically.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The latest Overo COM modules encode their revision number on
GPIOs 115, 113, and 112. All boards to date have no pullups on these pins
and hence appear as revision 0.
This patch reads and prints the revision information.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Allows one to set the processor clock rate via "setenv mpurate 720" for example
Default is set to a "safe" 500 Mhz.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable
the input driver. MMC2_CLK was already properly configured.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds a function to allow one to easily set the target
voltage for the TWL4030 regulators. It also modifies the existing
code to use this new function. Applicable definitions are moved
out of the driver file and into the header file so that they are
generally accessible
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The functions in syslib.c can be shared, so this patch moves it from
cpu/omap3 to cpu/omap-common
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
From the document, if set all arguments in "OUTPUT_FORMAT" to
"tradbigmips", then even add "-EL" to gcc we still get EB format.
pb1x00 is only used in Little-endian, so its default endian should be
set to LE.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Use the MMU hardware to set up 1:1 mappings between physical and virtual
addresses. This allows us to bypass the cache when accessing the flash
without having to do any physical-to-virtual address mapping in the CFI
driver.
The virtual memory mappings are defined at compile time through a sorted
array of virtual memory range objects. When a TLB miss exception
happens, the exception handler does a binary search through the array
until it finds a matching entry and loads it into the TLB. The u-boot
image itself is covered by a fixed TLB entry which is never replaced.
This makes the 'saveenv' command work again on ATNGW100 and other boards
using the CFI driver, hopefully without breaking any rules.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The paging system which is required to set up caching properties has not
yet been initialized when the SDRAM is initialized. So when the
map_physmem() function is converted to return the physical address
unchanged, the SDRAM initialization will break on some boards.
The avr32-specific uncached() macro will return an address which will
always cause uncached accessed to be made. Since this happens in the
board code, using avr32-specific features should be ok, and will allow
the SDRAM initialization to keep working.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
In addition to the real PC value, also print the value of PC after
subtracting the relocation offset. This value will match the address in
the ELF file so it's much easier to figure out where things went wrong.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
We need to invalidate the data cache after it has been used as init-ram.
This problem was detected on the lwmon5 update.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).
Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.
Also, a few empty lines are added to make the code better readable.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Rupjyoti Sarmah <rsarmah@amcc.com>
Cc: Victor Gallardo <vgallardo@appliedmicro.com>
Opps, after a long time I tested recent u-boot on our
APC405 board. This simple fix makes networking work again.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
* Fix: return value of get_tbclk
* this fixes issue with prematurely restart/retry, if BOOT_RETRY_TIMEOUT is used
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
This rewrite of the mvtwsi driver is 25% smaller and much
faster and simpler than the previous code.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
This driver is not kirkwood-specific and can also be used
e.g. by orion5x. Rename to a SoC-neutral name.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
Typically we declare the name of gpio structure to "gpio",
so it was duplicated around the name. (e.g: gpio->gpio_a)
This patch modified the naming that is removing "gpio_".
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Fixed kw_winctrl_calcsize() off-by-1 bug which caused mapping
windows size to be cut by half.
This corrected all windows address configuration
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Fix orion5x_winctrl_calcsize() off-by-1 bug which caused mapping
windows to be cut by half. This afected all windows including NOR
flash (causing half the flash to be unaccessible) but DRAM was and
still is fine as its size is determined otherwise.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Because of these are common files around s5p Socs, rename from s5pc1xx to s5p.
And getting cpu_id is SoC specific, so move to SoC's header file.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This patch adds basic support for s5pc210.
s5p-common will be used by all of s5p SoCs.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Remove the register offset and common defines which are
already present in drivers/i2c/omap24xx.h. All of these
defines carry the same value even.
Cc: Steve Sakoman <steve@sakoman.com>
Cc: Heiko <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Wolfang Denk <wd@denx.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
Make the header guard to be generic to stop conflicting with
omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h
Cc: Steve Sakoman <steve@sakoman.com>
Cc: Heiko <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Wolfang Denk <wd@denx.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
convert the board to the new soc architecture
update default config
i2c upgrade taken from eb_cpux9k2.h & board/BuS/eb_cpux9k2/cpux9k2.c
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* convert meesc board to use c stucture SoC access
* change gpio access to at91_gpio syntax
* moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
fdt_parent_offset() is an expensive operation, so we'd like to reduce
unnecessary calls to it.
Further, the practice of iterating up to the root if address/size cells
aren't found was apparently done for Linux for compatibility with certain
buggy Open Firmware implementations, and U-Boot inherited the code. The
compliant behavior is to treat a missing #address-cells as 2, and a missing
#size-cells as 1 -- never looking anywhere but the immediate parent of the
node of interest.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc
didn't generate correct code when the reset vector is passed as a
constant. It just generated a direct "call", which was wrong when
the reset vector was not located in the same 256MB span as u-boot.
The "Nios II Processor Reference Handbook" said,
"call can transfer execution anywhere within the 256 MByte range
determined by PC31..28. The Nios II GNU linker does not automatically
handle cases in which the address is out of this range."
So we have to use registered "callr" instruction to do the job.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
We should check argv[3] only if there are enough args. Otherwise,
it might cause invalid memory access fault.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
We get two build errors:
fsl_elbc_nand.c: In function 'fsl_elbc_run_command':
fsl_elbc_nand.c:231: error: 'fsl_lbc_t' has no member named 'lsor'
make[1]: *** [/work/wd/tmp-ppc/drivers/mtd/nand/fsl_elbc_nand.o] Error 1
and
ve8313.c: In function 'initdram':
ve8313.c:104: error: expected '=', ',', ';', 'asm' or '__attribute__'
before '*' token
ve8313.c:104: error: 'lbc' undeclared (first use in this function)
ve8313.c:104: error: (Each undeclared identifier is reported only once
ve8313.c:104: error: for each function it appears in.)
ve8313.c:104: error: 'immap_t' has no member named 'lbus'
make[1]: *** [ve8313.o] Error 1
make: *** [board/ve8313/libve8313.a] Error 2
Due to changes to unifiy local bus struct definitions.
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In function board_early_init_r(), serdes will not be initialize yet.
Thus sRIO was always considered disabled. Move the check for sRIO into
misc_init_r() which is called after fsl_serdes_init().
Also, fixed warning associated with gur variable possibly not being
used.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Lian Minghuan <B31939@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The board specific parameters associated with quad rank dimms where
missing. This fixes it so the board will function if quad rank dimms
are placed in it.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Official docs call it the Job Ring not Job Queue for the p4080 security
block. Match the docs to reduce confusion.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30
256-Mbit 65nm flash chips.
After some time :( searching for bugs in our board or soft, we have
discovered that those chips have a small but annoying bug, documented in
"Numonyx Axcell P33/P30 256-Mbit Specification Update"
It states :
When customer uses [...] block unlock, the block lock status might be
altered inadvertently. Lock status might be set to either 01h or 03h
unexpectedly (00h as expected data), which leads to program/erase failure
on certain blocks.
A working workaround is given, which I have applied and tested with success :
Workaround: If the interval between 60h and its subsequent command
can be guaranteed within 20us, Option I is recommended,
otherwise Option II (involves hardware) should be selected.
Option I: The table below lists the detail command sequences:
Command
Data bus Address bus Remarks
Sequence
1 90h Block Address
Read Lock Status
2 Read Block Address + 02h
(2)(3) (1)
3 60h Block Address
(2)(3) (1) Lock/Unlock/RCR Configuration
4 D0h/01h/03h Block Address
Notes:
(1) Block Address refers to RCR configuration data only when the 60h
command sequence is used to set RCR register combined with 03h
subsequent command.
(2) For the third and fourth command sequences, the Block Address must
be the same.
(3) The interval between 60h command and its subsequent D0h/01h/2Fh/03h
commands should be less than 20us.
And here is a log comparison of a simple (destructive) flash test without
and with the workaround.
diff without-numonyx-workaround.log with-numonyx-workaround.log
-U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:07:47)
+U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:25:19)
CPU: Freescale MCF5484
CPU CLK 200 MHz BUS CLK 100 MHz
Board: Macq Electronique ME2060
I2C: ready
DRAM: 64 MiB
FLASH: 32 MiB
In: serial
Out: serial
Err: serial
Net: FEC0, FEC1
-> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 32 MB in 259 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8922
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes
Sector Start Addresses:
FE000000 RO FE008000 RO FE010000 RO FE018000 RO FE020000 RO
FE040000 RO FE060000 RO FE080000 RO FE0A0000 RO FE0C0000 RO
...
FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 RO
-> protect off all
Un-Protect Flash Bank # 1
................... done
-> erase all
Erase Flash Bank # 1
................... done
-> cp.b 1000000 fe000000 2000000
-Copy to Flash... Flash not Erased
+Copy to Flash... done
->
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch does the following:
- Extract code to detect if sector is erased into function
sector_erased().
- Because of this, we don't have variable declarations inside the
sector loop in flash_print_info()
- Change "return" to "break" in the "if (ctrlc()) statement:
This fixes a problem with the resulting output. Before this
patch the output was:
Sector Start Addresses:
FC000000 FC020000 FC040000 =>
With this patch it is now:
Sector Start Addresses:
FC000000 FC020000 FC040000
=>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Fix reading and printing of CFI flashes 16-bit devices identifiers
Nowadays CFI flashes have a 16-bit device identifier. U-boot still
print them and read them as if they were only 8-bit wide. Fix that.
Before:
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B
After:
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x881B
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is intended to prepare the other S5P SoC. (s5pc210)
If use SoC specific defines then can't share with other SoC.
So, make the accessor functions for access the base address by common way.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Currently, if there is an error probing the NAND chip and the env is based
in NAND, the readenv() function will use a NULL function pointer and thus
jump to address 0.
Here I just check for a non-zero value of blocksize as that shouldn't be
zero when a valid device is found, but perhaps there is a better way for
someone familiar with the NAND internals to suggest.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
The OMAP3 block read function is not following API and always returning
1 instead of read block count, fix it. Also to simplify code, merge it
with with a helper function, which was only called from the block read
function.
After this patch ext2 filesystem can be used properly.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Make driver local variables and functions static and
remove them from the arch header.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The "usb help" doesn't format the output correctly:
=> help usb
usb - USB sub-system
Usage:
usb reset - reset (rescan) USB controller
usb stop [f] - stop USB [f]=force stop
usb tree - show USB device tree
usb info [dev] - show available USB devices
usb storage - show details of USB storage devices
usb dev [dev] - show or set current USB storage device
usb part [dev] - print partition table of one or all USB storage devices
usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'
to memory address `addr'usb write addr blk# cnt - write `cnt'
blocks starting at block `blk#' from memory address `addr'
=>
With fix below applied, the output is correct:
=> help usb
usb - USB sub-system
Usage:
usb reset - reset (rescan) USB controller
usb stop [f] - stop USB [f]=force stop
usb tree - show USB device tree
usb info [dev] - show available USB devices
usb storage - show details of USB storage devices
usb dev [dev] - show or set current USB storage device
usb part [dev] - print partition table of one or all USB storage devices
usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'
to memory address `addr'
usb write addr blk# cnt - write `cnt' blocks starting at block `blk#'
from memory address `addr'
=>
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
AM35x supports only 32bit read operations so we need to have
workaround for 8bit and 16bit read operations.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Adding general register structure of system control module (SCM)
of AM35x. This would be required to access devconf2 and ip_sw_reset
register in musb module.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
The bi_cpu field of the board data is already set to the relevant cpu
string, so there is no need for us to use the define directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Recent features enabled by default require a larger monitor size for the
cm-bf548 port, so bump it up a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
In case there is no frame buffer driver present in Linux to hand over the
PPI LCD DMA upon boot, the DMA initiated by u-boot to display the splash
screen runs unattended. Therefore always stop the video driver in u-boot
before starting Linux. If people don't want this behavior, then they can
simply stub out the video_stop() function in their board video driver.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds support for the display controller in
the MB86R0x SoCs.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Turn all ORION5X_DEF{ADR,SZ}_xxx macros into ORION5X_{ADR,SZ}_xxx
and allow defining them from board code to override defaults. This
is particularly useful for defining board-specific FLASH address
and size in board header file rather than having to tweak orion5x
code.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
get_timer_masked() should return current timestamp,
not current ticks from hardware register.
Tested on one custom board with NAND flash.
Without this patch, NAND write always TIMEOUT
because get_timer(0) return a big value.
This patch applies for u-boot-2010.06
Signed-off-by: Li Haibo <hbli@sinocastel.com>
Commit 6e37b1a3a25004d3df5867de49fff6b3fc9c4f04 modifies several net calls
to take a (const char *) parameter instead of (char *), but in some cases
the modified functions call other functions taking (char *). The end result
is warnings about discarding the const qualifier.
This patch fixes these other function signatures.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
For code that uses miiphy_{read,write}, every call invokes a full look up
of the mii list. There is already a "current_mii" cache that is used by
some code, but have the miiphy_{read,write} function use it as well. This
does increase the code size slightly, but I think it's worth it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rather than have every func re-implement the list walking code, do it one
local function. This shrinks the resulting object code a little while
making the source much more manageable.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8
"net ppc: fix ethernet device names with spaces" (currently in
u-boot-net.git) for QE based parts.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
since commit 1384f3bb8a ethernet names
with spaces drop a
Warning: eth device name has a space!
message. This patch fix it for:
- "FEC ETHERNET" devices found on
mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
renamed to "FEC".
- "SCC ETHERNET" devices found on
mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
boards. Renamed to "FCC"
Tested on the kup4k board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
After discussion on the ML it is suggested to drop unrequired
and not useful characters from the device name.
This patch changes the name for the fec_mxc driver from
"FEC_MXC" to "FEC".
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch has the following fixes/changes:
- Set 'kernel_addr' and 'ramdisk_addr' to correct values and add
'fdt_addr' environment variable
- Remove 'kozio' environment variable
- Remove environmant variables to boot ancient arch/ppc Linux kernels
- Remove CONFIG_SYS_BOOTMAPSZ definition. It's already defined to
the same value in amcc-common.h
Signed-off-by: Stefan Roese <sr@denx.de>
Update image size and default environment
after addition of new environment handling.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Update image size after addition of new environment handling.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Update image size after addition of new environment handling.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
None of the AMCC boards uses an embedded environment, so there is no
need to run "saveenv" after updating U-Boot. Drop the redundant
commands from the default environment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Simply trying to include a basic header file like stdlib.h on OS X 10.5
and then building with -traditional-cpp fails with lots of errors like:
In file included from /usr/include/stdlib.h:63,
from test.c:3:
/usr/include/available.h:85: error: stray '#' in program
/usr/include/available.h:85: error: syntax error before numeric constant
/usr/include/available.h:86: error: stray '#' in program
In the past, I hadn't noticed because the old logic for these flags were
restricted to Darwin running on PowerPC systems while I'm running on an
Intel system. But after some recent clean ups and changes, the flag was
being applied to all Darwin systems and my host tools broke.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Original bug description from Feng (fdt_resize() bug caused "WARNING:
could not set linux, initrd-start FDT_ERR_NOSPACE."):
What I got is an error: "WARNING: could not set linux,initrd-start
FDT_ERR_NOSPACE." after loading Device Tree blob. This in turn caused
linux to miss init part.
After some digging, I found out the reason for this error, it is caused
by fdt_resize().
FDT blob got resized after filling in all board specific information of
PowerPC. (in boot_body_linux()). It reduced blob size with only extra
space for two fdt_reserve_entry, one for fdt itself, and one for initrd.
Then it's aligned to a 0x1000 page boundary. However, later in
fdt_initrd(), it could add two more properties, initrd-start AND
initrd-end, each one needs at least two fdt_reserve_entry sizes done by
_fdt_add_property() (name and value). Thus, the two fdt_reserve_entry
extra space is not sufficient.
So for some specific fdt size which is just under the page boundary
after resizing, this will cause an error of FDT_ERR_NOSPACE in
fdt_initrd() when setting those two properties, and failed to pass
initrd information to linux.
My fix is in fdt_resize(), leave at least 4 fdt_reserve_entry for
initrd. So instead of 2*sizeof(struct fdt_reserve_entry) for
actual_totalsize, use 5*sizeof(struc fdt_reserve_entry).
Stefan: I got this same error on katmai, when trying to boot with
initrd (run flash_self). This patch fixes this issue.
Signed-off-by: Feng Wang <fwang02@harris.com>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Most of the files have U_BOOT_CMD on a separate line,
but a few didn't and had the first line on the same line
as U_BOOT_CMD.
This changes these files by adding a line break and a tab
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
removed the command name from the help message as it is already printed.
for cmd_mmc also rewrote the message a little bit
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
The invalidation of the old environment instance did not work for flashes
supporting hardware locking. Now we unlock/lock around this update also.
Signed-off-by: Detlev Zundel <dzu@denx.de>
If a flash is unable to be detected, and then someone calls flash_protect
on it (like the common code does in flash_init), the flash_protect logic
will dereference a NULL pointer.
Since flash_protect already does sanity checking on the info structs, add
a NULL pointer check in there.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fix error handling in getenv_f() when the user provided buffer is too
short to hold the variable name; make sure to truncate and
NUL-terminate without overwriting the buffer limits.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Applying a little creative format string allows us to shrink the initial
data read & display loop by only calling printf once. Re-using the local
data buffer to generate the string we want to display then allows us to
output everything with just one printf call instead of multiple calls to
the putc function.
The local stack buffer needs increasing by 1 byte, but the resulting code
shrink and speed up is worth it I think.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
No need to output spaces 1 char at a time in a loop when the printf code
can do the same thing with the right format string. This shrinks things
and gives a nice speed up when killing off lines more than a byte or two
as printf will send out the buffer in one big chunk.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Platforms with flat device tree support can use a bootmap to relocate
the fdt_blob. This is not a must. That's why the relocation function
boot_relocate_fdt() should be use only if CONFIG_OF_LIBFDT was defined
together with CONFIG_SYS_BOOTMAPSZ (see common/cmd_bootm.c).
On MicroBlaze platforms there is no need to use a bootmap to relocate
a fdt blob. So we need a more precise focus on the compilation and usage
of boot_relocate_fdt().
In general it is valid to exclude the function boot_relocate_fdt() if
the bootmap size CONFIG_SYS_BOOTMAPSZ is not defined.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Some Linux distributions include the "mkimage" as a package.
This commit provides a manual page for mkimage.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Added documentation for FIT images and examples.
Moved to doc/ directory.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This driver only provides initialization code; actual driving
is done by cmd_ide.c using the ATA compatibility mode of the
Marvell SATAHC controller.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
CONFIG_IDE_SWAP_IO
This configuration option replaces a complex conditional
in cmd_ide.c with an explicit define to be added to SoC or
board configs.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Doubly-indirect block numbers are compared against the first-level
indirect block when checking for a cached copy. This is causing the
doubly-indirect block to be re-read each time it is accessed.
Repairing this reduces load time for a 70M file from 72 seconds
to 38 seconds.
Signed-off-by: Aaron Pace <Aaron.Pace@alcatel-lucent.com>
These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
If the user sets bootm_low and does not set bootm_size, u-boot will
report the memory node in the flat device tree incorrectly. Instead
of reporting the remaining size of memory, it will report the total
available memory which is incorrect.
Specifically this fixes the situation when booting a relocatable
kernel and the memory is reported as an offset and size in the
device tree, and the size needs to be adjusted accordingly.
Signed-off-by: Matthew McClintock <msm@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Some commands (like 'mii') use this name to select devices, but they
break when those names contain spaces. So drop the space from
Ethernet driver names (cf. commit 1384f3bb).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
This patch add the basic infrastructure for the TWL6030 driver and enables
support in the two existing OMAP4 boards, Panda and OMAP4430 SDP
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch modifies the init routine to follow the TRM
recommendations. It also modifies the i2c_read_byte function
to reflect subtle differences between the i2c controller in
OMAP3 and OMAP4.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Nishanth Menon <menon.nishanth@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't
acceptable for udelay. This patch changes from gptimer1 to gptimer2,
which uses sys_clk at 38.4 Mhz.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add functional multiplexing support for OMAP4 pads.
Configure all the pads for the OMAP4430 SDP
and OMAP4 Panda boards
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function. This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).
Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.
To avoid confusion, rename into getenv_f() [as "running from flash"]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Avoid warning:
cmd_bootm.c: In function 'bootm_load_os':
cmd_bootm.c:394: warning: passing argument 2 of
'lzmaBuffToBuffDecompress' from incompatible pointer type
For 32 bit systems, this change shouldn't make a difference to code size
since sizeof(size_t) and sizeof(unsigned int) are equal. But it does fix
the warning.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
doing so helps avant garde users, such as those using simulators that
allow users to configure the number of cores, so as to not have to
manually adjust u-boot sources. h/w should also be reliably setting
FRR NCPU in the future.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.
Signed-off-by: York Sun <yorksun@freescale.com>
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.
Signed-off-by: York Sun <yorksun@freescale.com>
Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual
rank with 512MB each rank.
Also check dimm size and rank size for memory controller interleaving
Signed-off-by: York Sun <yorksun@freescale.com>
Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is
setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"
The mode values for memory controller interleaving are
cacheline
page
bank
superbank
The mode values for bank interleaving are
cs0_cs1
cs2_cs3
cs0_cs1_and_cs2_cs3
cs0_cs1_cs2_cs3
Signed-off-by: York Sun <yorksun@freescale.com>
Add support for initializing the SERDES blocks on CoreNet style QoriQ
devices and the p4080 specific SERDES tables to know which actual
componetns are enabled.
Additionally, split out the Frame Manger (FMAN) into its specific ethernet
ports instead of gross level of the full FMAN.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the new QorIQ/CoreNet based platforms we need to initialize the
"portals" as access into the Data Path subystem as well as Logical IO
Device Numbers (LIODN) that are used for the IOMMU (PAMU).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If we are creating reference (handles) to nodes in a device tree we need
to first create a new phandle in node and this needs a new phandle
value. So we search through the whole dtb to find the max phandle value
and return the next greater value for a new phandle allocation.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
If 36-bit physical address is used, move the INIT_RAM_ADDR to higher
address. This frees the low 4GB address space for better use.
Signed-off-by: York Sun <yorksun@freescale.com>
* Added PCIE4 address, offset, DEVDISR & LAW target ID
* Added new p4080 DDR registers and defines to immap
* Add missing corenet platform DEVDISR related defines
* Updated ccsr_gur to include LIODN registers
* Add RCWSR defines
* Added Basic qman, pme, bman immap structs
* Added SATA related offsets & addresses
* Added Frame Manager 1/2 offsets & addresses
* Renamed CONFIG_SYS_TSEC1_OFFSET to CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
* Added various offsets and addresses that where missing
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Serial devices currently have to manually stuff \r after every \n found,
but this is a bit more difficult with the jtag console since we process
everything in chunks of 4 bit. So we have to scan & stuff the whole
string rather than what most serial drivers do which is output on a byte
per byte basis.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
While we're in here, add some useful debug points. We need custom debug
statements because we need the output to only go to the serial port. If
we used the standard debug helpers, the output would also go to the stdout
(which would be the jtag console) and make it hard to figure out what is
going where exactly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the other side isn't listening, we should reset the state to ignore
the whole message and not just the part we missed. This makes it easier
to connect at any time to the jtag console without worrying about the two
sides getting out of sync and thus sending garbage back and forth.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Avoid extra carriage returns in the output by disabling output processing.
Otherwise, whenever the remote sends a \r\n, we end up with \r\r\n.
Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the new common gpio framework to simplify and unify the soft i2c
configuration settings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
The dots printed by common/usb_storage.c as progress meter corrupt the
output for example of "fatls usb" commands like this:
=> fatls usb 0
. <<==== here
29 file.001
29 file.002
29 file.003
29 file.004
29 file.005
29 file.006
29 file.007
29 file.008
29 file.009
29 file.010
29 file.011
29 file.012
29 file.013
29 file.014
29 file.015
29 file.016
. <<==== here
29 file.017
29 file.018
29 file.019
...
Turn the progress output into a debug message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
On FAT32, instead of fetching the cluster numbers from the FAT, the
code assumed (incorrectly) that the clusters for the root directory
were allocated contiguously. In the result, only the first cluster
could be accessed. At the typical cluster size of 8 sectors this
caused all accesses to files after the first 128 entries to fail -
"fatls" would terminate after 128 files (usually displaying a bogus
file name, occasionally even crashing the system), and "fatload"
would fail to find any files that were not in the first directory
cluster.
Signed-off-by: Wolfgang Denk <wd@denx.de>
"Superfloppy" format (in U-Boot called PBR) did not work for FAT32 as
the file system type string is at a different location. Add support
for FAT32.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The device type was left uninitialized which caused later tests
against DEV_TYPE_UNKNOWN to fail. In the result, "usb part" would
attempt to print information about non-existent devices like this:
=> usb part
print_part of 0
Partition Map for USB device 0 -- Partition Type: DOS
Partition Start Sector Num Sectors Type
1 0 2031616 f8
print_part of 1
## Unknown partition table
print_part of 2
## Unknown partition table
print_part of 3
## Unknown partition table
print_part of 4
## Unknown partition table
=>
By initializing the type as DEV_TYPE_UNKNOWN we avoid all the
"Unknown partition table" messages.
[Note: the "print_part of ?" messages is left over debug code that
will be removed in another patch.]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Lots of code use this construct:
cmd_usage(cmdtp);
return 1;
Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by
return cmd_usage(cmdtp);
This fixes a few places with incorrect return code handling, too.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds the "ecctest" command to test and simulate ECC errors
(single bit and/or double bit) while running from SDRAM. Currently only
the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT).
This is done by copying and calling functions, modifying the SDRAM
controller operation mode, in internal SRAM/OCM.
For correctable ECC errors (single bit) only the status will be printed
since the DDR2 controller doesn't provide the faulting address:
=> ecctest 1000000 1
Using address 01000000 for 1 bit ECC error injection
ECC: Correctable error
Uncorrectable ECC errors (double bit) will also display the faulting
address:
=> ecctest 1000000 2
Using address 01000000 for 2 bit ECC error injection
ECC: Uncorrectable error at 0x0001000000
To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST
in the board config header.
Tested on katmai and t3corp.
Signed-off-by: Stefan Roese <sr@denx.de>
Use the correct macro instead of the hardcoded 0x4c to clear the ECC
status in the 440/460 DDR(2) error status register after ECC
initialization.
Also the non-440 parts (405EX(r) right now) and the IBM DDR PPC variants
(440GX) use a different registers to clear this error status. Use the
correct ones.
Signed-off-by: Stefan Roese <sr@denx.de>
Make sure that some SDRAM/DDR2 registers are only defined for the PPC
variants really implementing those registers.
Signed-off-by: Stefan Roese <sr@denx.de>
Using this define, a board can define an opimized RFDC value and use
the auto calibration code to "tune" the remaining DDR2 controller
calibration register.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes some problems for the T3CORP board. Here the list
of the changes:
- Add 600-67 and 677 CPU frequency setting to chip_config
command
- Define CONFIG_DDR_RFDC_FIXED on t3corp:
While using the "normal" auto calibration code, sometimes values for
RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang
upon relocation, while running from SDRAM). With this optimized RFDC
value we can force this register and use the auto-calibration code to
setup the remaining calibration registers.
- Increase sizes of FPGA chips selects
- EBC timing updated OEN=3 for 66 MHz EBC speed
- Change ext. IRQ2 setup to level-low active
- Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL
By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the
chip busy status. This is now used instead of the data toggle method which
is used historically by default in the common CFI driver. With this change
a problem with not written data is solved on this board, where a 32 byte
block of data is still erased instead of filled with the correct content
after these commands:
=> erase 0xfc100000 +0x1000000
....................................................................
done
Erased 128 sectors
=> cp.b 0x100000 0xfc100000 0x1000000
Copy to Flash... done
=> cmp.b 0x100000 0xfc100000 0x1000000
byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff)
Total of 12637888 bytes were the same
Signed-off-by: Stefan Roese <sr@denx.de>
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com>
Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Since the vast majority of GPIO I2C implementations behave the same way,
support the common GPIO framework with default settings.
This adds two new defines CONFIG_SOFT_I2C_GPIO_{SCL,SDA} so that boards
which want GPIO I2C support need only define these.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p3041 to cpu_type_list and SVR list
* Added number of LAWs for p3041
* Set CONFIG_MAX_CPUS to 4 for p3041
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p5020 & p5010 to cpu_type_list and SVR list
* Added number of LAWs for p5020
* Set CONFIG_MAX_CPUS to 2 for p5020
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On QorIQ CoreNet based devices we have a global clocking block. We want
to keep track of SYSCLK frequency as it is what is used to derive all
other frequencies in the SoC
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move to using fdt_node_offset_by_compat_reg to find the node offsets we
want to update instead of using aliases.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously we used an alias the pci node to determine which node to
fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.
Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Given a compatible string and physical address try and find a node that
matches. This is useful when we want to find a specific device node to
update (for example if we have multiple PCI nodes we can use the
physical address to distinguish them when trying to update the device
tree).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
This code is extracted out of the Linux Kernel code from
arch/powerpc/kernel/prom_parse.c.
We maintain some of the same structure to support multiple bus types even
though we only have one in the current code. In the future we might want
to translate across a PCI bus and thus it will be easier to add that
functionality back in.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
The MPC8641 boards actually only have PCIE not PCI. Rename so we are
uniform with regards to names so we can replace this code with templated
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on
MPC8641 boards since its really PCIE controllers and not PCI.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The board maintainer states:
The GTH board is obsolete and has not been manufactured for
several years.
To my knowledge, no recent U-Boot build has been tested on that
card.
So drop support for this board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Acked-by: Thomas Lange<thomas@corelatus.se>
The code to map SERDES configs to slot names is board specific and not
chip specific. Thus it should live in board/freescale/p1022ds/ and not
in arch/powerpc/cpu/.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add 'errata' command to report what errata we workaround. Report
workaround for erratum SATA-A001 on P1022/P1013.
Also sorted the CONFIG_CMD_* list.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Specifics:
1) 36-bit only
2) Booting from NOR flash only
3) Environment stored in NOR flash only
4) No SPI support
5) No DIU support
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that
we can capture the LAW target for a given PCI or PCIE controller. Also update
the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the
LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure.
This will allow future PCI[E] code to configure the LAW target automatically,
rather than requiring each board to it for each PCI controller separately.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The e5500 has a link register stack and segment target address cache.
Its safe to enable these bits on older e500 cores as the bits are
implemented in the register.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Each platform had its own version of the upmconfig, despite the
init process being identical. Now that we have a spot for common
lbc code, create a common upmconfig() there.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The current code redefines functions based on FSL_CORENET_ vs not -
create macros/inlines instead that hide the differences.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code. Create a TSIZE_TO_BYTES macro to deal with the conversion
from the MAS field to an actual size instead of duplicating this in code.
There are a few misc other minor cleanups.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC. Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock. Move the code into a common location so we
share it.
Convert the P2020DS board as the first to use the new common ICS307
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
The various boards that have PIXIS FPGAs have slightly different
register definitions, however there is some common functionality (like
reset, ICS307 clk control, etc) that can be shared.
The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS,
MPC8610HPCD, and MPC8641HPCN boards.
Also fixed ngpixis to be __packed__ instead of aligned.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We may have cpu-handles pointing to the cpu nodes we delete. If so we
should delete the handles as well.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds a gpmc_init function for OMAP4 and adds calls to
gpmc_init for existing OMAP4 boards: panda and sdp4430
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Usage of parenthesis in pinmux macro definition changes the
definition of the macro and raises the precedence of '&'
operator inadvertently over '[]'.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Existing code returns checkpatch error on pinmux macro definition for
not enclosing the definition in parenthesis. The error can be observed in
the patch generated from commit id bdc9c6c7f7.
So macro implementation is modified to fix the error.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the Voipac PXA270 board. The support includes:
- Ethernet
- USB
- MMC
- NOR Booting
- OneNAND Booting
- LCD
- HDD
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch adds macros for the following purposes:
- GPIO configuration
- SDRAM configuration
- Wakeup
- Clock configuration
- Interrupt controller configuration
These macros are intended to replace numerous copies of the same code.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
The SPI env code didn't support redundant environments until recently, but
this code was written before that. Since it has never been tested (and
currently causes a build failure), simply punt it. If the functionality
is actually desired, it can be re-added once it has been tested.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The u-boot.lds CPP unification missed the Blackfin-specific clean target.
It is no longer needed, so punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces. So drop the space from the Blackfin EMAC
driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The L1 regions of Core B are not directly accessible from Core A, so we
need to use DMA to get at them.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
ones only have a National PHY (which lack a RX Error interrupt line). So
in the board eth init code, dynamically detect what is hooked up to the MAC
and handle each accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Much of the local bf533-stamp.h header is unused, and the few bits that
are are only needed in one file. So move the few used bits out and punt
all the rest.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than only support the pins dedicated as chip selects, utilize the
gpio framework to support any gpio pin.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the new portmux framework to handle the details when possible.
Unfortunately, we cannot yet use this in the standalone initialization
logic, so we need to keep around the old portmux writes for now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
Rather than bang MMRs directly, use the new portmux framework to handle
the details. While we're doing this, let boards declare the exact list
of pins they need in case there is one or two they don't actually have
hooked up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This configuration option allows SoCs without random
generation capability to fill in local MACs with a fixed
rather than random value
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Change if (ok) {
bunch of stuff
} else {
error
}
to
if (error) {
get out
}
proceed with bunch of stuff
Plus a few whitespace cleanups.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This is a re-submission of the patch by Harald Welte
<laforge@openmoko.org> with minor modifications for rebase and changes
as suggested by Scott Wood <scottwood@freescale.com> [1] [2].
This patch enables the environment partition to have a run-time dynamic
location (offset) in the NAND flash. The reason for this is simply that
all NAND flashes have factory-default bad blocks, and a fixed compile
time offset would mean that sometimes the environment partition would
live inside factory bad blocks. Since the number of factory default
blocks can be quite high (easily 1.3MBytes in current standard
components), it is not economic to keep that many spare blocks inside
the environment partition.
With this patch and CONFIG_ENV_OFFSET_OOB enabled, the location of the
environment partition is stored in the out-of-band (OOB) data of the
first block in flash. Since the first block is where most systems boot
from, the vendors guarantee that the first block is not a factory
default block.
This patch introduces the 'nand env.oob' command, which can be called
from the u-boot command line. 'nand env.oob get' reads the address of
the environment partition from the OOB data, 'nand env.oob set
{offset,partition-name}' allows the setting of the marker by specifying
a numeric offset or a partition name.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/43916
[2] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/79195
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Harald Welte <laforge@gnumonks.org>
The example configuration files of nios2-generic board can generated
binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three
boards can be removed.
With nios2-generic approach, the fpga parameter header file can
be generated from hardware designs using tools. Porting u-boot for
nios2 boards is simplified. Vendors can supply their fpga parameter
file or patches to add a new nios2-generic board instance. There is
no need to include other boards support for nios2 in the u-boot
mainline.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch enables the altera_spi and spi_flash drivers for the
nios2-generic board. It allows access to the EPCS/SPI flash on
the Altera EP1C20 board.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds the gpio usage request. The polarity is changed to
positive as suggested by Mike Frysinger.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds fdt support to boot linux, followed Michal's
work on microblaze.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Follow the discussion of Charles Manning and Mike Frysinger.
Using gc_sections helps reduce image size.
Configuring for nios2-generic board...
Before,
text data bss dec hex filename
123979 3724 22892 150595 24c43 /tmp/u-boot/u-boot
After,
text data bss dec hex filename
115983 3800 22732 142515 22cb3 /tmp/u-boot/u-boot
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* the following problems are met :
config was set to use the new driver as a default but
- RMII was not enabled for the new driver
- the new driver didn't compile with RMII enabled
- the new driver initialize a PHY at address O when the PHY of
this board is at 1 thus we get "AT91 EMAC RMII: No PHY present"
* to fix these problems, this patch :
- enable RMII for the new driver
- fix the wrong define used in the at91_emac.c
- allow the config file to set a default phy address (and use
0 as a default as in the actual at91_emac.c driver)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current dm9000x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
Blackfin systems as the accesses can get out of order. So convert the
direct volatile dereferences to use the normal in/out macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current OUTW function is always defined as a 16bit function, but this
doesn't work correctly when using the 32bit access mode. So define it as
a 32bit function when in 32bit mode so things work correctly on Blackfin
32bit LE systems.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some places in the current code equate the Marvell 88E1111 PHY as the family
when in reality it's a subpart of the Alaska family. So once we generalize
that, add support for the 88E1118 PHY.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The smc911x_detect function in /net/driver/net/smc911x.c
returns a 0 if everything was ok (a chip was found) and -1 else.
In the standalone example 'smc911x_eeprom' the return value
of smc911x_detect is interpreted in a different way
(0 for error, !0 as OK).
This leads to the error that the chip will not be detected.
Signed-off-by: Juergen Kilb <j.kilb@phytec.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The Ethernet initialization functions are supposed to return the number of
devices initialized, so fix tsec_eth_init() so that they returns the number of
TSECs initialized, instead of just zero. This is safe because the return value
is currently ignored by all callers, but now they don't have to ignore it.
In general, if an function initializes only one device, then it should return
a negative number if there's an error. If it initializes more than one device,
then it should never return a negative number.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Device names should not contain non-printable characters like newlines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some commands operate on eth device names (like 'mii'), but those cannot
be passed on the command line as one argument. So detect devices like
these and warn about them so someone will fix it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
No compiled code change here, just drop the local PHY defines in favor of
the common standard ones.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcode specific phy addresses, search the possible phy
address space to find the first available phy. Also respect the normal
CONFIG_PHY_ADDR option for board porters to pick a specific address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
DRAM window mapping uses kirkwood-provided functions instead
of global gd as do other drivers--fix this.
Also, fix a typo in a comment
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Designware network driver support added.
This is a Synopsys ethernet controller
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
By defining CONFIG_M88E1111_DISABLE_FIBER boards can configure the
M88E1111 PYH to disable fiber. This is needed for an upcoming PPC460GT
based board, which has fiber/copper auto-selection enabled by default.
This doesn't seem to work. So we disable fiber in the PHY register.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The DM9000 in/out helper functions were casting the register address when
it was accessing things directly (pre commit a45dde2293). But
when it was changed to using the in/out helpers, those casts were dropped
because those functions don't take pointers. Even more recently, those
functions were then changed to use the read/write helpers, but the casts
were not re-added. This is necessary because the read/write helpers do
take pointers. Otherwise we get a lot of warnings like:
dm9000x.c: In function 'dm9000_inblk_8bit':
dm9000x.c:172: warning: passing argument 1 of 'readb'
makes pointer from integer without a cast
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch add support for the ve8313 board based on
Freescale MPC8313 CPU.
- serial console on UART 1
- 128 MB DDR RAM
- 32 MB NOR Flash
- 16 MB NAND Flash
- Ethernet MII Mode over on TSEC0
- micrel ksz804 phy
- Hardware WDT MAX824
changes since v1
- Environment size = sector size
- use red. environment
- add comments from Kim Phillips
- add MAKEALL, MAINTAINERS entry
- Codingstyle issues fixed
- inserted original Copyrights
- PCI subsys vendor ID changed from 0x1057 (Motorola)
to 0x1957 (Freescale)
changes since v2
- add comments from Wolfgang Denk
- fix Codingstyle and some comments
- reworked WDT reset (just toggling the WD_TRIG pin)
- Environment size now 16KiB
- fixed RAMBOOT version
- fixed CONFIG_SYS_LOAD_ADDR
- renamed CONFIG_TSEC1_NAME to TSEC1
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
The following features are enabled in configuration but not fully tested:
I2C (used to get the board revision)
I2C-connected RTC
VSC7385 switch
There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
remove below warnings
serial_s5p.c: In function 'serial_getc_dev':
serial_s5p.c:136: warning: dereferencing type-punned pointer will break strict-aliasing rules
serial_s5p.c: In function 'serial_putc_dev':
serial_s5p.c:152: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Use the new GPIO framework code in both the Blackfin arch and the
nand_plat driver to simplify things greatly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
framework. Also make the NAND_PLAT_INIT() define optional.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1
identifier. Add these to the list of known devices IDs.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
When the NAND part is not supported, it is useful to show the manufacturer
and device ID to help debugging and reporting.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Two Indentation fixes.
Catch requests for full-duplex transfers when driver configured for
half-duplex operation only.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
this eliminates compiler warnings when cmd_mmc.c is built with CONFIG_SYS_MMC_SET_DEV
the mmc_set_dev implementation in omap3_mmc.c is also tweaked to match
the new prototype in parameter naming and type
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
OMAP4 Panda is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU
This patch adds basic support for booting the board. It includes i2c and mmc
support. It assumes U-boot is loaded to SDRAM with the help of another small
bootloader (x-load) running from SRAM. U-boot currently relies on x-load for
clock, mux, and SDRAM initialization
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
OMAP4430 SDP is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU
This patch adds basic support for booting the board. It includes i2c and mmc
support. It assumes U-boot is loaded to SDRAM with the help of another small
bootloader (x-load) running from SRAM. U-boot currently relies on x-load for
clock, mux, and SDRAM initialization
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch modifies the omap24xx driver so that it will also work with OMAP4.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The architecture independent header is moved to drivers/mmc, and the architecture
dependent headers reside in asm/arch-omap3 and asm/arch-omap4
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds minimum support for OMAP4. Code which can be shared
between OMAP3 and OMAP4 is placed in arch/arm/cpu/armv7/omap-common
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9
Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.
The two architectures are similar enough that substantial code can be shared.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the second and third mmc channels on OMAP3
processors
Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV
in the board config
Tested on Overo
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Tested-by: Philip Balister <philip@opensdr.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The common gpio code provides a function for handling the spi boot
workaround logic, so switch over to that rather than bang on the
gpio MMRs directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we have a unified gpio layer, the different status led
implementations can be switched to the common gpio led driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When boards define CONFIG_BOARD_SPECIFIC_LED, the common led definitions
are OK for Blackfin boards. So switch the few boards using these over to
the common code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we have a unified gpio layer, the misc partial gpio commands
can be unified and made complete (support all possible gpios).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current pinmux handling has spread throughout Blackfin drivers and
board code and is getting hideous to maintain. So import the gpio and
portmux layer from the Blackfin Linux code. This should spur a serious
of cleanups across the Blackfin tree.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Older on-chip Blackfin bootroms do not create a dummy NMI handler, so set
up one ourselves when anomaly 05000219 applies.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The new common spi framework and spi flash subsystem provides all the same
functionality as the old Blackfin-specific driver, so punt the old one as
it has been sticking around long enough.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The default storage location for bootcount is EVT0. This version uses
one 32bit value and combines the magic/count value in the upper/lower
16bits. If there is demand for more, should be easy to do.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Avoid banging on the trace MMRs when debugging is disabled, avoid calling
the funcs multiple times in a row, disable the trace buffer earlier in the
exception handler to avoid eating more user entries, and dump the buffer
before calling the kgdb hook. This way we maximize useful debugging info
up front rather than needing external tools (like gdb/serial/etc...).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Instead of defining the flags sevaral times in different source files
(which is error prone), move them to a central place in a header file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Change the return type of the *printf() functions to the standard
"int"; no changes are needed but returning the already available
length count.
This will save a few additional strlen() calls later...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Remove some INFERNO related #ifdef's from common environment code by
fixing the board configuration settings (add CONFIG_ENV_SECT_SIZE).
While we are at it, fix comment which incorrectly talks about 4 KB
environment size, while it's actually 0x4000 = 16 KiB.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Rolf Offermanns <rof@sysgo.de>
Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_code (start.S) the
cache inhibit attribute for this TLB is set to disable cache. This is
needed for the CFI FLASH driver.
This patch now cleans this code up:
- CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not
defined in the top of this file. This way, we can remove an ugly
#ifdef in this code.
- Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..."
statement with "#if defined(CONFIG_440)".
- Remove unnecessary cache invalidate calls resulting in faster bootup.
Signed-off-by: Stefan Roese <sr@denx.de>
As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The
code for this is now factored out and executed for non-SPD based boards
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with
board specific values. The parameters of the weak default function are
corrected as well. This way we don't need the casts any more.
This feature will be used by an upcoming PPC460GT board port.
Signed-off-by: Stefan Roese <sr@denx.de>
By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's still
possible to use the U-Boot PCI infrastructure for the PCIe ports.
This configuration option is needed for a new 460GT board, which uses
PCIe but has PCI disabled.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.
Signed-off-by: Stefan Roese <sr@denx.de>
At the moment, the default SPI flash subsystem is quite terse. Errors and
successes both result in a generic message. So move the useful errors and
useful successes to printf output by default.
While we're here, also convert the messages to use print_size().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some old STMicro parts do not support JEDEC ID (0x9f). This patch
uses RES (0xab) to get Electronic ID and translates it to JEDEC ID.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
This patch adds redundant environment for environment in SPI flash.
I took env_flash.c as an example and slightly modified it. Apart
from adapting things to SF, I also slightly changed the decision
logic to use area 2 as a default in case the flags are wrong because
not having a default path worried me.
I did not add a section for CONFIG_ENV_IS_IN_SPI_FLASH in environment.h
because I did not understand if this is desired and/or needed.
So to use the feature, one has to set CONFIG_ENV_OFFSET_REDUND _and_
CONFIG_SYS_REDUNDAND_ENVIRONMENT.
I checked it by powering off my board several times during flash
erase or write, because I do not know if there are other stress
test scenarios.
Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
This avoids a build warning that you see if anyone in the
header chain has included io.h (which is coming shortly). The previous
code redefined readl/writel; this patch renames it to be specific to
ohci. The defines are also moved from ohci-hcd.c to ohci.h.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Added function to differentiate between the OMAP3EVM revisions. The
chip-id of the ethernet PHY is being used for this purpose.
Rev A to D : 0x01150000
Rev >= E : 0x92200000
CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Sandeep Paulraj <s-paulraj@ti.com>
MUSB PHY on OMAP3EVM Rev >= E uses external Vbus supply to support
500mA of power.We need to program MUSB PHY to use external Vbus
for this purpose.
Adding 'extvbus' member in musb_config structure which should be set
by all the boards where MUSB interface is using external Vbus supply.
Also added ULPI bus control register read/write abstraction for
Blackfin processor as it doesn't have ULPI registers.
CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Changed musb_config initialization for omap3.c, davinci.c
and da8xx.c using name of structure fields. This would cause
the uninitialized field to be null by default and thus would
help in avoiding to init some flags required to be set only
for a few selected platforms.
CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.
Note that according to errata from Atmel, OHCI is not operational
on the first revision of at91sam9g45 chip. So this patch enables
OHCI support for later revisions.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Add a sort of batch mode to fw_setenv, allowing to set
multiple variables in one shot, without updating the flash after
each set as now. It is added the possibility to pass
a config file with a list of pairs <variable, value> to be set,
separated by a TAB character.
Signed-off-by: Stefano Babic <sbabic@denx.de>
This patch fixes following error:
zlib.c:31:27: error: asm/unaligned.h: No such file or directory
Suggested-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andreas Biemann <biessmann@corscience.de>
When building some avr32 boards out of tree (e.g. O=..) the linker script could
not be found. This patch references the linker script in source tree.
Signed-off-by: Andreas Biemann <biessmann@corscience.de>
Due to a hardware bug mentioned in latest AP7000 datasheet errata
(revision M from 09.09) branch folding is unreliable.
This patch disables CPUCR.FE bitfield as stated in datasheet.
Signed-off-by: Andreas Biemann <biessmann@corscience.de>
AVR32 case was missing in cmd_bdinfo, resulting in compiler warning
(bd->bi_baudrate declared unsigned int at AVR32, but printf used %d)
At the same time slightly reordered #if #elif #endif to make ARM one
of the cases and not an extra case surrounding all others
Signed-off-by: Reinhard Meyer <info@emk-elektronik.de>
Tested-by: Andreas Biemann <biessmann@corscience.de>
Currently the U-Boot address ranges for AVR32 boards are
printed like this:
"U-Boot code: (null) -> 0001183c data: 000188e8 -> 0004e9b0"
This patch fixes this to print:
"U-Boot code: 00000000 -> 0001183c data: 000188f8 -> 0004e9c0"
Signed-off-by: Reinhard Meyer <info@emk-elektronik.de>
Previously, standalone applications were compiled with gcc flags that
produced relocatable executables on the PowerPC architecture (eg with
the -mrelocatable and -fPIC flags). There's no reason for these
applications to be fully relocatable at this time since no relocation
fixups are performed on standalone applications.
Additionally, removing the gcc relocation flags results in the entry
point of applications residing at the base of the image. When
a standalone application was relocatable, the entry point was generally
located at an offset into the image which was confusing and prone to
errors.
This change moves the entry point of PowerPC standalone applications
from 0x40004 (usually) to 0x40000.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
For the following hwconfig string:
key1:subkey1=value1,subkey2=value2;key2:value3
The subkey2 cannot be extracted correctly. The parsing code looks
for comma as a stopch, but there may be two kind of stop characters:
a comma and a semicolon.
Currently the code would return "value2;key2:value3", while just
"value2" is the correct answer.
This patch fixes the issue by making the code aware of multiple
stop characters.
For old U-Boots, the issue can be workarounded by placing a comma
before a semicolon, i.e.:
hwconfig=key1:subkey1=value1,subkey2=value2,;key2:value3
Reported-by: York Sun <yorksun@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
The console_buffer size is declared in common/main.c as
-- char console_buffer[CONFIG_SYS_CBSIZE + 1];
so this extern definition is wrong.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.
Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years. As nobody
seems to be interested any more in this stuff we may as well ged rid
of it, especially as it clutters many areas of the code so it is a
continuous pain for all kinds of ongoing work.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
in Procedure Call Standard for the ARM Architecture:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html
Unaligned SP also causes the problem with variable-length arrays
allocation when VLA address becomes less than stack pointer during
aligning of this address, so the next 'push' in the stack overwrites
first 4 bytes of VLA.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
The following restructuring and optimisations increase the SPI
read performance from 1.3MiB/s (on da850) to 2.87MiB/s (on da830):
Remove continual revaluation of driver state from the core of the
copy loop. State can not change during the copy loop, so it is
possible to move these evaluations to before the copy loop.
Cost is more code space as loop variants are required for each set
of possible configurations. The loops are simpler however, so the
extra is only 128bytes on da830 with CONFIG_SPI_HALF_DUPLEX
defined.
Unrolling the first copy loop iteration allows the TX buffer to be
pre-loaded reducing SPI clock starvation.
Unrolling the last copy loop iteration removes testing for the
final loop iteration every time round the loop.
Using the RX buffer empty flag as a transfer throttle allows the
assumption that it is always safe to write to the TX buffer, so
polling of TX buffer full flag can be removed.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Currently EMAC_MDIO_PHY_NUM is defined as 1 in emac_defs.h.
Because of this, EMAC does not work on EVMs which do not have phy
connected at 1. Moving the macro to board config file makes this
configurable depending on where the phy is connected on the MDIO bus.
This patch fixes the board reset issue observed during network access
on DM365EVM. EMAC driver was assuming EMAC_MDIO_PHY_NUM as 1
but it is 0 on DM365EVM.
This patch is verified on da830/omap-l137, dm365 and dm644x evms.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
For boards using sm501/sm502 on PCI bus some driver
functions normaly defined in the board code are not
needed and empty. Provide weak default functions for
them and do not enforce board code to define empty
functions.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Instead of adding explicit build rules for each and every board to the
top level Makefile (which makes it grow and grow), we now provide a
simple default rule and extend the "mkconfig" script to read board
configurations from a plain text file (table), "boards.cfg".
For simple boards it is now sufficient to add a single line of text to
the "boards.cfg" file, no changes to the top level Makefile are needed
any more.
To make the table better readable, change the notation for unused
fields from "NULL" into "-".
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Many boards don't need any special handling in the Makefile. Try and
provide as generic make rules for these as possible. There are still
many areas where this does not work out really well, but the changes
show the direction we should take, and point out which boards or
architectures need further cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Instead of stripping the "_config" part from the make target names in
each call of the "mkconfig" script let this script strip the string.
This prepares the ground for forther simplification of the top level
Makefile.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Make printing the "board names" more useful. So far, we would get
output like this;
$ ./MAKEALL P2020RDB P2020RDB_NAND P2020RDB_SDCARD P2020RDB_SPIFLASH
Configuring for P1_P2_RDB board...
text data bss dec hex filename
342612 32656 265212 640480 9c5e0 /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
text data bss dec hex filename
343160 32704 265212 641076 9c834 /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
For all build targets the same board name would be printed, which
makes is often pretty difficult to find out which exact build target
caused problems. With this commit, the real make target name gets
printed instead, which is way more useful:
$ ./MAKEALL P2020RDB P2020RDB_NAND P2020RDB_SDCARD P2020RDB_SPIFLASH
Configuring for P2020RDB board...
text data bss dec hex filename
342612 32656 265212 640480 9c5e0 /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_NAND board...
text data bss dec hex filename
343160 32704 265212 641076 9c834 /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_SDCARD board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_SPIFLASH board...
text data bss dec hex filename
341908 32620 265212 639740 9c2fc /work/wd/tmp-ppc/u-boot
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
This patch enables PXAMCI support on PXA3xx CPUs. This patch only enables MMC1
though, MMC2 and PXA31x MMC3 will need further patch to be operational.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
In case the delays were set to 10000, the MMC card on PXA27X boards (and PXA3xx
boards) didn't initialize on first try. Increasing the delays and leaving just
those for PXA25x and 26x (that is 200000) fixes this problem.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
When set to PULL_NONE, gpio_set_pull function is returned without write the register.
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The MC13892 is a Power Controller used with processors
of the family MX.51. The file adds definitions to be used to setup
the internal registers via SPI.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The RTC is part of the Freescale's PMIC controller.
Use general function to access to PMIC internal registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
The patch add supports for the Freescale's Power
Management Controller (known as Atlas) used together with i.MX31/51
processors. It was tested with a MC13783 (MX31) and
MC13892 (MX51).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fix MX51 CPU detect message.
Original string was:
CPU: Freescale i.MX51 family 3.0V at 800 MHz
which can be misinterpreted as 3.0 Volts instead of the silicon revision.
,change it to:
CPU: Freescale i.MX51 family rev3.0 at 800 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Changes reflect modifications in the fsl_esdhc driver
(the clk_enable field war removed in the configuration structure).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Currently booting Linux on TX25 board doesn't work
since there is no correct mach-id and boot parameters
setup for tx25 board. Fix it now.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
QONG is a module that can be installed on several boards,
not only on the QONG-EVB manufactured by Dave srl.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The QONG module can be downsized and delivered
with 128MB instead of 256MB. The patch adds
run time support for the two different memory
configurations.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The NAND device is connected to the FPGA of the QONG board
and not to the NFC controller. For this reason, the FPGA must
be set and initialized before accessing to the NAND itself.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Replace call to imx_get_mpllclk with imx_get_armclk
to show frequency of ARM core instead of mpll internal
bus in print_cpuinfo.
Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
moved CONFIG_CMD_FAT to filesystem section
swapped CONFIG_CMD_NAND and CONFIG_CMD_MII so they are alpha correct
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
This patch includes a few additional commands in the sheevaplug
version of u-boot:
- support for LONGHELP so you can get help messages
- auto completion and command editing
- ubi and mii support
- ext2 filesystem (convenient if you have an ext2 from which you want to boot)
- jffs2 and ubifs filesystems (if you want to use these in NAND)
This also makes it more similar to openrd client.
Side effect of this patch is that the code now needs 3 sectors i.s.o. 2
so an existing env is overwritten
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
The lowlevel_init file contained some hard-coded values
to setup the RAM. These board related values are moved into
the board configuration file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
This patch adds support for the magnesium board from
projectiondesign. This board uses i.MX27 SoC and has
8MB NOR flash, 128MB NAND flash, FEC ethernet controller
integrated into i.MX27. As this port is based on
the imx27lite port, common config options are collected
in include/configs/imx27lite-common.h
Signed-off-by: Heiko Schocher <hs@denx.de>
Because of s5pc1xx gpio is same as s5p seires SoC,
move gpio functions to drvier/gpio/
and modify structure's name from s5pc1xx_ to s5p_.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Because of s5pc1xx gpio is same as s5p seires SoC,
move gpio functions to drvier/gpio/
and modify structure's name from s5pc1xx_ to s5p_.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
ep93xx timer: Simplified the timer code by eliminating clk_to_systicks() and
performing (almost) all manipulation of the timer structure in read_timer()
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
ep93xx timer: Renamed pointers to struct timer_regs from name 'timer' to
'timer_regs' in order to avoid confusion with the global variable 'timer'
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
ep93xx timer: Make get_ticks() return a value in CONFIG_SYS_HZ resolution,
as announced by get_tbclk()
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
ep93xx timer: Use 64-bit values in usecs_to_ticks() in order to avoid
overflows in intermediate values
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.
The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
NAND Flash, DDRs.
smc.h is a common place for the register description of Memory subsystem
of S5PC100.
Note: Only SROM related registers are descibed now.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The s3c6400.h file is only for S3C64XX cpu and the pheripheral port
address(0x70000000 - 0x7fffffff) exists at only S3C64XX cpu, so they
should be included by only S3C64XX cpu.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The get_pll_clk(int) API returns the PLL frequency based on
the (int) argument which is defined locally in clock.c
Moving that #define to common header file (clk.h) would
be helpful when using the API from other files.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.
The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
NAND Flash, DDRs.
smc.h is a common place for the register description of Memory subsystem
of S5PC100.
Note: Only SROM related registers are descibed now.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The s3c6400.h file is only for S3C64XX cpu and the pheripheral port
address(0x70000000 - 0x7fffffff) exists at only S3C64XX cpu, so they
should be included by only S3C64XX cpu.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The get_pll_clk(int) API returns the PLL frequency based on
the (int) argument which is defined locally in clock.c
Moving that #define to common header file (clk.h) would
be helpful when using the API from other files.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
printf goes to uart1, but it will block forever waiting for
busy to go off unless the uart is enabled first.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Previous code compiled with gcc-4.2.2 makes a call to
__aeabi_uidiv to divide by 20. As a side effect it was
not inline any more, and so sdram_cfg used the stack
as well, but this is early code that has no stack yet.
The patch explicitly removes the division, so no stack is used.
The calculation of the counter calls a division by 20
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
The structure was missing a reserved entry (not listed in the manual,
actually), so the last registers had a wrong offset. This prevented
all swlocked registers to be modified as swlock is last in the structure.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Added support for the following EDB93xx boards:
EDB9301
EDB9302
EDB9302A
EDB9307
EDB9307A
EDB93012
EDB9315
EDB9315A
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
This patch makes the crcit utility more readable
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch removes "CONFIG_CMD_JFFS" from the board config
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Every omap3 board config file declared the global variable gpmc_cfg.
This changes moves the declaration to a better location in the
arch dependent header file cpu.h.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Use appropriate GPMC timings for the LAN9221 controller on the
Gumstix Overo expansion boards not the values in arch-omap3/mem.h
which are for a different ethernet controller.
Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Tidyup the pin muxer configuration using the Davinci table driven
pinmux configuration function and data tables.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This adds a driver for the SPI controller found on davinci
based SoCs from Texas Instruments.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for esd gmbh OTC570 board.
The OTC570 is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
SPEAr320 SoC support contains basic spear320 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr310 SoC support contains basic spear310 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface
Paraller NOR flashes. This patch adds the support for this IP
The standard CFI driver is used to interface with NOR flashes
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr300 SoC support contains basic spear300 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
Signed-off-by: Vipin <vipin.kumar@st.com>
This patch adds the support to read and write mac id from i2c
memory.
For reading:
if (env contains ethaddr)
pick env ethaddr
else
pick ethaddr from i2c memory
For writing:
chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id
in i2c memory
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr600 SoC support contains basic spear600 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr SoCs contain a synopsys usb device controller.
USB Device IP can work in 2 modes
- DMA mode
- Slave mode
The driver adds support only for slave mode operation of usb
device IP. This driver is used along with standard USBTTY
driver to obtain a tty interface over USB on the host
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr Architecture support added. It contains the support for
following SPEAr blocks
- Timer
- System controller
- Misc registers
Signed-off-by: Vipin <vipin.kumar@st.com>
As per coding guidlines, it is good to maintain proper ordering
in the makefiles.
This was missed during initial coding, corrected here.
This was discovered during orion5x code review
Thanks to Albert Aribaud for this.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
These are few files directly imported from Linux kernel source.
Those are not modifyed at all ar per strategy.
These files contains source with GPLv2 only
whereas u-boot expects GPLv2 or latter
These files are updated for the same from prior permission from original writes
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.
l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.
l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Fix stack_setup to place the stack on the correct address in DRAM
accroding to U-Boot standard and remove conditional compilation by
CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
was introduced and used only by this board for some unclear reason.
The definition of this macro is also removed because it's not
referenced elsewhere.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
Because of Frame error, Parity error and Overrun error are occured only receive
operation, need to masking when error checking.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cleans up the s3c24x0 header files:
s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
accessed using the IO accessor functions which cast the register address
as 'volatile' anyway so it isn't required here.
s3c2400.h and s3c2410.h: insert a blank line between the static inline
functions
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.
checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:
ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.
The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8 S3C24X0_REG8;
+typedef volatile u16 S3C24X0_REG16;
+typedef volatile u32 S3C24X0_REG32;
I'll fix these errors in another patch.
Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4, 2/4 and 3/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 header files in preparation for
changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patch 1/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no
new warnings or errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
too short.
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
have any s3c2400 or s3c2410 boards but need this patch applying before I can
submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets
and no new warnings or errors were found.
It was originally submitted on 21/06/2009 but didn't get into the 2009.08
release, and Jean-Pierre made one comment on the original patch (see
http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two
changes to the original patch:
- it's been re-based to the current release
- I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment
This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it
directly to the maintainers of all except the sbc2410 which doesn't have an
entry in MAINTAINERS.
Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain>
Tested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch includes the serial driver for s5pc1xx.
s5pc1xx uart driver needs own register setting and clock configuration.
So, need to special driver.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
This patch implements several updates:
-disable CONFIG_ENV_OVERWRITE
-add new hardware style variants and set the arch numbers appropriate
-pass the serial# and hardware revision to the kernel
-removed unused macros from include/configs/meesc.h
-fixed multiline comment style
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.
This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Refactor the smc911x driver to allow for detecting when the chip is missing.
I.e. the detect_chip() function is called earlier and will abort gracefully
when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This changes fixes an early i2c error.
It appears that I2C is working because once a read or write
error is detected, the omap24xx_i2c driver calls i2c_init
inside its error handling check.
While it is ok to attempt error handling this way, the boards
must not depend on this side effect to initialize it's i2c.
Instead of explicitly calling i2c_init for every board, use
the generic arm initialization in lib_arm/board.c. By defining
the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
is included in the init_sequence table.
Run tested on Beagle.
Compile tested on the omap3's
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on mv88f6281gtw_ge board.
To create Kirkwood boot image to be flashed on SPI Flash,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on rd6281a platform.
To create Kirkwood boot image to be flashed on NAND,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
Signed-off-by: Heiko Schocher <hs@denx.de>
- As these boards are similiar, collect common config options
in manroland/common.h and manroland/mpc52xx-common.h
for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment
Signed-off-by: Heiko Schocher <hs@denx.de>
Minor edit of commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 002741ae86 modified include/asm-ppc/mmu.h such that the LAWAR_
defines were only enabled for the 83xx platform, but they are also
needed on MPC512x system. Enabling these for E300 systems seems thus
more appropriate.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>
Minor cleanup:
Re-ordered default_mddrc_config[] to have matching indices.
This allows to use the same index "N" for source and target fields;
before, we had code like this
out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);
which always looked like a copy & paste error because 2 != 3.
Also, use NULL when meaning a null pointer.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks. We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms
the core not longer controls the enabling of the timebase. We now need
to enable the boot core's timebase via CCSR register writes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The CoreNet platform style of bringing secondary cores out of reset is
a bit different that the PQ3 style. Mostly the registers that we use
to setup boot translation, enable time bases, and boot release the cores
have moved around.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address. Also, the target IDs
on CoreNet platforms have been completely re-assigned.
Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet style boot release code since it will need
to determine what the target ID should be set to for boot window
translation.
Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
it elsewhere.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform. We reuse the 85xx immap and just add new definitions for
local access and global utils. The global utils is now broken into
global utils, clocking and run control/power management.
The offsets from CCSR for a number of blocks have also changed. We
introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
platform from the new p4080 platform. We don't use QoirQ as there are
products (like p2020) that are PQ3 based platforms but have the QoirQ
name.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The code assumed names where just numbers and always prefixed 'mpc'.
However newer QorIQ don't follow the mpc naming scheme.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When boot from NAND, the NAND flash must be connected to br/or0.
Also init RAM(L2 SRAM or DDR SDRAM) for load the second image to
it.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The first stage 4K image uses a seperate ld script file to
generate 4K image. This patch moves it to the cpu/mpc85xx/*
to make it avaliable for 85xx platform.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Using the common 86xx fdt fixups removes some board-specific code and
should make the mpc8610hpcd easier to maintain in the long run.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the boards config header. This takes advantage of
that for the sbc8540/sbc8560 boards.
There were a couple of cheezy comments pointing at incorrect
files, or files that don't exist, so I've cleaned those up too.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, and if you had 33MHz PCI, you
had to manually change CONFIG_SYS_NS16550_CLK too, which was
not real user friendly,
This adds the typical PCI and clock speed make targets to the
toplevel Makefile in accordance with what is being done with
other boards (i.e. using the "-t" to mkconfig).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PCI/PCI-e support for the sbc8548 was based on an earlier
version of what the MPC8548CDS board was using, and in its
current state it won't even compile. This re-syncs it to match
the latest codebase and makes use of the new shared PCI functions
to reduce board duplication.
It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O
back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and
similarly it coalesces the PCI and PCI-e mem into one single TLB.
Both PCI-x and PCI-e have been tested with intel e1000 cards
under linux (with an accompanying dts change in place)
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Recycle the recently added PCI-e wrapper used to reduce board
duplication of code by creating a similar version for plain PCI.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The size of the LB SDRAM on this board is 128MB, spanning CS3
and CS4. It was previously only being configured for 64MB on
CS3, since that was what the original codebase of the MPC8548CDS
had. In addition to setting up BR4/OR4, this also adds the TLB
entry for the second half of the SDRAM.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Sweep throught the board specific file and replace the various
register proddings with the equivalent I/O accessors.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
With only eTSEC1 and 2 being brought out to RJ-45 connectors, we
aren't interested in the eTSEC3/4 voltage hack on this board
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The sbc8548 has a 64MB SODIMM flash module off of CS6 that
previously wasn't enumerated by u-boot. There were already
BR6/OR6 settings for it [used by cpu_init_f()] but there
was no TLB entry and it wasn't in the list of flash banks
reported to u-boot.
The location of the 64MB flash is "pulled back" 8MB from
a 64MB boundary, in order to allow address space for the
8MB boot flash that is at the end of 32 bit address space.
This means creating two 4MB TLB entries for the 8MB chunk,
and then expanding the original boot flash entry to 64MB
in order to cover the 8MB boot flash and the remainder
(56MB) of the user flash.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix the extra long lines to be consistent with u-boot coding style.
No functional change here.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The get_clock_freq() comes from freescale/common/cadmus.c and is
only valid for the CDS based 85xx reference platforms. It would
be nice if we could read the 33 vs. 66MHz status somehow, but in
the meantime, tie it to CONFIG_SYS_CLK_FREQ like all the other
non-CDS boards do.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are a couple defines and PCI bridge quirks related to the PCI
backplane of the MPC8548CDS that have no meaning in the context of
the port to the sbc8548 board, so delete them.
Also, the form factor of the sbc8548 is a standalone board with a
single PCI-X and a single PCI-e slot. That pretty much guarantees
that it will never be a PCI agent itself, so the host/agent and root
complex/end node distinctions have been removed.
Similarly, since there is no physical connector mapping to PCI2, so
all references of PCI2 in the board support files have been removed
as well.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Create a board_eth_init to allow a place to hook in
the PCI ethernet init after all the eTSEC are up
and configured.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010
where max DDR data width supported is 64bit.
As a next step the DDR data width initialization would be made more dynamic
with more flexibility from the board perspective and user choice.
Going forward we would also remove the hardcodings for platforms with onboard
memories and try to use the FSL SPD code for DDR initialization.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The previous README.sbc8548 was pretty much content-free. Replace
it with something that actually gives the end user some relevant
hardware details, and also lists the u-boot configuration choices.
Also in the cosmetic department, fix the bogus line in the Makefile
that was carried over from the SBC8560 Makefile, and the typo in
the sbc8548.c copyright.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h. Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.
All 83xx and early (e500v1) PQ3 devices support:
clk/2: CLKDIV = 2
clk/4: CLKDIV = 4
clk/8: CLKDIV = 8
Newer PQ3 (e500v2) and MPC86xx support:
clk/4: CLKDIV = 2
clk/8: CLKDIV = 4
clk/16: CLKDIV = 8
Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
This change adds some basic summary information to the MAKEALL script.
The summary information includes how many boards were compiled, how many
boards had compile warnings or errors, and which specific boards had
compile warnings or errors.
This information is useful when doing compile testing to quickly
determine which boards are broken.
As a side benefit, no empty $BOARD.ERR files are generated by MAKEALL.
Previously, each board had a corresponding $BOARD.ERR file, even if the
board compiled cleanly.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add version environment variable configuration to the galaxy5200
board header file.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is needed to correctly start the charging of an attached capacitor
or battery.
Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch adds support for resolving symlinks to directories as well as
relative symlinks. Symlinks are now always resolved during file lookup,
so the load stage no longer needs to special-case them.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.
Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The more standard 'source' command provides identical functionality to
the autoscr command.
Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.
The 'autoscript' and 'autoscript_uname' environment variables are
also removed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The DaVinci DM365 EVM board specific code was including a header file
which does not exist. So removing this header file.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Fix warning: flash.c:531: warning: dereferencing type-punned pointer
will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kri Davsson <kd@flaga.is>
Commits
02f99901ed52d61227b6
introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
All 4xx variants had their own, mostly identical get_OPB_freq()
function. Some variants even only had the OPB frequency calculated
in this routine and not supplied the sys_info.freqOPB variable
correctly (e.g. 405EZ). This resulted in incorrect OPB values passed
via the FDT to Linux.
This patch now removes all those copies and only uses one function
for all 4xx variants (except for IOP480 which doesn't have an OPB).
Signed-off-by: Stefan Roese <sr@denx.de>
Acadia still used the "old" arch/ppc bootm commands for booting
Linux images without FDT. This patch now enables these fdt-aware
boot commands for Acadia as well.
Signed-off-by: Stefan Roese <sr@denx.de>
We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
since we have changed the exception vectors and the OSes vectors might
not be setup we should avoid async interrupts at all costs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use write_tlb and don't use memset so we can use the same code for
cpu_init_early_f between NAND SPL and not.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
which lets us use the SPD to initialize the SDRAM.
For all three bootup methods, the bootup process can be divided into two
stages: the first stage will initialize the corresponding controller,
configure the L2SRAM, then copy the second stage image to L2SRAM and
jump to it. The second stage image is just like the general U-Boot image
to configure all the hardware and boot up to U-Boot command line.
When boot from NAND, the eLBC controller will first load the first stage
image to internal 4K RAM buffer because it's also stored on the NAND
flash. The first stage image, also call 4K NAND loader, will initialize
the L2SRAM, load the second stage image to L2SRAM and jump to it. The 4K
NAND loader's code comes from the corresponding nand_spl directory, along
with the code twisted by CONFIG_NAND_SPL.
When boot from eSDHC/eSPI, there's no such a first stage image because
the CPU ROM code does the same work. It will initialize the L2SRAM
according to the config addr/word pairs on the fixed address and
initialize the eSDHC/eSPI controller, then load the second stage image
to L2SRAM and jump to it.
The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the
second stage image for all different bootup methods. It's set in the
board config file when one of the bootup methods above is selected.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If we move some of the functions in tlb.c around we need less
ifdefs. The first stage loader just needs invalidate_tlb and
init_tlbs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We can pack the initial tlb_table in MAS register format and use
write_tlb to set things up. This savings can be helpful for NAND
style first stage boot loaders.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Factor out the code we use to actually write a tlb entry.
set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Skipping the interrupted instruction will accomplish nothing other
than turning a spurious interrupt into a crash.
External interrupts are not machine checks, so don't count them as such.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Its reset value is random, and we sometimes read uninitialized TLB
arrays. Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.
Signed-off-by: Scott Wood <scottwood@freescale.com>
We cannot handle any exceptions while running in AS1, as the exceptions
will transition back to AS0 without a valid mapping.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
configs for the common mpc8260 code to use generic Ethernet fixup.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
The standard netcat, while ubiquitous, doesn't handle broadcast udp packets
properly. The local ncb util does however. So if ncb can be located in
the standard locations, automatically use that instead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The netcat utility likes to exit when it receives an empty packet (as it
thinks this means EOF). This can easily occur when working with command
line editing as this behavior will be triggered when using backspace. Or
with tabs and command line completion. So create two netcat processes -
one to only listen (and put it into a loop), and one to do the sending.
Once the user quits the transmitting netcat, the listening one will be
killed automatically.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
UBIFS requires fls(), which is not defined for arm (and some other
architectures) and this patch adds it. The implementation is taken from
Linux and is generic. ffs() is also defined for those that miss it.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Bring over the bitop implementations from the Linux
include/asm-generic/bitops/non-atomic.h to provide
endianness-independence.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Clean up the arch/cpu/board/config checks as well as redundant setting of
srec/bin variables by using the kbuild VAR-$(...) style.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
To simplify the top level makefile it useful to be able to parse
the top level makefile target to multiple individual target, then
put them to the config.h, leave the board config file to handle
the different targets.
Note that this method uses the '_'(underline) as the delimiter when
splits the board make target.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
This also reverts commit 511c02f611.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 51003b89 attempted to fix a build problem on 64 bit systems,
but just turned it into a build problem on 32 bit systems (silly me).
Now do the Right Thing (TM) and use a "%zu" printf format.
Also fix spelling error.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Fix warning: ../common/flash.c:917: warning: dereferencing type-punned
pointer will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Fix warning: flash.c:919: warning: dereferencing type-punned pointer
will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Fix warnings:
flash.c: In function 'write_word_1':
flash.c:696: warning: dereferencing type-punned pointer will break strict-aliasing rules
flash.c: In function 'write_word_2':
flash.c:1044: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Fix build problem caused by commit e84aba13: "Replace BCD2BIN and
BIN2BCD macros with inline functions"
phantom.c:163: error: redefinition of 'bcd2bin'
/home/wd/git/u-boot/work/include/bcd.h:16: error: previous definition of 'bcd2bin' was here
phantom.c:168: error: redefinition of 'bin2bcd'
/home/wd/git/u-boot/work/include/bcd.h:21: error: previous definition of 'bin2bcd' was here
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sangmoon Kim <dogoil@etinsys.com>
Fix warning: ../common/flash.c:668: warning: dereferencing type-punned
pointer will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andrea Marson <andrea.marson@dave-tech.it>
Fix warning: natsemi.c:757: warning: dereferencing type-punned pointer
will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:
- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines
Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix warning: bootp.c:695: warning: dereferencing type-punned pointer
will break strict-aliasing rules
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Fix this warning when building on 64 bit systems:
tools/kwbimage.c: In function 'kwbimage_checksum32':
tools/kwbimage.c:135: warning: format '%d' expects type 'int',
but argument 4 has type 'long unsigned int'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
This patch adds support for "kwbimage" (Kirkwood Boot Image)
image types to the mkimage code.
For details refer to docs/README.kwbimage
This patch is tested with Sheevaplug board
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron@debian.org>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
- make get_table_entry_id() global
- make get_table_entry_name() global
- move struct table_entry to image.h
Currently this code is used by image.c only.
This patch makes this API global so it can be used by other parts of
code, too.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron.debian.org>
Edit comments and commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Currently it is used by image.c only, but the the function can be
used to support additional mkimage types like for example kwbimage,
so make this function globally visible.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Include default_image.o and fit_image.o into the build dependency
calculations. This makes sure they get rebuilt if any of the headers
they include are modified
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron@debian.org>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This fixes some compiler warnings:
tools/default_image.c:141: warning: initialization from incompatible pointer type
tools/fit_image.c:202: warning: initialization from incompatible pointer type
and changes to code to use "const" attributes in a few places where
it's appropriate.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is a first step towards reorganizing the mkimage code to make it
easier to add support for additional images types. Current mkimage
code is specific to generating uImage and FIT image files, but the
same framework can be used to generate other image types like
Kirkwood boot images (kwbimage-TBD). For this, the mkimage code gets
reworked:
Here is the brief plan for the same:-
a) Split mkimage code into core and image specific support
b) Implement callback functions for image specific code
c) Move image type specific code to respective C files
Currently there are two types of file generation/list
supported (i.e uImage, FIT), the code is abstracted from
mkimage.c/.h and put in default_image.c and fit_image.c;
all code in these file is static except init function call
d) mkimage_register API is added to add new image type support
All above is addressed in this patch
e) Add kwbimage type support to this new framework (TBD)
This will be implemented in a following commit.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Edit commit message, fix coding style and typos.
Signed-off-by: Wolfgang Denk <wd@denx.de>
uninitialized retval variable warning fixed
crc32 APIs moved to crc.h (newly added) and build warnings fixed
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
List command always return "EXIT_SUCCESS" even in case of
failure by any means.
This patch return 0 if list command is sucessful,
returns negative value reported by check_header functions
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Then we can handle different config targets in the board file, which
simplifies the top level Makefile for boards that have multiple
config targets.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Commit 65f6f07b added support for the atmel_df_pow2 standalone program
but missed to add a rule to remove it to the "clean" make target.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch fixes the following compilation warning:
miiphy.c: In function 'emac4xx_miiphy_read':
miiphy.c:353: warning: dereferencing type-punned pointer will break
strict-aliasing rules
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the CONFIG_PCI_4xx_PTM_OVERWRITE option and replaces
the ugly 'if defined(BOARD1) || ... || defined(BOARDn)' construct
in 4xx pci code.
When CONFIG_PCI_4xx_PTM_OVERWRITE is defined the default ptm register
setup can be overwritten through environment variables ptm1la, ptm1ms,
ptm2la and ptm2ms to do application specific pci target BAR configuration.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes PMC405DE support. Patch 85d6bf0b fixed out-of-tree
building for this board but the loadpci object did not get linked
after that.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Using a separate "u-boot" environment variable allows to easily
specify different filenames for the update procedure. This is also in
line with many other board configurations defining an "update" script.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Some board ports place TEXT_BASE at a location that would cause the
RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link. By default
we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't
explicitly set it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
There is no reason to do a run time check for e500 v1 based cores to
determine if we have the GUTs RSTCR facility. Only the first generation
of PQ3 parts (MPC8540/41/55/60) do not have it. So checking to see if
we are e500 v2 would miss future parts (like e500mc).
Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fixing the number of cores in the device tree based on the actual number of
cores on the system. With this same device tree image can be used for dual
core and single core members of otherwise exactly same SOC.
For example:
* P2020RDB and P2010RDB
* P1020RDB and P1011RDB
* MPC8641D and MPC8641
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Incase the system is detected with Unknown SVR, let the system boot
with a default value and a proper message.
Now with dynamic detection of SOC properties from SVR, this is necessary
to prevent a crash.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.
Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases
we have like PCI, CPM2, QE. Also reworked it to use one line per file
for everything and sorted in alphabetical order.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
After programming a new LAW, we should read-back the LAWAR register so that
we sync the writes. Otherwise, code that attempts to use the new LAW-mapped
memory might fail right away.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Its possible that we try and copy the boot page code out of flash into a
DDR location that doesn't have a TLB cover it. For example, if we have
3G of DDR we typically only map the first 2G. In the cases of 4G+ this
wasn't an issue since the reset page TLB mapping covered the last page
of memory which we wanted to copy to.
We now change the physical address of the reset page TLB to map to the
true physical location of the boot page code, copy and than set the
TLB back to its 1:1 mapping of the reset page.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Allow us to search the TLB array based on an address. This is useful
if we want to change an entry but dont know where it happens to be
located.
For example, the boot page mapping we use on MP or the flash TLB that
we change the WIMGE settings for after we've relocated.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In future Book-E implementations IVORs will most likely go away and be
replaced with fixed offsets. The IVPR will continue to exist to allow
for relocation of the interrupt vectors.
This code adds support to setup the IVORs as their fixed offset values
per the ISA 2.06 spec when we transition from u-boot to another OS
either via 'bootm' or a cpu release.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
platform define. This will enable all the 85xx platforms to use sdhc_clk
based on CONFIG_FSL_ESDHC.
Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The value of I2C_TIMEOUT in fsl_i2c.c has several problems. First, it is
defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
no sense to derive it from a clock rate. Second, the current value (250) is
too low for some boards, so it needs to be increased. Third, the timeout
necessary for multiple-master arbitration is larger than the timeout for basic
read/write operations, so we shouldn't have a single constant for both timeouts.
Finally, it would be nice if we could override these values on a per-board
basis.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Reset any i2c devices that may have been interrupted during a system reset.
Normally this would be accomplished by clocking the line until SCL and SDA
are released and then sending a start condtiion (From an Atmel datasheet).
There is no direct access to the i2c pins so instead create start commands
through the i2c interface. Send a start command then delay for the SDA Hold
time, repeat this by disabling/enabling the bus a total of 9 times.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in
the standalone Makefile, push the setting up of LOAD_ADDR out to the arch
config.mk (and rename to STANDALONE_LOAD_ADDR in the process). This keeps
the common code clean and lets the arch do whatever crazy crap it wants in
its own area.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Removed stdio.h inclusion and moved trace macros to use printf avoiding to
write debug informations to standard error.
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Some files included my old standerd file header which had a "All
Rights Reserved" part. As this has never been my intention, I remove
these lines to make the files compatible with GPL v.2 and later.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Fix warning messages:
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 6 has type 'u32'
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 7 has type 'u32'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Added a arch_preboot_os() function that cpu specific code can implement to
allow for various modifications to the state of the machine right before
we boot. This can be useful to setup register state to a specific
configuration.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Now that the PCI, SATA et al compile problems have been resolved, the
cludge that was applied to avoid them can be removed
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Primary intent is to resolve build errors for this board which has been
neglected for a very long time. I do not have one of these boards, so I
cannot test functionality
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
on 18th May 2008 as part of a general i386 / sc520 fixup which was never
applied
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Removed do_pinit() - now declared in cmd_pcmcia.c
Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other
PCMCIA drivers
signed/unsigned type fixups
Added semi-colon after default: label as required by newer gcc
The only board that appears to use this driver is the sc520_spunk which
is very old and very likely very broken anyway. I do not have one to test
whether this patch breaks anything functionaly, I have can only check
that it compiles without warning or error
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Cast first parameter to sata_cpy()
In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(),
ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in
include/libata.h which is included in ata.h which is included by all files
which include ata_piix.h (only ata_piix.c) so these definitions are
supurflous to (and conlict with) this in libata.h. Interestingly, my
compiler complains about ata_id_u64 already being defined, but not
ata_id_u32
ata_dump_id() is defined in include/libata.h and should not be static
(maybe should even use ata_dump_id() in libata.c
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in
commit ff4e66e93c, regressed by commit 6d7f610b09)
Cast PCI_ROM_ADDRESS_MASK to u32
Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO
Change call to pci_find_class() to pci_find_devices(). This is based on a
patch submitted on 1st March 2007 (Patch that fixes the compilation errors
for sc520_cdp board) by mushtaq_k
This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
specified in the board config file. Dummy values have been added for the
SC520 CDP board to enable compilation, but since I do not have one of these,
I do know what the values should be
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
The current implementation has the timer being started before the interrupt
handler is installed. It the interrupt occurs before the handler is
installed, the timer interrupt is never reset and the timer stops
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
The current configuration of the Environment has the redundant copy of the
environment in the Boot Flash - This was never the intent. The Environment
should instead be in the first two sectors of the first Strata Flash
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why)
Remove use of global names for labels to prevent 'symbol already defined'
errors
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This lays the groundwork to allow architectures to share a common
mem_malloc_init().
Note that the x86 implementation was not modified as it did not fit the
mold of all other architectures.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Atmel DataFlashes by default operate with pages that are slightly bigger
than normal binary sizes (i.e. many are 1056 byte pages rather than 1024
bytes). However, they also have a "power of 2" mode where the pages show
up with the normal binary size. The latter mode is required in order to
boot with a Blackfin processor, so many people wish to convert their
DataFlashes on their development systems to this mode. This standalone
application does just that.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the NAND code now uses 64bit code, make sure we enable support for
ADI Blackfin boards in printf to avoid the warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the memory layout pushes the stack out of the default DCPLB coverage,
the exception handler may trigger a double fault by trying to push onto
the uncovered stack. So handle the exception stack similar to the kernel
by using the top of the scratch pad SRAM.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The default console size indirectly applies to length of env vars, so a
smaller length makes it hard to pass longer command lines to kernels.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CM-BF537U is similar to the CM-BF537E module, but enough to need its
own board port.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the Blackfin ABI favors higher scratch registers by default, use the
last scratch register (P3) for global data rather than the first (P5).
This allows the compiler's register allocator to use higher number scratch
P registers, which in turn better matches the Blackfin instruction set,
which reduces the size of U-Boot by more than 1024 bytes...
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add dns and ntp to default networking commands, and ask for more dhcp
options to better configure the network environment.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-09-15 10:33:07 -05:00
1197 changed files with 37523 additions and 124841 deletions
* This macro configures clock on PXA2xx/PXA3xx CPU
*
* Clobbered regs: r4, r5
*/
.macropxa_clock_setup
/* Disable the peripheral clocks, and set the core clock frequency */
/* Turn Off ALL on-chip peripheral clocks for re-configuration */
write32CKEN,CONFIG_SYS_CKEN
/* Write CCCR */
write32CCCR,CONFIG_SYS_CCCR
#ifdef CONFIG_RTC
/* enable the 32Khz oscillator for RTC and PowerManager */
write32OSCC,#OSCC_OON
ldrr4,=OSCC
/* Spin here until OSCC.OOK get set, meaning the PLL has settled. */
2:
ldrr5,[r4]
andsr5,r5,#1
beq2b
#endif
.endm
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_PXA_MACRO_H__ */
Some files were not shown because too many files have changed in this diff
Show More
Reference in New Issue
Block a user
Blocking a user prevents them from interacting with repositories, such as opening or commenting on pull requests or issues. Learn more about blocking a user.
