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719 Commits

Author SHA1 Message Date
bc196029f5 Prepare v2011.09-rc2
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-22 21:58:05 +02:00
4e368b5d90 Minor Coding Style Cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-22 21:57:35 +02:00
6478021f12 km/common: fix bug in IVM mac address access
The MAC address stored in the inventory eeprom begins at offset 1.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
2011-09-21 23:38:41 +02:00
3f96ee3347 sf: fix debug format string warning
On some systems, we get a warning when %lu is used with size_t's, so
use the correct format string.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-21 23:05:15 +02:00
ff25d32c25 net: turn name len check into an assert
The new sanity check introduces a printf warning for some systems:
	eth.c:233: warning: format '%zu' expects type 'size_t', but argument 3 has type 'int'

Rather than tweak the format string, use the new assert() helper instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-21 23:04:34 +02:00
fc77086cf2 ignore soc asm-offsets.s
Recent commit a4814a69d3 cleaned up generation of
asm-offsets.s for SoC dirs, but missed adding it to the ignore
list which makes it show up in `git status`.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-21 23:02:46 +02:00
fc3d29761e Drop bogus BOOTFLAG_* definitions
There is no code anywhere that references BOOTFLAG_* so remove these
defines.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
2011-09-20 13:18:07 +02:00
7aabad2804 net/bootp.c: fix tftp load if autoload environment var isn't set
Commit 093498669 (Put common autoload code into auto_load() function)
broke handling of autoload environment variable not being set.
The bootp/dhcp code will just keep on requesting IP address forever
and never start TFTP download.

Fix it by moving TftpStart() outside the conditional like it was before.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
2011-09-19 23:25:08 +02:00
226502e01b ppc4xx: Flush dcache after DDR2 autocalibration with caches on
Flush the dcache before removing the TLB with caches enabled.
Otherwise this might lead to problems later on, e.g. while booting
Linux (as seen on ICON-440SPe).

Signed-off-by: Stefan Roese <sr@denx.de>
2011-09-19 11:51:21 +02:00
25fb02abdf Fix incorrect array size of phy settings for 405EX
Change bd_t->bi_phy* arrays from 1 to 2 for PPC405EX since
405EX has 2 ethernet interfaces.

Signed-off-by: Bernhard Weirich <bernhard.weirich@riedel.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-09-19 11:51:21 +02:00
56fa45d581 DA830: Fix Build Warning
This commit fixes a build warning in the DA830 EVM build

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 22:24:24 +02:00
2d3be7c456 led: remove camel casing of led identifiers globally
Result of running the following command to address Wolfgang's
comment about camel case:

for file in `find . | grep '\.[chS]$'`; do perl -i -pe
's/(green|yellow|red|blue)_LED_(on|off)/$1_led_$2/g' $file; done

Discussion:
http://patchwork.ozlabs.org/patch/84988/

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:30:52 +02:00
43de24fdc7 omap4: fix pad configuration settings for SDP and Panda
omap4: fix pad configuration settings for SDP and Panda

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sebastien Jan <s-jan@ti.com>
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:16 +02:00
4ecfcfaa9e omap4: IO settings
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:16 +02:00
025bc4254b omap4: make SDRAM init work for ES1.0 silicon
SDRAM init was not working on ES1.0 due to a programming
error. A pointer that was passed by value to a function
was set in function emif_get_device_details(), but the effect
wouldn't be seen in the calling function. The issue came
out while testing for ES1.0 because ES1.0 doesn't have any
SDRAM chips connected to CS1

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
16dc702f24 omap4: factor out common part from board config headers
Factor out common parts from omap4_sdp4430.h and omap4_panda.h
into a new file omap4_common.h

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
84c3b63129 omap: gpio: Adapt board files to use generic API
This patch contains updates the sources in the board files
to use the generic API.

Signed-off-by: Sanjeev Premi <premi@ti.com>
2011-09-13 08:25:15 +02:00
3b690ebbbf omap: gpio: generic changes after changing API
This patch contains the generic changes required after
change to generic API in the previous patch.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
81bdc155c7 omap: gpio: Use generic API
Convert all OMAP specific functions to use the common API
definitions in include/asm/gpio.h. In the process, made
few additional changes:
 - Use -EINVAL consistently. -1 was used in many places.
 - Removed one-liner static functions that were used only
   once. Replaced the content as necessary.
 - Combines implementation of functions omap_get_gpio_dataout()
   and omap_get_gpio_datain(). To do so, new static function
   _get_gpio_direction() was added.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
205c065890 OMAP3 Beagle: Minor config cleanup
This patch removes a hardcoded MAC address

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
11a6fb7974 da830: modify the MEMTEST start and end address
Modify the MEMTEST start and end address. The memtest range was overlapping the
CONFIG_SYS_LOAD_ADDR which causes the uImage to be corrupt.Also, modify the
size for which mtest is run to 32MB from 16MB.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
516420aa93 da830: enable SPI flash boot mode
Enable SPI flash boot mode in configuration file as default.
With the introduction of 456MHz part, SPI operating frequency
will increase and at this frequency SPI does not work correctly.
Hence reduce the default SPI speed to 30MHz from 50MHz.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
c0eee7778a da830: modify the U-Boot prompt string
Modify U-boot promt string from 'DA830-evm >' to 'U-Boot >' as
there are many variants of da830 based boards which have diffrent
names such as L137, AM1707 etc.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
32b58ce736 ARMV7: OMAP3: Add 37xx ESx revision numbers.
OMAP3: Add 37xx ESx revision numbers.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
89677b27d3 ARMV7: OMAP: I2C driver: cosmetic: make checkpatch-compatible
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
0607e2b97a ARMV7: OMAP: Write more than 1 byte at a time in i2c_write
This allows the EEPROM layer to send a single i2c write command
per page, and wait CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS between
i2c write commands.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
569919d8e2 OMAP: Add function to get state of a GPIO output
Read directly from OMAP_GPIO_DATAOUT to get the output state of the GPIO pin

Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
043cfcfb7e MX25: tx25: Cleanup tx25.h config
Cleanup tx25.h by removing unnecessary defines and by removing unneeded "1"'s.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-12 17:40:48 +02:00
c2205f4db0 MX25: tx25: Fix build by making use of GPIO framework
Make use of GPIO framework and avoid the following build error:

tx25.c: In function 'tx25_fec_init':
tx25.c:73: error: dereferencing pointer to incomplete type
tx25.c:74: error: dereferencing pointer to incomplete type
tx25.c:75: error: dereferencing pointer to incomplete type
tx25.c:76: error: dereferencing pointer to incomplete type
tx25.c:83: error: dereferencing pointer to incomplete type
tx25.c:84: error: dereferencing pointer to incomplete type
tx25.c:114: error: dereferencing pointer to incomplete type
tx25.c:115: error: dereferencing pointer to incomplete type
tx25.c:116: error: dereferencing pointer to incomplete type
tx25.c:117: error: dereferencing pointer to incomplete type
tx25.c:124: error: dereferencing pointer to incomplete type
tx25.c:125: error: dereferencing pointer to incomplete type
tx25.c:126: error: dereferencing pointer to incomplete type

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-09-12 17:40:47 +02:00
8c4e0ca69e omap3: beagle: Fix build warning
This patch fixes the warning dure to recent changes to the board
configuration:
cmd_i2c.o cmd_i2c.c -c
cmd_i2c.c:109:1: warning: missing braces around initializer
cmd_i2c.c:109:1: warning: (near initialization for 'i2c_no_probes[0]')

Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Jason Kridner <jkridner@beagleboard.org>
Acked-by: Jason Kridner <jdk@ti.com>
2011-09-12 17:40:47 +02:00
6ceb0135f9 Prepare v2011.09
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-11 21:31:04 +02:00
04e5ae7931 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-11 21:24:09 +02:00
3b71755249 ARM: hawkboard: fix compilation of nand_spl
Fix build problem:

nand_spl/board/davinci/da8xxevm/hawkboard_nand_spl.c: In function 'board_init_f':
nand_spl/board/davinci/da8xxevm/hawkboard_nand_spl.c:132: warning: implicit declaration of function 'nand_boot'
nand_spl/board/davinci/da8xxevm/hawkboard_nand_spl.c:133: warning: 'noreturn' function does return

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-09-10 22:27:24 +02:00
bd6ce9d171 cm4008, cm41xx: fix build warnings
Fix these:
cm4008.c: In function 'board_eth_init':
cm4008.c:79: warning: implicit declaration of function 'ks8695_eth_initialize'

cm41xx.c: In function 'board_eth_init':
cm41xx.c:79: warning: implicit declaration of function 'ks8695_eth_initialize'

While we are at it, sort include list in netdev.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 17:00:51 +02:00
3aa7782ac4 tegra2: fix warning: "assert" redefined
Commit 21726a7 "Add assert() for debug assertions" caused build
warnings for all tegra2 based boards:

clock.c:36:1: warning: "assert" redefined
In file included from clock.c:29:
include/common.h:144:1: warning: this is the location of the previous definition

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
2011-09-10 16:17:25 +02:00
5fb5e8c5e7 ARM: hawkboard_nand: fix compilation of nand_spl
get_ram_size() is called, but memsize.c is not compiled.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-10 16:12:55 +02:00
1e8ff7145c KS8695: convert KS8695 eth driver to CONFIG_MULTI_ETH
Trivial conversion of the ks8695eth driver to a CONFIG_MULTI_ETH type
driver.

Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 16:10:34 +02:00
a00e749d5b CM41xx: fix signedness of env bootargs string pointer
The pointer to the flash based bootargs should be a "char *", not unsigned.
Fixes:

cm41xx.c: In function ‘env_flash_cmdline’:
cm41xx.c:67: warning: pointer targets in passing argument 2 of ‘setenv’ differ in signedness

Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 16:10:20 +02:00
61a1926ac8 CM4008: fix signedness of env bootargs string pointer
The pointer to the flash based bootargs should be a "char *", not unsigned.
Fixes:

cm4008.c: In function ‘env_flash_cmdline’:
cm4008.c:67: warning: pointer targets in passing argument 2 of ‘setenv’ differ in signedness

Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 16:09:47 +02:00
ea95cb7331 utx8245: fix build breakage due to assert()
Commit 21726a7 "Add assert() for debug assertions" broke building the
utx8245 board:

dlmalloc.c: In function 'do_check_chunk':
dlmalloc.c:1660: error: 'sz' undeclared (first use in this function)
dlmalloc.c:1660: error: (Each undeclared identifier is reported only once
dlmalloc.c:1660: error: for each function it appears in.)
dlmalloc.c: In function 'do_check_free_chunk':
dlmalloc.c:1689: error: 'next' undeclared (first use in this function)
dlmalloc.c: In function 'do_check_malloced_chunk':
dlmalloc.c:1748: error: 'sz' undeclared (first use in this function)
dlmalloc.c:1750: error: 'room' undeclared (first use in this function)

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
2011-09-10 16:05:43 +02:00
aaf6935b22 UBIFS: fix warning: format '%lX' expects type 'long unsigned int'
Commit 46d7274 "UBIFS: Change ubifsload to set the filesize variable"
introduced the follwing compiler warning:

ubifs.c: In function 'ubifs_load':
ubifs.c:742: warning: format '%lX' expects type 'long unsigned int', but argument 3 has type 'u32'

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
2011-09-10 01:10:32 +02:00
5ae0dea3e8 Fix warning: "assert" redefined
Commit 21726a7 "Add assert() for debug assertions" caused build
warnings for many systems:

In file included from bedbug.c:6:
/home/wd/git/u-boot/work/include/bedbug/bedbug.h:24:1: warning: "assert" redefined
In file included from bedbug.c:3:
/home/wd/git/u-boot/work/include/common.h:144:1: warning: this is the location of the previous definition
In file included from cmd_bedbug.c:10:
/home/wd/git/u-boot/work/include/bedbug/bedbug.h:24:1: warning: "assert" redefined
In file included from cmd_bedbug.c:5:
/home/wd/git/u-boot/work/include/common.h:144:1: warning: this is the location of the previous definition

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2011-09-10 01:10:19 +02:00
d786882db2 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/mpc8610hpcd: set pci1_hose.config_table after fsl_setup_hose
  powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose
  powerpc/mpc8568mds: set pci1_hose.config_table after fsl_setup_hose
2011-09-10 00:17:42 +02:00
297f18ac0f CM4000: fix broken flash base for OpenGear boards
Use _bss_start_ofs as the size of the boot loader code+data that we want
to protect in the flash. This replaces use of the no longer defined
_armboot_start.

Fixes:

flash.c: In function ‘flash_init’:
flash.c:75: error: ‘_bss_start’ undeclared (first use in this function)
flash.c:75: error: (Each undeclared identifier is reported only once
flash.c:75: error: for each function it appears in.)
flash.c:75: error: ‘_armboot_start’ undeclared (first use in this function)

Signed-off-by: <greg.ungerer@opengear.com>
2011-09-10 00:12:15 +02:00
a34ebbdafe CM4000: fix missing RAM definitions for OpenGear boards
The OpenGear boards CM4008, CM4116 and CM4148 need their DRAM base
and RAM stack base addresses defined.

Fixes:

board.c: In function ‘__dram_init_banksize’:
board.c:227: error: ‘CONFIG_SYS_SDRAM_BASE’ undeclared (first use in this function)
board.c:227: error: (Each undeclared identifier is reported only once
board.c:227: error: for each function it appears in.)
board.c: In function ‘board_init_f’:
board.c:270: error: ‘CONFIG_SYS_INIT_SP_ADDR’ undeclared (first use in this function)
board.c:303: error: ‘CONFIG_SYS_SDRAM_BASE’ undeclared (first use in this function)

Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 00:12:15 +02:00
3a52cfa5cc KS8695: move TIMER_ definitions before code use
Move the TIMER_ definitions before they are used in KS8695 timer.c code.
Fixes:

timer.c: In function ‘timer_init’:
timer.c:37: error: ‘TIMER_COUNT’ undeclared (first use in this function)
timer.c:37: error: (Each undeclared identifier is reported only once
timer.c:37: error: for each function it appears in.)
timer.c:38: error: ‘TIMER_PULSE’ undeclared (first use in this function)

Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 00:12:13 +02:00
041c542219 phylib: remove a couple of redundant code lines
This change slightly improves readability of the phydev speed/duplex
assignment logic.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-09-10 00:08:26 +02:00
e3a77218a2 phylib: reset mii bus only if reset handler is registered
This change allows to cope with a mii bus device registered using
miiphy_register(), which doesn't assign a default reset handler.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-09-10 00:07:55 +02:00
46d7274cdc UBIFS: Change ubifsload to set the filesize variable
This is the same behaviour like tftp or fatload command.

Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: kmpark@infradead.org
Acked-by: Detlev Zundel <dzu@denx.de>
2011-09-10 00:04:29 +02:00
21726a7afc Add assert() for debug assertions
assert() is like BUG_ON() but compiles to nothing unless DEBUG is defined.
This is useful when a condition is an error but a board reset is unlikely
to fix it, so it is better to soldier on in hope. Assertion failures should
be caught during development/test.

It turns out that assert() is defined separately in a few places in U-Boot
with various meanings. This patch cleans up some of these.

Build errors exposed by this change (and defining DEBUG) are also fixed in
this patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-10 00:04:01 +02:00
6a8760d748 MAKEALL: drop boards listed in boards.cfg
Pick them up automatically using $(boards_by_arch ...)

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:02:53 +02:00
1b347fd661 MAKEALL: drop non-existent "versatile" configuration
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-09-10 00:01:49 +02:00
068d6f9a26 YAFFS2: fs/yaffs2/yaffs_guts.c - fix build warnings
Fix these:
yaffs_guts.c: In function 'yaffs_ReadDataFromFile':
yaffs_guts.c:4622: warning: pointer targets in passing argument 3 of 'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c:4622: warning: pointer targets in passing argument 4 of 'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c: In function 'yaffs_WriteDataToFile':
yaffs_guts.c:4745: warning: pointer targets in passing argument 3 of 'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c:4745: warning: pointer targets in passing argument 4 of 'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c: In function 'yaffs_ResizeFile':
yaffs_guts.c:4968: warning: pointer targets in passing argument 3 of 'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c:4968: warning: pointer targets in passing argument 4 of 'yaffs_AddrToChunk' differ in signedness
yaffs_guts.c: In function 'yaffs_GutsInitialise':
yaffs_guts.c:7235: warning: assignment from incompatible pointer type
yaffs_guts.c: In function 'yaffs_CreateNewObject':
yaffs_guts.c:2143: warning: 'tn' may be used uninitialized in this function
yaffs_guts.c: In function 'yaffs_MknodObject':
yaffs_guts.c:2258: warning: 'str' may be used uninitialized in this function

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:00:32 +02:00
3da04743b8 YAFFS2: fs/yaffs2/yaffs_guts.c - fix build warnings
Fix these:
yaffs_guts.c: At top level:
yaffs_guts.c:400: warning: 'yaffs_SkipFullVerification' defined but not used

Testing shows no changes of the image sizes.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:00:29 +02:00
fa00e0324c YAFFS2: fs/yaffs2/yaffs_nand.[hc] - fix build warnings
Fix these:
yaffs_guts.c: In function 'yaffs_Scan':
yaffs_guts.c:5436: warning: pointer targets in passing argument 4 of 'yaffs_QueryInitialBlockState' differ in signedness
yaffs_guts.c: In function 'yaffs_ScanBackwards':
yaffs_guts.c:6017: warning: pointer targets in passing argument 4 of 'yaffs_QueryInitialBlockState' differ in signedness
yaffs_nand.c: In function 'yaffs_QueryInitialBlockState':
yaffs_nand.c:109: warning: pointer targets in passing argument 4 of 'dev->queryNANDBlock' differ in signedness
yaffs_nand.c:113: warning: pointer targets in passing argument 4 of 'yaffs_TagsCompatabilityQueryNANDBlock' differ in signedness

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:00:25 +02:00
9d0265e9bb YAFFS2: fs/yaffs2/Makefile - fix build warnings
Drop the "-DNO_Y_INLINE" setting to fix these:
yaffs_guts.h:806: warning: 'yaffs_GetBlockInfo' defined but not used

Impact on image size is negligible - for the VCMA9 board the text
segment size grew from 496353 to 496357 bytes (i. e. 0.0008%);
total image size even remained constant.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:00:22 +02:00
6ac360c465 YAFFS2: fs/yaffs2/yaffscfg.c - fix build warnings
Fix these:
yaffscfg.c: In function 'cmd_yaffs_mread_file':
yaffscfg.c:316: warning: format '%08x' expects type 'unsigned int', but argument 3 has type 'char *'
yaffscfg.c: In function 'cmd_yaffs_ls': yaffscfg.c:371: warning: format '%7d' expects type 'int', but argument 3 has type 'off_t'

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:00:18 +02:00
d1f7a899eb YAFFS2: cmd_yaffs2.c - fix build warnings
Fix these:
cmd_yaffs2.c: In function 'do_ywr':
cmd_yaffs2.c:69: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'ulong'
cmd_yaffs2.c:69: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'ulong'

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-10 00:00:15 +02:00
7e7f903fcd net/eth.c: throw BUG for eth_get_dev_by_name(NULL)
eth_get_dev_by_name() is not safe to use for devname being NULL
as it uses strcmp. This patch makes it fail with a BUG().

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-09-09 23:58:47 +02:00
24e1664472 smc911x: Fix build warnings
Commit 6af1d41 "smc911x MII made available" was missing a few "const"
qualifiers.  Fix the resulting in build warnings:

smc911x.c: In function 'smc911x_initialize':
smc911x.c:297: warning: passing argument 2 of 'miiphy_register' from incompatible pointer type
smc911x.c:297: warning: passing argument 3 of 'miiphy_register' from incompatible pointer type

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Helmut Raiger <helmut.raiger@hale.at>
2011-09-09 23:57:24 +02:00
d5c784ed53 powerpc/mpc8610hpcd: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:11 -05:00
b813cbe916 powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:11 -05:00
b092072e47 powerpc/mpc8568mds: set pci1_hose.config_table after fsl_setup_hose
The function fsl_setup_hose clears the variable pci1_hose.
Set pci1_hose.config_table after it.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-09 08:58:10 -05:00
6f2a4be941 MX31: mx31pdk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-07 23:53:20 +02:00
b793bb92a2 PXA: FIX: Deep-sleep return address in stored in PSPR
FIX for a typo-bug: The address is stored in PSPR, not PSSR.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-09-07 23:51:37 +02:00
6af1d41a46 smc911x MII made available
The driver already had the MII functions, but they have not been
registered using miiphy_register().

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
2011-09-07 23:49:58 +02:00
155cfb5ef1 common: fix behavior of ROUND macro when input is already rounded
Currently when you call ROUND with a value that is already a
multiple of the second parameter it will return a value that is
one multiple larger, instead of returning the value passed in.

There are only two types of usage of ROUND currently, one in
various config files to round CONFIG_SYS_MALLOC_LEN to a multiple
of 4096 bytes.  The other in cmd_sf.c where the incorrect behavior
of ROUND is worked around be subtracting one from the length argument
before passing it to ROUND.

This patch fixes ROUND and removes the workaround from cmd_sf.  It
also results in all of the malloc pools that use ROUND to compute
their size shrinking by 4KB.

Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-09-07 23:39:36 +02:00
49ea2e342b Merge branch 'master' of git://git.denx.de/u-boot-mmc
* 'master' of git://git.denx.de/u-boot-mmc:
  ftsdc010: add support of ftsdc010 mmc controller
  mmc: Fix mmc_send_status()
2011-09-07 22:22:38 +02:00
6eba734b5b Merge branch 'master' of git://git.denx.de/u-boot-video
* 'master' of git://git.denx.de/u-boot-video:
  VIDEO: mb86r0xgdc.c: fix warning: unused variable 'i'
2011-09-07 22:20:38 +02:00
30032710ed I2C: mxc: fix compilation for MX31
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2011-09-07 22:11:47 +02:00
67f463b06d MX31: fix missing mxc_get_clk() call
Add missing case to be used in common MXC code.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-07 22:11:23 +02:00
10980d4a54 arm: tegra2: fix out-of-tree build
The out-of-tree build fails because the Makefiles in question depend on
source files of another directory but do not explicitly mkdir that
directory.

As a matter of fact, other Makefiles under board/*/ directory that refer
to source files under another directory explicitly call mkdir.

This patch adds explicit mkdir's to the Makefiles in question, and
verifies that out-of-tree build is working.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2011-09-07 22:03:53 +02:00
6636eb97e4 omap24xx: fix 'reset_timer_masked' declaration error
Commit 17659d7 "Timer: Remove reset_timer_masked()" introduced a
static declaration for reset_timer_masked() which causes build errors:

timer.c:45: error: static declaration of 'reset_timer_masked' follows non-static declaration
include/asm/u-boot-arm.h:70: error: previous declaration of 'reset_timer_masked' was here

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Graeme Russ <graeme.russ@gmail.com>
Cc: Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-07 22:03:06 +02:00
6f0d7ae265 da8xxevm: Fix warning: unused variable 'val'
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
2011-09-07 22:02:07 +02:00
b66521a6c1 ARM: PXA: remove broken "zylonite" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2011-09-07 22:00:37 +02:00
5df092d781 ARM: remove broken "shannon" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Rolf Offermanns <rof@sysgo.de>
2011-09-07 21:46:40 +02:00
9c62815bf7 ARM: remove broken "modnet50" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Thomas Elste <info@elste.org>
2011-09-07 21:46:40 +02:00
d1a067a34a ARM: remove broken "lpc2292sodimm" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-09-07 21:46:40 +02:00
3d57573986 ARM: remove broken "lart" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>
2011-09-07 21:46:40 +02:00
c1f8750f9f ARM: remove broken "impa7" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>
2011-09-07 21:46:40 +02:00
2c650e2010 ARM: remove broken "gcplus" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: George G. Davis <gdavis@mvista.com>
2011-09-07 21:46:40 +02:00
26e670ea43 ARM: remove broken "evb4510" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Curt Brune <curt@cucy.com>
2011-09-07 21:46:39 +02:00
c8f63b415f ARM: remove broken "ep7312" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>
2011-09-07 21:46:39 +02:00
fc5e5ceec4 ARM: remove broken "dnp1110" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>
2011-09-07 21:46:39 +02:00
6aac646f58 ARM: remove broken "SMN42" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-09-07 21:45:34 +02:00
8b075814fd doc/README.scrapyard: Update commit IDs or board removals
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-07 21:44:25 +02:00
a4814a69d3 Makefile : fix generation of cpu related asm-offsets.h
commit 0edf8b5b2f breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, generating always asm-offsets.h before
the other targets.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Wolfgang Denk <wd@denx.de>
2011-09-07 21:41:27 +02:00
4cd3f7cb08 VIDEO: mb86r0xgdc.c: fix warning: unused variable 'i'
Fix build warning:

Configuring for jadecpu board...
mb86r0xgdc.c: In function 'dsp_init':
mb86r0xgdc.c:60: warning: unused variable 'i'

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
2011-09-06 08:43:35 +02:00
99ffccbd3e Flush cache after the OS image is loaded into the memory.
Since we are loading an executable image into memory we need flush it
out of the cache to possible maintain coherence on CPUs with split
instruction and data caches.  We do this for other executable image
loading command.

On PowerPC once we do this we no longer need to explicitly flush the
dcache on multi-core systems in the BOOTM_STATE_OS_PREP phase.  We now
treat the BOOTM_STATE_OS_PREP as a no-op to maintain backwards
compatibility with the bootm subcommand.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-05 16:07:44 +02:00
019fd6d45b Correct call to eth_write_hwaddr()
This fixes "Warning: failed to set MAC address" on platforms which rely on
an 'ethaddr' environment variable to set the MAC address.

This bug was introduced by this commit:

7616e785 Add Ethernet hardware MAC address framework to usbnet

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kumar Gala <galak@kernel.crashing.org>
Tested-by: Michal Simek <monstr@monstr.eu>
Tested-by: Heiko Schocher <hs@denx.de>
2011-09-05 16:06:06 +02:00
ad8e3bd657 sf: winbond: Add support for the Winbond W25X40
The Winbond W25X40 is now being used in the IP02 (and possibly IP04).
Tested and working on the actual device.
2011-09-05 16:03:00 +02:00
8298fd2a9f board/prodrive/alpr/fpga.c: Coding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2011-09-05 15:46:20 +02:00
c2484f40d6 PPC4xx: ALPR: constify FPGA code
The ALPR custom FPGA code was missed by commit e6a857d "fpga:
constify to fix build warning" resulting in such warnings:

fpga.c:226: warning: initialization from incompatible pointer type

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2011-09-05 12:28:46 +02:00
fb2d6efbf2 FPGA: constify Lattice FPGA code
The Lattice code was missed by commit e6a857d "fpga: constify to fix
build warning" resulting in such warnings:

fpga.c: In function 'fpga_load':
fpga.c:238: warning: passing argument 2 of 'lattice_load' discards qualifiers from pointer target type
fpga.c: In function 'fpga_dump':
fpga.c:278: warning: passing argument 2 of 'lattice_dump' discards qualifiers from pointer target type

Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Stefano Babic <sbabic@denx.de>
2011-09-05 11:41:42 +02:00
f0e494988f MPC8xx: fix build problem for ETX094 board
Commit 58c583b "net: Check network device driver name" increased the
code size and broke building for the ETX094 board.

Adjust the linker script to make it build again.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-05 11:20:33 +02:00
cb0090e804 linkstation: fix warning: "CONFIG_IDENT_STRING" redefined
Commit 09c2e90 "unify version_string" defines a default value for
CONFIG_IDENT_STRING in version.h, so any private settings musty be
done before including this file.  Move the include for version.h after
the one for common.h to fix the build problem.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
2011-09-05 09:43:09 +02:00
712f4d1f34 drivers/video/Makefile: include object files only once
Use "$(sort $(COBJS-y))" to prevent multiple inclusion of the same
object files.

Also sort driver list.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-05 09:19:08 +02:00
9d75de0951 video: Fix build error with global inclusion of videomodes
The following commit:

commit de701d1183
Author: Syed Mohammed Khasim <khasim@ti.com>
Date:   Tue Apr 19 14:00:34 2011 -0500

   OMAP3: Add DSS driver for OMAP3

Added videomodes to the object list w/o any protection.  This causes
build issues like:

videomodes.o:(.rodata.res_mode_init+0x0): multiple definition of `res_mode_init'
videomodes.o:(.rodata.res_mode_init+0x0): first defined here
videomodes.o: In function `video_get_params':
/local/home/galak/git/u-boot/drivers/video/videomodes.c:160: multiple definition of `video_get_params'
videomodes.o:/local/home/galak/git/u-boot/drivers/video/videomodes.c:160: first defined here
videomodes.o: In function `video_get_video_mode':
/local/home/galak/git/u-boot/drivers/video/videomodes.c:229: multiple definition of `video_get_video_mode'
videomodes.o:/local/home/galak/git/u-boot/drivers/video/videomodes.c:229: first defined here
videomodes.o:(.rodata.vesa_modes+0x0): multiple definition of `vesa_modes'
videomodes.o:(.rodata.vesa_modes+0x0): first defined here
make[1]: *** [libvideo.o] Error 1

Remove the unconditional inclusion and move to adding to
CONFIG_VIDEO_OMAP3 case.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-05 09:15:39 +02:00
f8ef0d4f46 ftsdc010: add support of ftsdc010 mmc controller
Faraday FTSDC010 controller is a SD/MMC controller for SoC chip.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-09-04 18:03:02 -05:00
aaf3d41aa0 mmc: Fix mmc_send_status()
The mmc_send_status() function sets cmd.arg = 0. That's incorrect, so fix it.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Tested-by: Lei Wen <adrian.wenl@gmail.com>
2011-09-04 18:03:02 -05:00
58c583b6c2 net: Check network device driver name
If name is longer than allocated space NAMESIZE
mac address is rewritten which show error
message like:

Error message:
Warning: Xlltemac.87000000 MAC addresses don't match:
Address in SROM is         30:00:00:00:00:00
Address in environment is  00:0a:35:00:6a:04

NAMESIZE contains Driver name + zero terminated character.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-09-04 23:29:39 +02:00
03bf22f559 stdio: Fix a possible buffer overflow
Signed-off-by: Bradley Bolen <bradleybolen at yahoo.com>
2011-09-04 23:27:52 +02:00
0789dc14d2 MAINTAINERS: fix integrator and versatile
- Take maintainership of the integratorcp board
- Remove the double entry for the versatile board
  it has two variants but only one board folder

Cc: Philippe Robin <philippe.robin@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-04 23:24:18 +02:00
684cad5717 Merge branch 'master' of git://git.denx.de/u-boot-coldfire
* 'master' of git://git.denx.de/u-boot-coldfire:
  ColdFire:Clean up the CONFIG_STANDALONE_LOAD_ADDR usage
  ColdFire:Add mb for 5253 dram initialization
  ColdFire:Define the DM9000 byteswap for M5253 board.
  ColdFire:Update the env settings for several boards.
  ColdFire:disable the NFS define for 52277 board.
  ColdFire:Update the timer_init since it was unified.
  ColdFire: Cleanup for partial linking and --gc-sections
  ColdFire: Update compile flags for each CPUs
  ColdFire:Fix the configuration broken for some boards.
2011-09-04 22:53:04 +02:00
6dfbf49c6d Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (145 commits)
  beagleboard: enable HUB power on all variants of the BeagleBoard
  dm3730: enable dpll5
  ehci-hcd: Allow cleanups to happen gracefully on a timeout.
  OMAP3: Add DSS driver for OMAP3
  led: Remove state-saving of led for toggle functionality and add toggle option to led command
  led: Fixed setting of STATUS_LED_BIT1 when led_name is 'all'
  led: correct off/on locations in structure
  led: added cmd_led to Makefile
  BeagleBoard: fix LED 0/1 in driver
  Corrected LED name match finding avoiding extraneous Usage printouts
  BeagleBoard: config: updated default configuration
  BeagleBoard: config: Enabled multibus support for I2C in configuration
  BeagleBoard: config: add optargs/buddy/camera
  BeagleBoard: config: increase command-line functionality
  BeagleBoard: config: make mtest run
  BeagleBoard: config: enable DSS
  BeagleBoard: config: enable asix driver and dhcp
  BeagleBoard: config: enable networking
  BeagleBoard: config: decrease bootdelay to 2 seconds
  BeagleBoard: config: use uImage.beagle for tftp
  BeagleBoard: config: hardcode MAC for onboard SMSC
  BeagleBoard: config: load kernel from MMC ext, not FAT
  BeagleBoard: Configure DVI/S-video
  BeagleBoard: Added userbutton command
  BeagleBoard: turn off clocks in ehci_stop
  USB: Remove __attribute__ ((packed)) for struct ehci_hccr and ehci_hcor
  beagleboard: add support for xM revision C
  beagle: pass expansionboard name in bootargs
  OMAP: Remove omapfb.debug=y from Beagle and Overo env settings
  OMAP3 Beagle Pin Mux initialization glitch fix
  da850: modifications for Logic PD Rev.3 AM18xx EVM
  da850: fix the channel number for EMAC teardown init
  da850: add support for Spectrum Digital AM18xx EVM
  da850: add support to wake up DSP during board init
  da850: modify the U-Boot prompt string
  da850: add NOR boot mode support
  da8xx: add support for multiple PLL controllers
  da850: indicate cache usage disable in config file
  dm365: modify boot prompt from dm365 to dm36x
  dm365: disable cache usage due to coherency issues
  dm6446: disable cache usage due to coherency issues
  OMAP3: Remove legacy mmc driver
  devkit8000: Use generic MMC driver
  TI OMAP3 SDP3430: Use generic MMC driver
  AM3517 CraneBoard: Use generic MMC driver
  OMAP3: pandora: Use generic MMC driver
  OMAP3: Zoom2: Use generic MMC driver
  OMAP3: Zoom1: Use generic MMC driver
  OMAP3: DIG297: Use generic MMC driver
  OMAP3: CM-T35: Use generic MMC driver
  am3517evm: Use generic MMC driver
  omap3evm: Use generic MMC driver
  omap3:clock: check cpu_family before enabling clks for IVA & CAM
  omap3:clock: configure GFX clock to 200MHz for AM/DM37x
  OMAP3/4: Increase console I/O buffer size
  PXA: vpac270: Remove re-defined CONFIG_SYS_TEXT_BASE
  PXA: Fix CSB226, fix monitor length
  PXA: Fix Lubbock, remove redundant parenthesis
  armv7: cache: remove flush on un-aligned invalidate
  armv7: stronger barrier for cache-maintenance operations
  omap: enable caches at system start-up
  arm: do not force d-cache enable on all boards
  ORIGEN: Add MMC SPL support
  ARMV7: Add support for Samsung ORIGEN board
  i2c:gpio:s5p: Enable I2C GPIO on the GONI target
  i2c:gpio:s5p: I2C GPIO Software implementation (via soft_i2c)
  Tegra2: Use clock and pinmux functions to simplify code
  Tegra2: Add additional pin multiplexing features
  Tegra2: Add more clock support
  Tegra2: Add microsecond timer function
  ARM: remove broken "at91rm9200dk" board
  ARM: remove broken "m501sk" board
  ARM: remove broken "kb9202" board
  ARM: remove broken "csb637" board
  ARM: remove broken "cmc_pu2" board
  ARM: remove broken "at91cap9adk" board
  ARM: remove broken "voiceblue" board
  ARM: remove broken "smdk2400" board
  ARM: remove broken "sbc2410x" board
  ARM: remove broken "netstar" board
  ARM: remove broken "mx1fs2" board
  ARM: remove broken "lpd7a40x" boards
  ARM: remove broken "edb93xx" boards
  ARM: remove broken "B2" board
  ARM: remove broken "armadillo" board
  ARM: remove broken "assabet" board
  ARM: versatile: drop warnings
  IMX: scb9328: drop warnings
  MX31: imx31_litekit: make use of GPIO framework
  MX31: mx31ads: make use of GPIO framework
  MX5: mx51evk: make use of GPIO framework
  MX35: mx35pdk: make use of GPIO framework
  MX5: mx53loco: make use of GPIO framework
  MX5: mx53evk: make use of GPIO framework
  MX5: vision2: make use of GPIO framework
  MX5: mx53smd: make use of GPIO framework
  MX5: mx53ard: make use of GPIO framework
  MX25: zmx25: make use of GPIO framework
  MX5: efikamx: make use of GPIO framework
  MX31: QONG: make use of GPIO framework
  MX35: make use of GPIO framework for MX35 processor
  MX5: make use of GPIO framework for MX5 processor
  MX31: make use of GPIO framework for MX31 processor
  MX25: make use of GPIO framework for MX25 processor
  IMX: uniform GPIO interface using GPIO framework
  MX: MX35 / MX5: uniform clock command with powerpc
  MX35: MX35PDK: support additional RAM on CSD1
  mx53: ddr3: Update DD3 initialization
  ARM: MX51: PLL errata workaround
  ARM: versatilepb : drop warnings due to double definitions
  omap4: increase SRAM budget to fix build error
  omap4: fix build warning due to signed unsigned comparison
  mkimage: Fix 'Unknown OMAP image type - 5'
  omap: fix gpio related build breaks
  gpio:samsung: s5p_ suffix add for GPIO functions (C210_universal)
  SMDKV310: MMC SPL: Remove unwanted dummy functions
  SMDKV310: Fix undefined reference error
  SMDKV310: Fix build error for smdkv310 board
  gpio:samsung s5p_ suffix add for GPIO functions
  mmc: S5P: Support DMA restarts at buffer boundaries
  SMDKV310: Fix host compilation of mkv310_image
  arm: fix bd pointer dereference prior initialization
  arm, lib/board.c: use gd->ram_size instead of bd->bi_memsize
  mx5: Remove CONFIG_L2_OFF and CONFIG_SYS_L2CACHE_OFF
  MX31: removed warnings due to clock.h
  integrator: convert to new build system
  integratorcp: make the board compile
  integratorap: remove hardcoded 32MB memory cmdline
  ...
2011-09-04 21:12:18 +02:00
3f8ce93956 ColdFire:Clean up the CONFIG_STANDALONE_LOAD_ADDR usage
Remove the additional linker options for CONFIG_STANDALONE_LOAD_ADDR

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
6752da6b26 ColdFire:Add mb for 5253 dram initialization
The dram initialization sequence should be in order.
This patch add mb for the dram intialization code to make
sure the compiler do not disorder the code.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
f73e7d67ed ColdFire:Define the DM9000 byteswap for M5253 board.
The M5253DEMO board swapped the io pins which make
the standard IO function did not work for dm9000.
Define the byte swap to use raw io for dm9000.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
09933fb0ba ColdFire:Update the env settings for several boards.
Move the environment outside the u-boot for some boards
and enlarge the u-boot size in some env settings.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
90fa92dc08 ColdFire:disable the NFS define for 52277 board.
There is no network device on ColdFire 52277EVB board.But the default
cmd include NFS define which make the build error.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
444ddfc751 ColdFire:Update the timer_init since it was unified.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
6c0bf27d74 ColdFire: Cleanup for partial linking and --gc-sections
Introduce the --gc-sections for ColdFire platform and clean up the
corresponding lds file.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
45263ec4c0 ColdFire: Update compile flags for each CPUs
Remove compiler version check for gcc 4.1 in config.mk.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
b823c8cda0 ColdFire:Fix the configuration broken for some boards.
Some typoes in Makefile and boards.cfg make the M54455 board
and M53017 board configuration broken.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:54 +08:00
38a77c3adb beagleboard: enable HUB power on all variants of the BeagleBoard
Changes made by Jason Kridner with inputs from Eric Benard to special case xM Rev A and xM Rev B

Relevant discussions:
http://www.mail-archive.com/u-boot@lists.denx.de/msg59361.html
http://www.mail-archive.com/u-boot@lists.denx.de/msg59589.html

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Christian Spielberger <c.spielberger@bct-electronic.com>
Cc: Jason Kridner <jdk@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
31c8598425 dm3730: enable dpll5
which is used to provide 120MHz to USB EHCI
This allows EHCI to work on BeagleBoard XM

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
3ecfa9525c ehci-hcd: Allow cleanups to happen gracefully on a timeout.
With this, the EHCI seems to "recover" from a timeout. This is particularly
observable if you were to ping the wrong IP Address and then ping the correct
one or if there was a temporary failure during tftp sessions.

All it takes is one timeout to disable it. If you have a noisy network (lot
of traffic), even if the traffic is not for the board, the timeouts don't occur.

Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
de701d1183 OMAP3: Add DSS driver for OMAP3
* Supports dynamic panel configuration
* Supports dynamic tv standard selection
* Adds support for DSS register access through generic APIs
* Incorporated DSS register access using structures.
* DSS makefile update

Previous discussions are here:
http://www.mail-archive.com/u-boot@lists.denx.de/msg27150.html

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
b8bc8973a1 led: Remove state-saving of led for toggle functionality and add toggle option to led command
* Read the led output state from GPIO instead saving state in memory when it is [re]set
* Added a toggle option to the led command

Previous discussion:
http://lists.denx.de/pipermail/u-boot/2011-May/093068.html

Changes since v1:
Fixed checkpatch errors

Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
d604cda34a led: Fixed setting of STATUS_LED_BIT1 when led_name is 'all'
Fix for only one led getting set or reset when the led_name is 'all'

Previous discussion:
http://lists.denx.de/pipermail/u-boot/2011-May/093068.html

Changes since v1:
Fixed checkpatch if statement error noticed by Sergei.

Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
4086b51cb7 led: correct off/on locations in structure
Although the initialization should probably be done with names, the
existing implementation has these structures filled in the opposite
order.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
4421acf8cd led: added cmd_led to Makefile
Addition of cmd_led into the Makefile wasn't included in the patch
applied to u-boot-ti.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
f87824efdd BeagleBoard: fix LED 0/1 in driver
Fixed USR0/USR1 to be LED 0/1 respectively

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
95492d784b Corrected LED name match finding avoiding extraneous Usage printouts
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
f4b36ea927 BeagleBoard: config: updated default configuration
* Improved boot env var setting
    * Made room for a 64MB ramdisk by moving from 0x81600000 to 0x81000000
    * Added ramarg, ramroot and ramboot env variables

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
f74fc4ae6d BeagleBoard: config: Enabled multibus support for I2C in configuration
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
c522eac41f BeagleBoard: config: add optargs/buddy/camera
buddy and camera are used to configure peripherals in the kernel at boot
time that cannot easily be detected by the kernel.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
933d370121 BeagleBoard: config: increase command-line functionality
Enable the expression evaluator.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
780a97f8c8 BeagleBoard: config: make mtest run
Utilize the alternate mtest and define a valid region.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
25a4d0175c BeagleBoard: config: enable DSS
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
54b62d590c BeagleBoard: config: enable asix driver and dhcp
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
2162439a26 BeagleBoard: config: enable networking
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:21 +02:00
4c37e8de00 BeagleBoard: config: decrease bootdelay to 2 seconds
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
e682930867 BeagleBoard: config: use uImage.beagle for tftp
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
ec556ffccd BeagleBoard: config: hardcode MAC for onboard SMSC
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
e5549f0f8b BeagleBoard: config: load kernel from MMC ext, not FAT
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
3f16ab9102 BeagleBoard: Configure DVI/S-video
Based on patches from Syed Mohammed Khasim (khasim@ti.com).

Configures the output of the BeagleBoard DVI to be orange.
Configures the output of the BeagleBoard S-Video to be a colorbar.

Changed display_init to beagle_display_init as suggested by Igor Grinberg:
http://www.mail-archive.com/u-boot@lists.denx.de/msg51446.html

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
f835ea7158 BeagleBoard: Added userbutton command
Based on commit f1099c7c43caf5bac3bf6a65aa266fade4747072
    Author: Greg Turner <gregturner@ti.com>
    Date:   Tue May 25 09:19:06 2010 -0500

    New u-boot command for status of USER button on BeagleBoard-xM

         Modified bootcmd to check the staus at boot time and set
	 filename of the boot script.

* Moved to a BeagleBoard specific file.
* Removed changes to default boot command from adding userbutton
  command.
* Made to handle pre-xM boards.
* Flipped polarity of the return value to avoid confusion.  Success (0)
  is when the button is pressed.  Failure (1) is when the button is NOT
  pressed.
* Used latest revision getting function.
* Used latest macros for board revision.
* Added xM-C revision definition (optional, since it was default)
* updated default configuration with UserButton functionality
  * Added a separate bootenv variable to load a user defined .txt file
  * Added an example, showing how a different environment file can be loaded with
    the user button pressed

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Cc: Greg Turner <gregturner@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
f44047df3b BeagleBoard: turn off clocks in ehci_stop
This fixes display problems in linux

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
69716c1900 USB: Remove __attribute__ ((packed)) for struct ehci_hccr and ehci_hcor
Remove __attribute__ ((packed)) to prevent byte access to soc
registers in some gcc versions.

Having patches to enable ehci for the BeagleBoard lying around for
several months, this one was the show-stopper.

Switched to align(4), rather than remove the attribute, per suggestion
from Alexander.

Credits have to go to Laine Walker-Avina <lwalkera@ieee.org> for
finding the problem.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:20 +02:00
1ffcb34692 beagleboard: add support for xM revision C
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
b16603146a beagle: pass expansionboard name in bootargs
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
2490e591b4 OMAP: Remove omapfb.debug=y from Beagle and Overo env settings
The kernel DSS2 code is mature now, and keeping this setting hurts performance

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
52d82e40b0 OMAP3 Beagle Pin Mux initialization glitch fix
The below patch reverses the order of two segments in the board file.
Output pins need to have their values initialized, before they are
exposed to the logic outside the chip.

Signed-off-by: Bob Feretich <bob.feretich@rafresearch.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
0f3d6b06ea da850: modifications for Logic PD Rev.3 AM18xx EVM
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
NOR to work on Rev.3 EVM. When GP0[11] is low,
the SD0 interface will not work, but NOR flash will.

Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
ba511f779a da850: fix the channel number for EMAC teardown init
TX and RX channel numbers programmed as '1' during EMAC
teardown initialization is wrong. This patch fixes the
same by setting channel number to '0' which is used by U-boot.

Signed-off-by: Sugumar Natarajan <sugumar@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
8cf4739965 da850: add support for Spectrum Digital AM18xx EVM
The AM18xx EVM contains winbond SPI flash instead of ST SPI flash in
comparison with logic PD da850/omap-l138 EVM. So enable configuration
to look for winbond flash.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
cf2c24e399 da850: add support to wake up DSP during board init
add support for DSP wake-up by default on DA850/OMAP-L138
during board initialization. Enable hwconfig environment and added
extra env setting through CONFIG_EXTRA_ENV_SETTINGS.
To prevent DSP from being woken up,set the environment variable as,
set hwconfig "dsp:wake=no"

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
ac935e567b da850: modify the U-Boot prompt string
Modify U-Boot prompt string from "DA850-evm >" to "U-Boot >".

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
1506b0a837 da850: add NOR boot mode support
Add pin-mux support for NOR in board file and correspanding
macros to use NOR boot mode in configuration file.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
b7e6843f97 da8xx: add support for multiple PLL controllers
Modify clk_get() function in cpu file to work for
multiple PLL controllers.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
bd65d006a6 da850: indicate cache usage disable in config file
there are cache coherency issues when using the DAVINCI Ethernet driver,
hence caches cant be used for da850 u-boot. As per new cache management
framework,if the caches are not used in u-boot, it needs to be explicitly
indicated through macros in config file. CACHE disable is  indicated by
the following macro definitions in config file,

1. CONFIG_SYS_ICACHE_OFF
2. CONFIG_SYS_DCACHE_OFF
3. CONFIG_SYS_L2CACHE_OFF

Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
e7b209707c dm365: modify boot prompt from dm365 to dm36x
Newer version for DM365 silicon support higher speeds
and is called DM368. Modify the bootprompt string DM365
to DM36x.

Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
98c19aff95 dm365: disable cache usage due to coherency issues
there are cache coherency issues when using the DAVINCI Ethernet driver,
hence caches cant be used for d365 u-boot. As per new cache management
framework,if the caches are not used in u-boot, it needs to be explicitly
indicated through macros in config file. CACHE disable is  indicated by
the following macro definitions in config file,

1. CONFIG_SYS_ICACHE_OFF
2. CONFIG_SYS_DCACHE_OFF
3. CONFIG_SYS_L2CACHE_OFF

Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
913a39e9aa dm6446: disable cache usage due to coherency issues
there are cache coherency issues when using the DAVINCI Ethernet driver,
hence caches cant be used for dm6446 u-boot. As per new cache management
framework,if the caches are not used in u-boot, it needs to be explicitly
indicated through macros in config file. CACHE disable is  indicated by
the following macro definitions in config file,

1. CONFIG_SYS_ICACHE_OFF
2. CONFIG_SYS_DCACHE_OFF
3. CONFIG_SYS_L2CACHE_OFF

Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
c318dbf079 OMAP3: Remove legacy mmc driver
Now that all platforms have been migrated to the new MMC driver, remove
the old one.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
f408501d2d devkit8000: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
7cc862be85 TI OMAP3 SDP3430: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
a5a8821c47 AM3517 CraneBoard: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
86c5c54409 OMAP3: pandora: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
cfc4384c84 OMAP3: Zoom2: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
d6906cb812 OMAP3: Zoom1: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
eaff60d738 OMAP3: DIG297: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
28fed36235 OMAP3: CM-T35: Use generic MMC driver
Switch from the legacy omap3 mmc driver to the new generic omap hsmmc
driver.  This patch is based on the work done for Beagle, etc.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
122e6e0a97 am3517evm: Use generic MMC driver
Switch from the legacy mmc driver to the
new generic mmc driver.

This patch is based on similar patch for beagle[1].

 [1] http://git.denx.de/?p=u-boot.git;a=commitdiff_plain;h=0cd31144240

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
dcc4f38b43 omap3evm: Use generic MMC driver
Switch from the legacy mmc driver to the
new generic mmc driver.

This patch is based on similar patch for beagle[1].

 [1] http://git.denx.de/?p=u-boot.git;a=commitdiff_plain;h=0cd31144240

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
7dd5a5be2f omap3:clock: check cpu_family before enabling clks for IVA & CAM
In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and
ISP-CAMERA modules have been removed. So add check for cpu_family before
enabling clocks for these modules, else this impacts subsequent
power consumption and system suspend/resume functionality.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
f4dac3e16c omap3:clock: configure GFX clock to 200MHz for AM/DM37x
AM/DM37x is another OMAP3 variant, where the GFX clock has been
boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change.

HW Errata: Due to dependency of TV out clock of 54MHz, it is not
possible to configure GFX to 192MHz. So as per HW errats, the
recommended GFX clock is 200MHz (=CORE_CLK/2).

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
f62b1257f2 OMAP3/4: Increase console I/O buffer size
Increase the console I/O buffer size (SYS_CBSIZE) to 512 (from 256)
required especially for bootargs string, as multiple options
(e.g Video settings) are passed to the kernel through bootargs.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
904a20bcea PXA: vpac270: Remove re-defined CONFIG_SYS_TEXT_BASE
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-09-04 11:36:16 +02:00
dd0fb51d49 PXA: Fix CSB226, fix monitor length
This is what was probably intended by the original author.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-09-04 11:36:16 +02:00
c4f4c760c9 PXA: Fix Lubbock, remove redundant parenthesis
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-09-04 11:36:16 +02:00
cabe2878a8 armv7: cache: remove flush on un-aligned invalidate
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer

Also, print a warning when this situation is recognized.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
882f80b993 armv7: stronger barrier for cache-maintenance operations
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
13d4f9bd74 omap: enable caches at system start-up
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
cba4b1809f arm: do not force d-cache enable on all boards
c2dd0d4554 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.

Also add some documentation for cache usage in ARM.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
98a48c5de5 ORIGEN: Add MMC SPL support
Adds mmc boot support.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-09-04 11:36:16 +02:00
b9a1ef219e ARMV7: Add support for Samsung ORIGEN board
Origen board is based upon S5PV310 SoC which is similiar to
S5PC210 SoC.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-09-04 11:36:15 +02:00
85776b0214 i2c:gpio:s5p: Enable I2C GPIO on the GONI target
This patch enables the software I2C for GONI reference target.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
2011-09-04 11:36:15 +02:00
9f15bc0c1c i2c:gpio:s5p: I2C GPIO Software implementation (via soft_i2c)
This patch adds support for software I2C for GONI and Universal C210 reference targets.
It adds support for access to GPIOs by number, not as it is present,
by bank and offset.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
2011-09-04 11:36:15 +02:00
d07dc4993d Tegra2: Use clock and pinmux functions to simplify code
Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
858bd095e1 Tegra2: Add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
b4ba2be8dc Tegra2: Add more clock support
This adds functions to enable/disable clocks and reset to on-chip peripherals.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
39d3416f0a Tegra2: Add microsecond timer function
These functions provide access to the high resolution microsecond timer
and tidy up a global variable in the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
1c85752258 ARM: remove broken "at91rm9200dk" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:15 +02:00
b1a2bd4bb3 ARM: remove broken "m501sk" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:15 +02:00
5bd3814bb7 ARM: remove broken "kb9202" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:14 +02:00
d14af08466 ARM: remove broken "csb637" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:14 +02:00
37a9b4d0b7 ARM: remove broken "cmc_pu2" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:14 +02:00
b550834458 ARM: remove broken "at91cap9adk" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stelian Pop <stelian.pop@leadtechdesign.com>
2011-09-04 11:36:14 +02:00
1b793a472e ARM: remove broken "voiceblue" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:14 +02:00
ad218a868b ARM: remove broken "smdk2400" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
2011-09-04 11:36:14 +02:00
1f7f0edd3c ARM: remove broken "sbc2410x" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:14 +02:00
6ea2405489 ARM: remove broken "netstar" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:14 +02:00
69624195a3 ARM: remove broken "mx1fs2" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:13 +02:00
957731eda0 ARM: remove broken "lpd7a40x" boards
Remove lpd7a400 and lpd7a404 boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:13 +02:00
716f7ade10 ARM: remove broken "edb93xx" boards
Remove edb9301, edb9302, edb9302a, edb9307, edb9307a, edb9312,
edb9315 and edb9315a boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-04 11:36:13 +02:00
5dcf53696f ARM: remove broken "B2" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
2011-09-04 11:36:13 +02:00
be28857072 ARM: remove broken "armadillo" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Rowel Atienza <rowel@diwalabs.com>
2011-09-04 11:36:13 +02:00
c91e90db8c ARM: remove broken "assabet" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: George G. Davis <gdavis@mvista.com>
2011-09-04 11:36:13 +02:00
689d0fa36a ARM: versatile: drop warnings
Drop warning: "passing argument 1 of 'get_ram_size'
discards qualifiers from pointer target type"

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
2011-09-04 11:36:13 +02:00
a410d0a343 IMX: scb9328: drop warnings
Drop warning: "passing argument 1 of 'get_ram_size'
discards qualifiers from pointer target type"

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Torsten Koschorrek <koschorrek@synertronixx.de>
2011-09-04 11:36:13 +02:00
87e14f0f56 MX31: imx31_litekit: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:13 +02:00
5bd9a9b01b MX31: mx31ads: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:12 +02:00
753fc2ebf9 MX5: mx51evk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:12 +02:00
a4adedd439 MX35: mx35pdk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:12 +02:00
50410078cd MX5: mx53loco: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <r64343@freescale.com>
2011-09-04 11:36:12 +02:00
f7a364745e MX5: mx53evk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <r64343@freescale.com>
2011-09-04 11:36:12 +02:00
4c0443c41f MX5: vision2: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:12 +02:00
04e25fd629 MX5: mx53smd: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-04 11:36:12 +02:00
00c07fe692 MX5: mx53ard: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-04 11:36:12 +02:00
7caa655f74 MX25: zmx25: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-09-04 11:36:12 +02:00
e70a10607d MX5: efikamx: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
2011-09-04 11:36:12 +02:00
9400f59267 MX31: QONG: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
729b74add9 MX35: make use of GPIO framework for MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
7d8d0b1a4a MX5: make use of GPIO framework for MX5 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
6cb2e774f2 MX31: make use of GPIO framework for MX31 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
41eca7416c MX25: make use of GPIO framework for MX25 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
d8e0ca851b IMX: uniform GPIO interface using GPIO framework
IMX processors has a slightly different interface
to access GPIOs and do not make use of the provided GPIO
framework. The patch substitutes mxc_ specific
functions and make use of the API in asm/gpio.h

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
7acec25948 MX: MX35 / MX5: uniform clock command with powerpc
There was already a command to show the processor clocks
for PowerPC (clocks). For i.MX, the "clockinfo" command
was introduce. The patch sets the same command name used on
PowerPC.
A nasty and not needed newline is also dropped in the help for
the command.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
6b5acfc121 MX35: MX35PDK: support additional RAM on CSD1
Modules on mx35pdk have additional 128MB
memory connected to CSD1.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
9691c5b96d mx53: ddr3: Update DD3 initialization
Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011:
-change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz)
-change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from
"0x092080b0". This changes write recovery from 8 clocks to 6 clocks
(in line with ESDCFG1[tWR])

Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-04 11:36:11 +02:00
9db1bfa110 ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>
2011-09-04 11:36:11 +02:00
96c9745fa1 ARM: versatilepb : drop warnings due to double definitions
CONFIG_ARCH_VERSATILE_PB  is defined twice - drop
the define from config.h.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:06 +02:00
f89f6109e9 omap4: increase SRAM budget to fix build error
Signed-off-by: Aneesh V <aneesh@ti.com>
Cc: Dirk Behme <dirk.behme@googlemail.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Dirk Behme<dirk.behme@googlemail.com>
2011-09-04 11:34:30 +02:00
34455b04fc omap4: fix build warning due to signed unsigned comparison
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:34:09 +02:00
8fcf5959a8 mkimage: Fix 'Unknown OMAP image type - 5'
Using mkimage with e.g.

tools/mkimage -A arm -T firmware -O u-boot -d u-boot.bin foo.img

gives a warning

"Unknown OMAP image type - 5"

while it seems that the image itself is created successfully.

This does come from the patch "mkimage: Add OMAP boot image support".

The method check_image_type in image_type_params is supposed to just
return success or failure.  However, for omap it also calls fprintf:

static int omapimage_check_image_types(uint8_t type)
{
	if (type == IH_TYPE_OMAPIMAGE)
		return EXIT_SUCCESS;
	else {
		fprintf(stderr, "Unknown OMAP image type - %x", type);
		return EXIT_FAILURE;
	}
}

All the other image checkers and no others have this, so the fix is to
simply remove the fprintf.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: John Rigby <john.rigby@linaro.org>
CC: Aneesh V <aneesh@ti.com>
CC: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:34:00 +02:00
080a46eaf1 omap: fix gpio related build breaks
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2011-09-04 11:33:36 +02:00
c8fc4284cf gpio:samsung: s5p_ suffix add for GPIO functions (C210_universal)
This is a cosmetic patch, which is changing the gpio_ prefix to
s5p_gpio_.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-09-03 22:40:47 +02:00
beb7f27a0d SMDKV310: MMC SPL: Remove unwanted dummy functions
Removed dummy functions in "mmc_spl/board/samsung/smdkv310/mmc_boot.c",
@mmc_boot.c
void do_undefined_instruction(struct pt_regs *pt_regs);
void do_software_interrupt(struct pt_regs *pt_regs);
void do_prefetch_abort(struct pt_regs *pt_regs);
void do_data_abort(struct pt_regs *pt_regs);
void do_not_used(struct pt_regs *pt_regs);
void do_fiq(struct pt_regs *pt_regs);
void do_irq(struct pt_regs *pt_regs);

not required as called conditionally in start.S
@start.S
\#ifdef CONFIG_SPL_BUILD
_undefined_instruction: .word _undefined_instruction
_software_interrupt:    .word _software_interrupt
_prefetch_abort:        .word _prefetch_abort
_data_abort:            .word _data_abort
_not_used:              .word _not_used
_irq:                   .word _irq
_fiq:                   .word _fiq
_pad:                   .word 0x12345678 /* now 16*4=64 */
\#else
_undefined_instruction: .word undefined_instruction
_software_interrupt:    .word software_interrupt
_prefetch_abort:        .word prefetch_abort
_data_abort:            .word data_abort
_not_used:              .word not_used
_irq:                   .word irq
_fiq:                   .word fiq
_pad:                   .word 0x12345678 /* now 16*4=64 */
\#endif
e.g.
undefined_instruction:
	get_bad_stack
	bad_save_user_regs
	bl      do_undefined_instruction

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
2011-09-03 22:40:47 +02:00
ebbc84af5e SMDKV310: Fix undefined reference error
Fix buld error:
undefined reference to '__image_copy_end' and `save_boot_params'.

start.o: In function `_image_copy_end_ofs':
mmc_spl/board/samsung/smdkv310/start.S:44: undefined reference to `__image_copy_end'
start.o: In function `reset':
mmc_spl/board/samsung/smdkv310/start.S:137: undefined reference to `save_boot_params'

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-09-03 22:40:47 +02:00
0e74b56518 SMDKV310: Fix build error for smdkv310 board
Fix build error for smdkv310 board:

board/samsung/smdkv310/smdkv310.c:126: undefined reference to `gpio_set_pull'

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-09-03 22:40:47 +02:00
ef5d9eb925 gpio:samsung s5p_ suffix add for GPIO functions
This change is driven by need of general gpio_* functions,
which as their parameter are accepting the GPIO pin number, NOT
block and pin.

This makes the code alike to omap, and allows for using more
generic frameworks (e.g. software I2C).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-09-03 22:40:47 +02:00
9070872bb3 mmc: S5P: Support DMA restarts at buffer boundaries
Currently if a DMA buffer straddles a buffer alignment boundary
(512KiB) then the DMA engine will pause and generate a DMA
interrupt.  Since the DMA interrupt is not enabled it will hang
the MMC driver.

This patch adds support for restarting the DMA transfer.  The
SYSTEM_ADDRESS register contains the next address that would have
been read/written when a boundary is hit.  So we can read that
and write it back.  The write triggers the resumption of the
transfer.

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tested-by : Jaehoon Chung <jh80.chung@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-09-03 22:40:47 +02:00
34d34b88b6 SMDKV310: Fix host compilation of mkv310_image
Fix compilation of mkv310_image host tool

tools/mkv310_image.c: In function 'main':
tools/mkv310_image.c:67: error: 'S_IRUSR' undeclared (first use in this function)
tools/mkv310_image.c:67: error: (Each undeclared identifier is reported only once
tools/mkv310_image.c:67: error: for each function it appears in.)
tools/mkv310_image.c:67: error: 'S_IWUSR' undeclared (first use in this function)
tools/mkv310_image.c:67: error: 'S_IRGRP' undeclared (first use in this function)
tools/mkv310_image.c:67: error: 'S_IWGRP' undeclared (first use in this function)
tools/mkv310_image.c:67: error: 'S_IROTH' undeclared (first use in this function)
tools/mkv310_image.c:67: error: 'S_IWOTH' undeclared (first use in this function)

resulting from a 'make smdkv310_config'.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-09-03 22:40:46 +02:00
15c2e2c0ea arm: fix bd pointer dereference prior initialization
gd->bd pointer has been used prior been initialized.
Move the relevant code after the initialization.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-09-03 22:40:46 +02:00
b2b8f98f88 arm, lib/board.c: use gd->ram_size instead of bd->bi_memsize
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Albert Aribaud <albert.u.boot@aribaud.net>
2011-09-03 22:40:46 +02:00
8b5a4bcaa0 mx5: Remove CONFIG_L2_OFF and CONFIG_SYS_L2CACHE_OFF
CONFIG_L2_OFF is obsolete after the following commit:

e47f2db537
armv7: rename cache related CONFIG flags
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:
CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF

Since imx5 does not provide L2 cache operations(Enable/Disable)
Simply remove CONFIG_L2_OFF and CONFIG_SYS_L2CACHE_OFF

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc:Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-09-03 22:40:46 +02:00
d321b64d64 MX31: removed warnings due to clock.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-03 22:40:46 +02:00
23b3ae0fe8 integrator: convert to new build system
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the Integrator AP/CP, i.e.
the ones that did not just say "unsupported core module" in
split_by_variant.sh. If more core modules need to be supported
they are easy to add.

We delete all the old cruft in Makefile and MAKEALL that was
working around the old way of building boards. We create a
unique config file per board to satisfy the build system, but
they are just oneliners that include the existing
integratorap.h and integratorcp.h configs.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:46 +02:00
9ecefbfe26 integratorcp: make the board compile
This defines the requires CONFIG_SYS_* variables to make the
Integrator CP board compile.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:46 +02:00
bc87d76419 integratorap: remove hardcoded 32MB memory cmdline
The default configuration for the Integrator AP forces memory to be
32 MB on the command line to the kernel, while we have perfect
information and detection of the actual memory size in the ATAGs.
Delete the confusion.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:46 +02:00
c53e4b74f7 integratorap: support some rudimentary commands
This adds support for a subset of the default commands for the
Integrator, however since the card does not have Ethernet (unless
you plug in a PCI card) we can not use the default command set.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:46 +02:00
e005754bf4 integratorap: support the hush shell
Give us some kind of sane shell environment so the bootloader can
be used.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:45 +02:00
26c82638c9 integratorap: support relocation
The integrator board was apparently never converted over to support
relocation until now. After this the integrator u-boot both compiles
and boots on the Integrator AP.

This also fixes the SDRAM memory size detection.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:45 +02:00
a46877cc47 integratorap: make the compile work again
The integratorap/cp config for u-boot was outdated and would not
even compile, so fix the obvious missing bits for it to start
building. After this "make ap920t_config/make all" starts working
again.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:45 +02:00
34fe8281d7 arm: lib: memcpy: Do not copy to same address
In some cases (e.g. bootm with a elf payload which is already at the right
position) there is a in place copy of data to the same address. Catching this
saves some ms while booting.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-09-03 22:40:45 +02:00
2141e14428 arm: omap: innovator: use common code for machine type
Innovator and H2 boards used machine_is_* macros for setting the machine
type. These macros are expanded in compile time and thus leaves
unreachable code (though gcc might optimize it).
Switch them to use common code for machine type setting.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-09-03 22:40:45 +02:00
221a0666db arm: nvidia and smdk6400: use common code for machine type
NVIDIA boards and Samsung SMDK6400 already use a local variant of
CONFIG_MACH_TYPE option.
Switch to use the new common code.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-09-03 22:40:45 +02:00
f37586bb14 MAKEALL ARMv7: Use boards.cfg
Use the boards from boards.cfg for building ./MAKEALL ARMV7.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2011-09-03 22:40:45 +02:00
5cfeec5125 atmel: Update support of board AT91SAM9M10G45-EK to new style
Based on earlier work by Alex Waterman <awaterman@dawning.com>.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2011-09-03 22:40:45 +02:00
55d11d22ca AT91: fix at91sam9g45.h to include USB Host defines
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-09-03 22:40:45 +02:00
eb6e608b32 make pm9g45 buildable for v2011.06 release
Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>

changed at91_serial_hw_init to at91_seriald_hw_init
2011-09-03 22:40:45 +02:00
684a567ace make pm9263 buildable for v2011.06 release
Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
2011-09-03 22:40:44 +02:00
58fb6020c1 atmel: update at91sam9m10g45 SoC support to new style
Based on earlier work by Alex Waterman <awaterman@dawning.com>.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2011-09-03 22:40:44 +02:00
f47316a8ba pm9261: compiles with the AT91 reworked scheme
Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
2011-09-03 22:40:44 +02:00
65b0f87a80 tny_a9260/tny_a9g20: update board to the new AT91 organization
Cc: Albin Tonnerre <tonnerrealbin@gmail.com>
CC: Gregory Hermant <gregory.hermant@calao-systems.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2011-09-03 22:40:44 +02:00
6785c7c84a sbc35_a9g20: update board to the new AT91 organization
Cc: Albin Tonnerre <tonnerrealbin@gmail.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>

Removed SBC35 from MAKEALL
2011-09-03 22:40:44 +02:00
0cb77bfa7a at91: reworked support for meesc board
The meesc board support was broken. Within this opportunity, I completely
reworked the board files.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Matthias Fuchs <Matthias.Fuchs@esd.eu>
2011-09-03 22:40:44 +02:00
dc344589de MIPS: mips32: fix wrong loop bound in flush_cache()
The issue is found when calling flush_cache() with zero "size" argument.
The bound of loop is miscalculated in this case and flush_cache() enters
a wrong flushing loop.

Signed-off-by: Yao Cheng <saturdaycoder@gmail.com>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-09-03 10:43:45 +09:00
a1118d6042 MPC8xx: fix build problem for ETX094 board
Commit 7616e78 "Add Ethernet hardware MAC address framework to usbnet"
increased the code size and broke building for the ETX094 board.
Adjust the linker script to make it build again.

While we are at it, remove unused u-boot.lds.debug

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-08-31 22:38:20 +02:00
b91a9d9d4d phy.c: make less verbose - turn printf() into debug()
The PHY driver was too verbose and corrupted the boot message display
like this:

	...
	Net:   TSEC0 connected to Marvell 88E1111S
	TSEC1 connected to Marvell 88E1111S
	TSEC0, TSEC1
	...

Turn printf() into debug() so we het the expected output again:

	...
	Net:   TSEC0, TSEC1
	...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
2011-08-31 22:35:27 +02:00
bd061a5214 Merge branch 'master' of git://git.denx.de/u-boot-sh
* 'master' of git://git.denx.de/u-boot-sh:
  sh: add calling mmc_initialize in board.c
  sh: sh7757lcr: Add KEEP order to start.o section
  usb: r8a66597: Fix argument mistake of inl
  sh: Clean up rsk7264 board settings
  sh: sh2a: Add sh2a optimize to config.mk
  sh: Fix rsk7203 alignment problem
  sh: Add support for SH2A freestanding build
  sh: Add Renesas rsk7264 board
2011-08-26 15:55:03 +02:00
98e99e5a48 Merge branch 'master' of git://git.denx.de/u-boot-ubi
* 'master' of git://git.denx.de/u-boot-ubi:
  ubifs: Fix bad free() sequence in ubifs_finddir()
2011-08-26 15:54:14 +02:00
fe0ddffac1 sh: add calling mmc_initialize in board.c
Some SH have MMC controller. So, if we need it, we have to call
the mmc_initialize().

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:09 +09:00
d61cd3708e sh: sh7757lcr: Add KEEP order to start.o section
The sh7757lcr has a local u-boot.lds because the sh7757lcr is only
supported the SPI booting.
This patch refers from the commit "sh: Add KEEP order to start.o section"
(commit ID: b52da2aed8).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:09 +09:00
8f6d5f6af9 usb: r8a66597: Fix argument mistake of inl
Fail in build, because argument of inl used in r8a66597_read_fifo is wrong.

r8a66597.h:441:35: error: macro "inl" passed 2 arguments, but takes just 1
In file included from r8a66597-hcd.c:25:
r8a66597.h: In function ‘r8a66597_read_fifo’:
r8a66597.h:441: error: ‘inl’ undeclared (first use in this function)
r8a66597.h:441: error: (Each undeclared identifier is reported only once
r8a66597.h:441: error: for each function it appears in.)

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:09 +09:00
efa4e1b98a sh: Clean up rsk7264 board settings
Adjusted default settings so that we can boot zImages and uImages.
Removed unused settings, use default commands and where possible
calculate all other settings.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:09 +09:00
8cc44418b8 sh: sh2a: Add sh2a optimize to config.mk
Only the optimization of sh2 had been supported up.
This adds the optimization of sh2a.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
c4f07be21c sh: Fix rsk7203 alignment problem
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
eeb84df6e4 sh: Add support for SH2A freestanding build
SH2A toolchains often only provide an fdpic version of libgcc. This
can't be used with bare-metal software like U-Boot, so this patch
provides the necessary functions extracted from libgcc.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
7fbeb6422d sh: Add Renesas rsk7264 board
The rsk7264 (also know as rsk2+sh7264) is an SH2A based board
with 64MB NAND flash and 64MB SDRAM. It is very similar to the
rsk7203 board.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
3267bc1b2b ubifs: Fix bad free() sequence in ubifs_finddir()
Free private_data member element before freeing file structure.
This was causing malloc to crash. Also remove unnecessary variable
assigments as file structure gets free'd as well.

Signed-off-by: Rod Boyce <uboot@teamboyce.co.uk>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-08-19 17:21:02 +02:00
80b350a7ab usb: increase non-bulk timeout for slow chipsets.
If you take a look at 96820a35, you'll see the original timeout was
CONFIG_SYS_HZ.  Which is 1000.  After the mentioned change, non-bulk timeout
was changed to 100.  This causes timeout failures on the dreamplug platform
when trying to initialize the usb microsd reader.

Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-08-08 22:34:57 +02:00
2a94dda0e7 USB: Move USB_PRINTF() out of ifdef in usb_scan_devices()
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-08-08 22:00:12 +02:00
01a97d45d1 USB: Set portnr so USB1.1 and 1.0 devices work on EHCI controllers
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-08-08 21:46:04 +02:00
0b09f54a26 usb: r8a66597: Fix argument mistake of inl
Fail in build, because argument of inl used in r8a66597_read_fifo is wrong.

r8a66597.h:441:35: error: macro "inl" passed 2 arguments, but takes just 1
In file included from r8a66597-hcd.c:25:
r8a66597.h: In function ‘r8a66597_read_fifo’:
r8a66597.h:441: error: ‘inl’ undeclared (first use in this function)
r8a66597.h:441: error: (Each undeclared identifier is reported only once
r8a66597.h:441: error: for each function it appears in.)

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-08 21:40:40 +02:00
093498669e Put common autoload code into auto_load() function
This is a small clean-up patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Eric Bénard <eric@eukrea.com>
2011-08-08 21:05:23 +02:00
4fdbcf8113 Add documentation for USB Host Networking
This describes what it is for, devices supported, how to enable for your
board in U-Boot, setting up the server, and notes about MAC addresses.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Eric Bénard <eric@eukrea.com>
2011-08-08 21:05:23 +02:00
7616e78508 Add Ethernet hardware MAC address framework to usbnet
Built-in Ethernet adapters support setting the mac address by means of a
ethaddr environment variable for each interface (ethaddr, eth1addr, eth2addr).

This adds similar support to the USB network side, using the names
usbethaddr, usbeth1addr, etc. They are kept separate since we don't want
a USB device taking the MAC address of a built-in device or vice versa.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Eric Bénard <eric@eukrea.com>
2011-08-08 21:05:23 +02:00
291391bed5 Add support for SMSC95XX USB 2.0 10/100MBit Ethernet Adapter
The SMSC95XX is a USB hub with a built-in Ethernet adapter. This adds support
for this, using the USB host network framework.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Eric Bénard <eric@eukrea.com>
2011-08-08 21:05:23 +02:00
fa82f871c8 Convert ISO-8859 files to UTF-8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-08-04 23:34:02 +02:00
eccfb49046 mpc5200: digsy_mtc: fix extension board EEPROM I2C address for rev5
On newer rev5 hardware the extension board EEPROM I2C address
has been changed to 0x54. Make this I2C address configurable
depending on CONFIG_DIGSY_REV5 so that extention board presence
detection works correctly on newer hardware.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-08-04 23:32:33 +02:00
780f13a9e1 hwmon: do not init sensors on startup
The U-Boot Design Principles[1] clearly say:

  Initialize devices only when they are needed within U-Boot, i.e. don't
  initialize the Ethernet interface(s) unless U-Boot performs a download
  over Ethernet; don't initialize any IDE or USB devices unless U-Boot
  actually tries to load files from these, etc. (and don't forget to
  shut down these devices after using them - otherwise nasty things may
  happen when you try to boot your OS).

So, do not initialize and read the sensors on startup.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Holger Brunck <holger.brunck@keymile.com>
2011-08-04 23:30:38 +02:00
fb6440ee9b Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  drivers/rtc: add Marvell Integrated RTC
  Armada100: Add Board Support for Marvell GuruPlug-Display
  Armada100: MFP macro naming correction
  arm: auto gen asm-offsets.h for mb86r0x
  spear: fix build errors for spear3xx/spear600 platforms
  cosmetic: arm: lib/board.c: Coding Style cleanup
  ARM: versatile: fix board support
  SMDKV310: Enable device tree support
  SMDKV310: MMC_SPL: Fix building when using "make O="
  arm: a320: enable tagged list support
  arm: a320: fix multiline comment style
  ARMv7: u8500_href: Add missing header to fix compiler warning
  Removed unused define, CONFIG_ARMV7.
  avr32: add grasshopper (ICnova AP7000) board
  AT91/SPI: fix atmel_dataflash_spi.c to allow building without warnings
  MAKEALL: remove AT91 boards that are in boards.cfg
  AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master
  AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
  AT91: Board fix for AT91SAM9261-EK
  AT91: SoC fix at91sam9261_matrix.h
  AT91: Makes AT91SAM9RL-EK build correctly against u-boot-atmel/master
  AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
  AT91: change common at91sam9261 files to compile with new scheme
  AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
  a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
  README: fix arm920t/at91 path
  net/eth.c: drop obsolete at91rm9200 support
  README.at91-soc: remove AT91(RM9200) joining notice
  a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
  MAKEALL: remove obsolete at91rm9200 soc
  ARM: remove obsolete at91rm9200
  omap4: clock init support for omap4460
  omap4: support TPS programming
  omap: reuse omap3 gpio support in omap4
  omap4: sdram init changes for omap4460
  omap4: add omap4460 revision detection
  mkimage: Add OMAP boot image support
  omap: add MMC and FAT support to SPL
  omap: add basic SPL support
  armv7: start.S: fixes and enhancements for SPL
  omap4: automatic sdram detection
  omap4: calculate EMIF register values
  omap4: add sdram init support
  omap4: add clock support
  omap4: add OMAP4430 revision check
  omap4: cleanup pin mux data
  omap4: utility function to identify the context of hw init
  DA8xx: fix LPSC constants
  DA8xx: switch an enum to defines for consistency
  DA8xx: add MMC/SD controller addresses
  DaVinci EMAC: declare function for all DA8xx CPUs
  DA8xx: add generic GPIO driver
  DaVinci: rename gpio_defs.h to gpio.h
  omap3evm: eth: Include functions only when necessary
  omap3evm: Update ethernet reset sequence for Rev.G board
  omap3evm: eth: split function setup_net_chip
  omap3: Include array definition only when it is used
  omap730p2: fix build breaks
  omap2420h4: fix build breaks
  omap1610inn: fix build breaks
  omap1510inn: fix build breaks
  omap5912osk: fix build breaks
  omap1610h2: fix build breaks
2011-08-04 23:05:07 +02:00
01b0f50060 video: mb862xx: change controller detection message
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-08-04 22:55:35 +02:00
d7ffd27a6e video: mb862xx: support Coral-PA controller
Add detection of Coral-PA and configure Coral CCF an MMR parameters
using CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx_MMR macros.
Use CCF and MMR parameters for Coral-P Eval. Board if the appropriate
macros weren't defined.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-08-04 22:55:34 +02:00
3b4a226305 video: Add SHARP LQ084S3LG01 LCD support on P1022DS
The SHARP LQ084S3LG01 is a TFT LCD used on the P1022DS (revision "C") board.
This device only supports 800x600 resolution, so if that resolution is selected,
assume that this is the device.  The device is attached to the LVDS port
on the P1022DS board.

The existing 800x600 entry (for the PDM360NG board) is actually 800x480,
so we fix that.  To support two different 800x resolutions, the Y-resolution
is now passed to fsl_diu_init() and both values are used to pick the proper
fb_videomode structure.

The data for the 800x600 video mode is originally from Jiang Yutang.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
2011-08-04 22:55:33 +02:00
b608b95753 drivers/rtc: add Marvell Integrated RTC
This driver can be used for kirkwood SoCs by enabling CONFIG_RTC_MV.  Tested on
Global Scale Technologies Dreamplug.

Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
2011-08-04 19:00:34 +02:00
26749582d5 Armada100: Add Board Support for Marvell GuruPlug-Display
This patch adds basic board support with DRAM and UART functionality

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
Acked-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
2011-08-04 19:00:32 +02:00
82b13f7326 Armada100: MFP macro naming correction
MFP macros for UART3 updated.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-08-04 19:00:28 +02:00
9023ae3059 Merge commit '7b2fac7654f7420c2787f74ec3b1540fa3b343e9' 2011-08-04 18:59:59 +02:00
7a619ab30a arm: auto gen asm-offsets.h for mb86r0x
auto gen asm-offsets.h for mb86r0x

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-08-04 13:56:55 +02:00
a39fcfb24b spear: fix build errors for spear3xx/spear600 platforms
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Vipin Kumar <vipin.kumar@st.com>
2011-08-04 13:50:01 +02:00
ceb1d6d75e cosmetic: arm: lib/board.c: Coding Style cleanup
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
cc: Albert Aribaud <albert.u.boot@aribaud.net>
cc: <macpaul@gmail.com>
cc: Wolfgang Denk <wd@denx.de>
2011-08-04 13:39:25 +02:00
d388298a59 ARM: versatile: fix board support
Versatile board is used as example to run u-boot under qemu.
The patch fixes relocation for all versatile boards and adds
a versatileqemu target to be used under qemu.

Patch tested only under qemu, not on real boards.
Tested with QEMU emulator version 0.14.50.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Alessandro Rubini  <rubini-list@gnudd.com>
CC: Loïc Minier <loic.minier@linaro.org>
2011-08-04 13:12:44 +02:00
07407d97f0 SMDKV310: Enable device tree support
Enable passing a flattened device tree to the kernel.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
2011-08-04 12:57:37 +02:00
43c52f9f94 SMDKV310: MMC_SPL: Fix building when using "make O="
Fixes dependency build error with "make O=" option.
"make O=" option is used to specify output directory.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
2011-08-04 12:57:34 +02:00
fd90b0d050 arm: a320: enable tagged list support
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-08-04 12:57:31 +02:00
7899147b55 arm: a320: fix multiline comment style
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-08-04 12:57:27 +02:00
2dd97488ee ARMv7: u8500_href: Add missing header to fix compiler warning
Fix the compiler warning

u8500_href.c: In function 'hrefplus_mmc_power_init':
u8500_href.c:258: warning: implicit declaration of function 'prcmu_i2c_read'
u8500_href.c:265: warning: implicit declaration of function 'prcmu_i2c_write'

by adding the missing header file.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2011-08-04 12:57:20 +02:00
75f980bdb3 Removed unused define, CONFIG_ARMV7.
Signed-off-by: Christopher Harvey <charvey@matrox.com>
2011-08-04 12:49:37 +02:00
ad7a1785f7 avr32: add grasshopper (ICnova AP7000) board
The grasshopper board is a neat avr32 evaluation kit produced by In-Circuit
GmbH.
See http://www.ic-board.de/product_info.php?info=p75_ICnova-AP7000-Base.html
for detailed information about this device.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
0c42791476 AT91/SPI: fix atmel_dataflash_spi.c to allow building without warnings
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
97a470da03 MAKEALL: remove AT91 boards that are in boards.cfg
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
cd46b0f2b9 AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master
Rework for AT91SAM9263-EK, makes it build again.
Based on the work for AT91SAM9260-EK.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
ffa280fa53 AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
f7aea46d6a AT91: Board fix for AT91SAM9261-EK
Fix board part of AT91SAM9261-EK according to the new scheme

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
673d39f6e4 AT91: SoC fix at91sam9261_matrix.h
Fix at91sam9261_matrix.h according to the new scheme.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
2011-08-03 13:00:56 +02:00
21d671d0c4 AT91: Makes AT91SAM9RL-EK build correctly against u-boot-atmel/master
Rework for AT91SAM9RL-EK, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: added changes to MAKEALL

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
f87353f0d9 AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
3ad24802aa AT91: change common at91sam9261 files to compile with new scheme
Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
b38d634b39 AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
c23e5e7eda a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
The CONFIG_AT91RM9200_USART is an remnant of
18ed5e9550 which deleted the
at91rm9200_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:56 +02:00
6eb0921a75 README: fix arm920t/at91 path
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:56 +02:00
d1228ea900 net/eth.c: drop obsolete at91rm9200 support
All available at91rm9200 boards have migrated to ar920t/at91 and
therefore to CONFIG_NET_MULTI.
The obsolete at91rm9200_miiphy_initialize() was removed in "ARM: remove
obsolete at91rm9200".

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:56 +02:00
15d93d7c06 README.at91-soc: remove AT91(RM9200) joining notice
Since all currently supported at91rm9200 boards are migrated to at91
support the joining notice can be removed.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
8312af9f90 a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of
at91rm9200 arch code in arm920t.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
ea5c50f297 MAKEALL: remove obsolete at91rm9200 soc
Since complete at91rm9200 SoC device was droped (due to replacement with
common at91 code) this parameter can safely be removed.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
cf05528238 ARM: remove obsolete at91rm9200
The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
b4dc644291 omap4: clock init support for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
d506719f7f omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
25223a68e5 omap: reuse omap3 gpio support in omap4
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
924eb369e3 omap4: sdram init changes for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
5ab12a9eeb omap4: add omap4460 revision detection
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
3decb14abe mkimage: Add OMAP boot image support
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
  SPL framework

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
8cf686e19b omap: add MMC and FAT support to SPL
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
  can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
  and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
  payload size and load address from this header. If the
  header is not detected assume u-boot.bin as payload

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
bcae721162 omap: add basic SPL support
- Provide alternate implementations of board_init_f()
  board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
  it to board config header from config.mk

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
033ca72438 armv7: start.S: fixes and enhancements for SPL
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
  vector

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
1e463866f5 omap4: automatic sdram detection
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.

This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.

Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
095aea293b omap4: calculate EMIF register values
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.

For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
2ae610f030 omap4: add sdram init support
Add support for the SDRAM controller (EMIF).

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
3776801d0a omap4: add clock support
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails

This work draws upon previous work done for x-loader by:
	Santosh Shilimkar <santosh.shilimkar@ti.com>
	Rajendra Nayak <rnayak@ti.com>

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
ad577c8a48 omap4: add OMAP4430 revision check
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
469ec1e353 omap4: cleanup pin mux data
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
  to SoC directory). Will help in having single SPL for all
  boards.
- Non-essential part(the pins not essential for u-boot to function)
  need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
d2f18c275e omap4: utility function to identify the context of hw init
The basic hardware init of OMAP4(s_init()) can happen in 4
different contexts:
 1. SPL running from SRAM
 2. U-Boot running from FLASH
 3. Non-XIP U-Boot loaded to SDRAM by SPL
 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
    Configuration Header feature

What level of hw initialization gets done depends on this
context. Add a utility function to find this context.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
732590b397 DA8xx: fix LPSC constants
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
37dbd1c1ad DA8xx: switch an enum to defines for consistency
There are two main sets of LPSC constants, depending on the processor
family.  The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
2c6e0b07dc DA8xx: add MMC/SD controller addresses
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
da51e424d2 DaVinci EMAC: declare function for all DA8xx CPUs
The function davinci_emac_mii_mode_sel() is defined in
board/davinci/common/misc.c for any DA8xx CPU which has
CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being
declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board.
This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC
is enabled.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
f517afd5df DA8xx: add generic GPIO driver
Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned
on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface
specified in <asm/gpio.h> . The driver has support for both manipulating
GPIO pins as well as automatically configuring the pin multiplexor
registers to set the pin function to GPIO.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
0bf98f1d13 DaVinci: rename gpio_defs.h to gpio.h
In preparation for a generic GPIO driver for the DA8xx processors,
rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files
which include it.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
5626f336ca omap3evm: eth: Include functions only when necessary
These functions are not required when CONFIG_CMD_NET
is not defined:
  - setup_net_chip()
  - reset_net_chip()
  - board_eth_init()

This patch wraps them in #ifdef CONFIG_CMD_NET...#endif

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
c06825873d omap3evm: Update ethernet reset sequence for Rev.G board
The GPIO pin used for resetting the external LAN chip has
changed for Rev.G board.

The patch uses generic gpio API instead of direct access
to corresponding registers.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:18 +02:00
6921b314a8 omap3evm: eth: split function setup_net_chip
In current implementation, the function sets up the ethernet
chip and resets it. The steps to reset depend upon the board
revision.

The patch moves the reset actions to new function reset_net_chip().

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:18 +02:00
80bb756dbe omap3: Include array definition only when it is used
The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().

Enclose definition of this array in #ifdef...#endif for
the same.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:18 +02:00
8370befc19 video: Use memset instead of loop
There is a optimized version of memset in u-boot available so use it instead
of the hand written loop version.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-08-02 22:42:02 +02:00
d50a8f45c9 Merge branch 'master' of git://git.denx.de/u-boot-mmc
* 'master' of git://git.denx.de/u-boot-mmc:
  Revert "AT91:mmc:fix multiple read/write error"
2011-08-02 22:39:36 +02:00
7432ed05a3 sf: macronix: disable write protection when initializing
Signed-off-by: Simon Guinot <sguinot@lacie.com>
2011-08-02 22:02:34 +02:00
9445ce0873 sf: spansion: add support for S25FL129P_64K
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2011-08-02 22:01:27 +02:00
2d722e0549 mtd/spi/macronix.c: add MX25L4005 and MX25L8005
Add support of MX25L4005 and MX25L8005 according to the datasheet
http://www.mct.net/download/macronix/mx25l8005.pdf

This patch has been tested with MX25L4005 and MX25L8005

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-08-02 21:54:40 +02:00
0886eef9ba Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
  net/4xx: Install interrupt handler after driver registration
2011-08-02 21:52:21 +02:00
1902692aa0 Merge branch 'master' of git://git.denx.de/u-boot-blackfin
* 'master' of git://git.denx.de/u-boot-blackfin:
  Blackfin: jtag-console: fix timer usage
  Blackfin: switch to common display_options()
  Blackfin: serial: move early debug strings into .rodata section
  Blackfin: adi boards: also set stderr to nc with helper
  Blackfin: update anomaly lists to latest public info
  Blackfin: serial: convert to bfin_{read,write} helpers
  Blackfin: split out async setup
  Blackfin: adi boards: enable pretty flash progress output
  Blackfin: drop unused dma.h header from start code
  Blackfin: portmux: allow header to be included in assembly files
  Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support
  Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings
  Blackfin: sync MMR read/write helpers with Linux
  Blackfin: gpio: optimize free path a little
  Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR
  Blackfin: uart: fix printf warning
  Blackfin: add init.elf helper code
  Blackfin: dont reset SWRST on newer bf526 parts
  Blackfin: adi boards: enable multi serial support by default
  Blackfin: uart: add multiple serial support
  Blackfin: uart: move debug buffers into local bss
2011-08-02 21:46:53 +02:00
cc4e6d2556 Merge branch 'master' of git://git.denx.de/u-boot-mips
* 'master' of git://git.denx.de/u-boot-mips:
  README: update MIPS related informations
  MIPS: make cache operation mode configurable
  MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
  MIPS: INCA-IP: rename inca-swap-bytes host tool
2011-08-02 21:45:45 +02:00
982db890e8 tqm834x.c: fix compiler warning
Fix:

tqm834x.c:299: warning: passing argument 1 of 'get_ram_size' discards
qualifiers from pointer target type

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-08-02 12:49:17 -05:00
33a6b9e90b environment.h: fix warning: "CONFIG_ENV_IS_EMBEDDED" redefined
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
2011-08-01 15:20:16 +02:00
e6a857da74 fpga: constify to fix build warning
Fix compiler warning:

cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type

Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Murray Jensen <Murray.Jensen@csiro.au>
Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
2011-08-01 15:19:40 +02:00
f6c019c454 Unify timer_init() and cpu_init() prototypes
Clean up some duplicated prototype declarations.
Get rid of now useless AVR32 initcalls.h file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Graeme Russ <graeme.russ@gmail.com>
2011-08-01 15:10:15 +02:00
5589073a16 ARM: fix error: conflicting types for 'setenv'
Also remove bogus comment.

Signed-off-by: Zhong hongbo <bocui107@gmail.com>
Changed commit message
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
2011-08-01 15:07:06 +02:00
5791293986 cfb_console.c: checkpatch cleanup
Fix the following:

ERROR: do not initialise statics to 0 or NULL
ERROR: do not use assignment in if condition

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-08-01 15:03:07 +02:00
72c65f6f6d cfb_console.c: drop custom PRINTD() and use debug() instead
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-08-01 14:58:55 +02:00
64e40d72ea Cosmetic: reformat drivers/video/cfb_console.c
Run cfb_console.c through indent and manually fix some of he
deficiencies of the automatic line breaking.

Fix multiline comments, excessive line spacing and such.

No changes to code done.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-08-01 14:58:41 +02:00
92bbd64e39 README: update MIPS related informations
Amend section 'Directory Hierarchy' for current MIPS directory.
Describe config options for MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
ab2a98b117 MIPS: make cache operation mode configurable
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
7185adb48e MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
60b74bde92 MIPS: INCA-IP: rename inca-swap-bytes host tool
The INCA-IP SoC belongs to the Lantiq XWAY SoC product portfolio.
For the upcoming support of other Lantiq SoC devices this tool should
not solely depend on the INCA-IP board.

Rename the tool to xway-swap-bytes and add an config option
to enable compilation optionally.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:25:41 +09:00
dd620b2633 Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
  powerpc/8xxx: Remove dependency on <usb.h>
  powerpc/85xx: enable USB2 gadget mode for corenet ds board
  powerpc/85xx: verify the device tree before booting Linux
  MPC8xxx: drop redundant boot messages
  powerpc/85xx: Fix build failure for P1023RDS
  powerpc/p2041rdb: Enable SATA support
  powerpc/85xx: Cleanup handling of PVR detection for e500/e500mc/e5500
  powerpc/85xx: Fix up clock_freq property in CAN node of dts
  85xx: enable FDT support for STX SSA board
  powerpc/85xx: provide 85xx flush_icache for cmd_cache
  powerpc/p2041rdb: Enable backside L2 cache support
  powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
  powerpc/85xx: Add support for P2041[e] XAUI in SERDES
  powerpc/85xx: Rename P2040 id & SERDES to P2041
  powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
  powerpc/85xx: Fix setting of EPAPR_MAGIC value
2011-07-30 01:39:14 +02:00
84b5e8022e Constify getenv(), setenv() and hash code functions
This is needed to get rid of build warnings like

main.c:311: warning: passing argument 2 of 'setenv' discards qualifiers from pointer target type

which result from commit 09c2e90 "unify version_string".

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andreas Biemann <andreas.devel@googlemail.com>
2011-07-30 01:37:44 +02:00
7ca9296e1b README: udate Coding Style description to current status quo
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-07-30 01:36:25 +02:00
5756736176 powerpc/8xxx: Remove dependency on <usb.h>
We used <usb.h> for USB_MAX_DEVICE.  However this requires we actual
build in support for USB into u-boot (which should not be required for
device tree fixup).

At this time no FSL SoC that utilizies this code (83xx/85xx) has more
than 2 USB controllers.  So we replace USB_MAX_DEVICE with a local
define FSL_MAX_NUM_USB_CTRLS.

If/when a device shows up with more than 2 controllers we can easily
bump this value or refactor into a proper define per SoC.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 16:04:56 -05:00
a3a3e7b2c3 powerpc/85xx: enable USB2 gadget mode for corenet ds board
to make USB2 worked in gadget mode, we need to set it's 'dr_mode' to
'peripheral' in hwconfig, but driver starts scan from 'usb1', it'll break
out if it cannot find 'usb1', so drop the 'else' clause to make driver scan
all the 'usbx'.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:43 -05:00
90f89f099d powerpc/85xx: verify the device tree before booting Linux
Introduce ft_verify_fdt(), a function that is called after the device tree
has been fixed up, that displays warning messages if there is a mismatch
between the physical addresses of some devices that U-Boot has configured
with what the device tree says the addresses are.

This is a particular problem when booting a 36-bit device tree from a
32-bit U-Boot (or vice versa), because the physical address of CCSR is
wrong in the device tree.  When the operating system boots, no messages are
displayed, so the user generally has no idea what's wrong.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
21cd5815a7 MPC8xxx: drop redundant boot messages
Current code would print RAM size information like this:

	DRAM:  DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)

Turn a number of printf()s into debug() to get rid of the redundant
"DDR: " string like this:

	DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
74d9d5239f powerpc/85xx: Fix build failure for P1023RDS
When we added the fman fdt fixup we forgot to fixup the P1023RDS
platform.  So we would get:

fdt.c: In function 'fdt_fixup_fman_firmware':
fdt.c:465:15: error: 'CONFIG_SYS_FMAN_FW_LENGTH' undeclared (first use in this function)
fdt.c:465:15: note: each undeclared identifier is reported only once for each function it appears in

Add the needed #defines in P1023RDS.h to fix this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
aa7f281ce4 powerpc/p2041rdb: Enable SATA support
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
8992738db7 powerpc/85xx: Cleanup handling of PVR detection for e500/e500mc/e5500
At some point we broke the detection of e500v1 class cores.  Fix that
and simply the code to just utilize PVR_VER() to have a single case
statement.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
65bb8b060a powerpc/85xx: Fix up clock_freq property in CAN node of dts
Fix up the device tree property associated with the Flexcan clock
frequency. This property is used to calculate the bit timing parameters
for Flexcan.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
28415b62d1 85xx: enable FDT support for STX SSA board
We also have to shift TEXT_BASE to accomodate for the additional
code size.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
0a9fe8ee7e powerpc/85xx: provide 85xx flush_icache for cmd_cache
This provides a function that will override the weak function
flush_icache to let 85xx boards to flush the icache

cc: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
2011-07-29 08:53:38 -05:00
cd420e0b2a powerpc/p2041rdb: Enable backside L2 cache support
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
acf3f8da98 powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
The P2040/P2040E have no L2 cache.  So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release.  For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
db564bccef powerpc/85xx: Add support for P2041[e] XAUI in SERDES
We add XAUI_FM1 into the SERDES tables for P2041[e] devices.  However
for the P2040[e] devices that dont support XAUI we handle this at
runtime via SVR checks.  If we are on a P2040[e] device the SERDES
functions will behave as follows:

is_serdes_prtcl_valid() will always report invalid if prtcl passed in is
XAUI_FM1.

serdes_get_prtcl() will report NONE if the prtcl in the table is set to
XAUI_FM1.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
88b91f2d3b powerpc/85xx: Rename P2040 id & SERDES to P2041
P2041 is the superset part that covers both P2040 & P2041.  The only
difference between the two devices is that P2041 supports 10g/XAUI and
has an L2 cache.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
f110fe940c powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Most DCSR registers are within 4M but the Nexus trace buffer
is located at offset 16M within the DCSR.

Configuring the LAW to be 32M to allow access to the Nexus
trace buffer. No TLB modification is required since accessing
the Nexus trace buffer from within u-boot is not required.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
70bfb032ec powerpc/85xx: Fix setting of EPAPR_MAGIC value
Had a typo in the ifdef for 85xx, should be CONFIG_MPC85xx for it to get
triggered.  Was pull in the non-BookE magic number.

Reported-by: John Cortell
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
ce0f709bcd cfb_console: fix build breakage
Commit 09c2e90c11 "unify version_string"
introduced a build breakage in cfb_console.c

---8<---
cfb_console.c:1497: warning: format '%s' expects type 'char *', but
argument 3 has type 'const char (*)[]'
--->8---

Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
2011-07-29 11:28:26 +02:00
0011401dfe Revert "AT91:mmc:fix multiple read/write error"
This reverts commit c310fc8404.

The Atmel custodian had apparently rejected this patch's approach in
another thread, so this patch reverts it for now.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-07-28 20:47:15 -05:00
40e018815d panic: remove warning "'noreturn' function does return"
since commit

commit d2e8b911c0
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Wed Jun 29 11:58:04 2011 +0000

    panic: add noreturn attribute

I see the following warnings:

vsprintf.c: In function 'panic':
vsprintf.c:730: warning: 'noreturn' function does return

for nearly all boards. This patch fixes this warning.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Mike Frysinger <vapier@gentoo.org>
2011-07-28 22:54:02 +02:00
eaf5e65af5 post, memory test: add memory_post_test() to include file
This include is needed, if this memory test is used "outside"
from post code, for example booting with nand_spl, and using
this memory test before copying u-boot code to RAM and jumping
to it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2011-07-28 22:39:26 +02:00
85f3df1c3a Fix build error causes by "unify version_string"
Commit 09c2e90 "unify version_string" introduced a build error,
fix it.

Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-07-28 22:16:57 +02:00
1103cf2f5c Removed obsolete Netstal boards
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
2011-07-28 21:45:34 +02:00
1626308797 cleanup: Fix typos and misspellings in various files.
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address

Signed-off-by: Mike Williams <mike@mikebwilliams.com>
2011-07-28 21:27:36 +02:00
2469c4b2db rules.mk: replace GNU specific \w with POSIX equivalant
If sed does not support the GNU \w regex extension, build attempts
lead to circular dependency warnings and finally build failure
(crc32.c not found). Build output before and after the patch on
FreeBSD is at:
http://lists.denx.de/pipermail/u-boot/2011-June/095235.html

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2011-07-28 21:18:49 +02:00
2901f8891d mkconfig: also create CONFIG defines with BSD sed
Parsing of boards.cfg fails on FreeBSD with the error:

sed: 1: "/=/ {s/=/\t/;q } ; { s/ ...": extra characters at the end
of q command

BSD sed expects commands to be on seperate 'lines', hence it expects
an additional ; before the closing brackets.
BSD sed does not support \t, replaced by literal tab.

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-28 21:18:06 +02:00
5bce5dc33d include/compiler.h: typedef ulong for FreeBSD
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2011-07-28 21:17:11 +02:00
3ce04d9bba net/4xx: Install interrupt handler after driver registration
Only install der 4xx-EMAC interrupt handlers *after* the core
network driver is registered.

This problem was noticed on the APM Taishan 440GX board, where
the board hung upon bootup after displaying "Net:".

Signed-off-by: Stefan Roese <sr@denx.de>
2011-07-28 19:16:16 +02:00
09c2e90c11 unify version_string
This patch removes the architecture specific implementation of
version_string where possible. Some architectures use a special place
and therefore we provide U_BOOT_VERSION_STRING definition and a common
weak symbol version_string.

Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Peter Pan <pppeterpppan@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-28 17:22:53 +02:00
3857f8f5a5 Correct ih_os for u-boot.img
Provide appropriate '-O u-boot' while doing mkimage
for u-boot.img

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-28 17:17:36 +02:00
7816f2cf81 mkimage: add UBL header support for booting davinci cpus
creating an u-boot.ubl file, which contains the UBL Header
needed for booting from NAND with the RBL from TI. For more
information read doc/README.ublimage.

Signed-off-by: Heiko Schocher <hs@denx.de>
2011-07-28 16:52:41 +02:00
b9af6d3d82 MAINTAINERS: integrator+versatile boards
- Take maintainership of the unlisted integratorap board
- Orphan the boards maintained by Peter Pearse, as he has retired
  from ARM

Cc: Philippe Robin <philippe.robin@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-07-28 16:50:37 +02:00
12b5723b3e mv_common.c: don't compile reset_environment if ENV_IS_NOWHERE
Doesn't make sense to provide this function to boards which defined
CONFIG_ENV_IS_NOWHERE. Such a board gets a linking error because
common/env_nowhere.c doesn't define saveenv().

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-28 16:48:58 +02:00
ee44fb298d fpga: support FPP Cyclone configuration
Support FPGAs which use Fast Passive Parallel configuration

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
2011-07-28 16:47:11 +02:00
20a9f8e254 fpga: add #define for Altera Cyclone EP3C5
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
2011-07-28 16:46:18 +02:00
191c0b87b1 cmd_mac: fix help for 'mac read'
In the only implementation of 'mac read', it doesn't display the
contents of the eeprom as the help indicated unless compiled with
DEBUG. It only re-reads the contents of the EEPROM into memory.
Displaying the contents of the EEPROM is done by passing no
arguments to 'mac'.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 16:41:06 +02:00
6a33a3c2c9 cmd_mac: cleanup help
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 16:38:08 +02:00
f18361b9a8 altera: fix printf typo
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 16:33:25 +02:00
f9a78b8d4f cosmetic: spell fixes etc.
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 16:32:50 +02:00
857d9ea67a Let source cross-reference targets follow symbolic links
Tell 'find' to follow symbolic links, so that files under include/asm
and arch/$(ARCH)/include/asm/arch are added to the indexing file list.

Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 16:30:52 +02:00
c7506c2b03 km/common: i2c deblock: enabled print of i2c deblock status
Enable printout of i2c deblocking status if chips were in block
state or deblocking failed.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-28 15:40:48 +02:00
4daea6fff3 km/common: moved eeprom config to pbec specific part
Moved eeprom config to specific part, to allow bigger eeprom write pages
for km_kirkwood designs. Write page only used for env eeprom in std use
cases. 24C128 has page size of 64bytes -> 8 time faster.

Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-28 15:40:02 +02:00
8519d18035 km/common: use u-boot.kwb for u-boot update function on arm
Now we use the standard u-boot make to build the Kirkwood binary.
The output file is u-boot.kwb. So use this name for the tftp
update function to avoid confusion, because this is the binary we
need on Kirkwood.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-28 15:39:44 +02:00
9485e779a3 km/common: add printings to boardid commands
Be verbose if do_setboardid was called and print
correct names of variables in do_checkboardidhwk.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-28 15:39:18 +02:00
d961c188b2 ext2: Simplify partial sector access logic
Previously reading or writing zero full sectors (reading the end of
one sector and the beginning of the next for example) was special
cased and involved stack allocating a second sector buffer.  This
change uses the same code path for this case as well as when there
are a non-zero number of full sectors to access.  The result is
easier to read and reduces the maximum stack used.

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 15:36:32 +02:00
9bac35f57b ext2: Fix checkpatch violations
Fix all checkpatch violations in the low level Ext2 block
device reading code.  This is done in preparation for cleaning
up the partial sector access code.

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 15:36:10 +02:00
c00e17c7fe common: move BUILD_BUG_ON define to common.h
see discussion also here:
http://patchwork.ozlabs.org/patch/75309/

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Holger Brunck <holger.brunck@keymile.com>
2011-07-27 23:45:37 +02:00
f7fb46a8f3 km/common: enable cramfs and cramfs cmdline
All the km boards uses CRAMFS images where the kernel is stored.
This isn't architecture specific because we use it on ARM and
POWERPC.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:40 +02:00
1adfd9dd3f powerpc/km82xx: remove 82xx specific functions from common.c
Common code should be valid for more than one architecture,
therefore the km82xx specific code was removed from common.c.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:35 +02:00
fc9a7441d9 km/common: remove fdt_(gs)et_node_and_value
This code is unused and therefore dead code.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:30 +02:00
4f745bf4c8 km/common: move ivm functions from to ivm.c
The file common.c grows in the past. So move the IVM specific
code into an ivm.c file.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:20 +02:00
ba8be32a8f km/common: remove saveenv from do_checkboardidhwkey
This is unneeded here because we save the environment when
the board boots the first time. At this time we have set
the values already.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:15 +02:00
e819582571 km/common: force set ethaddr after reading IVM
The ethaddr is stored inside the inventory eeprom. During
boottime this value was read out and the ethaddr variable was
set. Previously this was only done if it ethaddr == NULL but
this is wrong for our ARM boards. Because ethaddr is at this
stage never NULL for ARM due to the random calculation of a
MAC address in mvgbe.c.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:11 +02:00
c98d3b4f48 km/common: remove obsolete defines and header
These defines and the header keymile_hdlc_enet.h are obsolete
due to the removed hdlc code.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:44:07 +02:00
b648bfc212 km/common: simplify debug environment
The debug environment which is stored in textfiles in the
scripts directory was reworked. Two usecase are now present
which can be executed simply from the default environment:
run develop: this configures the environment to setup the
             rootfs via nfs
run ramfs: this configures the environment to setup the
           rootfs in ram

Each architecture now has a "arch" variable which is used
to load the architecture specific debug scripts and to set
the rootpath for NFS.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:43:33 +02:00
0333cfe618 km/common: add test sw starting variable
The test SW is started when the test_bank variable is set.

Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2011-07-27 23:43:17 +02:00
db0bb572d1 km/common: rework and simplify default environment
This is the second step to simplify and decrease the default
environment for the keymile boards. The release usecase formaly
used to set the production environment was removed and the default
configuration is now the production environment. So the formar
environment variable "release" which has done a lot of things
in the past, simply erase the current environment and do a reset
which forces u-boot to setup the default environment again.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
2011-07-27 23:42:53 +02:00
54193c5d81 part_dos: fix crash with big sector size
Apple iPod nanos have sector sizes of 2 or 4 KiB, which crashes U-Boot when it
tries to read the MBR into 512-byte buffer situated on stack. Instead use the
variable length arrays to be safe with any large sector size.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
2011-07-27 23:41:33 +02:00
4204298db0 post, memorytest: add support for none powerpc archs
change bd->bi_memsize to gd->ram_size, as this is defined
on all archs, so this post test can used on none powerpc
archs too.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <hs@denx.de>
cc: Mike Frysinger <vapier@gentoo.org>
2011-07-27 23:38:08 +02:00
90ea601536 post, memorytest: fix if vstart is not = 0x0
Signed-off-by: Heiko Schocher <hs@denx.de>
2011-07-27 23:37:01 +02:00
af5de5d772 net: Add SMSC89128 support
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-07-27 23:27:43 +02:00
348de314be digsy_mtc: move board into vendor dir and add vendor logo
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-07-27 23:27:07 +02:00
ceb3970e91 mpc5200: digsy_mtc: add support for writing 'appreg' value
Up to now only reading 'appreg' value was implemented in the
digsyMTC special 'mtc appreg' command. Extend the command to
support writing appreg value, too.

Signed-off-by: Werner Pfister <Pfister_Werner@intercontrol.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-27 23:26:46 +02:00
a59996e3f7 mpc5200: digsy_mtc: add support for graphic extension board
Add detection and initialisation for graphic extension board
and support splash screen when booting. Enable "bmp" command
in the board configuration and provide "disp" command to
be able to switch the display on/off.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-27 23:26:20 +02:00
ee8fa20f54 phylib: Detect link on 10G devices correctly
gen10g_startup() had 2 bugs:

1) It had a boolean logic error in checking the MMD mask, and
always checked all of them.

2) It checked devices which don't actually report link state, which
meant that it would never believe the link was fully up.

Fix the boolean logic, and then mask the MMD mask so only link-reporting
devices are checked.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2011-07-27 23:21:25 +02:00
09e3a67dec bootp: add ntpserver option to bootp request
Signed-off-by: Luuk Paulussen <luuk.paulussen@alliedtelesis.co.nz>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Ben Warren <biggerbadderben@gmail.com>
2011-07-27 23:20:46 +02:00
7130a579fd add command fitupd to run an update from a FIT image
Command calls update_tftp() analogous to automatic update described
in doc/README.update.

Usage:
fitupd [addr]
        - run update from FIT image at addr
          or from tftp 'updatefile'

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
2011-07-26 16:58:48 +02:00
8d6b73202c automatic update from FIT image: add optional address parameter
Current update_tftp() flow:
  1.) fetch "updatefile" from defined TFTP server
  2.) check if FIT format
  3.) flash contained images

Add an address parameter to update_tftp(). If this address is non-zero,
skip the TFTP transfer and use the image at this address.
Also extend update_tftp() to return success/fail.

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
2011-07-26 16:58:44 +02:00
975afc34dd post: fix indendation/brace confusion
The post.c code is missing braces around the pass case, and as a
result, the diagnostic function will post both fail and pass for
a failed test.  The reason for this bug is probably the incorrect
indentation used, so when reading the code it seems like there
are proper braces.

Indent the code to the correct depth and put proper braces around
the "else" branch of the "if" statement.

Signed-off-by: James Kosin <jkosin@intcomgrp.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:57:49 +02:00
14ce91b115 fix unconfigured out-of-tree building of tools
Now that the tools target requires the generated version header file, we
need to make sure that the directory it writes to exists.  In a configured
tree, this is taken care of for us.  But in an unconfigured one, the dir
does not yet exist causing a build error like so:

/bin/sh: line 5: ..../u-boot_build/include/version_autogenerated.h.tmp: No such file or directory

So create the dir for this file before we attempt to generate it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:55:20 +02:00
d2e8b911c0 panic: add noreturn attribute
Since panic() never returns, we should add an appropriate attribute to
let gcc improve optimization around it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:54:22 +02:00
afd077bd14 simplify clobber behavior with out-of-tree builds
The targets/prerequisites are the same here; the rules only differ in
the recipes.  So move the if logic protection to the recipe part so we
can keep the rest the same.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:53:23 +02:00
f6f7395eb3 post: new nor flash test
This adds a simple flash test to automatically verify erasing,
writing, and reading of sectors.  The code is based on existing
Blackfin tests but generalized for everyone to use.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:49:44 +02:00
d2397817f1 post: use ARRAY_SIZE
We've got a handy dandy macro already for calculating the number of
elements in an array, so use it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:48:33 +02:00
9146d13821 post: add gpio hotkey support
Now that we have the generic GPIO layer, we can easily provide a common
implementation for the post_hotkeys_pressed() function based on it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:47:39 +02:00
7b826c2f35 serial: implement common uart post test
The current arch/driver specific UART posts basically boil down to setting
the UART to loop back mode, then reading and writing data.  If we ignore
the loop back part, the rest can be built upon the existing common serial
API.  So let's do just that.

First add a call back for serial drivers to implement loop back control.
Then write a post test that walks all of the serial drivers, puts them
into loop back mode, and verifies that reading/writing at all the diff
baud rates is OK.

If a serial driver doesn't support loop back mode (either it can't or
it hasn't done so yet), then skip it.  This should allow for people to
easily migrate to the new post test with existing serial drivers.

I haven't touched the few already existing uart post tests as I don't
the hardware or knowledge of converting them over.  So I've marked the
new test as weak which will allow the existing tests to override the
default until they are converted.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:39:03 +02:00
1c9a5606d8 serial: drop useless ctlr field
The multi serial support has a "ctlr" field which almost no one uses,
but everyone is forced to set to useless strings.  So punt it.

Funny enough, the only code that actually reads this field (the mpc8xx
driver) has a typo where it meant to look for the SCC driver.  Fix it
while converting the check to use the name field.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Heiko Schocher <hs@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Tom Rix <Tom.Rix@windriver.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Craig Nauman <cnauman@diagraph.com>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Mahavir Jain <mjain@marvell.com>
2011-07-26 16:38:05 +02:00
c52b4f7945 serial: drop serial_register return value
The serial_register function never fails (always return 0), so change it
to a void function to avoid wasting overhead on it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:38:01 +02:00
6c768ca746 serial: push default_serial_console to drivers
Rather than sticking arch/board/driver specific logic in the common
serial code, push it all out to the respective drivers.  The serial
drivers declare these funcs weak so that boards can still override
things with their own definition.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Heiko Schocher <hs@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Tom Rix <Tom.Rix@windriver.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Craig Nauman <cnauman@diagraph.com>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Mahavir Jain <mjain@marvell.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
2011-07-26 16:37:57 +02:00
6262e4e74e disable security warning flags when possible
Some toolchains enable security warning flags by default, but these don't
really make sense in the u-boot world.  Such as forcing changes like:
	-printf(foo);
	+printf("%s", foo);

So disable the flags when the compiler supports them.  Linux has already
merged a similar change in their build system.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:35:50 +02:00
e84ffddbce cmd_usage: constify
The usage helper doesn't modify the command, so constify its input arg.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:34:41 +02:00
147c7169e8 constify default env
I can't see any obvious needs for the default environment to be writable,
so make it const.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:34:22 +02:00
c3eb3fe490 env: allow people to force envcrc building
For people who want to manually extract the embedded environment so that
it can be manually packed into the final u-boot image, add a config opt
to force building of the envcrc tool.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:33:49 +02:00
8875bdb341 sf: sst: support newer standardized flashes
Newer SST flashes have dropped the Auto Address Increment (AAI) word
programming (WP) modes in favor of the standard page programming mode
that most flashes now support.  So add a flags field to the different
flashes to support both modes with new and old styles.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:32:59 +02:00
66ecb7cdb0 sf: unify write disable commands
Every spi flash uses the same write disable command, so unify this in
the common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fixed commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-07-26 16:32:15 +02:00
fba2c44e46 sf: eon/stmicro: inline useless ID defines
These defines are used in only one place, so just inline them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:31:07 +02:00
b06afa75fa sf: kill off now-unused local state
Now that the common spi_flash structure tracks all the info that these
drivers need, kill off their local state indirection and use just what
the common code provides.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:29:59 +02:00
d4aa500913 sf: unify write funcs
Once we add a new page_size field for write lengths, we can unify the
write methods for most of the spi flash drivers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:29:27 +02:00
2744a4e688 sf: unify write enable commands
Every spi flash uses the same write enable command, so unify this in
the common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-26 16:28:21 +02:00
d8e392d95f MAKEALL: add -h/--help options
Convert all the comments at the top of the file into help text for people
to easily get at with standard -h/--help options.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-26 16:25:32 +02:00
17659d7de9 Timer: Remove reset_timer_masked()
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
2011-07-26 14:54:15 +02:00
53fc43c682 Timer: Fix at91rm9200/spi.c timer usage 2011-07-26 14:53:55 +02:00
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
e110c4fe44 Timer: Allow reset_timer() only for systems with low resolution timers 2011-07-26 14:52:53 +02:00
5c8404aff1 Timer: Remove set_timer completely 2011-07-26 14:52:17 +02:00
dcac25a05e Remove calls to set_timer outside arch/
There is no need to use set_timer(). Replace with appropriate use of
get_timer()

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-07-26 14:51:13 +02:00
525728b414 spl: add support for omap-common libraries
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:44:42 +02:00
efcc6096d6 spl: Add support for common libraries and drivers
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:44:38 +02:00
401bb30b6d replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:34 +02:00
05bad4aa56 scaled down version of generic libraries for SPL
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:25 +02:00
5253418a77 arm: adjust PLATFORM_LIBS for SPL
Signed-off-by: Aneesh V <aneesh@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-07-26 14:43:48 +02:00
5df2ee27db Hook SPL build-system into toplevel Makefile
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:43:04 +02:00
c8f9c302c2 Extend build-system for SPL framework
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:42:40 +02:00
6a11cf48a5 spl: add initial support for a generic SPL framework
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:42:12 +02:00
4e0fbb98fc Use ALL-y style instead of ifeq blocks for better readability
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:41:43 +02:00
a16a84b725 Fix: watchdog timed out, if using md5 command
* Fix: if using md5 command watchdog timed out
* change function call md5(..) to the watchdog-safe variant
  md5_wd(..) to support watchdog reset

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
2011-07-26 14:36:07 +02:00
3e499b6ab0 Fix: watchdog timed out, if using sha1 command
* Fix: if using sha1 command watchdog timed out
* change function call sha1_csum(..) to the watchdog-safe variant
  sha1_csum_wd(..) to support watchdog reset

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
2011-07-26 14:33:10 +02:00
d0c4c33850 command/cmd_cache.c: Add optional flush arguments
It might be desirable to have the ability to flush icache/dcache
within u-boot, this patch gives each arch the ability to provide
a flush_dcache/flush_icache function to let u-boot flush caches
from the prompt

Signed-off-by: Matthew McClintock <msm@freescale.com>
2011-07-26 14:30:08 +02:00
0e0996ef4f common/cmd_ximg.c: add ifdef protection for gzip uncompression
Print a message if we do not have the ability to uncompress a gzip
image. Before, u-boot would just assume the routines were available

Signed-off-by: Matthew McClintock <msm@freescale.com>
2011-07-26 14:11:21 +02:00
df3fc52608 disk/part.c: Make features optional
If we don't want to build support for any partition types we can now
add #undef CONFIG_PARTITIONS in a board config file to keep this from
being compiled in. Otherwise boards assume this is compiled in by
default

Signed-off-by: Matthew McClintock <msm@freescale.com>
2011-07-26 14:10:14 +02:00
07c07635b4 miiphy: use strncpy() not sprintf()
In miiphy_register() the new device's name was initialised by passing a
string parameter as the format string to sprintf(). As this would cause
problems if it ever contained a '%' symbol, switch to using strncpy()
instead.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Andy Fleming <afleming@freescale.com>
2011-07-26 14:00:24 +02:00
9e9579bbf9 powerpc: Fix device tree padding associated with ramdisk
When booting with a ramdisk we bump the amount of memory reserved for
the device tree by FDT_RAMDISK_OVERHEAD.  However we did not increase
the actual size in the device tree blob to match.

Its possible on boundary cases that we dont have enough memory according
to the device tree blob and get errors like:

WARNING: could not set linux,initrd-end FDT_ERR_NOSPACE

We can easily fix this by setting the device tree size at the same time
we bump the amount of memory reserved for the device tree.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-26 13:55:10 +02:00
3cfe695489 Revert "post, memory test: add memory_post_test() to include file"
This reverts commit f18714dd61
which cuases compile errors on a number of boards.

Signed-off-by:  Wolfgang Denk <wd@denx.de>
2011-07-26 13:53:35 +02:00
39c6e039a0 Fix: if using crc32 command watchdog timed out
* Fix: if using crc32 command watchdog timed out
* change function call crc32(..) to the watchdog-safe variant
  crc_32_wd(..) to support watchdog reset

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
2011-07-26 00:40:50 +02:00
b038db852b memcpy/memmove: Do not copy to same address
In some cases (e.g. bootm with a elf payload which is already at the right
position) there is a in place copy of data to the same address. Catching this
saves some ms while booting.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-26 00:28:44 +02:00
942e31437d scsi/ahci: add support for non-PCI controllers
Add support for AHCI controllers that are not PCI based.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Wolfgang Denk <wd@denx.de>
2011-07-26 00:06:58 +02:00
e5a6c79d42 scsi/ahci: ata id little endian fix
The ata id string always needs swapping, not just on BE machines.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2011-07-26 00:06:08 +02:00
f18714dd61 post, memory test: add memory_post_test() to include file
This include is needed, if this memory test is used "outside"
from post code, for example booting with nand_spl, and using
this memory test before copying u-boot code to RAM and jumping
to it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2011-07-25 23:43:35 +02:00
fafc245401 andes_spi: add andes_spi interface
andes_spi is an spi interface developed by Andes Tech.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-25 23:40:11 +02:00
370d1e3e58 cosmetic, main: correct indentation/spacing issues
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
2011-07-25 23:28:05 +02:00
3c766dccb3 cosmetic, main: clean up declarations of abortboot
Remove an unneeded prototype declaration from the top of main.c,
and use plain inline instead of __inline__ to please checkpatch.

Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
2011-07-25 23:27:43 +02:00
f0ece9e934 net: designware: fix uninitialized phy_addr usage
When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable
never gets initialized which causes random behavior at runtime and a
gcc warning.  So set it by default to the stored phy address.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>

Fix commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-07-25 22:20:10 +02:00
ee7f5bfd12 net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabled
The ctrl variable is only used when autoneg support is disabled, so only
declare it under those conditions to avoid an unused variable warning.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
2011-07-25 22:19:40 +02:00
67d668bf92 autostart: unify duplicated logic into the bootm code
Rather than having a bunch of random commands handle autostart behavior,
unify the logic in a single place.  This also fixes building of these

different commands when bootm is disabled.

Acked-by: Matthew McClintock <msm@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-25 22:18:26 +02:00
51f924e5ce board/tqm85xx: Create and tear down TLB for get_ram_size()
We need a TLB entry to call get_ram_size(); the common code doesn't create
one until *after* fixed_sdram() has determined the size.  So we set up tlbs
for the max possible size and tear them down once we're done with
get_ram_size(); the common 85xx code will then set up a final set of tlb
entries for the *actual* detected size of ddr.

This prevents us from having TLB entries that are larger than DDR sitting
around for very long, which is not a recommended scenario.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 03:07:47 -05:00
9cdfe28106 powerpc/mpc85xx: Add clear_ddr_tlbs function
This is useful when we just want to wipe out the TLBs.  There's currently
a function that resets the ddr tlbs to a different value; it is changed to
utilize this function.  The new function can be used in conjunction with
setup_ddr_tlbs() for a board to temporarily map/unmap the DDR address
range as needed.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 03:07:47 -05:00
ffadc441bc fman: insert the Fman firmware into the device tree
The Fman device tree node binding allows for the entire Fman firmware binary
data to be embedded in the device tree.  This eliminates the need to have
NOR flash mapped to Linux just so that the Fman driver can see the firmware.

The location of the Fman firmware is taken from the 'fman_ucode' environment
variable.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 03:07:43 -05:00
e4e7e42803 powerpc/85xx: add support the ePAPR "phandle" property
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle".  To facilitate the migration from
"linux,phandle" to "phandle", we update fdt_qportal() to use the new
function, fdt_create_phandle().  This function abstracts the creation of
phandle properties.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 01:49:39 -05:00
74fac70084 Merge branch 'master' of git://git.denx.de/u-boot-mmc
* 'master' of git://git.denx.de/u-boot-mmc:
  mmc: rescan fails on empty slot
  AT91:mmc:fix multiple read/write error
  mmc: Access mode validation for eMMC cards > 2 GiB
  mmc: sh_mmcif: add support for Renesas MMCIF
  mmc: fix the condition for MMC version 4
  MMC: add marvell sdhci driver
  MMC: add sdhci generic framework
  MMC: add erase function to both mmc and sd
  MMC: unify mmc read and write operation
  mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
  mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
2011-07-19 22:27:07 +02:00
1bb5e9071f Fix typo from 'mb_alloc' -> 'lmb_alloc'
Signed-off-by: Matthew McClintock <msm@freescale.com>
2011-07-19 10:38:33 +02:00
cdf1a2328a Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  ARM: MX5: Fix broken leftover TO-2 errata workaround
  MX31: Cleanup clock function
  scb9328: Add ARM relocation support
  am3517evm: change console device from ttyS2 to ttyO2
  Remove volatile qualifier in get_ram_size() calls
  TI: TNETV107X Fix Build Error
  ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
  arm: add CONFIG_MACH_TYPE setting and documentation
  arm: add __ilog2 function
  Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
  EfikaMX: Enable EXT2 booting
  EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
  EfikaMX: Use correct imximage.cfg
  MX27: Update to autogenerated asm-offsets.h
  MX5: Update to autogenerated asm-offsets.h
  imx: Add support for zmx25 board
  imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
  imx: Add auto generation of asm-offsets.h for imx25
  imx: Add support for USB EHCI on imx25
  imx: Use correct imx25 reset.c
  imx: Add get_tbclk() function for imx25
  ARM: Update maintainer of board scb9328
  mx27: Make the UART port number explicit
  build: Add targets for auto gen of asm-offsets.h and use it in imx35
  mx31pdk: cosmetic: Fix line over 80 characters
2011-07-18 21:04:56 +02:00
1c6d00c2b5 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/p2041rdb: Add p2041rdb board support
  powerpc/85xx: Fix detection of P1017E
  powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum define
2011-07-18 21:03:08 +02:00
6e25b6ce5d ARM: MX5: Fix broken leftover TO-2 errata workaround
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.

Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
9f008bb47d MX31: Cleanup clock function
The patch provide the same API used with other i.MX
processors and get rid of mx31_ functions.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
386393c680 scb9328: Add ARM relocation support
This patch fixes compiler errors due to missing definitions of
CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR.

It also does some cleanup: CONFIG_SYS_TEXT_BASE was moved to scb9328.h,
obsolete config.mk was removed. The scb9328 board has 1 DRAM bank, so don't
ask for more banks. CONFIG_NR_DRAM_BANKS will ever be 1.

Signed-off-by: Torsten Koschorrek <koschorrek@synertronixx.de>
2011-07-18 14:41:48 +02:00
49473adabf am3517evm: change console device from ttyS2 to ttyO2
the serial device names have been changed from ttySx to ttyOx, so the
console device name should be also changed to support the latest kernel
versions.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Acked-by: Vaibhav Hiremath<hvaibhav@ti.com>
2011-07-18 12:35:52 +02:00
4f1d1b7d1e powerpc/p2041rdb: Add p2041rdb board support
P2041RDB Specification:
-----------------------
Memory subsystem:
 * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
 * 128 Mbyte NOR flash single-chip memory
 * 256 Kbit M24256 I2C EEPROM
 * 16 Mbyte SPI memory
 * SD connector to interface with the SD memory card

Ethernet:
 * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
 * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)

PCIe:
 * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
 * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2

SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors

USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces

I2C:
 * I2C1: Real time clock, Temperature sensor, Memory module
 * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-17 11:03:36 -05:00
c518fc0281 powerpc/85xx: Fix detection of P1017E
Had a typo such that P1017E would not be detected correctly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-17 10:33:05 -05:00
a55d23ccf6 Remove volatile qualifier in get_ram_size() calls
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-07-17 17:11:53 +02:00
930f335592 TI: TNETV107X Fix Build Error
This patch provides SDRAM base address and initial stack address to fix
build errors.

Signed-off-by: Chan-Taek Park <c-park@ti.com>
2011-07-17 17:01:32 +02:00
22193540c1 ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-17 11:24:35 +02:00
7eb29398c0 arm: add CONFIG_MACH_TYPE setting and documentation
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-07-17 11:07:01 +02:00
a28afca57d Add uboot "fdt_high" enviroment variable
Add a new "fdt_high" enviroment variable. This can be used to control (or prevent) the
relocation of the flattened device tree on boot. It can be used to prevent relocation
of the fdt into highmem.  The variable behaves similarly to the existing "initrd_high"
variable.

Signed-off-by: David A. Long <dave.long@linaro.org>
2011-07-16 11:58:30 -04:00
0b9bc73711 arm: add __ilog2 function
Add __ilog2 function for ARM. Needed for ahci.c

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-16 13:00:11 +02:00
a60d1e5b8e Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2011-07-16 11:55:00 +02:00
8fd01b8f6b mmc: rescan fails on empty slot
Fail in 'mmc rescan' if mmc_init() returns error

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:22 -05:00
c310fc8404 AT91:mmc:fix multiple read/write error
According to datasheet,set block count before multiple read/write.

Signed-off-by: elen.song <elen.song@atmel.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:21 -05:00
b1f1e821d3 mmc: Access mode validation for eMMC cards > 2 GiB
This patch provides handling of the two way handshake when SEND_OP_COND
(CMD1) is send to mmc card. It is necessary to inform eMMC card if the
host can work with high capacity cards (Jedec JESD84-A441, point 7.4.3).

The extra flag MMC_MODE_HC (high capacity) is added to indicate if the
host is capable of handling the high capacity eMMC cards.

Since this change is added to the generic mmc framework, then it requires
other boards to indicate if their mmc controllers can handle high capacity
cards. As it is now - the old behaviour of the framework is preserved.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:21 -05:00
afb35666da mmc: sh_mmcif: add support for Renesas MMCIF
Some Renesas SuperH have MMCIF module. This driver supports it.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:21 -05:00
639b7827d1 mmc: fix the condition for MMC version 4
Fix the problem that if we use the chip of MMC version 4 and
the capacity is smaller than 2GB or equal, the mmc->capacity is
invalid. According to the JEDEC Standard, the value of ext_csd's
capacity is valid if the value is more than 2GB.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:20 -05:00
e75787d903 MMC: add marvell sdhci driver
This could support both armada100 and pantheon serial in the mainline,
while this driver also be tested to support upcoming mg, mmp2 and mmp3
hardware.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:19 -05:00
af62a55785 MMC: add sdhci generic framework
Nowdays, there are plenty of mmc driver in uboot adopt the sd standard
host design, aka as sdhci. It is better to centralize the common logic
together to better maintenance.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:18 -05:00
e6f99a5611 MMC: add erase function to both mmc and sd
Erase is a very basic function since the begin of sd specification is
announced. Although we could write a bulk of full 0xff memory to the
range to take place of erase, it is more convenient and safe to
implement the erase function itself.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-15 20:29:17 -05:00
6be95ccf9f MMC: unify mmc read and write operation
mmc read and write command has so many in common, unfiy those two to
force consistency across the those two.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:00 -05:00
83800959a8 mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:28:59 -05:00
21ef6a109c mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:28:56 -05:00
a8d2a75d72 fdt: introduce fdt_create_phandle()
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle".  To facilitate the migration from
"linux,phandle" to "phandle", introduce function fdt_create_phandle(),
which creates a phandle in a given node.  For now, we create both the
"phandle" and "linux,phandle" properties.  A later version of this
function will remove support for "linux,phandle".

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14 21:43:45 -04:00
b3606f141e fdt: add prototype for fdt_increase_size()
Add a prototype for fdt_increase_size() so that anyone can call it.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14 21:43:40 -04:00
bb682001f1 fdt: introduce fdt_verify_alias_address() and fdt_get_base_address()
Introduce two functions, fdt_verify_alias_address() and
fdt_get_base_address(), which can be used to verify the physical address
of a device in a device tree.

fdt_get_base_address() returns the base address of an SOC or PCI node.

fdt_verify_alias_address() prints a message if the address of a node
specified by an alias does not match the given physical address.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14 21:43:36 -04:00
d1c6314887 libfdt: Implement property iteration functions
For ages, we've been talking about adding functions to libfdt to allow
iteration through properties.  So, finally, here are some.

I got bogged down on this for a long time because I didn't want to
expose offsets directly to properties to the callers.  But without
that, attempting to make reasonable iteration functions just became
horrible.  So eventually, I settled on an interface which does now
expose property offsets.  fdt_first_property_offset() and
fdt_next_property_offset() are used to step through the offsets of the
properties starting from a particularly node offset.  The details of
the property at each offset can then be retrieved with either
fdt_get_property_by_offset() or fdt_getprop_by_offset() which have
interfaces similar to fdt_get_property() and fdt_getprop()
respectively.

No explicit testcases are included, but we do use the new functions to
reimplement the existing fdt_get_property() function.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

This was extracted from the DTC commit:
73dca9ae0b9abe6924ba640164ecce9f8df69c5a Mon Sep 17 00:00:00 2001

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-14 21:10:34 -04:00
05a22ba096 Support ePAPR compliant phandle properties
Currently, the Linux kernel, libfdt and dtc, when using flattened
device trees encode a node's phandle into a property named
"linux,phandle".  The ePAPR specification, however - aiming as it is
to not be a Linux specific spec - requires that phandles be encoded in
a property named simply "phandle".

This patch adds support for this newer approach to dtc and libfdt.
Specifically:

	- fdt_get_phandle() will now return the correct phandle if it
          is supplied in either of these properties

	- fdt_node_offset_by_phandle() will correctly find a node with
          the given phandle encoded in either property.

	- By default, when auto-generating phandles, dtc will encode
          it into both properties for maximum compatibility.  A new -H
          option allows either only old-style or only new-style
          properties to be generated.

	- If phandle properties are explicitly supplied in the dts
	  file, dtc will not auto-generate ones in the alternate format.

	- If both properties are supplied, dtc will check that they
          have the same value.

	- Some existing testcases are updated to use a mix of old and
          new-style phandles, partially testing the changes.

	- A new phandle_format test further tests the libfdt support,
          and the -H option.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

This was extracted from the DTC commit:
d75b33af676d0beac8398651a7f09037555a550b Mon Sep 17 00:00:00 2001

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-14 21:03:53 -04:00
4e0499ebb0 EfikaMX: Enable EXT2 booting
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-07-14 15:41:25 +02:00
745525f61c EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
Signed-off-by: Jana Rapava <fermata7@gmail.com>
2011-07-14 15:41:25 +02:00
7103fa6970 EfikaMX: Use correct imximage.cfg
Signed-off-by: Jana Rapava <fermata7@gmail.com>
2011-07-14 15:41:25 +02:00
727024a9a4 MX27: Update to autogenerated asm-offsets.h
On i.MX27, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
0edf8b5b2f MX5: Update to autogenerated asm-offsets.h
On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
39f0023e81 imx: Add support for zmx25 board
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an
optional NAND flash.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
95d185894b imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25
board.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
23210d8e1b imx: Add auto generation of asm-offsets.h for imx25
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
dddb7c9ffd imx: Add support for USB EHCI on imx25
Adding support for USB host on imx25 using the internal PHY. Changing the name
of base address define for imx31 to get some unification.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
dea5387d98 imx: Use correct imx25 reset.c
imx25 used the wrong reset.c from imx27

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
a7f39e7c22 imx: Add get_tbclk() function for imx25
Need this function for autoboot keyd

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
81d668ea90 ARM: Update maintainer of board scb9328
Signed-off-by: Torsten Koschorrek <koschorrek@synertronixx.de>
2011-07-14 15:41:24 +02:00
3f7bfbdd3c mx27: Make the UART port number explicit
mx27_uart_init_pins does the IOMUX setting for UART1 port.

Change the function name to make the UART port number explicit.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-14 15:41:24 +02:00
f456445f29 build: Add targets for auto gen of asm-offsets.h and use it in imx35
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-14 15:41:24 +02:00
026ca6591b mx31pdk: cosmetic: Fix line over 80 characters
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-14 15:41:23 +02:00
1930b1037f powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum define
This erratum doesn't exist on this processor, and the workaround
spins on a non-existent register, causing boot to hang.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-13 21:27:19 -05:00
d8940a6544 Blackfin: jtag-console: fix timer usage
Reported-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
bb83875d5d Blackfin: switch to common display_options()
Use common code to output the version string rather than doing it
ourselves.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
e8e35efc8f Blackfin: serial: move early debug strings into .rodata section
Rewrite the assembly serial_early_puts() helper to place the strings
in the .rodata section rather than embedding them directly in the
.text section.  Using .text is a little simpler, but it doesn't let
people execute out of internal L1 sram (since core reads don't work
on those regions).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
fd48d59100 Blackfin: adi boards: also set stderr to nc with helper
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
bc9c64273d Blackfin: update anomaly lists to latest public info
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
b1e574d95b Blackfin: serial: convert to bfin_{read,write} helpers
Since the serial struct declares the sizes for us, no need to hardcode
them in the accessor functions.  Let the bfin_{read,write} helpers do
it for us.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
4150cec335 Blackfin: split out async setup
We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.

This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
27575587ba Blackfin: adi boards: enable pretty flash progress output
For only ~150 bytes increase in size, we can get a nice flash progress
indicator rather than just the boring dots (which don't tell too much
about overall progress).  So enable it for all ADI boards.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
ed7496349d Blackfin: drop unused dma.h header from start code
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
f75e8b32ad Blackfin: portmux: allow header to be included in assembly files
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
c94101ae9c Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support
These boards have an mmc/sd slot on them connected over SPI, so
enable the driver.

Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
fff18bee7e Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings
These boards can have an addon card plugged onto them, so enable
support for it.

Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
7ed998f629 Blackfin: sync MMR read/write helpers with Linux
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
95b4b9d97a Blackfin: gpio: optimize free path a little
When we aren't doing resource tracking, the gpio_free() function is a
stub that simply returns, so pull this logic up a level and make it an
inline stub in the header.  Now we don't have to waste time at any of
the call sites.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
272d2fc2f5 Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR
Set the default post word location to an L1 data location for all
Blackfin parts so things "just work" for most people.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
f9aee4b4b6 Blackfin: uart: fix printf warning
The code uses %i to printf a size_t when it should use %zu, otherwise
we get a warning from gcc about it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
fb5166ce35 Blackfin: add init.elf helper code
This creates a standalone ELF that executes just the Blackfin initcode.
This is useful for people who want to program the low level aspects of
the CPU (memory/clocks/etc...) and can easily be used with JTAG for
quick booting while developing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
08a82a447b Blackfin: dont reset SWRST on newer bf526 parts
The bug in the BF526 rom when doing a software reset exists only in older
silicon versions, so don't clear SWRST on newer parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
e46e8159c9 Blackfin: adi boards: enable multi serial support by default
Since this only adds less than 3KiB, enable for all ADI boards.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
635f330fc7 Blackfin: uart: add multiple serial support
This brings CONFIG_SERIAL_MULTI support to the Blackfin on-chip UARTs.
Ends up adding only ~512bytes per additional UART.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
34a6d0b84a Blackfin: uart: move debug buffers into local bss
There's no need for these saved buffers to be global symbols, or in
the data section.  So mark them static to move them into the bss.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
68d4230c3c powerpc/85xx: Add default usb mode and phy type to hwconfig
Move to use hwconfig for usb mode & phy type instead of magic
'usb_phy_type' environment variable on the following platforms:

MPC8536DS, P1020RDB, P1020RDB-PC, P1010RDB, P2020RDB, P2020RDB-PC,
P2020RDB, P3041DS, P4080DS, & P5020DS.

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
80e5c83a7e powerpc/corenet_ds: add back buffer write for NOR flash
Enable buffer write for better performance. This platform uses a NOR flash
chip which supports write buffer programming. CFI driver can query the
buffer size and use it to program the flash for best performance.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
26002826c7 powerpc/85xx: remove SERDES4 soft-reset work-around
Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a
bank soft-reset after the bank was configured and enabled, even though
enabling a bank causes it to reset.  Because the reset was required for
multiple errata, it was not properly enclosed in an #ifdef, and so was
not removed with all the other rev1 errata work-arounds.

Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
bank 2 is enabled, but this was not being done for SERDES protocols 0xF
and 0x10.  The bank reset also happened to enable bank 3 (apparently an
undocumented feature).  Simply removing the reset breaks these two
protocols.

It turns out that every time we call enable_bank(), we do want at least
one lane of the bank enabled, either because the bank is supposed to be
enabled, or because we need the clock from that bank enabled.

For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
call enable_bank(), because that array is used elsewhere to determine if
the bank is available.

Note that the side effect of these changes is that the work-arounds for
these two errata are now linked.  Specifically, if SERDES-A001 is
enabled, then we need SERDES-8 enabled as well.

Because this was the only SERDES bank soft-reset, there is no need to
implement a work-around for erratum SERDES-A003.

Also fix an off-by-one error in a printf().

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ed Swarthout <swarthou@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
23f9670f1a powerpc/mpc8xxx: Allow override DDR read-to-write turnaround time
Add this option to allow boards to override the default read-to-write
turnaround time for better performance.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-07-11 13:24:20 -05:00
86dda50484 qoriq/p1_p2_rdb: USB device-tree fixups for P1020
Resolve P1020 second USB controller multiplexing with eLBC
	- mandatory to mention USB2 in hwconfig string to select it
	  over eLBC, otherwise USB2 node is removed
	- works only for SPI and SD boot

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
636c316f9b powerpc/85xx: Specify hwconfig usage for USB controller
Specify hwconfig usage for USB mode and phy change

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
72f4980b40 powerpc/8xxx: Update USB mode device tree fixup
Modify support for USB mode fixup:
        - Add common support for USB mode and phy type
          device tree fix-up for all USB controllers
          mentioned in hwconfig string
        - Fetch USB mode and phy type via hwconfig; if not
          defined in hwconfig, then fetch them from env

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
3f7f6b8592 powerpc/85xx: Add basic support for P1023RDS board
The P1023RDS board is the reference board for the P1023 SoC.

Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
939e5bf9b3 powerpc/mpc85xx: Display a warning for unsupported DDR data rates
If DDR initialziation uses a speed table and the speed is not matched,
print a warning message instead of silently ignoring.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
79fa00af5d powerpc/corenet_ds: Fix RCW overriding for RDIMM
Allow overriding RCW for all RDIMM, not only quad-rank ones.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
4c99cb9190 powerpc/mpc8xxx: fix DDR data width checking
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has
data width and primary sdram width. The latter one has different meaning
for DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
f2d264b660 powerpc/mpc8xxx: Adding fallback to raw timing on supported boards
In case of empty SPD or checksum error, fallback to raw timing on
supported boards.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
1b3e3c4f26 powerpc/mpc8xxx: Enable calculation for fixed DDR chips
We used to have fixed parameters for soldered DDR chips. This patch
introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing
data from DDR chip datasheet, implemneted in board-specific files or header
files.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
aeb6716a12 powerpc/85xx: Fix pin muxing for second USB controller
On P1022/P1013 second USB controller is muxed with second
Ethernet controller. The current code to enable second USB
fails to properly clear pinmux bits used by ethernet. As a
result, Linux freezes when this controller is used. This
patch fixes the problem.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
c49290cd19 Adding more SPD registers
Adding byte 32 and 33

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
51d498f175 powerpc/mpc8xxx: Add 16-bit support for DDR3
Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit
DDR devices.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
d2246549c7 powerpc/mpc8xxx: check SPD length before using part number
Only use DDR DIMM part number if SPD has valid length, to prevent from
display garbage in case SPD doesn't cover these fields.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
e090aa7cf0 powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width
If the bus width is 32-bit, burst chop should be disabled and burst length
should be 8. Read from SPD or other source to determine the width.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
26fd33b9be powerpc/86xx: display boot device and bank on the MPC8610 HPCD
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
374a235d42 powerpc/85xx: Add NAND boot support for P3041/P5020DS
When booting from NAND we get the environment and FMan ucode from NAND.

Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
1f97987a51 powerpc/85xx: Add P2041 processor support
The P2041 is similar to P2040, however has a 10G port and backside L2

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
526cbff292 powerpc/p2040: Add various p2040 specific information
Add P2040 SoC specific information:
* LIODN setup
* Portal configuration
* etc

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
58b2f96e38 powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't set
Add ifdef protection for qp_info and liodn associated with Q/BMan.  Also
rearrange setting of _tbl_sz variables to utilize existing ifdef
protection for things like FMAN.

Also add protection around setup_portals() call in corenet_ds board
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
eb51f63c02 qoriq/p1_p2_rdb: Add Dual Role USB support macro for P1020RDB
Add CONFIG_HAS_FSL_DR_USB macro for P1020RDB

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
9829feffec powerpc/85xx: Fix compile errors if CONFIG_SYS_{BR,OR}0_PRELIM aren't set
Add ifdef protection in LBC code to handle the case in which
CONFIG_SYS_BR0_PRELIM and CONFIG_SYS_OR0_PRELIM arent defined for a
build.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
be1ff615ea powerpc/85xx: Fix compile errors if CONFIG_SYS_{B,Q}MAN_MEM_PHYS aren't set
Add ifdef protection in LAW & TLB code to handle the case in which
CONFIG_SYS_BMAN_MEM_PHYS or CONFIG_SYS_QMAN_MEM_PHYS arent defined for a
build.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
810cb19003 MPC83XX: Fix PCI express clock setup
On a 8308 based board it was found that the PEX_GLK_RATIO register
(programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This
was tracked to the fact that the pci express clock frequency was not being
assigned to the pciexp1_clk entry in the global data structure in file
arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in
'do_clocks' command.

Signed-off-by: Bill Cook <cook@isgchips.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:28 -05:00
f5f30dea2a powerpc/83xx: remove empty board_early_init_f()
Remove an empty board_early_init_f() from the MPC8323ERD and MPC360ERDK boards.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:28 -05:00
7fb3e7a2d6 mpc83xx: Add support for MergerBox board
Includes board config file, documentation, maintainer and boards.cfg
entries, and board specific files in vendor dir.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
03c0a92440 MPC83xx: add config options for memory setup.
CPO value and driver strength settings are board specifc.
Also allow SPD data fetch from any accessible I2C EEPROM.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
a7b8126ecd MPC83xx: add define for global half-strength enable (HSE)
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
1bda1624b0 MPC837x: set i2c1_clk
Running on mpc837x without CONFIG_FSL_ESDHC leads to
 i2c1_clk not being set at all. It is bound to clock
 of encryption module. fix this.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
9a865fff15 fsl_dma: fix support for 83xx DMA engine
Commit 359ec49319 broke support for the
Freescale DMA engine on the 83xx parts. This is due to using registers
which do not exist on 83xx. Remove the attribute register accesses from
the 83xx build.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Cc: York Sun <yorksun@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
79642098a8 Add support for Network Space v2 and parents
This patch add support for the Network Space v2 board and parents, based
on the Marvell Kirkwood 6281 SoC. This include Network Space (Max) v2
and Internet Space v2.

Additional information is available at:
http://lacie-nas.org/doku.php?id=network_space_v2

Signed-off-by: Simon Guinot <sguinot@lacie.com>
2011-07-04 10:55:28 +02:00
01fa4e8cde arm/km: add support for portl2 board
This adds support for the keymile Kirkwood BEC portl2 board. This board
relies on the km_arm (km_kirkwood) BEC.

The egiga driver is configured for a 100M full-duplex, A/N off connnection
to the backplane. This board has always ethernet present, because it is
connected to the marvell switch similar to mgcoge3un. The reset_phy
functionality is also the same to mgcoge3un.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
83b40c3146 arm/km: replace suenx targets with km_kirkwood
suen3 and suen8 were in first HW version quite different, but
now they are from a u-boot point of view similar. So these
two boards can use the same header file. Other keymile boards
differ only in the usage of the PCI interface. Therefore
a target km_kirkwood_pci was introduced. All targets use
the same header file.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
8f2827fc43 arm/km: ethernet support for mgcoge3un
The phy is also configured with "RGMII clock transitions when data
stable" and "Class A driver for the direct backplane connection".

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
680cfaf805 arm/km: use board KM_ENV_BUS for CONFIG_I2C_ENV_EEPROM_BUS
This is defined for all km_kirkwood boards and was not used up to now.
This value was the same for all boards but it could be changed for some
boards (and thus needs to be defined for every board).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
288f99b064 arm/km: remove unneeded define
CONFIG_ENV_SIZE for NAND was later in this file overwritten
because we have the environment in i2c eeprom, so remove
this define.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
b5befd8211 arm/km: fix u-boot.kwb build breakage
commit 010a958b
(arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h)
breaks building keymile arm targets, when u-boot.kwb tries to
generate the binary with mkimage. A simple make <board> or MAKEALL
succeeded because it don't try to build the kirwood binary at the end.

Due this commit we use the CONFIG_SYS_KWD_CONFIG from the
arch-kirkwood/config.h and it was removed from the board config.
But it was forgotten to include the header. Now the header is included
in km_arm.h. Some other defines were obsolete due to this include,
these are also removed in this commit.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
b31a82e95f arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSI
Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on
but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI
on in this case.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
24e50461c0 Fix compiler error for cpu at91sam9, if lowlevel init is enabled
* Fix compiler error for cpu at91sam9, if lowlevel init is enabled
* use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC

Signed-off-by: Jens Scharsig
2011-07-04 10:55:28 +02:00
221786525f atstk100x: switch to common cfi driver
This patch removes the board implemenatation for flash driver which can now
safely switched to the common cfi driver.

Compile tested for all atstk100x boards, runtime tested on atstk1002.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-07-04 10:55:27 +02:00
18ed5e9550 driver/serial: delete at91rm9200_usart
The at91rm9200_usart driver could be fully replaced by atmel_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
dbbf13ba7b cpuat91: use atmel_usart
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Eric Bénard <eric@eukrea.com>
2011-07-04 10:55:27 +02:00
5a05cb7356 eb_cpux9k2: use atmel_usart
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Jens Scharsig <js_at_ng@scharsoft.de>
Acked-by: Jens Scharsig<js_at_ng@scharsoft.de>
Tested-by: Jens Scharsig<js_at_ng@scharsoft.de> (for eb_cpux9k2 board)
2011-07-04 10:55:27 +02:00
3432a93bcd at91rm9200ek: use atmel_usart
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
d703355fd1 arm920t/at91: add at91rm9200_devices.c
This is a copy of arm926ejs/at91 api for perpherial initialisation.
At the moment we just need the usart part of the api.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
6a372e940d arm920t/at91: use new clock.c features
This patch enables the new clock features from arm920t/at91/clock.c. This
is an required step to get at91rm9200_usart replaced by atmel_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Jens Scharsig <js_at_ng@scharsoft.de>
Cc: Eric Bénard <eric@eukrea.com>
2011-07-04 10:55:27 +02:00
c3a383f5bd arm920t/at91: add clock.c
This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The
arm926ejs specialities are removed from arm920t version and vice versa.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
876ef43d2a at91rm9200.h: fix ATMEL_PMX_AA_TXD2
This patch sets the ATMEL_PMX_AA_TXD2 to the correct value.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Jens Scharsig <js_at_ng@scharsoft.de>
CC: eric@eukrea.com
Acked-by: Eric Bénard <eric@eukrea.com>
2011-07-04 10:55:27 +02:00
ea11382330 vision2: Fix build due to WEIM registers name change
commit 0015de1a (MX5: Make the weim structure complete) fixed the name for
the WEIM registers in order to match with the MX51/MX53 manuals.

Fix the WEIM register for vision2 board so that it can build again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:27 +02:00
47c3e074ad MX53: Add initial support for MX53ARD
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
a6e961c292 MX5: Introduce a function for setting the chip select size
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
a682b3f76b MX5: Add iomux structure
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
ac4020e3c0 MX5: Make the weim structure complete
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-04 10:55:26 +02:00
a91916ff8e arm: Update jadecpu board
Enable dcache and arch memset/memcpy for speed reasons
Remove of config.mk and some environment overwrites
Some generic cleanup

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-04 10:55:26 +02:00
0aeb01d512 arm: omap2: apollon: fix broken build
Define CONFIG_SYS_SDRAM_BASE to physical SDRAM address
and CONFIG_SYS_INIT_SP_ADDR to physical SRAM address

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
2011-07-04 10:55:26 +02:00
aadcfc179a OMAP[34]: fix broken timer
As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff.  This value is not only wrong but
illegal according to the reference manual.

One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command.  The sleep will hang
forever.

The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.

Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>
2011-07-04 10:55:26 +02:00
f84d64dbf6 arm: Tegra2: GPIO: enable GPIO for Tegra2 boards
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-07-04 10:55:26 +02:00
4e5ae09e56 GPIO: Tegra2: add GPIO driver for Tegra2
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-07-04 10:55:26 +02:00
f3108304e4 VCMA9: various cleanups/code style fixes
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2011-07-04 10:55:26 +02:00
6d754843ff VCMA9: use CFI driver (and remove the old one)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2011-07-04 10:55:26 +02:00
0bf42feca1 VCMA9: remove unneeded config.mk
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2011-07-04 10:55:26 +02:00
137db2d7f5 armv7: adapt s5pc1xx to the new cache maintenance framework
adapt s5pc1xx to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
45bf05854b armv7: adapt omap3 to the new cache maintenance framework
adapt omap3 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
8b457fa828 armv7: adapt omap4 to the new cache maintenance framework
adapt omap4 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
93bc21930a armv7: add PL310 support to u-boot
PL310 is the L2$ controller from ARM used in many SoCs
including the Cortex-A9 based OMAP4430

Add support for some of the key PL310 operations
	- Invalidate all
	- Invalidate range
	- Flush(clean & invalidate) all
	- Flush range

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
e05f00792b arm: minor fixes for cache and mmu handling
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
   than a range flush on the entire memory(flush_cache())

   Provide a default implementation for flush_dcache_all()
   for backward compatibility and to avoid build issues.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
c2dd0d4554 armv7: integrate cache maintenance support
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
	- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
	- Make changes according to the new framework

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
e47f2db537 armv7: rename cache related CONFIG flags
Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF

Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
 * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
 * Changed all three flags to the final names suggested as above
   and accordingly changed the commit message
2011-07-04 10:55:25 +02:00
2c451f7831 armv7: cache maintenance operations for armv7
- Add a framework for layered cache maintenance
	- separate out SOC specific outer cache maintenance from
	  maintenance of caches known to CPU

- Add generic ARMv7 cache maintenance operations that affect all
  caches known to ARMv7 CPUs. For instance in Cortex-A8 these
  opertions will affect both L1 and L2 caches. In Cortex-A9
  these will affect only L1 cache

- D-cache operations supported:
	- Invalidate entire D-cache
	- Invalidate D-cache range
	- Flush(clean & invalidate) entire D-cache
	- Flush D-cache range
- I-cache operations supported:
	- Invalidate entire I-cache

- Add maintenance functions for TLB, branch predictor array etc.

- Enable -march=armv7-a so that armv7 assembly instructions can be
  used

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
4c93da7c39 arm: make default implementation of cache_flush() weakly linked
make default implementation of cache_flush() weakly linked so that
sub-architectures can override it

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-04 10:55:25 +02:00
ff6b47ad23 Makefile: need to remove generated u-boot-nand_spl.lds
On MPC85xx based NAND_SPL builds we generate a u-boot-nand_spl.lds based
on output from preprocessor.  We where never removed it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:58:46 -05:00
eced4626e4 NAND: Add 16bit NAND support for the NDFC
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:

  CONFIG_SYS_NDFC_16        - Setting this tells the NDFC that a
			      16 bit device is attached.
  CONFIG_SYS_NDFC_EBC0_CFG  - This is for the External Bus
			      Controller configuration register.

Also, a new ndfc_read_byte() function was added which does not
first convert the data to little endian.

The NAND SPL was also modified to do 16bit bad block testing
when a 16 bit chip is being used.

Signed-off-by: Alex Waterman <awaterman@dawning.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:52 -05:00
c9494866df cmd_nand: add nand write.trimffs command
Add another nand write. variant, trimffs. This command will request of
nand_write_skip_bad() that all trailing all-0xff pages will be
dropped from eraseblocks when they are written to flash as-per the
reccommended behaviour of the UBI FAQ [1].

The function that implements this timming is the drop_ffs() function
by Artem Bityutskiy, ported from the mtd-utils tree.

[1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Artem Bityutskiy <dedekind1@gmail.com>
CC: Detlev Zundel <dzu@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
169d54d8b3 nand_util: drop trailing all-0xff pages if requested
Add a flag to nand_read_skip_bad() such that if true, any trailing
pages in an eraseblock whose contents are entirely 0xff will be
dropped.

The implementation is via a new drop_ffs() function which is
based on the function of the same name from the ubiformat
utility by Artem Bityutskiy.

This is as-per the reccomendations of the UBI FAQ [1]

[1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Artem Bityutskiy <dedekind1@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
c135456ff5 nand_util: treat WITH_YAFFS_OOB as a mode
When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an
operation which is mutually exclusive with the 'usual' way of writing.

Add a check that client code does not specify WITH_YAFFS_OOB along with any
other flags and add a comment indicating that the WITH_YAFFS_OOB flag should
not be mixed with other flags.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
a6c9aa1f92 nand_util: convert nand_write_skip_bad() to flags
In a future commit the behaviour of nand_write_skip_bad()
will be further extended.

Convert the only flag currently passed to the nand_write_
skip_bad() function to a bitfield of only one allocated
member. This should avoid an explosion of int's at the
end of the parameter list or the ambiguous calls like

nand_write_skip_bad(info, offset, len, buf, 0, 1, 1);
nand_write_skip_bad(info, offset, len, buf, 0, 1, 0);

Instead there will be:

nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB |
			WITH_OTHER);

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
bee038e9fe nand_base: trivial: fix comment read/write comment
Replace an incorrect 'read' with 'write' in a comment.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-07-01 15:56:51 -05:00
2c4ed7d250 Merge branch 'next' of git://git.denx.de/u-boot-nios
* 'next' of git://git.denx.de/u-boot-nios:
  nios2: move generic config to boards.cfg
2011-07-01 09:42:25 +02:00
4827d067dd nios2: move generic config to boards.cfg
I can't build test this, but just looking at the config files written
and it seems OK ...

Tested-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-06-30 09:18:46 -04:00
4c2105cb9f cfi_flash: reverse geometry for newer STM parts
For newer STM parts where CFI >= 1.1, there is a byte in the extended
structure that declares the flash layout type (just like the AMD parts),
so key off of that to find out when we need to reverse the geometry.

This can be seen with M29W640 parts where U-Boot does:
Bank # 1: CFI conformant FLASH (16 x 16)  Size: 8 MB in 135 Sectors
  AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED
  Erase timeout: 8192 ms, write timeout: 1 ms
  Buffer write timeout: 1 ms, buffer size: 16 bytes

  Sector Start Addresses:
  20000000   RO   20002000   RO   20004000   RO   20006000   RO   20008000   RO
  2000A000   RO   2000C000   RO   2000E000   RO   20010000   RO   20020000   RO
  ...

But Linux does:
physmap platform flash device: 00800000 at 20000000
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank.
                 Manufacturer ID 0x000020 Chip ID 0x0022ed
physmap-flash.0: Swapping erase regions for top-boot CFI table.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-06-29 10:05:19 +02:00
b1af6f532e Prepare v2011.06
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-27 22:22:42 +02:00
177f38609b Minor coding style fixes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-27 22:22:16 +02:00
181f565c2d usb: convert to partial linking
Looks like this was missed during the conversion to partial linking.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-25 09:53:10 +02:00
ae46d2a952 ehci-pci: Fix PCI EHCI driver for 36-bit
Convert the PCI base address into a virtual address.

Signed-off-by: Zhao Chenhui <b35336@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
2011-06-25 09:53:10 +02:00
b17ce92a42 musb: process control messages after roothub accepted it
When dealing with non-multipoint devices, if the software root hub code
accepted the message, then we still need to process it normally.  So only
return quickly when the root hub skipped the message or is otherwise in
an error state.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-25 09:53:10 +02:00
9623c158f6 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  run arm_pci_init after relocation
  IXP42x PCI rewrite
  update/fix PDNB3 board
  update/fix IXDP425 / IXDPG425 boards
  add dvlhost (dLAN 200 AV Wireless G) board
  IXP NPE: add support for fixed-speed MII ports
  update/fix AcTux4 board
  update/fix AcTux3 board
  update/fix AcTux2 board
  update/fix AcTux1 board
  use -ffunction-sections / --gc-sections on IXP42x
  support CONFIG_SYS_LDSCRIPT on ARM
  fix "depend" target in npe directory
  Fix IXP code to work after relocation was added
  trigger hardware watchdog in IXP42x serial driver
  add support for IXP42x Rev. B1 and newer
  add XScale sub architecture (IXP/PXA) to maintainer list

Conflicts:
	arch/arm/lib/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-23 15:37:33 +02:00
1ed63c5498 run arm_pci_init after relocation
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:19 +02:00
29161f47d0 IXP42x PCI rewrite
clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead.  Move board-specific PCI
setup code (clock/reset) to board directory.

Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
904ec57b33 update/fix PDNB3 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
973af335e6 update/fix IXDP425 / IXDPG425 boards
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
10c9787e68 add dvlhost (dLAN 200 AV Wireless G) board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
d697d79f8d IXP NPE: add support for fixed-speed MII ports
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
080b7643fb update/fix AcTux4 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
8b5ab4c1b6 update/fix AcTux3 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
af0504858c update/fix AcTux2 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
517c5dfed5 update/fix AcTux1 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:25:18 +02:00
66463e60df use -ffunction-sections / --gc-sections on IXP42x
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
363613a08d support CONFIG_SYS_LDSCRIPT on ARM
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
3053fa0bfb fix "depend" target in npe directory
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
ce04bb41a6 Fix IXP code to work after relocation was added
- jump to real flash location after reset before turning off flash mirror
 - fix timer system to use HZ == 1000, remove broken interrupt-based code

Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
009e464802 trigger hardware watchdog in IXP42x serial driver
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
20f172815d add support for IXP42x Rev. B1 and newer
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
c3dc3dfb7e add XScale sub architecture (IXP/PXA) to maintainer list
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-06-23 08:24:55 +02:00
2ad6e27dcd tools: make it possible to build tools unconfigured
On Sunday, June 19, 2011 13:55:13 Ilya Yanok wrote:
> On 18.06.2011 23:03, Mike Frysinger wrote:
> >>  - tools/Makefile put common/env_embedded.o and envcrc.o to object list
> >>
> >> conditionally. This fixes errors during dependency generation.
> >
> > pretty sure this breaks board builds.  if the only thing this fixes is a
>
> I'm sorry but I can't see how this can break the builds. Could you
> please be more specific? I've tried to build some boards, it actually
> works...

i might be thinking of a different env_embedded situation.  a different
problem with your patch to tools/Makefile: you copied the same logic multiple
times which means more bitrot.

why dont you do something like:

> > harmless warning when generating dependency files, then i say ignore it.
> > after all, this is how it has always worked in the past and no one really
> > cared.
>
> Yep, they are harmless but they are not warnings but rather scary errors
> actually. ;) I think it's better to fix them.

i guess my threshold for being scared is a bit higher :p
-mike
2011-06-22 20:03:13 +02:00
28abd48f50 Makefile: move $(VERSION_FILE) rule out of ifeq configured
mkimage relies on autogenerated version so we need to move
$(VERSION_FILE) rule out of ifeq and make tools rule depend on it to be
able to run 'make tools' from the unconfigured tree.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 20:03:08 +02:00
d51dfff7af config.mk: move LDSCRIPT processing to the top-level Makefile
LDSCRIPT is used only from the top-level Makefile and only when the
system is configured so we can move LDSCRIPT and CONFIG_SYS_LDSCRIPT
related logic into the top level Makefile and under configured condition
to avoid errors when building tools from unconfigured tree.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 20:03:01 +02:00
566e5cf451 ARM: drop unsupported 'trab' board
The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it.  Drop it.

This includes support for VFD displays which have always been used by
this board only.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-22 20:00:51 +02:00
79cfe42261 Prepare v2011.06-rc3
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-06-22 11:39:24 +02:00
282e27c0b7 Build fix/update of AFEB9260
Make AFEB9260 build again.
Based on fix for AT91SAM9260EK.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2011-06-21 22:26:22 +02:00
6c169c12d7 macb: fix compile warning
This patch fixes following compile warning:

---8<---
macb.c: In function 'macb_write_hwaddr':
macb.c:525:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-06-21 22:26:22 +02:00
2321bfe425 at91_emac: fix compile warning
This patch removes the warning

---8<---
at91_emac.c: In function 'at91emac_write_hwaddr':
at91_emac.c:487:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
--->8---

Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-06-21 22:26:22 +02:00
fd2f565809 include/asm/arch-at91: update several .h files to ATMEL_xxx name scheme
Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
d0a94620a8 cpuat91: fix board support
Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
95d50e5ce7 cpu9260/9G20: fix board support
Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
96fd99067f arm926ejs/at91/lowlevel_init.S: fix defines
atmel rework changed define names which broke this file

Signed-off-by: Eric Bénard <eric@eukrea.com>
2011-06-21 22:26:22 +02:00
576e7a10c4 ATMEL spi_dataflash driver - fix to build again
The rework effort for ATMEL (AT91/AVR32) accidentially broke build of
this driver. Fix this to make it build again. However this driver should
be reworked as soon as possible!

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-06-21 22:26:22 +02:00
9b372b2c8e AT91 rework: fix TOP9000 files to build again
Fix EMK TOP9000 board to build again:
- changes required due to ATMEL rework

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-06-21 22:26:22 +02:00
8c6407fce3 AT91 rework: fix at91sam(9260/9g20/9xe)ek board port to build again:
Make ATMEL's at91sam9260/9g20/9xe-ek boards build again

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-06-21 22:26:22 +02:00
b8d41dda22 Add support for Bluewater Systems Snapper 9260/9G20 modules
Add support for Bluewater Systems AT91 based Snapper 9260 and 9G20
single board computer modules. Includes NAND flash and Ethernet
support.

Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
2011-06-21 22:26:21 +02:00
8073399444 update arm/at91rm9200 work with rework rework110202
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
 * Fix: timer.c compile error io.h not found with arm/at91rm9200
 * update arm920t/at91 to ATMEL_xxx name scheme
 * update arm920t/at91 soc lib
 * update at91_emac driver

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
2011-06-21 22:26:21 +02:00
fc97102810 mx31pdk: Add DHCP command
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-21 22:26:21 +02:00
61a58a16f8 mxc_spi.c: typo fixed
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
2011-06-21 22:26:21 +02:00
953ee4d09e imx31_phycore: Fix build by using new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-21 22:26:21 +02:00
e845f9006a mx1ads: Fix build by using new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-21 22:26:21 +02:00
22a9ea974b MX31: QONG: drop config.mk
Remove obsolete config.mk from QONG board.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-06-21 22:26:21 +02:00
154f53488e omap730p2: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:21 +02:00
3712982019 omap2420h4: fix build breaks
DRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:21 +02:00
574fa1f02e omap1610inn: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:21 +02:00
56ccd36fa1 omap1510inn: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:20 +02:00
0f33ef946a omap5912osk: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:20 +02:00
d59772eb75 omap1610h2: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-21 22:26:20 +02:00
29b83d9833 powerpc/p1022ds: set the clock-frequency prop only if the clock is enabled
The clock-frequency property in an audio codec's device tree node is set to
the input clock frequency for that codec.  On the Freescale P1022DS board,
the input clock is enabled only if the hwconfig 'audclk' option is set.
Therefore, the property should only be set in the device tree if the clock
is actually enabled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-09 15:53:38 -05:00
7b2fac7654 omap730p2: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-09 08:54:57 -04:00
f720a74975 omap2420h4: fix build breaks
DRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-09 08:54:55 -04:00
a3d4875167 omap1610inn: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-09 08:54:53 -04:00
d81519dc49 omap1510inn: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-09 08:54:51 -04:00
64d9b0ff97 omap5912osk: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-09 08:54:48 -04:00
653fbd0eb9 omap1610h2: fix build breaks
Provide SDRAM base address and use SRAM for initial stack

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-06-09 08:54:45 -04:00
9571865e0d Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  SMDK6400: fix the compiler error
  imx27lite: Remove local config.mk
  mx31ads: Fix environment location on flash
  imx31_litekit: Remove local config.mk
  mx31litekit: Fix boot with the new relocation scheme.
  mx31ads: Use the new relocation scheme
2011-06-08 23:29:04 +02:00
84b8085638 SMDK6400: fix the compiler error
This patch adds _end for fix following compiler error

arch/arm/cpu/arm1176/start.o: In function `_end_ofs':
arch/arm/cpu/arm1176/start.S:61: undefined reference to `_end'

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-06-08 22:10:03 +02:00
43f13e4ad7 imx27lite: Remove local config.mk
Local board config.mk should be avoided.

Place CONFIG_SYS_TEXT_BASE definition into the board config file instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-06-07 15:06:26 +02:00
ba8dcca78d mx31ads: Fix environment location on flash
At the moment u-boot and u-boot environment on flash
have overlapping addresses, so each u-boot update erases
the environment. Fix this by placing evironment right
after u-boot. Also, remove confusing comment about environment
location.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
2011-06-07 15:05:48 +02:00
ac88e66e14 imx31_litekit: Remove local config.mk
Local board config.mk should be avoided.

Place CONFIG_SYS_TEXT_BASE definition into the board config file instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-06-07 15:04:33 +02:00
4e37731a27 mx31litekit: Fix boot with the new relocation scheme.
imx31_litekit has been converted to the new relocation scheme, but it does not boot.

Make the boot functional by using board_early_init_f .

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
2011-06-06 09:35:25 +02:00
4ac2e2d69f mx31ads: Use the new relocation scheme
This fixes the MX31ADS build by using the new relocation scheme.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Felix Radensky <felix@embedded-sol.com>
2011-06-06 09:35:25 +02:00
ba5c122846 Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update embedded env settings
The recent commit ea882baf9c broke embedding environments in the middle
of a sector, so relocate it to the start of the 2nd sector.

Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:52 -04:00
acf04b3059 Blackfin: boards: build zlib dir with -O2
Now that the zlib code has been relocated to a dedicated subdir, make
sure we still build it with -O2 for boards that want speed over size.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
1b48f126d6 Blackfin: bf548-ezkit/bf561-ezkit: update env location
Relocate the env to one of the small end sectors to avoid issues with
embedding it, such as support being broken (by recent commit ea882baf9c),
and for taking a while to save updates.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
9aeab10bd4 Blackfin: use on-chip reset func with newer parts
Turns out the documentation is wrong and doing "RAISE 1" does not result
in a software reset, only a core reset.  So when the on-chip rom has a
functioning reset helper, use it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
867f54cc35 Blackfin: use common LDSCRIPT logic
Now that common code is a bit smarter when it comes to default LDSCRIPT
values, rename the default Blackfin file and drop the Blackfin-specific
config.mk logic.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-03 13:26:45 -04:00
1419 changed files with 39229 additions and 53749 deletions

2
.gitignore vendored
View File

@ -33,6 +33,7 @@
/u-boot.sha1
/u-boot.dis
/u-boot.lds
/u-boot.ubl
#
# Generated files
@ -45,6 +46,7 @@
/include/generated/
/lib/asm-offsets.s
/arch/*/cpu/asm-offsets.s
# stgit generated dirs
patches-*

11
CREDITS
View File

@ -82,7 +82,6 @@ D: Port to the gw8260 board
N: Curt Brune
E: curt@cucy.com
D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
D: Added support for ESPD-Inc. EVB4510 Board
W: http://www.cucy.com
N: Jonathan De Bruyne
@ -134,11 +133,6 @@ N: Dave Ellis
E: DGE@sixnetio.com
D: EEPROM Speedup, SXNI855T port
N: Thomas Elste
E: info@elste.org
D: Port for the ModNET50 Board, NET+50 CPU Port
W: http://www.imms.de
N: Daniel Engstr?m
E: daniel@omicron.se
D: x86 port, Support for sc520_cdp board
@ -161,11 +155,6 @@ N: Thomas Frieden
E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne
N: Niklaus Giger
E: niklaus.giger@netstal.com
D: Support for HCU(x) boards
W: www.netstal.com
N: Paul Gortmaker
E: paul.gortmaker@windriver.com
D: Support for WRS SBC8347/8349 boards

View File

@ -74,7 +74,7 @@ Joe D'Abbraccio <ljd015@freescale.com>
MPC837xERDB MPC837x
K<EFBFBD>ri Dav<EFBFBD><EFBFBD>sson <kd@flaga.is>
Kári Davíðsson <kd@flaga.is>
FLAGADM MPC823
@ -142,6 +142,10 @@ Alex Dubov <oakad@yahoo.com>
mpq101 MPC8548
Phil Edworthy <phil.edworthy@renesas.com>
rsk7264 SH7264
Dirk Eibach <eibach@gdsys.de>
devconcenter PPC460EX
@ -193,12 +197,6 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
WUH405 PPC405EP
CMS700 PPC405EP
Niklaus Giger <niklaus.giger@netstal.com>
HCU4 PPC405GPr
MCU25 PPC405GPr
HCU5 PPC440EPx
Siddarth Gore <gores@marvell.com>
guruplug ARM926EJS (Kirkwood SoC)
@ -302,6 +300,11 @@ Dan Malek <dan@embeddedalley.com>
stxssa MPC85xx
stxxtc MPC8xx
Ryan Mallon <ryan@bluewatersys.com>
snapper9260 ARM926EJS (AT91SAM9260 SoC)
snapper9g20 ARM926EJS (AT91SAM9G20 SoC)
Eran Man <eran@nbase.co.il>
EVB64260_750CX MPC750CX
@ -446,6 +449,7 @@ Peter De Schrijver <p2@mind.be>
Andre Schwarz <andre.schwarz@matrix-vision.de>
mergerbox MPC8377
mvbc_p MPC5200
mvblm7 MPC8343
mvsmr MPC5200
@ -511,6 +515,7 @@ Ilya Yanok <yanok@emcraft.com>
Roy Zang <tie-fei.zang@freescale.com>
mpc7448hpc2 MPC7448
P1023RDS P1023
John Zhan <zhanz@sinovee.com>
@ -543,6 +548,8 @@ Unknown / orphaned boards:
EVB64260 MPC7xx_74xx
versatile ARM926EJ-S
#########################################################################
# ARM Systems: #
@ -555,17 +562,13 @@ Albert ARIBAUD <albert.u.boot@aribaud.net>
edminiv2 ARM926EJS (Orion5x SoC)
Rowel Atienza <rowel@diwalabs.com>
armadillo ARM720T
Stefano Babic <sbabic@denx.de>
ea20 davinci
mx35pdk i.MX35
mx51evk i.MX51
polaris xscale
trizepsiv xscale
polaris xscale/pxa
trizepsiv xscale/pxa
vision2 i.MX51
Jason Liu <r64343@freescale.com>
@ -588,17 +591,22 @@ Eric Benard <eric@eukrea.com>
cpu9260 ARM926EJS (AT91SAM9260 SoC)
cpu9G20 ARM926EJS (AT91SAM9G20 SoC)
Ajay Bhargav <ajay.bhargav@einfochips.com>
gplugd ARM926EJS (ARMADA100 88AP168 SoC)
Rishi Bhattacharya <rishi@ti.com>
omap5912osk ARM926EJS
Andreas Bie<EFBFBD>mann <andreas.devel@gmail.com>
Andreas Bießmann <andreas.devel@gmail.com>
at91rm9200ek at91rm9200
grasshopper avr32
Cliff Brake <cliff.brake@gmail.com>
pxa255_idp xscale
pxa255_idp xscale/pxa
Rick Bronson <rick@efn.org>
@ -616,19 +624,10 @@ Eric Cooper <ecc@cmu.edu>
dockstar ARM926EJS (Kirkwood SoC)
George G. Davis <gdavis@mvista.com>
assabet SA1100
gcplus SA1100
Wolfgang Denk <wd@denx.de>
imx27lite i.MX27
qong i.MX31
Thomas Elste <info@elste.org>
modnet50 ARM720T (NET+50)
Kristoffer Ericson <kristoffer.ericson@gmail.com>
jornada SA1110
@ -636,6 +635,7 @@ Kristoffer Ericson <kristoffer.ericson@gmail.com>
Fabio Estevam <fabio.estevam@freescale.com>
mx31pdk i.MX31
mx53ard i.MX53
mx53smd i.MX53
Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
@ -647,10 +647,11 @@ Sedji Gaouaou<sedji.gaouaou@atmel.com>
at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC)
at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC)
Marius Gr<47>ger <mag@sysgo.de>
Simon Guinot <simon.guinot@sequanux.org>
impa7 ARM720T (EP7211)
ep7312 ARM720T (EP7312)
inetspace_v2 ARM926EJS (Kirkwood SoC)
netspace_v2 ARM926EJS (Kirkwood SoC)
netspace_max_v2 ARM926EJS (Kirkwood SoC)
Igor Grinberg <grinberg@compulab.co.il>
@ -669,11 +670,6 @@ Grazvydas Ignotas <notasas@gmail.com>
omap3_pandora ARM ARMV7 (OMAP3xx SoC)
Gary Jennejohn <garyj@denx.de>
smdk2400 ARM920T
trab ARM920T
Matthias Kaehlcke <matthias@kaehlcke.net>
edb9301 ARM920T (EP9301)
edb9302 ARM920T (EP9302)
@ -684,9 +680,6 @@ Matthias Kaehlcke <matthias@kaehlcke.net>
edb9315 ARM920T (EP9315)
edb9315a ARM920T (EP9315)
Konstantin Kletschke <kletschke@synertronixx.de>
scb9328 ARM920T
Nishant Kamat <nskamat@ti.com>
omap1610h2 ARM926EJS
@ -699,8 +692,12 @@ Minkyu Kang <mk7.kang@samsung.com>
Chander Kashyap <k.chander@samsung.com>
origen ARM ARMV7 (S5PC210 SoC)
SMDKV310 ARM ARMV7 (S5PC210 SoC)
Torsten Koschorrek <koschorrek@synertronixx.de>
scb9328 ARM920T (i.MXL)
Frederik Kriewitz <frederik@kriewitz.eu>
devkit8000 ARM ARMV7 (OMAP3530 SoC)
@ -713,7 +710,7 @@ Sergey Kubushyn <ksi@koi8.net>
Prakash Kumar <prakash@embedx.com>
cerf250 xscale
cerf250 xscale/pxa
Vipin Kumar <vipin.kumar@st.com>
@ -726,12 +723,17 @@ Sergey Lapin <slapin@ossfans.org>
afeb9260 ARM926EJS (AT91SAM9260 SoC)
Valentin Longchamp <valentin.longchamp@keymile.com>
km_kirkwood ARM926EJS (Kirkwood SoC)
portl2 ARM926EJS (Kirkwood SoC)
Nishanth Menon <nm@ti.com>
omap3_sdp3430 ARM ARMV7 (OMAP3xx SoC)
omap3_zoom1 ARM ARMV7 (OMAP3xx SoC)
David M<EFBFBD>ller <d.mueller@elsoft.ch>
David Müller <d.mueller@elsoft.ch>
smdk2410 ARM920T
VCMA9 ARM920T
@ -744,10 +746,6 @@ Nagendra T S <nagendra@mistralsolutions.com>
am3517_crane ARM ARMV7 (AM35x SoC)
Rolf Offermanns <rof@sysgo.de>
shannon SA1100
Kyungmin Park <kyungmin.park@samsung.com>
apollon ARM1136EJS
@ -759,11 +757,9 @@ Sandeep Paulraj <s-paulraj@ti.com>
davinci_dm365evm ARM926EJS
davinci_dm6467evm ARM926EJS
Peter Pearse <peter.pearse@arm.com>
integratorcp All current ARM supplied & supported core modules
-see http://www.arm.com/products/DevTools/Hardware_Platforms.html
versatile ARM926EJ-S
versatile ARM926EJ-S
Linus Walleij <linus.walleij@linaro.org>
integratorap various
integratorcp various
Dave Peverley <dpeverley@mpc-data.co.uk>
@ -775,7 +771,6 @@ Manikandan Pillai <mani.pillai@ti.com>
Stelian Pop <stelian.pop@leadtechdesign.com>
at91cap9adk ARM926EJS (AT91CAP9 SoC)
at91sam9260ek ARM926EJS (AT91SAM9260 SoC)
at91sam9261ek ARM926EJS (AT91SAM9261 SoC)
at91sam9263ek ARM926EJS (AT91SAM9263 SoC)
@ -791,9 +786,9 @@ John Rigby <jcrigby@gmail.com>
Stefan Roese <sr@denx.de>
ixdpg425 xscale
pdnb3 xscale
scpu xscale
ixdpg425 xscale/ixp
pdnb3 xscale/ixp
scpu xscale/ixp
Alessandro Rubini <rubini@unipv.it>
Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
@ -814,24 +809,19 @@ Heiko Schocher <hs@denx.de>
magnesium i.MX27
mgcoge3un ARM926EJS (Kirkwood SoC)
suen3 ARM926EJS (Kirkwood SoC)
suen8 ARM926EJS (Kirkwood SoC)
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
innokom xscale
csb226 xscale/pxa
innokom xscale/pxa
Michael Schwingen <michael@schwingen.org>
actux1 xscale
actux2 xscale
actux3 xscale
actux4 xscale
Andrea Scian <andrea.scian@dave-tech.it>
B2 ARM7TDMI (S3C44B0X)
actux1 xscale/ixp
actux2 xscale/ixp
actux3 xscale/ixp
actux4 xscale/ixp
dvlhost xscale/ixp
Nick Thompson <nick.thompson@gefanuc.com>
@ -851,12 +841,12 @@ Greg Ungerer <greg.ungerer@opengear.com>
Marek Vasut <marek.vasut@gmail.com>
balloon3 xscale
colibri_pxa270 xscale
palmld xscale
palmtc xscale
vpac270 xscale
zipitz2 xscale
balloon3 xscale/pxa
colibri_pxa270 xscale/pxa
palmld xscale/pxa
palmtc xscale/pxa
vpac270 xscale/pxa
zipitz2 xscale/pxa
efikamx i.MX51
Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
@ -887,16 +877,12 @@ Lei Wen <leiwen@marvell.com>
Matthias Weisser <weisserm@arcor.de>
jadecpu ARM926EJS (MB86R01 SoC)
zmx25 ARM926EJS (imx25 SoC)
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
Alex Z<>pke <azu@sysgo.de>
lart SA1100
dnp1110 SA1110
Syed Mohammed Khasim <sm.khasim@gmail.com>
Sughosh Ganu <urwithsughosh@gmail.com>
@ -907,9 +893,9 @@ Sughosh Ganu <urwithsughosh@gmail.com>
Unknown / orphaned boards:
Board CPU Last known maintainer / Comment
.........................................................................
cradle xscale Kyle Harris <kharris@nexus-tech.net> / dead address
ixdp425 xscale Kyle Harris <kharris@nexus-tech.net> / dead address
lubbock xscale Kyle Harris <kharris@nexus-tech.net> / dead address
cradle xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address
ixdp425 xscale/ixp Kyle Harris <kharris@nexus-tech.net> / dead address
lubbock xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address
imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
mx31ads i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned

248
MAKEALL
View File

@ -1,58 +1,54 @@
#!/bin/bash
# Tool mainly for U-Boot Quality Assurance: build one or more board
# configurations with minimal verbosity, showing only warnings and
# errors.
#
# There are several ways to select which boards to build.
#
# Traditionally, architecture names (like "powerpc"), CPU family names
# (like "mpc83xx") or board names can be specified on the command
# line; without any arguments, MAKEALL defaults to building all Power
# Architecture systems (i. e. same as for "MAKEALL powerpc").
#
# With the introduction of the board.cfg file, it has become possible
# to provide additional selections. We use standard command line
# options for this:
#
# -a or --arch : Select architecture
# -c or --cpu : Select CPU family
# -s or --soc : Select SoC type
# -v or --vendor: Select board vendor
#
# Selections by these options are logically ANDed; if the same option
# is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
# will select all configurations where the vendor is either FOO or
# BAR. Any additional arguments specified on the command line are
# always build additionally.
#
# Examples:
#
# - build all Power Architecture boards:
#
# MAKEALL -a powerpc
# or
# MAKEALL --arch powerpc
# or
# MAKEALL powerpc
#
# - build all PowerPC boards manufactured by vendor "esd":
#
# MAKEALL -a powerpc -v esd
#
# - build all PowerPC boards manufactured either by "keymile" or
# "siemens":
#
# MAKEALL -a powerpc -v keymile -v siemens
#
# - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
#
# MAKEALL -c mpc83xx -v freescale 4xx
#
#########################################################################
SHORT_OPTS="a:c:v:s:"
LONG_OPTS="arch:,cpu:,vendor:,soc:"
usage()
{
# if exiting with 0, write to stdout, else write to stderr
local ret=${1:-0}
[ "${ret}" -eq 1 ] && exec 1>&2
cat <<-EOF
Usage: MAKEALL [options] [--] [boards-to-build]
Options:
-a ARCH, --arch ARCH Build all boards with arch ARCH
-c CPU, --cpu CPU Build all boards with cpu CPU
-v VENDOR, --vendor VENDOR Build all boards with vendor VENDOR
-s SOC, --soc SOC Build all boards with soc SOC
-h, --help This help output
Selections by these options are logically ANDed; if the same option
is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
will select all configurations where the vendor is either FOO or
BAR. Any additional arguments specified on the command line are
always build additionally. See the boards.cfg file for more info.
If no boards are specified, then the default is "powerpc".
Environment variables:
BUILD_NCPUS number of parallel make jobs (default: auto)
CROSS_COMPILE cross-compiler toolchain prefix (default: "")
MAKEALL_LOGDIR output all logs to here (default: ./LOG/)
BUILD_DIR output build directory (default: ./)
Examples:
- build all Power Architecture boards:
MAKEALL -a powerpc
MAKEALL --arch powerpc
MAKEALL powerpc
- build all PowerPC boards manufactured by vendor "esd":
MAKEALL -a powerpc -v esd
- build all PowerPC boards manufactured either by "keymile" or "siemens":
MAKEALL -a powerpc -v keymile -v siemens
- build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
MAKEALL -c mpc83xx -v freescale 4xx
EOF
exit ${ret}
}
SHORT_OPTS="ha:c:v:s:"
LONG_OPTS="help,arch:,cpu:,vendor:,soc:"
# Option processing based on util-linux-2.13/getopt-parse.bash
@ -63,7 +59,7 @@ LONG_OPTS="arch:,cpu:,vendor:,soc:"
TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
-n 'MAKEALL' -- "$@"`
if [ $? != 0 ] ; then echo "Terminating..." >&2 ; exit 1 ; fi
[ $? != 0 ] && usage 1
# Note the quotes around `$TEMP': they are essential!
eval set -- "$TEMP"
@ -108,6 +104,8 @@ while true ; do
fi
SELECTED='y'
shift 2 ;;
-h|--help)
usage ;;
--)
shift ; break ;;
*)
@ -298,170 +296,41 @@ LIST_ppc=" \
LIST_SA="$(boards_by_cpu sa1100)"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7=" \
ap7 \
ap720t \
armadillo \
B2 \
ep7312 \
evb4510 \
impa7 \
integratorap \
lpc2292sodimm \
modnet50 \
SMN42 \
"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9=" \
a320evb \
ap920t \
ap922_XA10 \
ap926ejs \
ap946es \
ap966 \
aspenite \
cp920t \
cp922_XA10 \
cp926ejs \
cp946es \
cp966 \
da830evm \
da850evm \
edb9301 \
edb9302 \
edb9302a \
edb9307 \
edb9307a \
edb9312 \
edb9315 \
edb9315a \
edminiv2 \
guruplug \
imx27lite \
jadecpu \
lpd7a400 \
magnesium \
mv88f6281gtw_ge \
mx1ads \
mx1fs2 \
netstar \
nhk8815 \
nhk8815_onenand \
omap1510inn \
LIST_ARM9="$(boards_by_cpu arm920t) \
$(boards_by_cpu arm926ejs) \
$(boards_by_cpu arm925t) \
omap1610h2 \
omap1610inn \
omap5912osk \
omap730p2 \
openrd_base \
openrd_client \
openrd_ultimate \
rd6281a \
sbc2410x \
scb9328 \
sheevaplug \
smdk2400 \
smdk2410 \
spear300 \
spear310 \
spear320 \
spear600 \
suen3 \
trab \
VCMA9 \
versatile \
versatileab \
versatilepb \
voiceblue \
davinci_dvevm \
davinci_schmoogie \
davinci_sffsdr \
davinci_sonata \
davinci_dm355evm \
davinci_dm355leopard \
davinci_dm365evm \
davinci_dm6467evm \
"
#########################################################################
## ARM10 Systems
#########################################################################
LIST_ARM10=" \
integratorcp \
cp1026 \
"
#########################################################################
## ARM11 Systems
#########################################################################
LIST_ARM11=" \
cp1136 \
omap2420h4 \
LIST_ARM11="$(boards_by_cpu arm1136) \
apollon \
imx31_litekit \
imx31_phycore \
imx31_phycore_eet \
mx31ads \
mx31pdk \
mx31pdk_nand \
qong \
smdk6400 \
tnetv107x_evm \
"
#########################################################################
## ARMV7 Systems
#########################################################################
LIST_ARMV7=" \
am3517_crane \
am3517_evm \
ca9x4_ct_vxp \
devkit8000 \
dig297 \
igep0020 \
igep0030 \
mx51evk \
omap3_beagle \
omap3_overo \
omap3_evm \
omap3_pandora \
omap3_sdp3430 \
omap3_zoom1 \
omap3_zoom2 \
omap4_panda \
omap4_sdp4430 \
s5p_goni \
smdkc100 \
"
LIST_ARMV7="$(boards_by_cpu armv7)"
#########################################################################
## AT91 Systems
#########################################################################
LIST_at91="$(boards_by_soc at91)\
$(boards_by_soc at91rm9200)\
at91sam9260ek \
at91sam9261ek \
at91sam9263ek \
at91sam9g10ek \
at91sam9g20ek \
at91sam9m10g45ek \
at91sam9rlek \
CPUAT91 \
CPU9260 \
CPU9G20 \
pm9g45 \
SBC35_A9G20 \
TNY_A9260 \
TNY_A9G20 \
"
LIST_at91="$(boards_by_soc at91)"
#########################################################################
## Xscale Systems
@ -480,7 +349,6 @@ LIST_ixp="$(boards_by_cpu ixp)
LIST_arm=" \
${LIST_SA} \
${LIST_ARM7} \
${LIST_ARM9} \
${LIST_ARM10} \
${LIST_ARM11} \
@ -557,9 +425,7 @@ LIST_x86="$(boards_by_arch x86)"
## Nios-II Systems
#########################################################################
LIST_nios2="$(boards_by_arch nios2)
nios2-generic \
"
LIST_nios2="$(boards_by_arch nios2)"
#########################################################################
## MicroBlaze Systems

378
Makefile
View File

@ -1,5 +1,5 @@
#
# (C) Copyright 2000-2010
# (C) Copyright 2000-2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@ -22,7 +22,7 @@
#
VERSION = 2011
PATCHLEVEL = 06
PATCHLEVEL = 09
SUBLEVEL =
EXTRAVERSION = -rc2
ifneq "$(SUBLEVEL)" ""
@ -104,10 +104,11 @@ $(if $(BUILD_DIR),,$(error output directory "$(saved-output)" does not exist))
endif # ifneq ($(BUILD_DIR),)
OBJTREE := $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
SPLTREE := $(OBJTREE)/spl
SRCTREE := $(CURDIR)
TOPDIR := $(SRCTREE)
LNDIR := $(OBJTREE)
export TOPDIR SRCTREE OBJTREE
export TOPDIR SRCTREE OBJTREE SPLTREE
MKCONFIG := $(SRCTREE)/mkconfig
export MKCONFIG
@ -140,7 +141,7 @@ SUBDIRS = tools \
examples/standalone \
examples/api
.PHONY : $(SUBDIRS)
.PHONY : $(SUBDIRS) $(VERSION_FILE)
ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
@ -163,6 +164,36 @@ endif
# load other configuration
include $(TOPDIR)/config.mk
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
# that (or fail if absent). Otherwise, search for a linker script in a
# standard location.
ifndef LDSCRIPT
#LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
ifdef CONFIG_SYS_LDSCRIPT
# need to strip off double quotes
LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
endif
endif
ifndef LDSCRIPT
ifeq ($(CONFIG_NAND_U_BOOT),y)
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
endif
endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot.lds
endif
ifeq ($(wildcard $(LDSCRIPT)),)
$(error could not find linker script)
endif
endif
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
@ -236,7 +267,7 @@ endif
LIBS += drivers/rtc/librtc.o
LIBS += drivers/serial/libserial.o
LIBS += drivers/twserial/libtws.o
LIBS += drivers/usb/eth/libusb_eth.a
LIBS += drivers/usb/eth/libusb_eth.o
LIBS += drivers/usb/gadget/libusb_gadget.o
LIBS += drivers/usb/host/libusb_host.o
LIBS += drivers/usb/musb/libusb_musb.o
@ -263,7 +294,7 @@ LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
endif
LIBS := $(addprefix $(obj),$(sort $(LIBS)))
.PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE)
.PHONY : $(LIBS) $(TIMESTAMP_FILE)
LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).o
LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
@ -311,22 +342,15 @@ BOARD_SIZE_CHECK =
endif
# Always append ALL so that arch config.mk's can add custom ones
ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
ifeq ($(CONFIG_NAND_U_BOOT),y)
ALL += $(obj)u-boot-nand.bin
endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y)
ALL += $(obj)u-boot-onenand.bin
ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
endif
ALL-$(CONFIG_MMC_U_BOOT) += $(obj)mmc_spl/u-boot-mmc-spl.bin
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
ifeq ($(CONFIG_MMC_U_BOOT),y)
ALL += $(obj)mmc_spl/u-boot-mmc-spl.bin
endif
all: $(ALL)
all: $(ALL-y)
$(obj)u-boot.hex: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
@ -351,7 +375,7 @@ $(obj)u-boot.ldr.srec: $(obj)u-boot.ldr
$(obj)u-boot.img: $(obj)u-boot.bin
$(obj)tools/mkimage -A $(ARCH) -T firmware -C none \
-a $(CONFIG_SYS_TEXT_BASE) -e 0 \
-O u-boot -a $(CONFIG_SYS_TEXT_BASE) -e 0 \
-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
@ -370,6 +394,10 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@
$(obj)u-boot.ubl: $(obj)u-boot-nand.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $< $@
GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
@ -422,18 +450,8 @@ mmc_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
$(obj)mmc_spl/u-boot-mmc-spl.bin: mmc_spl
$(VERSION_FILE):
@( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \
printf '#define PLAIN_VERSION "%s%s"\n' \
"$(U_BOOT_VERSION)" "$${localvers}" ; \
printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' \
"$(U_BOOT_VERSION)" "$${localvers}" ; \
) > $@.tmp
@( printf '#define CC_VERSION_STRING "%s"\n' \
'$(shell $(CC) --version | head -n 1)' )>> $@.tmp
@( printf '#define LD_VERSION_STRING "%s"\n' \
'$(shell $(LD) -v | head -n 1)' )>> $@.tmp
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
$(obj)spl/u-boot-spl.bin: depend
$(MAKE) -C spl all
$(TIMESTAMP_FILE):
@LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
@ -446,7 +464,8 @@ updater:
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(obj)include/autoconf.mk \
$(obj)include/generated/generic-asm-offsets.h
$(obj)include/generated/generic-asm-offsets.h \
$(obj)include/generated/asm-offsets.h
for dir in $(SUBDIRS) $(CPUDIR) $(dir $(LDSCRIPT)) ; do \
$(MAKE) -C $$dir _depend ; done
@ -454,15 +473,19 @@ TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))
TAG_SUBDIRS += include
FIND := find
FINDFLAGS := -L
tags ctags:
ctags -w -o $(obj)ctags `find $(TAG_SUBDIRS) \
ctags -w -o $(obj)ctags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
etags:
etags -a -o $(obj)etags `find $(TAG_SUBDIRS) \
etags -a -o $(obj)etags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
cscope:
find $(TAG_SUBDIRS) -name '*.[chS]' -print > cscope.files
$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) -name '*.[chS]' -print > \
cscope.files
cscope -b -q -k
SYSTEM_MAP = \
@ -505,24 +528,53 @@ $(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
-o $@ $(src)lib/asm-offsets.c -c -S
$(obj)include/generated/asm-offsets.h: $(obj)include/autoconf.mk.dep \
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
@echo Generating $@
tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@
$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/autoconf.mk.dep
@mkdir -p $(obj)$(CPUDIR)/$(SOC)
if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \
$(CC) -DDO_DEPS_ONLY \
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
-o $@ $(src)$(CPUDIR)/$(SOC)/asm-offsets.c -c -S; \
else \
touch $@; \
fi
#########################################################################
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
$(filter-out tools,$(SUBDIRS)) $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(filter-out tools,$(SUBDIRS)) $(TIMESTAMP_FILE) \
updater depend dep tags ctags etags cscope $(obj)System.map:
@echo "System not configured - see README" >&2
@ exit 1
tools:
tools: $(VERSION_FILE)
$(MAKE) -C $@ all
endif # config.mk
$(VERSION_FILE):
@mkdir -p $(dir $(VERSION_FILE))
@( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \
printf '#define PLAIN_VERSION "%s%s"\n' \
"$(U_BOOT_VERSION)" "$${localvers}" ; \
printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' \
"$(U_BOOT_VERSION)" "$${localvers}" ; \
) > $@.tmp
@( printf '#define CC_VERSION_STRING "%s"\n' \
'$(shell $(CC) --version | head -n 1)' )>> $@.tmp
@( printf '#define LD_VERSION_STRING "%s"\n' \
'$(shell $(LD) -v | head -n 1)' )>> $@.tmp
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
easylogo env gdb:
$(MAKE) -C tools/$@ all MTD_VERSION=${MTD_VERSION}
gdbtools: gdb
tools-all: easylogo env gdb
tools-all: easylogo env gdb $(VERSION_FILE)
$(MAKE) -C tools HOST_TOOLS_ALL=y
.PHONY : CHANGELOG
@ -688,6 +740,7 @@ M54455EVB_stm33_config : unconfig
cp $(obj)board/freescale/m54455evb/u-boot.stm $(obj)board/freescale/m54455evb/u-boot.lds ; \
fi; \
echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
$(XECHO) "... with $${FREQ}Hz input clock"
@$(MKCONFIG) -n $@ -a M54455EVB m68k mcf5445x m54455evb freescale
M5475AFE_config \
@ -762,177 +815,6 @@ M5485HFE_config : unconfig
# ARM
#========================================================================
#########################################################################
## ARM926EJ-S Systems
#########################################################################
at91sam9260ek_nandflash_config \
at91sam9260ek_dataflash_cs0_config \
at91sam9260ek_dataflash_cs1_config \
at91sam9260ek_config \
at91sam9g20ek_nandflash_config \
at91sam9g20ek_dataflash_cs0_config \
at91sam9g20ek_dataflash_cs1_config \
at91sam9g20ek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9g20,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G20EK 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_AT91SAM9260EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
at91sam9xeek_nandflash_config \
at91sam9xeek_dataflash_cs0_config \
at91sam9xeek_dataflash_cs1_config \
at91sam9xeek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
at91sam9261ek_nandflash_config \
at91sam9261ek_dataflash_cs0_config \
at91sam9261ek_dataflash_cs3_config \
at91sam9261ek_config \
at91sam9g10ek_nandflash_config \
at91sam9g10ek_dataflash_cs0_config \
at91sam9g10ek_dataflash_cs3_config \
at91sam9g10ek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9g10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
at91sam9263ek_norflash_config \
at91sam9263ek_norflash_boot_config \
at91sam9263ek_nandflash_config \
at91sam9263ek_dataflash_config \
at91sam9263ek_dataflash_cs0_config \
at91sam9263ek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
elif [ "$(findstring norflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring norflash_boot,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
at91sam9rlek_nandflash_config \
at91sam9rlek_dataflash_config \
at91sam9rlek_dataflash_cs0_config \
at91sam9rlek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
CPU9G20_128M_config \
CPU9G20_config \
CPU9260_128M_config \
CPU9260_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a cpu9260 arm arm926ejs cpu9260 eukrea at91
at91sam9m10g45ek_nandflash_config \
at91sam9m10g45ek_dataflash_config \
at91sam9m10g45ek_dataflash_cs0_config \
at91sam9m10g45ek_config \
at91sam9g45ekes_nandflash_config \
at91sam9g45ekes_dataflash_config \
at91sam9g45ekes_dataflash_cs0_config \
at91sam9g45ekes_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9m10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9M10G45EK 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_AT91SAM9G45EKES 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
else \
echo "#define CONFIG_ATMEL_SPI 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -n $@ -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91
pm9g45_config : unconfig
@mkdir -p $(obj)include
@$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91
SBC35_A9G20_NANDFLASH_config \
SBC35_A9G20_EEPROM_config \
SBC35_A9G20_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a sbc35_a9g20 arm arm926ejs sbc35_a9g20 calao at91
TNY_A9G20_NANDFLASH_config \
TNY_A9G20_EEPROM_config \
TNY_A9G20_config \
TNY_A9260_NANDFLASH_config \
TNY_A9260_EEPROM_config \
TNY_A9260_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a tny_a9260 arm arm926ejs tny_a9260 calao at91
########################################################################
## ARM Integrator boards - see doc/README-integrator for more info.
integratorap_config \
ap_config \
ap966_config \
ap922_config \
ap922_XA10_config \
ap7_config \
ap720t_config \
ap920t_config \
ap926ejs_config \
ap946es_config: unconfig
@board/armltd/integrator/split_by_variant.sh ap $@
integratorcp_config \
cp_config \
cp920t_config \
cp926ejs_config \
cp946es_config \
cp1136_config \
cp966_config \
cp922_config \
cp922_XA10_config \
cp1026_config: unconfig
@board/armltd/integrator/split_by_variant.sh cp $@
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
omap1610inn_config \
@ -982,52 +864,10 @@ SX1_config: unconfig
fi;
@$(MKCONFIG) -n $@ SX1 arm arm925t sx1
# TRAB default configuration: 8 MB Flash, 32 MB RAM
trab_config \
trab_bigram_config \
trab_bigflash_config \
trab_old_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/trab
@[ -z "$(findstring _bigram,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_32MB" >>$(obj)include/config.h ; \
}
@[ -z "$(findstring _bigflash,$@)" ] || \
{ echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@[ -z "$(findstring _old,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a trab arm arm920t trab - s3c24x0
tx25_config : unconfig
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
@$(MKCONFIG) $@ arm arm926ejs tx25 karo mx25
edb9301_config \
edb9302_config \
edb9302a_config \
edb9307_config \
edb9307a_config \
edb9312_config \
edb9315_config \
edb9315a_config: unconfig
@$(MKCONFIG) -n $@ -t $(@:_config=) edb93xx arm arm920t edb93xx - ep93xx
#########################################################################
# ARM supplied Versatile development boards
#########################################################################
versatile_config \
versatileab_config \
versatilepb_config : unconfig
@board/armltd/versatile/split_by_variant.sh $@
#########################################################################
## XScale Systems
#########################################################################
@ -1085,20 +925,6 @@ smdk6400_config : unconfig
@$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
#========================================================================
# Nios
#========================================================================
#########################################################################
## Nios-II
#########################################################################
# nios2 generic boards
NIOS2_GENERIC = nios2-generic
$(NIOS2_GENERIC:%=%_config) : unconfig
@$(MKCONFIG) $@ nios2 nios2 nios2-generic altera
#########################################################################
#########################################################################
@ -1123,18 +949,20 @@ clean:
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
$(obj)board/matrix_vision/*/bootscript.img \
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/voiceblue/eeprom \
$(obj)u-boot.lds \
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs]
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs] \
$(obj)arch/blackfin/cpu/init.{lds,elf}
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)lib/asm-offsets.s
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)include/generated/asm-offsets.h
@rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
@rm -f $(obj)mmc_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,u-boot-spl.bin,u-boot-mmc-spl.bin}
@rm -f $(ONENAND_BIN)
@rm -f $(obj)onenand_ipl/u-boot.lds
@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.lds,u-boot-spl.map}
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
@find $(OBJTREE) -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' \
@ -1148,9 +976,10 @@ clobber: clean
| xargs -0 rm -f
@rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
$(obj)cscope.* $(obj)*.*~
@rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
@rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL-y)
@rm -f $(obj)u-boot.kwb
@rm -f $(obj)u-boot.imx
@rm -f $(obj)u-boot.ubl
@rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
@ -1159,12 +988,9 @@ clobber: clean
@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
@[ ! -d $(obj)mmc_spl ] || find $(obj)mmc_spl -name "*" -type l -print | xargs rm -f
ifeq ($(OBJTREE),$(SRCTREE))
mrproper \
distclean: clobber unconfig
else
mrproper \
distclean: clobber unconfig
ifneq ($(OBJTREE),$(SRCTREE))
rm -rf $(obj)*
endif

159
README
View File

@ -147,7 +147,7 @@ Directory Hierarchy:
/cpu CPU specific files
/arm720t Files specific to ARM 720 CPUs
/arm920t Files specific to ARM 920 CPUs
/at91rm9200 Files specific to Atmel AT91RM9200 CPU
/at91 Files specific to Atmel AT91RM9200 CPU
/imx Files specific to Freescale MC9328 i.MX CPUs
/s3c24x0 Files specific to Samsung S3C24X0 CPUs
/arm925t Files specific to ARM 925 CPUs
@ -180,6 +180,7 @@ Directory Hierarchy:
/lib Architecture specific library files
/mips Files generic to MIPS architecture
/cpu CPU specific files
/mips32 Files specific to MIPS32 CPUs
/lib Architecture specific library files
/nios2 Files generic to Altera NIOS2 architecture
/cpu CPU specific files
@ -382,6 +383,38 @@ The following options need to be configured:
2. The core frequency as calculated above is multiplied
by this value.
- MIPS CPU options:
CONFIG_SYS_INIT_SP_OFFSET
Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
pointer. This is needed for the temporary stack before
relocation.
CONFIG_SYS_MIPS_CACHE_MODE
Cache operation mode for the MIPS CPU.
See also arch/mips/include/asm/mipsregs.h.
Possible values are:
CONF_CM_CACHABLE_NO_WA
CONF_CM_CACHABLE_WA
CONF_CM_UNCACHED
CONF_CM_CACHABLE_NONCOHERENT
CONF_CM_CACHABLE_CE
CONF_CM_CACHABLE_COW
CONF_CM_CACHABLE_CUW
CONF_CM_CACHABLE_ACCELERATED
CONFIG_SYS_XWAY_EBU_BOOTCFG
Special option for Lantiq XWAY SoCs for booting from NOR flash.
See also arch/mips/cpu/mips32/start.S.
CONFIG_XWAY_SWAP_BYTES
Enable compilation of tools/xway-swap-bytes needed for Lantiq
XWAY SoCs for booting from NOR flash. The U-Boot image needs to
be swapped if a flash programmer is used.
- Linux Kernel Interface:
CONFIG_CLOCKS_IN_MHZ
@ -442,6 +475,16 @@ The following options need to be configured:
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
This setting is mandatory for all boards that have only one
machine type and must be used to specify the machine type
number as it appears in the ARM machine registry
(see http://www.arm.linux.org.uk/developer/machines/).
Only boards that have multiple machine types supported
in a single configuration file and the machine type is
runtime discoverable, do not have to use this setting.
- vxWorks boot parameters:
bootvx constructs a valid bootline using the following
@ -460,6 +503,17 @@ The following options need to be configured:
Note: If a "bootargs" environment is defined, it will overwride
the defaults discussed just above.
- Cache Configuration:
CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
- Cache Configuration for ARM:
CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
controller
CONFIG_SYS_PL310_BASE - Physical base address of PL310
controller register space
- Serial Ports:
CONFIG_PL010_SERIAL
@ -716,7 +770,6 @@ The following options need to be configured:
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
@ -1044,6 +1097,15 @@ The following options need to be configured:
enabled with CONFIG_CMD_MMC. The MMC driver also works with
the FAT fs. This is enabled with CONFIG_CMD_FAT.
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller
CONFIG_SH_MMCIF_ADDR
Define the base address of MMCIF registers
CONFIG_SH_MMCIF_CLK
Define the clock frequency for MMCIF
- Journaling Flash filesystem support:
CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
CONFIG_JFFS2_NAND_DEV
@ -1115,7 +1177,7 @@ The following options need to be configured:
or CONFIG_VIDEO_SED13806_16BPP
CONFIG_FSL_DIU_FB
Enable the Freescale DIU video driver. Reference boards for
Enable the Freescale DIU video driver. Reference boards for
SOCs that have a DIU should define this macro to enable DIU
support, and should also define these other macros:
@ -1694,12 +1756,12 @@ The following options need to be configured:
=>
If you now switch to the new I2C Bus 3 with "i2c dev 3"
u-boot sends First the Commando to the mux@70 to enable
channel 6, and then the Commando to the mux@71 to enable
u-boot first sends the command to the mux@70 to enable
channel 6, and then the command to the mux@71 to enable
the channel 4.
After that, you can use the "normal" i2c commands as
usual, to communicate with your I2C devices behind
usual to communicate with your I2C devices behind
the 2 muxes.
This option is actually implemented for the bitbanging
@ -2226,11 +2288,50 @@ FIT uImage format:
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
- SPL framework
CONFIG_SPL
Enable building of SPL globally.
CONFIG_SPL_TEXT_BASE
TEXT_BASE for linking the SPL binary.
CONFIG_SPL_LDSCRIPT
LDSCRIPT for linking the SPL binary.
CONFIG_SPL_LIBCOMMON_SUPPORT
Support for common/libcommon.o in SPL binary
CONFIG_SPL_LIBDISK_SUPPORT
Support for disk/libdisk.o in SPL binary
CONFIG_SPL_I2C_SUPPORT
Support for drivers/i2c/libi2c.o in SPL binary
CONFIG_SPL_GPIO_SUPPORT
Support for drivers/gpio/libgpio.o in SPL binary
CONFIG_SPL_MMC_SUPPORT
Support for drivers/mmc/libmmc.o in SPL binary
CONFIG_SPL_SERIAL_SUPPORT
Support for drivers/serial/libserial.o in SPL binary
CONFIG_SPL_SPI_FLASH_SUPPORT
Support for drivers/mtd/spi/libspi_flash.o in SPL binary
CONFIG_SPL_SPI_SUPPORT
Support for drivers/spi/libspi.o in SPL binary
CONFIG_SPL_FAT_SUPPORT
Support for fs/fat/libfat.o in SPL binary
CONFIG_SPL_LIBGENERIC_SUPPORT
Support for lib/libgeneric.o in SPL binary
Modem Support:
--------------
[so far only for SMDK2400 and TRAB boards]
[so far only for SMDK2400 boards]
- Modem support enable:
CONFIG_MODEM_SUPPORT
@ -2495,6 +2596,11 @@ The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:
- CONFIG_BUILD_ENVCRC:
Builds up envcrc with the target environment so that external utils
may easily extract it and embed it in final U-Boot images.
- CONFIG_ENV_IS_IN_FLASH:
Define this if the environment is in flash memory.
@ -2918,6 +3024,14 @@ Low Level (hardware related) configuration options:
- CONFIG_SYS_SRIOn_MEM_SIZE:
Size of SRIO port 'n' memory region
- CONFIG_SYS_NDFC_16
Defined to tell the NDFC that the NAND chip is using a
16 bit bus.
- CONFIG_SYS_NDFC_EBC0_CFG
Sets the EBC0_CFG register for the NDFC. If not defined
a default value will be used.
- CONFIG_SPD_EEPROM
Get DDR timing information from an I2C EEPROM. Common
with pluggable memory modules such as SODIMMs
@ -2930,6 +3044,12 @@ Low Level (hardware related) configuration options:
one, specify here. Note that the value must resolve
to something your driver can deal with.
- CONFIG_SYS_DDR_RAW_TIMING
Get DDR timing information from other than SPD. Common with
soldered DDR chips onboard without SPD. DDR raw timing
parameters are extracted from datasheet and hard-coded into
header files or board specific files.
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
@ -2983,7 +3103,7 @@ Low Level (hardware related) configuration options:
globally (CONFIG_CMD_MEM).
- CONFIG_SKIP_LOWLEVEL_INIT
[ARM only] If this variable is defined, then certain
[ARM, MIPS only] If this variable is defined, then certain
low level initializations (like setting up the memory
controller) are omitted and/or U-Boot does not
relocate itself into RAM.
@ -2993,7 +3113,7 @@ Low Level (hardware related) configuration options:
other boot loader or by a debugger which performs
these initializations itself.
- CONFIG_PRELOADER
- CONFIG_SPL_BUILD
Modifies the behaviour of start.S when compiling a loader
that is executed before the actual U-Boot. E.g. when
compiling a NAND SPL.
@ -3281,6 +3401,15 @@ List of environment variables (most likely not complete):
This can be used to load and uncompress arbitrary
data.
fdt_high - if set this restricts the maximum address that the
flattened device tree will be copied into upon boot.
If this is set to the special value 0xFFFFFFFF then
the fdt will not be copied at all on boot. For this
to work it must reside in writable memory, have
sufficient padding on the end of it for u-boot to
add the information it needs into it, and the memory
must be accessible by the kernel.
i2cfast - (PPC405GP|PPC405EP only)
if set to 'y' configures Linux I2C driver for fast
mode (400kHZ). This environment variable is used in
@ -4383,9 +4512,7 @@ Coding Standards:
All contributions to U-Boot should conform to the Linux kernel
coding style; see the file "Documentation/CodingStyle" and the script
"scripts/Lindent" in your Linux kernel source directory. In sources
originating from U-Boot a style corresponding to "Lindent -pcs" (adding
spaces before parameters to function calls) is actually used.
"scripts/Lindent" in your Linux kernel source directory.
Source files originating from a different project (for example the
MTD subsystem) are generally exempt from these guidelines and are not
@ -4398,9 +4525,9 @@ in your code.
Please also stick to the following formatting rules:
- remove any trailing white space
- use TAB characters for indentation, not spaces
- use TAB characters for indentation and vertical alignment, not spaces
- make sure NOT to use DOS '\r\n' line feeds
- do not add more than 2 empty lines to source files
- do not add more than 2 consecutive empty lines to source files
- do not add trailing empty lines to source files
Submissions which do not conform to the standards may be returned
@ -4434,14 +4561,14 @@ it:
* For major contributions, your entry to the CREDITS file
* When you add support for a new board, don't forget to add this
board to the MAKEALL script, too.
board to the MAINTAINERS file, too.
* If your patch adds new configuration options, don't forget to
document these in the README file.
* The patch itself. If you are using git (which is *strongly*
recommended) you can easily generate the patch using the
"git-format-patch". If you then use "git-send-email" to send it to
"git format-patch". If you then use "git send-email" to send it to
the U-Boot mailing list, you will avoid most of the common problems
with some other mail clients.

View File

@ -56,12 +56,26 @@ PLATFORM_CPPFLAGS += $(call cc-option,\
# For EABI, make sure to provide raise()
ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
# This file is parsed several times; make sure to add only once.
ifeq (,$(findstring arch/arm/lib/eabi_compat.o,$(PLATFORM_LIBS)))
PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
# This file is parsed many times, so the string may get added multiple
# times. Also, the prefix needs to be different based on whether
# CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry
# before adding the correct one.
ifdef CONFIG_SPL_BUILD
PLATFORM_LIBS := $(SPLTREE)/arch/arm/lib/eabi_compat.o \
$(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
else
PLATFORM_LIBS := $(OBJTREE)/arch/arm/lib/eabi_compat.o \
$(filter-out %/arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
endif
endif
ifdef CONFIG_SYS_LDSCRIPT
# need to strip off double quotes
LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT))
else
LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
endif
# needed for relocation
ifndef CONFIG_NAND_SPL
LDFLAGS_u-boot += -pie

View File

@ -23,6 +23,7 @@
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
@ -60,7 +61,7 @@ static u32 mx31_get_mcu_main_clk(void)
return mx31_get_mpl_dpdgck_clk();
}
u32 mx31_get_ipg_clk(void)
static u32 mx31_get_ipg_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
u32 pdr0 = __REG(CCM_PDR0);
@ -78,6 +79,25 @@ void mx31_dump_clocks(void)
printf("ipg clock : %dHz\n", mx31_get_ipg_clk());
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
case MXC_ARM_CLK:
return mx31_get_mcu_main_clk();
case MXC_IPG_CLK:
case MXC_IPG_PERCLK:
case MXC_CSPI_CLK:
case MXC_UART_CLK:
return mx31_get_ipg_clk();
}
return -1;
}
u32 imx_get_uartclk(void)
{
return mxc_get_clock(MXC_UART_CLK);
}
void mx31_gpio_mux(unsigned long mode)
{
unsigned long reg, shift, tmp;

View File

@ -106,18 +106,6 @@ int timer_init (void)
return 0;
}
void reset_timer_masked (void)
{
/* reset time */
gd->lastinc = GPTCNT; /* capture current incrementer value time */
gd->tbl = 0; /* start "advancing" time stamp from 0 */
}
void reset_timer(void)
{
reset_timer_masked();
}
unsigned long long get_ticks (void)
{
ulong now = GPTCNT; /* current tick value */
@ -147,11 +135,6 @@ ulong get_timer (ulong base)
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
gd->tbl = time_to_tick(t);
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay (unsigned long usec)
{

View File

@ -39,8 +39,6 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
#########################################################################
@ -50,14 +48,3 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
$(TOPDIR)/include/asm/arch/asm-offsets.h: $(TOPDIR)/include/autoconf.mk.dep \
./asm-offsets.s
@echo Generating $@
$(TOPDIR)/tools/scripts/make-asm-offsets ./asm-offsets.s $@
asm-offsets.s: $(TOPDIR)/include/autoconf.mk.dep \
./asm-offsets.c
$(CC) -DDO_DEPS_ONLY \
$(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
-o $@ ./asm-offsets.c -c -S

View File

@ -417,8 +417,8 @@ int do_mx35_showclocks(cmd_tbl_t *cmdtp,
}
U_BOOT_CMD(
clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
"display clocks\n",
clocks, CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
"display clocks",
""
);

View File

@ -73,11 +73,6 @@ inline ulong get_timer_masked(void)
return val;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
ulong tmp;
@ -92,10 +87,6 @@ ulong get_timer(ulong base)
return (tmp / 1000) - base;
}
void set_timer(ulong t)
{
}
/*
* delay x useconds AND preserve advance timstamp value
* GPTCNT is now supposed to tick 1 by 1 us.

View File

@ -50,28 +50,20 @@ int timer_init (void)
val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */
reset_timer_masked(); /* init the timestamp and lastinc value */
/* reset time */
gd->lastinc = READ_TIMER; /* capture current incrementer value */
gd->tbl = 0; /* start "advancing" time stamp */
return(0);
}
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
gd->tbl = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay (unsigned long usec)
{
@ -87,21 +79,17 @@ void __udelay (unsigned long usec)
}
tmp = get_timer (0); /* get current timestamp */
if ( (tmo + tmp + 1) < tmp ) /* if setting this forward will roll time stamp */
reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
else
if ((tmo + tmp + 1) < tmp) { /* if setting this forward will roll */
/* time stamp, then reset time */
gd->lastinc = READ_TIMER; /* capture incrementer value */
gd->tbl = 0; /* start time stamp */
} else {
tmo += tmp; /* else, set advancing stamp wake up time */
}
while (get_timer_masked () < tmo)/* loop till event */
/*NOP*/;
}
void reset_timer_masked (void)
{
/* reset time */
gd->lastinc = READ_TIMER; /* capture current incrementer value time */
gd->tbl = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current tick value */

View File

@ -3,8 +3,8 @@
*
* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
@ -33,7 +33,7 @@
#include <version.h>
.globl _start
_start: b reset
#ifdef CONFIG_PRELOADER
#ifdef CONFIG_SPL_BUILD
ldr pc, _hang
ldr pc, _hang
ldr pc, _hang
@ -68,7 +68,7 @@ _not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
_pad: .word 0x12345678 /* now 16*4=64 */
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_SPL_BUILD */
.global _end_vect
_end_vect:
@ -201,7 +201,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -243,7 +243,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -255,7 +255,7 @@ clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif /* #ifndef CONFIG_PRELOADER */
#endif /* #ifndef CONFIG_SPL_BUILD */
/*
* We are done. Do not return, instead branch to second part of board
@ -329,7 +329,7 @@ cpu_init_crit:
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
*************************************************************************
*
@ -436,17 +436,17 @@ cpu_init_crit:
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_SPL_BUILD */
/*
* exception handlers
*/
#ifdef CONFIG_PRELOADER
#ifdef CONFIG_SPL_BUILD
.align 5
do_hang:
ldr sp, _TEXT_BASE /* use 32 words about stack */
bl hang /* hang and never return */
#else /* !CONFIG_PRELOADER */
#else /* !CONFIG_SPL_BUILD */
.align 5
undefined_instruction:
get_bad_stack
@ -512,11 +512,11 @@ fiq:
.align 5
.global arm1136_cache_flush
arm1136_cache_flush:
#if !defined(CONFIG_SYS_NO_ICACHE)
#if !defined(CONFIG_SYS_ICACHE_OFF)
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
#endif
#if !defined(CONFIG_SYS_NO_DCACHE)
#if !defined(CONFIG_SYS_DCACHE_OFF)
mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
#endif
mov pc, lr @ back to caller
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_SPL_BUILD */

View File

@ -135,18 +135,6 @@ ulong get_tbclk(void)
return (ulong)(timer_load_val / 100);
}
void reset_timer_masked(void)
{
/* reset time */
lastdec = read_timer();
timestamp = 0;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer_masked(void)
{
unsigned long long res = get_ticks();
@ -159,11 +147,6 @@ ulong get_timer(ulong base)
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
}
void __udelay(unsigned long usec)
{
unsigned long long tmp;

View File

@ -263,7 +263,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -343,7 +343,7 @@ skip_hw_init:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -358,7 +358,7 @@ clbss_l:str r2, [r0] /* clear loop... */
#ifndef CONFIG_NAND_SPL
bl coloured_LED_init
bl red_LED_on
bl red_led_on
#endif
#endif

View File

@ -60,15 +60,6 @@ int timer_init(void)
return 0;
}
void reset_timer(void)
{
lastinc = timestamp = 0;
__raw_writel(0, &regs->tcr);
__raw_writel(0, &regs->tim34);
__raw_writel(2 << 22, &regs->tcr);
}
static ulong get_timer_raw(void)
{
ulong now = __raw_readl(&regs->tim34);
@ -88,11 +79,6 @@ ulong get_timer(ulong base)
return (get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
unsigned long long get_ticks(void)
{
return get_timer(0);

View File

@ -36,10 +36,6 @@
#include <asm/hardware.h>
#include <asm/system.h>
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
static void cache_flush(void);
#endif
int cleanup_before_linux (void)
{
/*
@ -50,20 +46,7 @@ int cleanup_before_linux (void)
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
disable_interrupts ();
/* turn off I-cache */
icache_disable();
dcache_disable();
/* flush I-cache */
cache_flush();
#ifdef CONFIG_ARM7_REVD
/* go to high speed */
IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
#endif
#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
disable_interrupts ();
/* Nothing more needed */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
@ -73,18 +56,3 @@ int cleanup_before_linux (void)
#endif
return 0;
}
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
/* flush I/D-cache */
static void cache_flush (void)
{
unsigned long i = 0;
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
}
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No specific cache setup for IntegratorAP/CM720T as yet */
void icache_enable (void)
{
}
#endif

View File

@ -149,18 +149,6 @@ int timer_init (void)
/* set timer 2 counter */
lastdec = TIMER_LOAD_VAL;
#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
/* disable all interrupts */
IO_INTMR1 = 0;
/* operate timer 1 in prescale mode */
IO_SYSCON1 |= SYSCON1_TC1M;
/* select 2kHz clock source for timer 1 */
IO_SYSCON1 &= ~SYSCON1_TC1S;
/* set timer 1 counter */
lastdec = IO_TC1D = TIMER_LOAD_VAL;
#elif defined(CONFIG_S3C4510B)
/* configure free running timer 0 */
PUT_REG( REG_TMOD, 0x0);
@ -207,23 +195,13 @@ int timer_init (void)
*/
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292)
void reset_timer (void)
{
reset_timer_masked ();
}
#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = t;
}
void __udelay (unsigned long usec)
{
ulong tmo;
@ -243,13 +221,6 @@ void __udelay (unsigned long usec)
#endif
}
void reset_timer_masked (void)
{
/* reset time */
lastdec = READ_TIMER;
timestamp = 0;
}
ulong get_timer_masked (void)
{
ulong now = READ_TIMER;

View File

@ -148,7 +148,7 @@ unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
/* Command 16 to read aBlocks from the MMC/SD - caed */
unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
/* The addres on the MMC/SD-card is in bytes,
/* The address on the MMC/SD-card is in bytes,
addr is transformed from blocks to bytes and the result is
placed into the command */
@ -173,7 +173,7 @@ unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
/* Command 24 to write a block to the MMC/SD - card */
unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
/* The addres on the MMC/SD-card is in bytes,
/* The address on the MMC/SD-card is in bytes,
addr is transformed from blocks to bytes and the result is
placed into the command */

View File

@ -1,8 +1,8 @@
/*
* armboot - Startup Code for ARM720 CPU-core
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
@ -178,7 +178,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -220,7 +220,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -234,7 +234,7 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
bl coloured_LED_init
bl red_LED_on
bl red_led_on
#endif
/*
@ -272,25 +272,7 @@ _dynsym_start_ofs:
*************************************************************************
*/
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
/* Interupt-Controller base addresses */
INTMR1: .word 0x80000280 @ 32 bit size
INTMR2: .word 0x80001280 @ 16 bit size
INTMR3: .word 0x80002280 @ 8 bit size
/* SYSCONs */
SYSCON1: .word 0x80000100
SYSCON2: .word 0x80001100
SYSCON3: .word 0x80002200
#define CLKCTL 0x6 /* mask */
#define CLKCTL_18 0x0 /* 18.432 MHz */
#define CLKCTL_36 0x2 /* 36.864 MHz */
#define CLKCTL_49 0x4 /* 49.152 MHz */
#define CLKCTL_73 0x6 /* 73.728 MHz */
#elif defined(CONFIG_LPC2292)
#if defined(CONFIG_LPC2292)
PLLCFG_ADR: .word PLLCFG
PLLFEED_ADR: .word PLLFEED
PLLCON_ADR: .word PLLCON
@ -301,35 +283,7 @@ MEMMAP_ADR: .word MEMMAP
#endif
cpu_init_crit:
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
/*
* mask all IRQs by clearing all bits in the INTMRs
*/
mov r1, #0x00
ldr r0, INTMR1
str r1, [r0]
ldr r0, INTMR2
str r1, [r0]
ldr r0, INTMR3
str r1, [r0]
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15,0,r0,c1,c0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
mcr p15,0,r0,c1,c0
#elif defined(CONFIG_NETARM)
#if defined(CONFIG_NETARM)
/*
* prior to software reset : need to set pin PORTC4 to be *HRESET
*/
@ -634,19 +588,7 @@ fiq:
#endif
#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
.align 5
.globl reset_cpu
reset_cpu:
mov ip, #0
mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
bic ip, ip, #0x000f @ ............wcam
bic ip, ip, #0x2100 @ ..v....s........
mcr p15, 0, ip, c1, c0, 0 @ ctrl register
mov pc, r0
#elif defined(CONFIG_NETARM)
#if defined(CONFIG_NETARM)
.align 5
.globl reset_cpu
reset_cpu:

View File

@ -81,12 +81,6 @@ void reset_timer_masked(void)
debug("%s(): lastdec = %lx\n", __func__, lastdec);
}
void reset_timer(void)
{
debug("%s()\n", __func__);
reset_timer_masked();
}
/*
* return timer ticks
*/
@ -132,12 +126,6 @@ ulong get_timer(ulong base)
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
debug("%s(%lx)\n", __func__, t);
timestamp = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay(unsigned long usec)
{

View File

@ -28,6 +28,9 @@ LIB = $(obj)lib$(SOC).o
SOBJS += lowlevel_init.o
COBJS += reset.o
COBJS += timer.o
COBJS += clock.o
COBJS += cpu.o
COBJS += at91rm9200_devices.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))

View File

@ -0,0 +1,83 @@
/*
* [partely copied from arch/arm/cpu/arm926ejs/at91/arm9260_devices.c]
*
* (C) Copyright 2011
* Andreas Bießmann <andreas.devel@googlemail.com>
*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 17, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 18, PUP); /* RXD0 */
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 20, PUP); /* RXD1 */
at91_set_a_periph(AT91_PIO_PORTB, 21, 1); /* TXD1 */
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 22, PUP); /* RXD2 */
at91_set_a_periph(AT91_PIO_PORTA, 23, 1); /* TXD2 */
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_seriald_hw_init(void)
{
at91_set_a_periph(AT91_PIO_PORTA, 30, PUP); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 31, 1); /* DTXD */
/* writing SYS to PCER has no effect on AT91RM9200 */
}

View File

@ -0,0 +1,158 @@
/*
* [origin: Linux kernel linux/arch/arm/mach-at91/clock.c]
*
* Copyright (C) 2011 Andreas Bießmann
* Copyright (C) 2005 David Brownell
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/clk.h>
#if !defined(CONFIG_AT91FAMILY)
# error You need to define CONFIG_AT91FAMILY in your board config!
#endif
DECLARE_GLOBAL_DATA_PTR;
static unsigned long at91_css_to_rate(unsigned long css)
{
switch (css) {
case AT91_PMC_MCKR_CSS_SLOW:
return CONFIG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
return gd->main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
return gd->plla_rate_hz;
case AT91_PMC_MCKR_CSS_PLLB:
return gd->pllb_rate_hz;
}
return 0;
}
#ifdef CONFIG_USB_ATMEL
static unsigned at91_pll_calc(unsigned main_freq, unsigned out_freq)
{
unsigned i, div = 0, mul = 0, diff = 1 << 30;
unsigned ret = (out_freq > 155000000) ? 0xbe00 : 0x3e00;
/* PLL output max 240 MHz (or 180 MHz per errata) */
if (out_freq > 240000000)
goto fail;
for (i = 1; i < 256; i++) {
int diff1;
unsigned input, mul1;
/*
* PLL input between 1MHz and 32MHz per spec, but lower
* frequences seem necessary in some cases so allow 100K.
* Warning: some newer products need 2MHz min.
*/
input = main_freq / i;
if (input < 100000)
continue;
if (input > 32000000)
continue;
mul1 = out_freq / input;
if (mul1 > 2048)
continue;
if (mul1 < 2)
goto fail;
diff1 = out_freq - input * mul1;
if (diff1 < 0)
diff1 = -diff1;
if (diff > diff1) {
diff = diff1;
div = i;
mul = mul1;
if (diff == 0)
break;
}
}
if (i == 256 && diff > (out_freq >> 5))
goto fail;
return ret | ((mul - 1) << 16) | div;
fail:
return 0;
}
#endif
static u32 at91_pll_rate(u32 freq, u32 reg)
{
unsigned mul, div;
div = reg & 0xff;
mul = (reg >> 16) & 0x7ff;
if (div && mul) {
freq /= div;
freq *= mul + 1;
} else
freq = 0;
return freq;
}
int at91_clock_init(unsigned long main_clock)
{
unsigned freq, mckr;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
unsigned tmp;
/*
* When the bootloader initialized the main oscillator correctly,
* there's no problem using the cycle counter. But if it didn't,
* or when using oscillator bypass mode, we must be told the speed
* of the main clock.
*/
if (!main_clock) {
do {
tmp = readl(&pmc->mcfr);
} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
tmp &= AT91_PMC_MCFR_MAINF_MASK;
main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
gd->main_clk_rate_hz = main_clock;
/* report if PLLA is more than mildly overclocked */
gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
#ifdef CONFIG_USB_ATMEL
/*
* USB clock init: choose 48 MHz PLLB value,
* disable 48MHz clock during usb peripheral suspend.
*
* REVISIT: assumes MCK doesn't derive from PLLB!
*/
gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
AT91_PMC_PLLBR_USBDIV_2;
gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
#endif
/*
* MCK and CPU derive from one of those primary clocks.
* For now, assume this parentage won't change.
*/
mckr = readl(&pmc->mckr);
gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
freq = gd->mck_rate_hz;
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
/* mdiv */
gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
gd->cpu_clk_rate_hz = freq;
return 0;
}

View File

@ -1,7 +1,12 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
* [origin: arch/arm/cpu/arm926ejs/at91/cpu.c]
*
* (C) Copyright 2011
* Andreas Bießmann, andreas.devel@googlemail.com
* (C) Copyright 2010
* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
* (C) Copyright 2009
* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@ -23,21 +28,15 @@
*/
#include <common.h>
#include <asm/arch/at91cap9.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/clk.h>
void coloured_LED_init(void)
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 0
#endif
int arch_cpu_init(void)
{
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
at91_set_gpio_output(CONFIG_RED_LED, 1);
at91_set_gpio_output(CONFIG_GREEN_LED, 1);
at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
at91_set_gpio_output(CONFIG_RED_LED, 0);
at91_set_gpio_output(CONFIG_GREEN_LED, 1);
at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
}

View File

@ -42,11 +42,7 @@ void __attribute__((weak)) board_reset(void)
void reset_cpu(ulong ignored)
{
at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
#if defined(CONFIG_AT91RM9200_USART)
/*shutdown the console to avoid strange chars during reset */
serial_exit();
#endif
at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST;
board_reset();

View File

@ -32,7 +32,7 @@
#include <common.h>
#include <asm/arch/io.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_tc.h>
#include <asm/arch/at91_pmc.h>
@ -44,11 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
int timer_init(void)
{
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
/* enables TC1.0 clock */
writel(1 << AT91_ID_TC0, &pmc->pcer); /* enable clock */
writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
writel(0, &tc->bcr);
writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
@ -59,7 +59,7 @@ int timer_init(void)
when the value in TC_RC is reached */
writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */
writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
@ -72,38 +72,19 @@ int timer_init(void)
/*
* timer without interrupts
*/
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
gd->tbl = t;
}
void __udelay(unsigned long usec)
{
udelay_masked(usec);
}
void reset_timer_masked(void)
{
/* reset time */
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
gd->tbl = 0;
}
ulong get_timer_raw(void)
{
at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
u32 now;
now = readl(&tc->tc[0].cv) & 0x0000ffff;

View File

@ -1,56 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
SOBJS += lowlevel_init.o
COBJS += bcm5221.o
COBJS += dm9161.o
COBJS += ether.o
COBJS += i2c.o
COBJS-$(CONFIG_KS8721_PHY) += ks8721.o
COBJS += lxt972.o
COBJS += reset.o
COBJS += spi.o
COBJS += timer.o
COBJS += usb.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@ -1,232 +0,0 @@
/*
* Broadcom BCM5221 Ethernet PHY
*
* (C) Copyright 2005 REA Elektronik GmbH <www.rea.de>
* Anders Larsen <alarsen@rea.de>
*
* (C) Copyright 2003
* Author : Hamid Ikdoumi (Atmel)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <at91rm9200_net.h>
#include <net.h>
#ifdef CONFIG_DRIVER_ETHER
#include <bcm5221.h>
#if defined(CONFIG_CMD_NET)
/*
* Name:
* bcm5221_IsPhyConnected
* Description:
* Reads the 2 PHY ID registers
* Arguments:
* p_mac - pointer to AT91S_EMAC struct
* Return value:
* TRUE - if id read successfully
* FALSE- if error
*/
unsigned int bcm5221_IsPhyConnected (AT91PS_EMAC p_mac)
{
unsigned short Id1, Id2;
at91rm9200_EmacEnableMDIO (p_mac);
at91rm9200_EmacReadPhy (p_mac, BCM5221_PHYID1, &Id1);
at91rm9200_EmacReadPhy (p_mac, BCM5221_PHYID2, &Id2);
at91rm9200_EmacDisableMDIO (p_mac);
if ((Id1 == (BCM5221_PHYID1_OUI >> 6)) &&
((Id2 >> 10) == (BCM5221_PHYID1_OUI & BCM5221_LSB_MASK)))
return TRUE;
return FALSE;
}
/*
* Name:
* bcm5221_GetLinkSpeed
* Description:
* Link parallel detection status of MAC is checked and set in the
* MAC configuration registers
* Arguments:
* p_mac - pointer to MAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
unsigned char bcm5221_GetLinkSpeed (AT91PS_EMAC p_mac)
{
unsigned short stat1, stat2;
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMSR, &stat1))
return FALSE;
if (!(stat1 & BCM5221_LINK_STATUS)) /* link status up? */
return FALSE;
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_ACSR, &stat2))
return FALSE;
if ((stat1 & BCM5221_100BASE_TX_FD) && (stat2 & BCM5221_100) && (stat2 & BCM5221_FDX)) {
/*set Emac for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return TRUE;
}
if ((stat1 & BCM5221_10BASE_T_FD) && !(stat2 & BCM5221_100) && (stat2 & BCM5221_FDX)) {
/*set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return TRUE;
}
if ((stat1 & BCM5221_100BASE_TX_HD) && (stat2 & BCM5221_100) && !(stat2 & BCM5221_FDX)) {
/*set MII for 100BaseTX and Half Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_SPD;
return TRUE;
}
if ((stat1 & BCM5221_10BASE_T_HD) && !(stat2 & BCM5221_100) && !(stat2 & BCM5221_FDX)) {
/*set MII for 10BaseT and Half Duplex */
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
return TRUE;
}
return FALSE;
}
/*
* Name:
* bcm5221_InitPhy
* Description:
* MAC starts checking its link by using parallel detection and
* Autonegotiation and the same is set in the MAC configuration registers
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
unsigned char bcm5221_InitPhy (AT91PS_EMAC p_mac)
{
unsigned char ret = TRUE;
unsigned short IntValue;
at91rm9200_EmacEnableMDIO (p_mac);
if (!bcm5221_GetLinkSpeed (p_mac)) {
/* Try another time */
ret = bcm5221_GetLinkSpeed (p_mac);
}
/* Disable PHY Interrupts */
at91rm9200_EmacReadPhy (p_mac, BCM5221_INTR, &IntValue);
/* clear FDX LED and INTR Enable */
IntValue &= ~(BCM5221_FDX_LED | BCM5221_INTR_ENABLE);
/* set FDX, SPD, Link, INTR masks */
IntValue |= (BCM5221_FDX_MASK | BCM5221_SPD_MASK |
BCM5221_LINK_MASK | BCM5221_INTR_MASK);
at91rm9200_EmacWritePhy (p_mac, BCM5221_INTR, &IntValue);
at91rm9200_EmacDisableMDIO (p_mac);
return (ret);
}
/*
* Name:
* bcm5221_AutoNegotiate
* Description:
* MAC Autonegotiates with the partner status of same is set in the
* MAC configuration registers
* Arguments:
* dev - pointer to struct net_device
* Return value:
* TRUE - if link status set successfully
* FALSE - if link status not set
*/
unsigned char bcm5221_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
{
unsigned short value;
unsigned short PhyAnar;
unsigned short PhyAnalpar;
/* Set bcm5221 control register */
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMCR, &value))
return FALSE;
value &= ~BCM5221_AUTONEG; /* remove autonegotiation enable */
value |= BCM5221_ISOLATE; /* Electrically isolate PHY */
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
return FALSE;
/* Set the Auto_negotiation Advertisement Register */
/* MII advertising for 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
PhyAnar = BCM5221_TX_FDX | BCM5221_TX_HDX |
BCM5221_10_FDX | BCM5221_10_HDX | BCM5221_AN_IEEE_802_3;
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_ANAR, &PhyAnar))
return FALSE;
/* Read the Control Register */
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMCR, &value))
return FALSE;
value |= BCM5221_SPEED_SELECT | BCM5221_AUTONEG | BCM5221_DUPLEX_MODE;
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
return FALSE;
/* Restart Auto_negotiation */
value |= BCM5221_RESTART_AUTONEG;
value &= ~BCM5221_ISOLATE;
if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
return FALSE;
/*check AutoNegotiate complete */
udelay (10000);
at91rm9200_EmacReadPhy (p_mac, BCM5221_BMSR, &value);
if (!(value & BCM5221_AUTONEG_COMP))
return FALSE;
/* Get the AutoNeg Link partner base page */
if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_ANLPAR, &PhyAnalpar))
return FALSE;
if ((PhyAnar & BCM5221_TX_FDX) && (PhyAnalpar & BCM5221_TX_FDX)) {
/*set MII for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return TRUE;
}
if ((PhyAnar & BCM5221_10_FDX) && (PhyAnalpar & BCM5221_10_FDX)) {
/*set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return TRUE;
}
return FALSE;
}
#endif
#endif /* CONFIG_DRIVER_ETHER */

View File

@ -1,225 +0,0 @@
/*
* (C) Copyright 2003
* Author : Hamid Ikdoumi (Atmel)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <at91rm9200_net.h>
#include <net.h>
#ifdef CONFIG_DRIVER_ETHER
#include <dm9161.h>
#if defined(CONFIG_CMD_NET)
/*
* Name:
* dm9161_IsPhyConnected
* Description:
* Reads the 2 PHY ID registers
* Arguments:
* p_mac - pointer to AT91S_EMAC struct
* Return value:
* TRUE - if id read successfully
* FALSE- if error
*/
unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac)
{
unsigned short Id1, Id2;
at91rm9200_EmacEnableMDIO (p_mac);
at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID1, &Id1);
at91rm9200_EmacReadPhy (p_mac, DM9161_PHYID2, &Id2);
at91rm9200_EmacDisableMDIO (p_mac);
if ((Id1 == (DM9161_PHYID1_OUI >> 6)) &&
((Id2 >> 10) == (DM9161_PHYID1_OUI & DM9161_LSB_MASK)))
return TRUE;
return FALSE;
}
/*
* Name:
* dm9161_GetLinkSpeed
* Description:
* Link parallel detection status of MAC is checked and set in the
* MAC configuration registers
* Arguments:
* p_mac - pointer to MAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac)
{
unsigned short stat1, stat2;
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &stat1))
return FALSE;
if (!(stat1 & DM9161_LINK_STATUS)) /* link status up? */
return FALSE;
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_DSCSR, &stat2))
return FALSE;
if ((stat1 & DM9161_100BASE_TX_FD) && (stat2 & DM9161_100FDX)) {
/*set Emac for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return TRUE;
}
if ((stat1 & DM9161_10BASE_T_FD) && (stat2 & DM9161_10FDX)) {
/*set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return TRUE;
}
if ((stat1 & DM9161_100BASE_TX_HD) && (stat2 & DM9161_100HDX)) {
/*set MII for 100BaseTX and Half Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_SPD;
return TRUE;
}
if ((stat1 & DM9161_10BASE_T_HD) && (stat2 & DM9161_10HDX)) {
/*set MII for 10BaseT and Half Duplex */
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
return TRUE;
}
return FALSE;
}
/*
* Name:
* dm9161_InitPhy
* Description:
* MAC starts checking its link by using parallel detection and
* Autonegotiation and the same is set in the MAC configuration registers
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac)
{
UCHAR ret = TRUE;
unsigned short IntValue;
at91rm9200_EmacEnableMDIO (p_mac);
if (!dm9161_GetLinkSpeed (p_mac)) {
/* Try another time */
ret = dm9161_GetLinkSpeed (p_mac);
}
/* Disable PHY Interrupts */
at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue);
/* set FDX, SPD, Link, INTR masks */
IntValue |= (DM9161_FDX_MASK | DM9161_SPD_MASK |
DM9161_LINK_MASK | DM9161_INTR_MASK);
at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue);
at91rm9200_EmacDisableMDIO (p_mac);
return (ret);
}
/*
* Name:
* dm9161_AutoNegotiate
* Description:
* MAC Autonegotiates with the partner status of same is set in the
* MAC configuration registers
* Arguments:
* dev - pointer to struct net_device
* Return value:
* TRUE - if link status set successfully
* FALSE - if link status not set
*/
UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
{
unsigned short value;
unsigned short PhyAnar;
unsigned short PhyAnalpar;
/* Set dm9161 control register */
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value))
return FALSE;
value &= ~DM9161_AUTONEG; /* remove autonegotiation enable */
value |= DM9161_ISOLATE; /* Electrically isolate PHY */
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
return FALSE;
/* Set the Auto_negotiation Advertisement Register */
/* MII advertising for Next page, 100BaseTxFD and HD, */
/* 10BaseTFD and HD, IEEE 802.3 */
PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX |
DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3;
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar))
return FALSE;
/* Read the Control Register */
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_BMCR, &value))
return FALSE;
value |= DM9161_SPEED_SELECT | DM9161_AUTONEG | DM9161_DUPLEX_MODE;
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
return FALSE;
/* Restart Auto_negotiation */
value |= DM9161_RESTART_AUTONEG;
value &= ~DM9161_ISOLATE;
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
return FALSE;
/*check AutoNegotiate complete */
udelay (10000);
at91rm9200_EmacReadPhy (p_mac, DM9161_BMSR, &value);
if (!(value & DM9161_AUTONEG_COMP))
return FALSE;
/* Get the AutoNeg Link partner base page */
if (!at91rm9200_EmacReadPhy (p_mac, DM9161_ANLPAR, &PhyAnalpar))
return FALSE;
if ((PhyAnar & DM9161_TX_FDX) && (PhyAnalpar & DM9161_TX_FDX)) {
/*set MII for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return TRUE;
}
if ((PhyAnar & DM9161_10_FDX) && (PhyAnalpar & DM9161_10_FDX)) {
/*set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return TRUE;
}
return FALSE;
}
#endif
#endif /* CONFIG_DRIVER_ETHER */

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@ -1,316 +0,0 @@
/*
* (C) Copyright 2003
* Author : Hamid Ikdoumi (Atmel)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <at91rm9200_net.h>
#include <net.h>
#include <miiphy.h>
#include <asm/mach-types.h>
/* ----- Ethernet Buffer definitions ----- */
typedef struct {
unsigned long addr, size;
} rbf_t;
#define RBF_ADDR 0xfffffffc
#define RBF_OWNER (1<<0)
#define RBF_WRAP (1<<1)
#define RBF_BROADCAST (1<<31)
#define RBF_MULTICAST (1<<30)
#define RBF_UNICAST (1<<29)
#define RBF_EXTERNAL (1<<28)
#define RBF_UNKNOWN (1<<27)
#define RBF_SIZE 0x07ff
#define RBF_LOCAL4 (1<<26)
#define RBF_LOCAL3 (1<<25)
#define RBF_LOCAL2 (1<<24)
#define RBF_LOCAL1 (1<<23)
#define RBF_FRAMEMAX 64
#define RBF_FRAMELEN 0x600
#ifdef CONFIG_DRIVER_ETHER
#if defined(CONFIG_CMD_NET)
/* alignment as per Errata #11 (64 bytes) is insufficient! */
rbf_t rbfdt[RBF_FRAMEMAX] __attribute__((aligned(512)));
rbf_t *rbfp;
unsigned char rbf_framebuf[RBF_FRAMEMAX][RBF_FRAMELEN]
__attribute__((aligned(4)));
/* structure to interface the PHY */
AT91S_PhyOps PhyOps;
AT91PS_EMAC p_mac;
/*********** EMAC Phy layer Management functions *************************/
/*
* Name:
* at91rm9200_EmacEnableMDIO
* Description:
* Enables the MDIO bit in MAC control register
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* none
*/
void at91rm9200_EmacEnableMDIO (AT91PS_EMAC p_mac)
{
/* Mac CTRL reg set for MDIO enable */
p_mac->EMAC_CTL |= AT91C_EMAC_MPE; /* Management port enable */
}
/*
* Name:
* at91rm9200_EmacDisableMDIO
* Description:
* Disables the MDIO bit in MAC control register
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* none
*/
void at91rm9200_EmacDisableMDIO (AT91PS_EMAC p_mac)
{
/* Mac CTRL reg set for MDIO disable */
p_mac->EMAC_CTL &= ~AT91C_EMAC_MPE; /* Management port disable */
}
/*
* Name:
* at91rm9200_EmacReadPhy
* Description:
* Reads data from the PHY register
* Arguments:
* dev - pointer to struct net_device
* RegisterAddress - unsigned char
* pInput - pointer to value read from register
* Return value:
* TRUE - if data read successfully
*/
UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac,
unsigned char RegisterAddress,
unsigned short *pInput)
{
p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) |
(AT91C_EMAC_RW_R) |
(RegisterAddress << 18) |
(AT91C_EMAC_CODE_802_3);
udelay (10000);
*pInput = (unsigned short) p_mac->EMAC_MAN;
return TRUE;
}
/*
* Name:
* at91rm9200_EmacWritePhy
* Description:
* Writes data to the PHY register
* Arguments:
* dev - pointer to struct net_device
* RegisterAddress - unsigned char
* pOutput - pointer to value to be written in the register
* Return value:
* TRUE - if data read successfully
*/
UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
unsigned char RegisterAddress,
unsigned short *pOutput)
{
p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) |
AT91C_EMAC_CODE_802_3 | AT91C_EMAC_RW_W |
(RegisterAddress << 18) | *pOutput;
udelay (10000);
return TRUE;
}
int eth_init (bd_t * bd)
{
int ret;
int i;
uchar enetaddr[6];
p_mac = AT91C_BASE_EMAC;
/* PIO Disable Register */
*AT91C_PIOA_PDR = AT91C_PA16_EMDIO | AT91C_PA15_EMDC | AT91C_PA14_ERXER |
AT91C_PA13_ERX1 | AT91C_PA12_ERX0 | AT91C_PA11_ECRS_ECRSDV |
AT91C_PA10_ETX1 | AT91C_PA9_ETX0 | AT91C_PA8_ETXEN |
AT91C_PA7_ETXCK_EREFCK;
#ifdef CONFIG_AT91C_USE_RMII
*AT91C_PIOB_PDR = AT91C_PB19_ERXCK;
*AT91C_PIOB_BSR = AT91C_PB19_ERXCK;
#else
*AT91C_PIOB_PDR = AT91C_PB19_ERXCK | AT91C_PB18_ECOL | AT91C_PB17_ERXDV |
AT91C_PB16_ERX3 | AT91C_PB15_ERX2 | AT91C_PB14_ETXER |
AT91C_PB13_ETX3 | AT91C_PB12_ETX2;
/* Select B Register */
*AT91C_PIOB_BSR = AT91C_PB19_ERXCK | AT91C_PB18_ECOL |
AT91C_PB17_ERXDV | AT91C_PB16_ERX3 | AT91C_PB15_ERX2 |
AT91C_PB14_ETXER | AT91C_PB13_ETX3 | AT91C_PB12_ETX2;
#endif
*AT91C_PMC_PCER = 1 << AT91C_ID_EMAC; /* Peripheral Clock Enable Register */
p_mac->EMAC_CFG |= AT91C_EMAC_CSR; /* Clear statistics */
/* Init Ethernet buffers */
for (i = 0; i < RBF_FRAMEMAX; i++) {
rbfdt[i].addr = (unsigned long)rbf_framebuf[i];
rbfdt[i].size = 0;
}
rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
rbfp = &rbfdt[0];
eth_getenv_enetaddr("ethaddr", enetaddr);
/* The CSB337 originally used a version of the MicroMonitor bootloader
* which saved Ethernet addresses in the "wrong" order. Operating
* systems (like Linux) know this, and apply a workaround. Replicate
* that MicroMonitor behavior so we avoid needing to make such OS code
* care about which bootloader was used.
*/
if (machine_is_csb337()) {
p_mac->EMAC_SA2H = (enetaddr[0] << 8) | (enetaddr[1]);
p_mac->EMAC_SA2L = (enetaddr[2] << 24) | (enetaddr[3] << 16)
| (enetaddr[4] << 8) | (enetaddr[5]);
} else {
p_mac->EMAC_SA2L = (enetaddr[3] << 24) | (enetaddr[2] << 16)
| (enetaddr[1] << 8) | (enetaddr[0]);
p_mac->EMAC_SA2H = (enetaddr[5] << 8) | (enetaddr[4]);
}
p_mac->EMAC_RBQP = (long) (&rbfdt[0]);
p_mac->EMAC_RSR &= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA);
p_mac->EMAC_CFG = (p_mac->EMAC_CFG | AT91C_EMAC_CAF | AT91C_EMAC_NBC)
& ~AT91C_EMAC_CLK;
#ifdef CONFIG_AT91C_USE_RMII
p_mac->EMAC_CFG |= AT91C_EMAC_RMII;
#endif
#if (AT91C_MASTER_CLOCK > 40000000)
/* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
p_mac->EMAC_CFG |= AT91C_EMAC_CLK_HCLK_64;
#endif
p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE;
at91rm9200_GetPhyInterface (& PhyOps);
if (!PhyOps.IsPhyConnected (p_mac))
printf ("PHY not connected!!\n\r");
/* MII management start from here */
if (!(p_mac->EMAC_SR & AT91C_EMAC_LINK)) {
if (!(ret = PhyOps.Init (p_mac))) {
printf ("MAC: error during MII initialization\n");
return 0;
}
} else {
printf ("No link\n\r");
return 0;
}
return 0;
}
int eth_send (volatile void *packet, int length)
{
while (!(p_mac->EMAC_TSR & AT91C_EMAC_BNQ));
p_mac->EMAC_TAR = (long) packet;
p_mac->EMAC_TCR = length;
while (p_mac->EMAC_TCR & 0x7ff);
p_mac->EMAC_TSR |= AT91C_EMAC_COMP;
return 0;
}
int eth_rx (void)
{
int size;
if (!(rbfp->addr & RBF_OWNER))
return 0;
size = rbfp->size & RBF_SIZE;
NetReceive ((volatile uchar *) (rbfp->addr & RBF_ADDR), size);
rbfp->addr &= ~RBF_OWNER;
if (rbfp->addr & RBF_WRAP)
rbfp = &rbfdt[0];
else
rbfp++;
p_mac->EMAC_RSR |= AT91C_EMAC_REC;
return size;
}
void eth_halt (void)
{
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
at91rm9200_EmacReadPhy (p_mac, reg, value);
at91rm9200_EmacDisableMDIO (p_mac);
return 0;
}
int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);
at91rm9200_EmacWritePhy (p_mac, reg, &value);
at91rm9200_EmacDisableMDIO (p_mac);
return 0;
}
#endif
int at91rm9200_miiphy_initialize(bd_t *bis)
{
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register("at91rm9200phy", at91rm9200_miiphy_read, at91rm9200_miiphy_write);
#endif
return 0;
}
#endif
#endif /* CONFIG_DRIVER_ETHER */

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@ -1,192 +0,0 @@
/*
* i2c Support for Atmel's AT91RM9200 Two-Wire Interface
*
* (c) Rick Bronson
*
* Borrowed heavily from original work by:
* Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
*
* Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#include <common.h>
#ifdef CONFIG_HARD_I2C
#include <i2c.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <at91rm9200_i2c.h>
/* define DEBUG */
/*
* Poll the i2c status register until the specified bit is set.
* Returns 0 if timed out (100 msec)
*/
static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) {
int loop_cntr = 10000;
do {
udelay(10);
} while (!(twi->TWI_SR & bit) && (--loop_cntr > 0));
return (loop_cntr > 0);
}
/*
* Generic i2c master transfer entrypoint
*
* rw == 1 means that this is a read
*/
static int
at91_xfer(unsigned char chip, unsigned int addr, int alen,
unsigned char *buffer, int len, int rw)
{
AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
int length;
unsigned char *buf;
/* Set the TWI Master Mode Register */
twi->TWI_MMR = (chip << 16) | (alen << 8)
| ((rw == 1) ? AT91C_TWI_MREAD : 0);
/* Set TWI Internal Address Register with first messages data field */
if (alen > 0)
twi->TWI_IADR = addr;
length = len;
buf = buffer;
if (length && buf) { /* sanity check */
if (rw) {
twi->TWI_CR = AT91C_TWI_START;
while (length--) {
if (!length)
twi->TWI_CR = AT91C_TWI_STOP;
/* Wait until transfer is finished */
if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) {
debug ("at91_i2c: timeout 1\n");
return 1;
}
*buf++ = twi->TWI_RHR;
}
if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
debug ("at91_i2c: timeout 2\n");
return 1;
}
} else {
twi->TWI_CR = AT91C_TWI_START;
while (length--) {
twi->TWI_THR = *buf++;
if (!length)
twi->TWI_CR = AT91C_TWI_STOP;
if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) {
debug ("at91_i2c: timeout 3\n");
return 1;
}
}
/* Wait until transfer is finished */
if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
debug ("at91_i2c: timeout 4\n");
return 1;
}
}
}
return 0;
}
int
i2c_probe(unsigned char chip)
{
unsigned char buffer[1];
return at91_xfer(chip, 0, 0, buffer, 1, 1);
}
int
i2c_read (unsigned char chip, unsigned int addr, int alen,
unsigned char *buffer, int len)
{
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/* we only allow one address byte */
if (alen > 1)
return 1;
/* XXX assume an ATMEL AT24C16 */
if (alen == 1) {
#if 0 /* EEPROM code already sets this correctly */
chip |= (addr >> 8) & 0xff;
#endif
addr = addr & 0xff;
}
#endif
return at91_xfer(chip, addr, alen, buffer, len, 1);
}
int
i2c_write(unsigned char chip, unsigned int addr, int alen,
unsigned char *buffer, int len)
{
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
int i;
unsigned char *buf;
/* we only allow one address byte */
if (alen > 1)
return 1;
/* XXX assume an ATMEL AT24C16 */
if (alen == 1) {
buf = buffer;
/* do single byte writes */
for (i = 0; i < len; i++) {
#if 0 /* EEPROM code already sets this correctly */
chip |= (addr >> 8) & 0xff;
#endif
addr = addr & 0xff;
if (at91_xfer(chip, addr, alen, buf++, 1, 0))
return 1;
addr++;
}
return 0;
}
#endif
return at91_xfer(chip, addr, alen, buffer, len, 0);
}
/*
* Main initialization routine
*/
void
i2c_init(int speed, int slaveaddr)
{
AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
*AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
*AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
*AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK;
*AT91C_PMC_PCER = 1 << AT91C_ID_TWI; /* enable peripheral clock */
twi->TWI_IDR = 0x3ff; /* Disable all interrupts */
twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */
twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS; /* Set Master mode */
/* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8);
debug ("Found AT91 i2c\n");
return;
}
#endif /* CONFIG_HARD_I2C */

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@ -1,249 +0,0 @@
/*
* (C) Copyright 2006
* Author : Eric Benard (Eukrea Electromatique)
* based on dm9161.c which is :
* (C) Copyright 2003
* Author : Hamid Ikdoumi (Atmel)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <at91rm9200_net.h>
#include <net.h>
#include <ks8721.h>
#ifdef CONFIG_DRIVER_ETHER
#if defined(CONFIG_CMD_NET)
/*
* Name:
* ks8721_isphyconnected
* Description:
* Reads the 2 PHY ID registers
* Arguments:
* p_mac - pointer to AT91S_EMAC struct
* Return value:
* 1 - if id read successfully
* 0 - if error
*/
unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac)
{
unsigned short id1, id2;
at91rm9200_EmacEnableMDIO(p_mac);
at91rm9200_EmacReadPhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_PHYID1, &id1);
at91rm9200_EmacReadPhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_PHYID2, &id2);
at91rm9200_EmacDisableMDIO(p_mac);
if ((id1 == (KS8721_PHYID_OUI >> 6)) &&
((id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) {
if ((id2 & KS8721_MODELMASK) == KS8721BL_MODEL)
printf("Micrel KS8721bL PHY detected : ");
else
printf("Unknown Micrel PHY detected : ");
return 1;
}
return 0;
}
/*
* Name:
* ks8721_getlinkspeed
* Description:
* Link parallel detection status of MAC is checked and set in the
* MAC configuration registers
* Arguments:
* p_mac - pointer to MAC
* Return value:
* 1 - if link status set succesfully
* 0 - if link status not set
*/
unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac)
{
unsigned short stat1;
if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1))
return 0;
if (!(stat1 & KS8721_LINK_STATUS)) {
/* link status up? */
printf("Link Down !\n");
return 0;
}
if (stat1 & KS8721_100BASE_TX_FD) {
/* set Emac for 100BaseTX and Full Duplex */
printf("100BT FD\n");
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return 1;
}
if (stat1 & KS8721_10BASE_T_FD) {
/* set MII for 10BaseT and Full Duplex */
printf("10BT FD\n");
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return 1;
}
if (stat1 & KS8721_100BASE_T4_HD) {
/* set MII for 100BaseTX and Half Duplex */
printf("100BT HD\n");
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_SPD;
return 1;
}
if (stat1 & KS8721_10BASE_T_HD) {
/* set MII for 10BaseT and Half Duplex */
printf("10BT HD\n");
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
return 1;
}
return 0;
}
/*
* Name:
* ks8721_initphy
* Description:
* MAC starts checking its link by using parallel detection and
* Autonegotiation and the same is set in the MAC configuration registers
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* 1 - if link status set succesfully
* 0 - if link status not set
*/
unsigned char ks8721_initphy(AT91PS_EMAC p_mac)
{
unsigned char ret = 1;
unsigned short intvalue;
at91rm9200_EmacEnableMDIO(p_mac);
/* Try another time */
if (!ks8721_getlinkspeed(p_mac))
ret = ks8721_getlinkspeed(p_mac);
/* Disable PHY Interrupts */
intvalue = 0;
at91rm9200_EmacWritePhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_MDINTR, &intvalue);
at91rm9200_EmacDisableMDIO(p_mac);
return ret;
}
/*
* Name:
* ks8721_autonegotiate
* Description:
* MAC Autonegotiates with the partner status of same is set in the
* MAC configuration registers
* Arguments:
* dev - pointer to struct net_device
* Return value:
* 1 - if link status set successfully
* 0 - if link status not set
*/
unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status)
{
unsigned short value;
unsigned short phyanar;
unsigned short phyanalpar;
/* Set ks8721 control register */
if (!at91rm9200_EmacReadPhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value))
return 0;
/* remove autonegotiation enable */
value &= ~KS8721_AUTONEG;
/* Electrically isolate PHY */
value |= KS8721_ISOLATE;
if (!at91rm9200_EmacWritePhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
return 0;
}
/*
* Set the Auto_negotiation Advertisement Register
* MII advertising for Next page, 100BaseTxFD and HD,
* 10BaseTFD and HD, IEEE 802.3
*/
phyanar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX |
KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3;
if (!at91rm9200_EmacWritePhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_ANAR, &phyanar)) {
return 0;
}
/* Read the Control Register */
if (!at91rm9200_EmacReadPhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
return 0;
}
value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE;
if (!at91rm9200_EmacWritePhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
return 0;
}
/* Restart Auto_negotiation */
value |= KS8721_RESTART_AUTONEG;
value &= ~KS8721_ISOLATE;
if (!at91rm9200_EmacWritePhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
return 0;
}
/* Check AutoNegotiate complete */
udelay(10000);
at91rm9200_EmacReadPhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_BMSR, &value);
if (!(value & KS8721_AUTONEG_COMP))
return 0;
/* Get the AutoNeg Link partner base page */
if (!at91rm9200_EmacReadPhy(p_mac,
CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &phyanalpar)) {
return 0;
}
if ((phyanar & KS8721_TX_FDX) && (phyanalpar & KS8721_TX_FDX)) {
/* Set MII for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return 1;
}
if ((phyanar & KS8721_10_FDX) && (phyanalpar & KS8721_10_FDX)) {
/* Set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return 1;
}
return 0;
}
#endif /* CONFIG_CMD_NET */
#endif /* CONFIG_DRIVER_ETHER */

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@ -1,169 +0,0 @@
/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
*
* Modified for the at91rm9200dk board by
* (C) Copyright 2004
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/*
* some parameters for the board
*
* This is based on rm9200dk.cfg for the BDI2000 from ABATRON which in
* turn is based on the boot.bin code from ATMEL
*
*/
#include <asm/arch/AT91RM9200.h>
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
#else
.word CONFIG_SYS_TEXT_BASE
#endif
.globl lowlevel_init
lowlevel_init:
/* Get the CKGR Base Address */
ldr r1, =AT91C_BASE_CKGR
/* Main oscillator Enable register */
#ifdef CONFIG_SYS_USE_MAIN_OSCILLATOR
ldr r0, =0x0000FF01 /* Enable main oscillator, OSCOUNT = 0xFF */
#else
ldr r0, =0x0000FF00 /* Disable main oscillator, OSCOUNT = 0xFF */
#endif
str r0, [r1, #AT91C_CKGR_MOR]
/* Add loop to compensate Main Oscillator startup time */
ldr r0, =0x00000010
LoopOsc:
subs r0, r0, #1
bhi LoopOsc
/* memory control configuration */
/* this isn't very elegant, but what the heck */
ldr r0, =SMRDATA
ldr r1, _MTEXT_BASE
sub r0, r0, r1
add r2, r0, #80
0:
/* the address */
ldr r1, [r0], #4
/* the value */
ldr r3, [r0], #4
str r3, [r1]
cmp r2, r0
bne 0b
/* delay - this is all done by guess */
ldr r0, =0x00010000
/* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
1:
subs r0, r0, #1
bhi 1b
ldr r0, =SMRDATA1
ldr r1, _MTEXT_BASE
sub r0, r0, r1
add r2, r0, #176
2:
/* the address */
ldr r1, [r0], #4
/* the value */
ldr r3, [r0], #4
str r3, [r1]
cmp r2, r0
bne 2b
/* switch from FastBus to Asynchronous clock mode */
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #0xC0000000 @ set bit 31 (iA) and 30 (nF)
mcr p15, 0, r0, c1, c0, 0
/* everything is fine now */
mov pc, lr
.ltorg
SMRDATA:
.word AT91C_EBI_CFGR
.word CONFIG_SYS_EBI_CFGR_VAL
.word AT91C_SMC_CSR0
.word CONFIG_SYS_SMC_CSR0_VAL
.word AT91C_PLLAR
.word CONFIG_SYS_PLLAR_VAL
.word AT91C_PLLBR
.word CONFIG_SYS_PLLBR_VAL
.word AT91C_MCKR
.word CONFIG_SYS_MCKR_VAL
/* here there's a delay */
SMRDATA1:
.word AT91C_PIOC_ASR
.word CONFIG_SYS_PIOC_ASR_VAL
.word AT91C_PIOC_BSR
.word CONFIG_SYS_PIOC_BSR_VAL
.word AT91C_PIOC_PDR
.word CONFIG_SYS_PIOC_PDR_VAL
.word AT91C_EBI_CSA
.word CONFIG_SYS_EBI_CSA_VAL
.word AT91C_SDRC_CR
.word CONFIG_SYS_SDRC_CR_VAL
.word AT91C_SDRC_MR
.word CONFIG_SYS_SDRC_MR_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word AT91C_SDRC_MR
.word CONFIG_SYS_SDRC_MR_VAL1
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word AT91C_SDRC_MR
.word CONFIG_SYS_SDRC_MR_VAL2
.word CONFIG_SYS_SDRAM1
.word CONFIG_SYS_SDRAM_VAL
.word AT91C_SDRC_TR
.word CONFIG_SYS_SDRC_TR_VAL
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
.word AT91C_SDRC_MR
.word CONFIG_SYS_SDRC_MR_VAL3
.word CONFIG_SYS_SDRAM
.word CONFIG_SYS_SDRAM_VAL
/* SMRDATA1 is 176 bytes long */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

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@ -1,192 +0,0 @@
/*
*
* (C) Copyright 2003
* Author : Hamid Ikdoumi (Atmel)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Adapted for KwikByte KB920x board: 22APR2005
*/
#include <common.h>
#include <at91rm9200_net.h>
#include <net.h>
#include <miiphy.h>
#include <lxt971a.h>
#ifdef CONFIG_DRIVER_ETHER
#if defined(CONFIG_CMD_NET)
/*
* Name:
* lxt972_IsPhyConnected
* Description:
* Reads the 2 PHY ID registers
* Arguments:
* p_mac - pointer to AT91S_EMAC struct
* Return value:
* TRUE - if id read successfully
* FALSE- if error
*/
unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac)
{
unsigned short Id1, Id2;
at91rm9200_EmacEnableMDIO (p_mac);
at91rm9200_EmacReadPhy(p_mac, MII_PHYSID1, &Id1);
at91rm9200_EmacReadPhy(p_mac, MII_PHYSID2, &Id2);
at91rm9200_EmacDisableMDIO (p_mac);
if ((Id1 == (0x0013)) && ((Id2 & 0xFFF0) == 0x78E0))
return TRUE;
return FALSE;
}
/*
* Name:
* lxt972_GetLinkSpeed
* Description:
* Link parallel detection status of MAC is checked and set in the
* MAC configuration registers
* Arguments:
* p_mac - pointer to MAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac)
{
unsigned short stat1;
if (!at91rm9200_EmacReadPhy (p_mac, PHY_LXT971_STAT2, &stat1))
return FALSE;
if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link status up? */
return FALSE;
if (stat1 & PHY_LXT971_STAT2_100BTX) {
if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
/*set Emac for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
} else {
/*set Emac for 100BaseTX and Half Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_SPD;
}
return TRUE;
} else {
if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
/*set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
} else {
/*set MII for 10BaseT and Half Duplex */
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
}
return TRUE;
}
return FALSE;
}
/*
* Name:
* lxt972_InitPhy
* Description:
* MAC starts checking its link by using parallel detection and
* Autonegotiation and the same is set in the MAC configuration registers
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
UCHAR lxt972_InitPhy (AT91PS_EMAC p_mac)
{
UCHAR ret = TRUE;
at91rm9200_EmacEnableMDIO (p_mac);
if (!lxt972_GetLinkSpeed (p_mac)) {
/* Try another time */
ret = lxt972_GetLinkSpeed (p_mac);
}
/* Disable PHY Interrupts */
at91rm9200_EmacWritePhy (p_mac, PHY_LXT971_INT_ENABLE, 0);
at91rm9200_EmacDisableMDIO (p_mac);
return (ret);
}
/*
* Name:
* lxt972_AutoNegotiate
* Description:
* MAC Autonegotiates with the partner status of same is set in the
* MAC configuration registers
* Arguments:
* dev - pointer to struct net_device
* Return value:
* TRUE - if link status set successfully
* FALSE - if link status not set
*/
UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
{
unsigned short value;
/* Set lxt972 control register */
if (!at91rm9200_EmacReadPhy (p_mac, MII_BMCR, &value))
return FALSE;
/* Restart Auto_negotiation */
value |= BMCR_ANRESTART;
if (!at91rm9200_EmacWritePhy (p_mac, MII_BMCR, &value))
return FALSE;
/*check AutoNegotiate complete */
udelay (10000);
at91rm9200_EmacReadPhy(p_mac, MII_BMSR, &value);
if (!(value & BMSR_ANEGCOMPLETE))
return FALSE;
return (lxt972_GetLinkSpeed (p_mac));
}
#endif
#endif /* CONFIG_DRIVER_ETHER */

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@ -1,71 +0,0 @@
/*
* (C) Copyright 2002
* Lineo, Inc. <www.lineo.com>
* Bernhard Kuhn <bkuhn@lineo.com>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/hardware.h>
void board_reset(void) __attribute__((__weak__));
/*
* Reset the cpu by setting up the watchdog timer and let him time out
* or toggle a GPIO pin on the AT91RM9200DK board
*/
void reset_cpu (ulong ignored)
{
#if defined(CONFIG_AT91RM9200_USART)
/*shutdown the console to avoid strange chars during reset */
serial_exit();
#endif
if (board_reset)
board_reset();
/* this is the way Linux does it */
/* FIXME:
* These defines should be moved into
* include/asm-arm/arch-at91rm9200/AT91RM9200.h
* as soon as the whitespace fix gets applied.
*/
#define AT91C_ST_RSTEN (0x1 << 16)
#define AT91C_ST_EXTEN (0x1 << 17)
#define AT91C_ST_WDRST (0x1 << 0)
#define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */
#define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */
ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ;
ST_CR = AT91C_ST_WDRST;
while (1);
/* Never reached */
}

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@ -1,151 +0,0 @@
/* Driver for ATMEL DataFlash support
* Author : Hamid Ikdoumi (Atmel)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <config.h>
#include <common.h>
#include <asm/hardware.h>
#ifdef CONFIG_HAS_DATAFLASH
#include <dataflash.h>
#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
the Continuous Array Read function */
/* AC Characteristics */
/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
#define DATAFLASH_TCSS (0xC << 16)
#define DATAFLASH_TCHS (0x1 << 24)
#define AT91C_TIMEOUT_WRDY 200000
#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0: NPCS0%1110 */
#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */
/*-------------------------------------------------------------------*/
/* SPI DataFlash Init */
/*-------------------------------------------------------------------*/
void AT91F_SpiInit(void)
{
/* Configure PIOs */
AT91C_BASE_PIOA->PIO_ASR =
AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI |
AT91C_PA5_NPCS2 | AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
AT91C_PA2_SPCK;
AT91C_BASE_PIOA->PIO_PDR =
AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI |
AT91C_PA5_NPCS2 | AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
AT91C_PA2_SPCK;
/* Enable CLock */
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
/* Reset the SPI */
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
/* Configure SPI in Master Mode with No CS selected !!! */
AT91C_BASE_SPI->SPI_MR =
AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
/* Configure CS0 and CS3 */
*(AT91C_SPI_CSR + 0) =
AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
(AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
*(AT91C_SPI_CSR + 3) =
AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
(AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
}
void AT91F_SpiEnable(int cs)
{
switch(cs) {
case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
AT91C_BASE_SPI->SPI_MR |=
((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) &
AT91C_SPI_PCS);
break;
case 3: /* Configure SPI CS3 for Serial DataFlash Card */
/* Set up PIO SDC_TYPE to switch on DataFlash Card */
/* and not MMC/SDCard */
AT91C_BASE_PIOB->PIO_PER =
AT91C_PIO_PB7; /* Set in PIO mode */
AT91C_BASE_PIOB->PIO_OER =
AT91C_PIO_PB7; /* Configure in output */
/* Clear Output */
AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
/* Configure PCS */
AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
AT91C_BASE_SPI->SPI_MR |=
((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
break;
}
/* SPI_Enable */
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN; }
/*---------------------------------------------------------------------------*/
/* \fn AT91F_SpiWrite */
/* \brief Set the PDC registers for a transfert */
/*---------------------------------------------------------------------------*/
unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
{
unsigned int timeout;
pDesc->state = BUSY;
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
/* Initialize the Transmit and Receive Pointer */
AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
/* Intialize the Transmit and Receive Counters */
AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
if ( pDesc->tx_data_size != 0 ) {
/* Initialize the Next Transmit and Next Receive Pointer */
AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
/* Intialize the Next Transmit and Next Receive Counters */
AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
}
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
timeout = 0;
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) &&
((timeout = get_timer_masked() ) < CONFIG_SYS_SPI_WRITE_TOUT));
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
pDesc->state = IDLE;
if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT){
printf("Error Timeout\n\r");
return DATAFLASH_ERROR;
}
return DATAFLASH_OK;
}
#endif

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@ -1,160 +0,0 @@
/*
* (C) Copyright 2002
* Lineo, Inc. <www.lineo.com>
* Bernhard Kuhn <bkuhn@lineo.com>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*#include <asm/io.h>*/
#include <asm/arch/hardware.h>
/*#include <asm/proc/ptrace.h>*/
/* the number of clocks per CONFIG_SYS_HZ */
#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
/* macro to read the 16 bit timer */
#define READ_TIMER (tmr->TC_CV & 0x0000ffff)
AT91PS_TC tmr;
static ulong timestamp;
static ulong lastinc;
int timer_init (void)
{
tmr = AT91C_BASE_TC0;
/* enables TC1.0 clock */
*AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */
*AT91C_TCB0_BCR = 0;
*AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
tmr->TC_CCR = AT91C_TC_CLKDIS;
#define AT91C_TC_CMR_CPCTRG (1 << 14)
/* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */
tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG;
tmr->TC_IDR = ~0ul;
tmr->TC_RC = TIMER_LOAD_VAL;
lastinc = 0;
tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
timestamp = 0;
return (0);
}
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = t;
}
void __udelay (unsigned long usec)
{
udelay_masked(usec);
}
void reset_timer_masked (void)
{
/* reset time */
lastinc = READ_TIMER;
timestamp = 0;
}
ulong get_timer_raw (void)
{
ulong now = READ_TIMER;
if (now >= lastinc) {
/* normal mode */
timestamp += now - lastinc;
} else {
/* we have an overflow ... */
timestamp += now + TIMER_LOAD_VAL - lastinc;
}
lastinc = now;
return timestamp;
}
ulong get_timer_masked (void)
{
return get_timer_raw()/TIMER_LOAD_VAL;
}
void udelay_masked (unsigned long usec)
{
ulong tmo;
ulong endtime;
signed long diff;
tmo = CONFIG_SYS_HZ_CLOCK / 1000;
tmo *= usec;
tmo /= 1000;
endtime = get_timer_raw () + tmo;
do {
ulong now = get_timer_raw ();
diff = endtime - now;
} while (diff >= 0);
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk (void)
{
ulong tbclk;
tbclk = CONFIG_SYS_HZ;
return tbclk;
}

View File

@ -1,53 +0,0 @@
/*
* (C) Copyright 2006
* DENX Software Engineering <mk@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
# ifdef CONFIG_AT91RM9200
#include <asm/arch/hardware.h>
int usb_cpu_init(void)
{
/* Enable USB host clock. */
*AT91C_PMC_SCER = AT91C_PMC_UHP; /* 48MHz clock enabled for UHP */
*AT91C_PMC_PCER = 1 << AT91C_ID_UHP; /* Peripheral Clock Enable Register */
return 0;
}
int usb_cpu_stop(void)
{
/* Initialization failed */
*AT91C_PMC_PCDR = 1 << AT91C_ID_UHP; /* Peripheral Clock Disable Register */
*AT91C_PMC_SCDR = AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
return 0;
}
int usb_cpu_init_fail(void)
{
return usb_cpu_stop();
}
# endif /* CONFIG_AT91RM9200 */
#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */

View File

@ -33,10 +33,6 @@
#include <command.h>
#include <asm/system.h>
#ifdef CONFIG_AT91_LEGACY
#warning Your board is using legacy AT91RM9200 SoC access. Please update!
#endif
static void cache_flush(void);
int cleanup_before_linux (void)

View File

@ -45,22 +45,22 @@ inline void switch_LED_off(uint8_t led)
saved_state[led] = STATUS_LED_OFF;
}
void red_LED_on(void)
void red_led_on(void)
{
switch_LED_on(STATUS_LED_RED);
}
void red_LED_off(void)
void red_led_off(void)
{
switch_LED_off(STATUS_LED_RED);
}
void green_LED_on(void)
void green_led_on(void)
{
switch_LED_on(STATUS_LED_GREEN);
}
void green_LED_off(void)
void green_led_off(void)
{
switch_LED_off(STATUS_LED_GREEN);
}
@ -74,14 +74,14 @@ void __led_toggle(led_id_t mask)
{
if (STATUS_LED_RED == mask) {
if (STATUS_LED_ON == saved_state[STATUS_LED_RED])
red_LED_off();
red_led_off();
else
red_LED_on();
red_led_on();
} else if (STATUS_LED_GREEN == mask) {
if (STATUS_LED_ON == saved_state[STATUS_LED_GREEN])
green_LED_off();
green_led_off();
else
green_LED_on();
green_led_on();
}
}
@ -89,13 +89,13 @@ void __led_set(led_id_t mask, int state)
{
if (STATUS_LED_RED == mask) {
if (STATUS_LED_ON == state)
red_LED_on();
red_led_on();
else
red_LED_off();
red_led_off();
} else if (STATUS_LED_GREEN == mask) {
if (STATUS_LED_ON == state)
green_LED_on();
green_led_on();
else
green_LED_off();
green_led_off();
}
}

View File

@ -34,8 +34,8 @@ lowlevel_init:
str lr, [r1]
/* Turn on both LEDs */
bl red_LED_on
bl green_LED_on
bl red_led_on
bl green_led_on
/* Configure flash wait states before we switch to the PLL */
bl flash_cfg
@ -44,14 +44,14 @@ lowlevel_init:
bl pll_cfg
/* Turn off the Green LED and leave the Red LED on */
bl green_LED_off
bl green_led_off
/* Setup SDRAM */
bl sdram_cfg
/* Turn on Green LED, Turn off the Red LED */
bl green_LED_on
bl red_LED_off
bl green_led_on
bl red_led_off
/* FIXME: we use async mode for now */
mrc p15, 0, r0, c1, c0, 0

View File

@ -91,17 +91,6 @@ unsigned long get_timer(unsigned long base)
return get_timer_masked() - base;
}
void reset_timer_masked(void)
{
read_timer();
timer.ticks = 0;
}
void reset_timer(void)
{
reset_timer_masked();
}
void __udelay(unsigned long usec)
{
unsigned long long target;
@ -128,7 +117,9 @@ int timer_init(void)
writel(TIMER_ENABLE | TIMER_CLKSEL,
&timer_regs->timer3.control);
reset_timer_masked();
/* Reset the timer */
read_timer();
timer.ticks = 0;
return 0;
}

View File

@ -43,7 +43,9 @@ int timer_init (void)
TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
reset_timer_masked();
/* Reset the timer */
TCTL1 &= ~TCTL_TEN;
TCTL1 |= TCTL_TEN; /* Enable timer */
return (0);
}
@ -51,28 +53,11 @@ int timer_init (void)
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base)
{
return get_timer_masked() - base;
}
void set_timer (ulong t)
{
/* nop */
}
void reset_timer_masked (void)
{
TCTL1 &= ~TCTL_TEN;
TCTL1 |= TCTL_TEN; /* Enable timer */
}
ulong get_timer_masked (void)
{
return TCN1;

View File

@ -23,6 +23,14 @@
#include <common.h>
#include <asm/arch/platform.h>
/*
* Initial timer set constants. Nothing complicated, just set for a 1ms
* tick.
*/
#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1)
#define TIMER_COUNT (TIMER_INTERVAL / 2)
#define TIMER_PULSE TIMER_COUNT
/*
* Handy KS8695 register access functions.
*/
@ -32,32 +40,14 @@
ulong timer_ticks;
int timer_init (void)
{
reset_timer();
return 0;
}
/*
* Initial timer set constants. Nothing complicated, just set for a 1ms
* tick.
*/
#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1)
#define TIMER_COUNT (TIMER_INTERVAL / 2)
#define TIMER_PULSE TIMER_COUNT
void reset_timer_masked(void)
{
/* Set the hadware timer for 1ms */
ks8695_write(KS8695_TIMER1, TIMER_COUNT);
ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
ks8695_write(KS8695_TIMER_CTRL, 0x2);
timer_ticks = 0;
}
void reset_timer(void)
{
reset_timer_masked();
return 0;
}
ulong get_timer_masked(void)
@ -76,11 +66,6 @@ ulong get_timer(ulong base)
return (get_timer_masked() - base);
}
void set_timer(ulong t)
{
timer_ticks = t;
}
void __udelay(ulong usec)
{
ulong start = get_timer_masked();

View File

@ -83,22 +83,11 @@ int timer_init(void)
/*
* timer without interrupts
*/
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
void __udelay (unsigned long usec)
{
ulong tmo;
@ -112,13 +101,6 @@ void __udelay (unsigned long usec)
/*NOP*/;
}
void reset_timer_masked(void)
{
/* reset time */
lastdec = READ_TIMER();
timestamp = 0;
}
ulong get_timer_masked(void)
{
ulong tmr = get_ticks();
@ -177,7 +159,7 @@ ulong get_tbclk(void)
{
ulong tbclk;
#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
#if defined(CONFIG_SMDK2400)
tbclk = timer_load_val * 100;
#elif defined(CONFIG_SBC2410X) || \
defined(CONFIG_SMDK2410) || \
@ -198,12 +180,6 @@ void reset_cpu(ulong ignored)
{
struct s3c24x0_watchdog *watchdog;
#ifdef CONFIG_TRAB
extern void disable_vfd(void);
disable_vfd();
#endif
watchdog = s3c24x0_get_base_watchdog();
/* Disable watchdog */

View File

@ -1,8 +1,8 @@
/*
* armboot - Startup Code for ARM920 CPU-core
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
@ -142,11 +142,11 @@ copyex:
# if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif
@ -221,7 +221,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -263,7 +263,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -277,7 +277,7 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
bl coloured_LED_init
bl red_LED_on
bl red_led_on
#endif
/*

View File

@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1510 from ARM920 code ------
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
@ -215,7 +215,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -257,7 +257,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -271,7 +271,7 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
bl coloured_LED_init
bl red_LED_on
bl red_led_on
#endif
/*

View File

@ -56,7 +56,9 @@ int timer_init (void)
CONFIG_SYS_TIMERBASE + CNTL_TIMER);
/* init the timestamp and lastdec value */
reset_timer_masked();
lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
(TIMER_CLOCK / CONFIG_SYS_HZ);
timestamp = 0; /* start "advancing" time stamp from 0 */
return 0;
}
@ -64,22 +66,11 @@ int timer_init (void)
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay (unsigned long usec)
{
@ -96,14 +87,6 @@ void __udelay (unsigned long usec)
}
}
void reset_timer_masked (void)
{
/* reset time */
lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
(TIMER_CLOCK / CONFIG_SYS_HZ);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked (void)
{
uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /

View File

@ -77,13 +77,6 @@ ulong read_timer(void)
return(readl(&armd1timers->cvwr));
}
void reset_timer_masked(void)
{
/* reset time */
gd->tbl = read_timer();
gd->tbu = 0;
}
ulong get_timer_masked(void)
{
ulong now = read_timer();
@ -100,22 +93,12 @@ ulong get_timer_masked(void)
return gd->tbu;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) -
base);
}
void set_timer(ulong t)
{
gd->tbu = t;
}
void __udelay(unsigned long usec)
{
ulong delayticks;
@ -152,7 +135,8 @@ int timer_init(void)
/* Enable timer 0 */
writel(0x1, &armd1timers->cer);
/* init the gd->tbu and gd->tbl value */
reset_timer_masked();
gd->tbl = read_timer();
gd->tbu = 0;
return 0;
}

View File

@ -138,7 +138,7 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_set_b_periph(AT91_PIO_PORTC, 4, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
at91_set_b_periph(AT91_PIO_PORTC, 3, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_pio_output(AT91_PIO_PORTB, 3, 1);

View File

@ -23,77 +23,73 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
writel(1 << AT91SAM9261_ID_US0, &pmc->pcer);
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
writel(1 << AT91SAM9261_ID_US1, &pmc->pcer);
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
writel(1 << AT91SAM9261_ID_US2, &pmc->pcer);
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_serial3_hw_init(void)
void at91_seriald_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer);
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
void at91_serial_hw_init(void)
{
#ifdef CONFIG_USART0
at91_serial0_hw_init();
#endif
#ifdef CONFIG_USART1
at91_serial1_hw_init();
#endif
#ifdef CONFIG_USART2
at91_serial2_hw_init();
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_serial3_hw_init();
#endif
}
#ifdef CONFIG_HAS_DATAFLASH
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
/* Enable clock */
writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer);
writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@ -123,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */
at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */
/* Enable clock */
writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer);
writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 28, 1);

View File

@ -28,17 +28,31 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/gpio.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* RXD0 */
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
@ -47,7 +61,7 @@ void at91_serial1_hw_init(void)
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTD, 1, 0); /* RXD1 */
at91_set_a_periph(AT91_PIO_PORTD, 1, PUP); /* RXD1 */
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
@ -56,7 +70,7 @@ void at91_serial2_hw_init(void)
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 3, 0); /* RXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 3, PUP); /* RXD2 */
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
@ -64,7 +78,7 @@ void at91_seriald_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTC, 30, PUP); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
@ -74,9 +88,9 @@ void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_b_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
at91_set_b_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
at91_set_b_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
at91_set_b_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
at91_set_b_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
/* Enable clock */
writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
@ -111,9 +125,9 @@ void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */
at91_set_a_periph(AT91_PIO_PORTB, 12, PUP); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 13, PUP); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_SPCK */
/* Enable clock */
writel(1 << ATMEL_ID_SPI1, &pmc->pcer);

View File

@ -26,135 +26,131 @@
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/io.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 19, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* RXD0 */
writel(1 << AT91SAM9G45_ID_US0, &pmc->pcer);
at91_set_a_periph(AT91_PIO_PORTB, 18, PUP); /* RXD0 */
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* RXD1 */
writel(1 << AT91SAM9G45_ID_US1, &pmc->pcer);
at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD1 */
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 6, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 7, 0); /* RXD2 */
writel(1 << AT91SAM9G45_ID_US2, &pmc->pcer);
at91_set_a_periph(AT91_PIO_PORTD, 7, PUP); /* RXD2 */
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_serial3_hw_init(void)
void at91_seriald_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTB, 13, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer);
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
void at91_serial_hw_init(void)
{
#ifdef CONFIG_USART0
at91_serial0_hw_init();
#endif
#ifdef CONFIG_USART1
at91_serial1_hw_init();
#endif
#ifdef CONFIG_USART2
at91_serial2_hw_init();
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_serial3_hw_init();
#endif
}
#ifdef CONFIG_ATMEL_SPI
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* SPI0_SPCK */
at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI0_SPCK */
/* Enable clock */
writel(1 << AT91SAM9G45_ID_SPI0, &pmc->pcer);
writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 3, 0);
at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_b_periph(AT91_PIO_PORTB, 18, 0);
at91_set_b_periph(AT91_PIO_PORTB, 18, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_b_periph(AT91_PIO_PORTB, 19, 0);
at91_set_b_periph(AT91_PIO_PORTB, 19, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_b_periph(AT91_PIO_PORTD, 27, 0);
at91_set_b_periph(AT91_PIO_PORTD, 27, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_pio_output(AT91_PIO_PORTB, 3, 0);
at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_pio_output(AT91_PIO_PORTB, 18, 0);
at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_pio_output(AT91_PIO_PORTB, 19, 0);
at91_set_pio_output(AT91_PIO_PORTB, 19, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_pio_output(AT91_PIO_PORTD, 27, 0);
at91_set_pio_output(AT91_PIO_PORTD, 27, 1);
}
}
void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* SPI1_SPCK */
at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 15, PUP); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 16, PUP); /* SPI1_SPCK */
/* Enable clock */
writel(1 << AT91SAM9G45_ID_SPI1, &pmc->pcer);
writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 17, 0);
at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
}
if (cs_mask & (1 << 1)) {
at91_set_b_periph(AT91_PIO_PORTD, 28, 0);
at91_set_b_periph(AT91_PIO_PORTD, 28, 1);
}
if (cs_mask & (1 << 2)) {
at91_set_a_periph(AT91_PIO_PORTD, 18, 0);
at91_set_a_periph(AT91_PIO_PORTD, 18, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_a_periph(AT91_PIO_PORTD, 19, 0);
at91_set_a_periph(AT91_PIO_PORTD, 19, 1);
}
if (cs_mask & (1 << 4)) {
at91_set_pio_output(AT91_PIO_PORTB, 17, 0);
at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
}
if (cs_mask & (1 << 5)) {
at91_set_pio_output(AT91_PIO_PORTD, 28, 0);
at91_set_pio_output(AT91_PIO_PORTD, 28, 1);
}
if (cs_mask & (1 << 6)) {
at91_set_pio_output(AT91_PIO_PORTD, 18, 0);
at91_set_pio_output(AT91_PIO_PORTD, 18, 1);
}
if (cs_mask & (1 << 7)) {
at91_set_pio_output(AT91_PIO_PORTD, 19, 0);
at91_set_pio_output(AT91_PIO_PORTD, 19, 1);
}
}

View File

@ -23,77 +23,73 @@
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 7, 0); /* RXD0 */
writel(1 << AT91SAM9RL_ID_US0, &pmc->pcer);
at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* RXD0 */
writel(1 << ATMEL_ID_USART0, &pmc->pcer);
}
void at91_serial1_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* RXD1 */
writel(1 << AT91SAM9RL_ID_US1, &pmc->pcer);
at91_set_a_periph(AT91_PIO_PORTA, 12, PUP); /* RXD1 */
writel(1 << ATMEL_ID_USART1, &pmc->pcer);
}
void at91_serial2_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* RXD2 */
writel(1 << AT91SAM9RL_ID_US2, &pmc->pcer);
at91_set_a_periph(AT91_PIO_PORTA, 14, PUP); /* RXD2 */
writel(1 << ATMEL_ID_USART2, &pmc->pcer);
}
void at91_serial3_hw_init(void)
void at91_seriald_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer);
writel(1 << ATMEL_ID_SYS, &pmc->pcer);
}
void at91_serial_hw_init(void)
{
#ifdef CONFIG_USART0
at91_serial0_hw_init();
#endif
#ifdef CONFIG_USART1
at91_serial1_hw_init();
#endif
#ifdef CONFIG_USART2
at91_serial2_hw_init();
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_serial3_hw_init();
#endif
}
#ifdef CONFIG_HAS_DATAFLASH
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 25, 0); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 26, 0); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* SPI0_SPCK */
at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 26, PUP); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* SPI0_SPCK */
/* Enable clock */
writel(1 << AT91SAM9RL_ID_SPI, &pmc->pcer);
writel(1 << ATMEL_ID_SPI, &pmc->pcer);
if (cs_mask & (1 << 0)) {
at91_set_a_periph(AT91_PIO_PORTA, 28, 1);

View File

@ -23,36 +23,6 @@
DECLARE_GLOBAL_DATA_PTR;
unsigned long get_cpu_clk_rate(void)
{
return gd->cpu_clk_rate_hz;
}
unsigned long get_main_clk_rate(void)
{
return gd->main_clk_rate_hz;
}
unsigned long get_mck_clk_rate(void)
{
return gd->mck_rate_hz;
}
unsigned long get_plla_clk_rate(void)
{
return gd->plla_rate_hz;
}
unsigned long get_pllb_clk_rate(void)
{
return gd->pllb_rate_hz;
}
u32 get_pllb_init(void)
{
return gd->at91_pllb_usb_init;
}
static unsigned long at91_css_to_rate(unsigned long css)
{
switch (css) {
@ -192,10 +162,7 @@ int at91_clock_init(unsigned long main_clock)
freq = gd->mck_rate_hz;
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
#if defined(CONFIG_AT91RM9200)
/* mdiv */
gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
#elif defined(CONFIG_AT91SAM9G20)
#if defined(CONFIG_AT91SAM9G20)
/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
freq / ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 7) : freq;

View File

@ -29,36 +29,36 @@
#include <asm/arch/gpio.h>
#ifdef CONFIG_RED_LED
void red_LED_on(void)
void red_led_on(void)
{
at91_set_gpio_value(CONFIG_RED_LED, 1);
}
void red_LED_off(void)
void red_led_off(void)
{
at91_set_gpio_value(CONFIG_RED_LED, 0);
}
#endif
#ifdef CONFIG_GREEN_LED
void green_LED_on(void)
void green_led_on(void)
{
at91_set_gpio_value(CONFIG_GREEN_LED, 0);
}
void green_LED_off(void)
void green_led_off(void)
{
at91_set_gpio_value(CONFIG_GREEN_LED, 1);
}
#endif
#ifdef CONFIG_YELLOW_LED
void yellow_LED_on(void)
void yellow_led_on(void)
{
at91_set_gpio_value(CONFIG_YELLOW_LED, 0);
}
void yellow_LED_off(void)
void yellow_led_off(void)
{
at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
}

View File

@ -35,7 +35,7 @@
#include <asm/arch/at91sam9_sdramc.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_rstc.h>
#ifdef CONFIG_AT91_LEGACY
#ifdef CONFIG_ATMEL_LEGACY
#include <asm/arch/at91sam9_matrix.h>
#endif
#ifndef CONFIG_SYS_MATRIX_EBICSA_VAL
@ -230,37 +230,37 @@ SMRDATA1:
.word CONFIG_SYS_SDRC_MDR_VAL
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL1
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL3
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL3
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL4
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL5
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL6
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL7
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL8
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL9
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL4
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL10
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL5
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL11
.word AT91_ASM_SDRAMC_TR
.word CONFIG_SYS_SDRC_TR_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL12
/* User reset enable*/
.word AT91_ASM_RSTC_MR

View File

@ -37,6 +37,7 @@
#define PLLC_PLLDIV4 0x160
#define PLLC_PLLDIV5 0x164
#define PLLC_PLLDIV6 0x168
#define PLLC_PLLDIV7 0x16c
#define PLLC_PLLDIV8 0x170
#define PLLC_PLLDIV9 0x174
@ -61,11 +62,9 @@
#endif
#ifdef CONFIG_SOC_DA8XX
const dv_reg * const sysdiv[7] = {
&davinci_pllc_regs->plldiv1, &davinci_pllc_regs->plldiv2,
&davinci_pllc_regs->plldiv3, &davinci_pllc_regs->plldiv4,
&davinci_pllc_regs->plldiv5, &davinci_pllc_regs->plldiv6,
&davinci_pllc_regs->plldiv7
unsigned int sysdiv[9] = {
PLLC_PLLDIV1, PLLC_PLLDIV2, PLLC_PLLDIV3, PLLC_PLLDIV4, PLLC_PLLDIV5,
PLLC_PLLDIV6, PLLC_PLLDIV7, PLLC_PLLDIV8, PLLC_PLLDIV9
};
int clk_get(enum davinci_clk_ids id)
@ -74,19 +73,27 @@ int clk_get(enum davinci_clk_ids id)
int pllm;
int post_div;
int pll_out;
unsigned int pll_base;
pll_out = CONFIG_SYS_OSCIN_FREQ;
if (id == DAVINCI_AUXCLK_CLKID)
goto out;
if ((id >> 16) == 1)
pll_base = (unsigned int)davinci_pllc1_regs;
else
pll_base = (unsigned int)davinci_pllc0_regs;
id &= 0xFFFF;
/*
* Lets keep this simple. Combining operations can result in
* unexpected approximations
*/
pre_div = (readl(&davinci_pllc_regs->prediv) &
DAVINCI_PLLC_DIV_MASK) + 1;
pllm = readl(&davinci_pllc_regs->pllm) + 1;
pre_div = (readl(pll_base + PLLC_PREDIV) &
DAVINCI_PLLC_DIV_MASK) + 1;
pllm = readl(pll_base + PLLC_PLLM) + 1;
pll_out /= pre_div;
pll_out *= pllm;
@ -94,15 +101,16 @@ int clk_get(enum davinci_clk_ids id)
if (id == DAVINCI_PLLM_CLKID)
goto out;
post_div = (readl(&davinci_pllc_regs->postdiv) &
DAVINCI_PLLC_DIV_MASK) + 1;
post_div = (readl(pll_base + PLLC_POSTDIV) &
DAVINCI_PLLC_DIV_MASK) + 1;
pll_out /= post_div;
if (id == DAVINCI_PLLC_CLKID)
goto out;
pll_out /= (readl(sysdiv[id - 1]) & DAVINCI_PLLC_DIV_MASK) + 1;
pll_out /= (readl(pll_base + sysdiv[id - 1]) &
DAVINCI_PLLC_DIV_MASK) + 1;
out:
return pll_out;

View File

@ -78,11 +78,6 @@ int timer_init(void)
return(0);
}
void reset_timer(void)
{
gd->timer_reset_value = get_ticks();
}
/*
* Get the current 64 bit timer tick count
*/

View File

@ -88,13 +88,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define timestamp gd->tbl
#define lastdec gd->lastinc
void reset_timer_masked(void)
{
/* reset time */
lastdec = READ_TIMER;
timestamp = 0;
}
ulong get_timer_masked(void)
{
ulong now = READ_TIMER;
@ -112,21 +105,11 @@ ulong get_timer_masked(void)
return timestamp;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
void __udelay(unsigned long usec)
{
uint current;
@ -164,7 +147,8 @@ int timer_init(void)
writel(cntmrctrl, CNTMR_CTRL_REG);
/* init the timestamp and lastdec value */
reset_timer_masked();
lastdec = READ_TIMER;
timestamp = 0;
return 0;
}

View File

@ -0,0 +1,65 @@
/*
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/arch/mb86r0x.h>
#include <linux/kbuild.h>
int main(void)
{
/* ddr2 controller */
DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric));
DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1));
DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2));
DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca));
DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm));
DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1));
DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2));
DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr));
DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf));
DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr));
DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims));
DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros));
DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1));
DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba));
DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs));
/* clock reset generator */
DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr));
DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha));
DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa));
DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb));
DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb));
DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram));
/* chip control module */
DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc));
/* external bus interface */
DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0]));
DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2]));
DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4]));
DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0]));
DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2]));
DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4]));
DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0]));
DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2]));
DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4]));
return 0;
}

View File

@ -68,7 +68,9 @@ int timer_init(void)
writel(ctrl, &timer->control);
reset_timer_masked();
/* capture current value time */
lastdec = readl(&timer->value);
timestamp = 0; /* start "advancing" time stamp from 0 */
return 0;
}
@ -94,16 +96,6 @@ unsigned long long get_ticks(void)
return timestamp;
}
void reset_timer_masked(void)
{
struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
MB86R0x_TIMER_BASE;
/* capture current value time */
lastdec = readl(&timer->value);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked(void)
{
return tick_to_time(get_ticks());
@ -121,11 +113,6 @@ void __udelay(unsigned long usec)
/*NOP*/;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;

View File

@ -24,12 +24,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS = generic.o timer.o
MX27OBJS = reset.o
COBJS = generic.o timer.o reset.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
SRCS += $(addprefix $(SRCTREE)/arch/arm/cpu/arm926ejs/mx27/,$(MX27OBJS:.o=.c))
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(MX27OBJS))
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
all: $(obj).depend $(LIB)

View File

@ -0,0 +1,60 @@
/*
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <linux/kbuild.h>
int main(void)
{
/* Clock Control Module */
DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0));
DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1));
DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2));
DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2]));
DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr));
/* Enhanced SDRAM Controller */
DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0));
DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0));
DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc));
/* Multi-Layer AHB Crossbar Switch */
DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
/* AHB <-> IP-Bus Interface */
DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
return 0;
}

View File

@ -121,20 +121,6 @@ int timer_init(void)
return 0;
}
void reset_timer_masked(void)
{
struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
/* reset time */
/* capture current incrementer value time */
lastinc = readl(&gpt->counter);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
void reset_timer(void)
{
reset_timer_masked();
}
unsigned long long get_ticks (void)
{
struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
@ -170,11 +156,6 @@ ulong get_timer (ulong base)
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = time_to_tick(t);
}
/* delay x useconds AND preserve advance timstamp value */
void __udelay (unsigned long usec)
{
@ -187,3 +168,15 @@ void __udelay (unsigned long usec)
while (get_ticks() < tmp) /* loop till event */
/*NOP*/;
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
ulong tbclk;
tbclk = CONFIG_MX25_CLK32;
return tbclk;
}

View File

@ -0,0 +1,45 @@
/*
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <linux/kbuild.h>
int main(void)
{
DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0));
DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1));
DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0));
DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1));
DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr));
DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0));
DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0));
DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0));
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1));
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
return 0;
}

View File

@ -271,7 +271,7 @@ void imx_gpio_mode(int gpio_mode)
}
#ifdef CONFIG_MXC_UART
void mx27_uart_init_pins(void)
void mx27_uart1_init_pins(void)
{
int i;
unsigned int mode[] = {

View File

@ -124,20 +124,6 @@ int timer_init(void)
return 0;
}
void reset_timer_masked(void)
{
struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
/* reset time */
/* capture current incrementer value time */
lastinc = readl(&regs->gpt_tcn);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
void reset_timer(void)
{
reset_timer_masked();
}
unsigned long long get_ticks (void)
{
struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
@ -173,11 +159,6 @@ ulong get_timer (ulong base)
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = time_to_tick(t);
}
/* delay x useconds AND preserve advance timstamp value */
void __udelay (unsigned long usec)
{

View File

@ -40,16 +40,12 @@
/* Configure a free-running, auto-wrap counter with no prescaler */
int timer_init(void)
{
ulong val;
writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
CONFIG_SYS_TIMERBASE + MTU_CR(0));
reset_timer();
return 0;
}
/* Restart counting from 0 */
void reset_timer(void)
{
ulong val;
/* Reset the timer */
writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0));
/*
* The load-register isn't really immediate: it changes on clock
@ -59,6 +55,8 @@ void reset_timer(void)
val = READ_TIMER();
while (READ_TIMER() == val)
;
return 0;
}
/* Return how many HZ passed since "base" */

View File

@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>

View File

@ -65,22 +65,11 @@ int timer_init (void)
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay (unsigned long usec)
{

View File

@ -53,7 +53,7 @@ int dram_init (void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size(
(volatile long *) orion5x_sdram_bar(0),
(long *) orion5x_sdram_bar(0),
CONFIG_MAX_RAM_BANK_SIZE);
return 0;
}
@ -65,7 +65,7 @@ void dram_init_banksize (void)
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
gd->bd->bi_dram[i].size = get_ram_size(
(volatile long *) (gd->bd->bi_dram[i].start),
(long *) (gd->bd->bi_dram[i].start),
CONFIG_MAX_RAM_BANK_SIZE);
}
}

View File

@ -95,13 +95,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define timestamp gd->tbl
#define lastdec gd->lastinc
void reset_timer_masked(void)
{
/* reset time */
lastdec = read_timer();
timestamp = 0;
}
ulong get_timer_masked(void)
{
ulong now = read_timer();
@ -119,21 +112,11 @@ ulong get_timer_masked(void)
return timestamp;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
static inline ulong uboot_cntr_val(void)
{
return readl(CNTMR_VAL_REG(UBOOT_CNTR));
@ -181,5 +164,6 @@ int timer_init(void)
void timer_init_r(void)
{
/* init the timestamp and lastdec value */
reset_timer_masked();
lastdec = read_timer();
timestamp = 0;
}

View File

@ -85,13 +85,6 @@ ulong read_timer(void)
return val;
}
void reset_timer_masked(void)
{
/* reset time */
gd->tbl = read_timer();
gd->tbu = 0;
}
ulong get_timer_masked(void)
{
ulong now = read_timer();
@ -108,22 +101,12 @@ ulong get_timer_masked(void)
return gd->tbu;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) -
base);
}
void set_timer(ulong t)
{
gd->tbu = t;
}
void __udelay(unsigned long usec)
{
ulong delayticks;
@ -161,7 +144,8 @@ int timer_init(void)
/* Enable timer 0 */
writel(0x1, &panthtimers->cer);
/* init the gd->tbu and gd->tbl value */
reset_timer_masked();
gd->tbl = read_timer();
gd->tbu = 0;
return 0;
}

View File

@ -68,7 +68,9 @@ int timer_init(void)
/* auto reload, start timer */
writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
reset_timer_masked();
/* Reset the timer */
lastdec = READ_TIMER();
timestamp = 0;
return 0;
}
@ -76,22 +78,11 @@ int timer_init(void)
/*
* timer without interrupts
*/
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return (get_timer_masked() / GPT_RESOLUTION) - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
void __udelay(unsigned long usec)
{
ulong tmo;
@ -108,13 +99,6 @@ void __udelay(unsigned long usec)
;
}
void reset_timer_masked(void)
{
/* reset time */
lastdec = READ_TIMER();
timestamp = 0;
}
ulong get_timer_masked(void)
{
ulong now = READ_TIMER();

View File

@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
@ -54,7 +54,7 @@
.globl _start
_start:
b reset
#ifdef CONFIG_PRELOADER
#ifdef CONFIG_SPL_BUILD
/* No exception handlers in preloader */
ldr pc, _hang
ldr pc, _hang
@ -98,7 +98,7 @@ _irq:
_fiq:
.word fiq
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_SPL_BUILD */
.balignl 16,0xdeadbeef
@ -214,7 +214,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -256,7 +256,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -270,7 +270,7 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
bl coloured_LED_init
bl red_LED_on
bl red_led_on
#endif
/*
@ -343,7 +343,7 @@ cpu_init_crit:
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
*************************************************************************
*
@ -440,18 +440,18 @@ cpu_init_crit:
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_SPL_BUILD */
/*
* exception handlers
*/
#ifdef CONFIG_PRELOADER
#ifdef CONFIG_SPL_BUILD
.align 5
do_hang:
ldr sp, _TEXT_BASE /* switch to abort stack */
1:
bl 1b /* hang and never return */
#else /* !CONFIG_PRELOADER */
#else /* !CONFIG_SPL_BUILD */
.align 5
undefined_instruction:
get_bad_stack
@ -514,4 +514,4 @@ fiq:
bl do_fiq
#endif
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_SPL_BUILD */

View File

@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>

View File

@ -94,22 +94,11 @@ int timer_init (void)
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
}
void set_timer (ulong t)
{
timestamp = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay (unsigned long usec)
{

View File

@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
@ -186,7 +186,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -228,7 +228,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */

View File

@ -5,8 +5,8 @@
*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
* Copyright (c) 2001 Marius Gr<EFBFBD>ger <mag@sysgo.de>
* Copyright (c) 2002 Alex Z<EFBFBD>pke <azu@sysgo.de>
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
@ -182,7 +182,7 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
@ -224,7 +224,7 @@ fixnext:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
#ifndef CONFIG_SPL_BUILD
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
mov r4, r6 /* reloc addr */
@ -238,7 +238,7 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
bl coloured_LED_init
bl red_LED_on
bl red_led_on
#endif
/*

View File

@ -26,7 +26,12 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).o
START := start.o
COBJS := cpu.o
ifndef CONFIG_SPL_BUILD
COBJS += cache_v7.o
COBJS += cpu.o
endif
COBJS += syslib.o
SRCS := $(START:.o=.S) $(COBJS:.o=.c)

View File

@ -0,0 +1,396 @@
/*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
* Aneesh V <aneesh@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <linux/types.h>
#include <common.h>
#include <asm/armv7.h>
#include <asm/utils.h>
#define ARMV7_DCACHE_INVAL_ALL 1
#define ARMV7_DCACHE_CLEAN_INVAL_ALL 2
#define ARMV7_DCACHE_INVAL_RANGE 3
#define ARMV7_DCACHE_CLEAN_INVAL_RANGE 4
#ifndef CONFIG_SYS_DCACHE_OFF
/*
* Write the level and type you want to Cache Size Selection Register(CSSELR)
* to get size details from Current Cache Size ID Register(CCSIDR)
*/
static void set_csselr(u32 level, u32 type)
{ u32 csselr = level << 1 | type;
/* Write to Cache Size Selection Register(CSSELR) */
asm volatile ("mcr p15, 2, %0, c0, c0, 0" : : "r" (csselr));
}
static u32 get_ccsidr(void)
{
u32 ccsidr;
/* Read current CP15 Cache Size ID Register */
asm volatile ("mrc p15, 1, %0, c0, c0, 0" : "=r" (ccsidr));
return ccsidr;
}
static u32 get_clidr(void)
{
u32 clidr;
/* Read current CP15 Cache Level ID Register */
asm volatile ("mrc p15,1,%0,c0,c0,1" : "=r" (clidr));
return clidr;
}
static void v7_inval_dcache_level_setway(u32 level, u32 num_sets,
u32 num_ways, u32 way_shift,
u32 log2_line_len)
{
int way, set, setway;
/*
* For optimal assembly code:
* a. count down
* b. have bigger loop inside
*/
for (way = num_ways - 1; way >= 0 ; way--) {
for (set = num_sets - 1; set >= 0; set--) {
setway = (level << 1) | (set << log2_line_len) |
(way << way_shift);
/* Invalidate data/unified cache line by set/way */
asm volatile (" mcr p15, 0, %0, c7, c6, 2"
: : "r" (setway));
}
}
/* DSB to make sure the operation is complete */
CP15DSB;
}
static void v7_clean_inval_dcache_level_setway(u32 level, u32 num_sets,
u32 num_ways, u32 way_shift,
u32 log2_line_len)
{
int way, set, setway;
/*
* For optimal assembly code:
* a. count down
* b. have bigger loop inside
*/
for (way = num_ways - 1; way >= 0 ; way--) {
for (set = num_sets - 1; set >= 0; set--) {
setway = (level << 1) | (set << log2_line_len) |
(way << way_shift);
/*
* Clean & Invalidate data/unified
* cache line by set/way
*/
asm volatile (" mcr p15, 0, %0, c7, c14, 2"
: : "r" (setway));
}
}
/* DSB to make sure the operation is complete */
CP15DSB;
}
static void v7_maint_dcache_level_setway(u32 level, u32 operation)
{
u32 ccsidr;
u32 num_sets, num_ways, log2_line_len, log2_num_ways;
u32 way_shift;
set_csselr(level, ARMV7_CSSELR_IND_DATA_UNIFIED);
ccsidr = get_ccsidr();
log2_line_len = ((ccsidr & CCSIDR_LINE_SIZE_MASK) >>
CCSIDR_LINE_SIZE_OFFSET) + 2;
/* Converting from words to bytes */
log2_line_len += 2;
num_ways = ((ccsidr & CCSIDR_ASSOCIATIVITY_MASK) >>
CCSIDR_ASSOCIATIVITY_OFFSET) + 1;
num_sets = ((ccsidr & CCSIDR_NUM_SETS_MASK) >>
CCSIDR_NUM_SETS_OFFSET) + 1;
/*
* According to ARMv7 ARM number of sets and number of ways need
* not be a power of 2
*/
log2_num_ways = log_2_n_round_up(num_ways);
way_shift = (32 - log2_num_ways);
if (operation == ARMV7_DCACHE_INVAL_ALL) {
v7_inval_dcache_level_setway(level, num_sets, num_ways,
way_shift, log2_line_len);
} else if (operation == ARMV7_DCACHE_CLEAN_INVAL_ALL) {
v7_clean_inval_dcache_level_setway(level, num_sets, num_ways,
way_shift, log2_line_len);
}
}
static void v7_maint_dcache_all(u32 operation)
{
u32 level, cache_type, level_start_bit = 0;
u32 clidr = get_clidr();
for (level = 0; level < 7; level++) {
cache_type = (clidr >> level_start_bit) & 0x7;
if ((cache_type == ARMV7_CLIDR_CTYPE_DATA_ONLY) ||
(cache_type == ARMV7_CLIDR_CTYPE_INSTRUCTION_DATA) ||
(cache_type == ARMV7_CLIDR_CTYPE_UNIFIED))
v7_maint_dcache_level_setway(level, operation);
level_start_bit += 3;
}
}
static void v7_dcache_clean_inval_range(u32 start,
u32 stop, u32 line_len)
{
u32 mva;
/* Align start to cache line boundary */
start &= ~(line_len - 1);
for (mva = start; mva < stop; mva = mva + line_len) {
/* DCCIMVAC - Clean & Invalidate data cache by MVA to PoC */
asm volatile ("mcr p15, 0, %0, c7, c14, 1" : : "r" (mva));
}
}
static void v7_dcache_inval_range(u32 start, u32 stop, u32 line_len)
{
u32 mva;
/*
* If start address is not aligned to cache-line do not
* invalidate the first cache-line
*/
if (start & (line_len - 1)) {
printf("ERROR: %s - start address is not aligned - 0x%08x\n",
__func__, start);
/* move to next cache line */
start = (start + line_len - 1) & ~(line_len - 1);
}
/*
* If stop address is not aligned to cache-line do not
* invalidate the last cache-line
*/
if (stop & (line_len - 1)) {
printf("ERROR: %s - stop address is not aligned - 0x%08x\n",
__func__, stop);
/* align to the beginning of this cache line */
stop &= ~(line_len - 1);
}
for (mva = start; mva < stop; mva = mva + line_len) {
/* DCIMVAC - Invalidate data cache by MVA to PoC */
asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (mva));
}
}
static void v7_dcache_maint_range(u32 start, u32 stop, u32 range_op)
{
u32 line_len, ccsidr;
ccsidr = get_ccsidr();
line_len = ((ccsidr & CCSIDR_LINE_SIZE_MASK) >>
CCSIDR_LINE_SIZE_OFFSET) + 2;
/* Converting from words to bytes */
line_len += 2;
/* converting from log2(linelen) to linelen */
line_len = 1 << line_len;
switch (range_op) {
case ARMV7_DCACHE_CLEAN_INVAL_RANGE:
v7_dcache_clean_inval_range(start, stop, line_len);
break;
case ARMV7_DCACHE_INVAL_RANGE:
v7_dcache_inval_range(start, stop, line_len);
break;
}
/* DSB to make sure the operation is complete */
CP15DSB;
}
/* Invalidate TLB */
static void v7_inval_tlb(void)
{
/* Invalidate entire unified TLB */
asm volatile ("mcr p15, 0, %0, c8, c7, 0" : : "r" (0));
/* Invalidate entire data TLB */
asm volatile ("mcr p15, 0, %0, c8, c6, 0" : : "r" (0));
/* Invalidate entire instruction TLB */
asm volatile ("mcr p15, 0, %0, c8, c5, 0" : : "r" (0));
/* Full system DSB - make sure that the invalidation is complete */
CP15DSB;
/* Full system ISB - make sure the instruction stream sees it */
CP15ISB;
}
void invalidate_dcache_all(void)
{
v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
v7_outer_cache_inval_all();
}
/*
* Performs a clean & invalidation of the entire data cache
* at all levels
*/
void flush_dcache_all(void)
{
v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL);
v7_outer_cache_flush_all();
}
/*
* Invalidates range in all levels of D-cache/unified cache used:
* Affects the range [start, stop - 1]
*/
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE);
v7_outer_cache_inval_range(start, stop);
}
/*
* Flush range(clean & invalidate) from all levels of D-cache/unified
* cache used:
* Affects the range [start, stop - 1]
*/
void flush_dcache_range(unsigned long start, unsigned long stop)
{
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_CLEAN_INVAL_RANGE);
v7_outer_cache_flush_range(start, stop);
}
void arm_init_before_mmu(void)
{
v7_outer_cache_enable();
invalidate_dcache_all();
v7_inval_tlb();
}
/*
* Flush range from all levels of d-cache/unified-cache used:
* Affects the range [start, start + size - 1]
*/
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}
#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
void invalidate_dcache_all(void)
{
}
void flush_dcache_all(void)
{
}
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
}
void flush_dcache_range(unsigned long start, unsigned long stop)
{
}
void arm_init_before_mmu(void)
{
}
void flush_cache(unsigned long start, unsigned long size)
{
}
#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
#ifndef CONFIG_SYS_ICACHE_OFF
/* Invalidate entire I-cache and branch predictor array */
void invalidate_icache_all(void)
{
/*
* Invalidate all instruction caches to PoU.
* Also flushes branch target cache.
*/
asm volatile ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
/* Invalidate entire branch predictor array */
asm volatile ("mcr p15, 0, %0, c7, c5, 6" : : "r" (0));
/* Full system DSB - make sure that the invalidation is complete */
CP15DSB;
/* ISB - make sure the instruction stream sees it */
CP15ISB;
}
#else
void invalidate_icache_all(void)
{
}
#endif
/*
* Stub implementations for outer cache operations
*/
void __v7_outer_cache_enable(void)
{
}
void v7_outer_cache_enable(void)
__attribute__((weak, alias("__v7_outer_cache_enable")));
void __v7_outer_cache_disable(void)
{
}
void v7_outer_cache_disable(void)
__attribute__((weak, alias("__v7_outer_cache_disable")));
void __v7_outer_cache_flush_all(void)
{
}
void v7_outer_cache_flush_all(void)
__attribute__((weak, alias("__v7_outer_cache_flush_all")));
void __v7_outer_cache_inval_all(void)
{
}
void v7_outer_cache_inval_all(void)
__attribute__((weak, alias("__v7_outer_cache_inval_all")));
void __v7_outer_cache_flush_range(u32 start, u32 end)
{
}
void v7_outer_cache_flush_range(u32 start, u32 end)
__attribute__((weak, alias("__v7_outer_cache_flush_range")));
void __v7_outer_cache_inval_range(u32 start, u32 end)
{
}
void v7_outer_cache_inval_range(u32 start, u32 end)
__attribute__((weak, alias("__v7_outer_cache_inval_range")));

View File

@ -35,16 +35,17 @@
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
#ifndef CONFIG_L2_OFF
#include <asm/arch/sys_proto.h>
#endif
#include <asm/armv7.h>
static void cache_flush(void);
void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
{
}
void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
__attribute__((weak, alias("save_boot_params_default")));
int cleanup_before_linux(void)
{
unsigned int i;
/*
* this function is called just before we call linux
* it prepares the processor for linux
@ -53,31 +54,29 @@ int cleanup_before_linux(void)
*/
disable_interrupts();
/* turn off I/D-cache */
/*
* Turn off I-cache and invalidate it
*/
icache_disable();
invalidate_icache_all();
/*
* turn off D-cache
* dcache_disable() in turn flushes the d-cache and disables MMU
*/
dcache_disable();
/* invalidate I-cache */
cache_flush();
#ifndef CONFIG_L2_OFF
/* turn off L2 cache */
l2_cache_disable();
/* invalidate L2 cache also */
invalidate_dcache(get_device_type());
#endif
i = 0;
/* mem barrier to sync up things */
asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));
#ifndef CONFIG_L2_OFF
l2_cache_enable();
#endif
/*
* After D-cache is flushed and before it is disabled there may
* be some new valid entries brought into the cache. We are sure
* that these lines are not dirty and will not affect our execution.
* (because unwinding the call-stack and setting a bit in CP15 SCTRL
* is all we did during this. We have not pushed anything on to the
* stack. Neither have we affected any static data)
* So just invalidate the entire d-cache again to avoid coherency
* problems for kernel
*/
invalidate_dcache_all();
return 0;
}
static void cache_flush(void)
{
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
}

View File

@ -0,0 +1,76 @@
/*
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <linux/kbuild.h>
int main(void)
{
/* Round up to make sure size gives nice stack alignment */
DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr));
DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr));
DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr));
DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr));
DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1));
DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2));
DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1));
DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr));
DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr));
DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr));
DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr));
DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2));
DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3));
DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4));
DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr));
DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr));
DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr));
DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor));
DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr));
DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr));
DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr));
DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr));
DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr));
DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0));
DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1));
DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2));
DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3));
DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4));
DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5));
DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6));
DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor));
#if defined(CONFIG_MX53)
DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
#endif
/* DPLL */
DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd));
DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn));
DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op));
DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
return 0;
}

View File

@ -288,7 +288,7 @@ int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
/***************************************************/
U_BOOT_CMD(
clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx5_showclocks,
"display clocks\n",
clocks, CONFIG_SYS_MAXARGS, 1, do_mx5_showclocks,
"display clocks",
""
);

View File

@ -21,7 +21,7 @@
#include <config.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/asm-offsets.h>
#include <generated/asm-offsets.h>
/*
* L2CC Cache setup/invalidation/disable
@ -39,10 +39,14 @@
orr r0, r0, #(1 << 23) /* disable write allocate combine */
orr r0, r0, #(1 << 22) /* disable write allocate */
cmp r3, #0x10 /* r3 contains the silicon rev */
#if defined(CONFIG_MX51)
ldr r1, =0x0
ldr r3, [r1, #ROM_SI_REV]
cmp r3, #0x10
/* disable write combine for TO 2 and lower revs */
orrls r0, r0, #(1 << 25)
#endif
mcr 15, 1, r0, c9, c0, 2
.endm /* init_l2cc */
@ -117,6 +121,35 @@
beq 1b
.endm
.macro setup_pll_errata pll, freq
ldr r2, =\pll
mov r1, #0x0
str r1, [r2, #PLL_DP_CONFIG] /* Disable auto-restart AREN bit */
ldr r1, =0x00001236
str r1, [r2, #PLL_DP_CTL] /* Restart PLL with PLM=1 */
1: ldr r1, [r2, #PLL_DP_CTL] /* Wait for lock */
ands r1, r1, #0x1
beq 1b
ldr r5, \freq
str r5, [r2, #PLL_DP_MFN] /* Modify MFN value */
str r5, [r2, #PLL_DP_HFS_MFN]
mov r1, #0x1
str r1, [r2, #PLL_DP_CONFIG] /* Reload MFN value */
2: ldr r1, [r2, #PLL_DP_CONFIG]
tst r1, #1
bne 2b
ldr r1, =100 /* Wait at least 4 us */
3: subs r1, r1, #1
bge 3b
mov r1, #0x2
str r1, [r2, #PLL_DP_CONFIG] /* Enable auto-restart AREN bit */
.endm
.macro init_clock
ldr r0, =CCM_BASE_ADDR
@ -153,7 +186,12 @@
mov r1, #0x4
str r1, [r0, #CLKCTL_CCSR]
#if defined(CONFIG_MX51_PLL_ERRATA)
setup_pll PLL1_BASE_ADDR, 864
setup_pll_errata PLL1_BASE_ADDR, W_DP_MFN_800_DIT
#else
setup_pll PLL1_BASE_ADDR, 800
#endif
#if defined(CONFIG_MX51)
setup_pll PLL3_BASE_ADDR, 665
@ -283,6 +321,10 @@ lowlevel_init:
mov pc,lr
/* Board level setting value */
W_DP_OP_864: .word DP_OP_864
W_DP_MFD_864: .word DP_MFD_864
W_DP_MFN_864: .word DP_MFN_864
W_DP_MFN_800_DIT: .word DP_MFN_800_DIT
W_DP_OP_800: .word DP_OP_800
W_DP_MFD_800: .word DP_MFD_800
W_DP_MFN_800: .word DP_MFN_800

View File

@ -163,6 +163,36 @@ int cpu_mmc_init(bd_t *bis)
#endif
}
void set_chipselect_size(int const cs_size)
{
unsigned int reg;
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
reg = readl(&iomuxc_regs->gpr1);
switch (cs_size) {
case CS0_128:
reg &= ~0x7; /* CS0=128MB, CS1=0, CS2=0, CS3=0 */
reg |= 0x5;
break;
case CS0_64M_CS1_64M:
reg &= ~0x3F; /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */
reg |= 0x1B;
break;
case CS0_64M_CS1_32M_CS2_32M:
reg &= ~0x1FF; /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */
reg |= 0x4B;
break;
case CS0_32M_CS1_32M_CS2_32M_CS3_32M:
reg &= ~0xFFF; /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */
reg |= 0x249;
break;
default:
printf("Unknown chip select size: %d\n", cs_size);
break;
}
writel(reg, &iomuxc_regs->gpr1);
}
void reset_cpu(ulong addr)
{

View File

@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
int timer_init(void)
{
int i;
ulong val;
/* setup GP Timer 1 */
__raw_writel(GPTCR_SWR, &cur_gpt->control);
@ -65,20 +66,12 @@ int timer_init(void)
/* Freerun Mode, PERCLK1 input */
i = __raw_readl(&cur_gpt->control);
__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
reset_timer_masked();
return 0;
}
void reset_timer(void)
{
reset_timer_masked();
}
void reset_timer_masked(void)
{
ulong val = __raw_readl(&cur_gpt->counter);
val = __raw_readl(&cur_gpt->counter);
lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
timestamp = 0;
return 0;
}
ulong get_timer_masked(void)
@ -99,11 +92,6 @@ ulong get_timer(ulong base)
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay(unsigned long usec)
{

View File

@ -28,6 +28,12 @@ LIB = $(obj)libomap-common.o
SOBJS := reset.o
COBJS := timer.o
COBJS += utils.o
COBJS += gpio.o
ifdef CONFIG_SPL_BUILD
COBJS += spl.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))

View File

@ -40,20 +40,12 @@
#include <asm/io.h>
#include <asm/errno.h>
static struct gpio_bank gpio_bank_34xx[6] = {
{ (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX },
};
#define OMAP_GPIO_DIR_OUT 0
#define OMAP_GPIO_DIR_IN 1
static struct gpio_bank *gpio_bank = &gpio_bank_34xx[0];
static inline struct gpio_bank *get_gpio_bank(int gpio)
static inline const struct gpio_bank *get_gpio_bank(int gpio)
{
return &gpio_bank[gpio >> 5];
return &omap_gpio_bank[gpio >> 5];
}
static inline int get_gpio_index(int gpio)
@ -64,29 +56,30 @@ static inline int get_gpio_index(int gpio)
static inline int gpio_valid(int gpio)
{
if (gpio < 0)
return -1;
return -EINVAL;
if (gpio < 192)
return 0;
return -1;
return -EINVAL;
}
static int check_gpio(int gpio)
{
if (gpio_valid(gpio) < 0) {
printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
return -1;
return -EINVAL;
}
return 0;
}
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
static void _set_gpio_direction(const struct gpio_bank *bank, int gpio,
int is_input)
{
void *reg = bank->base;
u32 l;
switch (bank->method) {
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
reg += OMAP_GPIO_OE;
break;
default:
return;
@ -99,17 +92,33 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
__raw_writel(l, reg);
}
void omap_set_gpio_direction(int gpio, int is_input)
/**
* Get the direction of the GPIO by reading the GPIO_OE register
* corresponding to the specified bank.
*/
static int _get_gpio_direction(const struct gpio_bank *bank, int gpio)
{
struct gpio_bank *bank;
void *reg = bank->base;
u32 v;
if (check_gpio(gpio) < 0)
return;
bank = get_gpio_bank(gpio);
_set_gpio_direction(bank, get_gpio_index(gpio), is_input);
switch (bank->method) {
case METHOD_GPIO_24XX:
reg += OMAP_GPIO_OE;
break;
default:
return -EINVAL;
}
v = __raw_readl(reg);
if (v & (1 << gpio))
return OMAP_GPIO_DIR_IN;
else
return OMAP_GPIO_DIR_OUT;
}
static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio,
int enable)
{
void *reg = bank->base;
u32 l = 0;
@ -117,9 +126,9 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
switch (bank->method) {
case METHOD_GPIO_24XX:
if (enable)
reg += OMAP24XX_GPIO_SETDATAOUT;
reg += OMAP_GPIO_SETDATAOUT;
else
reg += OMAP24XX_GPIO_CLEARDATAOUT;
reg += OMAP_GPIO_CLEARDATAOUT;
l = 1 << gpio;
break;
default:
@ -130,20 +139,27 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
__raw_writel(l, reg);
}
void omap_set_gpio_dataout(int gpio, int enable)
/**
* Set value of the specified gpio
*/
void gpio_set_value(int gpio, int value)
{
struct gpio_bank *bank;
const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return;
bank = get_gpio_bank(gpio);
_set_gpio_dataout(bank, get_gpio_index(gpio), enable);
_set_gpio_dataout(bank, get_gpio_index(gpio), value);
}
int omap_get_gpio_datain(int gpio)
/**
* Get value of the specified gpio
*/
int gpio_get_value(int gpio)
{
struct gpio_bank *bank;
const struct gpio_bank *bank;
void *reg;
int input;
if (check_gpio(gpio) < 0)
return -EINVAL;
@ -151,7 +167,17 @@ int omap_get_gpio_datain(int gpio)
reg = bank->base;
switch (bank->method) {
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAIN;
input = _get_gpio_direction(bank, get_gpio_index(gpio));
switch (input) {
case OMAP_GPIO_DIR_IN:
reg += OMAP_GPIO_DATAIN;
break;
case OMAP_GPIO_DIR_OUT:
reg += OMAP_GPIO_DATAOUT;
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
@ -160,12 +186,45 @@ int omap_get_gpio_datain(int gpio)
& (1 << get_gpio_index(gpio))) != 0;
}
static void _reset_gpio(struct gpio_bank *bank, int gpio)
/**
* Set gpio direction as input
*/
int gpio_direction_input(unsigned gpio)
{
const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return -EINVAL;
bank = get_gpio_bank(gpio);
_set_gpio_direction(bank, get_gpio_index(gpio), 1);
return 0;
}
int omap_request_gpio(int gpio)
/**
* Set gpio direction as output
*/
int gpio_direction_output(unsigned gpio, int value)
{
const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return -EINVAL;
bank = get_gpio_bank(gpio);
_set_gpio_dataout(bank, get_gpio_index(gpio), value);
_set_gpio_direction(bank, get_gpio_index(gpio), 0);
return 0;
}
/**
* Request a gpio before using it.
*
* NOTE: Argument 'label' is unused.
*/
int gpio_request(int gpio, const char *label)
{
if (check_gpio(gpio) < 0)
return -EINVAL;
@ -173,13 +232,16 @@ int omap_request_gpio(int gpio)
return 0;
}
void omap_free_gpio(int gpio)
/**
* Reset and free the gpio after using it.
*/
void gpio_free(unsigned gpio)
{
struct gpio_bank *bank;
const struct gpio_bank *bank;
if (check_gpio(gpio) < 0)
return;
bank = get_gpio_bank(gpio);
_reset_gpio(bank, gpio);
_set_gpio_direction(bank, get_gpio_index(gpio), 1);
}

View File

@ -0,0 +1,272 @@
/*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
*
* Aneesh V <aneesh@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
#include <version_autogenerated.h>
#include <asm/omap_common.h>
#include <asm/arch/mmc_host_def.h>
#include <i2c.h>
#include <image.h>
DECLARE_GLOBAL_DATA_PTR;
/* Define global data structure pointer to it*/
static gd_t gdata __attribute__ ((section(".data")));
static bd_t bdata __attribute__ ((section(".data")));
static const char *image_name;
static u8 image_os;
static u32 image_load_addr;
static u32 image_entry_point;
static u32 image_size;
inline void hang(void)
{
puts("### ERROR ### Please RESET the board ###\n");
for (;;)
;
}
void board_init_f(ulong dummy)
{
/*
* We call relocate_code() with relocation target same as the
* CONFIG_SYS_SPL_TEXT_BASE. This will result in relocation getting
* skipped. Instead, only .bss initialization will happen. That's
* all we need
*/
debug(">>board_init_f()\n");
relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
}
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
switch (omap_boot_device()) {
case BOOT_DEVICE_MMC1:
omap_mmc_init(0);
break;
case BOOT_DEVICE_MMC2:
omap_mmc_init(1);
break;
}
return 0;
}
#endif
static void parse_image_header(const struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header->ih_magic) == IH_MAGIC) {
image_size = __be32_to_cpu(header->ih_size) + header_size;
image_entry_point = __be32_to_cpu(header->ih_load);
/* Load including the header */
image_load_addr = image_entry_point - header_size;
image_os = header->ih_os;
image_name = (const char *)&header->ih_name;
debug("spl: payload image: %s load addr: 0x%x size: %d\n",
image_name, image_load_addr, image_size);
} else {
/* Signature not found - assume u-boot.bin */
printf("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
puts("Assuming u-boot.bin ..\n");
/* Let's assume U-Boot will not be more than 200 KB */
image_size = 200 * 1024;
image_entry_point = CONFIG_SYS_TEXT_BASE;
image_load_addr = CONFIG_SYS_TEXT_BASE;
image_os = IH_OS_U_BOOT;
image_name = "U-Boot";
}
}
static void mmc_load_image_raw(struct mmc *mmc)
{
u32 image_size_sectors, err;
const struct image_header *header;
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct image_header));
/* read image header to find the image size & load address */
err = mmc->block_dev.block_read(0,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 1,
(void *)header);
if (err <= 0)
goto end;
parse_image_header(header);
/* convert size to sectors - round up */
image_size_sectors = (image_size + MMCSD_SECTOR_SIZE - 1) /
MMCSD_SECTOR_SIZE;
/* Read the header too to avoid extra memcpy */
err = mmc->block_dev.block_read(0,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
image_size_sectors, (void *)image_load_addr);
end:
if (err <= 0) {
printf("spl: mmc blk read err - %d\n", err);
hang();
}
}
static void mmc_load_image_fat(struct mmc *mmc)
{
s32 err;
struct image_header *header;
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct image_header));
err = fat_register_device(&mmc->block_dev,
CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
if (err) {
printf("spl: fat register err - %d\n", err);
hang();
}
err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
(u8 *)header, sizeof(struct image_header));
if (err <= 0)
goto end;
parse_image_header(header);
err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
(u8 *)image_load_addr, 0);
end:
if (err <= 0) {
printf("spl: error reading image %s, err - %d\n",
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
hang();
}
}
static void mmc_load_image(void)
{
struct mmc *mmc;
int err;
u32 boot_mode;
mmc_initialize(gd->bd);
/* We register only one device. So, the dev id is always 0 */
mmc = find_mmc_device(0);
if (!mmc) {
puts("spl: mmc device not found!!\n");
hang();
}
err = mmc_init(mmc);
if (err) {
printf("spl: mmc init failed: err - %d\n", err);
hang();
}
boot_mode = omap_boot_mode();
if (boot_mode == MMCSD_MODE_RAW) {
debug("boot mode - RAW\n");
mmc_load_image_raw(mmc);
} else if (boot_mode == MMCSD_MODE_FAT) {
debug("boot mode - FAT\n");
mmc_load_image_fat(mmc);
} else {
puts("spl: wrong MMC boot mode\n");
hang();
}
}
void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
(image_entry_noargs_t) image_entry_point;
image_entry();
}
void jump_to_image_no_args(void) __attribute__ ((noreturn));
void board_init_r(gd_t *id, ulong dummy)
{
u32 boot_device;
debug(">>spl:board_init_r()\n");
timer_init();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
break;
}
switch (image_os) {
case IH_OS_U_BOOT:
debug("Jumping to U-Boot\n");
jump_to_image_no_args();
break;
default:
puts("Unsupported OS image.. Jumping nevertheless..\n");
jump_to_image_no_args();
}
}
void preloader_console_init(void)
{
const char *u_boot_rev = U_BOOT_VERSION;
char rev_string_buffer[50];
gd = &gdata;
gd->bd = &bdata;
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
setup_clocks_for_console();
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
u_boot_rev = &u_boot_rev[7];
printf("\nU-Boot SPL %s (%s - %s)\n", u_boot_rev, U_BOOT_DATE,
U_BOOT_TIME);
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
}

View File

@ -43,8 +43,9 @@ static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
* Nothing really to do with interrupts, just starts up a counter.
*/
#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
#define TIMER_LOAD_VAL 0xffffffff
#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
#define TIMER_OVERFLOW_VAL 0xffffffff
#define TIMER_LOAD_VAL 0
int timer_init(void)
{
@ -54,7 +55,9 @@ int timer_init(void)
writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
&timer_base->tclr);
reset_timer_masked(); /* init the timestamp and lastinc value */
/* reset time, capture current incrementer value time */
gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
gd->tbl = 0; /* start "advancing" time stamp from 0 */
return 0;
}
@ -62,21 +65,11 @@ int timer_init(void)
/*
* timer without interrupts
*/
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
gd->tbl = t;
}
/* delay x useconds */
void __udelay(unsigned long usec)
{
@ -86,20 +79,13 @@ void __udelay(unsigned long usec)
while (tmo > 0) {
now = readl(&timer_base->tcrr);
if (last > now) /* count up timer overflow */
tmo -= TIMER_LOAD_VAL - last + now;
tmo -= TIMER_OVERFLOW_VAL - last + now + 1;
else
tmo -= now - last;
last = now;
}
}
void reset_timer_masked(void)
{
/* reset time, capture current incrementer value time */
gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
gd->tbl = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked(void)
{
/* current tick value */

View File

@ -2,6 +2,10 @@
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
* Aneesh V <aneesh@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
@ -12,7 +16,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@ -21,44 +25,38 @@
* MA 02111-1307 USA
*/
MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
LENGTH = CONFIG_SPL_MAX_SIZE }
MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
arch/arm/cpu/arm920t/start.o (.text)
lib/zlib.o (.text)
lib/crc32.o (.text)
lib/string.o (.text)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.ppcenv)
*(.text)
}
__start = .;
arch/arm/cpu/armv7/start.o (.text)
*(.text*)
} >.sram
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
. = ALIGN(4);
.data : { *(.data) }
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
.got : { *(.got) }
__image_copy_end = .;
_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
__bss_end__ = .;
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.bss*)
. = ALIGN(4);
__bss_end__ = .;
} >.sdram
}

View File

@ -0,0 +1,57 @@
/*
* Copyright 2011 Linaro Limited
* Aneesh V <aneesh@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
static void do_cancel_out(u32 *num, u32 *den, u32 factor)
{
while (1) {
if (((*num)/factor*factor == (*num)) &&
((*den)/factor*factor == (*den))) {
(*num) /= factor;
(*den) /= factor;
} else
break;
}
}
/*
* Cancel out the denominator and numerator of a fraction
* to get smaller numerator and denominator.
*/
void cancel_out(u32 *num, u32 *den, u32 den_limit)
{
do_cancel_out(num, den, 2);
do_cancel_out(num, den, 3);
do_cancel_out(num, den, 5);
do_cancel_out(num, den, 7);
do_cancel_out(num, den, 11);
do_cancel_out(num, den, 13);
do_cancel_out(num, den, 17);
while ((*den) > den_limit) {
*num /= 2;
/*
* Round up the denominator so that the final fraction
* (num/den) is always <= the desired value
*/
*den = (*den + 1) / 2;
}
}

View File

@ -26,11 +26,9 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
SOBJS += cache.o
COBJS += board.o
COBJS += clock.o
COBJS += gpio.o
COBJS += mem.o
COBJS += sys_info.o

View File

@ -37,8 +37,24 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/arch/gpio.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
static void omap3_setup_aux_cr(void);
static void omap3_invalidate_l2_cache_secure(void);
static const struct gpio_bank gpio_bank_34xx[6] = {
{ (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX },
};
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
/******************************************************************************
* Routine: delay
@ -166,27 +182,13 @@ void s_init(void)
try_unlock_memory();
/*
* Right now flushing at low MPU speed.
* Need to move after clock init
*/
invalidate_dcache(get_device_type());
#ifndef CONFIG_ICACHE_OFF
icache_enable();
#endif
/* Errata workarounds */
omap3_setup_aux_cr();
#ifdef CONFIG_L2_OFF
l2_cache_disable();
#else
l2_cache_enable();
#ifndef CONFIG_SYS_L2CACHE_OFF
/* Invalidate L2-cache from secure mode */
omap3_invalidate_l2_cache_secure();
#endif
/*
* Writing to AuxCR in U-boot using SMI for GP DEV
* Currently SMI in Kernel on ES2 devices seems to have an issue
* Once that is resolved, we can postpone this config to kernel
*/
if (get_device_type() == GP_DEVICE)
setup_auxcr();
set_muxconf_regs();
delay(100);
@ -292,3 +294,119 @@ int checkboard (void)
return 0;
}
#endif /* CONFIG_DISPLAY_BOARDINFO */
static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
{
u32 i, num_params = *parameters;
u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
/*
* copy the parameters to an un-cached area to avoid coherency
* issues
*/
for (i = 0; i < num_params; i++) {
__raw_writel(*parameters, sram_scratch_space);
parameters++;
sram_scratch_space++;
}
/* Now make the PPA call */
do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
}
static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
{
u32 acr;
/* Read ACR */
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
acr &= ~clear_bits;
acr |= set_bits;
if (get_device_type() == GP_DEVICE) {
omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_WRITE_ACR,
acr);
} else {
struct emu_hal_params emu_romcode_params;
emu_romcode_params.num_params = 1;
emu_romcode_params.param1 = acr;
omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
(u32 *)&emu_romcode_params);
}
}
static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits)
{
u32 acr;
/* Read ACR */
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
acr &= ~clear_bits;
acr |= set_bits;
/* Write ACR - affects non-secure banked bits */
asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));
}
static void omap3_setup_aux_cr(void)
{
/* Workaround for Cortex-A8 errata: #454179 #430973
* Set "IBE" bit
* Set "Disable Brach Size Mispredicts" bit
* Workaround for erratum #621766
* Enable L1NEON bit
* ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0
*/
omap3_update_aux_cr_secure(0xE0, 0);
}
#ifndef CONFIG_SYS_L2CACHE_OFF
/* Invalidate the entire L2 cache from secure mode */
static void omap3_invalidate_l2_cache_secure(void)
{
if (get_device_type() == GP_DEVICE) {
omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_L2_INVAL,
0);
} else {
struct emu_hal_params emu_romcode_params;
emu_romcode_params.num_params = 1;
emu_romcode_params.param1 = 0;
omap3_emu_romcode_call(OMAP3_EMU_HAL_API_L2_INVAL,
(u32 *)&emu_romcode_params);
}
}
void v7_outer_cache_enable(void)
{
/* Set L2EN */
omap3_update_aux_cr_secure(0x2, 0);
/*
* On some revisions L2EN bit is banked on some revisions it's not
* No harm in setting both banked bits(in fact this is required
* by an erratum)
*/
omap3_update_aux_cr(0x2, 0);
}
void v7_outer_cache_disable(void)
{
/* Clear L2EN */
omap3_update_aux_cr_secure(0, 0x2);
/*
* On some revisions L2EN bit is banked on some revisions it's not
* No harm in clearing both banked bits(in fact this is required
* by an erratum)
*/
omap3_update_aux_cr(0, 0x2);
}
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
{
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}
#endif

View File

@ -1,263 +0,0 @@
/*
* Copyright (c) 2009 Wind River Systems, Inc.
* Tom Rix <Tom.Rix@windriver.com>
*
* This file is based on and replaces the existing cache.c file
* The copyrights for the cache.c file are:
*
* (C) Copyright 2008 Texas Insturments
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/arch/omap3.h>
/*
* omap3 cache code
*/
.align 5
.global invalidate_dcache
.global l2_cache_enable
.global l2_cache_disable
.global setup_auxcr
/*
* invalidate_dcache()
*
* Invalidate the whole D-cache.
*
* Corrupted registers: r0-r5, r7, r9-r11
*
* - mm - mm_struct describing address space
*/
invalidate_dcache:
stmfd r13!, {r0 - r5, r7, r9 - r12, r14}
mov r7, r0 @ take a backup of device type
cmp r0, #0x3 @ check if the device type is
@ GP
moveq r12, #0x1 @ set up to invalide L2
smi: .word 0x01600070 @ Call SMI monitor (smieq)
cmp r7, #0x3 @ compare again in case its
@ lost
beq finished_inval @ if GP device, inval done
@ above
mrc p15, 1, r0, c0, c0, 1 @ read clidr
ands r3, r0, #0x7000000 @ extract loc from clidr
mov r3, r3, lsr #23 @ left align loc bit field
beq finished_inval @ if loc is 0, then no need to
@ clean
mov r10, #0 @ start clean at cache level 0
inval_loop1:
add r2, r10, r10, lsr #1 @ work out 3x current cache
@ level
mov r1, r0, lsr r2 @ extract cache type bits from
@ clidr
and r1, r1, #7 @ mask of the bits for current
@ cache only
cmp r1, #2 @ see what cache we have at
@ this level
blt skip_inval @ skip if no cache, or just
@ i-cache
mcr p15, 2, r10, c0, c0, 0 @ select current cache level
@ in cssr
mov r2, #0 @ operand for mcr SBZ
mcr p15, 0, r2, c7, c5, 4 @ flush prefetch buffer to
@ sych the new cssr&csidr,
@ with armv7 this is 'isb',
@ but we compile with armv5
mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
and r2, r1, #7 @ extract the length of the
@ cache lines
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff
ands r4, r4, r1, lsr #3 @ find maximum number on the
@ way size
clz r5, r4 @ find bit position of way
@ size increment
ldr r7, =0x7fff
ands r7, r7, r1, lsr #13 @ extract max number of the
@ index size
inval_loop2:
mov r9, r4 @ create working copy of max
@ way size
inval_loop3:
orr r11, r10, r9, lsl r5 @ factor way and cache number
@ into r11
orr r11, r11, r7, lsl r2 @ factor index number into r11
mcr p15, 0, r11, c7, c6, 2 @ invalidate by set/way
subs r9, r9, #1 @ decrement the way
bge inval_loop3
subs r7, r7, #1 @ decrement the index
bge inval_loop2
skip_inval:
add r10, r10, #2 @ increment cache number
cmp r3, r10
bgt inval_loop1
finished_inval:
mov r10, #0 @ swith back to cache level 0
mcr p15, 2, r10, c0, c0, 0 @ select current cache level
@ in cssr
mcr p15, 0, r10, c7, c5, 4 @ flush prefetch buffer,
@ with armv7 this is 'isb',
@ but we compile with armv5
ldmfd r13!, {r0 - r5, r7, r9 - r12, pc}
l2_cache_set:
stmfd r13!, {r4 - r6, lr}
mov r5, r0
bl get_cpu_rev
mov r4, r0
bl get_cpu_family
@ ES2 onwards we can disable/enable L2 ourselves
cmp r0, #CPU_OMAP34XX
cmpeq r4, #CPU_3XX_ES10
mrc 15, 0, r0, cr1, cr0, 1
bic r0, r0, #2
orr r0, r0, r5, lsl #1
mcreq 15, 0, r0, cr1, cr0, 1
@ GP Device ROM code API usage here
@ r12 = AUXCR Write function and r0 value
mov ip, #3
@ SMCNE instruction to call ROM Code API
.word 0x11600070
ldmfd r13!, {r4 - r6, pc}
l2_cache_enable:
mov r0, #1
b l2_cache_set
l2_cache_disable:
mov r0, #0
b l2_cache_set
/******************************************************************************
* Routine: setup_auxcr()
* Description: Write to AuxCR desired value using SMI.
* general use.
*****************************************************************************/
setup_auxcr:
mrc p15, 0, r0, c0, c0, 0 @ read main ID register
and r2, r0, #0x00f00000 @ variant
and r3, r0, #0x0000000f @ revision
orr r1, r3, r2, lsr #20-4 @ combine variant and revision
mov r12, #0x3
mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #0x10 @ Enable ASA
@ Enable L1NEON on pre-r2p1 (erratum 621766 workaround)
cmp r1, #0x21
orrlt r0, r0, #1 << 5
.word 0xE1600070 @ SMC
mov r12, #0x2
mrc p15, 1, r0, c9, c0, 2
@ Set PLD_FWD bit in L2AUXCR on pre-r2p1 (erratum 725233 workaround)
cmp r1, #0x21
orrlt r0, r0, #1 << 27
.word 0xE1600070 @ SMC
bx lr
.align 5
.global v7_flush_dcache_all
.global v7_flush_cache_all
/*
* v7_flush_dcache_all()
*
* Flush the whole D-cache.
*
* Corrupted registers: r0-r7, r9-r11 (r6 only in Thumb mode)
*
* - mm - mm_struct describing address space
*/
v7_flush_dcache_all:
# dmb @ ensure ordering with previous memory accesses
mrc p15, 1, r0, c0, c0, 1 @ read clidr
ands r3, r0, #0x7000000 @ extract loc from clidr
mov r3, r3, lsr #23 @ left align loc bit field
beq finished @ if loc is 0, then no need to clean
mov r10, #0 @ start clean at cache level 0
loop1:
add r2, r10, r10, lsr #1 @ work out 3x current cache level
mov r1, r0, lsr r2 @ extract cache type bits from clidr
and r1, r1, #7 @ mask of the bits for current cache only
cmp r1, #2 @ see what cache we have at this level
blt skip @ skip if no cache, or just i-cache
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
mcr p15, 0, r10, c7, c5, 4 @ flush prefetch buffer,
@ with armv7 this is 'isb',
@ but we compile with armv5
mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
and r2, r1, #7 @ extract the length of the cache lines
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff
ands r4, r4, r1, lsr #3 @ find maximum number on the way size
clz r5, r4 @ find bit position of way size increment
ldr r7, =0x7fff
ands r7, r7, r1, lsr #13 @ extract max number of the index size
loop2:
mov r9, r4 @ create working copy of max way size
loop3:
orr r11, r10, r9, lsl r5 @ factor way and cache number into r11
orr r11, r11, r7, lsl r2 @ factor index number into r11
mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
subs r9, r9, #1 @ decrement the way
bge loop3
subs r7, r7, #1 @ decrement the index
bge loop2
skip:
add r10, r10, #2 @ increment cache number
cmp r3, r10
bgt loop1
finished:
mov r10, #0 @ swith back to cache level 0
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
# dsb
mcr p15, 0, r10, c7, c5, 4 @ flush prefetch buffer,
@ with armv7 this is 'isb',
@ but we compile with armv5
mov pc, lr
/*
* v7_flush_cache_all()
*
* Flush the entire cache system.
* The data cache flush is now achieved using atomic clean / invalidates
* working outwards from L1 cache. This is done using Set/Way based cache
* maintainance instructions.
* The instruction cache can still be invalidated back to the point of
* unification in a single instruction.
*
*/
v7_flush_cache_all:
stmfd sp!, {r0-r7, r9-r11, lr}
bl v7_flush_dcache_all
mov r0, #0
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
ldmfd sp!, {r0-r7, r9-r11, lr}
mov pc, lr

View File

@ -399,7 +399,7 @@ static void dpll3_init_36xx(u32 sil_index, u32 clk_index)
/* L3 */
sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV);
/* GFX */
sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV);
sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV_36X);
/* RESET MGR */
sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM);
/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
@ -579,6 +579,7 @@ void prcm_init(void)
dpll3_init_36xx(0, clk_index);
dpll4_init_36xx(0, clk_index);
dpll5_init_34xx(0, clk_index);
iva_init_36xx(0, clk_index);
mpu_init_36xx(0, clk_index);
@ -607,7 +608,9 @@ void prcm_init(void)
dpll3_init_34xx(sil_index, clk_index);
dpll4_init_34xx(sil_index, clk_index);
dpll5_init_34xx(sil_index, clk_index);
iva_init_34xx(sil_index, clk_index);
if (get_cpu_family() != CPU_AM35XX)
iva_init_34xx(sil_index, clk_index);
mpu_init_34xx(sil_index, clk_index);
/* Lock MPU DPLL to set frequency */
@ -674,7 +677,9 @@ void per_clocks_enable(void)
/* Enable the ICLK for 32K Sync Timer as its used in udelay */
sr32(&prcm_base->iclken_wkup, 2, 1, 0x1);
sr32(&prcm_base->fclken_iva2, 0, 32, FCK_IVA2_ON);
if (get_cpu_family() != CPU_AM35XX)
sr32(&prcm_base->fclken_iva2, 0, 32, FCK_IVA2_ON);
sr32(&prcm_base->fclken1_core, 0, 32, FCK_CORE1_ON);
sr32(&prcm_base->iclken1_core, 0, 32, ICK_CORE1_ON);
sr32(&prcm_base->iclken2_core, 0, 32, ICK_CORE2_ON);
@ -682,8 +687,10 @@ void per_clocks_enable(void)
sr32(&prcm_base->iclken_wkup, 0, 32, ICK_WKUP_ON);
sr32(&prcm_base->fclken_dss, 0, 32, FCK_DSS_ON);
sr32(&prcm_base->iclken_dss, 0, 32, ICK_DSS_ON);
sr32(&prcm_base->fclken_cam, 0, 32, FCK_CAM_ON);
sr32(&prcm_base->iclken_cam, 0, 32, ICK_CAM_ON);
if (get_cpu_family() != CPU_AM35XX) {
sr32(&prcm_base->fclken_cam, 0, 32, FCK_CAM_ON);
sr32(&prcm_base->iclken_cam, 0, 32, ICK_CAM_ON);
}
sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON);
sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);

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