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Author SHA1 Message Date
fb14b6b2f6 Prepare v2012.04-rc3
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-04-18 22:52:34 +02:00
8262e61df5 Merge branch 'master' of git://git.denx.de/u-boot-sh
* 'master' of git://git.denx.de/u-boot-sh:
  sh: ecovec: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
  sh: Fix rsk7264 pin setup for on-board ethernet
2012-04-18 22:41:06 +02:00
77fe6e773a sh: ecovec: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
When calling board_late_init, we need to define CONFIG_BOARD_LATE_INIT.
The latest ecovec config defines BOARD_LATE_INIT, board_late_init is not called.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-04-18 11:16:46 +09:00
f8abfdefcb sh: Fix rsk7264 pin setup for on-board ethernet
This sets up the external ethernet IRQ pin.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-04-18 11:16:46 +09:00
03f3587822 i.MX6: arm2: Add AXI cache and Qos setting
Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of
the display IDMA channel.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-04-17 15:41:22 +02:00
4 changed files with 9 additions and 3 deletions

View File

@ -24,7 +24,7 @@
VERSION = 2012
PATCHLEVEL = 04
SUBLEVEL =
EXTRAVERSION = -rc2
EXTRAVERSION = -rc3
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else

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@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000
DATA 4 0x020c4078 0x00FFF300
DATA 4 0x020c407c 0x0F0000C3
DATA 4 0x020c4080 0x000003FF
# enable AXI cache for VDOA/VPU/IPU
DATA 4 0x020e0010 0xF00000FF
# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
DATA 4 0x020e0018 0x007F007F
DATA 4 0x020e001c 0x007F007F

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@ -185,7 +185,7 @@ CS0WCR_D: .long 0x00000B41
CS0BCR_A: .long 0xFFFC0004
CS0BCR_D: .long 0x10000400
PJCR0_A: .long 0xFFFE390E
PJCR0_D: .word 0x0300
PJCR0_D: .word 0x3300
.align 2
CS2WCR_A: .long 0xFFFC0030
CS2WCR_D: .long 0x00000B01

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@ -43,7 +43,7 @@
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7724 1
#define BOARD_LATE_INIT 1
#define CONFIG_BOARD_LATE_INIT 1
#define CONFIG_ECOVEC 1
#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000