It is possible to construct a devicetree blob with multiple root nodes.
Update fdt_check_full() to check for this, along with a root node with an
invalid name.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
Some strange modifications of the FIT can introduce security risks. Add an
option to check it thoroughly, using libfdt's fdt_check_full() function.
Enable this by default if signature verification is enabled.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
At present this function does not accept a size for the FIT. This means
that it must be read from the FIT itself, introducing potential security
risk. Update the function to include a size parameter, which can be
invalid, in which case fit_check_format() calculates it.
For now no callers pass the size, but this can be updated later.
Also adjust the return value to an error code so that all the different
types of problems can be distinguished by the user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
When searching for a node called 'fred', any unit address appended to the
name is ignored by libfdt, meaning that 'fred' can match 'fred@1'. This
means that we cannot be sure that the node originally intended is the one
that is used.
Disallow use of nodes with unit addresses.
Update the forge test also, since it uses @ addresses.
CVE-2021-27138
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
At present fdt_find_regions() assumes that the FIT is a valid devicetree.
If the FIT has two root nodes this is currently not detected in this
function, nor does libfdt's fdt_check_full() notice. Also it is possible
for the root node to have a name even though it should not.
Add checks for these and return -FDT_ERR_BADSTRUCTURE if a problem is
detected.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
As this is the last SH4A board, remove that support as well.
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Patch-cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Patch-cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Chris Packham <judge.packham@gmail.com>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Pull request for UEFI sub-system for efi-2021-04-rc2-2
Bug fixes:
* fix stack smashing in UEFI capsule updates
* correct loading of UEFI binaries where Virtual size is not a
multiple of FileAlignment
* simplify detection of capsule files.
* buildman: use threading.is_alive() instead of removed method IsAlive()
The isAlive() method was deprecated in Python 3.8 and has been removed in
Python 3.9. See https://bugs.python.org/issue37804. Use is_alive() instead.
Since Python 2.6 is_alive() has been a synonym for isAlive(). So there
should be no problems for users using elder Python 3 versions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
fix get_last_capsule() leads to writes beyond the stack allocated buffer.
This was indicated when enabling the stack protector.
utf16_utf8_strcpy() only stops copying when reaching '\0'. The current
invocation always writes beyond the end of value[].
The output length of utf16_utf8_strcpy() may be longer than the number of
UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15 UTF-8
tokens. Hence, using utf16_utf8_strcpy() without checking the input may
lead to further writes beyond value[].
The current invocation of strict_strtoul() reads beyond the end of value[].
A non-hexadecimal value after "Capsule" (e.g. "CapsuleZZZZ") must result in
an error. We cat catch this by checking the return value of strict_strtoul().
A value that is too short after "Capsule" (e.g. "Capsule0") must result in
an error. We must check the string length of value[].
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
'.' and '..' are directories. So when looking for capsule files it is
sufficient to check that the attribute EFI_FILE_DIRECTORY is not set. We
don't have to check for these special names.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
PE section table entries' SizeOfRawData must be a multiple of
FileAlignment, and thus may be rounded up and larger than their
VirtualSize.
We should not load beyond the VirtualSize, which is "the total size of
the section when loaded into memory" -- we may clobber real data at the
target in some other section, since we load sections in reverse order
and sections are usually laid out sequentially.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
First set of u-boot-atmel fixes for 2021.04 cycle:
This small PR includes just two fixes but very important: one revert in
the clk subsystem which fixes the boot on many old boards
(sama5d2_xplained, sama5d4_xplained), which currently crash at boot; and
one small fix related to debug serial on sama7g5ek board.
Revert changes in at91 compat.c that cause u-boot to fail booting on
sama5d4_xplained and sama5d2_xplained
Log below:
<debug_uart>
No serial driver found
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Fixes: a2703ce10c ("dm: Remove uses of device_bind_offset()")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the serial tx/rx are floating, it can happen that bogus characters
are detected on the line at boot time. This leads to U-boot accidentally
thinking someone pressed a key to stop autoboot, thus stopping booting process.
This can happen if the serial cable is not connected. There are hardware
pull-ups on the board connected to serial cable VBUS.
To solve this when the cable is not plugged, enable internal pull-ups as well
for the tx/rx lines.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The Linux kernel v5.7-rc1 introduced the compatible "st,stm32mp15-hsotg".
See Linux kernel commit d49850110434 ("dt-bindings: usb: dwc2: add
support for STM32MP15 SoCs USB OTG HS and FS")
This patch updates the supported compatible in DWC2 driver,
removes the add-on done in U-Boot dtsi and keeps the compatible
defined in SOC dtsi arch/arm/dts/stm32mp151.dtsi:
usbotg_hs: usb-otg@49000000 {
compatible = "st,stm32mp15-hsotg", "snps,dwc2";
reg = <0x49000000 0x10000>;
...
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Testing with v2021.01 on MIPS Octeon has shown, that the latest patch
for the "short packet event trb handling" did introduce a bug on
platforms with virtual address != physical address. This patch fixes
this issue by using the correct address types in the compare (both
physical in this case).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Function dm_pci_map_bar() may fail and returns NULL. Check this to prevent
dereferencing a NULL pointer.
In xhci-pci this may happen when board does not enable CONFIG_PCI_PNP and
PCI_BASE_ADDRESS_0 contains unconfigured zero address.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add optional properies to disable usb2 or usb3 ports, they are used
when provided ports are not used on some special platforms.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Add support to disable specific ports, it's useful for some
scenarios:
1. usb3 PHY is shared whith PCIe or SATA, the corresponding
usb3 port can be disabled;
2. some usb2 or usb3 ports are not used on special platforms,
they should be disabled to save power.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Use the ADC channel 1 to check the hardware revision of the board and
detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use
different dtb file, so adjust fdtfile environment variable to the
detected variant.
The ADC min/max values for each variant are taken from the vendor code,
adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit
mode).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission
and Analog part of the PCIe lines.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI
panels.
This D-PHY depends on a separate analog PHY.
Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add the PHY configure op callback to the generic PHY uclass to permit
configuring the PHY.
It's useful for MIPI DSI PHYs to setup the link timings.
Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.
These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
- Enable the fastboot oem commands in stm32mp15 defconfig
- Fixes pinctrol for stmfx and stm32
- Add support of I2C6_K in stm32mp15 clock driver
- Alignment with Linux kernel device tree v5.11-rc2 for ST boards
Device tree alignment with Linux kernel v5.11-rc2
- fix DCMI DMA features on stm32mp15 family
- Add alternate pinmux for FMC EBI bus
- Harmonize EHCI/OHCI DT nodes name on stm32mp15
- update sdmmc IP version for STM32MP15
- Add LP timer irqs on stm32mp151
- Add LP timer wakeup-source on stm32mp151
- enable HASH by default on stm32mp15
- enable CRC1 by default on stm32mp15
- enable CRYP by default on stm32mp15
- set bus-type in DCMI endpoint for stm32mp157c-ev1 board
- reorder spi4 within stm32mp15-pinctrl
- add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
- fix mdma1 clients channel priority level on stm32mp151
- fix dmamux reg property on stm32mp151
- adjust USB OTG gadget fifo sizes in stm32mp151
- update stm32mp151 for remote proc synchronization support
- support child mfd cells for the stm32mp1 TAMP syscon
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The kilohertz unit abbreviation should read 'kHz'.
Note to STM32 team: modified files were generated, it may be worth
to fix STM32CubeMX tool.
Signed-off-by: Fabrice GIRARDOT <fabrice.girardot@flowbird.group>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR =
I2C6EN: I2C6 peripheral clocks enable.
This patch allows customer to use I2C6 in SPL or in U-Boot
as other I2C instance, already support in clk driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Bind only the enabled GPIO subnode, to avoid to probe the node
"gpio-controller" present in SOC dtsi (disabled by default) but
not enabled in the included pincontrol dtsi file.
For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent:
gpioj: gpio@5000b000
gpiok: gpio@5000c000
Then these GPIO are absent in output of command "dm tree" and
"gpio status -a"
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
OTYPE can be used for output or for alternate function to select
PP = push-pull or OP = open-drain mode, according reference manual
(Table 81. Port bit configuration table).
This patch removes this indication for input pins and adds it
for AF and output pins for pinmux command output.
Fixes: b305dbc08b ("pinctrl: stm32: display bias information for all pins")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
pin-controller pin's name must be equal to pin's name used in device
tree with "pins" DT property.
Issue detected on stm32mp157c-ev1 board with goodix touchscreen.
In DT, the goodix's pin is declared in DT with the node:
goodix_pins: goodix {
pins = "gpio14";
bias-pull-down;
};
Whereas in stmfx pin-controller driver, pin's name are equal to
"stmfx_gpioxx" where xx is the pin number.
This lead to not configure stmfx's pins at probe because pins is
identified by its name (see pinctrl_pin_name_to_selector() in
pinctrl-generic.c) and stmfx pin "gpio14" can't be found.
To fix this issue, come back to the original stmfx pin's name.
Revert "pinctrl: stmfx: update pin name"
This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Enable the fastboot oem command bootbus, used to configure the eMMC
boot behavior, with same format than 'mmc bootbus'
and with parameter: boot_bus_width reset_boot_bus_width boot_mode
On stm32mp1 boards the expected command is
$> fastboot oem partconf:0 0 0
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Enable the fastboot oem command partconf, used to select the correct
eMMC boot partition, with same format than 'mmc partconf'
with parameter: boot_ack boot_partition
On stm32mp1 family:
- boot_ack = 1 (Boot Acknowledge is needed by ROM code)
- boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot)
So on EV1 board the expected commands to select boot partition 1 or 2
$> fastboot oem partconf:1 1
$> fastboot oem partconf:1 2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
- Espressobin: Set default env values at runtime (Pali)
- Espressobin: Set the maximum slave SPI speed to 40MHz (Pali)
- theadorable: PCIe test code enhancement and early deemphasis
enabling (Stefan)
- pci_mvebu: Disable config access to PCI host bridge ports (Stefan)
- mv_sdhci: parse device-tree entry (Baruch)
Update gpio driver to use same logic for big-endian and little-endian
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Drop the CONFIG_VIDEO to fix the following build warning.
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
UPD include/generated/dt.h
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
UPD include/generated/timestamp_autogenerated.h
====================================================
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Update data type of '1' to '1ull' in below assignment
size = 1ull << sizebit;
to fix incorrect assignment issue.
e.g: when sizebit was 31, 0x80000000 got sign extended to
0xffffffff_80000000
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Dean Saridakis <dean.saridakis@baesystems.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the I-Cache to speed up the boot time, especailly for the NOR
boot, currently it takes about 15 seconds from power up to the U-Boot
prompt, and with the I-Cache enabled it only takes around 2.5 seconds.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LX2162A is not like LX2160A which has different PCIe controller
in rev1 and rev2 silicon. It supports only one configuration of
PCIe controller, which is same as LS2088A. So update PCIe
compatible string same as LS2088A.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL
workaround as the LS208x and also has a 64 byte TX buffer.
With the previous settings SPI-NAND reads over AHB were
corrupted.
Fixes: 91afd36f38 ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Adapted from kernel commit b0177aca7aea
From: Michael Walle <michael@walle.cc>
Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.
Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.
Fixes: 91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.
It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().
In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.
Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.
We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.
This might leave a hole if there is no ethernet1 alias. This is
intended.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
## Executing script at 80000000
load - load binary file from a filesystemUsage:
load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
- Load binary file filename from partition part on device
type interface instance dev to address addr in memory.
bytes gives the size to load in bytes.
If bytes is 0 or omitted, the file is read until the end.
pos gives the file byte position to start reading from.
If pos is 0 or omitted, the file is read from the start.
...
Bad Linux ARM64 Image magic!
SCRIPT FAILED: continuing...
Signed-off-by: Biwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.
Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.
Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.
Circumvent that by not disabling the write protection in the first
place.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.
Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.
For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/
Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Call mmc_of_parse() so that generic DT properties like 'non-removable'
are taken into account.
This fixes boot on Clearfog with eMMC on SOM that requires the
non-removable property.
Reported-by: Thorsten Spille <thorsten_spille@netcor.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
While the SPI controller speed is defined by DTS, the maximum
slave speed (connected devices) is limited by the pre-defined
configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz
This patch increases this maximum SPI slave device speed to 40MHz
Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59516
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Testing has shown, that the quality of the PCIe signals and also the
stability of correct link establishment on the 2 PCIe ports is better,
when the deemphasis bit is set in the PCIe config register.
This needs to be done very early, even before the SERDES setup code is
run. This way, the first link will already be established with this
setup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the board specific "pcie" U-Boot command to not only
check for PCIe device existance but also for the correct link speed
and width that has been established. This cmd can be used by U-Boot
scripts for automated testing, if the PCIe setup is correct. Meaning,
that all PCIe devices are correctly detected and the link speed and
width is corrent.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the PCI config routines in the Armada XP / 38x driver
to not allow access to the PCIe root ports.
While updating the Armada XP based theadorable to the latest mainline
and testing it with the DM PCI driver I noticed, that the PCI root
bridge was being configured incorrectly. Resulting in the PCIe Intel
WiFi was not working correctly in Linux. With this patch applied, all
PCIe devices work without any issues in Linux again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
On Espressobin board are MAC addresses stored in U-Boot env area. Therefore
they are not present in default_environment[] array constructed at compile
time.
This change puts permanent MAC addresses into default_environment[] array
at board runtime. Espressobin board has enabled DEFAULT_ENV_IS_RW option
and therefore can modify this array.
This change ensure that 'env default -a' does not delete permanent MAC
addresses from Espressobin env storage area.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
On Espressobin board value for $fdtfile cannot be determined at compile
time and is calculated at board runtime code. This change uses a new option
DEFAULT_ENV_IS_RW to allow modifying default_environment[] array at runtime
and set into it correct value.
This change also ensure that 'env default -a' set correct value to $fdtfile.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
This change allows board code to modify default_environment[] array when
compile option DEFAULT_ENV_IS_RW is specified in board config file.
Some board default variables depend on runtime configuration which is not
known at compile time. Therefore allow to set default_environment[] array
as non-const and allow board code to modify it when it is needed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also
known as the RZ/G2H.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi. It shares much of the same design as
the RZ/G2M and RZ/G2N dev kits.
Signed-off-by: Adam Ford <aford173@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also
known as the RZ/G2N.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi. It shares much of the same design as
the RZ/G2M dev kit.
Signed-off-by: Adam Ford <aford173@gmail.com>
The versaclock doesn't have a driver yet, but there are a bunch
of device tree updates for the Beacon RZ/G2 boards that won't
compile without these. A driver is coming, so sync the bindings
for now
Signed-off-by: Adam Ford <aford173@gmail.com>
In case MMC has MBR system and fastboot writes GPT,
MMC is still recognized as MBR.
Invoke part_init() to purge cached data and update
information about partition table type.
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Add command oem bootbus which executes the command
``mmc bootbus <id> <arg>`` on the current fastboot mmc device
(<i> = CONFIG_FASTBOOT_FLASH_MMC_DEV) to set the eMMC boot
configuration on first update, with
<arg> = boot_bus_width reset_boot_bus_width boot_mode
$> fastboot oem bootbus:<boot_bus_width> <reset_boot_bus_width> <boot_mode>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add fastboot command oem partconf which executes the command
``mmc partconf <id> <arg> 0`` on the current <id> mmc device
to configure the eMMC boot partition with
<arg>: boot_ack boot_partition, so the command is:
$> fastboot oem partconf:<boot_ack> <boot_partition>
The partition_access argument is forced to 0 (userdata)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[lukma - Kconfig adjustments after merging this patch]
Update the code and the configs for eMMC boot and userdata
partitions acces
- FASTBOOT_MMC_BOOT_SUPPORT: boot partition 1 and 2 (erase/write)
- FASTBOOT_MMC_BOOT1_NAME: boot partition 1, default name="mmc0boot0"
- FASTBOOT_MMC_BOOT2_NAME: boot partition 2, default name="mmc0boot1"
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Split userdata and boot partition support for eMMC update
and correct the description (update is supported).
The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT
allows to activate support of userdata partition update,
based on target name=CONFIG_FASTBOOT_MMC_USER_NAME
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
It is possible to implement fastboot_set_reboot_flag in a generic way
if BCB commands are turned on for a target. Using
bcb_set_reboot_reason allows to do this by simply passing string with
correct reboot reason that should be handled during next boot process.
If BCB are turned off, then bcb_set_reboot_reason would simply return
error, so it won't introduce any new behaviour for such targets.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
This reverts commit 0ebf9842e5.
Current generic implementation of fastboot_set_reboot_flag is somewhat
messy and requires some additional configuration option to be enabled
besides CMD_BCB, so it reverts that implementtion in order to bring a
new cleaner one.
Next commit introduces new generic implementation of
fastboot_set_reboot_flag.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
- introduces some standard sysinfo options as a source, e.g. to read
strapping pins to determine the board revision
- allows the U-Boot version number to be included
- allows the version number to be provided programmatically, e.g. to
support the build system adding information after U-Boot is built
While static configuration is useful it cannot cover every case. Sometimes
board revisions are encoded in resistor straps and must be read at
runtime.
The easiest way to provide this information is via sysinfo, since the
board can then provide a driver to read whatever is needed.
Add some standard sysinfo options for this, and use them to obtain the
required information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These ops are missing at present which is not permitted. Add an empty
operation struct.
Note: If the uclass requires operations then the drivers should provide
them. Otherwise, checking for missing operations must be done in every
uclass operation, so it adds to code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the struct is not available unless SYSINFO is enabled. This is
annoying since code it is not possible to use compile-time checks like
CONFIG_IS_ENABLED(SYSINFO) with this header.
Fix it by moving the #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the version string is obtained from PLAIN_VERSION. Some boards
may want to configure this using the device tree, since the build system
can more easily insert things there after U-Boot itself is built. Add this
option to the code.
Also in some cases the version needs to be generated programmatically,
such as when it is stored elsewhere in the ROM and must be read first.
To handle this, keep a pointer around so that it can be updated later.
This works by storing the last string in the context, since it is easier
than passing out a little-used extra parameter.
Provide a function to update the version string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new member to the context struct which tracks the end of the string
table. This allows us to avoid recalculating this at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We can store this in the context and avoid passing it to each function.
This makes it easier to follow and will also allow keeping track of the
end of the string table (in future patches).
Add an 'eos' field to the context and create a function to set it up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we pass the ofnode to each function. We also pass the 'eos'
pointer for adding new strings. We don't track the current end of the
string table, so have smbios_string_table_len() to find that.
The code can be made more efficient if it keeps information in a
context struct. This also makes it easier to add more features.
As a first step, switch the ofnode parameter to be a context pointer.
Update smbios_add_prop() at the same time to avoid changing the same
lines of code in consecutive patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We may as well include the U-Boot release information in the type-0 table
since it is designed for that purpose.
U-Boot uses release versions based on the year and month. The year cannot
fit in a byte, so drop the century.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present a few of the structs use u8 instead of char. This is a string,
so char is better. Update them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This type is not used outside the smbios.c file so there is no need for it
to be in the header file. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For SMBIOS we want to store the numeric version numbers in the tables. It
does not make sense to parse the strings. Instead, add new #defines with
the version and patchlevel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There are quite a few available version options in U-Boot. Add a list of
the available Makefile variables and #defines, along with examples.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Sync DTS from Linux kernel for all K3 platforms
- Add MMC higher speed nodes for AM65x, J721e, J7200
- Convert Nokia RX-51 to use CONFIG_DM_MMC
- Minor fixes for LEGO MINDSTORMS
Pull request for UEFI sub-system for efi-2021-04-rc2
Bug fixes:
* do not allow creating of files with filenames on FAT file system
* install UEFI System Partition GUID on ESP handle
* in dtbdump.efi test tool use GUID to find ESP handle
Documentation:
* man-page for load command
* describe end of life of plat_auto
If the exception cannot be raised, the command returns.
Currently the return values are not all the same.
Remove the sub-chapter 'Return value'
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The Load File2 protocol exposes a device path with a VenMedia() node. Hence
our implementation of the device path to text protocol should support this
node.
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If dtbdump.efi is loaded from memory when calling LoadImage the loaded
image protocol will not indicate the partition from where it was loaded.
In this case use the EFI system partition for the 'load' and 'save'
commands.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On the handle for the UEFI System Partition we must install the System
Partition GUID (with a NULL interface).
Let the efidebug command display the GUID.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In the implementation of the EFI_DT_FIXUP_PROTOCOL:
* Only check the buffer size when EFI_DT_APPLY_FIXUPS is set.
* In this case the field totalsize of the device-tree may not exceed the
buffer size.
* Install device-tree only if EFI_DT_INSTALL_TABLE is set.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sync all J7200 related v5.11-rc6 Linux kernel dts into U-Boot.
MCU R5F nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid regressions, r5f nodes are kept intact.
These will be added in kernel in future.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot.
HBMC nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid any regressions, hbmc nodes are kept
intact. These will be added in kernel in future.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add configs for voltage switching and UHS modes for the SD card
and HS200 for the eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
There's an issue with the base board in which the power cycle
circuit takes way longer to power down than expected by mmc core.
code. This prevents the card from enumerating in UHS modes.
Disable UHS modes for this board until a new board revision fixes
the issue.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add the appropriate itapdly and clkbuf-sel values required for
some lower speed modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add configs to support UHS modes for the SD card and HS200 for the eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add configs to support UHS modes for the SD card and HS200 for the eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add support for UHS modes by adding the regulators to power cycle
and voltage switch the card. Also add pinmuxes required for each
node
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add support for regulators to power cycle and switch IO voltage to the
SD card. This enables support for UHS modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Because of fundamental interface issues in am65x pg1, only the
initial sdhci1 node at 25 MHz was added in the u-boot.dtsi
from which both the base-board.dts and r5-base-board.dts
inherit the node. Move the node out to k3-am65-main.dtsi
where it belongs and add the board specific properties
in base-board.dts and r5-base-board.dts
This ensures dts compatibility with the kernel dts in the
base-board.dts and enables the SD card interface at 50 MHz
and High Speed mode
While we are here, also fix the main_mmc0_pins_default
property to be included and inherit from the base-board.dts
instead of the u-boot.dtsi
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Use the generic sdhci_set_control_reg() instead of duplicating
in platform driver.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.
To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.
Use the sdhci writeb callback to implement this condition.
[1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With the new SW tuning App note[1], a custom tuning algorithm is
required for eMMC HS200, HS400 and SD card UHS modes. The algorithm
involves running through the 32 possible input tap delay values and
sending the appropriate tuning command (CMD19/21) for each of them
to get a fail or pass result for each of the values. Typically, the
range will have a small contiguous failing window. Considering the
tuning range as a circular buffer, the algorithm then sets a final
tuned value directly opposite to the failing window.
[1] https://www.ti.com/lit/pdf/spract9
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add support for writing new clock buffer select property for both
the am654x and j721e 4 bit IPs
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
DLL need only be enabled for speed modes and clock frequencies at or
above 50 MHz. For speed modes that don't enable the DLL, we need to
configure a static input delay value. This involves reading an optional
itap-del-sel-* value from the device tree and configuring it for the
appropriate speed mode.
Therefore, move all dll configurations to their own functions and gate it
with 50 MHz speed and a minimum mode. If both these conditions are not
satisfied then configure delay chain modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add Support for AM65x PG2.0. Use the SoC bus framework to fixup
the platform data and do DLL calibration if the revision is 1.0
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB
flag to indicate the same.
Also move the write of trm_icp and driver strength to the set_clock()
function to match the kernel configuration flow.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
There are some speed modes that work without switching the dll on.
Unconditionally switch off the DLL before setting clock frequency to
support this case. The software will automatically enable DLL for speed
modes that require it. This also means the dll_on priv data member is no
longer required.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With commit 38d6b7ebda ("spl: Drop bd_info in the data section") you
need to enable this option to boot from mmc.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The K3 R5F remoteproc driver in U-Boot was upstreamed prior to the
equivalent remoteproc driver in the Linux kernel. Some of the DT
properties used in U-Boot got upstreamed using different names
in Linux kernel.
The modified property names include the R5F cluster mode configuration
property "lockstep-mode"; and three different individual R5F core config
properties - "atcm-enable", "btcm-enable" and "loczrama". The property
names were updated as follows:
lockstep-mode => ti,cluster-mode
atcm-enable => ti,atcm-enable
btcm-enable => ti,btcm-enable
loczrama => ti,loczrama
Update the K3 R5F remoteproc driver, the corresponding binding, and
all the existing usage in AM65x, J721E and J7200 dts files all at
once to use the new properties and to not break any bisectability.
Signed-off-by: Suman Anna <s-anna@ti.com>
AM65x SoC has two USB subsystems and their corresponding device tree nodes
have the same name but different path. While allocating sequence numbers
for these device tree nodes using alias, phandles can be used to
distinguish them.
Enable config for phandle check while getting sequence number to
distinguish the USB device tree nodes.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This disables booting to non-Linux OSes.
This board is uncomfortably close to its 256K size limit, so every
few KB saved helps.
Signed-off-by: David Lechner <david@lechnology.com>
This disables the CONFIG_NET setting for LEGO MINDSTORMS EV3. This board
does not have any built-in networking, so it does not make sense to
enable this feature.
This also fixes the warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: David Lechner <david@lechnology.com>
This drops assigning bi_arch_number on LEGO MINDSTORMS EV3. This board
never had its own unique number and since we are using device tree,
we no longer need to pass an arch number to Linux.
Signed-off-by: David Lechner <david@lechnology.com>
This sets the serial# environmet variable instead of using ATAGs on
LEGO MINDSTORMS EV3.
Also fix some nomenclature while we are touching this code (Bluetooth
address is not the same as MAC address, EEPROM version is not the same
as board version).
Signed-off-by: David Lechner <david@lechnology.com>
Move twl4030_power_mmc_init() from board_mmc_power_init() to misc_init_r()
and disable CONFIG_SYS_MALLOC_F. Otherwise U-Boot cannot initialize MMC.
Also disable CONFIG_CMD_SLEEP CONFIG_DM_DEVICE_REMOVE CONFIG_MMC_VERBOSE to
free some space.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add "zboot" command to the list of supported boot in the
label_boot function.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add component tags in the summary]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Replace all the macro ifdef by IS_ENABLED.
All of these configs are set in the defconfig files and not in the
include board headers files.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: keep the preprocessor case unchanged]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Unfortunately the multi-core boot for QEMU x86 has been broken since
commit 77a5e2d3bc ("x86: mp_init: Set up the CPU numbers at the start").
In order to support QEMU x86 multi-core boot, the /cpus node must be
bound before any actual fix up in qemu_cpu_fixup(). This adds the
uclass_get() call to ensure this, just like what was done before.
Fixes: 77a5e2d3bc ("x86: mp_init: Set up the CPU numbers at the start")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The FAT32 File System Specification [1] requires leading and trailing
spaces as well as trailing periods of long names to be ignored.
[1]
Microsoft Extensible Firmware Initiative
FAT32 File System Specification
Version 1.03, December 6, 2000
Microsoft Corporation
https://www.win.tue.nl/~aeb/linux/fs/fat/fatgen103.pdf
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
sandbox_scmi_devices_ctx() may return NULL. We should not dereference this
value in sandbox_scmi_devices_remove().
The problem was indicated by 'gcc-11 -fanalyzer'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
gcc -fanalyzer needs the information that a function does not return to
provide accurate information.
os_abort() does not return. Mark it accordingly.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are some calls to bdinfo_print_num_l() with parameters that
could be a 64-bit value on a 32-bit system. Change those calls to
use bdinfo_print_num_ll() instead.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we have bdinfo_print_num() to print unsigned long numbers.
We also have print_phys_addr() which accept numbers that might be
64-bit on a 32-bit platform.
Rename these 2 functions to be clearer:
bdinfo_print_num() => bdinfo_print_num_l()
print_phys_addr() => bdinfo_print_num_ll()
While we are here, make bdinfo_print_num_ll() public so that it can
be used outside cmd/bdinfo.c in the future.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
phys_addr_t and phys_size_t are currently defined as `unsigned long`,
but RV32 supports 34-bit physical address, hence both phys_addr_t and
phys_size_t should be defined to 64-bit using `unsigned long long`.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
At present prior_stage_fdt_address is declared as phys_addr_t. On
a 32-bit platform where phys_addr_t can be 64-bit, assigning its
value to gd->fdt_blob which is a pointer, can cause warnings.
Cast it to uintptr_t before the assignment.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
priv->iobase was declared as phys_addr_t which is now a 64-bit
address. In a 32-bit build, this causes the following warning
seen when building ftmac100.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast priv->iobase with uintptr_t.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
addr was delcared as fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building ax25-ae350.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast addr with uintptr_t.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
dev_read_addr() returns fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building serial_sifive.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast the return value with uintptr_t.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
It's possible to have ram_top above 4 GiB in a 32-bit system, hence
we need to declare ram_top as `phys_addr_t`.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The min() macro used in dram_init_banksize() requires two elements
to compare have the same type. Let's explicitly cast gd->ram_top.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
When testing QEMU RISC-V 'virt' machine with a 2 GiB memory
configuration, it was discovered gd->ram_top is assigned to
value zero in setup_dest_addr().
While gd->ram_top should not be declared as type `unsigned long`,
which will be updated in a future patch, the current logic in
board_get_usable_ram_top() can be updated to cover both 64-bit
and 32-bit RISC-V.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Make mention of this feature in the core documentation so people can
discover it without looking at a header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add another flag to the DM core which could be assigned to drivers and
which makes those drivers call their remove callbacks last, just before
booting OS and after all the other drivers finished with their remove
callbacks. This is necessary for things like clock drivers, where the
other drivers might depend on the clock driver in their remove callbacks.
Prime example is the mmc subsystem, which can reconfigure a card from HS
mode to slower modes in the remove callback and for that it needs to
reconfigure the controller clock.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if device_remove() decides that the device should not actually
be removed, it still calls the uclass pre_remove() method and powers the
device down.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the uclass pre-remove method is called before the children are
removed. But the children may refused to be removed, in whch case the
uclass is in a tricky situation. At present we handle this by calling
the uclass' post_probe() method. But it seems better to avoid doing
anything with the uclass in this case.
Switch the ordering so that we make sure the children can be removed
before advising the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
This flag has the word 'REMOVE' in it which means it conflicts with
the DM_REMOVE flags. Rename it to DM_FLAG_LEAVE_PD_ON which seems to
indicate its purpose well enough.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has no useful meaning in U-Boot and will never be returned. We want
to reserve this flag for internal driver model use.
Drop the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has no useful meaning in U-Boot. Use -ENOMEM since that appears to
be what has gone wrong in this case. We want to reserve this flag for
internal driver model use.
Signed-off-by: Simon Glass <sjg@chromium.org>
Directories or files called '.' or '..' cannot be created or written to
in any directory. Move the test to normalize_longname() to check this
early.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This patch involves no functional change. It is just about code
readability.
Both in file_fat_write_at() and fat_mkdir() the incoming file or directory
path are split into two parts: the parent directory and the base name.
In file_fat_write_at() the value of the variable basename is assigned to
the filename parameter and afterwards the variable filename is used instead
of basename. It is more readable to use the variable basename and leave
filename unchanged.
In fat_mkdir() the base name variable is called directory. This is
confusing. Call it basename like in file_fat_write_at(). This allows to
rename parameter new_directory to directory in the implementation of
fat_mkdir() to match the function declaration.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move this out of the common header and include it only where needed. In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly. Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit dd5c954e91 ("travis/gitlab/azure: Use -W to avoid warnings check")
added -W to avoid warnings check, but it mistakenly dropped -E for
the world build script in the azure pipelines.
This caused builds on the azure pipelines fail to report warnings. Let's
add it back.
Fixes: dd5c954e91 ("travis/gitlab/azure: Use -W to avoid warnings check")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The implementation of pytest_runtest_protocol() must call
pytest_runtest_logstart() and pytest_runtest_logfinish(). This appears to
be necessary even in pytest 5.2.1 judging by the default version of
pytest_runtest_protocol(), but evidently some form of code reorganization
in pytest only made this have a practical effect in the newer version. I'd
previously been under the impression that 100% of the required work of
pytest_runtest_protocol() was handled by the fact it called
runtestprotocol() as its implementation. However, it appears that custom
implementations do need to do a little more than this.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Config allows to disable printing contents of fitImage to optimize boottime.
Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The load command should not silently return to the console prompt if an
invalid block device is specified and no file is loaded.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
No version information is used in armv8/fwcall.c therefore do not include
version.h header file. This change prevents recompiling fwcall.o when
SOURCE_DATE_EPOCH changes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fix CMD_ACPI dependency in Kconfig
- Correct overflow in __udelay() in TSC timer driver
- Add a devicetree node for eMMC for Coral
- Minor improvements on image loading
- Reduce size of Samus image
With the recent addition of ACPI generation, the image size has got beyond
its current limit.
Samus does not actually use this, nor x86 emulation for PCI ROMs, so
disable both features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enhance the debugging to show the next stage being booted as well as a
dump of the start of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This should be done even if not using TPL, since BSS may be in use or
boards that only use SPL. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present if the command line is very long it is truncated by the
printf() statement, which works within a limited buffer. Use puts()
instead. Also show better debugging with the command-line setup
fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present it is possible to dump an image within the zimage command, but
it is also useful to be able to dump it from elsewhere, for example in a
loader that has special handling for the different zimage stages.
Export this feature as a new function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Global Non-Volatile Storage struct has some fields with particular
meanings. Rename these to make things easier to follow. Also add a few
more boot flags.
GNVS should not be confused with GNVQ (Going Nowhere Very Quickly).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present BSS is always placed in SDRAM. If a separate BSS is not in use
this means that BSS doesn't work as expected. Make the setting conditional
on the SEPARATE_BSS option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The part of U-Boot that actually ends up in u-boot-nodtb.bin is not built
with any particular alignment. It ends at the start of the BSS section.
The BSS section selects its own alignment, which may larger.
This means that there can be a gap of a few bytes between the image
ending and BSS starting.
Since u-boot.bin is build by joining u-boot-nodtb.bin and u-boot.dtb (with
perhaps some padding for BSS), the expected result is not obtained. U-Boot
uses the end of BSS to find the devicetree, so this means that it cannot
be found.
Add 32-byte alignment of BSS so that the image size is correct and
appending the devicetree will place it at the end of BSS.
Example SPL output without this patch:
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000142a1 fef40000 fef40000 00001000 2**4
CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
1 .u_boot_list 000014a4 fef542a8 fef542a8 000152a8 2**3
CONTENTS, ALLOC, LOAD, RELOC, DATA
2 .rodata 0000599c fef55760 fef55760 00016760 2**5
CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
3 .data 00000970 fef5b100 fef5b100 0001c100 2**5
CONTENTS, ALLOC, LOAD, RELOC, DATA
4 .binman_sym_table 00000020 fef5ba70 fef5ba70 0001ca70 2**2
CONTENTS, ALLOC, LOAD, DATA
5 .bss 00000060 fef5baa0 fef5baa0 00000000 2**5
ALLOC
You can see that .bss is aligned to 2**5 (32 bytes). This is because of
the mallinfo struct in dlmalloc.c:
17 .bss.current_mallinfo 00000028 00000000 00000000 000004c0 2**5
ALLOC
In this case the size of u-boot-spl-nodtb.bin is 0x1ba90. This matches up
with the _image_binary_end symbol:
fef5ba90 g .binman_sym_table 00000000 _image_binary_end
But BSS starts 16 bytes later, at 0xfef5baa0, due to the 32-byte
alignment. So we must align _image_binary_end to a 32-byte boundary. This
forces the binary size to be 0x1baa0, i.e. ending at the start of bss, as
expected.
Note that gcc reports __BIGGEST_ALIGNMENT__ of 16 on this build, even
though it generates an object file with a member that requests 32-byte
alignment.
The current_mallinfo struct is 40 bytes in size. Increasing the struct to
68 bytes (i.e. just above a 64-byte boundary) does not cause the alignment
to go above 32 bytes. So it seems that 32 bytes is the maximum alignment
at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add more details in the commit message to help people understand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Move to log_debug() and make use of the new SPL function to find the
text base.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful to know the TEXT_BASE value for the image being loaded in
TPL/SPL. Add a new spl_get_image_text_base() function to handle this.
Make use of this in the x86 SPL handler, instead of having the logic
there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use a driver name in line with the compatible string so that of-platdata
can use this driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some comments were provided after this patch was applied. Address them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present long delays such as msleep(2000) can cause an overflow in this
function. There is no need for this, since it already uses a 64-bit int.
Add a cast to correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Trying to compile qemu-x86_64_defconfig with CONFIG_CMD_ACPI=y and
CONFIG_ACPIGEN=n fails with
ld.bfd: cmd/built-in.o: in function `do_acpi_items':
cmd/acpi.c:162: undefined reference to `acpi_dump_items'
Add the missing configuration dependency.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useless and misleading to print the ret variable that is not set
by the dev_read_addr routine. Also, move the '\n' character after the
round bracket that contains the error code.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pinmux choice for the RMII/RGMII pins the EMAC is connected to is
not dependent on the EMAC IP, but on the SoC it is integrated in.
Deriving the pinmux from the DT compatible string (as we do at the
moment) will thus cause problems with certain EMAC IP / SoC combinations.
To avoid this exact issue with the H616, let's use our Kconfig MACH
symbols to choose the correct pinmux setup.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect the EPHY select bit to be cleared for
proper operation with an external PHY.
Rework sun8i_emac_set_syscon_ephy() to be called regardless of the EMAC
model, and clear the H3_EPHY_SELECT bit if no internal PHY is used.
We get away without it so far because SoCs like the A64 clear this bit
on reset, but we need to explicitly clear it on the H616, for instance.
The Linux driver does so as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Change to use wMaxPacketSize of current speed EP desc for request
length wrap up.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If one of functions is not super speed capable, we need force the udc
to be high speed, this is an equivalent implementation of
usb_gadget_udc_set_speed() in kernel but simple, which set the gadget
max_speed to be high speed, so afterwards when start gadget duc can
set the HW to be USB 2.0 mode.
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This patch is to add usb gadget super speed support in common
driver, including BOS descriptor and select the super speed
descriptor from function driver.
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Always use the new added config for os_desc_config to fix cdev->
os_desc_config may miss set in case we restart usb gadget driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The current way to set cdev->os_desc_config is wrong if user restart
fastboot, as the old config is not used anymore and new allocated
usb_configuration will be used, so set the os_desc_config while
usb_add_config.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add device interface GUID for Microsoft Extended Properties Feature
Descriptor.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is a proting patch from linux kernel: 37a3a533429e
("usb: gadget: OS Feature Descriptors support"), the original commit
log see below:
There is a custom (non-USB IF) extension to the USB standard:
http://msdn.microsoft.com/library/windows/hardware/gg463182
They grant permission to use the specification - there is
"Microsoft OS Descriptor Specification License Agreement"
under the link mentioned above, and its Section 2 "Grant
of License", letter (b) reads:
"Patent license. Microsoft hereby grants to You a nonexclusive,
royalty-free, nontransferable, worldwide license under Microsoft鈥檚
patents embodied solely within the Specification and that are owned
or licensable by Microsoft to make, use, import, offer to sell,
sell and distribute directly or indirectly to Your Licensees Your
Implementation. You may sublicense this patent license to Your
Licensees under the same terms and conditions."
The said extension is maintained by Microsoft for Microsoft.
Yet it is fairly common for various devices to use it, and a
popular proprietary operating system expects devices to provide
"OS descriptors", so Linux-based USB gadgets whishing to be able
to talk to a variety of operating systems should be able to provide
the "OS descriptors".
This patch adds optional support for gadgets whishing to expose
the so called "OS Feature Descriptors", that is "Extended Compatibility ID"
and "Extended Properties".
Hosts which do request "OS descriptors" from gadgets do so during
the enumeration phase and before the configuration is set with
SET_CONFIGURATION. What is more, those hosts never ask for configurations
at indices other than 0. Therefore, gadgets whishing to provide
"OS descriptors" must designate one configuration to be used with
this kind of hosts - this is what os_desc_config is added for in
struct usb_composite_dev. There is an additional advantage to it:
if a gadget provides "OS descriptors" and designates one configuration
to be used with such non-USB-compliant hosts it can invoke
"usb_add_config" in any order because the designated configuration
will be reported to be at index 0 anyway.
This patch also adds handling vendor-specific requests addressed
at device or interface and related to handling "OS descriptors"."
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As other users may use utf8_to_utf16le() to convert the utf8
to utf16 for usb, so move it to head file.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is a porting patch from linux kernel: 19824d5eeece
("usb: gadget: OS String support"), original commit log
see below:
"There is a custom (non-USB IF) extension to the USB standard:
http://msdn.microsoft.com/library/windows/hardware/gg463182
They grant permission to use the specification - there is
"Microsoft OS Descriptor Specification License Agreement"
under the link mentioned above, and its Section 2 "Grant
of License", letter (b) reads:
"Patent license. Microsoft hereby grants to You a nonexclusive,
royalty-free, nontransferable, worldwide license under Microsoft鈥檚
patents embodied solely within the Specification and that are owned
or licensable by Microsoft to make, use, import, offer to sell,
sell and distribute directly or indirectly to Your Licensees Your
Implementation. You may sublicense this patent license to Your
Licensees under the same terms and conditions."
The said extension is maintained by Microsoft for Microsoft.
Yet it is fairly common for various devices to use it, and a
popular proprietary operating system expects devices to provide
"OS descriptors", so Linux-based USB gadgets whishing to be able
to talk to a variety of operating systems should be able to provide
the "OS descriptors".
This patch adds optional support for gadgets whishing to expose
the so called "OS String" under index 0xEE of language 0.
The contents of the string is generated based on the qw_sign
array and b_vendor_code.
Interested gadgets need to set the cdev->use_os_string flag,
fill cdev->qw_sign with appropriate values and fill cdev->b_vendor_code
with a value of their choice.
This patch does not however implement responding to any vendor-specific
USB requests."
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As the SDP protocol use the predefined ep num for communication, we can't
change its name hence reset its ep num while do ep autoconfig, this is
only apply for SPL.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since some new fields in usb_ep structure been moved to usb_ss_ep.
The CDNS3 gadget driver should replies on this operation to bind the
usb_ss_ep with the endpoint descriptor when function layer uses
usb_ep_autoconfig to add endpoint descriptors to gadget. So that
CDNS3 driver can know the EP information and configure the EP once
the set configuration request is received.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Each array is used only in one file (core.c or ep0.c). Move their content
to correct file, mark them as static and do not export out of current file.
This change allows to decrease size of u-boot.bin as more of those strings
are not used.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reinitialize dfu_env_entities after flashing the 'SCRIPT' entity to
ensure that the potential changes to the 'dfu_alt_info' environment
variable are applied.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reinitialize DFU USB gadget after flashing the 'SCRIPT' entity to ensure
that the potential changes to the 'dfu_alt_info' environment variable are
applied.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[lukma - I've moved the bool retry to avoid build (CI) errors]
Define a new 'SCRIPT' type for DFU entities. The downloaded data are
treated as simple u-boot's scripts and executed with run_command_list()
function.
Flashing the 'SCRIPT' entity might result in changing the 'dfu_alt_info'
environment variable from the flashed script, so add a global variable
for tracking the potential need to reinitialize the dfu_alt_info related
structures.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Define a new 'SKIP' type for the DFU entities. The flashed data for that
entity is simply ignored without returning any error values.
This allows to have one flashing procedure and images for the different
board types or variants, where each board uses only the images relevant
to it and skips the rest. This is especially usefull for the THOR
protocol, which usually transfers more than one file in a single session.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
[mszyprow: rephrased commit message and docs for easier reading, changed
subject to "dfu: add 'SKIP' entity"]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Use the default MMC device set in the command line if entity specifies it
as -1. This allows to use the same dfu_alt_info string for different MMC
devices (like embedded eMMC and external SD card if data layout is the
same on both devices).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Show the interface name (i.e. 'mmc') in the information string to ease
user checking which device is exported via USB Mass Storage protocol.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
In case of usb_add_function() failure the error path has an issue,
i.e the global pointer variable is assigned to garbage
Fix the above mentioned issue by assigning pointer to NULL.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
In case of usb_add_function() failure the error path has two issues:
- the potentially allocated structure isn't getting freed
- the global pointer variable is assigned to garbage
Fix the above mentioned issues by freeing memory and assigning NULL.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
On request/suggestion from Simon Glass back in May 22 2019 [1], the
'strsep' mechanism implemented in bcb_set() was set to work directly
with user-provided argv strings, to avoid duplicating memory and for
the sake of simpler implementation.
However, since we recently exposed bcb_write_reboot_reason() API to be
called by U-Boot fastboot, the idea is to be able to pass const string
literals to this new BCB API, carrying the reboot reason.
Since 'strsep' (just like its older/superseded sibling 'strtok')
modifies the input string passed as parameter, BCB command in its
current state would attempt to perform in-place modifications in a
readonly string, which might lead to unexpected results.
Fix the above with the cost of one dynamic memory allocation ('strdup').
This will also ensure no compiler warnings when passing string literals
to bcb_write_reboot_reason().
[1] http://u-boot.10912.n7.nabble.com/PATCH-v2-0-2-Add-bcb-command-to-read-modify-write-Android-BCB-td369934i20.html#a370456
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.
A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).
This third patch makes '__bcb_store' available for internal needs.
No functional change intended.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.
A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).
This second patch makes '__bcb_set' available for internal needs.
No functional change intended.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.
A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).
This first patch makes '__bcb_load' available for internal needs.
No functional change, except for a tiny update in error handling.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Casting 32bit int value directly into 64bit unsigned type causes
wrong value for file size equal or larger than 2GB. Fix the wrong
file size by casting uint32_t first.
Fixes: commit 1fe9ae76b1 ("gadget: f_thor: update to support more than 4GB file as thor 5.0")
Reported-by: Junghoon Kim <jhoon20.kim@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
For UBI partitions ("partubi" in dfu_alt_info), dfu_fill_entity_mtd sets
the mtd.ubi flag; however other functions incorrectly check for nand.ubi
instead. Fix this by checking for the correct flag.
Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
The R-Car3 SDHI should set these two bits in DMA_MODE register according
to the specification, to indicate 64bit bus width. No other bus width
options are permitted and the default value is 0, which is incorrect.
Set the bits accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and
r8a774a1-u-boot.dtsi have been imported from linux 5.10
commit 2c85ebc57b3e1817 ("Linux 5.10").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Commands like 'fatinfo' call dev_print() to print device information. If
the block device is created via 'host bind', we should print accurate
information.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide information about host backed block device.
Mark the device created by 'host bind' as removable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The auto_alloc_size members of struct driver has been renamed auto.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Re-send because of line-wraps.
Without this patch, u-boot just hangs if the fdt pointer is
not initialized. The diagnostic subsystems are not yet initialized,
so all you get is a blind hang.
Signed-off-by: Stanislav.Pinchuk@kaspersky.com
The UEFI Self Certification Test (SCT) checks the SetTime() service with
the following steps:
* set date
* reset
* check date matches
To be compliant the sandbox should keep the offset to the host RTC during
resets. The implementation uses the environment variable
UBOOT_SB_TIME_OFFSET to persist the offset.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Libraries that link with U-Boot typically may expect to be able to include
ctype.h but this file is in a different place in U-Boot. Add a symlink to
make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function uses the old format for reading hashes. Add
support for the current format.
Add a test while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The use of pinctrl in the core of driver model is useful but can provoke
some strange behaviour. Add a comment to aid debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current driver name does not match its compatible string, so
of-platdata does not work correctly. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if these calls are used with of-platdata, a confusing error is
produced, referring to a function not actually called by the code causing
the problem.
Fix this by not inlining, so that the error mentions the dev_read_...()
function and it is more obvious what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
These cannot work with of-platdata since they currently need the
devicetree at runtime. Disable the emulators and the sandbox I2C driver
that needs them. We can enable these later, if needed for testing.
Switch the of_plat_parent test over to use a simple bus instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Update the devicetree so that the TPM and RTC can be used in SPL. Also
enable the pins used for getting the memory configuration settings while
we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current help talks about relocation which doesn't apply to SPL and
TPL. Update it to avoid confusion.
Also make the TPL size default to the same as the SPL size, since this is
more likely to be a useful value than the one used by U-Boot proper, which
may be quite a bit larger.
Signed-off-by: Simon Glass <sjg@chromium.org>
The EC can store small amounts of data for the benefit of the
verified boot process. Since the EC is seldom reset, this can allow the
AP to store data that survives a reboot or a suspend/resume cycle.
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
On x86 platforms the EC provides a way to read 'switches', which are
on/off values determined by the EC.
Add a new driver method for this and implement it for LPC.
Signed-off-by: Simon Glass <sjg@chromium.org>
This should not happen in normal operation, but the EC might have a bug,
so add a run-time check just in case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow a longer time for the EC to reboot. Also use a constant for the
hash delay time, so it is clear what it is for.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is used several times in this file. Put it in a function to avoid
code duplication.
Also add a test for this function. There are no cros_ec tests at present,
so it is time to update the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
The offset of an entry needs to be adjusted by its skip-at-start value.
This is currently missing when reading entry data. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When packing files it is sometimes useful to align the start of each file,
e.g. if the flash driver can only access 32-bit-aligned data. Provides a
new property to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if a devicetree blob is included in a vblock it does not deal
with updates. This is because the vblock is created once at the start and
does not have a method to update itself later, after all the entry
contents are finalised.
Fix this by adjusting how the vblock is created.
Also simplify Image.ProcessEntryContents() since it effectively duplicates
the code in Section.ProcessContents().
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally when an entry is created, any entry arguments it has are required
to be provided, so it can actually generate its contents correctly.
However when an existing image is read, Entry objects are created for each
of the entries in the image. This happens as part of the process of
reading the image into binman.
In this case we don't need the entry arguments, since we do not intend to
regenerate the entries, or at least not unless requested. So there is no
sense in reporting an error for missing entry arguments.
Add a new property for the Image to handle this case. Update the error
reporting to be conditional on this property.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman only supports resolving symbols in the same section as
the binary that uses it. This is quite limited because we often need to
group entries into different sections.
Enhance the algorithm to search the entire image for symbols.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present on large files, lz4 uses a larger block size (e.g. 256KB) than
the 64KB supported by the U-Boot decompression implementation. Also it is
optimised for maximum compression speed, producing larger output than we
would like.
Update the parameters to correct these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable this option so that the boot-script substitutions of %U works as
expected. With this, it can boot into Chrome OS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the TPM description to include the interrupt mechanicm since this
is useful to know. Also add a warning if the TPM cannot be found and a
debug line if it succeeds.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the Cr50 starts up it doesn't have a valid locality. The driver sets
it to -1 to indicate that. Tracking this allows cr50_i2c_cleanup() to
avoid releasing a locality that was not claimed.
However the helper functions that generate the flags use a u8 type which
cannot support -1, so they return a locality of 0xff.
Fix this by updating the type. With this, 'tpm startup TPM2_SU_CLEAR'
works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-04-rc1-4
Bug fixes:
* re-read the partition table after writing GPT
* fix a problem booting ARMv7 boards with PSCI without UEFI
* make aarch64 UEFI test programs compatible with GRUB linux command
* correct the alignment check in the EFI_BLOCK_IO_PROTOCOL
* check EFI_BLOCK_IO_PROTOCOL.Media->LastBlock in unit test
Add the Linux magic to the EFI file header to allow running our test
programs with GRUB's linux command. Now we can dump the fixed-up device
tree with our dtbdump.efi tool.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some ARMv7 boards using PSCI require to be in secure-mode when booted via
'bootz' or 'bootm'. During distro-boot 'bootefi bootmgr' is called to check
if booting via UEFI is possible.
With the change we change the switch from secure mode to non-secure mode is
moved from the UEFI subsystem setup to just before calling StartImage().
Cc: Jernej Škrabec <jernej.skrabec@gmail.com>
Reported by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If the field Media->IoAlign of the EFI block IO protocol is zero, no
alignment is required. Our code required 4 GiB alignment in this case.
Don't check buffer alignment if Media->IoAlign == 0.
Fixes: f59f0825e8 ("efi_loader: parameter checks BLOCK_IO_PROTOCOL")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The field Media->LastBlock of the EFI_BLOCK_IO_PROTOCOL must be filled
with the index of the last logical block (LBA) for the block device that
our test driver provides.
After calling ConnectController() U-Boot exposes the block IO protocol for
the partition check that the value of Media->LastBlock equals the partition
size minus one.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Excluding ut str in test/cmd_ut.c but compiling test/str_ut.c results in
failure of the Python test invoking the C unit tests as observed on
sipeed_riscv_smode_defconfig:
FAILED test/py/tests/test_ut.py::test_ut[ut_str_upper]
Allow to compile test/str_ut.c on all boards.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Excluding ut bootm in test/cmd_ut.c but compiling test/bootm.c results in
failure of the Python test invoking the C unit tests as observed on
sipeed_riscv_smode_defconfig:
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_nop]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_nospace]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_silent]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_silent_var]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst_both]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst_var]
Only compile test/bootm.c on the sandbox.
Fixes: f158ba15ee ("bootm: Add tests for fixup_silent_linux()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As noted in comments, yield_fixture has been deprecated for longer than
our minimum required version of pytest. Newer versions of pytest cause
this to be a louder warning, and as the migration is trivial, perform it
now.
Signed-off-by: Tom Rini <trini@konsulko.com>
With Pytest 6.0.2 'make tests' fails:
sandbox: Traceback (most recent call last):
File "./test/py/test.py", line 20, in <module>
sys.exit(load_entry_point('pytest', 'console_scripts', 'pytest')(args))
TypeError: console_main() takes 0 positional arguments but 1 was given
The definition of console_scripts has changed as follows:
Pytest 4.6.1:
[options.entry_points]
console_scripts =
pytest=pytest:main
py.test=pytest:main
Pytest 6.0.2:
[options.entry_points]
console_scripts =
pytest=pytest:console_main
py.test=pytest:console_main
The new function console_main() has a comment:
"This function is not meant for programmable use; use `main()`"
Hence let's call pytest.main() directly.
Move args processing into the __main__ paragraph.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Compiling wandboard_defconfig with CONFIG_UT_LOG=y leads to a build error:
test/log/pr_cont_test.c: In function ‘log_test_pr_cont’:
test/log/pr_cont_test.c:28:14: error:
‘gd_t’ {aka ‘volatile struct global_data’} has no member named ‘log_fmt’
log_fmt = gd->log_fmt;
We do not want to let CONFIG_UT_LOG depend on CONFIG_LOG=y because we have
tests for logging functions called with CONFIG_LOG=n.
Fix the build dependency.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since commit 565a4147d1 ("fs: btrfs: Add more checksum algorithms")
btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
it. This leads to compilation errors:
fs/built-in.o: In function `hash_sha256':
fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
When copying short name plus extension refer to the encapsulating structure
and not to the short name element.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Re-send because of line-wraps.
This patch fixes the behaviour of the menuconfig's BOOTCOMMAND
setting. Which is just ignored without that patch on
vexpress_aemv8a platform.
Signed-off-by: Stanislav.Pinchuk@kaspersky.com
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629.
2. Enable quad mode for read and single mode for write.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
This patch adds support for MTK SPI NOR controller, which you
can see on mt7622 & mt7629.
1. This controller is designed only for SPI NOR. We can't adjust
its bus clock dynamically. Set clock in dts instead.
2. This controller only supports 1-1-1 write mode.
3. Remove mtk_snor_match_read() since upper SPI-MEM layer already
handles command.
4. sf read/write/update commands are tested with this driver.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
This is a basic driver for the ultra-low-power Abracon AB x80x series
of RTC chips. It supports in particular, the supersets AB0805 and AB1805.
It allows reading and writing the time, and enables the supercapacitor or
battery charger.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
If both stop key and delay key are empty, the length of these
keys is 0. The subtraction operation will cause the u_int type
variable to overflow, will cause illegal memory access in key
input loop.
This commit fixes this bug by using int type instead of u_init.
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some images may have multiple copies of the same thing, e.g. two versions
of the read/write U-Boots. It is necessary to read data from one or other
of these under selection of the verified-boot logic. Add a function to
select the subnode to use.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this logic out of the main init function so it is available for
other purpose.
Use a different error when multiple-images is in use but no subnode is
available. This makes it easier to determine what is wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Unfortunately the toolchain often brings in the crc32 table even if the
function is not actually used. For now, exclude it from the TPL build,
which is very sensitive to size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Set this flag so that it is available to those looking at the device. For
non-removable devices there is no need to check for insertion/removable
since the media can never change.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
At present if an eMMC part is in the system, the ACPI table generated
will include information about that, as well as the SD card. We only need
to include the SD card, since it has a card-detect GPIO. Use a different
compatible string for each option, and add code only for the SD card.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This macro is the length of the string but excludes the terminator. Users
must add 1 when declaring a large-enough string. Add a comment to make
this clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this code uses a simple printf() format if running in SPL. But
SPL can use the full printf. Use USE_TINY_PRINTF instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This includes information about sandbox which is not relevant for most
boards. Drop it.
Also add the address to help figure out the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function may be used in SPL where devicetree is not available.
Use the correct macro so that the function does not try to read it.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases so much of the framebuffer is updated that it is not worth
copying the changes piece by piece to the copy framebuffer. Add a function
to copy the whole thing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tag names for recently added types.
Fixes: d2cb7a22da (x86: Allow putting some tables in the bloblist)
Signed-off-by: Simon Glass <sjg@chromium.org>
Typically in TPL/SPL the bloblist is quite small. But U-Boot proper may
want to add a lot more to it, such as ACPI tables.
Add a way to expand the bloblist by relocating it in U-Boot proper, along
with the other relocation activities.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to figure out which phase we are loading next and
which phase we came from. Add some functions to handle this as well as
returning the name of a phase. This allows messages like "Booting to x"
where x is the next phase.
At present, TPL says 'Jumping to U-Boot' at the end, when in fact it is
jumping to SPL. This is confusing, so use the new functions to correct
this.
Tests for this will come with an upcoming minor SPL test refactor.
Signed-off-by: Simon Glass <sjg@chromium.org>
In the function rsa_verify_hash, if the "main" key doesn't
work, u-boot try others keys. But it searches those keys
in the FIT image instead of the u-boot device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as
it is not configured for any board (any more). With this removal, some
PCI related files get cleaned up a bit.
Additional, dm_pciauto_setup_device() is now static, as it's not
referenced from any code outside of this C file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In fit_config_verify_sig(), when no 'signature*' subnode exists in
the configuration node, the fdt_for_each_subnode() loop is a no-op.
Therefore, no error flags are set, and 'err_,sg' is not populated
with an error string. This is incorrect behavior.
Populate err_msg to indicate that no 'signature' is found, before
entering the loop. The first call to fit_image_verify_sig() will
override clear err_msg, or set it to a more specific message.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed ARM_SMCCC_FAST_CALL value is shifted to 31'st bit. Then, it is expanded
to 64 bit value, which results in 1s in higher 32 bits.
This causes corrupted values in 64-bit SMC IDs and issues in buggy handlers of
32-bit calls.
We need to make ARM_SMCCC_FAST_CALL unsigned long, so it would work properly
on 32 bit architectures.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Macro 'cmd_objcopy_uboot' currently does not work with passed empty command
expanded from 'cmd_static_rela' and therefore dummy command 'true' is set
in 'cmd_static_rela' to workaround this issue.
Eliminate it now by fixing 'cmd_objcopy_uboot' macro to work also with
empty 'cmd_static_rela' macro and remove useless invocation of command
'true'.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Espressobin: Disable slot when emmc is not present (Pali)
- DS414; config header cleanup (Phil)
- PCI: auto-config enhancement (Phil)
- pci_mvebu: Also map IO region (Phil)
- serial: a3720: Implement pending method for output direction (Pali)
- turris_mox: Enable a few commands (Marek)
- helios4 & ClearFog changes (Dennis)
- Plus some minor misc changes
Pull request for documentation tag doc-2021-04-rc1-3
Update the build system for the HTML documentation to allow using
Sphinx 3.
Man-page for exception command.
This adds support for specifying FDT overlays in an extlinux/pxelinux
configuration file.
Without this, there is no simple way to apply overlays when the kernel
and fdt is loaded by the pxe command.
This change adds the 'fdtoverlays' keyword for a label, supporting multiple
overlay files to be applied on top of the fdt specified in the 'fdt' or
'devicetree' keyword.
Example:
label linux
kernel /Image
fdt /soc-board.dtb
fdtoverlays /soc-board-function.dtbo
append console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait
This code makes usage of a new variable called fdtoverlay_addr_r used to load
the overlay files without overwritting anything important.
Cc: Tom Rini <trini@konsulko.com>
Cc: Andre Heider <a.heider@gmail.com>
Cc: Jernej Škrabec <jernej.skrabec@siol.net>
Cc: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Jernej Škrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Škrabec <jernej.skrabec@siol.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The phydev structure has a PHY OF node pointer in it, use that OF node
first when looking up PHY OF node properties, since that is likely the
correct PHY OF node pointer. If the pointer is not valid, which is the
case e.g. on legacy DTs, fall back to parsing MAC ethernet-phy subnode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Add some missing address translations from virtual address in local DRAM
to physical address, which is needed for the DMA transactions to work
correctly.
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual
address in local DRAM to a physical address. The correct macro here
is virt_to_phys() so switch to using this macro.
As virt_to_bus() is now not used any more, this patch also removes
both definitions (DM and non-DM).
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Enable setexpr command in defconfig for Turris MOX. We have found that
this is sometimes useful in U-Boot scripts and there is enough space in
NOR memory on MOX.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable wdt command in defconfig for Turris MOX. This is useful when
doing debugging.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Value pcie->dev in function pcie_advk_probe() is not initialized yet
so use dev as argument for dev_dbg()/dev_warn().
Function pcie_advk_wait_pio() itself prints error message on failure
so do not print duplicate error message in caller.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
To check if some output characters are waiting either in Transmitter
Holding Register or Transmitter Shift Register we need to look at
TX_EMPTY bit of UART Status Register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Update the documentation build system according to Linux v5.11-rc1.
Deactive the automarkup.py extension module which on Gitlab CI is
incompatible with Unicode.
With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Install all requirements according to doc/sphinx/requirements.txt in the
virtual environment used for testing 'make htmldocs'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sphinx 3 builds fail due to doc/develop/logging.rst producing duplicate
labels.
Include logging.h only once in the API section and use cross-references for
the enums log_level_t and log_category_t.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Configure an IO region and window for PNP identical to how MEM region is
set up. Linux does this only if the DT defines a pcie-io-aperture
property for the SOC, but since all supported boards do this should not
be needed.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
On my DS414, some PCI devices return odd values when probing BAR sizes.
An obvious case is all-ones response, the Linux driver
(drivers/pci/probe.c) catches those explicitly and a comment explains
that either bit 0 or bit 1 must be clear (depending on MEM or IO type).
Other BARs return e.g. 0xfff0000f or 0xfff00004 and thus manage to break
size calculation due to the "middle" zeroes. Mitigate that copying more
or less what Linux does and do a "find least bit set".
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
A few minor changes:
* Get rid of leftover comments, other commits removed the defines they
referred to.
* CONFIG_SYS_NETA_INTERFACE_TYPE is not used anymore since commit
e3b9c98a23 ("net: mvneta: Convert to driver model").
* Drop CONFIG_USB_MAX_CONTROLLER_COUNT: it is per-HCI type, so XHCI and
EHCI could still both work be used.
* Unconditionally define CONFIG_EHCI_IS_TDI: it has no effect on XHCI so
that conditional doesn't make any sense.
* Define a larger PHY_ANEG_TIMEOUT: In my test bed, the NIC is directly
connected to some RTL8111 and the default 8s timeout was often too
short.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This change extends previous commit 061c6d1b23 ("arm: mvebu: Espressobin:
Detect presence of emmc at runtime") and when emmc is not present then emmc
is removed from U-Boot DM and corresponding slot is disabled. Therefore on
Espressobin board without soldered emmc, state of emmc hw should be same as
if emmc was disabled in DTS.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
SATA and UART ClearFog imaages are not buildable as ENV_SECT_SIZE is not defined
set values for both possible targets
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Move all aliases defintions into the main dts file
Add u-boot definiton to i2c0 based on clearfog
set spi1 status to okay
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
The Armada driver also works on Nedap's custom Kirkwood board with a
Marvell 88F6180 CPU. The original commit of that driver,
commit 704d9a645e ("gpio: Add DM GPIO driver for Marvell MVEBU"),
also mentions that this driver would be suitable for Kirkwood. This
does not completely replace the Kirkwood specific driver as there
are still boards depending on that driver.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Stefan Roese <sr@denx.de>,
Reviewed-by: Stefan Roese <sr@denx.de>
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid becoming trapped with some compatible fallback strings, let's
remove the whole struct sunxi_mmc_variant, and replace this with a SoC
based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols.
This will later simplify H616 support.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.
Controller and MBUS are very similar to H6 but PHY is completely
unknown.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
driver and need for PMIC configuration, which pulls several drivers which
are not needed otherwise.
spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with
that, reported in SPL header. If size in header is bigger, it will use
that value instead.
In the process of function rework, also add missing function argument.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
There was no need to have prcm definitions for H6 and similar SoCs till
now. However, support R_I2C will be needed soon in SPL.
Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h.
One of those files will be selected in common prcm.h based on defined
macros.
This commit doesn't do any functional change.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
While currently none of the newer Allwinner SoCs currently has I2C
support implemented in U-Boot, this will change soon. mvtwsi driver is
good as it is for them except one macro. Update it to be ready once I2C
support lands for those SoCs.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as
string Kconfig symbols are always "defined" from the preprocessor's
perspective. This lead to unnecessary calls to the GPIO routines, but
also always added a half a second delay to wait for a SATA disk to power
up. Many thanks to Peter for pointing this out!
Fix this by properly comparing the Kconfig symbols against the empty
string. strcmp() would be nicer for this, but GCC does not optimise this
away, probably due to our standalone compiler switches.
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi WinPlus
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
dts file is taken from Linux 5.11-rc1 tag.
The Bluetooth controller of this device ships with a default address,
use the new CONFIG_FIXUP_BDADDR option to fix it up.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[Updated OrangePi 3 DT, rebase and config update]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit adds support for Tanix TX6 TV box, based on H6. It's low end
H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
peripherals.
DT file is taken from Linux 5.11-rc1 release.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far all GBit users of the sun8i-emac driver were using the "rgmii"
PHY mode, even though this turns out to be wrong. It just worked because
the PHY driver doesn't do the proper setup (yet).
In fact for most boards the "rgmii-id" or "rgmii-txid" PHY modes are the
correct ones.
To allow the DTs to describe the phy-mode correctly, and to stay
compatible with Linux, at least allow those other RGMII modes in the
driver.
This avoids breakage if mainline DTs will be synced with U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Pull request for documentation tag doc-2021-04-rc1 (2)
* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
Second set of u-boot-atmel features for 2021.04 cycle
This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
'make htmldocs' creates a warning:
./include/asm-generic/global_data.h:443:
warning: Function parameter or member 'uclass_root_s'
not described in 'global_data'
Correct the member descriptions.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The first argument is the load address and not an offset.
The second argument cannot be entered without the first one.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default the echo command emits its arguments followed by a line feed.
If any of the arguments contains the sub-string "\c", the line feed is
suppressed.
This does not match shells used in Linux and BSD where the first argument
has to be -n to suppress the line feed.
The hush shell interferes with the parsing of backslashes. E.g. in the
following command line quadruple backslashes are required for suppressing
the line feed:
for i in 1 2 3; do for j in 4 5; do echo \\\\c ${i}${j}; done; echo; done;
To avoid unexpected behavior the patch changes echo to use -n as first
argument to suppress the line feed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently this driver does not set the value of plat->cfg.f_max, which
results in that MMC framework will always run at the lowest frequency.
This patch sets plat->cfg.f_max to the maximum allowed frequency, which
equals to the source clock frequency.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.
This patch adds default pad control settings for mt7620_compat.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
It turns out that the sclk cycles used by mt7620/mt7628 is the same as
other chips (20 bits, 1048576), not 65536.
This patch removes sclk_cycle_shift from dev_comp, and uses a macro with
a value 20 instead.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds ethernet driver for MediaTek MT7620 SoC.
The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).
The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.
This driver supports MT7530 giga switch connects to port 5.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds spi controller support for MediaTek MT7620 SoC.
The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds pinctrl support for MediaTek MT7620 SoC.
The MT7620 SoC supports only pinmux.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds uart support for MediaTek MT7620 and earlier SoCs.
The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).
The driver supports of-platdata which is useful for tiny SPL.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Since mt7620 is added into Kconfig, the CONFIG_SOC_MT7628=y which is
omitted by default must be added back, otherwise make xxx_defconfig for
these boards will be configured for mt7620 platform.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mt7620_rfb board supports integrated 10/100M PHYs plus two external
giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB.
The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a
16MB SPI-NOR flash.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for mtmips SoCs to initialize the SDRAM.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The sysreset driver has a config CONFIG_SPL_SYSRESET for the spl stage.
Change CONFIG_SYSRESET to CONFIG_IS_ENABLED(SYSRESET) will give spl a
chance to use _machine_restart instead of the sysreset driver.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
CONFIG_SYS_SDRAM_BASE points to cached memory, i.e. KSEG0, which is not
suitable for detecting memory size.
Replace CONFIG_SYS_SDRAM_BASE with KSEG1, and make dram_init() always do
memory size detection in any stage.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently only mt7628 needs the sysreset driver, do not select it for
mt7620.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch is a preparation for add a new soc fot mtmips.
Move all mt7628 related Kconfig (boards and UART selection) into mt7628
subdirectory and make sure the top directory of mtmips contains only
selection for SoCs.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Previous the dts files for gardena-smart-gateway-mt7688 and
linkit-smart-7688 are set to be built when mtmips is selected.
This can lead to a compilation error if another soc is added to this arch
with different dtsi files.
So it's better to build the dtb only if their board is selected.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Pull request for UEFI sub-system for efi-2021-04-rc1-3
Bug fixes for UEFI sub-system:
* correct value of EFI_BLOCK_IO_PROTOCOL.Media.LastBlock
* correct GUID when closing of EFI_LOAD_FILE_PROTOCOL
* error handling in mkeficapsule tool
Bug fixes for FAT file system:
* consistent error handling for flush dir()
Unfortunately we now see a number of now-fatal warnings about duplicate
labels. It is often unclear how best to re-write the document in
question to not duplicate these otherwise logical headings.
This reverts commit 10a1df3cd4.
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert test/py/README.md to restructured text and add it to the generated
HTML documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move test/README to the 'Develop U-Boot' chapter of the HTML documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the help message used for 'make help':
Documentation targets:
Linux kernel internal documentation in different formats from ReST:
=>
U-Boot documentation in different formats from ReST:
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the docomentation build system according to Linux v5.11-rc1.
With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Fix warning in b4860qds.rst about "Switch Settings"]
Signed-off-by: Tom Rini <trini@konsulko.com>
Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M
Nano SoC consisting of baseboard + SOM.
The kit is based on the same design as the Beacon dev kit with
the i.MX8M Mini.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The previous macro was off by one bit and so we were getting a ddr
size which was twice the real size. This commit refactors the macro so
it returns the right size in _bytes_ and modifies the printf call so the
size is still printed in MiB.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
In case the clock framework is enabled, enable the SPI controller clock
and obtain max frequency from the clock framework.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
The CSPI/ECSPI register bits do not differ between newer SoCs, instead
of having multiple copies of the same thing for each iMX SoC, define
the bits in the driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Add ECSPI clock entries to iMX8MN clock driver. Only make those entries
available in case SPI support in U-Boot is enabled at all to conserve
space, esp. in SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to support the QSPI chip on the SOM, the Flexspi bus
needs to be configured to talk with the SPI chip.
Resync the som device tree with 5.11-rc4
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
There is a QSPI chip connected to the FSPI. Enable the defconfig
to support it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Supported boot device types in iMX8MQ: MMC, DHCP.
CONFIG_DISTRO_DEFAULTS is added for enabling the DISTRO_DEFAULTS option.
CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mq_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.
kernel_addr_r is the location in RAM where the kernel will be loaded to.
Delete unnecessary environment variables because "run distro_bootcmd" is
set to be the default boot mode.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Move the bootcounter to SVNS_LPGDR to free up OCRAM for usage by the VPU.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Now that header files no longer include common.h it must be included
first.
Otherwise the build fails with errors like
include/asm/arch/clock.h:43:1: error: unknown type name 'u32'
u32 imx_get_uartclk(void);
Fixes: c3dc39a2f8 ("arm: Don't include common.h in header files")
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch converts the dart6ul ethernet support to DM_ETH and cleans
up the legacy ethernet code. The clean up, more specifically:
* moves the fec2 node and pin definition to the carrier board DTS
since the phy associated with it is on the carrier board and not on
the SoM;
* add the reset pin associated to each phy;
* separate the ethernet, mdio and reset pins of each fec so that they
are easier to reference;
* add clock properties to the phy nodes since they are connected to the
50Mhz ENET[12]_TX_CLK clock of the SoC;
* remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Because SPL can support SD UHS, the fixed regulator needs to be
enabled in SPL to reset the SD card.
Fixes: 1a5d9c84b4 ("imx8mm_beacon: Enable HS400 on MMC controller")
Signed-off-by: Adam Ford <aford173@gmail.com>
This fixes eth0 not initializing properly. Both eth0 and eth1 use the
MDIO interface on eth1 to access their PHYs. However, without
DM_ETH_PHY, eth0 still tries to use its own MDIO interface to access its
phy. Before this patch, a boot log might contain lines like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Could not get PHY for FEC0: addr 2
After this patch they now look like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Get shared mii bus on ethernet@2188000
Warning: ethernet@2188000 using MAC address from ROM
, eth0: ethernet@2188000
As an alternative to DM_ETH_PHY, FEC_MXC_SHARE_MDIO could also have been
used to achieve the same effect.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Supported boot device types in iMX8MP: MMC.
CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution. kernel_addr_r is the location in RAM where
the kernel will be loaded to. Delete unnecessary environment variables
because "run distro_bootcmd" is set to be the default boot mode.
On the iMX8MP platform I used, "mmc1" represents SD card and "mmc2"
represents eMMC.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value "
/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Supported boot device types in iMX8MM: MMC, DHCP.
CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.
CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mm_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.
kernel_addr_r is the location in RAM where the kernel will be loaded to.
Delete unnecessary environment variables.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.
Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since we remove SATA device before boot OS, when AHCI is enabled, update
the codes to remove AHCI device.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5],
correct it in imx common codes.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add NAND boot support for i.MX8MP by adding i.MX8MP in nandbcb support
list, reading boot_search_count from fuse.
i.MX8MN NAND boot is same as i.MX8MP, fix some issues as well.
Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006656. In nandbcb_set_boot_config, an integer overflow
occurs, with the result converted to a wider integer type.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006658. In fill_dbbt_data, an integer overflow occurs,
with the result converted to a wider integer type
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006657. In read_fcb, leak of memory to system
resource "fcb_raw_page". Adjust the sequence to check the mtd bad
block prior than allocation of "fcb_raw_page", also check the NULL
return of allocation.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource
"fcb_raw_page". Since we have initialized the "ret" to 0, should return
the value of ret.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006654. In write_fcb, use of an uninitialized
variable "ret".
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When doing DDR scrub, the DDR may enter into self refresh if the
selfref_en is enabled before DDR scrub. This will cause scrub
can't complete that SBRSTAT.scrub_done won't be set.
Since the selfref_en can be programmed during the course of
normal operation, move it after DDR scrub
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use
CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The field Media.LastBlock of the EFI_BLOCK_IO_PROTOCOL.Media was filled
incorrectly both for block devices as well as for partitions.
The field must be filled with the index of the last logical block (LBA):
* block devices: device size minus 1
* partitions: partition size minus 1
Reported-by: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI specification requires event notification levels to be
> TPL_APPLICATION and <= TPL_HIGH_LEVEL.
With the patch the CreateEvent() and CreatedEventEx() services are changed
to check that the notification level is not TPL_APPLICATION.
Reference:
UEFI Specification 2.8 Errata B, table 27 "TPL Restrictions",
"Event Notification Levels"
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Miscellaneous fixes in the mkeficapsule utility -- these include a few
resource leak issues flagged by Coverity along with some additional
code improvements suggested by Heinrich during code review.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Fill reserved members of efi_firmware_management_capsule_image_header
structure with zero's for safety.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: CID 316354
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CID 316361 says:
> Passing argument "count * 8UL /* sizeof (*files) */" to
> function "dlmalloc" and then casting the return value to "u16 **" is
> suspicious. In this particular case "sizeof (u16 **)" happens to be equal
> to "sizeof (u16 *)", but this is not a portable assumption.
> > 767 tmp_files = malloc(count * sizeof(*files));
The change in this patch fixes the ambiguity.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: CID 316361
For readability use *tmp_files instead of tmp_files[0]
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CID 316364 says:
> Null pointer dereferences (FORWARD_NULL)
> printf("Result total size: 0x%x\n", result->variable_total_size);
at do_efi_capsule_res().
The code is basically safe because a buffer for "result" is allocated
by malloc() and filled up by the second get_variable(), which fails any way
if the allocation has failed.
But the first (and second) get_variable() possibly returns an error other
than EFI_SUCCESS. We always need to check the return code from
get_variable() before accessing the data in "result".
While this change won't suppress CID 316364, the resulting code is much
safer.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use the correct GUID when closing the file load protocol.
Remove an unnecessary check (Coverity CID 316363).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The short name and extension of FAT files are stored in adjacent fields of
the directory entry. For some operations like calculating a checksum or
copying both fields it is preferable to treat both as one structure.
Change the definition of the directory entry structure to include a
structure comprising the name and the extension field.
This resolves Coverity CID 316357, CID 316350, CID 316348.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide function description for flush_dir().
Move all error messages for flush_dir() from the callers to the function.
Move mapping of errors to -EIO to the function.
Always check return value of flush_dir() (Coverity CID 316362).
In fat_unlink() return -EIO if flush_dirty_fat_buffer() fails.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UBI_IOCVOLUP ioctl can fail if exclusive access to the volume isn't
obtained. If this happens, the flush operation doesn't return error,
leaving the caller without knowledge of missing flush.
Fix this by forwarding the error (-1) from ubi_update_start().
Fixes: 34255b92e6 ("tools: env: Add support for direct read/write UBI volumes")
Signed-off-by: Martin Hundebøll <martin@geanix.com>
These commands were disabled when CONFIG_FIT_SIGNATURE is disabled, but
they do not depend on crypto support so they can be unconditionally
enabled.
Signed-off-by: Joel Stanley <joel@jms.id.au>
When CONFIG_FIT_CIPHER=y and CONFIG_FIT_SIGNATURE=n is there is no
implementation of image_get_host_blob for mkimage/dumpimage:
/usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'
Move the implementation to a common file so it can be shaed between
image-cipher.c and image-fit-sig.c.
Signed-off-by: Joel Stanley <joel@jms.id.au>
If CONFIG_FIT_CIPHER is enabled without CONFIG_FIT_SIGNATURE then
mkimage/dumpimage will fail to link:
/usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'
/usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x10): undefined reference to `EVP_aes_128_cbc'
/usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x40): undefined reference to `EVP_aes_192_cbc'
/usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x70): undefined reference to `EVP_aes_256_cbc'
/usr/bin/ld: tools/lib/aes/aes-encrypt.o: in function `image_aes_encrypt':
aes-encrypt.c:(.text+0x22): undefined reference to `EVP_CIPHER_CTX_new'
/usr/bin/ld: aes-encrypt.c:(.text+0x6f): undefined reference to `EVP_EncryptInit_ex'
/usr/bin/ld: aes-encrypt.c:(.text+0x8d): undefined reference to `EVP_EncryptUpdate'
/usr/bin/ld: aes-encrypt.c:(.text+0xac): undefined reference to `EVP_CIPHER_CTX_free'
/usr/bin/ld: aes-encrypt.c:(.text+0xf2): undefined reference to `EVP_EncryptFinal_ex'
collect2: error: ld returned 1 exit status
Signed-off-by: Joel Stanley <joel@jms.id.au>
The propoerty sign-images points to images in the configuration
node. But thoses images may references severals "sub-images" (for
example for images loadable). This commit adds the support of
severals sub-images.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit creates a function fit_config_add_hash that will be
used in the next commit to support several 'sub-images'.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
** Introduction
There are currently four ways to load an OS image with u-boot
1. SPL -> u-boot -> bootm
2. SPL blue falcon mode
3. "Basic" FIT image (CONFIG_LOAD_FIT)
4. "Full-featured" FIT image (CONFIG_LOAD_FIT_FULL)
These four code paths were developed independently, and share very
little code. (3) and (4), behave very differently, are littered with
special cases. They even have different DTS syntax and properties.
The cause of this divergence is that the FIT format specification
leaves a number of things open to interpretation. The purpose of this
change is to enable the reduction of code size, duplication, and
complexity by updating and streamlining the FIT format.
We are only marginally concerned with backwards compatibility, because
we don't have inter-compatibility. For example, CONFIG_LOAD_FIT is
able to load images that CONFIG_LOAD_FIT_FULL won't. This is a direct
result of the incompatible syntax between the two implementations.
Ideally, these changes would enable "simple" FIT to be a subset of the
"full" fit implementation, and share most code. These changes should
also eliminate the need for falcon mode (although we are not
advocating for the removal of falcon mode at this time).
** Description of changes
* The "configurations" node is now mandatory
Guessing how to load components based on their "os" and "type" invites
confusion and superfluous heuristics. Instead, require each FIT image
to be explicit on how components should be loaded.
* Eliminate "ramdisk", "setup", "standalone", and "fpga" properties
Having too many special purpose properties requires special-casing
FIT loading code. When a special property can be handled by another
property, it is redundant.
- A "ramdisk" is identical to a loadable. Thus ramdisk images should
be placed under "loadables".
- A "setup" node can be achieved by using a "kernel" or "firmware"
property instead.
- "standalone" is used for u-boot nodes. The correct property to use
in this case is "firmware".
- "fpga" is a loadable
* Prioritize control between "firmware" and "kernel"
"firmware" and "kernel" are special nodes in that control is passed
to the "entry-point" of the image. Both can be present, for example,
an OP-TEE firmware with a linux kernel. When both are present,
control is passed to the "firmware" image.
** Further generalizations (not included herein)
The "firmware" and "kernel" properties could be generalized as a
"next-boot-stage", or similar name. This "next" stage would be special
in that it is both executable, and is the stage that is passed
control. For example, "next-stage" could be an op-tee image, with
linux as a loadable, or a u-boot image.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The dm root node is needed early in the spl to allow the timer to be
used. This change calls spl_early_init to initialize the dm root node.
Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
Giant board is a tiny SBC based on the Adafruit Feather form factor,
created by groboards it contains a SAMA5D2 processor (SAMA5D27),
128 MB of RAM and a microSD card for storage.
Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
Take into account all RGMII interface types. Depending on it
the RGMII PHY's timings are setup.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk_set_rate() returns the set rate in case of success and a
negative number in case of failure. Consider failure only the
negative numbers.
Fixes: 3ef64444de ("dm: net: macb: Implement link speed change callback")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Different implementation of USER IO register needs different
mapping for bit fields of this register. Add implementation
for this and, since clken is part of USER IO and it needs to
be activated based on per SoC capabilities, add caps in
macb_config where clken specific information needs to be filled.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Because ATMEL_BASE_ROM is defined to 0x100000, it already points
to the begin of the index table for 512 byte sectors correction.
Thus its offset must be zero and the index of the table for 1024
byte sectors must start at offset 0x8000.
Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de>
[ta: update commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Offsets are described in the datasheet at section:
"11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction".
For testing I "injected" bit flips into u-boot NAND memory area,
and then read back. PMECC could not correct the errors. With the
offsets updated everything is fine.
Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
When CONFIG_ATMEL_NAND_HW_PMECC is set, CONFIG_PMECC_CAP defaults
to the value of 2. At the conversion to Kconfig for the PMECC config
values, some boards/defconfigs were wrongly configured.
Update CONFIG_PMECC_CAP to the PMECC_CAP value before the conversion.
Fixes: 49ad40298c ("ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
SPL_GENERATE_ATMEL_PMECC_HEADER selects:
ATMEL_NAND_HWECC [=y] && ATMEL_NAND_HW_PMECC [=y].
With the removal of SPL_GENERATE_ATMEL_PMECC_HEADER,
ATMEL_NAND_HW_PMECC and ATMEL_NAND_HWECC were no longer
selected. Also, when the SPL_GENERATE_ATMEL_PMECC_HEADER was removed,
the configs were not updated using savedefconfig, thus the
'commit d168bcb6fe ("configs: Resync with savedefconfig")'
further removes the CONFIG_PMECC_CAP value.
Update defconfigs and add CONFIG_ATMEL_NAND_HW_PMECC,
which selects ATMEL_NAND_HWECC, in order to restore NAND PMECC
support. Restore CONFIG_PMECC_CAP value.
Fixes: 57f76c2a47 ("configs: at91: remove SPL_GENERATE_ATMEL_PMECC_HEADER from non-nand configs")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Use dev_read_prop instead of using the fdt_read_property which
reads from the GD struct's fdt.
This way the node is accessed via the device config instead of the
global struct, which makes code more portable and GD independent.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
- New board: rk3328 NanoPi R2S board;
- Fix init voltage for some rk3399 boards;
- enable rng for rk3399 by default;
- set default to SPI bus 1 for SPI-flash for some board;
- add dwc PCIe controller driver on rockchip platform;
Add Rockchip dwc based PCIe controller driver for rk356x platform.
Driver support Gen3 by operating as a Root complex.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This adds support for the NanoPi R2S from FriendlyArm.
Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The rng is embedded in the SoC so enable it in the device tree
universally, the use of it can be controlled by enabling/disabling
at the device config level.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1
pointed to &spi5, use an alias spi5 for this instead.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Before 'if (err)' we have to initialize the variable otherwise we use a
random value from the stack.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At the beginning of close_ctree_fs_info() the value 0 is assigned to err
and never changed before testing it.
Let's get rid of the superfluous variable.
Fixes: f06bfcf54d ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
SquashFS supports sprase blocks in files - that is, if a given block is
composed only of zeros, it's not written to the output file to save
space and it's on-disk length field is set to zero to indicate that.
Previously the squashfs driver did not recognise that, and would attempt
to read and decompress a zero-sized block, which obviously failed.
The following command may be used to create a file for testing:
cat <(dd if=/dev/urandom of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/zero of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/urandom of=/dev/stdout bs=1k count=200) >test_file
Signed-off-by: Campbell Suter <campbell@snapit.group>
In __btrfs_map_block() we do a int * int and assign it to u64.
This is not safe as the result (int * int) is still evaluated as (int)
thus it can overflow.
Convert one of the multiplier to u64 to prevent such problem.
In real world, this should not cause problem as we have device number
limit thus it won't go beyond 4G for a single stripe.
But it's harder to teach coverity about all these hidden limits, so just
fix the possible overflow.
Reported-by: Coverity CID 312957
Reported-by: Coverity CID 312948
Signed-off-by: Qu Wenruo <wqu@suse.com>
Pull request for UEFI sub-system for efi-2021-04-rc1-2
* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
* Boot manager
* EFI_DT_FIXUP_PROTOCOL
* EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
* avoid EFI runtime symbols in global symbol table
CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot
works with variables. struct environment_s has one byte flags property
which also affects ENV_SIZE macro.
I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup
but custom scripts can be designed in a way that u-boot is asked to
import/export variables from/to file which can be in certain format.
That's why also for this configuration make sense to enable
CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file
format.
The patch is removing dependency on this configuration to support selecting
environment file format without any specific dependency where variables are
stored.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to define the same macros in drivers.
All macros have been added by commit 17a42abb40 ("mmc: Define timing
macro's").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
EFI applications must use CR LF as line endings.
Provide a print() function to reduce code size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide an UEFI application to save the initial RAM disk provided by U-Boot
via the Load File2 protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. It was however required to run the UEFI Self Certification Test
(SCT) II, version 2.6, 2017. So we implemented it for the sole purpose of
running the SCT.
As the SCT does not need the protocol anymore it is time for removal.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Allow the EFI_DEVICE_PATH_UTILITIES_PROTOCOL to be disabled via
configuration.
On systems that are very tight on U-Boot image size we may want to disable
the protocol. As it is required to run the UEFI Shell enable it by default.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some boards are very tight on the binary size. Booting via UEFI is possible
without using the boot manager.
Provide a configuration option to make the boot manager available.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This reverts commit 1231184caa.
While the change is fine in theory, a number of tests need to be updated
to match.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move all load options related functions to a new module. So that they can
be compiled independently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
dev_read_alias_seq() used uc_drv->name compared to alias
stem string, Ethernet's alias stem uses "ethernet", which
does not match the eth-uclass driver name "eth", can not
get the correct index of ethernet alias namer. So it seems
change uclass driver name to match the alias stem is a more
reasonable way.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A sporadic condition occurs when the "bad packet" error is triggered
repeatedly, which results in "bad packet" messages scrolling on the
console during transfer. To avoid triggering this, reset the internal
RXFC count on the first occurance of the "bad packet", which forces
the code to re-read the RX packet count from the MAC, and prevents
any additional "bad packet" messages if there are no more packets in
the MAC. Also print better debug information if this condition occurs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
When calling srand_mac we use a weak seed dependent on the
mac address. If present, use a RNG device instead to incerase entropy.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
When calculating a random UUID we use a weak seed.
Use a RNG device if present to increase entropy.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Fix typo which would cause a build error.
Fixes: 3eaac6307d ("net: introduce packet capture support")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
When the tftp server did not send any OACK, the tftp_next_ack variable
was not set to the correct value . As the server was transmitting
blocks we generated a lot of 'Received unexpected block: $n, expected
$n+1' error messages. Depending on the timeout setting the transfer
could still complete though.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Ramon Fried <rfried.dev@gmail.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
While doing DHCP the interface IP is set to 0.0.0.0. This causes the
check in net.c on dst_ip to be effectively skipped, and all IP datagrams
are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the
matching MAC address (regardless of destination IP), the result is that
an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is
0.0.0.0, which is an illegal source address.
This can happen in common practice with the following sequence:
DHCP (U-Boot or OS) acquires IP address 10.0.0.1
System reboots
U-Boot starts DHCP and send DHCP DISCOVER
DHCP server decides to OFFER 10.0.0.1 again
(perhaps because of existing lease or manual configuration)
DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it
DHCP server still has our MAC address in its ARP table for 10.0.0.1
U-Boot receives PING, and responds with an illegal source address
This may further result in a the DHCP server seeing the response as
confirmation that someone is squatting on 10.0.0.1, and picking a
new IP address from the pool to try again
Signed-off-by: David Rivshin <drivshin@allworx.com>
Implement programming MAC address to the hardware also for device model
configuration.
Fixes: b565b18a29 ("board: ge: bx50v3: Enable DM for PCI and ethernet")
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Running the start() handler twice without a stop() inbetween completely
breaks communication for some ethernet drivers like fec_mxc.
eth_halt() is called before each eth_init(). Due to the switch to
eth_is_active() in commit 68acb51f44 ("net: Only call halt on a driver
that has been init'ed"), this is not sufficient anymore when netconsole
is active: eth_init_state_only()/eth_halt_state_only() manipulate the
state check that is performed by eth_is_active() without actually
calling into the driver.
The issue can be triggered by starting a network operation (e.g. ping or
tftp) while netconsole is active.
Add an additional "running" flag that reflects the actual state of the
driver and use it to ensure that eth_halt() actually stops the device as
it is supposed to.
Fixes: 68acb51f44 ("net: Only call halt on a driver that has been init'ed")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
The timer being used by this driver may have already been used by first
stage bootloader (e.g. ATF/preloader), and it's settings may differ from
what this driver is going to use.
This may cause issues, such as inaccurate timer frequency due to
incorrect clock divider.
This patch adds the initialization code to avoid them.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write()
and mw_eeprom_read() have incorrect loop conditions:
while (len <= 2) {
CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Avoid calling free(addr) twice if the device for ucode is not found.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Update branch and version information of ATF and DDR firmware files to
point to latest releases provided by NXP.
This is especially critical for imx8mp evk, as the ATF support for that
SoC is only available in latest releases.
Align all SoCs from imx8m family to use identical revisions of ATF and
DDR firmware.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Calling calloc() for 0 members does not make any sense.
Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally
unreasonable.
The current code will lead to a NULL dereference in bcm6348_iudma_enable().
The assignments for ch_priv->busy_desc are obviously swapped.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.
However, currently the patch supports only the booting from
memory-mapped SPI flash.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
AST2600 is the 7th generation of Aspeed SoC designated for
Interated Remote Management Processor.
AST2600 has significant performance improvement by integrating
1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the
controllers are also improved with more features and better
performance than preceding AST24xx/AST25xx.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.
A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600.
The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb),
512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h
Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Our kirkwood device embeds a USB host controller that is now used
on some boards. This enables the support of USB and the corresponding
driver.
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h by proxy. This file does not exist for the ARM
architecture and thus code compilation failed when using this
driver on ARM.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
QEMU.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
mkimage is only able to package aarch32 binaries. Add support for
AArch64 images.
One can create a ARM64 image using the following command line:
mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1"
-d bl2.bin bl2.img
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Enable USB gadget on pumpkin. This requires to also enable
BOARD_LATE_INIT since the init is done in board_late_init function.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
- Update qemu-riscv.rst build instructions.
- Add support for SPI on Kendryte K210.
- Add Microchip PolarFire SoC Icicle Kit support.
- Add support for an early timer.
- Select TIMER_EARLY to avoid infinite recursion for Trace.
Pull request for documentation tag doc-2021-04-rc1
* document man-page base command
* move README.fdt-overlays to HTML documentation
* add synopsis for pstore command
Remove the leading "0x" from rpc node to fix the below dtc warning:
Warning (simple_bus_reg): Node /soc/rpc@0xee200000 simple-bus unit
address format error, expected "ee200000"
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
By default on startup all the pin types are configured to
PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the
pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated
when the pin is set as a function in sh_pfc_pinctrl_pin_set() or
sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if
the pin type is PINMUX_TYPE_NONE ie unused).
So with the current implementation pin functionality could be overwritten
silently, for example if the same pin is added for SPI and serial.
This patch makes sure of updating pin type after every successful call to
sh_pfc_config_mux() and thus fixing from pin functionality to be
overwritten. Also a warning message is printed if the current pin is being
overwritten before abort.
This also avoids pin re-muxing to same type that is for example from
command line device is asked to re-probe/select (mmc dev x) we return
early with success in this case as the pin is already muxed.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
This patch adds Microchip MPFS Icicle Kit support. For now, only
NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are
enabled. The Microchip MPFS Icicle defconfig by default builds
U-Boot for S-Mode because U-Boot on Microchip PolarFire SoC will run
in S-Mode as payload of HSS + OpenSBI.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Enable 32-bit or 64-bit DMA in the macb driver based on the macb
hardware compatibility and it is configured with structure macb_config
in the driver.
The Microchip PolarFire SoC Memory Protection Unit(MPU) gives the 64-bit
DMA access with the GEM, the MPU transactions on the AXI bus is 64-bit
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
When tracing functions is enabled this adds calls to
__cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
functions.
__cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
timer_get_us() to record the entry and exit time.
initr_dm() will make gd->dm_root = NULL and gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.
So select TIMER_EARLY when tracing got enabled.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This enables configs necessary for using SPI. The environment is saved to
the very end of SPI flash. This is unlikely to be overwritten unless the
entire flash is reprogrammed.
This also supplies a default bootcommand. It loads an image and device tree
from the first partition of the MMC. This is a minimal/least effort
bootcmd, so suggestions (especially in the form of patches) are welcome. I
didn't set up distro boot because I think it is unlikely that any
general-purpose linux distros will ever be ported to this board.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Chrstopher Obbard <obbardc@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
fit_print_contents prints similar fit information as printed in bootm stages.
Removing this API reduces redundancy & provides improvement in boottime.
Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change 2 typo error in CONFIG_LIB_ELF description:
- Supoort => Support
- fir => for
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a unit test for printing via pr_err() and pr_cont().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
With commit d094a0734c ("log: allow for message continuation") we have
defined a special log level and category for message continuation. Let's
have a macro for using these.
If logging is enabled log_cont() will create a continuation log output with
the same logging level and category as the previous message.
If logging is not enabled, log_cont() will print like printf().
Provide macros for logging levels LOG_EMERG, LOG_ALERT, LOG_CRIT.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change debug_cond() such that it can be used instead of a function like
debug().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The macro BIT_MASK is already defined in include/linux/bitops.h. To avoid
name collisions rename BIT_MASK() in drivers/ram/k3-j721e/lpddr4_private.h
to LPDDR4_BIT_MASK().
Remove superfluous parantheses.
Remove superfluous comparison to 0.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
log.h and dm/devres.h are U-Boot includes. So placing them
behind #ifndef __UBOOT__ does not make any sense.
Fixes: f7ae49fc4f ("common: Drop log.h from common header")
Fixes: 61b29b8268 ("dm: core: Require users of devres to include the header")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building fails with DEBUG=1:
lib/aes.c: In function ‘debug_print_vector’:
lib/aes.c:622:45: error:
cast from pointer to integer of different size
[-Werror=pointer-to-int-cast]
622 | printf("%s [%d] @0x%08x", name, num_bytes, (u32)data);
Pointers can only be cast to (uintptr_t). But anyway we have
%p for printing pointers.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o is there,
no need obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make it more obvious what .dts file was expected by the build system.
When adding support for a new board, I kept getting this error message,
assuming I passed a wrong DEVICE_TREE parameter.
However, what was really the mistake was that the entry in
`arch/arm/dts/Makefile` was missing, and u-boot didn't like not being
able to find the .dtb file that should have been produced.
Simply logging the expected .dtb file name should make it easier to spot
such mistakes.
Signed-off-by: Florian Klink <flokli@flokli.de>
When ESC/CTRL+C is pressed interrupt bootmenu and jump into U-Boot console.
As the last entry in bootmenu is always U-Boot console just choose the last
entry when ESC or CTRL+C is pressed.
ESC key is detected when either no other character appears after '\e'
within 10ms or when non-'[' appears after '\e'.
It is useful when bootmenu is part of boot process and you want to
interrupt boot process by scripts which control U-Boot (serial) console.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
A common use of memmove() can be handled by memcpy(). Also memcpy()
includes an optimization for large sizes: it copies a word at a time. So
we can get a speed-up by calling memcpy() to handle our move in this case.
Update memmove() to call also memcpy() if the source don't overlap
the destination (src + count <= dest).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
U-Boot DM model probe only single device at a time
which is enabled and configured using device tree
or platform data method.
PL011 UART IP is SBSA compliant and firmware does the
serial port set-up, initialization and let the kernel use
UART port for sending and receiving characters.
Normally software talk to one serial port time but some
LayerScape platform require all the UART devices enabled
in Linux for various use case.
Adding support to probe all enabled serial devices like SBSA
compliant PL011 UART ports probe and initialization by firmware.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Support a common method to probe all devices associated with uclass.
This includes data structures and code for finding the first device and
looping for remaining devices associated with uclasses (groups of devices
with the same purpose, e.g. all SERIAL ports will be in the same uclass).
An example is SBSA compliant PL011 UART IP, where firmware does the serial
port initialization and prepare uart device to let the kernel use it for
sending and reveiving the characters.SERIAL uclass will use this function
to initialize PL011 UART ports.
The feature is enabled with CONFIG_DM.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Remove the #if 0 present since the first version of console.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With our optimization settings the linker eliminates unused functions.
But for debugging it is better to compile with -Og or -O0. With -O0
compiling the sandbox fails due to the missing function fixup_cmdtable()
called by dm_reloc() and others.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the hash check fails on a loadable image, the SPL/TPL simply
jump to the next one. This commit changes this behaviour, when the
hash check fails on a loadable image, the function spl_load_simple_fit
stops and report an error.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There should be no need to insert non-printable characters
and this prevents line editing getting confused.
Signed-off-by: Steve Bennett <steveb@workware.net.au>
The previous patch made the table look bad. Fix it, and leave some
space for a future element being a bit longer than the current
maximum.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
When setting aside a GPT partition for holding the U-Boot environment,
having a partition type GUID [1] indicating "Linux filesystem" (as
most tools default to) is somewhat misleading - and there's no other
well-known type GUID that is better suited. So to have a canonical
value to put into the type field, define
3de21764-95bd-54bd-a5c3-4abe786f38a8
to mean a partition holding a U-Boot environment.
This is a v5 namespace-name GUID [2], generated [3] from a namespace
of "25cbcde0-8642-47c6-a298-1a3a57cd256b" and name "U-Boot
environment".
Should future type GUIDs be defined in the context of U-Boot, it's
sensible to use that same namespace GUID.
[1] https://en.wikipedia.org/wiki/GUID_Partition_Table#Partition_type_GUIDs
[2] https://en.wikipedia.org/wiki/Universally_unique_identifier#Versions_3_and_5_(namespace_name-based)
[3] https://www.uuidtools.com/v5
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
There's no reason to require an appropriately sized output parameter
for the string, that's error-prone should the table ever grow an
element with a longer string. We can just return the const char*
pointer directly.
Update the only caller accordingly, and get rid of pointless ifdeffery
in the header so that the compiler always sees a declaration and can
thus do type-checking, whether or not PARTITION_TYPE_GUID is enabled
or not.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
power/regulator will not be built if just CONFIG_SPL_DM_REGULATOR is
enabled. It needs CONFIG_SPL_POWER_SUPPORT to be enabled as well.
For example, if we just need a GPIO regulator in SPL:
CONFIG_DM_REGULATOR=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_DM_REGULATOR_GPIO=y
Will not suffice, since the entire regulator build for SPL depends on
CONFIG_SPL_POWER_SUPPORT. Elaborate that information in the Kconfig
dependency.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Align the prefix used in cmd_ut_category function and name of tests
for ut str.
This patch solves the issues detected by "make qcheck" after previous
patch.
Fixes: fdc79a6b12 ("lib: Add a function to convert a string to upper case")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the prefix used in cmd_ut_category function and name of tests
for ut mem.
This patch solves the issues detected by "make qcheck" after previous
patch.
Fixes: 550a9e7902 ("cmd: Update the memory-search command")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This test cannot work unless CONFIG_BLOBLIST is enabled. Update it to add
that condition.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This tests assumes it is running on sandbox. Add a few functions to handle
silencing the console on any board and use those instead.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add eMMC and GPT support.
- GPT partition list and command to create the GPT added to u-boot
environment
- eMMC boot commands added to u-boot environment
- new gpt commands (enumarate and setenv) that are used by broadcom
update scripts and boot commands
- eMMC specific u-boot configurations with environment saved in eMMC
and GPT support
Signed-off-by: Corneliu Doban <cdoban@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
[trini: Make gpt_setenv initialize ret to -1, given relevant return
error values]
Signed-off-by: Tom Rini <trini@konsulko.com>
During build of simple panel driver backlight is needed so let's enable
it:
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight':
u-boot/drivers/video/simple_panel.c:43: undefined reference to `backlight_set_brightness'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight':
u-boot/drivers/video/simple_panel.c:28: undefined reference to `backlight_enable'
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
The tests in test/lib/test_print.c fail without CONFIG_CONSOLE_RECORD=y.
Add a build dependency.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add MBR partition layout writing supporting, clean up code.
- A large number of assorted console/iomux cleanups
- A large number of board_r related cleanups.
- Log enhancements
Two sibling headings can never be the same.
Fix the heading levels.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a 'mbr' command to let users create or verify MBR partition layout
based on the provided text description. The partition layout is
alternatively read from the 'mbr_parts' environment variable. This can be
used in scripts to help system image flashing tools to ensure proper
partition layout.
The syntax of the text description of the partition list is similar to
the one used by the 'gpt' command. Supported parameters are: name
(currently ignored), start (partition start offset in bytes), size (in
bytes or '-' to expand it to the whole free area), bootable (boolean
flag) and id (MBR partition type). If one wants to create more than 4
partitions, an 'Extended' primary partition (with 0x05 ID) has to be
explicitely provided as a one of the first 4 entries.
Here is an example how to create a 6 partitions (3 on the 'extended
volume'), some of the predefined sizes:
> setenv mbr_parts 'name=boot,start=4M,size=128M,bootable,id=0x0e;
name=rootfs,size=3072M,id=0x83;
name=system-data,size=512M,id=0x83;
name=[ext],size=-,id=0x05;
name=user,size=-,id=0x83;
name=modules,size=100M,id=0x83;
name=ramdisk,size=8M,id=0x83'
> mbr write mmc 0
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Add a code for creating and writing MBR partition layout. The code generates
similar layout of EBRs (Exteneded Block Records) and logical volumes as
Linux's fdisk utility.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Make functions not used outside this file static.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[trini: Use __maybe_unused as there are cases they may not be used]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add some handy defines for some hardcoded magic numbers related to
extended partition handling.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
write_mbr_partition() function name is a bit misleading, so rename it to
write_mbr_sector(). This is a preparation for adding code for writing a
complete MBR partition layout.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Obviously the following has unnecessary indentation level in 'else' branch.
if (foo) {
...
return;
} else {
...
}
Drop indentation level by removing redundant 'else'.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Refactor iomux_doenv() a bit in order to increase readability.
There is no change in code generation on x86.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's realloc() 101 to avoid `foo = realloc(foo, ...);` call
due to getting a memory leak.
Actually it's not clear why realloc() has been used here.
If we shrink the array, the memcpy() overwrites it anyway
with the contents of a new array. If it becomes bigger,
same story.
Drop useless realloc() for good and thus preserve console list
in case of failed allocation.
Fixes: 16a28ef219 ("IOMUX: Add console multiplexing support.")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
search_device() is defined in console.c. Move its declaration
to an appropriate header file.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no need to call ->start() for already started device. All the same,
there is no need to call ->stop() for devices still in use.
For now enforce this only for IOMUX case.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the future we would like to stop unused consoles and
also add a reference counting to avoid imbalanced calls
to ->start() and ->stop() in some cases.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the helper function console_has_tstc() and replace the test
#if CONFIG_IS_ENABLED(CONSOLE_MUX) to a simple 'if' test to
respect the U-Boot coding rule.
No functional change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add helper functions to access to gd->console_out and gd->console_in
with membuff API and replace the #ifdef CONFIG_CONSOLE_RECORD test
by if (IS_ENABLED(CONFIG_CONSOLE_RECORD)) to respect the U-Boot
coding rule.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a new function to access to console_devices only defined if
CONFIG_IS_ENABLED(CONSOLE_MUX).
This path allows to remove #if CONFIG_IS_ENABLED(CONSOLE_MUX)
in console_getc function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove #ifdef or #ifndef for CONFIG when it is possible to simplify
the console.c code and respect the U-Boot coding rules.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
spl_handoff should only be enabled when CONFIG_HANDOFF is set. Drop the
nested ifdefs and check for CONFIG_HANDOFF instead.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_HANDOFF is used in u-boot proper to locate handoff info from SPL
during pre-relocation init (in setup_spl_handoff). Add explicit dependency
on CONFIG_SPL, to fix the following build error when CONFIG_HANDOFF &&
!CONFIG_SPL:
common/board_f.c: In function ‘setup_spl_handoff’:
common/board_f.c:283:4: error: ‘gd_t {aka struct global_data}’
has no member named ‘spl_handoff’
gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
^~
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to remove the arch-specific ifdefs around initr_trap, introduce
arch_initr_trap weak initcall. Implementations for ppc/m68k/mips have
been moved to arch/<arch>/lib/traps.c
Default implementation is a nop stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add a return value to bb_miiphy_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to api_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to jumptable_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to xen_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to noncached_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to pci_init and use it directly in the post-relocation
init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to pci_ep_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to post_output_backlog and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to cpu_secondary_init_r and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop initr_console_record wrapper and call console_record_init directly.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use IS_ENABLED(CONFIG_OF_EMBED) in instead of #ifdefs in reserve_fdt,
reloc_fdt functions.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
setup_bdinfo is used to populate various bdinfo fields, so move
setup_machine code there, as all it does is setting
gd->bd->bi_arch_number.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use IS_ENABLED(CONFIG_TIMER_EARLY) instead of #ifdef in initf_dm. Also,
move timer code to the main ifdef, so that ret is defined.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop initf_console_record wrapper and call console_record_init directly.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, the following #ifdef construct is used to check whether to run
console_record_init() during pre-relocation init:
defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Introduce CONFIG_CONSOLE_RECORD_INIT_F Kconfig option to get rid of the
complex ifdef check. Also, use IS_ENABLED() instead of #ifdef.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reduce the log overhead when the traces are filtered,
by moving the vsnprintf call from _log() to log_dispatch().
This patch avoids the printf treatment when LOG features is
activated, but trace is filtered, for example when
MAX_LOG_LEVEL=8 and LOG_DEFAULT_LEVEL=6.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a new test to check the content of the dropped messages
sent to console puts function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Allow to record the console output before before U-Boot
has a console ready.
This patch allows to test the console output in sandbox test
based on console record.
It is possible because GD_FLG_RECORD and GD_FLG_SERIAL_READY
are 2 independent flags.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reorder test on gd value and remove the duplicated test (!gd)
in putc and puts function.
This patch is a preliminary step for rework of this function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test for dropped trace before log_init, displayed by debug uart.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the console puts functions to output the traces before
the log initialization (when CONFIG_LOG is not activated).
This patch allows to display the first U-Boot traces
(with macro debug) when CONFIG_DEBUG_UART is activated
and not only drop them.
For example for traces in board_f.c requested by the macro debug,
when LOG_DEBUG is defined and CONFIG_LOG is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a new test to check the dropped messages when LOG is not ready
with log_drop_count and the result of _log().
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update _log function to drop any traces when log is yet initialized:
vsnprintf is no more executed in this case.
This patch allows to reduce the cost for the dropped early debug trace.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a check of the _log function with LOGL_FORCE_DEBUG flags,
used to force the trace display.
The trace should be displayed for all the level when flags
have LOGL_FORCE_DEBUG bit is set, for any filter.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Something was wrong in the merge process into the mainline.
Some added patches access driver structure fields and functions that
have been modified by previous patches.
The patch renames:
- dev_get_platdata to dev_get_plat
- dev_get_uclass_platdata to dev_get_uclass_plat
- ofdata_to_platdata to of_to_plat
- plat_data_alloc_size to plat_auto
- priv_auto_alloc_size to priv_auto
- video_uc_platdata to video_uc_plat
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The existing socfpgaimage always pads the image to the maximum size of
OCRAM size. This will break in the encryption flow where it expects the
image to be un-padded. The encryption tool will do the encryption for
the whole image and append the signature key at end of the image.
The signature key will append to beyond the size of OCRAM if the image
is padded with the maximum size before encryption.
Move the padding step from socfpgaimage to Makefile and pads with objcopy
command.
socfpgaimage will pad the image with 16 bytes aligned (including CRC word),
this is a requirement in encryption flow.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add CONFIG_SPL_PAD_TO for Gen5 and Arria 10. CONFIG_SPL_PAD_TO is set to
size of OCRAM.
This is preparation for image padding change in socfpgaimage.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Print image header information if the header is verified.
Example output from mkimage "-l" option:
$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type : Cyclone V / Arria V SoC Image
Validation word : 0x31305341
Version : 0x00000000
Flags : 0x00000000
Program length : 0x00003a59
Header checksum : 0x00000188
$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type : Arria 10 SoC Image
Validation word : 0x31305341
Version : 0x00000001
Flags : 0x00000000
Header length : 0x00000014
Program length : 0x000138e0
Program entry : 0x00000014
Header checksum : 0x00000237
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Booting Agilex and Stratix 10 with ATF support.
SPL now loads ATF (BL31), U-Boot proper and DTB from FIT
image. The new boot flow with ATF support is as follow:
SPL -> ATF (BL31) -> U-Boot proper -> OS (Linux)
U-Boot proper now starts at 0x200000 (CONFIG_SYS_TEXT_BASE).
ATF will occupy the address range starting from 0x1000.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Add binman node to device tree to generate the FIT image for u-boot
(u-boot.itb) and OS kernel (kernel.itb).
u-boot.itb contains arm trusted firmware (ATF), u-boot proper and
u-boot device tree for ATF u-boot flow.
kernel.itb contains Linux Image and Linux device tree.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
SPL already setup the Clock Manager with the handoff data
from OCRAM. When the Clock Manager's driver get probed again
in SSBL, it shall skip the handoff data access in OCRAM.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Since SSBL is running in DRAM, it shall setup the stack in DRAM
instead of OCRAM which is occupied by SPL and handoff data.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
In non-secure mode (EL2), FPGA reconfiguration driver calls the
SMC/PSCI services provided by ATF to configure the FPGA.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
In non-secure mode (EL2), Reset Manager driver calls the
SMC/PSCI service provided by ATF to enable/disable the
SOCFPGA bridges.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
In non-secure mode (EL2), MAC driver calls the SMC/PSCI services
provided by ATF to setup the PHY interface.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
In non-secure mode (EL2), MMC driver calls the SMC/PSCI services
provided by ATF to set SDMMC's DRVSEL and SMPLSEL.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change 'clksel' callback function to allow the code to return a
status.
This patch is a preparation for enabling Arm-Trusted-Firmware (ATF)
in Intel SoC FPGA. This patch does not change functionality.
When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock
related register is secure register which is required to be written
via SMC/PCSI call. It is possible that U-Boot fail to write the
register if there is unexpected error between U-Boot and ATF.
As a result, there maybe signal integrity on MMC connection due to
clock. So, the code should reports error to user when 'clksel' fail.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
This header file defines the Secure Monitor Call (SMC) message
protocol for ATF (BL31) PSCI runtime services. It includes all
the PSCI SiP function identifiers for the secure runtime services
provided by ATF. The secure runtime services include System Manager's
registers access, 2nd phase bitstream FPGA reconfiguration, Remote
System Update (RSU) and etc.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
invoke_smc() allow U-Boot proper running in non-secure mode (EL2)
to invoke SMC call to ATF's PSCI runtime services such as
System Manager's registers access, 2nd phase bitstream FPGA
reconfiguration, Remote System Update (RSU) and etc.
smc_send_mailbox() is a send mailbox command helper function which invokes
the ATF's PSCI runtime service (function ID: INTEL_SIP_SMC_MBOX_SEND_CMD)
to send mailbox messages to Secure Device Manager (SDM).
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Standard PSCI function "CPU_ON" provided by ATF is now used
by Linux kernel to bring up the secondary CPUs to enable SMP
booting in Linux on SoC 64bits platform.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Override 'lowlevel_init' to make sure secondary CPUs trapped
in ATF instead of SPL. After ATF is initialized, it will signal
the secondary CPUs to jump from SPL to ATF waiting to be 'activated'
by Linux OS via PSCI call.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Instead of loading u-boot proper image (u-boot.img), SPL
now loads FIT image (u-boot.itb) which includes u-boot
proper, ATF and u-boot proper's DTB.
For OS, u-boot now loads FIT images (kernel.itb) which
includes Linux Image and Linux's DTB.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Add board_fit_config_name_match() for matching board name with
device tree files in FIT image. This will ensure correct DTB
file is loaded for different board type. Currently, we are not
supporting multiple device tree files in FIT image therefore this
function basically do nothing for now.
Users are allowed to override this 'weak' function in their
specific board implementation.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Pull request for UEFI sub-system for efi-2021-04-rc1
In the UEFI sub-system:
* implement non-blocking file services
* print boot device and file path in helloworld.efi
* improve detection of boot device
* correct argument handling in efivar.py
* implement EFI_DT_FIXUP_PROTOCOL
Bug fixes:
* adjust conitrace command for low baud rates
* check that FIT images are valid FDTs
- Enable logging features for stm32mp15 boards
- Update MAINTAINERS emails for STI and STM32
- Activate OF_LIVE for ST stm32mp15 boards
- Switch to MCO2 for PHY 50 MHz clock for DHCOM boards
- Correction in stm32prog command on uart: always flush DFU on start command
- Update USB-C power detection algorithm on DK boards
- sync amlogic GX & AXG DT to Linux 5.10
- Add new MESON_EE driver support for GXBB & AXG
- Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards
- add driver for TDO tl070wsh30 panel driver
- meson: isolate loading of socinfo
- Add soc_rev to environment
- Enable G12A support for saradc
- Add correct mmcdev on VIM3(L) & Odroid-N2(C4)
- Read MAC from fuses for VIM3 & VIM3L boards
A previous series already update STMicroelectronics emails maintainers
but some files have been omitted (Makefile, .dts, .dtsi and .rst files).
Update Patrick and my email address with the one dedicated to upstream
activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove the test on data->dfu_seq, because dfu_seq=0 not only when
the DFU is not started (mask with 0xffff). This flush is mandatory
as the final treatment, common with USB, is done in DFU callback.
This patch avoids issue if the received length is a multiple of
the DFU packet.
For example if size of bootfs partition is egual to 0x4000000,
data->dfu_seq=0 at the end of the partition, the flush it not
requested and the phase is not increased in the callback.
U-Boot continue to request the bootfs in the next GetPhase command.
Fixes: 468f0508b5 ("stm32mp: stm32prog: add serial link support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Activate the live DT to reduce the DT parsing time.
For example the boot time is reduced by 200ms on STM32MP157C-EV1 board
for stm32mp15_basic_defconfig (boot with SPL) or
stm32mp15_trusted_defconfig (boot with TF-A).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The LAN8710i PHY currently uses 50 MHz clock direct from PLL4P.
To permit PLL4P to run at faster frequency, use MCO2 as a divider.
The PLL4P runs at 100 MHz, supplies MCO2 which divides it by 2 to
50MHz, and supplies the PHY with 50 MHz via pin PG2. The feedback
clock are fed back in via pin PA1.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ia9bf7119785d49b633a3ae761c3dc4a30b92628a
There shouldn't be a need to use loadables propertyn because u-boot can be
pointed by firmware property. This change should also speedup boot process
because loadables property is list of strings which code is going through.
On the other hand firmware can just point to one image.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
USB-C power supply which are Power Delivery compliant (USB-PD) are able
to provide different voltage/current (for example 5V/3A 9V/3A 12V/2.25A...)
In this case, the power supply need to negotiate the voltage/current to
use with the device using CC1/CC2 USB-C signals.
If this negotiation occurs during ADC measurement (done also on CC1/CC2
USB-C signals) some ADC acquisition can be corrupted which cause wrong
power supply current detection.
To avoid this, the power supply current detection algorithm is updated
as following:
- perform an ADC measurement, if a 3A current is detected, continue the
boot process.
- else, wait 20ms (max tPDDebounce duration) to ensure that USB-PD
negotiation is done and perform another ADC measurement.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate the logging features in SPL and U-Boot
(CONFIG_LOG and CONFIG_SPL_LOG) and the command 'log' with
CONFIG_CMD_LOG.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug/pr_* to log_* or dev_* macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug/pr_debug to log_debug or dev_dbg macro and
define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change pr_debug to log_debug or dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, use dev_ macro when it is possible.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, use dev_ macro when it is possible
and migrate other trace to log_ macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, change debug to dev_dbg and remove "%s:" __func__
header as it is managed by dev macro (dev->name is displayed)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY and remove unneeded pr_fmt macro with the dev
macro as dev->name is displayed and CONFIG_LOGF_FUNC can be
activated for log macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove dev->name as it is already displayed by dev macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to log macro and define LOG_CATEGORY.
Remove "%s:" with __func__ as it is managed by log macro
(CONFIG_LOGF_FUNC)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, change pr_debug to dev_dbg and remove "bsec:"
header as it is managed by log macro (dev->name is displayed)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The dtbdump.efi binary can already be used to dump the configuration table
with the device-tree to a file.
With this patch a device-tree file can be loaded. The EFI_DT_FIXUP_PROTOCOL
is called to
* apply U-Boot's fix-ups
* let U-Boot make memory reservations as required by the device-tree
* install the new device-tree as configuration table
In a next step this configuration table can be dumped.
A dtbdump.efi session would look like:
DTB Dump
========
=> load test.dtb
device-tree installed
=> save fixed-up.dtb
fixed-up.dtb written
=> exit
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A boot manager like GRUB can use the protocol to
* apply U-Boot's fix-ups to the a device-tree
* let U-Boot make memory reservations according to the device-tree
* install the device-tree as a configuration table
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At 9600 baud or less a 1 ms wait is too short to detect the end of an
escape sequence.
Increase the wait duration to 10 ms which will work down to 1200 baud.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In efi_mem_sort() adjacent memory regions of same type are coalesced.
Remove the remark "Merging of adjacent free regions is missing".
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We do not want to use typedefs in U-Boot.
Do not use efi_string_t in the EFI_TEXT_OUTPUT_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now the bootefi command used the last file loaded to determine the
boot partition. This has led to errors when the fdt had been loaded from
another partition after the EFI binary.
Before setting the boot device from a loaded file check if it is a PE-COFF
image or a FIT image.
For a PE-COFF image remember address and size, boot device and path.
For a FIT image remember boot device and path.
If the PE-COFF image is overwritten by loading another file, forget it.
Do not allow to start an image via bootefi which is not the last loaded
PE-COFF image.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
fit_check_format() must check that the buffer contains a flattened device
tree before calling any device tree library functions.
Failure to do may cause segmentation faults.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Let helloworld.efi print the device path of the boot device and the file
path as provided by the loaded image protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently when executing 'bootefi hello' we copy helloworld.efi to the
address identified by environment variable loadaddr. This is unexected
behavior for a user. There is no need to copy helloworld.efi before
executing it after relocation.
Remove the copy action.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When deleting a variable we must check that the GUID provided by the
user matches the GUID of the variable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
When tools: efivar.py is called without arguments an error occurs:
Traceback (most recent call last):
File "tools/efivar.py", line 380, in <module>
main()
File "tools/efivar.py", line 360, in main
args.func(args)
AttributeError: 'Namespace' object has no attribute 'func'
Show the online help if the arguments do not specify a function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
- DM support for OMAP PWM backlight
- USB host mode support for AM654
- Minor SPI fixes
- Add support k2g ice board with 1GHz silicon
- Fix GTC programming for K3 devices
First set of u-boot-atmel features for 2021.04 cycle
This feature set includes the new board SAMA7G5 EK, the new evaluation
kit for Microchip AT91 SAMA7G5 SoC . The current board support includes
two configurations for booting from eMMC (SDMMC0), SD-Card (SDMMC1), and
support for two Ethernet interfaces.
Fix reading built-in ethernet MAC address from efuse
NOTE: MAC is stored in ASCII format, 1bytes = 2characters by 0 offset
if mac from efuse not valid we use meson_generate_serial_ethaddr
NOTE: remake odroid-n2.c from Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Artem Lapkin <art@khadas.com>
[narmstrong: remove MAC print & spurious new endline]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
ARMv8's generic timer[1] picks up it's graycode from GTC. However,
the frequency of the GTC is supposed to be programmed in CNTFID0[2]
register prior to enabling the GTC in CNTCR[3] register.
In K3 architecture, GTC provides a central time to many parts of the
SoC including graycode to the generic timer in the ARMv8 subsystem.
However, due to the central nature and the need to enable the counter
early in the boot process, the R5 based u-boot enables GTC and
programs it's frequency based on central needs of the system. This
may not be a constant 200MHz based on the system. The bootloader is
supposed to program the FID0 register with the correct frequency it
has sourced for GTC from the central system controller OR from PLLs
as appropriate, and TF-A is supposed[4] to use that as the frequency for
it's local timer.
Currently we are programming just the CNTCR[3] register to enable the
GTC, however we dont let TF-A know the frequency that GTC is actually
running at. A mismatch in programmed frequency and what we program for
generic timer will, as we can imagine, all kind of weird mayhem.
So, program the CNTFID0 register with the clock frequency. Note:
assigned-clock-rates should have set the clock frequency, so the only
operation we need to explicitly do is to retrieve the frequency and
program it in FID0 register.
Since the valid in K3 for GTC clock frequencies are < U32_MAX, we can
just cast the ulong and continue.
[1] https://developer.arm.com/documentation/100095/0002/generic-timer/generic-timer-register-summary/aarch64-generic-timer-register-summary
[2] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntfid0
[3] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntcr
[4] 6a22d9ea3c
Signed-off-by: Nishanth Menon <nm@ti.com>
This patch adds a new test which checks that U-Boot for Nokia RX-51 running
in qemu can print test line to serial console and also checks that test
line appeared on qemu serial console.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Those two commands now doing same thing, reading from ext2/3/4 filesystem.
So remove useless duplicated call.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
With support for other clock drivers, the potentially supported CDCE913
device can no longer be probed without specifying its DT node name.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The schedule for deprecating the features of the pre-driver-model puts
2019.17 as the deadline for the video subsystem. Furthermore, the latest
patches applied to the am335x-fb.c module have decreased the amount of
code shared with the pre-driver-model implementation. Splitting the two
implementations into two modules improves the readability of the code
and will make it easier to drop the pre-driver-model code.
I have not created a header file with the data structures and the
constants for accessing the LCD controller registers, but I preferred to
keep them inside the two c modules. This is a code replication until the
pre-driver-model version is dropped.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The patch configures the display DPLL using the functions provided by
the driver model API for the clock. The device tree contains everything
needed to get the DPLL clock. The round rate function developed for
calculating the DPLL multiplier and divisor and the platform routines
for accessing the DPLL registers are removed from the LCD driver code
because they are implemented inside the DPLL clock driver.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Enabling the domain clock is performed by the sysc interconnect target
module driver during the video device probing.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The previous version of am335x-fb.c contained the functionalities of two
drivers that this patch has split. It was a video type driver that used
the same registration compatible string that now registers a panel type
driver. The proof of this is that two compatible strings were referred
to within the same driver.
There are now two drivers, each with its own compatible string,
functions and API.
Furthermore, the panel driver, in addition to decoding the display
timings, is now also able to manage the backlight.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch adds a function to get display timings from the device tree
node attached to the device.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The TI PWMSS driver is a simple bus driver for providing clock and power
management for the PWM peripherals on TI AM33xx SoCs, namely eCAP,
eHRPWM and eQEP.
For DT binding details see Linux doc:
- Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Enhanced high resolution PWM module (EHRPWM) hardware can be used to
generate PWM output over 2 channels. This commit adds PWM driver support
for EHRPWM device present on AM33XX SOC.
The code is based on the drivers/pwm/pwm-tiehrpwm.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The prescaler (PTV) setting must be taken into account even when the
timer input clock frequency has been set.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The __of_translate_address routine translates an address from the
device tree into a CPU physical address. A note in the description of
the routine explains that the crossing of any level with
since inherited from IBM. This does not happen for Texas Instruments, or
at least for the beaglebone device tree. Without this patch, in fact,
the translation into physical addresses of the registers contained in the
am33xx-clocks.dtsi nodes would not be possible. They all have a parent
with #size-cells = <0>.
The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.
The patch acts conservatively on address translation, except for
removing a check within the of_translate_one function in the
drivers/core/of_addr.c file:
+
ranges = of_get_property(parent, rprop, &rlen);
- if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
- debug("no ranges; cannot translate\n");
- return 1;
- }
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("empty ranges; 1:1 translation\n");
There are two reasons:
1 The function of_empty_ranges_quirk always returns false, invalidating
the following if statement in case of null ranges. Therefore one of
the two checks is useless.
2 The implementation of the of_translate_one function found in the
common/fdt_support.c file has removed this check while keeping the one
about the 1:1 translation.
The patch adds a test and modifies a check for the correctness of an
address in the case of enabling translation also for zero size cells.
The added test checks translations of addresses generated by nodes of
a device tree similar to those you can find in the files am33xx.dtsi
and am33xx-clocks.dtsi for which the patch was created.
The patch was also tested on a beaglebone black board. The addresses
generated for the registers of the loaded drivers are those specified
by the AM335x reference manual.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch moves the clk-ti-sci.c file to the 'ti' directory along with
all the other TI's drivers, and renames it clk-sci.c.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
This minimal driver is only used to bind child devices.
For DT binding details see Linux doc:
- Documentation/devicetree/bindings/arm/omap/prcm.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Until now the clkctrl clocks have been enabled/disabled through platform
routines. Thanks to this patch they can be enabled and configured directly
by the probed devices that need to use them.
For DT binding details see Linux doc:
- Documentation/devicetree/bindings/clock/ti-clkctrl.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Up till this commit passing NULL as input parameter was allowed, but not
handled properly. When a NULL parameter was passed to the function a data
abort was raised.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch adds support for TI gate clock binding. The code is based on
the drivers/clk/ti/gate.c driver of the Linux kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/gate.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The patch adds support for TI divider clock binding. The driver uses
routines provided by the common clock framework (ccf).
The code is based on the drivers/clk/ti/divider.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/divider.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The digital phase-locked loop (DPLL) provides all interface clocks and
functional clocks to the processor of the AM33xx device. The AM33xx
device integrates five different DPLLs:
* Core DPLL
* Per DPLL
* LCD DPLL
* DDR DPLL
* MPU DPLL
The patch adds support for the compatible strings:
* "ti,am3-dpll-core-clock"
* "ti,am3-dpll-no-gate-clock"
* "ti,am3-dpll-no-gate-j-type-clock"
* "ti,am3-dpll-x2-clock"
The code is loosely based on the drivers/clk/ti/dpll.c drivers of the
Linux kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/dpll.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The driver manages a register-mapped multiplexer with multiple input
clock signals or parents, one of which can be selected as output. It
uses routines provided by the common clock framework (ccf).
The code is based on the drivers/clk/ti/mux.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/mux.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
It returns the rate which will be set if you ask clk_set_rate() to set
that rate. It provides a way to query exactly what rate you'll get if
you call clk_set_rate() with that same argument.
So essentially, clk_round_rate() and clk_set_rate() are equivalent
except the former does not modify the clock hardware in any way.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
There have been several changes to the am33xx.dtsi, so this patch
re-syncs it with Linux.
Let's add proper interconnect hierarchy for l4 interconnect instances
with the related ti-sysc interconnect module data as documented in
Documentation/devicetree/bindings/bus/ti-sysc.txt of the Linux kernel.
With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to their
proper location and enable probing using ti-sysc.
The am33xx-clock.dtsi file is the same as that of the Linux kernel,
except for the reg property of the node l4-wkup-clkctrl@0.
As for the am33xx.dtsi file, all the devices with drivers not yet
implemented and those I was able to test with this patch have been moved
to am33xx-l4.dtsi. In case of any regressions, problem devices can be
reverted by moving them back and removing the related interconnect
target module node.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
We can handle the sysc interconnect target module in a generic way for
many TI SoCs. Initially let's just enable domain clocks before the
children are probed.
The code is loosely based on the drivers/bus/ti-sysc.c of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/bus/ti-sysc.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add support for PRUSS SYSC type:
The PRUSS module has a SYSCFG which is unique. The SYSCFG has two
additional unique fields called STANDBY_INIT and SUB_MWAIT in addition
to regular IDLE_MODE and STANDBY_MODE fields. Add the bindings for this
new sysc type.
Add support for MCAN on dra76x:
The dra76x MCAN generic interconnect module has a its own format for the
bits in the control registers.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Export routines that can be used by other drivers avoiding duplicating
code.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
As more and more LINUX drivers are modified to use asynchronous probing
instead of synchronous probing, relying on device names being equal in
U-Boot and LINUX is not possible anymore. This is also true for block
device names like mmc0, mmc1 ect.
With LINUX kernel commit a1a4891 the probing type for the sdhci-omap
driver has been set to asynchronous mode too (probe_type is now
PROBE_PREFER_ASYNCHRONOUS).
In the case of the PDU001 board this results in the devices mmc0 and
mmc1 being swapped between U-Boot and LINUX. Device mmc0 in U-Boot
becomes mmc1 in LINUX an vice versa. Hence using device name identifiers
with LINUX kernel parameter root does not work anymore.
This patch changes the LINUX kernel boot parameter root to use the
pseudo (since we use MBR not GPT) partition UUID to locate the partition
hosting the root file system.
Signed-off-by: Felix Brack <fb@ltec.ch>
Update the ddr settings to use the DDR reg config tool rev 0.5.0.
This enables 4266MTs DDR configuration.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
McSPI IP provides per CS specific speed and mode selection. Therefore it
is possible to apply these settings only after CS is known. But
set_speed and set_mode can be called without bus being claimed, this
would lead driver to set up wrong CS (or previously used CS).
Fix this by apply set_speed and set_mode only if bus is already claimed.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
struct ti_qspi_priv->max_hz is declared as unsigned int, so the following
error path check will always be false, even when "spi-max-frequency"
property is invalid/missing:
priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1);
if (priv->max_hz < 0) {
...
}
Replace the fdtdec call with dev_read_u32_default() and use 0 as the
default value. Error out if max_hz is zero.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
The value of input pin for bank > 0 is always 0 for input subcommand.
The reason is that gpio_bank variable is computed only for invert and
output subcommands (it depends on number of arguments). The default
value of zero causes to shift the mask away for banks > 0.
Please note that info subcommand works as expected, because the input
pin values are accessed differently.
Fixes: 61c1775f16 ("gpio: tca642x: Add the tca642x gpio expander driver")
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tomas Novotny <tomas@novotny.cz>
In include/dfu.h, if CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then it is
defined as CONFIG_SYS_DFU_DATA_BUF_SIZE. This is 128 KiB for a53 core and
20 KiB for r5 core. If a larger file is transferred using dfu then it
fails.
CONFIG_SYS_DFU_DATA_BUF_SIZE can not be increased as there is not enough
heap memory to be allocated for the buffer in case of R5 spl.
Fix this by defining CONFIG_SYS_DFU_MAX_FILE_SIZE as the default
CONFIG_SYS_DFU_DATA_BUF_SIZE value.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The sequence number assigned for USB subsystem in a uclass is dependent on
the order of occurrence in the device tree. If the dr_mode of USB3SS0
controller is varied then the sequence number of USB3SS1 controller also
changes. If aliases are added then sequence numbers are assigned using the
alias number. This makes the sequence number of USB3SS1 controller
independent of USB3SS0 controller's dr_mode.
Therefore, add aliases to fix the sequence number assigned to the USB
subsystems.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
It has been observed that setting SERDES0 lane mux to USB prevents USB 2.0
operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is used in
USB 2.0 only mode solves this issue. However, for USB3.0+2.0 operation this
issue is not present.
Implement this workaround by writing 1 to LANE_FUNC_SEL field in
CTRLMMR_SERDES0_CTRL register.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
- Pinecube board support
- 64-bit FEL support
- mkimage support for eGON images (superseding mksunxiboot)
- Bluetooth BD address generation
- some fixes
Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
ship with the controller default address.
Add a config option to fix it up so it can function properly.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Ondrej Jirman <megous@megous.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[rebased]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that in rare cases, current analytical approach to detect
correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
with DDR3, incorrect DRAM configuration triggers write leveling error
which immediately stops initialization process. Exact reason why this
error appears isn't known. However, if correct configuration is used,
initalization works without problem.
In order to fix this issue, simply try another configuration when any
kind of error appears during initialization, not just those related to
rank and bus width.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Tested-by: Thomas Graichen <thomas.graichen@googlemail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For the sake of consistency (*) and order of initialization, i.e.
after we have got the ethernet address, interrupt and timer initialized,
try to initialize USB ethernet gadget.
*) for example, zynqmp uses same order.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far we did not support the BootROM based FEL USB debug mode on the
64-bit builds for Allwinner SoCs: The BootROM is using AArch32, but the
SPL runs in AArch64.
Returning back to AArch32 was not working as expected, since the RMR
reset into 32-bit mode always starts execution in the BootROM, but not
in the FEL routine.
After some debug and research and with help via IRC, the CPU hotplug
mechanism emerged as a solution: If a certain R_CPUCFG register contains
some magic, the BootROM will immediately branch to an address stored in
some other register. This works well for our purposes.
Enable the FEL feature by providing early AArch32 code to first save the
FEL state, *before* initially entering AArch64.
If we eventually determine that we should return to FEL, we reset back
into AArch32, and use the CPU hotplug mechanism to run some small
AArch32 code snippet that restores the initially saved FEL state.
That allows the normal AArch64 SPL build to be loaded via the sunxi-fel
tool, with it returning into FEL mode, so that other payloads can be
transferred via FEL as well.
Tested on A64, H5 and H6.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Priit Laes <plaes@plaes.org> (on Olimex A64-Olinuxino)
The is_boot0_magic macro is missing parentheses around the macro
argument, breaking any usage with a more complex argument.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Switch the SPL boot image generation from using mksunxiboot to the new
sunxi_egon format of mkimage.
Verified to create identical results for all 152 Allwinner boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Samuel Holland <samuel@sholland.org>
So far we used the separate mksunxiboot tool for generating a bootable
image for Allwinner SPLs, probably just for historical reasons.
Use the mkimage framework to generate a so called eGON image the
Allwinner BROM expects.
The new image type is called "sunxi_egon", to differentiate it
from the (still to be implemented) secure boot TOC0 image.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
To be able to easily share the Allwinner eGON BROM header structure
between the tools and the SPL code, move the struct definition into a
separate header file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
PineCube is an IP camera development kit released by Pine64.
It comes with the following compoents:
- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
Ethernet port and FPC connectors for camera and daughter board.
- An OV5640-based camera module which is connected to the parallel CSI
bus of the mainboard.
- A daughterboard with several buttons, a SD slot, some IR LEDs, a
microphone and a speaker connector.
As the device tree is synchronized in a previous commit, just add it to
Makefile, create a new MAINTAINER item and provide a defconfig.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Detect eMMC or SD card boot on Odroid-C4/N2 and Khadas VIM3(l) boards and
report proper MMC device for the environment loading code. This allows to
automatically load and store environment variables on the FAT partition
or RAW offset of the MMC device without the need to use different
configurations on eMMC and SD card.
To use this feature with environment stored on FAT partition, one has to
specify an empty device part (i.e. ":1" for the first partition) in
CONFIG_ENV_FAT_DEVICE_AND_PART to let the code to set the device to the
value returned by mmc_get_env_dev() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a defconfig for the Beelink GT-King Pro Android STB, which is based
on the Amlogic W400 reference design.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a defconfig for the Beelink GT-King Android STB, which is based
on the Amlogic W400 reference design.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Import the Beelink GT-King/Pro and supporting meson-g12b-w400.dtsi file
from Linux 5.10.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Analog to Digital Converter device (Meson SARADC) will be used for
probing 'Function' button state.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[narmstrong: also updated khadas-vim3l_defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The driver skips hardware initialization if it is already configured by
the earlier bootloader stage (BL30). Skip the initialization only if the
hardware is really initialized and enabled.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Update the device matrix and add build instructions.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2.rst to q200 MAINTAINERS and added blank lines to fix build]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a config for the WeTek Core2, largely based on the VIM2 config.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2_defconfig to q200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Import the WeTek Core2 and supporting meson-gx-p23x-q20x.dtsi files
from Linux 5.10.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for the Amlogic based libretech cc version 2.
As version 1, it is based on the s905x SoC.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: Fixed libretech-cc.rst bullet points]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Sync the libretech cc v2 device tree from Linux v5.10-rc1
commit 3650b228f83a ("Linux 5.10-rc1")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Linux 5.10-rc1 uses the new generic driver, so switch to it since GXBB and
later is now supported.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.
In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.
With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.
When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.
As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffd.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The usage of the preboot feature is now controlled via a separate Kconfig
option - namely CONFIG_USE_PREBOOT.
It must be enabled for preboot code executing commands now defined in
CONFIG_PREBOOT (also moved to the Kconfig).
After defining both CONFIG_USE_PREBOOT and CONFIG_PREBOOT in
imx28_xea_defconfig the define of CONFIG_PREBOOT shall be removed from
xea.h as it is redundant.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
enabled.
To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
disable pull UPs on both.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Obtain two MAC addresses from the two EEPROMs and configure the two
available Ethernet interfaces accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add node for flx1 i2c1 subnode (and alias to bus 0)
This bus has two eeprom devices connected.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add new config for storing environment from sdmmc0.
Also clean-up sama7g5ek_emmc1 to point to the proper mmc device.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Clean-up boot command to use the predefined device and part for FAT
environment.
According to this device and partition, select the proper boot media.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Enable sdmmc0 on this board. A non-removable eMMC is connected on this
block.
Configure pincontrol accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SDMMC1 requires clock specification with assigned-clocks, such that
the PMC will know which parent to assign and the initial start-up frequency.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Get rid of software defined MCK and switch to PMC bindings
for IPs currently present in device tree.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
As highlighted by Stefan in the commit e074d0f79b ("arm: at91:
gardena-smart-gateway-at91sam: Enable CONFIG_SYS_NAND_USE_FLASH_BBT")
it's important to use BBT when Linux enables it. We use it for a long
time on all our boards.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
Xilinx changes for v2021.04
arm64:
- DT updates
microblaze:
- Add support for NOR device support
spi:
- Fix unaligned data write issue
nand:
- Minor code change
xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards
video:
- Add support for seps525 spi display
tools:
- Minor Vitis file support
cmd/common
- Minor code indentation fixes
serial:
- Uartlite debug uart initialization fix
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
Some of these tests don't actually check anything. Add a few more checks
to complete the tests.
Also add a simple scan test that does the basics.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the tests related to scanning into their own class, updating them
to avoid using dtb_platdata as a pass-through.
Signed-off-by: Simon Glass <sjg@chromium.org>
Before expanding the scanning features any more, move this into a separate
file. This will make it easier to maintain in the future. In particular,
it reduces the size of dtb_platdata.py and allows us to add tests
specifically for scanning, without going through that file.
The pieces moved are the Driver class, the scanning code and the various
naming functions, since they mostly depend on the scanning results.
So far there is are no separate tests for src_scan. These will be added
as new functionality appears.
This introduces no functional change.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has not been needed since parent information was added and we started
using indicies for references to other drivers instead of pointers. It was
kept around in the expectation that it might be needed later.
However with the latest updates, it doesn't seem likely that we'll need
this in the foreseeable future.
Drop dm_populate_phandle_data() from dtoc and driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Previously we had to worry about nodes being output before those that they
depended on, thus causing build errors. So the current algorithm is
careful to output nodes in the right order.
We now use a different method for outputting phandles that does not
involve pointers. Also we plan to add a 'declarations' header file to
declare all drivers as 'extern'.
Update the code to drop the dependency checking and output in a simple
loop. This makes the output easier to follow since drivers are in order of
thier indices (0, 1, ...), which is also the order it appears in in the
linker list.
Signed-off-by: Simon Glass <sjg@chromium.org>
The base directory of U-Boot, where the source is, it currently calculated
from the directory of the dtb_platdata.py script. If this is installed
elsewhere that will not work. Also it is inconvenient for tests.
Add a parameter to allow specifying this base directory.
To test this, pass a temporary directory with some files in it and check
that they are passed to scan_driver().
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than the if/else construct, update OutputFile with the method to
call to process each command. This is easier to maintain as the number of
commands increases.
Rename generate_tables to generate_plat since it better describes what is
being generated ('plat' is the U-Boot name for platform data).
With this, each output method needs to have the same signature. Store the
output structures in a member variable instead of using parameters, to
accomplish this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use this new name to be consistent with the rest of U-Boot, which talks
about 'plat' for the platform data, which is what this file holds.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is currently fairly obvious what the two generated files are for, but
this will change as more are added. It is helpful for readers to describe
the purpose of each file.
Add a header commment field to OutputFile and use it to generate a comment
at the top of each file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the standard function for running tests and reported results. This
allows the tests to run in parallel, which is a significant speed-up on
most machines (e.g. 4.5 seconds -> 1.5s on mine).
Signed-off-by: Simon Glass <sjg@chromium.org>
This gives a warning in some situations:
File "tools/dtoc/../concurrencytest/concurrencytest.py", line 95,
in do_fork
stream = os.fdopen(c2pread, 'rb', 1)
File "/usr/lib/python3.8/os.py", line 1023, in fdopen
return io.open(fd, *args, **kwargs)
RuntimeWarning: line buffering (buffering=1) isn't supported in binary
mode, the default buffer size will be used
Fix this by dropping the line-buffer parameter.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but
in every other case we just use DM_. Update the alias macros to use the
DM_ prefix.
We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro
is widely used and there is at least some benefit to indicating it us a
U-Boot driver, particularly for code ported from Linux. So for now, let's
keep that name.
Signed-off-by: Simon Glass <sjg@chromium.org>
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not get a device (struct udevice *) but a struct driver_info *
so the name is confusing.
Rename it accordingly. Since we plan to have several various of these
macros, put GET at the end instead of the middle, so it is easier to spot
the related macros.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.
The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)
It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.
Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the Makefile to run dtoc only once, generating all required files.
This saves time since there is a lot of processing in each invocation of
dtoc.
We already have a variable for the object files to build, so use that
instead of repeating the same filenames. Add a C version of this also,
for the same reason.
This makes it easier to add new C files (generated by dtoc) to the build
later, as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
With upcoming changes, dtoc will output several files for different
of-platdata components.
Add a way to output all ava!ilable files at once ('all'), to the
appropriate directories, without needing to specify each one invidually.
This puts the commands in alphabetical order, so update the tests
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Implement the 'output directory' feature, allowing dtoc to write the
output files separately to the supplied directories. This allows us to
handle the struct and platdata output in one run of dtoc.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dtoc writes only a single file on each invocation. U-Boot
writes the two files it needs by separate invocations of dtoc. Since dtoc
now scans all U-Boot driver source, this is fairly slow (about 1 second
per file).
It would be better if dtoc could write all the files at once.
In preparation for this, add a way to specify an output directory for the
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally dtoc outputs to a file but it also offers a way to write output
to stdout. At present the test for that does not actually check that the
output is correct. Add this to the test.
This uses a member variable to hold the expected text, so it can be used
in muitiple places.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dtoc uses '-' internally to mean that output should go to
stdout. This is not necessary and None is more convenient. Update it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the uclass list head is in global_data. This is convenient
but with the new of-platdata we need the list head to be declared by
the generated code.
Change this over to be a pointer. Provide a 'static' version in
global_data to retain the current behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the code related to scanning for devices to bind, into a new
function. This will make it easier to skip this step with the new
of-platdata improvements.
Signed-off-by: Simon Glass <sjg@chromium.org>
To avoid having people accidentally access this member, add a trailing
underscore. Also remove it when of-platdata is enabled, since it is not
used.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have two functions which do the same thing. Standardise on
dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in
normal operation: it is either null or missing.
Also move the functions into one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present flags are stored as part of the device. In preparation for
storing them separately, change the access to go through inline functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that the sequence-numbering migration is complete, rename this member
back to seq_, adding an underscore to indicate it is internal to driver
model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add a new function to handle the allocation of private/platform data for
a device. This will make it easier to skip this feature when using the new
of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some devices are not needed in SPL/TPL. For TPL this causes the
generation of unnecessary of-platadata structs. Make some adjustments to
fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver calls malloc() to start a new platform data
structure, fills it in and tells driver model to use it.
We want to avoid malloc, particularly with the new version of of-platdata.
Create a new struct which encompasses both the dtd struct and the ns16550
one, to avoid this. Unfortunately we must copy the data into the right
place for the ns16550 driver. Add some comments about this.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them and add the dtd struct too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
This construct effectively uses struct spi_nor due to a #define in
spi-nor.h so we may as well use that struct here. This allows dtoc to
parse it correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
The #define of one struct to another has been around for a while. It
confuses dtoc and makes it think that struct spi_flash does not exist.
Make a few changes to improve things while we wait for migration to be
completed:
- Move the 'struct spi_flash' to column 1 so dtoc scans it
- Remove the #define when compiling dt-platdata.c
- Update the strange mtd_get/set_of_node() functions
- Use struct spi_nor in the drivers, so dtoc sees the correct struct
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is a bit odd in that it only reads and updates the livetree
version of the device ofnode. This means it won't work with flattree.
Update the code to work as it was presumably intended.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are require a few devices in the devicetree which are
not actually used in SPL. This will cause problems with the new
of-platdata, since it will try to instantiate devices which are not
compiled into U-Boot.
Update the devicetree to remove these devices from SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver does not have a compatible string. For it to be
used with the coming of-platadata, it must have one. Update it
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this struct into a header file so that dtoc can include it in its
dt-platdata.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Update management of "--rm_memory" sandbox's option and force
this option when U-Boot is loaded by SPL in os_spl_to_uboot()
and remove the ram file after reading in main() as described
in option help message: "Remove memory file after reading".
This patch avoids that the file "/tmp/u-boot.mem.XXXXXX" [created in
os_jump_to_file() when U-Boot is loaded by SPL] is never deleted
because state_uninit() is not called after U-Boot execution
(CtrlC or with running pytest for example).
This issue is reproduced by
> build-sandbox_spl/spl/u-boot-spl
and CtrlC in U-Bot console
> make qcheck
One temp file is created after each SPL and U-Boot execution
(7 tims in qcheck after test_handoff.py, test_ofplatdata.py,
test_spl.py execution).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These errors are only really for development purposes. Drop them to reduce
the size of TPL. The error numbers are still reported.
This reduces the TPL binary size on coral by about 160 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.
This reduces the TPL binary size by about 608 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present several strings from this file appear in the TPL binary. Add
preprocessor checks to drop them.
This reduces the TPL binary size by about 128 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these settings are in the node for host-bridge and so are
visible in TPL as well as SPL. But they are only used for SPL.
Move them to a subnode so that TPL does not included them.
Signed-off-by: Simon Glass <sjg@chromium.org>
When this code is not used (e.g. by TPL) we want it to be excluded from
the image. Put it in its own section so that this happens.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this member holds a simple list of driver names. Update it to
be a dict of DriverInfo, with the name being the key. This will allow more
information to be added about each driver, in future patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reduce the length of output_node() futher by moving the struct-output
functionality into a two separate functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is annoying to have this function inside its parent since it makes the
parent longer and hard to read. Move it to the top level.
Signed-off-by: Simon Glass <sjg@chromium.org>
These have crept in again. Update the file to fix all but these ones:
dtb_platdata.py:143:0: R0902: Too many instance attributes (10/7)
(too-many-instance-attributes)
dtb_platdata.py:713:0: R0913: Too many arguments (6/5)
(too-many-arguments)
Signed-off-by: Simon Glass <sjg@chromium.org>
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.
A few adjustments are needed so this driver can build for sandbox_spl as
well.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the entire test state is effective passed into a test driver
just to record which device was removed. This is unnecessary and makes it
harder to track what is going on.
Use a simple boolean instead.
Also drop the unused 'removed' member while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This error should not happen in normal use. Reduce the length of it to
save space in the image.
Add an empty spl.h file to sh since it appears to lack this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to include spl.h in on these architectures
since the asm/spl.h file is not present. We want to be able to use the
spl_phase() function, so add empty headers to make things build.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are supposed to be private to driver model, not accessed by any code
outside. Add a trailing underscore to indicate this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use these functions in the core code as much as possible. With this, there
are only two places where each priv/plat pointer is accessed, one for read
and one for write.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most drivers use these access methods but a few do not. Update them.
In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Add functions so this information is not accessed directly. This will be
needed for of-platdata which stores it in a different place.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code was kept around after of-platdata started supporting parent
devices. That feature seems stable now, so let's drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the name 'uclass_driver' is used for the uclass linker list.
This does not follow the convention of using the struct name. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the output from this function is hard to read in SPL, due to
(intended) limitations in SPL's printf() function. Add an SPL version so
it is clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses up space in the SPL binary but it always starts as zero. Also
some boards cannot support data in TPL (e.g. Intel Apollo Lake).
Use malloc() to allocate this structure instead, by moving the init a
little later, after malloc() is inited. Make this function optional since
it pulls in malloc().
This reduces the TPL binary size on coral by about 64 bytes
Signed-off-by: Simon Glass <sjg@chromium.org>
The spl-test4 node deliberately has an invalid compatible string. This
causes a warning from dtoc and the check it does is not really necessary.
Drop it, to avoid the warning and associated confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Lower case should be used for function names. Update this driver and its
callers accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Typedefs should not be used in U-Boot and structs should be lower case.
Update the code to use struct ns16550 consistently.
Put a header guard on the file while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present the dtoc commmand line is repeated twice in the Makefile. Use a
variable to avoid this, so it is easier to add more conditional arguments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the SPL_NAME variable to simplify the rules. Drop the SPL targets
clean-files since the SPL and TPL dts/ directories are removed by
existing rules. Move the SPL rules into a new spl_dtbs to avoid the
complicated $(if) construct.
Also drop unused pieces from the 'targets' variable.
With this, SPL and TPL have separate dtbs which respect the various
u-boot,dm-spl / u-boot,dm-tpl tags.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than putting these in the top-level dts/ directory (which is
intended for U-Boot proper), put them in the correct subdirectory for
SPL (either spl/ or tpl/). This is where other SPL targets are kept,
so this is more consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present both SPL and TPL use the same devicetree binary. While there
is logic to run fdtgrep separately on each one, it does not actually
happen.
Add a new TPL rule and use that instead. Make this rule conditional on
there actually being a TPL. Do the same for SPL for consistency.
Note that the SPL and TPL dtbs are build by a Makefule rule used for
U-Boot proper. This is the 'dtbs' target in dts/Makefile. So the check
for CONFIG_TPL_BUILD in cmd_fdtgrep never actually works at present.
We don't support CONFIG_OF_EMBED for TPL at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
It looks like that i2c bus lot of times timeout on some units. Prior
migration to CONFIG_DM_I2C i2c speed was set to CONFIG_SYS_OMAP24_I2C_SPEED
value which was 100000. Lower speed fixes timeout problems, so change speed
back to its previous value.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 8d8c181703 ("Nokia RX-51: Convert to CONFIG_DM_I2C")
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Support reusing board_fit_config_name_match() to automatically
select a sensible default configuration for booting fitImages
using 'bootm'.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Replace most #ifdef checks for USE_HOSTCC and CONFIG_*
with normal if instructions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is a need to call sync when anybody asking for clearing display.
For example via cls command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display
using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB
160x128 display. This driver has been tested through zynq-spi driver.
ZynqMP> load mmc 1 100000 rainbow.bmp
61562 bytes read in 20 ms (2.9 MiB/s)
ZynqMP> bmp info 100000
Image size : 160 x 128
Bits per pixel: 24
Compression : 0
ZynqMP> bmp display 100000
ZynqMP> setenv stdout vidconsole
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some drivers like LCD connected via SPI requires explicit sync function
which copy framebuffer content over SPI to controller to display.
This hook doesn't exist yet that's why introduce it via video operations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch is preparation for follow up one to support cases where
synchronization can fail.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Place description below function parameters to make kernel-doc stript
happy. Also rename dev to vid to be aligned with function parameters.
Fixes: 1acafc73bf ("dm: video: Add a video uclass")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building xilinx_zynq_virt_defconfig fails on origin/next as reported by
GCC 10.2 (as provided by Debian Bullseye):
CC board/xilinx/common/fru_ops.o
board/xilinx/common/fru_ops.c: In function ‘fru_capture’:
board/xilinx/common/fru_ops.c:173:8:
error: array subscript 284 is outside array bounds of
‘struct fru_table[1]’ [-Werror=array-bounds]
173 | limit = data + sizeof(struct fru_board_data);
| ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
board/xilinx/common/fru_ops.c:17:18: note: while referencing ‘fru_data’
17 | struct fru_table fru_data __section(.data);
| ^~~~~~~~
When using sizeof(struct fru_board_data) to find the end of the structure
you should add it to the start of the structure.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This sort of code does not make much sense:
if (ondie_ecc_enabled) {
if (ondie_ecc_enabled) {
Remove the inner if.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch add ethernet node gem1 to zcu1285 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch add ethernet node gem1 to zcu1275 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commits add a check on the command ubi rename. This check avoids
to rename a volume to with a name that is already used on another ubi
volume. If two volumes has the same name, then the ubi device can't be
mounted anymore.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
My address at Toradex doesn't exist anymore, map this address
to my personal email.
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There might be hardware configurations where 64-bit data accesses
to NVMe registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit NVMe registers, similarly as it is done in Linux kernel.
This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC
based board, where the PCIe Root Complex, which is attached to the
system through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
nvme_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail
probing.
This fix is analogous to commit 8e2ab05000 ("usb: xhci: Use only
32-bit accesses in xhci_writeq/xhci_readq").
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
When unaligned 3 bytes data write operation is performed, 3rd byte
is being over written by 1st byte of 3 bytes data. This patch
fixes it.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Set script_offset_nor env variable using CONFIG_BOOT_SCRIPT_OFFSET
and nor flash start address to keep bootscript offset configurable.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Endianness detection is checked against uninitialized ret variable.
Assign ret with read value from status register to fix this.
Fixes: 31a359f87e ("serial: uartlite: Add support to work with any endianness")
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Pull request for UEFI sub-system for next
* UEFI capsule authentication
* UEFI capsule update on QEMU ARM
* fsuuid command for FAT file system
* bug fixes
Add documentation highlighting the steps for using the uefi capsule
update feature for updating the u-boot firmware image.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add a efidebug subcommand to initiate a firmware update using the efi
firmware management protocol(fmp) set_image routine.
The firmware update can be initiated through
'efidebug capsule disk-update'
This would locate the efi capsule file on the efi system partition,
and call the platform's set_image fmp routine to initiate the firmware
update.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for enabling uefi capsule authentication. This feature is
enabled by setting the environment variable
"capsule_authentication_enabled".
The following configs are needed for enabling uefi capsule update and
capsule authentication features on the platform.
CONFIG_EFI_HAVE_CAPSULE_SUPPORT=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT=y
CONFIG_EFI_CAPSULE_FIRMWARE=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_EFI_CAPSULE_AUTHENTICATE=y
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for authenticating uefi capsules. Most of the signature
verification functionality is shared with the uefi secure boot
feature.
The root certificate containing the public key used for the signature
verification is stored as part of the device tree blob. The root
certificate is stored as an efi signature list(esl) file -- this file
contains the x509 certificate which is the root certificate.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The efi_sigstore_parse_sigdb function reads the uefi authenticated
variable, stored in the signature database format and builds the
signature store structure. Factor out the code for building
the signature store. This can then be used by the capsule
authentication routine to build the signature store even when the
signature database is not stored as an uefi authenticated variable
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The pkcs7 header parsing functionality is pretty generic, and can be
used by other features like capsule authentication. Make the function
an extern, also changing it's name to efi_parse_pkcs7_header
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Prior to writing to an mtd device, mtd_erase is called. This call
fails in case the sector being erased is locked. Call mtd_unlock to
unlock the region which is to be erased and later written to. Lock the
region once the write to the region has completed.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
When building the capsule using scripts in edk2, a fmp header is
added on top of the binary payload. Add logic to detect presence of
the header. When present, the pointer to the image needs to be
adjusted as per the size of the header to point to the actual binary
payload.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The dfu framework uses the dfu_alt_info environment variable to get
information that is needed for performing the firmware update. Add
logic to set the dfu_alt_info for the qemu arm64 platform to reflect
the two mtd partitions created for the u-boot env and the firmware
image. This can be subsequently extended for other qemu architectures
which need this variable set.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for setting the default values for mtd partitions on the
platform. This would be used for updating the firmware image using
uefi capsule update with the dfu mtd backend driver.
Currently, values have been defined for the qemu arm64 platform, with
default values defined for the mtd partitions based on the NOR
flash. This can be subsequently extended for other qemu architectures
which need mtdparts set.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
RFC 2315 Section 9.3 describes the message digesting process. The
digest calculated depends on whether the authenticated attributes are
present. In case of a scenario where the authenticated attributes are
present, the message digest that gets signed and is part of the pkcs7
message is computed from the auth attributes rather than the contents
field.
Check if the auth attributes are present, and if set, use the auth
attributes to compute the hash that would be compared with the
encrypted hash on the pkcs7 message.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
On the qemu arm platform, the virtio devices are initialised in the
board_init function, which gets called before the initr_pci. With
this sequence, the virtio block devices on the pci bus are not
initialised. Move the initialisation of the virtio devices to
board_late_init which gets called after the call to initr_pci.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add options for embedding the public key esl(efi signature list) file
to the platform's dtb. The esl file is then retrieved and used for
authenticating the capsule to be used for updating firmare components
on the platform.
The esl file can now be embedded in the dtb by invoking the following
command
mkeficapsule -K <pub_key.esl> -D <dtb>
In the scenario where the esl file is to be embedded in an overlay,
this can be done through the following command
mkeficapsule -O -K <pub_key.esl> -D <dtb>
This will create a node named 'signature' in the dtb, and the esl file
will be stored as 'capsule-key'
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
When a new event is queued we have to process the event queue by calling
efi_process_event_queue(). But there is not reason to call the function
when the event is not queueable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Although the function description states the caller must provide a
sufficient buffer, it's better to have in function checks that the
destination buffer can hold the intended value.
So let's add an extra argument with the buffer size and check that
before doing any copying.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now we install the EFI_LOAD_FILE2_PROTOCOL to load an initrd
unconditionally. Although we correctly return various EFI exit codes
depending on the file status (i.e EFI_NO_MEDIA, EFI_NOT_FOUND etc), the
kernel loader only falls back to the cmdline interpreted initrd if the
protocol is not installed.
This creates a problem for EFI installers, since they won't be able to
load their own initrd and start the installation.
A following patch introduces a different logic where we search for an
initrd path defined in an EFI variable named 'Initrd####'.
If the bootmgr is used to launch the EFI payload, we'll will try to match
the BootCurrent value and find the corresponding initrd
(i.e Boot0000 -> Initrd0000 etc). If the file is found, we'll install
the required protocol which the kernel's efi-stub can use and load our
initrd.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
dm.h and env.h serve no purpose here. Remove them and sort the
remaining in alphabetical order.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Do not use data from the loaded image object after deleting it.
Fixes: 126a43f15b ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().
Fixes: 0ad64007fe ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.
Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The FAT file system does not have a UUID but a 4 byte volume ID.
Let the fsuuid command show it in XXXX-XXXX format.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The FAT filesystem implementation uses several marcros referring to a magic
variable name mydata which renders the code less readable. Eliminate one of
them which is only used for a debug() statement.
Use log_debug() instead of debug().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.
Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.
Make the size of the memory buffer for UEFI variables customizable.
Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Pull request for UEFI sub-system for efi-2021-01-rc5 (2)
The following errors in the UEFI sub-system are fixed:
* use after free in efi_exit()
* invalid free when using the boot manager
* pressing escape key once not recognized
Do not use data from the loaded image object after deleting it.
Fixes: 126a43f15b ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().
Fixes: 0ad64007fe ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.
Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This reverts commit 828d326216.
This change revers code which asserting PERST# signal when unloading
driver. Driver's remove callback is still there as it is used for other
functionality.
Asserting PERST# signal prior booting kernel is causing that A3720 boards
(Turris MOX and Espressobin) with stable Linux kernel versions 4.14 and
4.19 are not able to detect some PCIe cards (e.g. Compex WLE200 and WLE900)
and anymore. When PERST# signal is not asserted these cards are detected
correctly. As this is regression for existing stable Linux kernel versions
revert this problematic change in U-Boot.
To make cards working with OpenWRT 4.14 kernel it is needed to disable link
training prior booting kernel, which is already done in driver's remove
callback.
Described issue is in Linux kernel pci aardvark driver which is (hopefully)
fixed in latest upstream versions. Latest upstream versions should be able
to initialize PCIe bus and detects cards independently of the link training
and PERST# signal state.
So with this change, U-Boot on A3720 boards should be able to boot OpenWRT
4.14 kernel, stable 4.14 and 4.19 kernels and also latest mainline kernels.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
For correct spi bus detection the spi0 alias is needed in the DT.
Otherwise this error will ocurr in U-Boot:
Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Use 0x%2lx to print the i2c bus base address in hexadecimal format
instead of printing as an integer.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Use %u and not %d for unsigned values.
Print kHz and not khz.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.
Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.
This code was inspired from the supported u-boot code from Variscite
which can be found here:
https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02
New output example:
Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17
Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The eeprom at address 0x50 is a BR24G04NUX-3TTR. It has a
4Kbit (512x8) capacity, change the compatible string to reflect this
fact.
Also, add an alias to easily refer to this eeprom with
fdt_path_offset() which will be in another commit.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Hand over maintainership of Toradex SoMs (that I was responsible of) to
Oleksandr because of my resignation from Toradex, as such I will
have no immediate involvement with these modules and as a result not
able to continue maintaining these boards.
CC: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
When booting imx8mp-evk the following allocation error
message is seen:
U-Boot 2021.01-rc3-00200-ge668bec96a5f (Dec 21 2020 - 14:36:42 -0300)
alloc space exhausted
Fix it by increasing CONFIG_SYS_MALLOC_F_LEN to 0x10000 like it
is done on other i.MX8MM/8MN boards.
Reported-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Calling ahab_close cmd force the user to interact for confirmation.
This is not user-friendly when using this cmd during factory process.
Allow the user to pass '-y' option to bypass this confirmation.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
The current PHY rework does the following things:
1. Configure 125MHz clock
2. Setup the TX clock delay (RX is enabled by default),
3. Setup reserved bits to avoid voltage peak
The clock delays are nowadays already configured by the
PHY driver (in ar803x_delay_config). The code for that
can simply be dropped. The clock speed can also be
configured by the PHY driver by adding the device tree
property "qca,clk-out-frequency".
What is left is setting up the undocumented reserved bits
to avoid the voltage peak problem. I slightly improved its
documentation while updating the board's PHY rework code.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Instead of hardcoding index magic numbers in the board code,
also rely on board_fit_config_name_match choosing the right
config for the fitImage containing the kernel.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Pull request for UEFI sub-system for efi-2021-01-rc5
* In the Standalone MM based implementation of UEFI variables
check the internal OP-TEE return code
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.
Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a host_build() function, so that it's possible to
check for software being build with USE_HOSTCC without
relying on preprocessor conditions. In other words
#ifdef USE_HOSTCC
host_only_code();
#endif
can be written like this instead:
if (host_build())
host_only_code();
This improves code readability and test coverage and
compiler will eleminate this unreachable code.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After the conversion to device tree the board information becomes
redundant:
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD
Remove the printing of the board information.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
i.MX8M series includes support for high speed modes in uSDHC controllers.
Turn on corresponding configuration options for EVK boards, which would
enable high speed modes to be included in U-Boot.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
i.MX8M series provide support for high speed grades in their
usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks
to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Some SD Card controller and power circuitry has increased capacitance,
which keeps the internal logic remains powered after regulator is switch
off. This is generally the case when card is switched to SD104 mode,
where a power cycle should be performed. In case if the card internal
logic remains powered, it causes a subsequent failure of mode
transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for
internal card circuitry to drain voltages and perform a power cycle
correctly.
Similar fix is done in commit c49d0ac38a ("ARM: dts: rmobile: Increase
off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
There have been some updates to the device tree since 5.6.
This also includes some clocks, and makes it easier to keep
board device tree files in sync with Linux
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Fixed wrong PHY Interface Mode
As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
This problem has been exposed by commit:
commit 13114f38e2
Fix the phy-mode accordingly to fix the regression.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
A recent change to unify the flattree/livetree code introduced a small
size increase in SPL on some boards. For example SPL code size for
px30-core-ctouch2-px30 increased by 40 bytes.
To address this we can take advantage of the fact that some of the ofnode
functions are only called a few times in SPL, so it is worth inlining
them.
Add new Kconfig options to control this. These functions are not inlined
for U-Boot proper, since this increases code size.
Fixes: 2ebea5eaeb ("dm: core: Combine the flattree and livetree binding code")
Signed-off-by: Simon Glass <sjg@chromium.org>
Buildman reuses build directories from previous builds to avoid the cost
of 'make mrproper' for every build. If the previous build produced an SPL
image but the current one does not, the SPL image will remain and buildman
will think it is a result of building the current board.
Remove these files before building, to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove setting slave->dev to NULL after the device_remove() call.
The slave pointer points to dev->parent_priv, which has already
been freed by device_free(), called from device_remove() in the
preceding line. Writing to slave->dev may cause corruption of the
dlmalloc free chunk forward pointer of the previously freed chunk.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add testcase for spi_claim_bus(), which checks that sandbox spi bus
speed/mode settings are updated correctly when multiple slaves use
the bus consecutively. The following configurations are used for the
two spi slaves involved:
* different max_hz / different modes
* different max_hz / same modes
* different modes / same max_hz
asm/test.h header is added in order to be able to retrieve the current
speed/mode of the sandbox spi bus, via sandbox_spi_get_{speed, mode}.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, when different spi slaves claim the bus consecutively using
spi_claim_bus(), spi_set_speed_mode() will only be executed on the first
two calls, leaving the bus in a bad state starting with the third call.
This patch drops spi_slave->speed member and adds caching of bus
speed/mode in dm_spi_bus struct. It also updates spi_claim_bus() to call
spi_set_speed_mode() if either speed or mode is different from what the
bus is currently configured for. Current behavior is to only take into
account the speed, but not the mode, which seems wrong.
Fixes: 60e2809a84 ("dm: spi: Avoid setting the speed with every transfer")
Reviewed-by: Simon Glass <sjg@chromium.org>
Reported-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reported-by: Moshe, Yaniv <yanivmo@amazon.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Introduce sandbox_spi_get_{speed, mode} public interface to retrieve the
sandbox spi bus internal state. They are meant to be used in sandbox spi
testcases.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement sandbox_spi_set_{speed, mode} routines, to be able to keep track
of the current bus speed/mode. This will help determine whether the values
passed from dm_spi_claim_bus() are valid.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Place a second spi slave on the sandbox_spi bus, to be used by the
spi_claim_bus() testcase we are about to introduce. We need to make sure
that jumping between slaves calling spi_claim_bus() sets the bus speed and
mode appropriately. Use different max-hz and mode properties for this new
slave.
Also, update sandbox_spi cs_info call to allow activity on CS0/CS1 and
adapt dm_test_spi_find() testcase for this new setup.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 1289e96797 ("sandbox: spi: Drop command-line SPI option") dropped
support for specifying SPI devices on the command line, removing the only
user of sandbox_spi_parse_spec(). Remove the function too.
Fixes: 1289e96797 ("sandbox: spi: Drop command-line SPI option")
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Before executing code that we have loaded from a file we need to flush the
data cache and invalidate the instruction flash.
Implement functions flush_cache() and invalidate_icache_all().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
While assigning the sequence number to subsystem instances by reading the
aliases property, only DT nodes names are compared and not the complete
path. This causes a problem when there are two DT nodes with same name but
have different paths.
In arch/arm/dts/k3-am65-main.dtsi there are two USB controllers with the
same device tree node name but different path. When aliases are defined for
these USB controllers then fdtdec_get_alias_seq() fails to pick the correct
instance for a given index.
fdt_path_offset() function is slow and this would effect the U-Boot
startup. To avert the time penalty on all boards, apply this extra check
only when required by using a config option.
Fix it by comparing the phandles of DT nodes after the node names match,
under a config option.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix whitespace error in Kconfig:
Signed-off-by: Simon Glass <sjg@chromium.org>
Check for negative return value of fdt_noffset from calling
boot_get_fdt_fit().
Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement a reset function that we can call after ExitBootServices(),
when all driver model devices are gone.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add CONFIG_DEBUG_UART=y for all sandbox defconfig
as it is already done in sandbox_defconfig.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add defaults for FSF/GNU projects, such as gcc, that provide sensible
settings for those projects.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
To enable use of patman with FSF/GNU projects, such as GCC or
Binutils, no Signed-off-by may be added. This adds a command
line flag '--no-signoff' to suppress adding signoffs in patman
when processing commits.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix patman testBranch() test:
Signed-off-by: Simon Glass <sjg@chromium.org>
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Travis-CI is changing their support for FOSS (understandably) to have a
limited per-month number of build minutes. Unfortunately for us, the
matrix of jobs we run will exhaust that very quickly. Remove the yml
file. Thanks for all the builds, Travis-CI!
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since linux commit 2e6cde96873253fd9eb0f20afd8ffd18278cff75 ("arm64:
dts: ls1028a: make the eMMC and SD card controllers use fixed indices")
mmc0 is the eMMC and mmc1 is the SD card. Also swap it in u-boot to
avoid any confusion by the user and to be aligned with linux.
Signed-off-by: Michael Walle <michael@walle.cc>
Pull request for UEFI sub-system for efi-2021-01-rc4
* Provide a tool to create a file with UEFI variables to preseed UEFI
variable store.
* Make size of UEFI variable store configurable.
* Add man pages for commands 'bootefi' and 'button'.
tools/efivar.py allows to prepare a file with UEFI variables to preseed
the UEFI variable store.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.
Make the size of the memory buffer for UEFI variables customizable.
Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Now that migration to the new sequence numbers is complete, drop the old
fields. Add a test that covers the new behaviour.
Also drop the check for OF_PRIOR_STAGE since we always assign sequence
numbers now.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function current deals with req_seq which is deprecated. Update it to
use the new sequence numbers, putting them above existing aliases. Rename
the function to make this clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that there is only one sequence number (rather than both requested and
assigned ones) we can simplify this function. Also update its caller to
simplify the logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Check that this flag operates as expected. This patch is not earlier in
this series since is uses the new behaviour of dev_seq().
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no-longer any need to check if sequence numbers are valid, since
this is ensured by driver model. Drop the unwanted logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that sequence numbers are set up when devices are bound, this code is
not needed. Also, we should use dev_seq() instead of req_seq. Update the
whole file accordingly.
Also fix up APL cpu while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new sequence number in all cases. Since all devices are assigned
a number when bound, this hack should not be needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This hack cannot work in the new sequence-numbering scheme. Remove it
while we wait for the maintainer to complete DM conversion as noted in
the existing comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new sequence number in all cases. Drop the rockchip case because
the sequence number should be 0 anyway, and assigning to the sequence
number is not permitted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we know the sequence number at bind time, there is no need for
special-case code in dm_pci_hose_probe_bus().
Note: the PCI_CAP_ID_EA code may need a look, but there are no test
failures so I have left it as is.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some buses have their own rules which require assigning sequence numbers
with a bus-specific algorithm. For example, PCI requires that sub-buses
are numbered higher than their parent buses, meaning effectively that
parent buses must be numbered only after all of their child buses have
been numbered.
Add a uclass flag to indicate that driver model should not assign sequence
numbers. In this case, the uclass must do it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Checking for seq == -1 is effectively checking that the device is
activated. The new sequence numbers are never -1 for a bound device, so
update the check.
Also drop the note about valid sequence numbers so it is accurate with the
new approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new sequence number in all cases. Drop the logic to check for a
valid number in designware_i2c, since it will always be valid.
Also drop the numbering in the uclass, since we can rely on driver
model giving us the right sequence numbers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Several Octeon drivers operate by setting the sequence number of their
device. This should not be needed with the new sequence number setup. Also
it is not permitted. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the core logic to use the new approach. For now the old code is
left as is. Update one test so it still passes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present each device has two sequence numbers, with 'req_seq' being
set up at bind time and 'seq' at probe time. The idea is that devices
can 'request' a sequence number and then the conflicts are resolved when
the device is probed.
This makes things complicated in a few cases, since we don't really know
what the sequence number will end up being. We want to honour the
bind-time requests if at all possible, but in fact the only source of
these at present is the devicetree aliases. Since we have the devicetree
available at bind time, we may as well just use it, in the hope that the
required processing will turn out to be useful later (i.e. the device
actually gets used).
Add a new 'sqq' member, the bind-time sequence number. It operates in
parallel to the old values for now. All devices get a valid sqq value,
i.e. it is never -1.
Drop an #ifdef while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this is passed a uclass ID and it has to do a lookup. The
callers all have the uclass pointer, except for the I2C uclass where the
code will soon be deleted.
Update the argument to a uclass * instead of an ID since it is more
efficient.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.
The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.
For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.
With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.
Consider this example, where struct driver is 0x80 bytes:
ll_entry_declare(struct driver, fred, driver)
...
void *p = ll_entry_get(struct driver, fred, driver)
If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.
In the first case, an 8-byte 'fill' region is added:
.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv
With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.
Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.
One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.
So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.
Update the ll_entry_start() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN
pin to the high impedance mode, otherwise the board is stuck in the
middle of loading early stages of the bootloader from SD card.
This can be achieved by using the OPEN_DRAIN flag instead if the
ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin
has the pull-up) and solve the issue.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
impossible to use the spi_xfer function to use spi, since the CS is
de-asserted in between calls. This patch adds an implementation of
exec_op, which gives correct behaviour when reading/writing spi flash.
This patch also rearranges the headers to conform to U-Boot style.
[1] https://lkml.org/lkml/2015/12/23/132
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
U-Boot-specific ones.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
CTRLR0 can have several different layouts depending on the specific device
(dw-apb-ssi vs dwc-ssi), and specific parameters set during synthesis.
Update the driver to support three specific configurations: dw-apb-ssi with
SSI_MAX_XFER_SIZE=16, dw-apb-ssi with SSI_MAX_XFER_SIZE=32, and dwc-ssi.
dw-apb-ssi is the version of the device on Altera/Intel SoCFPGAs, MSCC
SoCs, and Canaan Kendryte K210 SoCs. This is the only version this driver
supported before this change. The register layout before version 3.23a is:
| 31 .. 16 |
| other stuff |
| 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff | TMOD | MODE | FRF | DFS |
Note that DFS (Data Frame Size) is only 4 bits, limiting transfers to data
frames of 16 bits or less.
In version 3.23a, the SSI_MAX_XFER_SIZE parameter was introduced. This
parameter defaults to 16 (resulting in the same layout as prior versions),
but may also be set to 32. To allow setting longer data frame sizes, a new
DFS_32 register was introduced:
| 31 .. 21 | 20 .. 16 |
| other stuff | DFS_32 |
| 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff | TMOD | MODE | FRF | all zeros |
The old DFS field no longer controls the data frame size. To detect this
layout, we try writing 0xF to DFS. If we read back 0x0, then this device
has SSI_MAX_XFER_SIZE=32.
dwc-ssi is the version of the device on Intel Keem Bay SoCs and Canaan
Kendryte K210 SoCs. The layout of ctrlr0 is:
| 31 .. 16 |
| other stuff |
| 15 .. 12 | 11 .. 10 | 9 .. 8 | 7 .. 6 | 4 .. 0 |
| other stuff | TMOD | MODE | FRF | DFS_32 |
The semantics of the fields have not changed since the previous version.
However, SSI_MAX_XFER_SIZE is effectively always 32.
To support these different layouts, we model our approach on the one
which the Linux kernel has taken. During probe, the driver calls an init
function stored in driver_data. This init function is responsible for
determining the layout of CTRLR0, and supplying the update_cr0 function.
The style of and information behind this commit is based on the Linux MMIO
driver for these devices. Specific reference was made to the series adding
support for Intel Keem Bay SoCs [1].
[1] https://lore.kernel.org/linux-spi/20200505130618.554-1-wan.ahmad.zainie.wan.mohamad@intel.com/
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.
Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A few registers had slightly different names from what is in the datasheet.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This allows different log levels to be enabled or disabled depending on the
desired level of verbosity. In particular, it allows for general debug
information to be printed while excluding more verbose logging which may
interfere with timing.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The resting state of MOSI is high when nothing is driving it. If we drive
it low while recieving, it looks like we are transmitting 0x00 instead of
transmitting nothing. This can confuse slaves (like SD cards) which allow
new commands to be sent over MOSI while they are returning data over MISO.
The return of MOSI from 0 to 1 at the end of recieving a byte can look like
a start bit and a transmission bit to an SD card. This will cause the card
to become out-of-sync with the SPI device, as it thinks the device has
already started transmitting two bytes of a new command. The mmc-spi driver
will not detect the R1 response from the SD card, since it is sent too
early, and offset by two bits. This patch fixes transfer errors when using
SD cards with dw spi.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
U-Boot is able to erase bad mtd blocks on raw nand devices, but this
is not true for spinand flashes. Lets enable this feature for spinand
flashes as well. This is extemelly useful for flash testing.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@oktetlabs.ru>
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.
In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.
Fix this by explicitly setting req.mode to MTD_OPS_RAW.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.
This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07eedf ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.
To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
Define LOG_CATEGORY and change printf and pr_*
to dev_ (when dev is available) or log_ macro.
This patch adds the support of logging feature with log command
(filtering, display of device name in trace) and allows to
suppress traces via the syslog driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for
RTL8153B, it is necessary to notify the hardware of the changes
of the aggregation settings.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
The r8152_eth_probe() may allocate a memory for ss->dev_priv.
It has to be freed if r8152_eth_probe() fails finally.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
For bulk IN transfer, the codes will set ISP flag to request event TRB
being generated by xHC for the case of short packet. So when encountering
buffer-cross-64K-boundary (which we will divide payload and enqueuqe
more than 1 transfer TRB), and the first TRB ends up with a short packet
condition it will trigger an short packet code transfer event per that
flag and cause more than 1 event TRB generated for this transfer.
However, current codes will only handle the first transfer event TRB
then mark current transfer completed, causing next transfer
failure due to event TRB mis-match.
Such issue has been observed on some Layerscape platforms (LS1028A,
LS1088A, etc) with USB ethernet device.
This patch adds a loop to make sure the event TRB for last transfer TRB
has been handled in time.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.
Move Intel Edison to use DM_USB_GADGET and drop hard coded values.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.
Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.
According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.
Fixes: e71de54a49 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Make use of the new bootargs substitution mechanism and zboot command
syntax.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.
In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.
Update the command accordingly.
[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Documentation fixes for v2020.01-rc4
Move several README files to reStructured text for the HTML documentation.
Describe register for global data on x86.
Allow building HTML documentation with Sphinx 3
Set $devtype for DHCP boot, which can be handy for the boot.scr
for detection of devtype used (for example, when the same boot.scr is
used for both mmc/dhcp boot):
if test ${devtype} = "dhcp"; then
...
fi
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Convert README.bootmenu to reStructured text and move it to
usage/bootmenu.rst.
Adjust the text concerning configuration settings as these now are managed
via Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Convert README.trace to reStructured text and move it to develop/trace.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert README.NetConsole to reStructured text and move it to
doc/usage/netconsole.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reformat README.commands as reStructured text and add it to the HTML
documentation as develop/commands.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Due to removed function c_funcptr_sig_re building with Sphinx 3 fails.
With the patch building succeeds with a lot of warnings if the '-W' flag is
removed from doc/Makefile. Most of the documentation is correct
This follows the approach taken by the Linux kernel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On x86 the global data pointer is stored in register fs.
On x86_64 no register is used for the global data pointer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fix wrong amoswap t1 usage in startup.
- Reset the board after crash.
- Enable distro booting from an attached SCSI disk for QEMU.
- Support the optional header fields in efi header.
This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.
Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <arapov@gmail.com>
Reported-by: Otto Meier <gf435@gmx.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However
it skips setting the mode if it matches the one done during driver probe
(stored in private structure). This fails if the mode has been changed
to other value and then back to initial one. Fix this by configuring the
dr-mode always, regadless of the one set at the driver probe).
This fixes operation of USB gadget based drivers when they are initialized
for the second time.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
zero in absence of any usage.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
If an exception occurs on ARM or x86, we call panic() which will try to
reset the board. Do the same on RISC-V.
To avoid -Werror=format-zero-length move a '\n' to the string passed to
panic. We don't need a message here as depending on CONFIG_PANIC_HANG we
will either see
### ERROR ### Please RESET the board ###
or
resetting ...
as next message.
Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value
Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
As a way of keeping the driver declarations more consistent, add a warning
if the struct used does not end with _priv or _plat.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix up the code style for those declarations that should now fit onto one
line, which is all of them that currently do not.
This is needed for dtoc to detect the structs correctly, at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).
Rename some of the latter variables to end with 'plat' for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this file to reduce the number of pylint warnings. Also add a few
missing comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This doesn't need to be passed the devicetree anymore. Drop it.
Also rename the function to drop the _fdt suffix.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are two copies of this code. With ofnode we can combine
them to reduce duplication. Update the dm_scan_fdt_node() function and
adjust its callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed in at least one place. Avoid the conditional code in root.c
by adding this inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is not necessary anymore, since device_bind_ofnode() does
the same thing and works with both flattree and livetree.
Rename it to indicate that it is special.
Signed-off-by: Simon Glass <sjg@chromium.org>
Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a unit test that causes an illegal instruction to occur.
The test can be run with the following commands:
=> setenv efi_selftest exception
=> bootefi selftest
This might be the output:
Executing 'exception'
EFI application triggers exception.
Illegal instruction
pc = 0x1444d016, pc_reloc = 0xffffaa078e8dd016
UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
UEFI image [0x000000001444b000:0x0000000014451fff] pc=0x2016 '/bug.efi'
Resetting ...
It would tell us that the exception was triggered by an instruction
0x2016 bytes after the load address of the binary with filename /bug.efi.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement the commands
* exception undefined - execute an illegal instruction
* exception sigsegv - cause a segment violation
Here is a possible output:
=> exception undefined
Illegal instruction
pc = 0x55eb8d0a7575, pc_reloc = 0x57575
Resetting ...
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a handler for SIGILL, SIGBUS, SIGSEGV.
When an exception occurs print the program counter and the loaded
UEFI binaries and reset the system if CONFIG_SANDBOX_CRASH_RESET=y
or exit to the OS otherwise.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rather than implementing our own circular queue, use membuff. This allows
us to read multiple bytes at once into the serial input.
Signed-off-by: Simon Glass <sjg@chromium.org>
CONFIG_OF_CONTROL is always enabled for sandbox (as it should be for all
boards), so we can drop it. Also use IS_ENABLED() for the SPL check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this, mostly to add comments for argument and return types. It is
probably still too early to use type hinting since it was introduced in
3.5.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful anymore, since we always want to call chr() in Python 3.
Drop it and adjust callers to use chr().
Also drop ToChars() which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't need these now that everything uses Python 3. Remove them and
the extra code in GetBytes() and ToBytes() too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use an Enum instead of the current ad-hoc constants, so that there is a
data type associated with each 'type' value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Second set of u-boot-atmel fixes for 2021.01 cycle
This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.
The correct compatible for this eeproms is microchip,24aa02e48
The previous compatible string was working up to U-boot 2020.04.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Pull request for UEFI sub-system for next
Bug fixes
* avoid corruption of FAT file system when using long names
* correct values for RuntimeServicesSupport concerning UEFI capsule update
* link partition to block device via EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
New feature
* support EFI_LOAD_FILE_PROTOCOL in LoadImage() boot service
The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.
On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.
First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.
Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.
Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Fixes: commit 8ec619f8fd ("pci: layerscape: Fixup PCIe EP
mode DT nodes for LX2160A rev2")
This added the PCIe EP nodes fixup of LX2160A, but it
didn't update the condition value when there isn't a
property 'apio-wins'.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Fixed checkpatch error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2162
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.
LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Move CORTINA_NO_FW_UPLOAD to Kconfig file so that it can
be controlled via defconfig files.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
We provide a UEFI driver for block devices. When ConnectController() is
called for a handle with the EFI_BLOCK_IO_PROTOCOL this driver creates the
partitions. When DisconnectController() is called the handles for the
partitions have to be deleted. This requires that the child controllers
(partitions) open the EFI_BLOCK_IO_PROTOCOL of the controller (block IO
device) with attribute EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A unit test is supplied to test the support for the EFI_LOAD_FILE_PROTOCOL
and the EFI_LOAD_FILE2_PROTOCOL by the LoadImage() boot service.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_load_image_from_file() should read via either of:
* EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
* EFI_LOAD_FILE_PROTOCOL
* EFI_LOAD_FILE2_PROTOCOL
To make the code readable carve out a function to load the image via the
file system protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Implementing support for loading images via the EFI_LOAD_FILE_PROTOCOL
requires the boot policy as input for efi_load_image_from_path().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The EFI_LOAD_FILE_PROTOCOL_GUID and EFI_LOAD_FILE2_PROTOCOL_GUID are needed
to complement the implementation of the LoadFile() boot service.
Remove a duplicate declaration of a variable for the
EFI_LOAD_FILE2_PROTOCOL_GUID.
Move the remaining declaration to efi_boottime.c.
Add a variable for the EFI_LOAD_FILE_PROTOCOL_GUID.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For implementing support for the EFI_LOAD_FILE_PROTOCOL in the LoadImage()
service we will have to call the LocateDevicePath() service. To avoid a
forward declaration resequence the functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Our implementation of the EFI_HII_CONFIG_ROUTING_PROTOCOL is a mere stub,
where all services return an error code. The protocol is neither needed for
the EFI shell nor for the UEFI SCT. To reduce the code size remove it from
the U-Boot binary.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The EFI_RT_PROPERTIES_TABLE configuration table indicates which runtime
services are available at runtime.
Even if CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y, we neither support
UpdateCapsule() nor QueryCapsuleCapabilities() at runtime. Thus we should
not set the corresponding flags EFI_RT_SUPPORTED_UPDATE_CAPSULE and
EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES in RuntimeServicesSupported.
Fixes: 2bc27ca8a0 ("efi_loader: define UpdateCapsule api")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Long file names are stored in multiple directory entries. When deleting a
file we must delete all of them.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A long name is split over multiple directory entries. When deleting a file
with a long name we need the first directory entry to be able to delete the
whole chain.
Add the necessary fields to the FAT iterator:
* cluster of first directory entry
* address of first directory entry
* remaining entries in cluster
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When deleting a directory entry 0xe5 is written to name[0].
We have a constant for this value and should use it consistently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Searching for a file is not a write operation. So it should not lead to the
allocation of a new cluster to the directory.
If we reuse deleted entries, we might not even use the new cluster and due
to not flushing it the directory could be corrupted.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When creating new directory entries try to reuse entries marked as deleted.
In fill_dir_slot() do not allocate new clusters as this has already been
done in fat_find_empty_dentries().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a function to find a series of empty directory entries.
The current directory is scanned for deleted entries.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When handling long file names directory entries may be split over multiple
clusters. We must make sure that new clusters are zero filled on disk.
When allocating a new cluster for a directory flush it.
The flushing should be executed before updating the FAT. This way if
flushing fails, we still have a valid directory structure.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When iterating over a child directory we set itr->start_clust.
Do the same when over the root directory.
When looking for deleted directory entries or existing short names we will
have to iterate over directories a second and third time. With this patch
we do not need any special logic for the root directory.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For reusing deleted directory entries we have to adjust the function called
to step to the next directory entry.
This patch alone is not enough to actually reuse deleted directory entries
as the fill_dir_slot() is still called with first never used directory
entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
File names must be unique within their directory. So before assigning a
short name we must check that it is unique.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In set_name() we select the short name. Once this is correctly implemented
this will be a performance intensive operation because we need to check
that the name does not exist yet. So set_name should only be called once.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently we pass the short name via the directory iterator.
Pass it explicitly as a parameter.
This removes the requirement to set the short name in the iterator before
writing the long name.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current function set_name() used to create short names has the
following deficiencies resolved by this patch:
* Long names (e.g. FOO.TXT) are stored even if a short name is enough.
* Short names with spaces are created, e.g. "A ~1.TXT".
* Short names with illegal characters are created, e.g. "FOO++BAR".
* Debug output does not not consider that the short file name has no
concluding '\0'.
The solution for the following bug is split of into a separate patch:
* Short file names must be unique.
This patch only provides the loop over possible short file names.
Fixes: c30a15e590 ("FAT: Add FAT write feature")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rename function next_cluster() to fat_next_cluster() and export it.
When creating a new directory entries we should reuse deleted entries.
This requires re-scanning the directory.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The FAT specification [1] requires that for a '..' directory entry pointing
to the root directory the fields DIR_FstClusHi and DIR_FstClusLo are 0.
[1] Microsoft FAT Specification, Microsoft Corporation, August 30 2005
Fixes: 31a18d570d ("fs: fat: support mkdir")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition
Voids the need to set such partition as bootable to work with the
'dev:auto' tuple
Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fit images were loaded to a buffer provided by spl_get_load_buffer().
This may work when the FIT image is small and fits between the start
of DRAM and SYS_TEXT_BASE.
One problem with this approach is that the location of the buffer may
be manipulated by changing the 'size' field of the FIT. A maliciously
crafted FIT image could place the buffer over executable code and be
able to take control of SPL. This is unacceptable for secure boot of
signed FIT images.
Another problem is with larger FIT images, usually containing one or
more linux kernels. In such cases the buffer be be large enough so as
to start before DRAM (Figure I). Trying to load an image in this case
has undefined behavior.
For example, on stm32mp1, the MMC controller hits a RX overrun error,
and aborts loading.
_________________
| FIT Image |
| |
/===================\ /=====================\
|| DRAM || | DRAM |
|| || | |
||_________________|| SYS_TEXT_BASE | ___________________ |
| | || FIT Image ||
| | || ||
| _________________ | SYS_SPL_MALLOC_START || _________________ ||
|| malloc() data || ||| malloc() data |||
||_________________|| |||_________________|||
| | ||___________________||
| | | |
Figure I Figure II
One possibility that was analyzed was to remove the negative offset,
such that the buffer starts at SYS_TEXT_BASE. This is not a proper
solution because on a number of platforms, the malloc buffer() is
placed at a fixed address, usually after SYS_TEXT_BASE. A large
enough FIT image could cause the malloc()'d data to be overwritten
(Figure II) when loading.
/======================\
| DRAM |
| |
| | CONFIG_SYS_TEXT_BASE
| |
| |
| ____________________ | CONFIG_SYS_SPL_MALLOC_START
|| malloc() data ||
|| ||
|| __________________ ||
||| FIT Image |||
||| |||
||| |||
Figure III
The solution proposed here is to replace the ad-hoc heuristics of
spl_get_load_buffer() with malloc(). This provides two advantages:
* Bounds checking of the buffer region
* Guarantees the buffer does not conflict with other memory
The first problem is solved by constraining the buffer such that it
will not overlap currently executing code. This eliminates the chance
of a malicious FIT being able to replace the executing SPL code prior
to signature checking.
The second problem is solved in conjunction with increasing
CONFIG_SYS_SPL_MALLOC_SIZE. Since the SPL malloc() region is
carefully crafted on a per-platform basis, the chances of memory
conflicts are virtually eliminated.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
- Series to improve "bootm" by allowing variable evaluation within the
cmdline we would be passing. This will help with Chrome OS but can be
useful elsewhere.
- Improve ATF (TF-A) support within SPL.
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
threshold configuration (Joshua)
Use the full name of firmware self extracting file to make it run.
Also, don't use sudo when not needed.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60
have no support for crystal oscillator bypass. Setting this bit might
affect the device functionality.
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.
This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.
Code for emmc is extracted from commit f1a43c84a9 ("arm64: dts: a3720:
add support for espressobin with populated emmc").
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.
As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].
Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial@5a070000
Out: serial@5a070000
Err: serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net: eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot: 0
Functionality wise the following is known to be working:
- eMMC and MMC/SD card
- Ethernet (*)
- GPIOs
- I2C
Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.
* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.
[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Implement board_phys_sdram_size() to automatically detect Verdin iMX8M
Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB.
Note: This only works if we keep using similar RAM chips!
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Now with them first Verdin iMX8M Mini DualLite modules in for bring-up
we got clarity how is_cpu_type() actually behaves.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
The I2C address is 0x25, not 0x35. This according to the datasheet and
tests with a PCA9450A.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the
card clock will be divied by 2 automatically by the host. So need
to first config the DDR_EN correctly, then update the card clock.
This will make sure the actual card clock is as our expected.
IC also suggest config the DDR_EN firstly, then config the clock
divider.
For HS400/HS400ES mode, need to config the strobe dll, this need
to based on the correct target clock rate, so need to do this after
clock rate is update.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Set `bootcause' from b850v3 power management watchdog status.
Boot cause "REVERT" is no longer used, remove it.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Use VPD product ID instead of confidx, so that we can easily reuse the
product ID defines and avoid some magic numbers.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Remove pinmux defines, that are no longer used after
converting the code to devicetree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Commit f692b479f0 changed the VPD partition name from "vpd" to
"vpd@0". Fix the VPD reader code to use the new name, so that
the VPD code keeps working.
Fixes: f692b479f0 ("i2c: eeprom: Use reg property instead of offset and size")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Fix the following warning:
arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
flush_dcache_range(s, e);
^~~~~~~~~~~~~~~~~~
Include cpu_func.h header which declares the flush_dcache_range()
function.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",
Fix those by using "%lu" specified.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects
argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long
long unsigned int}’ [-Wformat=]
Fix those by using %llx
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
This patch fixes this clk issue on I2C on imx8qm
=> i2c bus
Bus 3: i2c@5a830000
=> i2c dev 3
Setting bus to 3
Failed to enable ipg clk
Failure changing bus number (-524)
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.
Adapt board code to remove stuff not needed anymore.
Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.
Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.
It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.
Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.
For example, to substitute the GUID of the kernel partition:
setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm
This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present cli_simple_process_macros() requires that the caller provide
an output buffer that is exactly CONFIG_SYS_CBSIZE bytes in length. This
makes sense since it is designed to be used from the command line. But we
also want to use it for bootargs substitution.
Update the function to allow the caller to specify the buffer size. Also
return an error if the buffer is exhausted. The caller can ignore that if
preferred.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present zimage does its own command-line processing and does not
support the 'silent console' feature. There doesn't seem to be any good
reason for this.
Add support for silent console to zimage.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we only support updating the 'bootargs' environment
variable. Add another function to update a buffer instead. This will
allow zimage to use this feature.
Also add a lot more tests to cover various cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only one transformation is supported: making the Linux console
silent. To prepare for adding more, convert the boolean parameter into a
flag value.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootm_process_cmdline_env() reads the 'bootargs' variable and
then writes it back afterwards. This is painful for tests, which would
rather use a simple buffer.
It is also useful for zimage to use a buffer, since it does not actually
put the Linux command line in the bootargs variable.
Refactor the existing code into two pieces. One handles reading and
writing the environment variable, as well as allocating a buffer for use
by the rest of the code, which now operates on a buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the size (including terminator) for in this function, rather than
the length. This is arguably easier to follow, with the coming
refactor.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function will soon do more than just handle the 'silent linux'
feature. As a first step, update it to take a boolean parameter,
indicating whether or not the processing is required.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to add more processing to this function. Before doing so, rename
it to bootm_process_cmdline_env(), which is more generic.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function fails silently on error. Update it to produce
an error code. Report this error to the user and abort the boot, since it
likely will prevent a successful start.
No tests are added at this stage, since additional refactoring is taking
place in subsequent patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function returns 1 on success and 0 on failure. But in
the latter case it provides no indication of what went wrong.
If an attempt is made to delete a non-existent variable, the caller may
want to ignore this error. This happens when setting a non-existent
variable to "", for example.
Update the function to return 0 on success and a useful error code on
failure. Add a function comment too.
Make sure that env_set() does not return an error if it is deleting a
variable that doesn't exist. We could update env_set() to return useful
error numbers also, but that is beyond the scope of this change.
Signed-off-by: Simon Glass <sjg@chromium.org>
wip
The BL31 expects the GIC to be uninitialized. Thus, if we are loading
the BL31 by the SPL we must not initialize it. If u-boot is loaded by
the SPL directly, it will initialize the GIC again (in the same
lowlevel_init()).
This was tested on a custom board with SPL loading the BL31 and jumping
to u-boot as BL33 as well as loading u-boot directly by the SPL. In case
the ATF BL1/BL2 is used, this patch won't change anything, because no
SPL is used at all.
Signed-off-by: Michael Walle <michael@walle.cc>
bl2_to_bl31_params_mem is just an implementation detail of the SPL ATF
support and is not needed anywhere else. Move it from the header to the
actual module.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Move the actual implementation of the bl2_plat_get_bl31_params() to its
own function. The weak function will just call the default
implementation. This has the advantage that board code can still call
the original implementation if it just want to modify minor things.
Signed-off-by: Michael Walle <michael@walle.cc>
There is no need to have the storage available globally. This is also a
preparation for LOAD_IMAGE_V2 support. That will introduce a similar
generator function which also has its own storage.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT.
Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.
Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.
Hi,
This patch depend on the previous serie [1].
I don't test this patch on real hardware but
after this patch the size of the binary don't change.
In .config we have:
CONFIG_ARCH_SUPPORT_PSCI=y
CONFIG_ARMV7_PSCI=y
# CONFIG_ARMV7_PSCI_1_0 is not set
# CONFIG_ARMV7_PSCI_0_2 is not set
CONFIG_ARMV7_PSCI_0_1=y
CONFIG_ARMV7_PSCI_NR_CPUS=4
In u-boot.cfg, this patch only add the 2 lines
#define CONFIG_ARCH_SUPPORT_PSCI 1
#define CONFIG_ARMV7_PSCI_0_1 1
[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029
Regards
Patrick
END
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Upstream linux DT naming doesn't align with the U-Boot DT, which may
not always be the case so this allows using BOOTENV_EFI_SET_FDTFILE_FALLBACK
where it might be appropriate for some boards.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
For booting via UEFI we need to define the fdtfile option so
bootefi has the option to load a fdtfile from disk. For arm64
the kernel dtb is located in a vendor directory so we define
that as nvidia for that architecture.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Avoid UART input from floating RX pins on UARTB and UARTC (Colibri T30)
and UARTB, UARTC and UARTD (Apalis T30).
Note: Floating pins may cause spurious break conditions potentially
interrupting U-Boot's autoboot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Fix SPI1 and UART2/3 resp. UARTB/C pinmuxing.
Note: The former was illegally muxing multiple SoC balls onto the same
internal SoC signal which caused rather strange behaviour regarding
the RS232 serial transceiver ForceOFF# pins as available on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add pinmuxing comment stating that TRISTATE means the output driver is
tri-stated and INPUT means the input driver is enabled vs. OUTPUT where
it is disabled.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Pull request for UEFI sub-system for next
This pull request adds:
* eventlog support for TCG2_PROTOCOL
* UEFI capusule updates
It replace printf by log in efi_uclass.c
The test can run on sandbox build and it attempts to execute a firmware
update via a capsule-on-disk, using a raw image capsule,
CONFIG_EFI_CAPSULE_RAW.
To run this test successfully, you need configure U-Boot specifically;
See test_capsule_firmware.py for requirements, and hence it won't run
on Travis CI, at least, for now.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
The test can run on sandbox build and it attempts to execute a firmware
update via a capsule-on-disk, using a FIT image capsule,
CONFIG_EFI_CAPSULE_FIT.
To run this test successfully, you need configure U-Boot specifically;
See test_capsule_firmware.py for requirements, and hence it won't run
on Travis CI, at least, for now.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This is a utility mainly for test purpose.
mkeficapsule -f: create a test capsule file for FIT image firmware
Having said that, you will be able to customize the code to fit
your specific requirements for your platform.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
"efidebug capsule" is more or less a debugging utility.
efidebug capsule update: invoke UpdateCapsule against data on memory
efidebug capsule show: show a capsule header
efidebug capsule result: dump a capsule result variable
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, a very simple firmware management protocol driver
is implemented. It will take a binary image in a capsule file and
apply the data using dfu backend storage drivers via dfu_write_by_alt()
interface.
So "dfu_alt_info" variable should be properly set to specify a device
and location to be updated. Please read README.dfu.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, a very simple firmware management protocol driver
is implemented. It will take a common FIT image firmware in a capsule
file and apply the data using dfu backend storage drivers via
update_fit() interface.
So "dfu_alt_info" variable should be properly set to specify a device
and location to be updated. Please read README.dfu.
Fit image is a common file format for firmware update on U-Boot, and
this protocol works neatly just as a wrapper for one.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A capsule tagged with the guid, EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID,
is handled as a firmware update object.
What efi_update_capsule() basically does is to load any firmware management
protocol (or fmp) drivers contained in a capsule, find out an appropriate
fmp driver and then invoke its set_image() interface against each binary
in a capsule.
In this commit, however, loading drivers is not supported.
The result of applying a capsule is set to be stored in "CapsuleXXXX"
variable, but its implementation is deferred to a fmp driver.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Memory range capsule gives us a way to notify that some memory regions
should be left untouched across the next reset.
See UEFI specification, section 8.5.3.
Since how we should handle this kind of capsule is totally up to
the system, no implementation will be added in this commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Capsule data can be loaded into the system either via UpdateCapsule
runtime service or files on a file system (of boot device).
The latter case is called "capsules on disk", and actual updates will
take place at the next boot time.
In this commit, we will support capsule on disk mechanism.
Please note that U-Boot itself has no notion of "boot device" and
all the capsule files to be executed will be detected only if they
are located in a specific directory, \EFI\UpdateCapsule, on a device
that is identified as a boot device by "BootXXXX" variables.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, skeleton functions for capsule-related API's are
added under CONFIG_EFI_UPDATE_CAPSULE configuration.
Detailed implementation for a specific capsule type will be added
in the succeeding patches.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.
After the commit 3149e524fc, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.
This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.
Fixes: 3149e524fc ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A previous commit is adding EFI_TCG2_PROTOCOL, which in it's eventlog
support registers an EFI configuration table.
Let's add the necessary GUID so 'efidebug table' command can display
table names properly.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In the previous patches we only introduced a minimal subset of the
EFI_TCG2_PROTOCOL protocol implementing GetCapability().
So let's continue adding features to it, introducing the
GetEventLog() and HashLogExtendEvent() functions.
In order to do that we first need to construct the eventlog in memory,
specifically in EFI_BOOT_SERVICES_DATA memory and a configuration table
from EFI_ACPI_MEMORY_NVS.
U-Boot won't currently add any events to the log or measure any
components, but will expose the necessary EFI APIs for applications
to do so.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A following patch introduces support for the EFI_TCG2_PROTOCOL
eventlog management.
Introduce the necessary tpm related headers
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The current tpm2_pcr_extend is hardcoded using SHA256.
Let's make the actual command to the TPM2 configurable so we can support
a wider range of algorithms and keep the current command line as-is i.e
limited to SHA256 only
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use logging functions instead of printf() and debug().
Change logging messages for uclass creation and destruction to log_debug().
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Kontron SMARC-sAL28 board uses that flash.
This is the same change as in the linux commit f3418718c0ec ("mtd:
spi-nor: Add support for w25q32jwm").
Signed-off-by: Michael Walle <michael@walle.cc>
Reported-by: Leo Krueger <leo.krueger@zal.aero>
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.
After the commit 3149e524fc, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.
This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.
Fixes: 3149e524fc ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.
Fixes: a294ead8d2 ("dm: Use an allocated array for run-time device info")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.
Fixes: b73d61a556 ("x86: zimage: Add a little more logging")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It seems nobody tested the debug() option in spin_lock_irqsave().
Currently, when #define DEBUG, it spoils the compiler with
In file included from drivers/usb/dwc3/gadget.c:18:
drivers/usb/dwc3/gadget.c: In function ‘dwc3_gadget_set_selfpowered’:
include/log.h:235:4: warning: ‘flags’ is used uninitialized in this function [-Wuninitialized]
235 | printf(pr_fmt(fmt), ##args); \
| ^~~~~~
drivers/usb/dwc3/gadget.c:1347:17: note: ‘flags’ was declared here
1347 | unsigned long flags;
| ^~~~~
and so on...
Drop useless debug() call to make compiler happy.
Fixes: 0c06db5983 ("lib, linux: move linux specific defines to linux/compat.h")
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
timeout should be in "millisecond" instead of second,
so divided it by 1000 when calculate the load value.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
This commit add the support of signature check for config node
in spl/tpl when the function spl_load_simple_fit is used.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
USB clocks were completely forgotten as driver would always return 0 even if clock ID was unknown.
This behaviour changed with "IPQ40xx: clk: dont always return 0" and this will now causes the USB-s to fail probing as clock enable will return -EINVAL.
So to fix that lets add all of the USB clocks to the driver.
Fixes: 430e1dcf ("IPQ40xx: Add USB nodes")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Currently the driver will go through the clock ID-s and set/enable them as needed.
But if the ID is unknown it will fall through the switch case to the default case which will always return 0.
This is not correct and default cases should return a error code since clock ID is unknown.
So lets return -EINVAL instead.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
There is no point in having break statements in the switch case as there is already a return before break.
So lets drop them from the driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr().
While we are here, lets also alphabetise the includes.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Move CONFIG_SYS_PROMPT_HUSH_PS2 in Kconfig, depending
on CONFIG_HUSH_PARSER, and remove the default value defined
in cli_hush.c under __U_BOOT__.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to define default option for this macro which is
already done in common/cli_hush.c.
87 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2
88 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
89 #endif
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
CONFIG_TIMESTAMP is not related to the RTC drivers. It does not make any
sense to let the updating of the RTC by the sntp command depend on it.
Drop the CONFIG_TIMESTAMP checks.
Furthermore function dm_rtc_set() is enabled by CONFIG_DM_RTC. There is no
reason to require CONFIG_CMD_DATE when using a driver model RTC. The UEFI
sub-system can consume the RTC functions even if there is not date command.
Only check CONFIG_CMD_DATE when using a non-driver model RTC.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for dealing with string operands, including reading a string
from memory into an environment variable and concatenating two strings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Behún <marek.behun@nic.cz>
At present a ulong is used to hold operand values. This means that
strings cannot be used. While most operations are not useful for strings,
concatenation is. As a starting point to supporting strings, convert the
code to use a struct instead of a ulong for operands.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when more than one substitution is made this function
overwrites its buffers. Fix this bug and update the tests now that they
can pass.
Also update the debug code to show all substrings, since at present it
omits the final one.
Fixes: 855f18ea0e ("setexpr: add regex substring matching and substitution")
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the 'nlen' variable increases with each loop. If the previous
loop had back references, then subsequent loops without back references
use the wrong value of nlen. The value is larger, meaning that the string
terminator from nbuf is copied along to the main buffer, thus terminating
the string prematurely.
This leads to the final result being truncated, e.g. missing the last
(unmatched) part of the string. So "match match tail" become
"replaced replaced" instead of "replaced replaced tail".
Fix this by resetting nlen to the correct value each time around the lop.
Fixes: 855f18ea0e ("setexpr: add regex substring matching and substitution")
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tests to check for buffer overflow using simple replacement as well
as back references. At present these don't fully pass.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function always allocates a large amount of stack, and
selects its own size for buffers. This makes it hard to test the code
for buffer overflow.
Separate out the inner logic of the substitution so that tests can call
this directly. This will allow checking that the algorithm does not
overflow the buffer.
Fix up one of the error lines at the same time, since it should be
printing nbuf_size, not data_size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tests for the setexpr regex commands.
Note that these tests currently crash on sandbox due to an existing bug in
the setexpr implementation, so two of the tests are commented out.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function assumes that a size of 4 refers to a ulong. This
is true on 32-bit machines but not commonly on 64-bit machines.
This means that the 'l' specify does not work correctly with setexpr.
Add an explicit case for 32-bit values so that 64-bit machines can still
use the 'l' specifier. On 32-bit machines, 64-bit is still not supported.
This corrects the operation of the default size (which is 4 for setexpr),
so update the tests accordingly.
The original code for reading from memory was included in 47ab5ad145
("cmd_setexpr: allow memory addresses in expressions") but I am not adding
a Fixes: tag since that code was not written with 64-bit machines in mind.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these values are open-coded in a few places. Add constants so
the meaning is clear.
Also add a comment to cmd_get_data_size()
Signed-off-by: Simon Glass <sjg@chromium.org>
This command currently has no tests. Add some for basic assignment and the
integer operations.
Note that the default size for setexpr is ulong, which varies depending on
the build machine. So for sandbox on a 64-bit host, this means that the
default size is 64 bits.
Signed-off-by: Simon Glass <sjg@chromium.org>
On more places is used pattern 'command > $@ || rm -f $@'. But it does not
propagate failure from 'command' as 'rm -f' returns success.
Fix it by calling 'false' to correctly propagate failure after 'rm -f'.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
- ProxyDHCP allows a second DHCP server to exist alongside your main
DHCP server and supply additional BOOTP related options
- When u-boot sends out a DHCP request, the real DHCP server will
respond with a normal response containing the new client IP address
while simultaneously the ProxyDHCP server will respond with a blank
client IP address and a `bootfile` option
- This patch adds CONFIG_SERVERIP_FROM_PROXYDHCP (default false) to
enable this behavior and CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS
(default 100) which tells u-boot to wait additional time after
receiving the main DHCP response to give the ProxyDHCP response time
to arrive
- The PXE spec for ProxyDHCP is more complicated than the solution
added here as diagramed on page 16:
http://www.pix.net/software/pxeboot/archive/pxespec.pdf:
```
DHCP Discover will be retried four times. The four timeouts are 4, 8, 16
and 32 seconds respectively. If a DHCPOFFER is received without an Option
timeouts in an attempt to receive a PXE response.
```
- Adding a simple delay worked for my purposes but let me know if a
more robust solution is required
Signed-off-by: Lyle Franklin <lylejfranklin@gmail.com>
As FDTDIR label doesn't specify exact file to be loaded, it should
not fail if no file exists in the directory. In this case try to boot
with internal FDT if it exists.
Signed-off-by: Anton Leontiev <aleontiev@elvees.com>
The origin patch didn't have this change and it was caused by manual
resolution where additional backslash was added.
Fixes: 6723b4c6ca ("binman: Call helper function binman_set_rom_offset() to fill offset")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The test should be checking whether $flags are non-zero and $drv_flags
contain specific flags, however these two sets of flags are separate,
and the two tests should be logically ANDed, not bitwise ANDed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 6900797678 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") the cros-ec-keyb driver has started using this
command, but the sandbox EC emulator does not recognize it and
continuously prints:
** Unknown EC command 0x67
This patch makes the sandbox driver send basic responses to the command,
but the response only supports keyboard scans for now.
The EC side of this command stores and returns events from a queue, and
returns -EC_RES_UNAVAILABLE when there are no new events. This should be
possible to implement by hooking into the SDL event queue (perhaps via
sandbox_sdl_poll_events). Implementing that is a bit harder to do since
the existing sandbox code is discarding pending keyboard events, then
reading the current keyboard state.
Since the EC emulator never explicitly fails to work on this command,
the fallback to the older command will not trigger and will not be
tested anymore.
Fixes: 6900797678 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present if CROSS_COMPILE contains a tilde, such as
~/.buildman-toolchains/gcc-7.3.0-nolibc/i386-linux/bin/i386-linux-gcc
then binman gives a confusing error:
binman: Error 255 running '~/..buildman-toolchains/gcc-7.3.0- ...
Fix this by expanding it out before running the tool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a tool to update or insert an Octeon specific header into the U-Boot
image. This is needed e.g. for booting via SPI NOR, eMMC and NAND.
While working on this, move enum cvmx_board_types_enum and
cvmx_board_type_to_string() to cvmx-bootloader.h and remove the
unreferenced (unsupported) board definition.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Using ram_get_info() is complicated and does not work after relocation.
Now that gd->ram_size holds the full RAM size, let's use it instead and
remove the ram_get_size logic completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
With this patch, gd->ram_size now holds to full RAM size detected by the
DDR init code. It introduces the get_effective_memsize() function to
report the maximum usable RAM size in U-Boot to the system instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Don't use "platdata_auto_alloc_size" but "priv_auto_alloc_size" instead
to auto allocate the private data struct, which is referenced via
dev_get_priv() in this driver. This fixes an ugly bug detected while
trying to boot via SPI NOR.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC.
Here the only 2 instructions are allowed in the first few bytes of the
image. And these instructions need to be one branch and a nop. This
patch adds the necessary nop after the nop, to that the common MIPS
image is compatible with this Octeon header.
The tool to patch the Octeon boot header into the image will be send in
a follow-up patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Pull request for UEFI sub-system for efi-2021-01-rc3 (3)
The following errors are corrected:
* Linux crash when accessing UEFI variables at runtime.
* UEFI variable using standalone MM on 32 bit systems
not working due to missing packing of communication
structure
* NULL dereference when FAT16 root directory is full
* FAT files with a short file name starting with 0xE5 (0x05 in directory
entry) where treated as deleted.
The UEFI SetTime() service is enabled on ARM QEMU.
commit 1fabfeef506c ("efi_loader: parameter check in GetNextVariableName()")
introduces a check using u16_strnlen(). This code is used on EFI
runtime variables as well, so unless we mark it as runtime, the kernel
will crash trying to access it.
Fixes: 1fabfeef506c ("efi_loader: parameter check in GetNextVariableName()")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable EFI_SET_TIME on the sandbox and QEMU ARM to ensure that we compile
and test the relevant code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Using constants instead of anonymous numbers increases code readability.
Fixes: 704df6aa0a ("fs: fat: refactor write interface for a file offset")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
0x05 is used as replacement letter for 0xe5 at the first position of short
file names. We must not skip over directory entries starting with 0x05.
Cf. Microsoft FAT Specification, August 30 2005
Fixes: 39606d462c ("fs: fat: handle deleted directory entries correctly")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When trying to create a file in the full root directory of a FAT32
filesystem a NULL dereference can be observed.
When the root directory of a FAT16 filesystem is full fill_dir_slot() must
return -1 to signal that a new directory entry could not be allocated.
Fixes: cd2d727fff ("fs: fat: allocate a new cluster for root directory of fat32")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present if CONFIG_RESET is not enabled, this code shows a warning:
designware_i2c_ofdata_to_platdata() i2c_designware_pci i2c2@16,0:
Can't get reset: -524
Avoid this by checking if reset is supported, first.
Fixes: 622597dee4 ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Glass <sjg@chromium.org>
The hidden I2C slave is also present on the Armada 8k AP806. Testing
shows that this I2C slave causes the same issues as Armada 38x.
Disabling that I2C slave fixes all these issues.
I2C blocks on the Armada 8k CP110 are not affected.
Extend the I2C slave disable to Armada 8k as well.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Regulator can be set to "always-on".
It's not error about enable/disable. It needs to check about
its condition.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
For eMMC HS400 mode, the DLL reset is a required step for mmc rescan.
This step has not been documented in reference manual, but the RM will
be fixed sooner or later.
In previous commit to support eMMC HS400,
db8f936 mmc: fsl_esdhc: support eMMC HS400 mode
the steps to configure DLL could be found in commit message,
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
14. Wait for delay chain to lock.
these would be fixed as,
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
13.1 Write DLLCFG0[DLL_RESET] to 1 and wait for 1us,
then write DLLCFG0[DLL_RESET]
14. Wait for delay chain to lock.
This patch is to add the step of DLL reset, and make sure delay chain
locked for HS400.
Fixes: db8f93672b ("mmc: fsl_esdhc: support eMMC HS400 mode")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
All of the existing quirks add retries to various calls of mmc_send_cmd.
mmc_send_cmd_quirks is a helper function to do this retrying behavior. It
checks if quirks mode is enabled, and if a specific quirk is activated it
retries on error.
This also adds mmc_send_cmd_retry, which retries on error every time
(instead of if a quirk is activated).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The AT91 architecture now has two possible timer blocks, the old PIT timer
and the new PIT64B.
The timer.c file has an old non DM driver that works for platforms
that do not use the ATMEL_PIT_TIMER DM-based driver.
Update the Makefile to select this old driver in case neither of the
ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected.
Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older
at91 clock.c driver. Remove it from the compilation list and adapt cpu.c
arch_cpu_init() to avoid calling at91_clock_init() which is wrong
anyway.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Align the pin setup for sdhci0 with linux kernel.
This means to have slew rate enable and high drive strength.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
If the clock driver does not offer a clk_enable ops, then the system will
return -ENOSYS.
The clk_enable works with CCF (common clock framework).
Some clocks in some cases (like the generic clock for some products: sama5d2)
do not have the clk_enable primitive, and in this case probing of the driver
will fail.
This patch changes the behavior to return an error in case there is really
an error, and not a missing primitive.
If the clock driver does not have an enable primitive, most likely clocks
are always enabled or enabled in the set_rate primitives.
Fixes: 81f16438d4 ("mmc: atmel-sdhci: enable the required generic clock")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
- STM32 MCU's DT update
- Add DHCOM based STM32MP15x PicoITX board
- Correct ALIGN macro usage for on syram for SPL dcache support
- Fixes on DHCOM: uSD card-detect GPIO and Drop QSPI CS2
- Fix compilation issue for spl_mmc_boot_partition
- Fix MTD partitions for serial boot
- Add support of MCU HOLD BOOT with reset for stm32 remoteproc
(prepare alligneent with kernel DT)
- Correct bias information and support in STM32 soc and STMFX
- Support optional vbus in usbphyc
- Update FIT examples to avoid kernel zImage relocation before decompression
Update kernel load address for FIT examples to avoid relocation:
- Kernel example uses Image.gz with U-Boot gzip decompression
at final kernel location 0x0xC0008000.
- Copro example loads zImage at a correct location (0xC4000000),
to avoid zImage relocation before decompression by kernel code.
An other solution to avoid zImage relocation is to align
the kernel load and entry address with the real location in FIT
(the relocation of zImage is skipped in U-Boot bootm command for
identical address) but it is less flexible because this offset
depends on FIT content:
For example:
## Loading kernel from FIT Image at c2000000 ...
Using 'ev1' configuration
Trying 'kernel' kernel subimage
Description: Linux kernel
Created: 2020-10-22 9:08:32 UTC
Type: Kernel Image
Compression: uncompressed
Data Start: 0xc20000cc
The kernel offset in FIT is 0xCC in FIT and zImage is decompressed at
0xC0008000 by kernel code:
kernel {
description = "Linux kernel";
data = /incbin/("zImage");
type = "kernel";
arch = "arm";
os = "linux";
compression = "none";
load = <0xC20000cc>;
entry = <0xC20000cc>;
hash-1 {
algo = "sha1";
};
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch adds support for optional vbus regulator.
It is managed on phy_power_on/off calls and may be needed for host mode.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Update pin name to avoid duplicated name with SOC GPIO
gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix.
This pin name can be used in pinmux command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The device name is used in pinmux command and in log trace
so it is better to use the parent parent name ("stmfx@42" for
example) than a generic name ("pinctrl" or "stmfx-gpio")
to identify the device instance.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use the bias configuration for all the GPIO configurations and not
only for input GPIO, as indicated in Reference manual
(Table 81. Port bit configuration table).
Fixes: 43efbb6a3e ("gpio: stm32: add ops get_dir_flags")
Fixes: f13ff88b61 ("gpio: stm32: add ops set_dir_flags")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Display the bias information for input gpios or AF configuration,
and not only for output pin, as described in Reference manual
(Table 81. Port bit configuration table).
Fixes: da7a0bb1f2 ("pinctrl: stm32: add information on pin configuration")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The coprocessor is running as soon as the hold boot is de-asserted.
So indicate this running state and save the resource table even
if the protective assert, to avoid autonomous reboot, is failed.
This error case should never occurs.
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use the reset function to handle the hold boot bit in RCC
with device tree handle with MCU_HOLD_BOOT identifier.
This generic reset allows to remove the two specific properties:
- st,syscfg-holdboot
- st,syscfg-tz
This patch prepares alignment with kernel device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Handle the register RCC_MP_GCR without SET/CLR registers
but with a direct access to bit BOOT_MCU:
- deassert => set the bit: The MCU will not be in HOLD_BOOT
- assert => clear the bit: The MCU will be set in HOLD_BOOT
With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
added in binding stm32mp1-resets.h
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Remove the update of the MTD partitions in kernel device tree
for serial boot (USB / UART), and the kernel will use the MTD
partitions define in the loaded DTB because U-Boot can't known the
expected flash layout in this case.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
spl_mmc_boot_partition is only defined when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour
call: the address must use ALIGN_DOWN and size can use ALIGN macro.
With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for
STM32MP15x the computed address was 30000000 instead of 2ff00000.
Fixes: 43fe9d2fda ("stm32mp1: mmu_set_region_dcache_behaviour")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Commit 4b2be78ab6 ("time: Fix get_ticks being non-monotonic")
puts in evidence that get_ticks is called before timer initialization.
Fix it by initializing timer before relocation.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.
This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:
memory@90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:
memory {
device_type = "memory";
reg = <0x00 0x00>;
};
memory@90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.
The same error handling exists in drivers/usb/host/xhci-dwc3.c already
added by commit d648a50c0a ("dwc3: move phy operation to core.c").
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On some board, the ID pin is not connected so the B session must be
overridden with "u-boot,force_b_session_valid" but the VBus sensing
must continue to be handle.
To managed it, this patch adds a new DT field
"u-boot,force-vbus-detection" to use with "u-boot,force_b_session_valid"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled
Based on the similar patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.
Based on the simialr patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.
Based on the similar patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Pull request for UEFI sub-system for efi-2021-01-rc3 (2)
The parameter check for UEFI service GetNextVariableName() is corrected.
The dependencies of CONFIG_DFU_TFTP are simplified.
The set of supported hash algorithms reported by the EFI_TCG2_PROTOCOL is
corrected.
If GetNextVariableName() is called with a non-existing combination of
VariableName and VendorGuid, return EFI_INVALID_PARAMETER.
If GetNextVariableName() is called with a string that is not zero
terminated, return EFI_INVALID_PARAMETER.
Reformat a line over 80 characters.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since CONFIG_UPDATE_COMMON always selects CONFIG_DFU_WRITE_ALT, we can
drop the latter from dependencies of CONFIG_DFU_TFTP.
Fixes: 3149e524fc ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Xilinx changes for v2021.01-rc3
Microblaze:
- Enable GC
- Get rid of xparameters.h and switch to DT for CFI
- Fix config file
tpm:
- Fix TPM code
zynqmp:
- Enable TPM by default
- Remove unused macros
fru:
- Several fixes especially use limit for recording
If customs fields in board area are used it will likely go over allocated
space in struct fru_board_data. That's why calculate limit of this
structure to make sure that different data is not rewritten by accident.
When limit is reached stop to record fields.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
capture variable is bool which is just one byte and it is just causing
unaligned accesses. Better to have it as last entry in the structure.
It also simplify offset calculation for initial header copy.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to have these macros. But record offsets of missing
register in the structure for future use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need for GD to be used and priv variable is unused.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove fixed configuration and detect flash based on DT.
Also increase amount of flash sectors to 2048 because on kc705 flash has
1027 sectors.
Bank # 1: CFI conformant flash (16 x 16) Size: 128 MB in 1027 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8962
Erase timeout: 4096 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
XIP is not enabled in SPL. SPL_NOR is enabled but any macro setting with
using SYS_FLASH_BASE are wrong because it is not aligned with DM.
That's why change these macro and align them with TEXT_BASE macro.
Information should be find at run time based on DT but implementation is
not done yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable caches by default. For now just simplify config file but it should
be read from DT or PVRs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
A lot of configs has been moved to Kconfig and it ends up in ifdef mess
with no bodies. That's why remove all of them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
GCC's garbage collector works for Microblaze for quite a long time but none
has enabled it.
The same change has be done for example by commit fac4790491 ("arc:
Eliminate unused code and data with GCC's garbage collector").
Before:
text data bss dec hex filename
588760 33592 39192 661544 a1828 u-boot
After:
text data bss dec hex filename
504504 32164 38608 575276 8c72c u-boot
Which saves almost 15% of memory footprint.
Also group symbols/functions to proper section.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
offset is the offset in the file read, not the offset in the destination
buffer.
If the offset is not null, this will lead to a memory corruption.
So, for now, we are returning an error if the offset is used.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
sqfs_decompressor_init() returns a value, so it's better to use it than
to force the return value to EINVAL (it could be ENOMEM)
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Resetting the context on error will prevent some checks like:
if (!ctx.cur_dev)
To pass when the probe method has failed
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
finfo.blk_sizes may not be freed in case of error in the for loop
Setting it to null and freeing it at the end makes prevents that from
happening.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
if sqfs_tokenize(rel_tokens, rc, rel); fails, the function exits
without freeing the array base_tokens.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
the return value of sqfs_tokenize(rel_tokens, rc, rel); wasn't checked.
(but "ret" value was !)
This is obviouly a typo.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
sqfs_closedir() should be called to free memory allocated by
sqfs_opendir()
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
path, target, res, rem and sym_tokens were not free on error nor success.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Using only one label permits to prevents bugs when moving code around.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
add missing squashfs function to prevent dangling or null pointers.
For exemple, when calling test [ -e somefile ], squashfs.exists may be
called.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
In show_dir() if we hit a ROOT_ITEM, we can exit with uninitialized
@ret.
Fix it by initializing it to 0.
Reported-by: Coverity CID 312955
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
In btrfs_lookup_path() the local variable @type should always be updated
after we hit any file/dir.
But if @filename is NULL from the very beginning, then we don't
initialize it and return it directly.
To prevent such problem from happening, we initialize @type to
BTRFS_FT_UNKNOWN.
For normal execution route, it will get updated for each filename we
resolved.
Buf if we didn't find any path, we check if the type is still FT_UNKNOWN
and ret == 0. If true we know there is something wrong, just return
-EUCLEAN to inform the caller.
Reported-by: Coverity CID 312958
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
I've created a squashfs file system with Yocto (it use squashfs-tools)
and u-boot command sqfsls give the error:'Error while searching inode:
unknown type.'
After some digging in the code I found that the index is off by 1.
This patch fix this issue and I can successful use the sqfsls command.
After search for the squashfs format I found a link talk about a
similar issue but this time in the documentation. The link is:
https://github.com/AgentD/squashfs-tools-ng/commit/e6588526838caece9529
Signed-off-by: Gerard Koskamp <gerard.koskamp@nedap.com>
Tested-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
This change sets the output (hardware) polarity register instead of the
input (software) polarity register for the bcm6858 LED controller. The
logic was inverted (a LED configued active high behaved as active low).
Signed-off-by: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Also change back SYS_MEMTEST_END to 0x00f00000. 0xe00000 was wrong and
introduced due to the global Kconfig migration of this option in u-boot.
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
The -i option of the dumpimage tool has been removed so it should no
longer be documented in the README file. Refer readers to the tool's
help output rather than maintain a copy of the usage in the README.
Finally, adjust the example dumpfile invocation in imagetool.h to use
the -o option instead of the removed -i option.
Fixes: 12b831879a ("tools: dumpimage: Simplify arguments")
Signed-off-by: Tyler Hicks <tyhicks@linux.microsoft.com>
Cc: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Martyn Welch <martyn.welch@collabora.com>
In the function get_random_data, strerrno is called with
the variable ret (which is the return of the function
clock_gettime). It should be called with errnor. This
commit fixes this mistake.
Reported-by: Coverity (CID: 312956)
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
According to the manpage of rand, it is recommended
to use random instead of rand. This commit updates
the function get_random_data to use random.
Reported-by: Coverity (CID: 312953)
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Re-submitted because of missing description and signed-off.
flags reset in board_init caused bugs when executing command like editenv
because the reallocated flag was lost.
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Signed-off-by: Arnaud Aujon Chevallier <arnaud@intelibre.fr>
The function mmc_offset_try_partition searches the MMC partition for
locating environment data, by comparing the partition names with config
"u-boot,mmc-env-parition". However, it only compares the first word-size
bytes (size of 'const char *'), which may make the function to find
unintended partition.
Correct the function not to partially compare the partition name with
config "u-boot,mmc-env-partition".
Fixes: c9e87ba665 ("env: Save environment at the end of an MMC partition")
Signed-off-by: Hoyeonjiki Kim <jigi.kim@gmail.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and
IE_INV set, but I2C cannot have those bits set. This adds a separate
default for SCCB.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
How to add an emulated disk to QEMU may not be known to the user.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Allow attaching a virtual SATA disk to QEMU RISC-V by implying
AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in
.config.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
This commit imports device tree files that are related to Allwinner V3
series from Linux commit 3650b228f83a ("Linux 5.10-rc1").
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The reference design of Allwinner V3 series uses an
AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the
first community-available V3s board, Lichee Pi Zero, omitted it.
Allow to introduce support for the PMIC on boards with it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A new compatible string is introduced for V3 CCU, because it has a few
extra features available.
Add the compatible string to the clock driver. As the extra features are
not touched, just share the description struct now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A new compatible string is introduced for V3 GPIO, because it has more
pins available than V3s.
Add the compatible string to the GPIO driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Allwinner V3/Sochip S3 uses the same die with Allwinner V3s/S3L, but V3 comes
with no co-packaged DDR (DDR3 is usually used externally), and S3L comes
with co-packaged DDR3.
Add support for Allwinner V3/S3 chips by add SoC names to original V3s
choice, and allow to select DDR3.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The PinePhone is a smartphone produced by Pine64, with an A64 SoC,
2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel,
and Quectel EG25-G modem.
There are two main board revisions: 1.1 for early adopters, and 1.2
for mass production. Since there is code to detect the board revision
at boot, one config/image can support both boards.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Import updated device trees from Linux tag v5.9. This picks up new
hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI
files for the Pinebook and the Teres-I, since the ANX6345 bridge is
now supported upstream.
A couple of headers needed updates for recently-added hardware support.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE.
This meant that, regardless of the DT chosen by SPL (either by changing
the header in the image or by the selection code at runtime), Linux
always used the default DT.
By using the name from the SPL header (which, because of the previous
commit, always matches the DT used by U-Boot proper), Linux also sees
the same board as U-Boot/SPL, even if the boot script later loads a DT
from disk.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: remove no longer needed CONFIG_SPL_LOAD_FIT guards]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This overwrites the name loaded from the SPL image. It will be different
if there was previously no name provided, or if a more accurate name was
determined by the board variant selection logic. This means that the DT
name in the SPL header now always matches the DT appended to U-Boot.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: move function under CONFIG_SPL_LOAD_FIT guard]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There are two different publicly-released revisions of the PinePhone
hardware, versions 1.1 and 1.2; and they need different device trees.
Since some GPIO pins were rerouted, we can use that to distinguish
between them.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Instead of using an entirely separate matching algorithm, simply update
the name of the DT we want to match. Enabling this logic does not depend
on the FIT config name, only on the initial guess of the board name.
Importantly, the initial guess must be "sun50i-a64-pine64-plus", because
otherwise the logic would trigger when "sun50i-a64-pine64-lts" was
written to the SPL header.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This moves the validity checking and typecasts all to one place away
from the string comparison logic, and it detangles the compile-time
and runtime control flow.
The new helper will also be used by U-Boot proper in a future commit.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: protect new function with CONFIG_SPL_LOAD_FIT]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The variable "cmp_str" always leaves me wondering if it is the DT name
of the current board (yes) or DT name in the FIT config entry (no).
In preparation for expanding the functionality here, rename it to
something that obviously means "this is the DT name we are looking for".
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
- Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
- fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
- Fix USB support for rk3399 Pinebook Pro;
- Fix SPI boot for rk3399 boards other than Bob;
- Fix 32bit boards firmware build without SPL_OPTEE support;
- Fix rockchip display driver license;
onenand_probe() function is missing to set mtd->type. So set same type as
which sets onenand Linux kernel driver.
After this change 'mtd list' prints correct type instead of 'Unknown'.
Signed-off-by: Pali Rohár <pali@kernel.org>
set_gpmc_cs0() sets wrong timings and size for Nokia N900 onenand flash.
Fix that by setting the correct timings and size from the board code
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Include emmc/nand suffix into bootmenu script names and fix leaking sleep
processes when asynchronously waiting for them. 'wait -n' is not provided
by /bin/sh, so run script under bash.
Signed-off-by: Pali Rohár <pali@kernel.org>
After commit d5243359e1 ("OMAP24xx I2C: Add support for set-speed")
U-Boot is unstable to reset lp5523 led. That commit added pooling for i2c
poll ARDY bit which apparently is never set. It is not known what is
happening here.
Purpose of resetting lp5523 led in Nokia RX-51 code is just to turn off
very bright led which is powered on by NOLO and expects next boot image
(kernel or U-Boot) to turn it off.
After testing we observed that just disabling lp5523 led is working fine.
So as a workaround to this ARDY bit i2c issue we disable lp5523 led instead
of resetting it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
After commit 04a2ea248f ("mmc: disable UHS modes if Vcc cannot be
switched on and off") U-Boot started crashing on Nokia RX-51 while
initializing mmc and caused reboot loop.
It looks like that some clocks were not enabled and this patch fixes U-Boot
mmc crash.
Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
By default CONFIG_LOGLEVEL seems to be set to 4 which is
too low and doesn't show dev_info/dev_notice/dev_warn
messages on console. This has been deliberately set low
globally to be conservative setting across the board due to
primary bootloader size limitations. It is best to tune
per board config as per user needs.
On K3 we have separate SPL and u-boot configs so we
can afford to set u-boot CONFIG_LOGLEVEL to 7.
On AM65 this patch causes u-boot.img size to change from
932KB to 940KB with 1 line additional print during
MMC boot. i.e. details of Net subsystem
"Net: K3 CPSW: nuss_ver: 0x6BA00102 cpsw_ver: 0x6BA80102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000"
Similar 8KB difference was seen on J721E.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Function twl4030_i2c_read() is like twl4030_i2c_read_u8() but instead of
single value it rather returns array of values.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With commit 6900797678 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") check_for_keys() tries to read keyboard
strokes using EC_CMD_GET_NEXT_EVENT. But the sandbox driver does
not understand this command. We need to reply with
-EC_RES_INVALID_COMMAND to force check_for_keys() to fall back to
use EC_CMD_MKBP_STATE. Currently the driver prints
** Unknown EC command 0x67
in this case. With the patch the message is suppressed.
In a future patch we should upgrade the sandbox driver to provide
EC_CMD_GET_NEXT_EVENT support.
Fixes: 6900797678 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Erasing the flash can take over a second on some devices and the EC is
not responsive during this time. Update the timeout to 5 seconds to cope
with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The EC now requires that the offset field be set correctly when checking
on hash status. Update the code to handle this. Use the same message
struct in both functions to reduce stack space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a commit tag to allow the Patchwork URL to be specified in a commit.
This can be handy for when you submit code to multiple projects but don't
want to use the -p option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an argument to allow specifying the the patchwork URL. This also adds
this feature to the settings file, either globally, or on a per-project
basis.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new argument to allow the URL of the patchwork server to be
speciified. For now this is hard-coded in the main file, but future
patches will move it to the settings file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present values from the settings file are only applied to the main
parser. With the new parser structure this means that some settings are
ignored.
Update the implementation to set defaults across the main parser and all
subparsers. Also fix up the comments, since ArgumentParser is being used
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present patman tries to assume a default subcommand of 'send', to
maintain backwards compatibility. However it does not cope with
arguments added to the default command, so for example 'patman -t'
does not work.
Update the logic to handle this. Also update the CC command to use 'send'
explicitly, since otherwise patman gets confused with the patch-filename
argument.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-01-rc3
A part of the EFI_TCG2_PROTOCOL is implemented.
A unit test is supplied.
The following bugs are fixed:
* incorrect buffer size in efi_file_setinfo() leading to creash in SCT
* a crash in UEFI selftest on the sandbox due to removed drivers
* missing newlines in log message for the UEFI RNG driver
Since U-boot EFI implementation is getting richer it makes sense to
add support for EFI_TCG2_PROTOCOL taking advantage of any hardware TPM
available on the device.
This is the initial implementation of the protocol which only adds
support for GetCapability(). It's limited in the newer and safer
TPMv2 devices.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A following patch introduces EFI_TCG2_PROTOCOL.
Add the required TPMv2 headers to support it.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When copying a string with must allocate a byte for the terminating '\0' in
the target buffer.
Fixes: fbe4c7df00 ("efi_loader: enable file SetInfo()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add missing newline to log messages in efi_rng_register() otherwise
something like below would be shown
Scanning disk virtio-blk#31...
Found 2 disks
Missing RNG device for EFI_RNG_PROTOCOLNo EFI system partition
Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When calling ExitBootServices during out unit tests we should not detach
devices as we need console output for runtime tests.
Fixes: 529441ca89 ("efi_loader: Disable devices before handing over control")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rockchip has many 32bit SoCs and some of them are support SPL_OPTEE now,
only boards with SPL_OPTEE support can fit BINMAN well, other boards
will fail at initr_binman() in U-Boot proper after below patch,
eg. rv1108 board.
83187546ae binman: Support multiple images in the library
Fixes: 79030a4861 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Commit c4cea2bbf9 ("rockchip: Enable building a SPI ROM image on bob")
added an alias spi1 referring to spi@ff1d0000, however there was already
an alias spi0 referring to the same node in rockpro64's u-boot.dtsi, and
having both aliases present broke booting from SPI flash for this board.
Remove the spi0 alias, set the default bus for SPI flash to 1, and
enable support for numbered aliases in SPL so that it uses the same bus
numbering as U-Boot proper. This fixes booting from U-Boot in SPI flash
on the rockpro64 board.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bbf9 ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Commit fe97471632 ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.
On rk3399, this needs to detect whether SPL was run via handoff, so
enable that and bloblist kconfigs it needs for chromebook_bob.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
It's possible to chainload U-Boot proper from the vendor firmware in
rk3399 chromebooks, but the way the vendor firmware sets up clocks is
somehow different than what U-Boot expects. This causes the display to
stay devoid of content even though vidconsole claims to work (with
patches in process of being upstreamed).
This is meant to be a rk3399 version of commit d3cb46aa8c ("rockchip:
Init clocks again when chain-loading") which can detect the discrepancy,
but this patch instead checks whether SPL (and therefore the clock init)
was run via the handoff functionality and runs the init if it was not.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
In order to enable the Amlogic SM1 MMC controller fix, we need to add a u-boot specific
MMC controller compatible.
This adds a new meson-sm1-u-boot.dtsi and reworks the other -u-boot.dtsi
to use this for SM1 based boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Amlogic SM1 SoCs doesn't work over 50MHz. When phase sets to 270', it's
working fine over 50MHz on Amlogic SM1 SoCs.
Since Other Amlogic SoCs doens't report an issue, phase value is using
to 180' by default.
To distinguish which value is used adds an u-boot only sm1 compatible.
In future, it needs to find what value is a proper about each SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Move the asm/arch-meson/sd_emmc.h to a local meson_gx_mmc.h,
remove the useless if/then and fix the meson_gx_mmc.c include.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This is a combination of upstream libfdt commits to fix warnings about
comparing signed and unsigned integers:
==========
scripts/dtc/libfdt/fdt.c: In function ‘fdt_offset_ptr’:
scripts/dtc/libfdt/fdt.c:137:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if ((absoffset < offset)
...
==========
For a detailed description of the fixes, see the dtc repo:
https://git.kernel.org/pub/scm/utils/dtc/dtc.git/log/?id=73e0f143b73d808
For this patch the commits between 73e0f143b73d8088 and ca19c3db2bf62000
have been combined and adjusted for the slight differences in U-Boot's
libfdt code base.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
- Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
- coral: Correct max98357 file
- coral: Update smbios tables to latest definition
The accepted binding uses multiple nodes, one for each table type. Update
coral accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since commit 29d2d64ed5 ("x86: Add support for more than 8 MTRRs"),
the maximum number of variable range MTRRs was increased from 8 to 10.
On the BayTrail platform there are only 8 variable range MTRRs. In
mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during
VESA video driver probe. It should have been updated to use dynamically
probed number.
This fixes the boot failure seen on Intel Minnow Max board.
Fixes: 29d2d64ed5 ("x86: Add support for more than 8 MTRRs")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The following bugs are fixed:
* The conitrace command failed to build.
* Non-volatile UEFI variables were not delete form the file store.
The following features are added:
* Support for the FN1 - FN10 keys on crosswire keyboards is added.
* An EFI binary is provided to dump the binary device tree.
tpm2_get_capability() is adjusted in preparation of the implementation
of the EFI_TCG2_PROTOCOL.
after commit 4ab3817ff1 ("clk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag")
Cubieboard7 (based on actions S700 SoC) fails to boot.
It is due to the fact that the default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
would not provide enough memory for clock device to probe (before relocation)
well.
This commit fixes it, by increasing SYS_MALLOC_F_LEN to value 0x2000.
Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
In case there is an EEPROM attached to the KS8851 MAC and the EEPROM
contains a valid MAC address, the MAC address is loaded into the NIC
registers on power on. Read the MAC address out of the NIC registers
and provide it to U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
For implementing the EFI_TCG2_PROTOCOL we need the count field returned by
the TPM when reading capabilities via tpm2_get_capability().
Adjust the implementation of the 'tpm2 get_capability' command accordingly.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For validating the fixed up device tree we need a tool to need to save it
to a file.
dtbdump.efi copies the configuration table with the device tree to a file
on the same partition from which dtbdump.efi was invoked. The file name can
be entered on the console.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When deleting a non-volatile variable it was deleted from memory but the
deletion was not persisted to the file system.
SetVariable() may be called with attributes == 0 to delete a variable. To
determine if the deletion shall be persisted we have to consider the
non-volatile flag in the attributes of the deleted variable and not the
value passed in the call parameter.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Chromebooks and the sandbox use a crosswire keyboard with function keys
FN1 - FN10. These keys are needed when running UEFI applications like GRUB
or the UEFI SCT.
Add support for these keys when translating from key codes to
ECMA-48 (or withdrawn ANSI 3.64) escape sequences.
All escape sequences start with 0x1b. So we should not repeat this
byte in the kbd_to_ansi364 table.
For testing use:
sandbox_defconfig + CONFIG_EFI_SELFTEST=y
$ ./u-boot -D -l
=> setenv efi_selftest extended text input
=> bootefi selftest
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This command was missed when renaming getc() to getchar().
Fixes: c670aeee3d ("common: rename getc() to getchar()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests
- meson64_android: don't show logo on ROM USB boot
- doc: update support matrix and fix vim3/l build instructions
- meson64: relocate config_distro_bootcmmd header
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
default sysinfo driver
Calling 'make V=1 all' on Ubuntu 18.04 with gcc version 9.2.1 and GNU Make
version 4.1 fails on error:
scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references itself (eventually). Stop.
As a workaround expand 'echo-cmd' variable via 'call' construction instead
of expanding it directly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Fixes: ae897022d7 ("Makefile: Fix u-boot-nodtb.bin target")
Now that we can use devicetree to specify this information, drop the old
CONFIG options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.
Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards want to specify the manufacturer or product name but do not
need to have their own sysinfo driver.
Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add information about how to set SMBIOS properties using the devicetree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current tables only support a subset of the available fields defined
by the SMBIOS spec. Add a few more.
We could use CONFIG_SYS_CPU or CONFIG_SYS_SOC as a default for family, but
the meaning of that value relates more to the whole system rather than
just the SoC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Support a way to put SMBIOS properties in the device tree. These can be
placed in a 'board' device in an 'smbios' subnode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As a first step to obtaining SMBIOS information from the devicetree, add
an ofnode parameter to the writing functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a simple binding file for this, so that it is clear what this binding
directory is for.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.
In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.
The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.
Rename everything accordingly.
Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Much of the output is not very useful. The bootm command is quite a bit
quieter. Convert some output to use log_debug().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
With Chrome OS the kernel setup block is stored in a separate place from
the kernel, so it is not possible to access the kernel version string.
At present, garbage is printed.
Add a sanity check to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the top of available DRAM is the same as the top of the range
of the low-memory MTRR.
In fact, U-Boot is allowed to use memory up until the start of the FSP
reserved memory. Use that value for low_end, since it makes more memory
available.
Keep the same calculation as before for mtrr_top, i.e. the top of
reserved memory.
A side-effect of this change is that the E820 tables have a single entry
that extends from the bottom of the memory used by U-Boot to the bottom
of the FSP reserved memory. This includes the bloblist, if ACPI tables
are placed there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful when using Linux's earlycon since the MMIO address must be
provided on some platforms, e.g.:
earlycon=uart8250,mmio32,0xddffc000,115200n8
However this is only for debugging, so don't show it by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This table is not needed if a v2 TPM is in use. Add a condition to avoid
adding it when not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Quite a few log_info() calls are included in the x86 code which should use
log_debug() instead. Convert them to reduce unwanted output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use log_debug() instead of debug() in this file, to enable the extra
features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a script to boot Chrome OS from the internal MMC. This involved adding
a few commands and options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Set up a few fields necessarily to make Chrome OS boot without showing a
firmware error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.
However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.
To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is not possible to boot Chrome OS properly without passing some basic
information from U-Boot. This applies even if verified boot is not being
used. Add a structure definition for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present if SSDT and DSDT code is created, only the latter is retained
for examination by the 'acpi items' command. Fix this by only resetting
the list when explicitly requested.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current implementation for DSDT tables is not correct for the case
where there is generated code, as the length ends up being incorrect.
Also, we want the generated code to go first in the table.
Rewrite this piece to correct these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If there is nothing in the SSDT we should not include it in the tables.
Update the implementation to check this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If there is no reset line, this still emits ACPI code for the reset GPIO.
Fix it by updating the check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A few functions have changed to return pin numbers or I2C addresses. The
error checking for some of the callers is therefore wrong. Fix them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful for this command to show the address of the interrupt table.
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these tables do not have the correct header, and there is an
occasional incorrect value due to uninited data. Fix these bugs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these functions are incorrect. Fix them and add some logging
and checking to avoid future problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present all tables are placed starting at address f0000 in memory, and
can be up to 64KB in size. If the tables are very large, this may not
provide enough space.
Also if the tables point to other tables (such as console log or a ramoops
area) then we must allocate other memory anyway.
The bloblist is a nice place to put these tables since it is contiguous,
which makes it easy to reserve this memory for linux using the 820 tables.
Add an option to put some of the tables in the bloblist. For SMBIOS and
ACPI, create suitable pointers from the f0000 region to the new location
of the tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/
20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
u-boot-imx for 2021.1
---------------------
- new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
- converted doc to reST
- fixes for verdin-imx8mm (Toradex)
- fixes for i.MX thermal driver
- mx7ulp: Align the PLL_USB frequency
- mx53: primary/secondary bmode
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
While reviewing feedback it is helpful to see the review comments on the
command line to check that each has been addressed. Add an option to
support that.
Update the workflow documentation to describe the new features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for parsing the contents of a patchwork 'patch' web page
containing comments received from reviewers. This allows patman to show
these comments in a simple 'snippets' format.
A snippet is some quoted code plus some unquoted comments below it. Each
review is from a unique person/email and can produce multiple snippets,
one for each part of the code that attracts a comment.
Show the file and line-number info at the top of each snippet if
available.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is tedious to add review tags into the local branch and errors can
sometimes be made. Add an option to create a new branch with the review
tags obtained from patchwork.
Signed-off-by: Simon Glass <sjg@chromium.org>
Before sending out a new version of a series for review, it is important
to add any review tags (e.g. Reviewed-by, Acked-by) collected by
patchwork. Otherwise people waste time reviewing the same patch
repeatedly, become frustrated and stop reviewing your patches.
To help with this, add a new 'status' subcommand that checks patchwork
for review tags, showing those which are not present in the local branch.
This allows users to see what new review tags have been received and then
add them.
Sample output:
$ patman status
1 Subject 1
Reviewed-by: Joe Bloggs <joe@napierwallies.co.nz>
2 Subject 2
Tested-by: Lord Edmund Blackaddër <weasel@blackadder.org>
Reviewed-by: Fred Bloggs <f.bloggs@napier.net>
+ Reviewed-by: Mary Bloggs <mary@napierwallies.co.nz>
1 new response available in patchwork
The '+' indicates a new tag. Colours are used to make it easier to read.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if we fail to find the upstream then the error output is piped
to wc, resulting in bogus results. Avoid the pipe and check the output
directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes warnings are associated with a file and sometimes with the
patch as a whole. Update the regular expression to handle both cases,
even in emacs mode. Also add support for detecting new files.
Signed-off-by: Simon Glass <sjg@chromium.org>
These lines can indicate a continuation of an error and should not be
ignored. Fix this.
Fixes: 666eb15e92 ("patman: Handle checkpatch output with notes and code")
Signed-off-by: Simon Glass <sjg@chromium.org>
On balance it is easier to use an iterator here, particularly if we need
to insert lines due to new functionality. The only niggle is the need to
keep the previous iterator value around in one case.
Convert this test to use iter().
Signed-off-by: Simon Glass <sjg@chromium.org>
The current functional tests run most of patman. Add a smaller test that
just checks tag handling with the PatchStream class.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the Series-xxx tag is not recognised patman currently reports a fatal
error. This is inconvenient if a new feature is later added to patman that
an earlier version does not support.
Report a warning instead, to allow the user to take action if needed, but
still allow operation to proceed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present warnings are produced across the whole set of patches when
parsing them. It is more useful to associate each warning with the patch
(or commit) that generated it.
Attach warnings to the Commit object and move them out of PatchStream.
Also avoid generating duplicate warnings for the same commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new function in PatchStream to collect the warnings generated while
parsing the stream. This will allow us to adjust the logic, such as
dealing with per-commit warnings.
Two of the warnings are in fact internal errors, so change them to raise
and exception.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new Series-links tag to tell patman how to find the series in
patchwork. Each item is the series ID optionally preceded by the series
version that the link refers to. An empty version indicates this is the
latest series.
For example:
Series-links: 209816 1:203302
Documentation is added in a later patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
One test still uses its own function for capturing output. Modify it to
use the standard one in test_util
Signed-off-by: Simon Glass <sjg@chromium.org>
This operation was unfortunately broken by a recent change. It is now
necessary to use -i in addition to -n, if there are errors or warnings in
the patches.
Correct this by always showing the summary information.
Fixes: f365375975 ("patman: Move main code out to a control module")
Signed-off-by: Simon Glass <sjg@chromium.org>
A recent change removed the base offset from the calculation. This is
used on coral to find the FSP-S binary. Fix it.
Fixes: a9fad07d4b ("binman: Avoid reporting image-pos with compression")
Signed-off-by: Simon Glass <sjg@chromium.org>
With a recent change this entry stores only part of the section data,
leaving out the padding at the end. Fix this by using GetPaddedData() to
get the data. Add this function to the base Entry class also.
Fixes: d1d3ad7d1f ("binman: Move section padding to the parent")
Signed-off-by: Simon Glass <sjg@chromium.org>
Building U-Boot with unit tests on a non-sandbox systems fails:
ld.bfd: test/built-in.o: in function `compress_using_gzip':
test/compression.c:138: undefined reference to `gzip'
ld.bfd: test/built-in.o: in function `uncompress_using_bzip2':
test/compression.c:187: undefined reference to `BZ2_bzBuffToBuffDecompress'
ld.bfd: test/built-in.o: in function `uncompress_using_lzma':
test/compression.c:222: undefined reference to `lzmaBuffToBuffDecompress'
ld.bfd: test/built-in.o: in function `uncompress_using_lzo':
test/compression.c:257: undefined reference to `lzop_decompress'
ld.bfd: test/built-in.o: in function `uncompress_using_lz4':
test/compression.c:292: undefined reference to `ulz4fn
Add the missing dependencies.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building test/bloblist.c fails for non sandbox devices:
test/bloblist.c:10:10: fatal error: asm/state.h: No such file or directory
#include <asm/state.h>
^~~~~~~~~~~~~
Build the test only on the sandbox.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The cros_ec_keyb driver currently uses EC_CMD_MKBP_STATE to scan the
keyboard, but this host command was superseded by EC_CMD_GET_NEXT_EVENT
and unavailable on more recent devices (including gru-kevin), as it was
removed in cros-ec commit 87a071941b89 ("mkbp: Add support for buttons
and switches.") dated 2016-07-06.
The EC_CMD_GET_NEXT_EVENT has been available since cros-ec commit
d1ed75815efe ("MKBP event signalling implementation") dated 2014-10-20,
but it looks like it isn't included in firmware-* branches for at least
link, nyan-big, samus, snow, spring, panther and peach-pit which have
defconfigs in U-Boot. So this patch falls back to the old method if the
EC doesn't recognize the newer command.
The implementation is mostly adapted from Depthcharge commit
f88af26b44fc ("cros_ec: Change keyboard scanning method.").
On a gru-kevin, the current driver before this patch fails to read the
pressed keys with:
out: cmd=0x60: 03 9d 60 00 00 00 00 00
in-header: 03 fc 01 00 00 00 00 00
in-data:
ec_command_inptr: len=-1, din=0000000000000000
check_for_keys: keyboard scan failed
However the keyboard works fine with the newer command:
out: cmd=0x67: 03 96 67 00 00 00 00 00
in-header: 03 ef 00 00 0e 00 00 00
in-data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ec_command_inptr: len=14, din=00000000f412df30
key_matrix_decode: num_keys = 0
0 valid keycodes found
out: cmd=0x67: 03 96 67 00 00 00 00 00
in-header: 03 df 00 00 0e 00 00 00
in-data: 00 00 00 00 00 00 00 00 00 00 00 00 10 00
ec_command_inptr: len=14, din=00000000f412df30
key_matrix_decode: num_keys = 1
valid=1, row=4, col=11
keycode=28
1 valid keycodes found
{0d}
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is prepared function for filing rom_offset. That's why use it instead
of copying content of it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
As we have a working COLD_RESET on the sandbox the sysreset test has to be
adjusted.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Up to now the sandbox would shutdown upon a cold reset request. Instead it
should be reset.
In our coding we use static variables like LIST_HEAD(efi_obj_list). A reset
can occur at any time, e.g. via an UEFI binary calling the reset service.
The only safe way to return to an initial state is to relaunch the U-Boot
binary.
The reset implementation uses execv() to relaunch U-Boot.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
During a cold reset execv() is used to relaunch the U-Boot binary.
We must ensure that all files are closed in this case.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is the 'poweroff' and not the 'reset' command that should shut down the
sandbox.
Adjust the unit test accordingly
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.
Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the sandbox eth-raw device host_lo is removed this leads to closing
the console input.
Do not call close(0).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Relocate a config_distro_bootcmd header before defined
CONFIG_EXTRA_ENV_SETTINGS. Otherwise it can't change to specific
environment.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This is required by Chrome OS so that the audio and other unibuild
features work correctly. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The bloblist guarantees that blobs are zeroed so there is no need to do
an additional memset(). Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we create the ACPI context but then drop it after generation of
tables is complete. This is annoying because we have to then search for
tables later.
To fix this, allocate the context and store it in global_data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present write_tables() can fail but does not report this problem to its
caller. Fix this by changing the return type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards need to include binary data into the image for use during the
boot process. Add a node for these.
An example is the audio-codec configuration used by some audio drivers on
Intel platforms. If no private files are provided, they will be omitted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add definitions for part of the vboot context used with verified boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Set up MSRs required for Apollo Lake. This enables Linux to use the
timers correctly. Also write the fixed MSRs for this platform.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This file can be included by any header but it includes C code. Guard it
to avoid errors when compiling ASL, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.
With qemu target for coreboot this could look this:
CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc15178
Checking segment from ROM address 0xffc15194
Loading segment from ROM address 0xffc15178
code (compression=1)
New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150
Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150
using LZMA
Loading segment from ROM address 0xffc15194
Entry Point 0x01110000
BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
Jumping to boot code at 0x01110000(0x07fa7000)
U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)
CPU: x86_64, vendor AMD, device 663h
DRAM: 127.1 MiB
MMC:
Video: No video mode configured in coreboot!
Video: No video mode configured in coreboot!
Vendor: QEMU
Model: Standard PC (i440FX + PIIX, 1996)
Bios Version: 4.12-3152-g326a499f6f-dirty
Net: e1000: 52:54:00:12:34:56
eth0: e1000#0
No working controllers found
Finalizing coreboot
Hit any key to stop autoboot: 0
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a very simple API to be able to access SMBIOS strings
like vendor, model and bios version.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:
WARNING: the driver intel_apl_lpc was not found in the driver list
Correct these by using driver names that matches their compatible string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fix the dtoc warning in these file by using a driver name that matches the
compatible string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This updates the PPD MAINTAINERS file doing a couple of changes:
* Replace Martyn with myself, since he no longer has the hardware
available and add Ian Ray as maintainer
* Fix the board directory path, which was still listing freescale/
instead of ge/
* Order the list of files alphabetically
* Add board specific device tree files to the file list
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This updates the Bx50v3 MAINTAINERS file, so that it also catches
changes to the related device tree files. Additionally the list of
files has been sorted alphabetically and I added myself as maintainer.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.
Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michael wrote:
commit 92765f45bb ("env: Access Environment in SPI flashes before
relocation") at least breaks the Kontron sl28 board. I guess it also
breaks others which use a (late) SPI environment.
reason is, that env_init() sets the init bit, if there
is no init function defined in an environment driver,
and use default return value -ENOENT in this case
later for setting the default environment.
Change:
Environment driver can now implement an init
function and return, if this function does nothing,
simply -ENOENT.
env_init() now handles -ENOENT correct by setting the
inited bit for the environment driver. And if there
is no other environment driver whose init function
returns 0, load than the default environment.
This prevents that each environment driver needs to set the
default environment.
Fixes: 92765f45bb ("env: Access Environment in SPI flashes before relocation")
Reported-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc> [For the SF environment]
Signed-off-by: Heiko Schocher <hs@denx.de>
First set of u-boot-atmel fixes for 2021.01 cycle:
This specific feature set includes the patches for DT required to fix
the warnings for newer DTC version (1.6.0+), i2c and spi bus unit
address.
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The series contains the following enhancements
* preparatory patches for UEFI capsule updates
* initialization of the emulated RTC using an environment variable
and a bug fix
* If DisconnectController() is called for a child controller that is the
only child of the driver, the driver must be disconnected.
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor
series (GE Bx50). It consists of a carrier PCB used in combination
with a Congatec QMX6 SoM. This adds U-Boot support using device model
everywhere and SPL for memory initialization.
Proper configuration is provided as 'ge_b1x5v2_defconfig' and the
combined image u-boot-with-spi.imx can be flashed directly to 1024
byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can
be loaded separately via USB-OTG using e.g. imx_usb.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This separates the I2C specific code from the generic
GE vital product data code, so that the generic parts
can be used on hardware with VPD stored in SPI flash
memory.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
While this code is being used by all GE platforms its useful
to have it behind a config option for hardware bringup of
new platforms.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Add GPIO poweroff driver, which is based on the Linux
driver and uses the same DT binding.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Allow using disable_ldb_di_clock_sources with just the combined
CONFIG_MX6QDL being enabled.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
In case of empty battery or glitches the oscillator fail
bit might be set. This will reset the bit in the reset
routine.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This takes care of resetting the 32kHz square wave, which is
used by some boards as clock source for the SoC.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This driver allows to use SPI flash as backing store for
boot counter values with DM enabled.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This option is only supported by the IMX watchdog and seems to be
similar to CONFIG_WATCHDOG.
Move it below the IMX watchdog and make it dependent on IMX_WATCHDOG.
Signed-off-by: Michael Walle <michael@walle.cc>
This patch provides information regarding the boot stage with using LEDs.
On the very beginning of U-Boot execution the GREEN LED is turned on.
When the execution is passed to Linux kernel the GREEN LED is off and
RED one is ON.
Afterwards, when Linux takes over the execution, the "heartbeat" driver
provides indication if the board is still alive.
Please also note that this patch uses {set|clr}bits_le32 macros as turning
ON GREEN LED is performed in a _very_ early stage of U-Boot execution
before DM_GPIOs are initialized.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The command 'clocks' shows the following output:
=> clocks
PLL_A7_SPLL 528 MHz
PLL_A7_APLL 529 MHz
PLL_USB 0 MHz
Add some extra spaces so that the PLL_USB information gets aligned with
the previous reported frequencies.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The command 'clocks' shows the following output:
=> clocks
PLL_A7_SPLL 528 MHz
PLL_A7_APLL 529 MHz
PLL_USB 0 MHz
....
[do_mx7_showclocks] addr = 0x9FFB61F1
The last line is not useful at all, so just remove it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
commit c05ed00afb dropped linux/delay.h from common header
add linux/delay.h to avoid compile warning here
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Ensure we terminate the line with a CR if we get an invalid sensor device
or reading.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
In order to be able to run the I2C bus at 400Khz, the chip errata[1]
recommends that the peripheral clock runs out of the 24MHz oscillator.
Systems running I2C from OP-TEE before Linux executes - for example to
access a Secure Element [2] providing the cryptographic support - expect
this clock to be configured by the bootloader [3].
[1] IMX6SLCE Rev. 5, 02/2019, ERR007805.
[2] OP-TEE: support for NXP SE05X Plug and Trust (patch on the list).
[3] OP-TEE: check the imx_i2c.c driver (imx6 patch on the list).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When using cygwin64 "dd (coreutils) 8.26 Packaged by Cygwin (8.26-2)",
the last not 512bytes aligned data wat cut off and not burned into SD
card.
Saying the flash.bin size is 1085608 bytes, not 512bytes aligned. It only
burned 1085440 bytes, the leaving 168 bytes were not burnned and cause
boot issue.
So update README dd command to add "conv=notrunc"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
- New PX30 board: Engicam PX30.Core;
- Fix USB HID support for rock960;
- Remove host endianness dependency for rockchip mkimage;
- dts update for rk3288-tinker;
- Enable console MUX for some ROCKPi boards;
- Add config-based ddr selection for px30;
The name of structure element logl_prev is not matched by the
documentation.
%s/logl_pref/logl_prev/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This would be useful and recommended boot flow for new boards
which has doesn't have the DDR support yet in mainline.
Sometimes it is very useful for debugging mainline DDR support.
Documen it for px30 boot flow.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose
carrier board with capacitive touch interface.
Genaral features:
- TFT 10.1" industrial, 1280x800 LVDS display
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
SOM's like PX30.Core needs to mount on top of this Carrier board
for creating complete PX30.Core C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.
PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The existing common code for Engicam boards uses i.MX6,
so attach that into i.MX6 Engicam boards so-that adding
new SoC variants of Engicam boards become meaningful.
Add support for it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
TARGET_EVB_PX30 can be possible to use other px30 boards.
Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.
This would help to track which boards are using EVB_PX30 config.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
General features:
- Rockchip PX30
- Up to 2GB DDR4
- eMMC 4 GB expandible
- rest of PX30 features
PX30.Core needs to mount on top of Engicam baseboards for creating
complete platform boards.
Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
SOM's like PX30.Core needs to mount on top of this Evaluation board
for creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When booting from rom usb, skip the boot logo logic as it's possible
that the partition containing the logo does not exist yet.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The Rockchip boot ROM expects little-endian values in the image header.
When running mkimage on a big-endian machine, these values need to be
byteswapped before writing or verifying the header.
This change fixes cross-compiling U-Boot SPL for the RK3399 SoC from a
big-endian ppc64 host machine.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Enable Console multiplexing in ROCKPi N8 which would is
required to video out the console buffer.
Enable it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Like, rk3399 the rk3288 also supports 4K resolution.
So, enable it for rk3288 with HDMI platforms.
Right now, rockchip video drivers are supporting for rk3288,
rk3399 SoC families, so mark the 4K resolution by default
if it's an HDMI video out.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Enable Console multiplexing in ROCKPi N10 which would is
required to video out the console buffer.
Enable it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This updates logging documentation with some examples of the new commands
added in the previous commits. It also removes some items from the to-do
list which have been implemented.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The functions in log.h are already mostly documented, so add them to the
generated documentation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This exercises a few success and failure modes of the log filter-*
commands. log filter-list is not tested because it's purely informational.
I don't think there's a good way to test it except by testing if the output
of the command exactly matches a sample run.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds several commands to add, list, and remove log filters. Due to the
complexity of adding a filter, `log filter-list` uses options instead of
positional arguments.
These commands have been added as subcommands to log by using a dash to
join the subcommand and subsubcommand. This is stylistic, and they could be
converted to proper subsubcommands if it is wished.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A few of these tests were inspired by those in glibc. The syntax for
invoking test_getopt is a bit funky, but it's necessary so that the CPP can
parse the arguments correctly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Some commands can get very unweildy if they have too many positional
arguments. Adding options makes them easier to read, remember, and
understand.
This implementation of getopt has been taken from barebox, which has had
option support for quite a while. I have made a few modifications to their
version, such as the removal of opterr in favor of a separate getopt_silent
function. In addition, I have moved all global variables into struct
getopt_context.
The getopt from barebox also re-orders the arguments passed to it so that
non-options are placed last. This allows users to specify options anywhere.
For example, `ls -l foo/ -R` would be re-ordered to `ls -l -R foo/` as
getopt parsed the options. However, this feature conflicts with the const
argv in cmd_tbl->cmd. This was originally added in 54841ab50c ("Make sure
that argv[] argument pointers are not modified."). The reason stated in
that commit is that hush requires argv to stay unmodified. Has this
situation changed? Barebox also uses hush, and does not have this problem.
Perhaps we could use their fix?
I have assigned maintenance of getopt to Simon Glass, as it is currently
only used by the log command. I would also be fine maintaining it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This makes the log level command print all valid log levels. The default
log level is annotated. This provides an easy way to see which log levels
are compiled-in.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows users to query which categories and drivers are available on
their system. This allows them to construct filter-add commands without
(e.g.) adjusting the log format to show categories and drivers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move parsing of log level into its own function so it can be re-used. This
also adds support for using log level names instead of just the integer
equivalent.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This reduces duplicate code, and makes adding new sub-commands easier.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is the complement of the existing behavior to match only messages with
a log level less than a threshold. This is primarily useful in conjunction
with LOGFF_DENY.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds some tests for log filters which deny if they match.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When rebasing this series I had to renumber all my log tests because
someone made another log test in the meantime. This involved updaing a
number in several places (C and python), and it wasn't checked by the
compiler. So I though "how hard could it be to just rewrite in C?" And
though it wasn't hard, it *was* tedious. Tests are numbered the same as
before to allow for easier review.
A note that if a test fails, everything after it will probably also fail.
This is because that test won't clean up its filters. There's no easy way
to do the cleanup, except perhaps removing all filters in a wrapper
function.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Without this flag, log filters can only explicitly accept messages.
Allowing denial makes it easier to filter certain subsystems. Unlike
allow-ing filters, deny-ing filters are added to the beginning of the
filter list. This should do the Right Thing most of the time, but it's
less-universal than allowing filters to be inserted anywhere. If this
becomes a problem, then perhaps log_filter_add* should take a filter number
to insert before/after.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function exposes a way to specify flags when creating a filter.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These functions are required by "cmd: log: Add commands to manipulate
filters" and "test: Add a test for log filter-*".
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Checkpatch complains about using #ifdef for CONFIG variables.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Both these arrays and their members are const. Fixes checkpatch complaint.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Logging category lists are terminated by LOGC_END, not LOGC_NONE.
Fixes: e9c8d49d54 ("log: Add an implementation of logging")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Errors returned should be negative.
Fixes: 45fac9fc18 ("log: Correct missing free() on error in log_add_filter()")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On aristianetos boards the display type is detected
through "panel" environment variable. Dependend on the
display type we detect the board type and this decides which
DTB we have to use for the board.
So we need early spi environment access.
Signed-off-by: Heiko Schocher <hs@denx.de>
Enable the new Kconfig option ENV_SPI_EARLY if you want
to use Environment in SPI flash before relocation.
Call env_init() and than you can use env_get_f() for
accessing Environment variables.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
split from env_import_redund() the part which checks
which Environment is valid into a separate function
called env_check_redund() and call it from env_import_redund().
So env_check_redund() can be used from places which also
need to do this checks.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function will be used from several places in UEFI subsystem
to generate some specific form of utf-16 variable name.
For example, L"Capsule0001"
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Move function to separate module.
Use char * as argument instead of u16 *.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If this option, CONFIG_EFI_SETUP_EARLY, is enabled, the initialisation
of UEFI subsystem will be done as part of U-Boot initialisation.
Please note that this option won't be enabled explicitly by users,
instead, should be enabled implicitly by other configuration options.
Specifically, this feature will be utilised in implementing capsule-on-disk
feature.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This function is a variant of dfu_write_by_name() and takes a DFU alt
setting number for dfu configuration.
It will be utilised to implement UEFI capsule management protocol for
raw image in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This variable will be utilized to enumerate all dfu entities
for UEFI capsule firmware update in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The main purpose of this patch is to separate a generic interface for
updating firmware using DFU drivers from "auto-update" via tftp.
This function will also be used in implementing UEFI capsule update
in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The range of an addressable pointer can go beyond 'integer'.
So change the argument type to a void pointer.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function is essentially independent from tftp, and will also be
utilised in implementing UEFI capsule update in a later commit.
So just give it a more generic name.
In addition, a new configuration option, CONFIG_DFU_WRITE_ALT, was
introduced so that the file will be compiled with different options,
particularly one added in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Up to now the emulated RTC is initialized using the U-Boot build time.
With this patch the environment variable 'rtc_emul_epoch' can be used to
provide a better initial time. The variable is a decimal string with
the number of seconds since 1970-01-01. Here is an example where the RTC
had not been probed yet:
=> setenv rtc_emul_epoch 1610109000
=> date
Date: 2021-01-08 (Friday) Time: 12:30:00
If the variable does not exist, the U-Boot build time is used as fallback.
The environment variable may be set when shutting down the operating system
if the U-Boot environment is exposed to the OS (cf. ENV_IS_IN_FAT and
ENV_IS_IN_EXT4).
Suggested-by: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the emulated RTC is initialized in the emul_rtc_get() get
function. This does not match the design of the driver model.
Move the initialization of the emulated RTC to the probe() function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If ChildHandle indicates the sole child of the driver, disconnect the
driver.
This fixes the test results for UEFI SCT 2.6 A
sub-tests 5.1.3.12.43, 5.1.3.12.44, 5.1.3.12.45.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Found this by comparing it to the coreboot driver, a form of this call
was introduced there in their commit b9a7877568cf ("rockchip/*: refactor
edp driver"). This is copy-pasted from U-Boot's link_train_cr() slightly
above it.
Without this on a gru-kevin chromebook, I have:
clock recovery at voltage 0 pre-emphasis 0
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
channel eq failed, ret=-5
link train failed!
rk_vop_probe() Device failed: ret=-5
With this, it looks like training succeeds:
clock recovery at voltage 0 pre-emphasis 0
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 6dB
using signal parameters: voltage 0.4V pre_emph 6dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 0dB
using signal parameters: voltage 0.4V pre_emph 0dB
channel eq at voltage 0 pre-emphasis 0
config video failed
rk_vop_probe() Device failed: ret=-110
The "config video failed" error also goes away when I disable higher
log levels, and it claims to have successfully probed the device.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The SRAM on the PX30 is not big enough to hold multiple DDR configs
so it needs to be selected during build.
So far simply the DDR3 config was always selected and getting DDR4
or LPDDR2/3 initialized would require a code modification.
So add Kconfig options similar to RK3399 to allow selecting the DDR4
and LPDDR2/3 options instead, while DDR3 stays the default as before.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Fix up USB config options so keyboards and other USB devices work.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Change-Id: I34b0696e0ac7303186f20c83278dde340399b690
The property reg-shift with the same value is present in the base
device tree already. Remove unnecessary node from rk3288-tinker.dts.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The I2C EEPROM is present on Tinker Board S as well. Move the i2c node
to the shared, U-Boot specific rk3288-tinker-u-boot.dtsi device tree.
Cc: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to correctly calculate the designware watchdog
timeouts, the watchdog clock is required. Implement required
clocks to facilitate this.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Refactor the implementation slightly so that section data is not
rebuilt when it is already available.
We still have GetData() set up to rebuild the section, since we don't
currently track when things change that might affect a section. For
example, if a blob is updated within a section, we must rebuild it.
Tracking that would be possible but is more complex, so it left for
another time.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the previous changes, it is now possible to compress entire
sections. Add some tests to check that compression works correctly,
including updating the metadata.
Also update the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function adds up the total size of entries to work out the
size of a section's contents. With compression this is no-longer enough.
We may as well bite the bullet and build the section contents instead.
Call _BuildSectionData() to get the (possibly compressed) contents and
GetPaddedData() to get the same but with padding added.
Note that this is inefficient since the section contents is calculated
twice. Future work will improve this.
This affects testPackOverlapMap() since the error is reported with a
different section size now (enough to hold the contents). Update that at
the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function assumes that the size of a section is at least as
large as its contents. With compression this is often not the case. Relax
this constraint by using the uncompressed size, if available.
Signed-off-by: Simon Glass <sjg@chromium.org>
This method introduces a separation between packing and checking that is
different for sections. In order to handle compression properly, we need
to be able to deal with a section's size being smaller than the
uncompressed size of its contents. It is easier to make this work if
everything happens in the Pack() method.
The only real user of CheckEntries() is entry_Section and it can call it
directly. Drop the call from 'control' and handle it locally.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present CheckSize() is called from the function that packs the entries.
Move it up to the main Pack() function so that _PackEntries() can just
do the packing.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is only used by entry_Section and that class already calls it. Avoid
calling it twice. Also drop it from the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sorting and expanding entries are side-effects of the
CheckEntries() function. This is a bit confusing, as 'checking' would
not normally involve making changes.
Move these steps into the Pack() function instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function just calls CheckEntries() in the only non-trivial
implementation. Drop it and use CheckEntries() directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a section is compressed, all entries within it are grouped together
into a compressed block of data. This obscures the start of each
individual child entry.
Avoid reporting bogus 'image-pos' properties in this case, since it is
not possible to access the entry at the location provided. The entire
section must be decompressed first.
CBFS does not support compressing whole sections, only individual files,
so needs no special handling here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Section contents is not set up when ObtainContents() is called, since
packing often changes the layout of the contents. Ensure that the contents
are correctly recorded by making this function regenerate the section. It
is normally only called by the parent section (when packing) or by the
top-level image code, when writing out the image. So the performance
impact is fairly small.
Now that sections have their contents in their 'data' property, update
testSkipAtStartSectionPad() to check it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When compressing an entry, the original uncompressed data is overwritten.
Store it so it is available if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present padding of sections is inconsistent with other entry types, in
that different pad bytes are used.
When a normal entry is padded by its parent, the parent's pad byte is
used. But for sections, the section's pad byte is used.
Adjust logic to always do this the same way.
Note there is still a special case in entry_Section.GetPaddedData() where
an image is padded with the pad byte of the top-level section. This is
necessary since otherwise there would be no way to set the pad byte of
the image, without adding a top-level section to every image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Each section is padded up to its size, if the contents are not large
enough. Move this logic from _BuildSectionData() to
GetPaddedDataForEntry() so that all the padding is in one place.
With this, the testDual test is working again, so enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function does the padding needed around an entry. It is
easier to understand what is going on if we have a function that returns
the contents of an entry, with padding included.
Refactor the code accordingly, adding a new GetPaddedData() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a new _BuildSectionData() to hold the code that is now in
GetData(), so that it is clearly separated from entry.GetData() base
function.
Separate out the 'pad-before' processing to make this easier to
understand.
Unfortunately this breaks the testDual test. Rather than squash several
patches into an un-reviewable glob, disable the test for now.
This also affects testSkipAtStartSectionPad(), although it still not
quite what it should be. Update that temporarily for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Alignment does form part of the entry once the image is written out, but
within binman the entry contents does not include the padding. Add
documentation to make this clear, as well as a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Padding becomes part of the entry once the image is written out, but
within binman the entry contents does not include the padding. Add
documentation to make this clear, as well as a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Check the contents of each section to make sure it is actually in the
right place.
Also fix a whitespace error in the .dts file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use 'compress' as the property to set the compression of
a 'files' entry. But this conflicts with the same property for entries,
of which Entry_section is a subclass.
Strictly speaking, since Entry_files is in fact a subclass of
Entry_section, the files can be compressed individually but also the
section (that contains all the files) can itself be compressed. With this
change, it is possible to express that.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this is only used by blobs. To allow it to be used by other
entry types (such as sections), move it into the base class.
Also read the compression type in the base class.
Signed-off-by: Simon Glass <sjg@chromium.org>
While a section is the base class of Image, it is more correct to refer
to sections in most places in this file. Fix these comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if 'binman' is typed on the command line, a strange error about
a missing argument is displayed. Fix this.
These does not seem to be standard way to add the 'required' argument in
all recent Python versions, so set it manually.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this feature is tested view the end-at-4gb feature. Add some
tests of its own, including the operation of padding.
The third test here shows binman's current, inconsistent approach to
padding in the top-level section. Future patches in this series will
address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
With of-platdata, the devicetree is supposed to specify all the devices
in the system. So far this hasn't really mattered since of-platdata still
works correctly.
However, new of-platdata features rely on numbering the devices in a
particular order so that they can be referenced by a single integer. It is
tricky to implement this efficiently when other devices are present in the
build.
To address this, disable use of U_BOOT_DEVICE() when of-platdata is
enabled. This seems acceptable as it is not supposed to be used at all,
except in SPL/TPL, where of-platdata is the recommended approach.
This breaks one non-compliant boards at present: mx6cuboxi
Signed-off-by: Simon Glass <sjg@chromium.org>
(disable CONFIG_IMX_THERMAL for mx6cuboxi to avoid a build error)
This feature is incompatble with of-platdata since it uses the
U_BOOT_DEVICE() macro. With of-platdata the only devices permitted are
those created by dtoc.
The driver is not used in SPL anyway, so exclude it from that build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
At present we use a 'node' pointer in the of-platadata phandle_n_arg
structs. This is a pointer to the struct driver_info for a particular
device, and we can use it to obtain the struct udevice pointer itself.
Since we don't know the struct udevice pointer until it is allocated in
memory, we have to fix up the phandle_n_arg.node at runtime. This is
annoying since it requires that SPL's data is writable and adds a small
amount of extra (generated) code in the dm_populate_phandle_data()
function.
Now that we can find a driver_info by its index, it is easier to put the
index in the phandle_n_arg structures.
Update dtoc to do this, add a new device_get_by_driver_info_idx() to look
up a device by drive_info index and update the tests to match.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that parent devices are supported with of-platadata, we don't need the
messy code to fix up the parent pointers and allocations on Apollo Lake.
Put the code behind a condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present, enabling CONFIG_APL_SPI_FLASH_BOOT does not build since SPI
and SPI flash are not enabled for TPL. Add a condition to fix this and
tidy up a build warning in the SPI-flash driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a simple test that we can obtain the correct parent for an I2C
device. This requires updating the driver names to match the compatible
strings, adding them to the devicetree and enabling a few options.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present of-platdata does not provide parent information. But this is
useful for I2C devices, for example, since it allows them to determine
which bus they are on.
Add support for setting the parent correctly, by storing the parent
driver_info index in dtoc and reading this in lists_bind_drivers(). This
needs multiple passes since we must process children after their parents
already have been bound.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no devicetree with of-platdata. Update a few uclasses to allow
them to be built for sandbox_spl. Also drop the i2c-gpio from SPL to avoid
build errors, since it does not support of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we update the driver_info struct with a pointer to the device
that it created (i.e. caused to be bound). This works fine when U-Boot SPL
is stored in read-write memory. But on some platforms, such as Intel
Apollo Lake, it is not possible to update the data memory.
In any case, it is bad form to put this information in a structure that is
in the data region, since it expands the size of the binary.
Create a new driver_rt structure which holds runtime information about
drivers. Update the code to store the device pointer in this instead.
Also update the test check that this works.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have a test in dtoc for this feature, but not one in U-Boot itself.
Add a simple test that checks that the information comes through
correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
With of-platdata, the driver_info struct is updated with the device
pointer when it is bound. This makes it easy for a device to be found by
its driver info with the device_get_by_driver_info() function.
Add a test that all devices (except the root device) have such an entry.
Fix a bug that the function does not set *devp to NULL on failure, which
the documentation asserts.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present properties are tested in a roundabout way. The driver's probe()
method writes out the values of the properties and the Python test checks
the output from U-Boot SPL.
Add a C test which checks these values more directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have a pytest that covers of-platadata. Add a very simple
unit test that just checks that a device can be found. This shows the
ability to write these tests in C.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a -u flag for U-Boot SPL which requests that unit tests be run. To
make this work, export dm_test_main() and update it to skip test features
that are not used with of-platdata.
To run the tests:
$ spl/u-boot-spl -u
U-Boot SPL 2020.10-rc5 (Oct 01 2020 - 07:35:39 -0600)
Running 0 driver model tests
Failures: 0
At present there are no SPL unit tests.
Note that there is one wrinkle with these tests. SPL has limited memory
available for allocation. Also malloc_simple does not free memory
(free() is a nop) and running tests repeatedly causes driver-model to
reinit multiple times and allocate memory. Therefore it is not possible
to run more than a few tests at a time. One solution is to increase the
amount of malloc space in sandbox_spl. This is not a problem for pytest,
since it runs each test individually, so for now this is left as is.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present DM tests assume that a devicetree is available. This is not the
case with of-platadata.
Update the code to add this condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
Without resizing the SDL window showed by
./u-boot -D -l
is not legible on a high resolution screen.
Allow resizing the window
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present an integer is converted to bytes incorrectly. The whole 32-bit
integer is inserted as the first element of the byte array, and the other
three bytes are skipped. This was not noticed because the unit test did
not check it, and the functional test was checking for wrong values.
Update the code to handle this as a special case. Add one more test to
cover all code paths.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this option is disabled in SPL, meaning that warnings are not
displayed. It is sometimes useful to see warnings in SPL for debugging
purposes.
Add a new Kconfig option to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the structures are written in name order, but parents have to
be written before their children, so the file does not end up being in
order. The order of nodes in _valid_nodes matches the order of the
devicetree.
Update the code so that _valid_nodes is in sorted order, by C name of
the structure. This allows us to assign a sequential ordering to each
U_BOOT_DEVICE() declaration.
U-Boot's linker lists are also ordered alphabetically, which means that
the order in the driver_info list will match the order used by dtoc. This
defines an index ('idx') for the U_BOOT_DEVICE declarations. They appear
in alphabetical order, numbered from 0 in _valid_nodes and in the
driver_info linker list.
Add a comment against each declaration, showing the idx value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add documentation to this function as well as generate_structs(), where
the return value is ultimately passed in.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since sandbox's SPL is build with of-platadata, we should not use
U_BOOT_DEVICE() declarations as well. Drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tests are easier to run in U-Boot proper. Running them in SPL does not add
test coverage in most cases. Also some tests use features that are not
available in SPL.
Update the build rules to disable these tests in SPL. We still need
test-main to be able to actually run SPL tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we always include test/dm from the main Makefile. We have a
CONFIG_UNIT_TEST that should control whether the test/ directory is built,
so rely on that instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present most of the tests in test/Makefile are dependent on
CONFIG_SANDBOX. But this is not ideal since they rely on commands being
available and SPL does not support commands.
Use CONFIG_COMMAND instead. This has the dual purpose of allowing these
tests to be used on other boards and allowing SPL to skip them.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this option results in a number of #ifdefs due to the presence
or absence of the global_data of_root member.
Add a few macros to global_data.h to work around this. Update the code
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for multiple images, since these are used on x86 now. Select
the first image for now, since that is generally the correct one. At some
point we can add a way to determine which image is currently running.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a function to read the ROM offset so that we can store the value
in one place and clients don't need to store it themselves after calling
binman_set_rom_offset().
Signed-off-by: Simon Glass <sjg@chromium.org>
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch)
- Armada 8k: Use ATF serdes init instead of the "old" U-Boot version
(Baruch)
- Minor update to Octeon TX/TX2 defconfig (Stefan)
Xilinx changes for v2021.01-v2
common:
- Add support for 64bit loadables from SPL
xilinx:
- Update documentation and record ownership
- Enable eeprom board detection based legacy and fru formats
- Add support for FRU format
microblaze:
- Optimize low level ASM code
- Enable SPI/I2C
- Enable distro boot
zynq:
- Add support for Zturn V5
zynqmp:
- Improve silicon detection code
- Enable several kconfig options
- Align DT with the latest state
- Enabling security commands
- Enable and support FPGA loading from SPL
- Optimize xilinx_pm_request() calling
versal:
- Some DTs/Kconfig/defconfig alignments
- Add binding header for clock and power
zynq-sdhci:
- Add support for tap delay programming
zynq-spi/zynq-qspi:
- Use clock framework for getting clocks
xilinx-spi:
- Fix some code issues (unused variables)
serial:
- Check return value from clock functions in pl01x
Maxime mentioned that he feels not having the time to be an Allwinner
maintainer anymore. Take over from him.
Maxime, many thanks for your great work in the past! I hope I can still
relay the occasional technical question to you in the future.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Based on Linux kernel commit fc256f5789cb ("mtd: nand: pxa3xx: enable
NAND controller if the SoC needs it"). This commit adds support for the
Armada 8040 nand controller.
The kernel commit says this:
Marvell recent SoCs like A7k/A8k do not boot with NAND flash
controller activated by default. Enabling the controller is a matter
of writing in a system controller register that may also be used for
other NAND related choices.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Move board_fit_config_name_match() from Zynq/ZynqMP to common location.
This change will open a way to use it also by Microblaze and Versal.
Through this function there is a way to handle images with multiple DTBs.
For now match it with DEVICE_TREE as is done for Zynq.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove setting tapdelays for different speeds separately. Instead use
the ITAP and OTAP delay values which are read from the device tree.
If the DT does not contain tap delay values, the predefined values
will be used for the same.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The kfree() call is unreachable, and is not needed. Remove this call and
the fail_disable_clk label.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Use the generic DT code to find the device compatible property for us.
This makes the driver look more like other current drivers. It also make
it easier to add support for other variants like Armada 8K in a future
commit.
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Align node properties to kernel dts node.
The change of compatible property does not affect any currently
supported board.
Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility
with the current driver.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Align node properties to kernel dts node.
Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility
with the current driver.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
It helps ATF to determine who called power on function (U-boot/Linux).
The corresponding ATF code was added in this commit:
mvebu: cp110: avoid pcie power on/off sequence when called from Linux
55df84f974
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Replace the comphy initialization for PCIe with appropriate SMC call, so
the firmware will perform appropriate comphy initialization.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.
This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tests tests run the three mux subcommands: list, select, and deselect,
and verify that the commands do what we expect.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This command lets the user list, select, and deselect mux controllers
introduced with the mux framework on the fly. It has 3 subcommands:
list, select, and deselect.
List: Lists all the mux present on the system. The muxes are listed for
each chip. The chip is identified by its device name. Each chip can have
a number of mux controllers. Each is listed in sequence and is assigned
a sequential ID based on its position in the mux chip. It lists details
like ID, whether the mux is currently selected or not, the current
state, the idle state, and the number of states.
A sample output would look something like:
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 no unknown as-is 0x4
1 no 0x2 0x2 0x10
2 no 0x73 0x73 0x100
another-mux-controller:
ID Selected Current State Idle State Num States
0 no 0x1 0x1 0x4
1 no 0x2 0x2 0x4
Select: Selects a given mux and puts it in the specified state. This
subcommand takes 3 arguments: mux chip, mux ID, state to set
the mux in. The arguments mux chip and mux ID are used to identify which
mux needs to be selected, and then it is selected to the given state.
The mux needs to be deselected before it can be selected again in
another state. The state should be a hexadecimal number.
For example:
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 no 0x1 0x1 0x4
1 no 0x1 0x1 0x4
=> mux select a-mux-controller 0 0x3
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 yes 0x3 0x1 0x4
1 no 0x1 0x1 0x4
Deselect: Deselects a given mux and puts it in its idle state. This
subcommand takes 2 arguments: the mux chip and mux ID to identify which
mux needs to be deselected. So in the above example, we can deselect mux
0 using:
=> mux deselect a-mux-controller 0
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 no 0x1 0x1 0x4
1 no 0x1 0x1 0x4
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide tests to check the behavior of the multiplexer framework.
Two sets of tests are added. One is using an emulated multiplexer driver
that can be used to test basic functionality like select, deselect, etc.
The other is using the mmio mux which adds tests specific to it.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The memory is close to full and adding a syscon node in test.dts makes
it go over the limit and makes malloc() fail on startup.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a driver for mmio-based syscon multiplexers controlled by
bitfields in a syscon register range.
This is heavily based on the linux mmio-mux driver.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
This will probe the multiplexer devices that have a "u-boot,mux-autoprobe"
property. As a consequence they will be put in their idle state.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add a new subsystem that handles multiplexer controllers. The API is the
same as in Linux.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
[trini: Update some error calls to use different functions or pass
correct arguments]
Signed-off-by: Tom Rini <trini@konsulko.com>
Pull request for UEFI sub-system for efi-2021-01-rc2
A software RTC driver is supplied for UEFI SCT testing.
The following UEFI related bugs are fixed:
* correct handling of daylight saving time in GetTime() and SetTime()
* handling of the gd register in function tracing on RISC-V
* disable U-Boot devices in ExitBootServices()
The log command has led to NULL dereferences if an unknown category name
name was used due to missing entries in the list of category names.
Add compile time checks for the array sizes of log_cat_name and
log_lvl_name to avoid future mishaps.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adjust the SetTime() and GetTime() runtime services to correctly convert
the daylight saving time information when communicating with the RTC.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
U-Boot Driver Model is supposed to remove devices with either
DM_REMOVE_ACTIVE_DMA or DM_REMOVE_OS_PREPARE flags set, before exiting.
Our bootm command does that by explicitly calling calling
"dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);" and we also disable any
USB devices.
The EFI equivalent is doing none of those at the moment. As a result
probing an fTPM driver now renders it unusable in Linux. During our
(*probe) callback we open a session with OP-TEE, which is supposed to
close with our (*remove) callback. Since the (*remove) is never called,
once we boot into Linux and try to probe the device again we are getting
a busy error response. Moreover all uclass (*preremove) functions won't
run.
So let's fix this by mimicking what bootm does and disconnect devices
when efi_exit_boot_services() is called.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
An UEFI application may change the value of the register that gd lives in.
But some of our functions like get_ticks() access this register. So we
have to set the gd register to the U-Boot value when entering a trace
point and set it back to the application value when exiting the trace
point.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On a board without hardware clock this software real time clock can be
used. The build time is used to initialize the RTC. So you will have
to adjust the time either manually using the 'date' command or use
the 'sntp' to update the RTC with the time from a network time server.
See CONFIG_CMD_SNTP and CONFIG_BOOTP_NTPSERVER. The RTC time is
advanced according to CPU ticks.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a constant U_BOOT_EPOCH with the number of seconds since
1970-01-01. This constant can be used to initialize a software
real time clock until it is updated via the 'sntp' command.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a unit test checking that a continuation message will use the same
log level and log category as the previous message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some drivers use macro pr_cont() for continuing a message sent via printk.
Hence if we want to convert printk messaging to using the logging system,
we must support continuation of log messages too.
As pr_cont() does not provide a message level we need a means of
remembering the last log level.
With the patch a pseudo log level LOGL_CONT as well as a pseudo log
category LOGC_CONT are introduced. Using these results in the application
of the same log level and category as in the previous log message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace the static variable processing_msg by a field in the global data.
Make the field bool at it can only be true or false.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
With disabled legacy VIDEO option CONSOLE_MUX is not auto-selected
any more, re-enable it.
Fixes: 9dec5a0ea1 ("nokia_rx51: disable obsolete VIDEO config")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Define default values for input and output clock phase delays for
Versal. Also define functions for setting tapdelays based on these
clock phase delays.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Define input and output clock phase delays with pre-defined values.
Define arasan_sdhci_clk_data type structure and add it to priv
structure and store these clock phase delays in it.
Read input and output clock phase delays from dt. If these values are
not passed through dt, use pre-defined values.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace speed macro's used with these new timing
macro's wherever applicable.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This reverts commit 942b5fc032.
This is partial revert of the above commit.
mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);
This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.
Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().
The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.
if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;
if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);
It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.
Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add function description for zynq_qspi_init_hw and zynq_qspi_chipselect.
Fix zqspi to priv in function descriptions.
Change the description of priv as pointer to zynq_qspi_priv structure.
Fix other function descriptions to kernel-doc style.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use tabs to be aligned with the rest of the code.
Fixes: 658df8bd94 ("mtd: spi-nor-core: Add octal mode support")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Call generic board_late_init_xilinx() to be aligned with the rest of xilinx
platforms. Also getting rid of initrd_high/fdt_high and use
bootm_low/boot_size instead.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change parameter type to avoid compilation error:
In file included from ./tools/../lib/rsa/rsa-verify.c:23:0,
from tools/lib/rsa/rsa-verify.c:1:
include/u-boot/rsa-mod-exp.h:69:18: error: unknown type name ‘u32’; did you mean ‘__u32’?
int zynq_pow_mod(u32 *keyptr, u32 *inout);
^~~
__u32
include/u-boot/rsa-mod-exp.h:69:31: error: unknown type name ‘u32’; did you mean ‘__u32’?
int zynq_pow_mod(u32 *keyptr, u32 *inout);
^~~
__u32
Fixes: 37e3a36a54 ("xilinx: zynq: Add support to secure images")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add ram base address to scriptaddr env variable to make boot
script address to be a valid address when ddr base address changes.
This works properly if the first memory region is the region where uboot
runs. Also the solution was taken in respect of a lot of jtag script
putting u-boot script to certain address. For standard cases
bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed
out of this location it does calculation.
This is not the best solution and should be done differently in future but
enough for now till we don't have full solution ready yet.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For zynqmp qspi, frequencies up to 40MHz will work irrespective
of feedback clock enabled or disabled. If we want higher than
40Mhz the feedback clock should be enabled.
With spi-max-frequency 108MHz it is not working when the feedback
clock is disabled. Change it to 40MHz so that it works irrespective
of feedback clock enabled or disabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't
return any return value and all the time returns 0. That's why
even correct snprintf was returning in SPL chip ID as "unknown".
Change checking condition and allow snprintf to return 0 which is according
manual patch successful return.
"If an output error is encountered, a negative value is returned."
Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix hex format from 0x%0X to 0x%0x to show correct numbers.
Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Idea is to have something what can be used for board bringup from
generic board perspective.
There is a violation compare to spec that FRU ID is ASCII8 instead of
binary format but this is really for having something to pass boot and
boot to OS which has better generating options.
Also time should be filled properly.
For example:
fru board_gen 1000 XILINX versal-x-prc-01-revA serialX partX
There is also support for revision field which is Xilinx specific field.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for fru commands "fru capture" and "fru display".
The fru capture parses the FRU table present at an address and stores in a
structure for later use. The fru display prints the content of captured
structured in a readable format.
As of now, it supports only common header and board area of FRU. Also, it
supports only English language code and ASCII8/BINARY formats.
fru_data variable is placed to data section because fru parser can be
called very early before bss is initialized. And also information needs to
be shared that's why it is exported via header.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to reference files in common folder back. Simply adding
Makefile to this folder does the job because this "common" location is
already wired in main Makefile.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to have ZYNQ specific Kconfig macro in generic location
to be visible for all other SoCs. That's why move it to Xilinx common
location to be visible only for us.
Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to
disable it or enable. This has connection to code which is reading the
whole content of i2c and also work with the rest of date not just with MAC
address.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The commit 9f45aeb937 ("spl: fit: implement fdt_record_loadable") which
introduced fdt_record_loadable() state there spl_fit.c is not 64bit safe.
Based on my tests on Xilinx ZynqMP zcu102 platform there shouldn't be a
problem to record these addresses in 64bit format.
The patch adds support for systems which need to load images above 4GB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
SPL is creating fit-images DT node when loadables are recorded in selected
configuration. Entries which are created are using entry-point and
load-addr property names. But there shouldn't be a need to use non standard
properties because entry/load are standard FIT properties. But using
standard FIT properties enables option to use generic FIT functions to
descrease SPL size. Here is result for ZynqMP virt configuration:
xilinx_zynqmp_virt: spl/u-boot-spl:all -82 spl/u-boot-spl:rodata -22 spl/u-boot-spl:text -60
The patch causes change in run time fit image record.
Before:
fit-images {
uboot {
os = "u-boot";
type = "firmware";
size = <0xfd520>;
entry-point = <0x8000000>;
load-addr = <0x8000000>;
};
};
After:
fit-images {
uboot {
os = "u-boot";
type = "firmware";
size = <0xfd520>;
entry = <0x8000000>;
load = <0x8000000>;
};
};
Replacing calling fdt_getprop_u32() by fit_image_get_entry/load() also
enables support for reading entry/load properties recorded in 64bit format.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove fixed reference clk used by plat->frequency and use clk
subsystem to get reference clk. As per spi dt bindings
"spi-max-frequency" property should be used by the slave devices.
This property is read by spi-uclass driver for the slave device.
So avoid reading above property from the platform driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove fixed reference clk used by plat->frequency and use clk
subsystem to get reference clk. As per spi dt bindings
"spi-max-frequency" property should be used by the slave devices.
This property is read by spi-uclass driver for the slave device.
So avoid reading above property from the platform driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There also a need to check return values to make sure that clocks were
enabled and setup properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The most of Xilinx evaluation boards have FMC connectors which contain
small eeprom for card identification. That's why read content of eeprom and
record it.
Also generate cardX_ variables for easier script handling.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Starts to use new way how eeproms should be referenced.
Reference is done via nvmem alias nodes. When this new way is specified
code itself read the eeprom and decode xilinx legacy format and fill struct
xilinx_board_description. Then based on information present there board_*
variables are setup.
If variables are saved and content can't be changed information is just
shown on console.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for getting a node/property from aliases.
The similar functionality is provided for chosen node and this
implemenatation is copy of it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default 48B sha3 hash value is written to srcaddr which is not the best
solution in case of that you want to use data for other operations. That's
why add key_addr optional parameters which enables to write 48B sha3 hash
value to specified address.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
This patch adds support for encryption and decryption on a given data
blob using different key sources such as userkey(KUP), device key and
PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has
been introduced.
Command:
zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n"
Encrypts or decrypts blob of data at src address and puts it\n"
back to dstaddr using key and iv at keyaddr and ivaddr\n"
respectively. keysrc values specifies from which source key\n"
has to be used, it can be User/Device/PUF key. A value of 0\n"
for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n"
aesop value would specify the operationwhich can be 0 for\n"
decrypt and 1 for encrypt(1) operation\n";
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPL DT contains only nodes which are contain u-boot,dm-pre-reloc property.
iommu node is not this case that's why when DT is read DTC reports some
warnings.
$ dtc -I dtb -O dts dts/dt-spl.dtb >/dev/null
<stdout>: Warning (iommus_property): /amba/spi@ff0f0000:iommus: Could not get phandle node for (cell 0)
<stdout>: Warning (iommus_property): /amba/mmc@ff160000:iommus: Could not get phandle node for (cell 0)
<stdout>: Warning (iommus_property): /amba/mmc@ff170000:iommus: Could not get phandle node for (cell 0)
SPL also has an option to remove some DT properties which are useless for
SPL to make DT even smaller.
Default DT properties are pinctrl-0 pinctrl-names interrupt-parent
interrupts which are already removed.
The patch extends this list with iommus to get rid of above warnings.
Also power-domains unused properties can be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sometimes it is very useful to be able disable/enable cache that's why
enable commands for it by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga bitstream needs to be listed in config node in FIT image. Only tested
option is bitstream in BIN format.
Enabling this feature increase code size by almost 4k.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf
is normally used by SPL that's code which uses simple_itoa() has missing
reference. That's why refactor code by using on snprintf() instead of
strncpy()/strncat() combination. This change also descrease code size by
saving 24B based on buildman.
aarch64: (for 1/1 boards) all -22.0 rodata +2.0 text -24.0
xilinx_zynqmp_virt: all -22 rodata +2 text -24
u-boot: add: 0/0, grow: 0/-1 bytes: 0/-24 (-24)
function old new delta
board_init 520 496 -24
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In case of fpga loading (which can be huge) 100ms is not enough. That's why
extend timeout 10 times to wait maximum 1s to get ACK back.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Don't know reason but in regular flow addr_hi/low are swapped in ATF. It
means when fpga load is done from EL3 there is a need to swap it for PMUFW
to load bitstream.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mini u-boot timer clock is not updated when u-boot is migrated from
emulator to silicon. Due to this slower clock of 2.72Mhz, delay() functions
are not working accurately. Update CONFIG_COUNTER_FREQUENCY to 100Mhz.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mini u-boot eMMC dt parameters are not in sync with full u-boot dt.
Frequency for eMMC is fixed to 25Mhz. Due to this, mmc multi-block write
commands are failing. Increase frequency to 200Mhz to fix this issue.
Add bus-width = <8>, non-removable and disable-wp properties to the node
as this is eMMC.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add distro boot support for microblaze and enable jtag, qspi,
dhcp, pxe boot targets for distro boot.
Enable DISTRO_DEFAULTS config in microblaze defconfig and also
enable support for spi xilinx driver & spi vendors to access
spi flash by distro boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Setup all the distro boot related environment variables at
run time. Add BOOT_SCRIPT_OFFSET config to microblaze board
Kconfig.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9cg version was supported before code refactoring. The patch is adding it
back.
Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Adding Z-turn board V5 to resolve the change between:
"Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035
"Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031
At this time the S25FL128SAGNFI003 doesn't work because of bug:
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
zynq-zturn was checked on V5 board, same error.
Maybe Z-turn board have the same problem (board with W25Q128BVFIG).
Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add missing documentation for Xilinx ZynqMP configuration with steps how
to configure it and run it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Several drivers have been added without updating documentation.
And also some dt bindings have been moved to yaml.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add fragment to cover documenation for Xilinx platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Implement early init by calling generic board_init_f_alloc_reserve and
board_init_f_init_reserve functions:
* drop SYS_MALLOC_F_LEN related code, as allocation and gd->malloc_base
assignment are taken care of by the generic functions
* drop _gd logic
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Currently, the exceptions setup code is duplicated in pre-relocation and
post-relocation init. Factor out this code to __setup_exceptions asm
routine to get rid of the duplication.
__setup_exceptions is called with a relocation offset parameter (r5)
which is set to zero for pre-reloc init and gd->reloc_off for post-reloc
exception setup.
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DM_VIDEO conversion deadline has passed, disable VIDEO config.
Boards should convert to DM_VIDEO if they need video console
support.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
DM_VIDEO conversion deadline has passed, disable VIDEO config.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Erik van Luijk <evanluijk@interact.nl>
- No need to check before free in kendryte clk.
- Only enable OF_BOARD_FIXUP if U-Boot is configured for S-Mode.
- Reduce k210 dts DMA block size
- Move timers into drivers/timer
- Correct fu540 dts reg size of clint node
Half of this driver is a DM-based timer driver, and half is RISC-V-specific
IPI code. Move the timer portions in with the other timer drivers. The
KConfig is not moved, since it also enables IPIs. It could also be split
into two configs, but no boards use the timer but not the IPI atm, so I
haven't split it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This is a regular timer driver, and should live with the other timer
drivers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Although the max DMA size supported by the hardware register is 22 bits (or
4M), the Linux driver for this device only supports transfers of up to 2M.
On a device with 8M total memory, I don't think it will make too much of a
difference.
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
It is unsafe to enable OF_BOARD_FIXUP only based on OF_SEPARATE.
OF_SEPARATE may indicate that the user wishes U-Boot to use a different
device tree than one obtained via OF_PRIOR_STAGE. However, OF_SEPARATE may
also indicate that the device tree which would be obtained via
OF_PRIOR_STAGE is invalid, nonexistant, or otherwise unusable. In this
latter case, enabling OF_BOARD_FIXUP will result in corruption of the
device tree. To remedy this, only enable OF_BOARD_FIXUP if U-Boot is
configured for S-Mode.
Fixes: 1c17e55594
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
free() checks if its argument is NULL. No need to check it twice.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Highlights:
- Fix a problem with the bootm overlap tests
- Remove duplicated code in fatwrite
- Cleanup our current "misc" command code and add a new one for misc
class devices.
- Various GPIO fixes
It doesn't need to consider start byte address.
If ramdisk size is 0x800000 and start address is 0x2700000, then it's
used until 0x02efffff, not 0x02f00000. But it's detected to overlapt RD
image, when kernel start address is 0x02f00000.
Because it's doing wrong calculation about rd_len.
This patch fixed wrong calculation address position when check
condition.
In addition, it needs to check one more condition about overlapping
entire area.
Fixes: commit fbde7589ce ("common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
do_save() function defined in fs.c also supports FAT file system
re-use the same for fatwrite command.
Also fix the FAT test script to match the expected output.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Enable the command "misc" for accessing miscellaneous devices with
a MISC uclass driver. The command provides listing all MISC devices
as well as read and write functionalities via their drivers.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
The "cmd/Kconfig" has a TODO description for CMD_MISC that it should
really be named as CMD_SLEEP. Change it in the whole source tree.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
This change fixes two issues when building u-boot-nodtb.bin target:
* Remove intermediate binary u-boot-nodtb.bin from disk when static_rela
call (which modifies u-boot-nodtb.bin binary) failed. It is required
because previous objcopy call creates binary and static_rela finish it.
* Do not call static_rela cmd when u-boot-nodtb.bin binary was not
created/updated by previous objcopy call.
Second fix would ensure that u-boot-nodtb.bin binary is not updated when
all prerequisites were up-to-date. And therefore final binary u-boot.bin
is not updated in case all prerequisites were not modified and were
up-to-date.
Now running 'make SOURCE_DATE_EPOCH=0 u-boot.bin' second time now does not
touch u-boot.bin binary in case nothing was modified, so GNU make can
correctly detect that everything is up-to-date.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the size of states_array to avoid overflow for
dev_pdata->voltages[j] and dev_pdata->states[j].
As the size of array is GPIO_REGULATOR_MAX_STATES, the size of
states_array is limited by GPIO_REGULATOR_MAX_STATES * 2 = 4
instead of 8 previously.
The value of the "count" variable is limited by the third parameter of
fdtdec_get_int_array_count.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the CMD_MDIO Kconfig option by removing the "is not set"
indication from all the defconfigs for this SoC.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On all newer Layerscape SoCs, only the export-controlled ciphers of the
crypto module are disabled on non-E parts. Thus it doesn't make sense to
completely remove the node. Linux will figure out what is there and what
is not.
Just remove it for older SoCs, where the module is indeed completely
disabled on non-E parts.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board supports 16 configuration bits which can be manipulated with
this command. See the board's README for a detailed explanation on each
bit.
Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add basic support for the Kontron SMARC-sAL28 board. This includes just
the bare minimum to be able to bring up the board and boot linux.
For now, the Single and Dual PHY variant is supported. Other variants
will fall back to the basic variant.
In particular, there is no watchdog support for now. This means that you
have to disable the default watchdog, otherwise you'll end up in the
recovery bootloader. See the board README for details.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The register to enable/disable the write-permission of DBI RO
registers should be accessed via the CFG_ADDR/CFG_DATA registers
instead of accessing directly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As per hardware documentation, ECx_PMUX has precedence
over SerDes protocol.
For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII
through SerDes protocol but ECx_PMUX configured them as RGMII,
then the ports will be configured as RGMII and not SGMII.
Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2160
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable "optee_rpmb" command to write/read named persistent values
created on RPMB by opening session with OPTEE AVB TA.
This provides easy test for establishing a session with OPTEE
TA and storage of persistent data in MMC RPMB.
It includes following subcommands:
optee_rpmb read_pvalue:read persistent values on rpmb via OPTEE AVB TA
optee_rpmb write_pvalue:write persistent values on rpmb via OPTEE AVB
TA
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
In the current implementation, u-boot creates iommu mappings only
for PCI devices enumarated at boot time thus does not take into
account more dynamic scenarios such as SR-IOV or PCI hot-plug.
Add an u-boot env var and a device tree property (to be used for
example in more static scenarios such as hardwired PCI endpoints
that get initialized later in the system setup) that would allow
two things:
- for a SRIOV capable PCI EP identified by its B.D.F specify
the maximum number of VFs that will ever be created for it
- for hot-plug case, specify the B.D.F with which the device
will show up on the PCI bus
More details can be found in the included documentation:
arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix duplication of this code by placing it in a common function.
Furthermore, the resulting function will be re-used in upcoming
patches.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Move the pci device related fdt fixup in a function in order to
re-use it in a following patch. While at it, improve the error
handling.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
- Assorted updates for Xen, IPQ40xx, ASpeed, Keymile
- Assorted typo / documentation fixes
- Fix default preboot cmd to act like before with USB_STORAGE set
- A number of other bugfixes throughout the code
dev_err has been used for debugging and a few dev_err message are
printed for normal code execution. Make them dev_dbg instead.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
By using a hypervisor call, we can implement DEBUG_UART on xen.
This will allow us to see messages even earlier than serial_init().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This new function, xen_debug_putc(), is intended to be used to
enable CONFIG_DEBUG_UART on xen guest.
Please note that the underlying functionality in Xen is available
only when Xen is configured with !NDEBUG but is much simpler than
a generic HYPERVISOR_console_io().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
At present, DM_FLAG_PRE_RELOC is set only if !OF_CONTROL.
It doesn't make sense for this para-virtualized driver.
With this patch applied, you will be able to see early boot messages:
U-Boot 2020.10-00001-ge442e71a6c52-dirty (Oct 15 2020 - 11:02:25 +0900)
xenguest
Xen virtual CPU
Model: XENVM-4.15
DRAM: 128 MiB
PVBLOCK:
(XEN) gnttab_mark_dirty not implemented yet
pvblock: 0
In: hypervisor
Out: hypervisor
Err: hypervisor
xenguest#
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
1. Rename AST2500 reset driver from ast2500-reset.c
to reset-ast2500.c
2. Rename AST2500 reset kconfig option from AST2500_RESET
to RESET_AST2500
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The System Control Unit (SCU) controller of Aspeed
SoCs provides the reset control for each peripheral.
This patch refactors the reset method to leverage
the SCU reset control. Thus the driver dependency
on watchdog including dedicated WDT API and reset
flag encoding can be eliminated.
The Kconfig description is also updated accordingly.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The 12d152620d commit fixed the get_rate helper because the set_parent
one did not re-parent the clock device to the new parent. The 4d139f3838
commit allows you to remove this workaround by calling the
clk_get_parent_rate routine.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Fix up the documentation which was lost in a merge conflict in the
conversion to RST.
Fixes: 52d3df7fef ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove the default value "usb start" for CONFIG_USB_STORAGE as the USB
storage boot initialization is correctly managed by distro boot command
('usb_boot' defined in include/config_distro_bootcmd.h already include
the command 'usb start').
Fixes: 324d77998e ("Define default CONFIG_PREBOOT with right config option")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace 'dev->dev' with '@desc->dev' in the gpio_request_by_name function
desc parameter description.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Instead having a hard coded value for "cramfsaddr" after compile time,
we change it to take the variable "cramfsaddr" for the ubicopy variable.
This makes sure that ubicopy uses the right address, even when
the value for "cramfsaddr" has changed.
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Due to increasing kernel image sizes we get problems when decompressing
the kernel image. To fix this we need to change the addresses where we
load and where we extract the kernel. Also we need to adapt the address
where to load the CRAMFS image and where to load the DTB file.
While at it also harmonize all boards for PPC and ARM to have the
same values. Also we add a new variable "env_version", so that the
userspace is able to detect if this is a u-boot binary with updated
values or not.
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Remove old values from kmp204x.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
In the International System of Units (SI) the prefix kilo is abbreviated as
'k' not 'K'. 'K' is the symbol for Kelvin.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Since we now have the driver for Qualcomm PRNG HW, lets use it and add the necessary clocks and nodes.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This adds the driver for the IPQ40xx built-in MDIO.
This will be needed to support future PHY driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Since we have SPI driver for IPQ40xx QUP SPI controller, lets add the necessary nodes, pinctrl and clocks.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.
Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
When building on a 32bit host the following warning occurs:
tools/image-host.c: In function ‘fit_image_read_data’:
tools/image-host.c:296:56: warning: format ‘%ld’ expects argument of
type ‘long int’, but argument 3 has type ‘__off64_t’
{aka ‘long long int’} [-Wformat=]
printf("File %s don't have the expected size (size=%ld, expected=%d)\n",
~~^
%lld
filename, sbuf.st_size, expected_size);
~~~~~~~~~~~~
tools/image-host.c:311:62: warning: format ‘%ld’ expects argument of
type ‘long int’, but argument 4 has type ‘__off64_t’
{aka ‘long long int’} [-Wformat=]
printf("Can't read all file %s (read %zd bytes, expexted %ld)\n",
~~^
%lld
filename, n, sbuf.st_size);
~~~~~~~~~~~~
Fix the format strings.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As the ownership is now Hitachi Power Grids, change the license string
and adapt the compatible string in DTS files. For kmeter1.dts we
change it to "keymile,KMETER1" for now, as this is then compliant with
what is submitted to the linux kernel. All other boards don't have
a upstreamed version in linux mainline.
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
CC: Heiko Schocher <hs@denx.de>
CC: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Convert all the other http:// links to https:// .
www.denx.de/twiki/ seems to move to www.denx.de/wiki/ ,
so change it.
I checked all links in this patch are valid.
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
doc/arch/index.rst is a list of links to each architecture.
As for the sandbox details, doc/arch/sandbox.rst looks better.
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch include these updates
- Git repository has moved to GitLab
- HTTPS access to the file server is allowed
- pre-built images are no longer available
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
No timer drivers return an error from get_count. Instead of possibly
returning an error, just return the count directly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds kerneldocs for <timer.h>.
I don't know who should maintain doc/api/timer.rst, since the timer
subsystem seems to be maintained by SoC maintainers. MAINTAINERS is left
un-updated for the moment.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The sandbox is built with the SDL2 library with invokes the X11 library
which in turn calls getc(). But getc() in glibc is defined as
int getc(FILE *)
This does not match our definition.
int getc(void)
The sandbox crashes when called with parameter -l.
Rename our library symbol getc() to getchar().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This code is intended do prevent one from setting a shell variable abc
by doing
abc=123
if an environment variable named abc already exists. However, the
check is broken, since the env_get is done before the split on =, so
we look up whether an environment variable "abc=123" exists, which is
obviously never the case.
One could move the code to below the split on =, but instead, just
remove it, saving a little .text: The check has never worked as
intended (it goes all the way back to the initial git commit), and it
would anyway not guard against one first setting the shell variable,
then doing 'env set abc xyz'.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
add back again special case: -2
autoboot with no delay and no check for abort
as described in Kconfig option, see common/Kconfig
help text for option BOOTDELAY.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix some comments about functions.
Move genimg_get_comp_name() above genimg_get_short_name() because
genimg_get_comp_name() is related to get_table_entry_name().
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
In show_valid_options(), this patch introduces checking whether
a category has an entry ID. If not, adding it to a list for output
is skipped before calling qsort().
This patch will affect all kinds of image header categories
(-A, -C, -O and -T flags).
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a generic function which can check whether a category has an
entry ID.
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_{SPL,TPL}_SIZE_LIMIT are defined as hex (SPL_SIZE_LIMIT was
converted in b51882d0 ("spl: Convert CONFIG_SPL_SIZE_LIMIT to hex"), but
there are still places that reference integer values. Change those to hex
as well. Also, update the Makefile to check for 0x0 instead of 0.
This also fixes the following build error when CONFIG_SPL_SIZE_LIMIT
is set by menuconfig to 0x0:
...
spl/u-boot-spl.bin exceeds file size limit:
limit: 0 bytes
actual: 0x80f0 bytes
excess: 0x80f0 bytes
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We don't want the debug output to be visible in a normal boot. Silence it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
It is much easier to read the bloblist addresses if it starts on a 4KB
boundary. Update it to align it accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function can be called when it is not known whether it will find
anything. This results in confusing log messages if the device is not
found. It is better for the caller to log the failure, if necessary.
Drop the logging from this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig
- Fix stm32prog command: parsing of FlashLayout without partition
- Update MAINTAINERS for ARM STM STM32MP
- Manage eth1addr on dh board with KS8851
- Limit size of cacheable DDR in pre-reloc stage in stm32mp1
- Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver
Remove duplicated stdio print message.
It's already displayed in common/console.c.
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Model: Odroid XU3/XU4/HC1/HC2 based on Exynos5422
Type: xu3
In: serial
Out: serial
Err: serial
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
A64-Teres-I board is a laptop which comes with a builtin keyboard.
The keyboard+trackpad controller pauses for 2 seconds at a firmware
prompt before loading its HID interface.
U-Boot needs to wait equally long to reliably enable the keyboard.
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Series-Cc: Jagan Teki <jagan@amarulasolutions.com>
Series-Cc: Lukasz Majewski <lukma@denx.de>
Series-Cc: Andre Przywara <andre.przywara@arm.com>
Olimex OLinuXino LIME2 rev. H through L uses Micrel KSZ9031 PHY.
This enables the Micrel PHY for A20-OLinuXino-Lime2-eMMC_defconfig.
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Allwinner sun50i SoCs contain an OpenRISC 1000 CPU that functions as a
System Control Processor, or SCP. ARM Trusted Firmware (ATF)
communicates with the SCP over SCPI to implement the PSCI system
suspend, shutdown and reset functionality. Currently, SCP firmware is
optional; the system will boot and run without it, but system suspend
will be unavailable.
Since all communication with the SCP is mediated by ATF, the only thing
U-Boot needs to do is load the firmware into SRAM. The SCP firmware
occupies the last 16KiB of SRAM A2, immediately following ATF.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add an entry type for a firmware blob for a System Control Processor,
given by an entry arg. This firmware is a raw binary blob.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Since commit d879616e9e ("spl: fit: simplify logic for FDT loading for
non-OS boots"), the SPL looks at the "os" properties of FIT images to
determine where to append the FDT.
The "os" property of the "firmware" image also determines how to execute
the next stage of the boot process, as in 1d3790905d ("spl: atf:
introduce spl_invoke_atf and make bl31_entry private"). For this reason,
the next stage must be specified in "firmware", not in "loadables".
To support this additional functionality, and to properly model the boot
process, where ATF runs before U-Boot, add the "os" properties and swap
the firmware/loadable images in the FIT image.
Since this description was copied as an example in commit 70248d6a2916
("binman: Support generating FITs with multiple dtbs"), update those
examples as well for correctness and consistency.
Acked-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Some boards, specifically 64-bit Allwinner boards (sun50i), are
extremely limited on SPL size. One strategy that was used to make space
was to remove the FIT "os" property parsing code, because it uses a
rather large lookup table.
However, this forces the legacy FIT parsing code path, which requires
the "firmware" entry in the FIT to reference the U-Boot binary, even if
U-Boot is not the next binary in the boot sequence (for example, on
sun50i boards, ATF is run first).
This prevents the same FIT image from being used with a SPL with
CONFIG_SPL_FIT_IMAGE_TINY=n and CONFIG_SPL_ATF=y, because the boot
method selection code looks at `spl_image.os`, which is only set from
the "firmware" entry's "os" property.
To be able to use CONFIG_SPL_ATF=y, the "firmware" entry in the FIT
must be ATF, and U-Boot must be a loadable. For this to work, we need to
parse the "os" property just enough to tell U-Boot from other images, so
we can find it in the loadables list to append the FDT, and so we don't
try to append the FDT to ATF (which could clobber adjacent firmware).
So add the minimal code necessary to distinguish U-Boot/non-U-Boot
loadables with CONFIG_SPL_FIT_IMAGE_TINY=y. This adds about 300 bytes,
much less than the 7400 bytes added by CONFIG_SPL_FIT_IMAGE_TINY=n.
Acked-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This consolidates the SoC-specific part at the top of the file to avoid
cluttering it up with preprocessor conditions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Prior to commit 7f7f8aca8257 ("sunxi: Convert 64-bit boards to use
binman"), if the BL31 environment variable was not defined, the firmware
would be loaded from a file "bl31.bin" in the current directory. Restore
that behavior by providing that as the default filename in case no entry
arg is provided, which will be the case if the environment variable is
unset.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Nodes should have a blank line separating them from sibling nodes and
properties. Add the necessary lines.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Due to an extra level of indentation, the "data" property containing the
FDT was being written repeatedly after every other property in the node.
This caused the generated FIT image to be invalid.
Move the block up one level, so the property is added exactly once.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If neither CONFIG_SPL_FIT_SOURCE nor CONFIG_USE_SPL_FIT_GENERATOR is
enabled, U_BOOT_ITS will be undefined, and attempting to make u-boot.itb
will pass invalid arguments to mkimage, causing it to print its help
message.
Remove the rule in that case, so it is more obvious that u-boot.itb is
not something that can be made. This will reduce confusion as platforms
move away from CONFIG_USE_SPL_FIT_GENERATOR, as u-boot.itb was
previously a valid goal for those platforms.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Previously, because we have no source code about the DRAM initialization
of V3s and missing some configurations (delays and MBUS QoS info), our
V3s DRAM initialization sequence is hacked from the H3 one.
As the SDK shipped with PineCube contains source code for V3s libdram,
we can retrieve these information from it and tweak some other magic
bits.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
This reverts commit eb39d8ba5f.
The commit breaks booting of fitImage by SPL, the system simply hangs.
This is because on arm32, the fitImage and all of its content can be
aligned to 4 bytes and U-Boot expects just that.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Reuben Dowle <reuben.dowle@4rf.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The current default of 0x400 for SYS_MALLOC_F_LEN is too small if any
additional drivers marked as DM_FLAG_PRE_RELOC are loaded before
relocation.
CONFIG_RSA=y which is needed for UEFI secure boot or for FIT image
verification loads the driver mod_exp_sw which has DM_FLAG_PRE_RELOC.
CONFIG_LOG=Y is another setting requiring additional early malloc
area, cf. log_init().
When running pine64-lts_defconfig with CONFIG_RSA=y and debug UART enabled
we see as output in main U-Boot
alloc_simple() alloc space exhausted
With this patch the default values of SYS_MALLOC_F_LEN and
SPL_SYS_MALLOC_F_LEN on ARCH_SUNXI are raised to 0x2000.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update email address of Maxime Ripard in git-mailrc to match more
recently updated entry in MAINTAINERS.
commit 9bd9b2bcbe ("MAINTAINERS: Update my email address")
commit bf8f4c4400 ("MAINTAINERS: Update email address for Maxime Ripard")
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
According to the devicetree and the schematic, the 3.3V power rail for
the PHY is enabled by GPIO PC16. It's wired as active-high, with a
pull-up resistor, so actually works already when the GPIO is in
High-Z state.
However we should not take any chances and explicitly set the GPIO pin
to high, to avoid accidentally losing the PHY power.
The existing MACPWR Kconfig allows to do this easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When sending a command via the MDIO bus, the Designware MAC expects some
bits in the CMD register to describe the clock divider value between
the main clock and the MDIO clock.
So far we were omitting these bits, resulting in setting "00", which
means "/ 16", so ending up with an MDIO frequency of either 18.75 or
12.5 MHz.
All the internal PHYs in the H3/H5/H6 SoCs as well as the Gbit Realtek
PHYs seem to be fine with that - although it looks like to be severly
overclocked (the MDIO spec limits the frequency to 2.5 MHz).
However the external 100Mbit PHY on the Pine64 (non-plus) board is
not happy with that, Ethernet was actually never working there, as the
PHY didn't probe.
As we set the EMAC clock (via AHB2) to 300 MHz in ATF (on the 64-bit
SoCs), and use 200 MHz on the H3, we need the highest divider of 128
to let the MDIO clock end up below the required 2.5 MHz.
This enables Ethernet on the Pine64(non-plus).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The current implementation of sun8i_get_ephy_nodes() makes quite some
assumptions, in general relying on DT path names is a bad idea.
I think the idea of the code was to determine if we are using the
internal PHY, for which there are simpler and more robust methods:
Rewrite (and rename) the existing function to simply lookup the DT node
that "phy-handle" points to, using the device's DT node.
Then check whether the parent of that PHY node is using an "H3 internal
MDIO" compatible string. If we ever get another internal MDIO bus
implementation, we will probably need code adjustments anyway, so this
is good enough for now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The error handling in recv() is somewhat broken, for instance
good_packet isn't really used, and it's hardly readable. Also we try
to check for short or too big packets, but those are actually filtered
out by the hardware.
Simplify the whole routine and improve the error handling:
- Bail out early if the current RX descriptor is not ready.
- Enable propagation of runt, huge and broken packets.
- Check for runt and huge packets, and return 0 to indicate this.
This will force the framework to call free_pkt for cleanup.
- Avoid aligning the packet buffer for invalidation again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The EMAC soft reset routine was subtly broken, using an open coded
timeout routine without any actual delay.
Remove the unneeded initial reset bit read, and call wait_for_bit_le32()
to handle the timeout correctly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When iterating over all RX/TX buffers, we were using a rather long "idx"
control variable, which lead to a nasty overlong line.
Replace "idx" with "i" to avoid this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To meet the current alignment requirements for our cache maintenance
functions, we were explicitly aligning the *arguments* to those calls.
This is not only ugly to read, but also wrong, as we need to make sure
we are not accidentally stepping on other data.
Provide wrapper functions for the common case of cleaning or
invalidating a descriptor, to make the cache maintenance calls more
readable. This fixes a good deal of the problematic calls.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
There is no reason to invalidate a TX descriptor before we are setting
it up, as we will only write to a field.
Remove the not needed invalidate_dcache_range() call.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When we initialise the TX descriptors, there is no need yet to clean
them all to memory, as they don't contain any data yet. Later we will
touch and clean each descriptor anyway.
However we tell the MAC about the beginning of the chain, so we have to
clean at least the first descriptor, to make it clear that this is empty
and there are no packets to transfer yet.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Before we initialise the RX descriptors, there is no need to *clean*
them from the cache, as we touch them for the first time.
However we should cover the case that those buffers contain dirty cache
lines, which could be evicted and written back to DRAM any time later,
in the worst case *after* the MAC has transferred a packet into them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The EMAC driver contains a lot of magic bits, although the manuals
and the Linux driver have all names for them.
Define those names and use them when programming the registers.
Also this replaces a lot of readl/mask/writel operations with the much
easier-to-read setbits_le32() macro.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Apparently due to copying from some older or converted driver, the
sun8i_emac driver contains pointless wrapper functions to bridge
between a legacy driver and the driver model.
Since sun8i_emac is (and always was) driver model only, there is no
reason to have those confusing wrappers. Just remove them, and use
the driver model prototypes directly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When preparing the register value for the MDIO command register, we
start with a zeroed register, so there is no need to mask off certain
bits before setting them.
Simplify the sequence, and rename the variable to a more matching
mii_cmd on the way.
Also the open-coded time-out routine can be replaced with a much safer
and easier-to-read call to wait_for_bit_le32().
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When initialising the TX DMA descriptors, we mostly chain them up,
but of course don't know about any data or its length yet.
That means they are still invalid, and the OWN bit should NOT be set
yet.
In fact when we later tell the MAC about the beginning of the chain,
and enable TX DMA in the start() routine, the MAC will start fetching
TX descriptors prematurely, as it can be seen by dumping the TX_DMA_STA
and TX_DMA_CUR_DESC registers.
Clear the owner bit, to not give the MAC the wrong illusion that it
owns the descriptors already.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When phy_startup() returns with an error, because there is no link or
the user interrupted the process, we shall stop the _start() routine
and return with an error, instead of proceeding anyway.
This fixes pointless operations when there is no Ethernet cable
connected, for instance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When partitions are not available on a device the command stm32prog raises
an error but a device can have no partition to check in init_device()
and the command need to continue to the next part_id.
This patch correct an issue for ram0 target, when block_dev and mtd
are NULL.
For example with the simple flashlayout file:
Opt Part Name Type Device Offset Binary
- 0x01 fsbl Binary none 0x0 tf-a-serialboot.stm32
- 0x03 ssbl Binary none 0x0 u-boot.stm32
P 0x10 kernel System ram0 0xC2000000 uImage.bin
P 0x11 dtb FileSytem ram0 0xC4000000 stm32mp157f-ev1.dtb
Fixes: ffc405e63b ("stm32mp: stm32prog: add upport of partial update")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate CONFIG_CMD_ELF to accept the command "bootelf".
This patch simplifies the file stm32mp defconfig, as we have
no reason to deactivate this command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate CONFIG_CMD_IMPORTENV to accept the command "env import".
This command is useful in script to include some variable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add the STM32MP1 RNG driver in the list of drivers supported by
the STMicroelectronics STM32MP15x series.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add files and directories regex "stm32" and "stm" in "ARM STM STM32MP"
platform to avoid missing files or drivers supported by the
STMicroelectronics series STM32MP15x.
This patch adds the rules already used in Linux kernel for
ARM/STM32 ARCHITECTURE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Cosmetic update of gpio.h:
- remove enumerate: stm32_gpio_port, stm32_gpio_pin
because STM32_GPIO_XXX values are unused
- move STM32_GPIOS_PER_BANK in stm32_gpio.c
as its value is IP dependent and not arch dependent
No functional change as number of banks and number of gpio by banks
is managed by device tree since since DM migration and
commit 8f651ca60b ("pinctrl: stm32: Add get_pins_count() ops").
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
In pre-reloc stage, U-Boot marks cacheable the DDR limited by
the new config CONFIG_DDR_CACHEABLE_SIZE.
This patch allows to avoid any speculative access to DDR protected by
firewall and used by OP-TEE; the "no-map" reserved memory
node in DT are assumed after this limit:
STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
Without security, in basic boot, the value is equal to STM32_DDR_SIZE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
mmc_of_parse() can populate the 'f_max' and 'host_caps' fields of
struct mmc_config from devicetree.
The same logic is duplicated in stm32_sdmmc2_probe(). Use
mmc_of_parse(), which is more generic.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
"cap-mmc-highspeed" enables support for 26 MHz MMC, but there is no
additional flag to enable 52 MHz MMC. In Linux. "cap-mmc-highspeed"
is used for MMC HS at both 26MHz and 52MHz.
Use the same approach and enable MMC_CAP(MMC_HS_52) host capability
when "cap-mmc-highspeed" is found in the devicetree. In the event an
MMC card doesn't support 52 MHz, it will be clocked at a speed based
on its EXT CSD, even on 52 MHz host controllers
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
An earlier conversion from struct to defines introduced two errors, both
related to setup of EMAC routed via the FPGA. One of the offsets was
incorrect, and the EMAC0/EMAC1 were swapped.
The effect of this was rather odd: both ports could operate at gigabit,
but one of them would fail to transmit when operating at 100Mbit.
Fixes: db5741f7a8 ("arm: socfpga: Convert system manager from struct to defines")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add fallback compatibility string for R-Car Gen3 and RZ/G2.
Also sorted the compatible string as per SoC ID.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Add MediaTek USB3 Dual-Role controller driver to ARM MEDIATEK,
and add myself as a maintainer for it.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable mtu3, xhci, tphy drivers.
Device mode: enable fastboot;
Host mode: enable USB, FAT commands, and fixed regulator,
mass storage drivers;
Due to device mode is enabled by default, comment out
the host mode config here.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add an entry in usb_gadget_controller_number() for the MTU3
gadget controller. It is used to bind the USB Ethernet driver.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds support for the MediaTek USB3 DRD controller,
its host side is based on xHCI, this driver supports device mode
and host mode.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
There is only declaration of usb_speed_string(), but no definition,
so add it to avoid build error when call it.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add dt-binding for MediaTek USB3 DRD Driver which it's ported
from the Linux kernel DTS binding:
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
Commit ID:
34d0545978b6 ("dt-bindings: usb: mtu3: fix typo of DMA clock name")
Due to Dual-Role switch is not supported in Uboot, some properties
are removed or changed.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add bindings for common properties, include maximum-speed,
dr_mode and phy_type
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In buffer DMA mode, gadget should re-configure EP 0 to received SETUP
packets when doeptsiz.xfersize is equal to a setup packet size(8 bytes)
and EP 0 is in WAIT_FOR_SETUP state.
Since EP 0 is not enabled in WAIT_FOR_SETUP state, SETUP packets is NOT
received from RxFifo and wriiten to the external memory.
Signed-off-by: Chance.Yang <chance.yang@vatics.com>
With DM enabled the ethernet code will receive a packet, call
the push method that's set by the EFI network implementation
and then free the packet. Unfortunately the push methods only
sets a flag that the packet needs to be handled, but the code
that provides the packet to an EFI application runs after the
packet has already been freed.
To rectify this issue, adjust the push method to accept the packet
and store it in a temporary buffer. The EFI application then gets
the data copied from that buffer. This way the packet is cached
until is is needed.
The DM Ethernet stack tries to receive 32 packets at once, thus
we better allocate as many buffers as the stack.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With a define for the magic number of packets received as batch
we can make sure that the EFI network stack caches the same amount
of packets.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Second set of u-boot-atmel features for 2021.01 cycle:
This feature set brings the rework of the clock tree for sam9x60 SoC.
This makes the clock tree fully compatible with Common Clock Framework
and allows full clock configuration in U-Boot. This means that the
sam9x60 boards can boot now using U-Boot.
This also includes the definitions for sam9x60 SiPs and a divisor fix
for the clock on sama7g5 SoC.
Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Done with:
./tools/moveconfig.py VIDEO_BMP_GZIP
The 3 suspicious migration because CMD_BMP and SPLASH_SCREEN
are not activated in these defconfigs:
- trats_defconfig
- s5pc210_universal_defconfig
- trats2_defconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For levels equal to the maximum value, the duty cycle must be equal to
the period.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The timing values for dw-dsi are often dependent on the used display and
according to Philippe Cornu will most likely also depend on the used phy
technology in the soc-specific implementation.
To solve this and allow specific implementations to define them as needed
add a new get_timing callback to phy_ops and call this from the dphy_timing
function to retrieve the necessary values for the specific mode.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1] 25ed8aeb9c39 ("drm/bridge/synopsys: dsi: driver-specific configuration of phy timings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
syslog_test.h is in test/log/, not include/
Fixes: 52d3df7fef ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that linux/compat.h does not define these macros, we do not need to
undefine them.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All users of these functions now include dm/device_compat.h directly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver doesn't use DM (in the correct places), so we use a device and
not a udevice. We also need to include device_compat.h
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This patch enhances the Octeon TX/TX2 watchdog driver to fully enable
the WDT. With this changes, the "wdt" command is now also supported
on these platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
- fsl_esdhc_imx cleanup
- not send cm13 if send_status is 0.
- Add reinit API
- Add mmc HS400 for fsl_esdhc
- Several cleanup for fsl_esdhc
- Add ADMA2 for sdhci
- Octeon TX: Add NAND driver (Suneel)
- Octeon TX: Add NIC driver driver (Suneel)
- Octeon TX2: Add NIC driver driver (Suneel)
- Armada 8040: Add iEi Puzzle-M80 board support (Luka)
- Armada A37xx SPI: Add support for CS-GPIO (George)
- Espressobin: Use Linux model/compatible strings (Andre)
- Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre)
- Armada A37xx: Small cleanup of config header (Pali)
Sphinx.override_domain() is deprecated since Sphinx 1.8 and removed in
Sphinx 3.
Use Sphinx.add_domain(, override=True) instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Set the defaults on probe for the packet buffer size registers
for the i210.
The TX/RX PBSIZE register of the i210 resets to its default value
only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5
chapter 8.3 'Internal Packet Buffer Size Registers'.
If something (another driver, another OS, etc.) modifies this register
from its default value, the e1000 driver doesn't function correctly. It
detects a hang of the transmitter and continuously resets the adapter.
Here we set this value to its default when resetting the i210 to
resolve this issue.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Make including the prefix
an error in checkpatch.pl so calls in the wrong format aren't
accidentally reintroduced.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Some of these were being
fixed every now and then, see:
commit 71ba2cb0d6 ("board: stm32mp1: correct CONFIG_IS_ENABLED usage for LED")
commit a5ada25e42 ("rockchip: clk: fix wrong CONFIG_IS_ENABLED handling")
commit 5daf6e56d3 ("common: console: Fix duplicated CONFIG in silent env callback")
commit 48bfc31b64 ("MIPS: bootm: Fix broken boot_env_legacy codepath")
Fix all files found by `git grep "CONFIG_IS_ENABLED(CONFIG"` by running
':%s/CONFIG_IS_ENABLED(CONFIG_\(\w+\))/CONFIG_IS_ENABLED(\1)/g' in vim.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the description of the global data pointer to the generated HTML
documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the missing Sphinx documentation for struct global_data and
gd_board_type().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sphinx documentation is only available for enums not for #defines.
Anyway it is better to keep related definitions in an enum.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Functions that are used in multiple C modules should be defined in an
include.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Michael Walle <michael@walle.cc>
get_ticks does not always succeed. Sometimes it can be called before the
timer has been initialized. If it does, it returns a negative errno.
This causes the timer to appear non-monotonic, because the value will
become much smaller after the timer is initialized.
No users of get_ticks which I checked handle errors of this kind. Further,
functions like tick_to_time mangle the result of get_ticks, making it very
unlikely that one could check for an error without suggesting a patch such
as this one.
This patch panics if we ever get an error. There are two cases in which
this can occur. The first is if we couldn't find/probe the timer for some
reason. One reason for this is if the timer is not available so early. This
likely indicates misconfiguration. Another reason is that the timer has an
invalid/missing device tree binding. In this case, panicing is also
correct. The second case covers errors calling get_count. This can only
occur if the timer is missing a get_count function (or on RISC-V, but that
should be fixed soon).
Fixes: c8a7ba9e6a
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This parallels what I added for FAT in commit 6731bef696, allowing the
environment to be found in a specific partition on the device that the
board's mmc_get_env_dev() returns. On the Banana Pi R2 that means the
device that U-Boot was loaded from; either the internal eMMC or an SD
card.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Since it's so trivial I could just about tolerate this when there were only
two copies of it. But now there are about to be three.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The EFI_RNG_PROTOCOL is needed for address randomization in Linux.
We should provide it by default on QEMU.
Reported-by: François Ozog <francois.ozog@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To make the button command useful in a shell script it should return the
status of the button:
* 0 (true) - pressed, on
* 1 (false) - not pressed, off
The button command takes only one argument. Correct maxargs.
Adjust the Python unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
For testing purposes keep the output value when switching to input.
This allows us to manipulate the input value via the gpio command.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Using different strings for the device tree node labels and the label
property of buttons sharpens the button label unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
To simplify configuration and keep synchronized the PStore/Ramoops between
U-Boot and the Linux kernel, this commit dynamically adds the Ramoops
parameters defined in the U-Boot session to the Device Tree.
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Add PStore command to sandbox and sandbox64 defconfigs.
Add test checking:
- 'pstore display' of all records
- 'pstore display' only the 2nd dump record
- 'pstore save' of all records
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
[trini: Adjust to always load files from source directory]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
This patch adds a new pstore command allowing to display or save ramoops
logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. Records size should be the same as the ones
used by kernel, and should be a power of 2.
This command allows:
- to display uncompressed logs
- to save compressed or uncompressed logs, compressed logs are saved as a
compressed stream, it may need some work to be able to decompress it,
e.g. adding a fake header:
"printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" |
cat - dmesg-ramoops-0.enc.z | gzip -dc"
- ECC part is not used to check memory corruption
- only 1st FTrace log is displayed or saved
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
[trini: Minor updates for current design, correct spacing in rST]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Newer eSDHC controllers support ADMA2 descriptor tables which support
64bit DMA addresses. One notable user of addresses in the upper memory
segment is the EFI loader.
If support is enabled, but the controller doesn't support ADMA2, we
will fall back to SDMA (and thus 32 bit DMA addresses only).
Signed-off-by: Michael Walle <michael@walle.cc>
These comments are relict for old, now removed config options.
So remove these obsoleted comments too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for
emmc, since our dtsi is still based on downstream and sdhc0 is used for
the sd card.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Move most of the dts to the new common armada-3720-espressobin.dtsi
file, just like Linux, but keep the current, downstream based, version.
The dts itself is imported from Linux.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Fix the actual board vendor and ease synching dts files from Linux.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The device tree has a way to specify GPIO lines as chip selects. From
the binding docs:
So if for example the controller has 2 CS lines, and the cs-gpios
property looks like this:
cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
Then it should be configured so that num_chipselect = 4 with the
following mapping:
cs0 : &gpio1 0 0
cs1 : native
cs2 : &gpio1 1 0
cs3 : &gpio1 2 0
Add support for this, while retaining backward-compatibility with
existing device trees; the driver will preserve existing behavior if a
cs-gpios list is not given, or if a particular line is specified as <0>
(native).
This implementation is inspired by similar implementations in
neighboring drivers for other platforms: atmega, mxc, etc.
Signed-off-by: George Hilliard <ghilliar@amazon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for the marvell,armada8040-puzzle-m801 compatible string
in the board/Marvell/mvebu_armada-8k/board.c file to initialize the
networking on iEi Puzzle-M801 board (2x CP1 1 Gb ports).
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add initial U-Boot support for the iEi Puzzle-M801 board based on the
Marvell Armada 88F8040 SoC.
Currently supported hardware:
1x USB 3.0
4x Gigabit Ethernet
2x SFP+ (with NXP PCA9555 and NXP PCA9544)
1x SATA 3.0
1x M.2 type B
1x RJ45 UART
1x SPI flash
1x EPSON RX8010 RTC
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Adds support for Network Interface controllers found on
OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Adds support for Network Interface controllers found on
OcteonTX SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Adds support for NAND controllers found on OcteonTX or
OcteonTX2 SoC platforms. Also includes driver to support
Hardware ECC using BCH HW engine found on these platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Fix verified boot on BE targets
- Add support for multiple required keys in verified boots
- Add support for Initialization Vectors in AES keys in FIT images
- Assorted fixes in the RSA code
Commit fdf0819afb (rsa: fix alignment issue when getting public
exponent) changed the logic to avoid doing an 8-byte access to a
possibly-not-8-byte-aligned address.
However, using rsa_convert_big_endian is wrong: That function converts
an array of big-endian (32-bit) words with the most significant word
first (aka a BE byte array) to an array of cpu-endian words with the
least significant word first. While the exponent is indeed _stored_ as
a big-endian 64-bit word (two BE words with MSW first), we want to
extract it as a cpu-endian 64 bit word. On a little-endian host,
swapping the words and byte-swapping each 32-bit word works, because
that's the same as byte-swapping the whole 64 bit word. But on a
big-endian host, the fdt32_to_cpu are no-ops, but
rsa_convert_big_endian() still does the word-swapping, breaking
verified boot.
To fix that, while still ensuring we don't do unaligned accesses, add
a little helper that first memcpy's the bytes to a local fdt64_t, then
applies fdt64_to_cpu(). [The name is chosen based on the
[bl]eXX_to_cpup in linux/byteorder/generic.h].
Fixes: fdf0819afb ("rsa: fix alignment issue when getting public exponent")
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
The algo name should match between the FIT's signature node and the
U-Boot's control FDT.
If we do not check it, U-Boot's control FDT can expect sha512 hash but
nothing will prevent to accept image with sha1 hash if the signature is correct.
Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr>
This commit add the support in u-boot to read the IV
in the FIT image instead of u-boot device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Binaries may be encrypted in a FIT image with AES. This
algo needs a key and an IV (Initialization Vector). The
IV is provided in a file (pointer by iv-name-hint in the
ITS file) when building the ITB file.
This commits adds provide an alternative way to manage
the IV. If the property iv-name-hint is not provided in
the ITS file, the tool mkimage will generate an random
IV and store it in the FIT image.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
We assign first_deleted = 0. There is no need to check its value without
any further assignment in between.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add documentation about 'required-mode' property in /signature node
in U-Boot's control FDT.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds vboot tests to verify the support for multiple
required keys using new required-mode DTB policy.
This patch also fixes existing test where dev
key is assumed to be marked as not required, although
it is marked as required.
Note that this patch re-added sign_fit_norequire().
sign_fit_norequire() was removed as part of the following:
commit b008677daf ("test: vboot: Fix pylint errors").
This patch leverages sign_fit_norequire() to fix the
existing bug.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently FIT image must be signed by all required conf keys. This means
Verified Boot fails if there is a signature verification failure
using any required key in U-Boot DTB.
This patch introduces a new policy in DTB that can be set to any required
conf key. This means if verified boot passes with one of the required
keys, U-Boot will continue the OS hand off.
There were prior attempts to address this:
https://lists.denx.de/pipermail/u-boot/2019-April/366047.html
The above patch was failing "make tests".
https://lists.denx.de/pipermail/u-boot/2020-January/396629.html
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Minor cleanup on K3 env variables
- Fix OSPI compatible for J721e
- Drop unused property in omap-usb2-phy
- Update Maintainer for am335x-guardian board.
Currently, readl/writel and esdhc_read32/esdhc_write32 are used. To align
the usage, change to only use esdhc_read32/esdhc_write32.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.
Signed-off-by: Michael Walle <michael@walle.cc>
First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
setup code is identical for both directions, except for the data pointer.
Thus, unify them.
Signed-off-by: Michael Walle <michael@walle.cc>
Use the dma_{map,unmap}_single() calls. These will take care of the
flushing and invalidation of caches.
Signed-off-by: Michael Walle <michael@walle.cc>
SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove unnecessary CONFIG_FSL_LAYERSCAPE.
Also make the error message more concise.
Signed-off-by: Michael Walle <michael@walle.cc>
This 1ms delay before sending command already exist from the beginning
of the fsl_esdhc driver added in year 2008. Now this driver has been
split for two files: fsl_esdhc.c and fsl_esdhc_imx.c. fsl_esdhc_imx.c
only for i.MX series. i.MX series esdhc/usdhc do not need this 1ms delay
before sending any command. So remove this 1ms, this will save a lot
time if handling a large mmc data.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
According to the code logic in __mmc_switch, if the parameter 'send_status'
is zero, no need to send cmd13, just wait the stated timeout time, then
can return directly.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add properties related to eMMC HS400 mode.
mmc-hs400-1_8v;
bus-width = <8>;
They had been already in kernel dts file since the first
lx2160ardb dts patch.
b068890 arm64: dts: add LX2160ARDB board support
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
There was a fix-up for eMMC HS400 stability issue in Linux.
Patch link:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
commit/?id=58d0bf843b49fa99588ac9f85178bd8dfd651b53
Description:
Currently only LX2160A eSDHC supports eMMC HS400. According to
a large number of tests, eMMC HS400 failed to work at 150MHz,
and for a few boards failed to work at 175MHz. But eMMC HS400
worked fine on 200MHz. We hadn't found the root cause but
setting eSDHC_DLLCFG0[DLL_FREQ_SEL] = 0 using slow delay chain
seemed to resovle this issue. Let's use this as fixup for now.
Introduce the fix-up in u-boot since the issue could be reproduced
in u-boot too.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock which was removed
accidentally.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The process for eMMC HS400 mode for eSDHC is,
1. Perform the Tuning Process at the HS400 target operating frequency.
Latched the clock division value.
2. if read transaction, then set the SDTIMNGCTL[FLW_CTL_BG].
3. Switch to High Speed mode and then set the card clock frequency to
a value not greater than 52Mhz
4. Clear TBCTL[TB_EN],tuning block enable bit.
5. Change to 8 bit DDR Mode
6. Switch the card to HS400 mode.
7. Set TBCTL[TB_EN], tuning block enable bit.
8. Clear SYSCTL[SDCLKEN]
9. Wait for PRSSTAT[SDSTB] to be set
10. Change the clock division to latched value.Set TBCTL[HS 400 mode]
and Set SDCLKCTL[CMD_CLK_CTRL]
11. Set SYSCTL[SDCLKEN]
12. Wait for PRSSTAT[SDSTB] to be set
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
14. Wait for delay chain to lock.
15. Set TBCTL[HS400_WNDW_ADJUST]
16. Again clear SYSCTL[SDCLKEN]
17. Wait for PRSSTAT[SDSTB] to be set
18. Set ESDHCCTL[FAF]
19. Wait for ESDHCCTL[FAF] to be cleared
20. Set SYSCTL[SDCLKEN]
21. Wait for PRSSTAT[SDSTB] to be set.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Add a mmc_hs400_prepare_ddr() interface for controllers
which needs preparation before switching to DDR mode for
HS400 mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Some controllers may have difference between HS200 tuning
and HS400 tuning, such as different registers setting,
different procedure, or different errata.
This patch is to add a hs400_tuning flag to identify the
tuning for HS400 mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
For DM_MMC, the controller re-initialization is needed to
clear old configuration for mmc rescan.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
"ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding
documentation. Therefore drop this and instead use soc_device_match()
to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel
driver.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Use DEFAULT_LINUX_BOOT_ENV to define the standard addresses used in rest
of TI platforms as defined in ti_armv7_common.h
This avoids the standard pitfalls we've had with kernel images and fdt
addresses stomping on each other.
As part of this process, redefine overlayaddr to be dtboaddr (defined
in ti_armv7_common.h for this very purpose) and get rid of the
definition of overlayaddr..
Signed-off-by: Nishanth Menon <nm@ti.com>
Use dtboaddr to define the overlay address common to all TI platforms
instead of creating a new overlayaddr for the purpose.
Signed-off-by: Nishanth Menon <nm@ti.com>
Use DEFAULT_LINUX_BOOT_ENV to define the standard addresses used in rest
of TI platforms as defined in ti_armv7_common.h
This avoids the standard pitfalls we've had with kernel images and fdt
addresses stomping on each other.
As part of this process, redefine overlayaddr to be dtboaddr (defined
in ti_armv7_common.h for this very purpose).. we will get rid of
overlayaddr later in the series.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reset the channel completely during channel release in order to clear
teardown bit before handing over to next user or jumping to Linux.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Update detect_enable_hyperflash() to look for "ti,am654-ospi" compatible
to match the upstream DT node.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
doc/README.log was already moved to doc/develop/logging.rst but has been
recreated by an incorrect merge.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the previous patch, net_init now exposes some errors, so check for
them.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
net_init does not always succeed, and there is no existing mechanism to
discover errors. This patch allows callers of net_init (such as net_init)
to handle errors. The root issue is that eth_get_dev can fail, but
net_init_loop doesn't expose that. The ideal way to fix eth_get_dev would
be to return an error with ERR_PTR, but there are a lot of callers, and all
of them just check if it's NULL. Another approach would be to change the
signature to something like
int eth_get_dev(struct udevice **pdev)
but that would require rewriting all of the many callers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver interferes with other sandbox tests since it causes log output
to be interspersed with "No ethernet found." messages. Disable this driver
by default.
Enable it for the syslog tests so that they still pass.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present all log devices are enabled by default. Add a function to allow
devices to be disabled or enabled at runtime.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is no way to disable a log driver. But the syslog driver
causes (attempted) network traffic in sandbox every time a log message
is printed, which is often.
Add a flag to enable a log driver. Adjust struct log_device to use a short
for next_filter_num so that no more memory is used for devices. Also fix
a missing line in the struct log_driver comment while here.
To maintain compatibility, enable it for all drivers for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is sometimes useful to output hex dumps in SPL. Add a config option to
allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
At present if CONFIG_LOG enabled, putting LOG_DEBUG at the top of a file
(before log.h inclusion) causes _log() to be executed for every log()
call, regardless of the build- or run-time logging level.
However there is no guarantee that the log record will actually be
displayed. If the current log level is lower than LOGL_DEBUG then it will
not be.
Add a way to signal that the log record should always be displayed and
update log_passes_filters() to handle this.
With the new behaviour, log_debug() will always log if LOG_DEBUG is
enabled.
Move log_test_syslog_nodebug() into its own file since it cannot be made
to work where it is, with LOG_DEBUG defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present MKIMAGE_DTC_PATH is in the devicetree menu but not within
'devicetree control' since it does not relate to that. As a result it
shows up in the top menu.
It actually relates to the mkimage tool, so create a new tools menu for it
and move it there.
Signed-off-by: Simon Glass <sjg@chromium.org>
This relates to booting since it is the default devicetree provided to
Linux. Move it under the 'boot options' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are a number of miscellaneous boot images at the top level of the
kconfig menu. Move these into the 'boot options' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the autoboot options are in cmd/Kconfig but they don't really
relate to commands. They relate to booting, so move this menu under the
boot menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most of the boot options are in common/Kconfig but that file is already
extremely large. Create a new Kconfig.boot to hold the boot options.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are quite a few boot-related menu options at the top level. Create a
new menu to hold these and move 'Boot images' into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Move ASPEED ram driver, update.
- Exhance pinctrl/gpio support, update Kendryte K210 support
- Enhance qemu_arm64 support for a single binary to work with and
without TF-A
Generate 'u-boot-splx4.sfp' which consist of 4 SPL images required
for booting up Cyclone5/Arria10.
By default, this 'u-boot-splx4.sfp' is generated without extra
padding after each SPL image.
For Cyclone5, 'u-boot-splx4.sfp' contains:
4 x SPL(64KB) = 256KB
For Arria10, 'u-boot-splx4.sfp' contains:
4 x SPL(256KB) = 1024KB
For Cyclone5 using NAND flash image layout for 128 KB memory blocks,
user can 'make' the following target to generate 4 SPL images with
padding:
make u-boot-spl-padx4.sfp
'u-boot-spl-padx4.sfp' contains four 128KB SPL images (each 64KB SPL is
followed by 64KB of zero-padding).
4 x (SPL(64KB) + zero-padding(64KB)) = 512KB
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
CONFIG_OF_EMBED was primarily enabled to support the S10/Agilex
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Add param entry point (ep) support for Arria 10 header. User can pass in
'e' option to mkimage to set the entry point. This is an optional option.
If not specified, default is 0x14.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Move to use generic handoff dtsi (socfpga_arria10-handoff.dtsi) and include
the specify generated _handoff.h header file from qts-filter-a10.sh script.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add a script to process HPS handoff data and generate a header
for inclusion in u-boot specific devicetree addons. The header
should be included in the top level of u-boot.dtsi.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Don't invoke 'SYSTEM_RESET' PSCI function because PSCI
function calls are not supported by u-boot running in EL3.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Resend mailbox command for 3 times with 2ms interval in between if
it receives MBOX_RESP_TIMEOUT and MBOX_RESP_DEVICE_BUSY response code.
Add a wrapper function mbox_send_cmd_common_retry() for retry, change
all the callers to use this wrapper function.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Mailbox command which is too large to fit into the mailbox
FIFO command buffer can be sent to SDM in multiple parts.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Mailbox driver should always check for the length of the response
and read the response data before returning the response status to
caller.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add miliseconds delay when waiting for mailbox event to happen
before timeout. This will ensure the timeout duration is predictive.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Document down the usage of boot_scratch_cold register to avoid
overlapping of usage in the code for S10 & Agilex.
The boot_scratch_cold register is generally used for passing
critical system info between SPL, U-Boot and Linux.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Enable FPGA full reconfiguration support with Intel FPGA SDM
Mailbox driver for Agilex.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ensure watchdog reset is not triggered if the fpga
reconfiguration is taking too long.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
All SoCFPGA platforms (except Cyclone V) are now switching
to CONFIG_WDT (driver model for watchdog timer drivers)
from CONFIG_HW_WATCHDOG.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Print reset state (warm/cold) together with the
source (watchdog/MPU) which has triggered the warm
reset on S10 & Agilex.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat
register when checking for HPS warm reset status.
Refactor the warm reset mask macro for clarity purpose.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Rename the driver from S10 to SoC64 because Intel Agilex platform
also using the this SYSRESET SoCFPGA driver for S10.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
In current implementation, any exception would trigger a CPU reset.
But a bad written SPL would cause infinite loop where the system
will reload the same SPL instead of loading factory safe image.
Hence this patch is to ensure any exception will cause a hang. At this
moment, watchdog shall be triggered and Remote System Update mechanism
shall load the next production image or factory safe image.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Timer only need to be initialized once in SPL.
This patch remove the redundancy of initializing the
timer again in U-Boot proper
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
'dwmac_socfpga' driver will setup the PHY interface during probe.
PHY interface setup in arch_misc_init() is no longer needed.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add additional membus writes to configure main and peripheral PLL
for Agilex's clock manager.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Since warm reset may optionally set the CLock Manager to'boot mode',
the clock driver should always force the Agilex's Clock Manager to
'boot mode' before the clock driver start configuring the Clock Manager
in SPL.
In SSBL, clock driver will skip the Clock Manager configuration
if it's already being setup by SPL (Clock Manager NOT in 'boot
mode') to prevent any inaccurate clocking issues happened on HPS
peripherals such as UART, MAC and etc.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Some drivers probing failed if clock enable function is not supported in
clock driver. So, add clock enable function to clock driver to solve it.
Return 0 (success) for *.enable function because all clocks are enabled
by default in clock driver probe.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Now that PIE works when U-Boot is started from ROM, let's enable
CONFIG_POSITION_INDEPENDENT, which allows to load U-Boot also via
ARM Trusted-Firmware's fip.bin to DRAM, without tweaking the
configuration.
To get a writable initial stack, we need to keep the fixed initial
stack pointer, which points to DRAM in our case.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
CONFIG_ARCH_SUPPORT_TFABOOT was used on the qemu-arm64 platform to
guard a tweak to the flash bank configuration. U-Boot now reads the
current flash setup from the devicetree, so there is no need for
this option anymore.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently we hard-code the number and initial addresses of QEMU's flash
banks, even though our code is perfectly able to gather the same
information from the DTB provided by QEMU.
This is especially annoying, since we have two slightly different
U-Boot configurations ("bare-metal" vs. loaded via Arm Trusted
Firmware), which need to be selected at build time.
Drop the two hard coded alternatives, and use
CONFIG_SYS_MAX_FLASH_BANKS_DETECT instead, which relies on the DTB to
figure out the actual flash configuration at runtime.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently selecting CONFIG_POSITION_INDEPENDENT also forces us to use an
initial stack pointer relative to the beginning of the BSS section.
This makes some sense, because this should be writable memory anyway.
However the BSS section is not cleared or used until later in the
setup process (after relocation), so memory nearby might not be
available early enough to host the initial stack. This is an issue if
U-Boot is loaded from (Flash-)ROM, for instance.
Allow CONFIG_INIT_SP_RELATIVE to be turned off by a board's config, to
be able to select a fixed stack pointer, for instance in known good
DRAM.
This will help QEMU utilising PIE, when it's loaded to (Flash-)ROM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
When the actual offset between link and runtime address is zero, there
is no need for patching up U-Boot early when running with
CONFIG_POSITION_INDEPENDENT.
Skip the whole routine when the distance is 0.
This helps when U-Boot is loaded into ROM, or in otherwise sensitive
memory locations.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
When we build an arm64 target and enable POSITION_INDEPENDENT, we were
skipping our build-time dynamic relocation fixup routine (STATIC_RELA).
This was probably done because we didn't need it in this case, as the
PIE fixup routine in start.S would take care of that at runtime.
However when we now skip this routine (upon detecting that the fixup
offset is 0), this might lead to uninitialised pointers.
Remove the exception, so that we always do the build-time relocation.
NOTE: GNU binutils starting with v2.27.1 do this build-time relocation
automatically, to be in-line with other architecures. So on newer
toolchains our manual fixup is actually not needed. It doesn't hurt to
have it, though, so that we keep compatibility with the popular Linaro
toolchains, which lack this feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
The CONFIG_TFABOOT option is more about what U-Boot DOES NOT need to do
than to support some features.
Explain a bit more in the Kconfig help text to avoid misunderstandings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Most users don't need the standalone API examples. Distributions like SUSE
do not supply libgcc for cross-compiling and we cannot do without on ARMv8
for building examples/.
Make examples selectable via symbol CONFIG_EXAMPLES. It defaults to
yes on ARCH_QEMU to ensure that we compile the API as part of our
continuous integration.
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
The timeout calculation is based on the clk being in KHz but
the clk api returns the clk value in Hz. Convert this to KHz
to calculate the correct timeout value.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
This modifies the existing led test to check for default led naming as
added in the previous patch.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This more closely mirrors Linux's behaviour, and will make it easier to
transition to using function+color in the future.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
dm_gpio_ops.get_value can be called when the gpio is either input or
output. The current dw code always returns the input value, which is
invalid if the direction is set to out.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Previously, if there was no bank-name property, it was easy to have
confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch
follows the example of the sifive gpio driver.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void
pointer, since we pass it to readl.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This extends the pinctrl-sandbox driver to support pin muxing, and adds a
test for that behaviour. The test is done in C and not python (like the
existing tests for the pinctrl uclass) because it needs to call
pinctrl_select_state. Another option could be to add a command that
invokes pinctrl_select_state and then test everything in
test/py/tests/test_pinmux.py.
The pinctrl-sandbox driver now mimics the way that many pinmux devices
work. There are two groups of pins which are muxed together, as well as
four pins which are muxed individually. I have tried to test all normal
paths. However, very few error cases are explicitly checked for.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This normalizes the documentation to conform to kernel-doc style [1]. It
also moves the documentation for pinctrl_ops inline, and adds argument and
return-value documentation. I have kept the usual function style for these
comments. I could not find any existing examples of function documentation
inside structs.
[1] https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.
Support for the pinmux property is done differently than in Linux. As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.
This commit increases the size of the sandbox build by approximately 48
bytes. However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.
The documentation has been updated from the last Linux commit before it was
split off into yaml files.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
the aspeed ddr sdram controller needs to know if the memory chip mounted on
the board is dual x8 die or not. Or it may get the wrong size of the
memory space.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
to improve the maintainability. It is more easier to modify and add
configurations of the driver in the centralized ram driver directory.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The cfi-flash driver uses an open-coded version of the generic
algorithm to decode and translate multiple frames of a "reg" property.
This starts off the wrong foot by using the address-cells and size-cells
properties of *this* very node, and not of the parent. This somewhat
happened to work back when we were using a wrong default size of 2,
but broke about a year ago with commit 0ba41ce1b7 ("libfdt: return
correct value if #size-cells property is not present").
Instead of fixing the reinvented wheel, just use the generic function
that does all of this properly.
This fixes U-Boot on QEMU (-arm64), which was crashing due to decoding
a wrong flash base address:
DRAM: 1 GiB
Flash: "Synchronous Abort" handler, esr 0x96000044
elr: 00000000000211dc lr : 00000000000211b0 (reloc)
elr: 000000007ff5e1dc lr : 000000007ff5e1b0
x0 : 00000000000000f0 x1 : 000000007ff5e1d8
x2 : 000000007edfbc48 x3 : 0000000000000000
x4 : 0000000000000000 x5 : 00000000000000f0
x6 : 000000007edfbc2c x7 : 0000000000000000
x8 : 000000007ffd8d70 x9 : 000000000000000c
x10: 0400000000000003 x11: 0000000000000055
^^^^^^^^^^^^^^^^
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When possible use DMA for reading from CFI flash, this provides upto 5x
improvement in read performance with high speed CFI compliant flashes
like HyperFlash.
Code will gracefully fallback to CPU copy when DMA is unavailable.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Caller would need gracefully handle failures of dma_get_device(),
therefore reduce pr_err() to pr_debug() when DMA device is not found.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Octeon needs a platform specific cmd to boot the Linux kernel, as
specific parameters need to be passed and special handling for the
multiple cores (SMP) is needed.
Co-developed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
[use gd->ram_base instead of gd->bd->bi_memstart]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This is needed for Linux booting, as the memory infos need to be passed
in this bootmem format to the Linux kernel.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add header to handle bootinfo support, needed for Octeon Linux kernel
booting.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header includes the Octeon feature detection used in many Octeon
drivers.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header includes common register defines and accessor functions.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the necessary lowlevel init code, to enable SMP Linux
booting. This code will be used with the platform specific Octeon Linux
boot command "bootoctlinux", which starts a configurable number of cores
into Linux.
Additionally some erratas and lowlevel register initializations are
copied from the original Cavium / Marvell U-Boot source code, enabling
booting into the Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
As noticed while working on the USB xHCI support, Octeon needs to flush
all pending writes so that the values are present in the memory. Add
this "syncw" instruction (twice) to flush_dcache_range().
Signed-off-by: Stefan Roese <sr@denx.de>
Import platform specific mangle-port.h header, allowing a area specific
swapping, which is needed on Octeon for USB & PCI areas.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
Import octeon_should_swizzle_table[] which is needed for the area
specific swapping. It will be used by the platform specific
mangle-port.h header.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the glue layer for the MIPS Octeon SoCs. It's ported
mainly from the Linux code.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Octeon uses mapped addresses for virtual and physical memory. It's not
that easy to calculate the resulting addresses here. So let's remove
this BUG_ON() completely, as it's not really helpful.
Please also note, that BUG_ON() is not recommended any more in the Linux
kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
On MIPS platforms, mapping of the base address is needed. This patch
switches from dev_get_addr() to dev_remap_addr() to get the mapped base
address of the xHCI controller.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
This patch adds the board specific configuration (struct) for the
Octeon 3 EBB7304 EVK. This struct is ported from the 2013er Cavium /
Marvell U-Boot repository. Also, the Octeon RAM driver is enabled in
the board defconfig for its usage.
Tested with one and two DIMMs on the EBB7304 EVK (8 & 16 GiB).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the initialization call for the Octeon RAM driver to
the Octeon platforms code. So if enabled via Kconfig, the DDR driver
will be called and the RAM will be configured and used. If the RAM
driver is not enabled, the L2 cache is still used as RAM.
Signed-off-by: Stefan Roese <sr@denx.de>
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 3 includes the DIMM SPD handling code and the Kconfig / Makefile
integration.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 2 includes the very complex Octeon 3 DDR4 configuration
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 1 adds the base U-Boot RAM driver, which will be instantiated by
the DT based probing.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header is used by the upcoming DDR driver and potentially by other
drivers ported from the 2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
When using SDL for input the SDL key codes are first converted to Linux key
codes and then to matrix entries of the cross wired keyboard.
We must not map any key code to two different places on the keyboard. So
comment out one backslash position.
Update the rest of the file from Linux 5.7.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The result of fdt_node_offset_by_phandle is negative for error,
so this patch corrects the check of this result in
fdtdec_parse_phandle_with_args.
This patch allows to have the same behavior with or without OF_LIVE
for the function dev_read_phandle_with_args with cell_name = NULL and
with invalid phandle.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The cell_count argument is required when cells_name is NULL.
This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args
This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.
For example:
count = dev_count_phandle_with_args(dev, "array", NULL, 3);
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the test for node.of_offset because an invalid offset is not
always set to -1 because the return value of the libfdt functions are:
+ an error with a value < 0
+ a valid offset with value >=0
For example, in ofnode_get_by_phandle() function, we have:
node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob, phandle);
and this function can return -FDT_ERR_BADPHANDLE (-6).
Without this patch, the added test dm_test_ofnode_get_by_phandle failed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Include missing log.h and change _ofnode_to_np() to ofnode_to_np() so
that compiling with OF_CHECKS enabled does not break.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.
Update the size of the test blob to allow these larger records.
Signed-off-by: Simon Glass <sjg@chromium.org>
The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.
Update the code to correct this and add a little more documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
When running these tests on sandbox any failures result in very large or
long pointer values which are a pain to work with. Map them to an address
so it is easier to diagnose failures.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.
Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not available.
Also make bloblist_first/next_blob() static as they are not used outside
this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reformat the command line options chapter so that the command line options
clearly stand out.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-01-rc1
The following bugs in the UEFI system are resolved:
* illegal free in EFI_LOAD_FILE2_PROTOCOL implementation
* incorrect documentation of EFI_LOAD_FILE2_PROTOCOL implementation
* output of CRC32 as decimal instead hexadecimal in unit test
* use EfiReservedMemoryType for no-map reserved memory
* avoid unnecessary resets in UEFI unit tests
* call EFI bootmgr even without having /EFI/boot
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
The device tree may contain a /reserved-memory node. The no-map property
of the sub-nodes signals if the memory may be accessed by the UEFI payload
or not.
In the EBBR specification (https://github.com/arm-software/ebbr) the
modeling of the reserved memory has been clarified.
If a reserved memory node in the device tree has the no-map property map,
create a EfiReservedMemoryType memory map entry else use
EfiBootServicesData.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_EFI_GRUB_ARM32 is only needed for architectures with caches that are
not managed via CP15 (or for some outdated buggy versions of GRUB). It
makes more sense to disable the setting per architecture than per defconfig.
Move QEMU's CONFIG_EFI_GRUB_ARM32_WORKAROUND=n from defconfig to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, the EFI bootmgr is only called if there is a EFI binary
inside the path for removable media is found, i.e. /EFI/boot/. This
doesn't make sense. It is the duty of the bootmgr to find out the
path and name of the EFI binary to boot. It should be called even
if there is no /EFI/boot directory.
Thus, call the bootmgr before we try to boot the EFI binary inside
the removable media path.
Also remove the ${fdtcontroladdr} parameter because the fallback is
handled in cmd/bootefi.c and that already takes care of correct settings
if the board has ACPI and thus no device tree at all.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When we do not execute a test requiring ExitBootServices do not reset the
system after testing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Print the CRC32 loaded via the EFI_LOAD_FILE2_PROTOCOL as a hexadecimal
number.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
strsep() changes the address that its first argument points to.
We cannot use the changed address as argument of free().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot offers a EFI_LOAD_FILE2_PROTOCOL which the Linux EFI stub can use to
load an initial RAM disk. Update the function comments of the
implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This adds the driver for the PWM controller found in the Amlogic SoCs.
This PWM is only a set of Gates, Dividers and Counters:
PWM output is achieved by calculating a clock that permits calculating
two periods (low and high). The counter then has to be set to switch after
N cycles for the first half period.
The hardware has no "polarity" setting. This driver reverses the period
cycles (the low length is inverted with the high length) for
PWM_POLARITY_INVERSED.
Disabling the PWM stops the output immediately (without waiting for the
current period to complete first).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
an USB3.0 Type A connector and a M.2 Key M slot.
The PHY driving these differential lines is shared between
the USB3.0 controller and the PCIe Controller, thus only
a single controller can use it.
This adds this dynamic switching right before booting Linux
and the configuration steps in the boards documentation.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[narmstrong: fixed warning by replacing min() by min_t()]
Add the correcly architectured USB Glue node for Meson AXG and the
S400 board in -u-boot.dtsi until support in upstream Linux then
backported.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add the board_usb_init()/cleanup() for USB gadget for AXG based
on the code for the G12A architecture.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The registers which are managed by the meson-gxl-usb3 PHY driver are
actually "USB control" registers (which are "glue" registers which
manage OTG detection and routing of the OTG capable port between the
DWC2 peripheral-only controller and the DWC3 host-only controller).
Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb
driver supports the USB control registers on GXL and GXM SoCs (these
were previously managed by the meson-gxl-usb3 PHY driver).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The USB support was initialy done with a set of PHYs and dwc3-of-simple
because the architecture of the USB complex was not understood correctly
at the time (and proper documentation was missing...).
But with the G12A family, the USB complex was correctly understood and
implemented correctly.
This adds a proper driver for the glue, based on the G12A one, but with
enough changes to require a different driver in U-Boot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").
This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
First set of u-boot-atmel features for 2021.01 cycle:
This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
Currently, the return value of dev_read_u32_default is stored in an u32,
causing the subsequent "if (function < 0)" to always be false:
u32 function;
...
function = dev_read_u32_default(config, "brcm,function", -1);
if (function < 0) {
debug("Failed reading function for pinconfig %s (%d)\n",
config->name, function);
return -EINVAL;
}
Make "function" variable an int to fix this.
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Factor out reading IP base address to ofdata_to_platdata function, which
is designed for this purpose. Also, drop the dev->priv NULL check, since
this is already done by the dm core when allocating space using
priv_auto_alloc_size feature. (in drivers/core/device.c ->
device_ofdata_to_platdata).
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add test on the size of ofnode_phandle_args result to avoid access
to uninitialized elements in args[] field.
This patch avoids the issue when gpio-ranges cell size is not 3 as
expected, for example:
gpio-ranges = <&pinctrl 0>;
instead of
gpio-ranges = <&pinctrl 0 112 16>;
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Move the variables definition at the beggining of the function
gpio_stm32_probe().
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
DT alignment with Linux kernel v5.9-rc4 for the STM32MP15x soc
device tree files and the STMicroelectronics boards device tree files.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Upon further discussion on the mailing list, we should not get in the
situation where the generic code path to set ethaddr/etc correctly does
not work. Revert this until someone can further debug the smc911x
driver regarding this issue.
This reverts commit 387cbf096e.
Signed-off-by: Tom Rini <trini@konsulko.com>
The R8A774A1 is compatible with the generic rcar-gen3-xhci controller.
This patch adds the compatibility flag, to support the xHCI controller.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Use macros with parameter to fill ep_info2, then some macros
for MASK and SHIFT can be removed
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For normal TRB fields:
use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK);
and use TRB_INTR_TARGET(x) instead of
(((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT)
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There some vendor quirks for MTK xHCI 0.96 host controller:
1. It defines some extra SW scheduling parameters for HW
to minimize the scheduling effort for synchronous and
interrupt endpoints. The parameters are put into reserved
DWs of slot context and endpoint context.
2. Its TDS in Normal TRB defines a number of packets that
remains to be transferred for a TD after processing all
Max packets in all previous TRBs.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
xhci versions 1.0 and later report the untransferred data remaining in a
TD a bit differently than older hosts.
We used to have separate functions for these, and needed to check host
version before calling the right function.
Now Mediatek host has an additional quirk on how it uses the TD Size
field for remaining data. To prevent yet another function for calculating
remainder we instead want to make one quirk friendly unified function.
Porting from the Linux:
c840d6ce772d("xhci: create one unified function to calculate TRB TD remainder.")
124c39371114("xhci: use boolean to indicate last trb in td remainder calculation")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commits update the support of sntp to use
the framework udp. This change allows to remove
all the reference to sntp in the main network
file net/net.c.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds a generic udp protocol framework in the
network loop. So protocol based on udp may be implemented
without modifying the network loop (for example custom
wait magic packet).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add support for stingray PAXB PHY controller driver.
This driver supports maximum 8 PAXB phys using pipemux data.
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When load the last block, the "len" might not be a block size. This cause
loading the incorrect last block data.
The fix change "len" to tftp_block_size and minus one tftp_block_size
for offset calculation.
Use same offset calculation formula as in store_block().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
tftp_cur_block start with 1 for first block, but tftp_cur_block counter is
start with zero when block number is rollover. The existing code
"tftp_cur_block - 1" will cause the block number become -1 in store_block()
when tftp_cur_block is 0 when tftp_cur_block is rollover.
The fix pass in tftp_cur_block to store_block() and minus the
tftp_block_size when do the offset calculation.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Fixes missing update to tftp_prev_block counter before increase
tftp_cur_block counter when do the tftpput operation.
tftp_prev_block counter is used in update_block_number() function to
check whether block number (sequence number) is rollover. This bug
cause the tftpput command fail to upload a large file when block
number is greater than 16-bit (0xFFFF).
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
The ethernet controller can read the MAC from EEPROM and display it,
but if ethaddr is not set, the ethernet is still unavailable.
This patch checks will automatically set the MAC address if it has
not already been set.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
ftgmac100 driver is using hard-coded PHY interface address of zero.
Each board can have different PHY interface address (phy_addr).
This commit modifies the driver to make use of board specific address
by leveraging CONFIG_PHY_ADDR.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
The Linux kernel does set the clock delays to
- 0.2 ns (their default, and lowest, hardware value) if delays should
not be enabled
- 2.0 ns (which causes the data to be sampled at exactly half way between
clock transitions at 1000 Mbps) if delays should be enabled
depending on the interface mode
See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/mscc/mscc_main.c#n523
So instead of using arbitrary delay values like now, mimic this behaviour.
The behaviour is the same for all of vsc8530/8531/8540/8541 so move that
to a shared function while at it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add tests for SCMI reset controllers. A test device driver
sandbox-scmi_devices.c is used to get reset resources, allowing further
resets manipulation.
Change sandbox-smci_agent to emulate 1 reset controller exposed through
an agent. Add DM test scmi_resets to test this reset controller.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change introduces a reset controller driver for SCMI agent devices.
When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
binds a reset controller device for each SCMI reset domain protocol
devices enabled in the FDT.
SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also enabled.
SCMI Reset Domain protocol is defined in the SCMI specification [1].
Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
is used to get clock resources, allowing further clock manipulation.
Change sandbox-smci_agent to emulate 3 clocks exposed through 2 agents.
Add DM test scmi_clocks to test these 3 clocks.
Update DM test sandbox_scmi_agent with load/remove test sequences
factorized by {load|remove}_sandbox_scmi_test_devices() helper functions.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change implements a SMCCC transport for SCMI exchanges. This
implementation follows the Linux kernel as references implementation
for SCMI message processing, using the SMT format for communication
channel meta-data.
Use of SMCCC transport in SCMI FDT bindings are defined in the Linux
kernel DT bindings since v5.8. SMCCC with SMT is implemented in OP-TEE
from tag 3.9.0 [2].
Links: [2] https://github.com/OP-TEE/optee_os/commit/a58c4d706d23
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change implements a mailbox transport using SMT format for SCMI
exchanges. This implementation follows the Linux kernel and
SCP-firmware [1] as references implementation for SCMI message
processing using SMT format for communication channel meta-data.
Use of mailboxes in SCMI FDT bindings are defined in the Linux kernel
DT bindings since v4.17.
Links: [1] https://github.com/ARM-software/SCP-firmware
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change introduces SCMI agent uclass to interact with a firmware
using the SCMI protocols [1].
SCMI agent uclass currently supports a single method to request
processing of the SCMI message by an identified server. A SCMI message
is made of a byte payload associated to a protocol ID and a message ID,
all defined by the SCMI specification [1]. On return from process_msg()
method, the caller gets the service response.
SCMI agent uclass defines a post bind generic sequence for all devices.
The sequence binds all the SCMI protocols listed in the FDT for that
SCMI agent device. Currently none, but later change will introduce
protocols.
This change implements a simple sandbox device for the SCMI agent uclass.
The sandbox nicely answers SCMI_NOT_SUPPORTED to SCMI messages.
To prepare for further test support, the sandbox exposes a architecture
function for test application to read the sandbox emulated devices state.
Currently supports 2 SCMI agents, identified by an ID in the FDT device
name. The simplistic DM test does nothing yet.
SCMI agent uclass is designed for platforms that embed a SCMI server in
a firmware hosted somewhere, for example in a companion co-processor or
in the secure world of the executing processor. SCMI protocols allow an
SCMI agent to discover and access external resources as clock, reset
controllers and more. SCMI agent and server communicate following the
SCMI specification [1]. This SCMI agent implementation complies with
the DT bindings defined in the Linux kernel source tree regarding
SCMI agent description since v5.8.
Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The tests rely on a dummy driver to allocate and initialize the regmaps
and the regmap fields using the managed API. The first test checks if
the regmap config fields like width, reg_offset_shift, range specifiers,
etc work. The second test checks if regmap fields behave properly (mask
and shift are ok) by peeking into the regmap.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When more nodes are added for a uclass the index might go into two or
more digits. This means that there are less spaces printed because they
are used up by the extra digits. Update the regular expression to allow
variable-length spacing between the class name and and index.
This was discovered when adding a simple_bus node in test.dts made
test_bind_unbind_with_uclass() fail because the index went up to 10.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
A regmap field is an abstraction available in Linux. It provides to access
bitfields in a regmap without having to worry about shifts and masks.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Some devices need to calculate the regmap base address at runtime. This
makes it impossible to use device tree to get the regmap base. Instead,
allow devices to specify it in the regmap config. This will create a
regmap with a single range that corresponds to the start and size given
by the driver.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Right now, the base of a regmap can only be obtained from the device
tree. This makes it impossible for devices which calculate the base at
runtime to use a regmap. An example of such a device is the Cadence
Sierra PHY.
Allow creating a regmap with one range whose start and size can be
specified by the driver based on calculations at runtime.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drivers can configure it to adjust the final read/write location.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Right now, regmap_read() and regmap_write() read/write a 32-bit value
only. To write other lengths, regmap_raw_read() and regmap_raw_write()
need to be used.
This means that any driver ported from Linux that relies on
regmap_{read,write}() to know the size already has to be updated at each
callsite. This makes the port harder to maintain.
So, allow specifying the read/write width to make it easier to port the
drivers, since now the only change needed is when initializing the
regmap.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some fields will be introduced in the regmap structure that should be
set to 0 by default. So, once we allocate a regmap, make sure it is
zeroed out to avoid unexpected defaults for those values.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Most of new linux drivers are using managed-API to allocate resources. To
ease porting drivers from linux to U-Boot, introduce devm_regmap_init() as
a managed API to get a regmap from the device tree.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add a test to verify that GPIOs can be acquired/released using the managed
API. Also check that the GPIOs are released when the consumer device is
removed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add managed functions to get a gpio from the devce-tree, based on a
property name (minus the '-gpios' suffix) and optionally an index.
When the device is unbound, the GPIO is automatically released and the
data structure is freed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
The tests are basically the same as for the regular API. Except that
the reset are initialized using the managed API, and no freed manually.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add managed functions to get a reset_ctl from the device-tree, based on a
name or an index.
Also add a managed functions to get a reset_ctl_bulk (array of reset_ctl)
from the device-tree.
When the device is unbound, the reset controllers are automatically
released and the data structure is freed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
- Disable CMD_IRQ for RISC-V.
- Update sipeed/maix doc
- Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API.
- Cleans up RISC-V timer drivers and converts them to DM.
- Correctly handle IPIs already pending upon prior stage bootloader (on the K210)
This adorns messages generated by dev_xxx with the device and driver
names. It also redirects dev_xxx to log when it is available. The names
of these functions very roughly take inspiration from Linux, but there is
no deeper correlation.
Both struct udevice and struct device are supported when logging, though
logging with struct device is no better than using log_xxx. The latter is
supported because of the large amount of existing code which logs with
struct device.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This driver does not use DM, so we need to use a struct device instead of a
struct udevice. Not ideal, but it'll have to do for now.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This can conflict with asm/io.h on some archs, and it isn't needed to build
dwc3-generic.c
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This logs with the device from struct dwc3. Some files also need to include
dm.h so fields in udevice can be accessed.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This adds a dev argument to some functions so dev_xxx always has a device
to log with. In one instance we must use use a different log function when
we are compiled without DM_USB.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
ep0.c also need to include dm.h so dev_xxx can access udevice fields.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Usually we can get a device from the current core, but some dev_dbg calls
have been converted to debug, since we are called on a cluster.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This function is never used anywhere, and it also tries to log with a
nonexistant device.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Without DM_ETH, cpsw_priv.dev is an eth_device. Just use its name instead.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
netdev_xxx evaluates to printf in U-Boot, so there is no extra info
printed. mvpp2 one of only two drivers which use these functions in U-Boot.
Convert these functions to dev_xxx where possible (and to log_xxx where
not).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
netdev_xxx evaluates to printf in U-Boot, so there is no extra info
printed. mvneta is one of two drivers which use these functions in U-Boot.
Convert these functions to dev_xxx where possible (and to log_xxx where
not).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
The name of the device we are working on is `ethdev` and not just `dev`.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This member was presumably dropped when this driver was converted from
Linux. However, it is still used in log statements during initialization.
This patch adds the member back. In addition, allocation of struct
vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows
it to be allocated by DM (if it is being used) and for dev to be
initialized.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
There are too many levels of indirection when calling dev_err. This is an
artifact of the conversion of brcmnand_host.pdev from a struct
platform_device (which has a member `dev` pointing to a struct device) to
struct udevice.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This adds a udevice parameter to get_best_delay and msdc_set_mclk so they
can call dev_err properly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Get it from spinand->slave->dev. Another option would be to use
spinand_to_mtd(spinand)->dev, but this is what the existing code uses.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This fixes dev_xxx() not always being called with a device. In
spi_nor_reg_read, a the slave device may not always be available, so we use
bus and cs instead.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This header is needed so struct udevice can be used in dev_xxx().
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Usually the device is gotten from sunxi_nfc. This is a struct device and
not a struct udevice, but the whole driver seems to be written wihout DM
anyway...
In a few instances, this patch modifies functions to take an nfc to log
with. In once instance we use mtd_info's device since there is no nfc.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Use the device from any mtd already available, or from the active mtd via
pxa3xx_nand_info if one is not.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This converts calls to dev_err to get the device from ti_sci_info where
appropriate.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This ensures constructs like `if (gd & gd->...) { ... }` work when
accessing the global data pointer. Without this change, it was possible for
a very early trap to cause _exit_trap to directly or indirectly (through
printf) to read arbitrary memory. This could cause a second trap,
preventing show_regs from being printed.
printf (and specifically puts) uses gd to determine what function to print
with. These functions in turn use gd to find the serial device, etc.
However, before accessing gd, puts first checks to see if it is non-NULL.
This indicates an existing (perhaps undocumented) assumption that either gd
is NULL or it is completely valid.
Before this patch, gd either points to unexpected data (because it retains
the value it did from the prior-stage) or points to uninitialized data
(because it has not yet been initialized by board_init_f_init_reserve)
until the hart has acquired available_harts_lock. This can cause two
problems, depending on the value of gd->flags. If GD_FLG_SERIAL_READY is
unset, then some garbage data will be printed to stdout, but there will not
be a second trap. However, if GD_FLG_SERIAL_READY is set, then puts will
try to print with serial_puts, which will likely cause a second trap.
After this patch, gd is zero up until either a hart has set it in
wait_for_gd_init, or until it is set by arch_init_gd. This prevents its
usage before its data is initialized because both handle_trap and puts
ensure that gd is nonzero before using it. After gd has been set, it is OK
to access it because its data has been cleared (and so flags is valid).
XIP cannot use locks because flash is not writable. This leaves it
vulnerable to the same class of bugs regarding already-pending IPIs as
before this series. Fixing that would require finding another method of
synchronization, which is outside the scope of this series.
Fixes: 7c6ca03eae ("riscv: additional crash information")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We can reduce the number of instructions needed to use available_harts_lock
by using the aq and rl suffixes for AMOs.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Even though we no longer call smp_function if an IPI was not sent by
U-Boot, we still need to clear any IPIs which were pending from the
execution environment. Otherwise, secondary harts will busy-wait in
secondary_hart_loop, instead of relaxing.
Along with the previous commit ("riscv: Use a valid bit to ignore
already-pending IPIs"), this fixes SMP booting on the Kendryte K210.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.
To be specific, the Kendryte K210 ROM-based bootloader does not clear IPIs
before passing control to U-Boot. Without this patch, the secondary hart
jumps to address 0x0 as soon as it enters secondary_hart_loop, and then
hangs in its trap handler.
This commit introduces a valid bit so secondary harts know when and IPI
originates from U-Boot, and it is safe to use the IPI API. The valid bit is
initialized to 0 by board_init_f_init_reserve. Before this, secondary harts
wait in wait_for_gd_init.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Without a matching barrier on the write side, the barrier in handle_ipi
does nothing. It was entirely possible for the boot hart to write to addr,
arg0, and arg1 *after* sending the IPI, because there was no barrier on the
sending side.
Fixes: 90ae281437 ("riscv: add option to wait for ack from secondary harts in smp functions")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Clearing MIP.MSIP is not guaranteed to do anything by the spec. In
addition, most existing RISC-V hardware does nothing when this bit is set.
The following commits "riscv: Use a valid bit to ignore already-pending
IPIs" and "riscv: Clear pending IPIs on initialization" should implement
the original intent of the reverted commit in a more robust manner.
This reverts commit 9472630337.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We currently do this in a u-boot specific dts, but hopefully we can get
these bindings added in Linux in the future.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The interrupt controller property is removed from the clint binding because
the clint is not an interrupt-controller. That is, no other devices have an
interrupt which is controlled by the clint.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Another "virtual" clock (in the sense that it isn't configurable). This
could possibly be done as a clock in the device tree, but I think this is a
bit cleaner.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This converts the clint driver from the riscv-specific interface to be a
DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously
implicitly depended on the CLINT to select REGMAP.
Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb),
the SiFive CLINT is part of the device tree passed in by qemu. This device
tree doesn't have a clocks or clock-frequency property on clint, so we need
to fall back on the timebase-frequency property. Perhaps in the future we
can get a clock-frequency property added to the qemu dtb.
Unlike with the Andes PLMT, the Sifive CLINT is also an IPI controller.
RISCV_SYSCON_CLINT is retained for this purpose.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
This merges the PLIC initialization code from two functions into one.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.
The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree. Using timebase-frequency only really
makes sense when the cpu itself is the timer device. This is the case when
we read the time from a CSR, but not when there is a separate device.
Second, it lets the device use the clock subsystem which adds flexibility.
If the device is configured for a different clock speed, the timer can
adjust itself.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
To test this function, sandbox CPU must set cpu_platdata.timebase_freq on
bind. It also needs to expose a method to set the current cpu. I also make
some most members of cpu_sandbox_ops static.
On the timer side, the device tree property
sandbox,timebase-frequency-fallback controls whether sandbox_timer_probe
falls back to time_timebase_fallback or to SANDBOX_TIMER_RATE.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
timebase-frequency.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured frequency. The timer drivers also do not have device structs,
and so have to rely on storing parameters in gd_t. Lastly, there is no
initialization call, so driver init is done in the same function which
reads the time. This can result in confusing error messages. To a user, it
looks like the driver failed when trying to read the time, whereas it may
have failed while initializing.
This patch removes the shim functionality from the riscv-timer driver, and
has it instead implement the former rdtime.c timer driver. This is because
existing u-boot users who pass in a device tree (e.g. qemu) do not create a
timer device for S-mode u-boot. The existing behavior of creating the
riscv-timer device in the riscv cpu driver must be kept. The actual reading
of the CSRs has been redone in the style of Linux's get_cycles64.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The usage of regmap API in the SiFive RAM driver is not correct.
The reg address should be obtained via dev_read_addr_index() API.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
In the boot flow description add the RESET and BOOT button as well as the
function of the DTR and RTS lines of the serial interface.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for Microchip PIT64B timer. The timer is 64 bit length and
is used as a free running counter (in continuous mode with highest values
for period registers). The clock feeding the timer would be no more
than 12.5MHz.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
The micrel phy driver is already configuring this values from
device tree. So remove the redundant phy configuration call from
this driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Renesas Draak board based on R-Car D3 has single CA53.
This patch drops check for cputype from reset_cpu() and also drops the
corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro
which is unused.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Use "imply" instead of "select" for BOARD_EARLY_INIT_F config option,
and then disable it on boards which don't need it.
Updated grpeach_defconfig to disable CONFIG_BOARD_EARLY_INIT_F option for
RZA1.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same
for PINCTRL_PFC_R8A774A1 help description
Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing
number of the SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable the fitImage update options on RCar Gen3 boards.
This permits easy update of multiple bootloader components.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965
Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF
accessible, mainline ATF is mandatory and must be built with
RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for
development and testing convenience only and must be disabled
in deployment for platform security reasons.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- Enhance the 'zboot' command to be more like 'bootm' with sub-commands
- The last series of ACPI core changes for programmatic generation of
ACPI tables
- Add all required ACPI tables for ApolloLake and enable ACPIGEN on
Chromebook Coral
- A feature minor enhancements to the 'hob' command
- Intel edison: Support for writing an xFSTK image via binman
Call mmc_of_parse at probe time to fetch all the host properties
from the DT.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The second clock of the IP block (the generic clock), must be explicitly
enabled.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Peng Fan <pengfan@nxp.com>
clk_set_rate will return rate in case of success and zero in case of
error, however it can also return -ev, but it's an ulong function.
To avoid any issues, disregard the return value of this call.
In case this call actually fails, nothing much we can do anyway, but we
can at least try with the previous values (or DT assigned-clocks)
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
It is useful to be able to flash Edison directly without relying on the
installed U-Boot being functional.
Add a binman image for this. It includes a 'OSIP' header (which happens to
look like an MBR / (Master-Boot Record), U-Boot binary and an environment.
I am not able to find a specification for OSIP.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
In some cases it is useful to include a U-Boot environment region in an
image. This allows the board to start up with an environment ready to go.
Add a new entry type for this. The input is a text file containing the
environment entries, one per line, in the format:
var=value
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The recent support for missing external binaries does not show an error
message when a file is genuinely missing (i.e. it is missing but not
marked as 'external'). This means that when -m is passed to binman, it
will never report a missing file.
Fix this and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
We already use binman's 'multiple-images' feature with Chrome OS and we
want to use it for Edison. There is no real down-side.
Adjust x86 to always use multiple-images.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present the 'bdinfo' command shows the framebuffer address, but not the
address of the copy framebuffer, if present. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the mtrr command only support 8 MTRRs. Some SoCs have more than
that. Update the implementation to support up to 10. Read the number of
MTRRs dynamically instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some HOBs include information that can be decoded. Add a -v option to the
hob command, to allow this to be displayed. Add the ability to decode a
resource descriptor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
GUIDs are one of the seven evils of the computer world. They obfuscate the
meaning and require people to look up long hex strings to decode it.
Luckily only a miniscule fraction of the 10^38 possible GUIDs are in use.
Add a way to decode the GUIDs known to U-Boot. Add a few more to the list
for good measure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The 'hob' command currently lists all HOB entries. Add way to list a
single entry, by index.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable new features and provide require device-tree config so that U-Boot
produces the correct ACPI tables on Coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present linux/bitops.h is included in ACPI code. This is not needed and
can cause a problem in fls64.h since BITS_PER_LONG is not defined. Move
the #include into the part not used by ACPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards want to reserve extra regions of memory. Add a 'chosen'
property to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A few fields have an open-coded length. Use the defines for this purpose
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this function only supports FSP-M but it is also used to read
FSP-S, in which case FSP-M may be zero. Add support for showing whichever
address is present in the FSP binary.
Also change the debug() statements to log_debug() while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If locating the FSP header hangs for whatever reason it is useful to see
where it got stuck. Add a debug print. Also show the address of the FSP-S
entry point as a sanity check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add files describing the various audio configurations supported on coral.
These are passed to Linux in the ACPI tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file doesn't currently have a log category. Add one so that items
are logged correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This provides information about a v1 TPM in the system. Generate this
table if the TPM is present.
Add a required new bloblist type and correct the header order of one
header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file cannot currently be included in ASL files. Add a header guard
to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is currently in the wrong place, so including the file in the device
tree fails. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Send this notification when U-Boot is about to boot into Linux, as
requested by the FSP.
Currently this causes a crash with the APL FSP, so leave it disabled for
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the MTRR registers are programmed with the list the U-Boot
builds up in the same order. In some cases this list may be out of order.
It looks better in Linux to have the registers in order, so sort them,
Signed-off-by: Simon Glass <sjg@chromium.org>
This new method is intended to be called when UEFI shuts down the 'boot
services', i.e. any lingering code in the boot loader that might be used
by the OS.
Add a definition for this new method and update the comments a little.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't have CONFIG_PCI in TPL but it is present in SPL, etc. So this
code is not needed. Drop it, and fix a code-style nit just above.
Signed-off-by: Simon Glass <sjg@chromium.org>
Support generating a DMAR table and add a few helper routines as well.
Also set up NHLT so that audio works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for generating various ACPI tables for Apollo Lake. Add a few
S3 definitions that are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow this header to be included in ASL files by adding a header guard and
a few definitions that are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Apollo Lake needs to generate a few more table types used on Intel SoCs.
Add support for these into the x86 ACPI code.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are needed for the CPU tables. Add them into an x86-specific file
since we do not support them on sandbox, or include tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an implementation of the DBG2 (Debug Port Table 2) ACPI table.
Adjust one of the header includes to be in the correct order, before
adding more.
Note that the DBG2 table is generic but the PCI UART is x86-specific at
present since it assumes an ns16550 UART. It can be generalised later
if necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an implementation of the HPET (High Precision Event Timer) ACPI
table. Since this is x86-specific, put it in an x86-specific file
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some more definitions to the iomap. These will be used by
ACPI-generation code as well as the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add SCI and power-state definitions required by ACPI tables. Fix the
license to match the original source file.
Als update the guard on acpi_pmc.h to avoid an error when buiding ASL.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot does not support SMM (System Management Mode) at present, but needs
a few definitions to correctly set up the ACPI table. Add these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Intel WiFi chips can use a common routine to write the information needed
by linux. Add an implementation of this.
Enable it for coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some devices can wake the system from sleep, e.g opening the lid on a
clamshell or moving a USB mouse.
Add a wake to specify this for USB devices and add the settings for Apollo
Lake.
Signed-off-by: Simon Glass <sjg@chromium.org>
Many I2C devices produce roughly the same ACPI data with just things like
the GPIO/interrupt information being different.
This can be handled by a generic driver along with some information in the
device tree.
Add a generic i2c driver for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The extra ACPI code increases U-Boot above it current size limit. Move
the start earlier to provide space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a function to generate ACPI code for a _DSM method for a device.
This includes functions for starting and ending each part of the _DSM.
Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: fix the "new blank line at EOF" git warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
A 'Power Resource for Wake' list the resources a device depends on for
wake. Add a function to generate this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This device has a large set of ACPI tables. Bring these in from coreboot
so that full functionality is available (apart from SMI).
Signed-off-by: Simon Glass <sjg@chromium.org>
Expand this to 4KB so that it is possible to add custom information to it.
On Chromebooks this is used to pass verified-boot information.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present U-Boot puts a magic number in the ASL for the GNVS table and
searches for it later.
Add a Kconfig option to use a different approach, where the ASL files
declare the table as an external symbol. U-Boot can then put it wherever
it likes, without any magic numbers or searching.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the definition of this structure common to Intel devices. It includes
some optional Chrome OS pieces which are used when vboot is integrated.
Drop the APL version as it is basically the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
This value is incorrect and causes problems booting Linux. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Recent versions of Chrome OS do not have a kernel in the root disk, to
save space.
With the improvements to the 'zboot' command it is fairly easy to load
the kernel from the raw partition. Add instructions on how to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When booting Chrome OS images the command line is stored separately
from the kernel. Add a way to specify this address so that images boot
correctly.
Also add comments to the zimage.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust maxargs to 8 for 'zboot start']
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
There is a lot of information in the setup block and it is quite hard to
decode manually. Add a 'zboot dump' command to decode it into a
human-readable format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the setup block is always obtained from the image
automatically. In some cases it can be useful to use a setup block
obtained elsewhere, e.g. if the image has already been unpacked. Add an
argument to support this and update the logic to use it if provided.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust maxargs to 7 for 'zboot start']
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present it is not possible to tell from a script where the setup block
is, or where the image was loaded to. Add environment variables for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a subcommand that loads the kernel into the right places in memory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust ZBOOT_STATE_INFO value to match the command order]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add a little subcommand that prints out where the kernel was loaded and
its setup pointer. Run it by default in the normal boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Split out the code that actually boots linux into a separate sub-command.
Add base_ptr to the state to support this.
Show an error if the boot fails, since this should not happen.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add subcommands to zboot. At present there is only one called 'start'
which does the whole boot. It is the default command so is optional.
Change the 's' string variable to const while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reduce maxargs to 6 of 'zboot start' subcommand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present if an error occurs while setting up the boot, interrupts are
left disabled. Move this call later in the sequence to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot sets a loader type of 8 which means LILO version 8,
according to the spec. Update it to 0x80, which means U-Boot with no
particular version.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To help reduce the size and complexity of load_zimage(), move the code
that reads the kernel version into a separate function. Update
get_boot_protocol() to allow printing the 'Magic signature' message only
once, under control of its callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the 'zboot' command does everything in one go. It would be
better if it supported sub-commands like bootm, so it is possible to
examine what will be booted before actually booting it.
In preparation for this, move the 'state' of the command into a struct.
This will allow it to be shared among multiple functions in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This header is missing a few of the newer features from the specification.
Add these as well as a link to the spec. Also use the BIT() macros where
appropriate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Xilinx changes for v2021.01
arm64:
- Support for bigger U-Boot images compiled with PIE
microblaze:
- Extend support for LE/BE systems
zynqmp:
- Refactor silicon ID detection code with using firmware interface
- Add support for saving variables based on bootmode
zynqmp-r5:
- Fix MPU mapping and defconfig setting.
xilinx:
- Minor driver changes: names alignment
- Enable UBIFS
- Minor DT and macros fixes
- Fix boot with appended DT
- Fix distro boot
cmd:
- pxe: Add fixing for platforms with manual relocation support
clk:
- fixed_rate: Add DM flag to support early boot on r5
fpga:
- zynqmppl: Use only firmware interface and enable SPL build
serial:
- uartlite: Enable for ARM systems and support endians
mmc:
- zynq: Fix indentation
net:
- gem: Support for multiple phys
- emac: Fix 64bit support and enable it for arm64
kconfig:
- Setup default values for Xilinx platforms
- Fix dependecies for Xilinx drivers
- Source board Kconfig only when platform is enabled
- Fix FPGA Kconfig entry with SPL
- Change some defconfig values
bindings:
- Add binding doc for vsc8531
- Add DM_SPI, DM_SPI_FLASH support for powerpc platforms
- Add DM_ETH support on P1010RDB, P1020RDB, P2020RDB
- Remove some un-maintained powerpc platforms
- Add USB_STORAGE support in config
commit 0cfccb5401 ("configs: Resync with savedefconfig")
removed CONFIG_USB_STORAGE from some powerpc platforms' defconfig
files, whicih would block the use case of system loading rootfs
from USB drives, add them back.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the DM_ETH and DM_MDIO config.
On P2020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board_eth_init() is only used by legacy ethernet driver framework,
so do not compile it when DM_ETH config has been selected.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the DM_ETH and DM_MDIO config.
On P1020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board_eth_init() is only used by legacy ethernet driver framework,
so do not compile it when DM_ETH config has been selected.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Move vsc7835 firmware uploading to board_early_init_r(), so that
the switch also can work in DM eTSEC driver.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The info of fixed-link PHY is described in DT node instead of
getting from MII, so detect the fixed-link PHY DT node first,
if it doesn't exist then probe the MII.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
For the platforms on which the eTSEC driver uses DM_ETH, convert its
MDIO controller code to also use DM_MDIO.
Note that for handling the TBI PHY (the MAC PCS for SGMII), we still
don't register a udevice for it, since we can drive it locally and there
is no point in doing otherwise.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Reworked to fix gazerbeam config]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The MII management register block offset is different between
gianfar and etsec2 compatible devices, this patch is to fix
this issue by adding driver data for different compatible
string.
Fixes: 2932c5a802 ("net: tsec: fsl_mdio: add DM MDIO support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The tsec driver now requires DM_MDIO when DM_ETH is enabled. To avoid
build errors, enable DM_MDIO in these boards' configs before we actually
add DM_MDIO support to tsec.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is utterly pointless to require an MDIO bus pointer for a fixed PHY
device. The fixed.c implementation does not require it, only
phy_device_create. Fix that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
fixed-rate driver is not different from clk_fixed_factor and it is required
very early in boot that's why setup flag for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
pxe sub commands need to be manually relocated for architectures which
enables MANUAL_RELOC as Microblaze.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
PXE and DHCP shouldn't be listed when commands are not enabled that's why
handle it in the same way as is done for Zynq and ZynqMP.
Fixes: ec48b6c991 ("arm64: versal: Add support for new Xilinx Versal ACAPs")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Map all resource for R5 to operate properly.
The patch is done based on the commit 23f7b1a776 ("armv7R: K3: am654:
Enable MPU regions") which also map the whole 4GB at first and then change
mapping for DDR.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ATF support was all the time based on FIT image support but this dependency
is not recorded anywhere.
For !SPL_FIT && SPL_ATF there is compilation error:
common/spl/spl.c: In function 'board_init_r':
common/spl/spl.c:689:26: error: 'struct spl_image_info' has no member named 'fdt_addr'
689 | spl_fixup_fdt(spl_image.fdt_addr);
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both SOCs shouldn't have any problem with 64bit dma accesses. Also with PIE
enabled when u-boot is placed above 4GB without any memory mapped below 4GB
address space efi_memory_init() call is failing due to missing memory node.
For this two reason disable this option for ZynqMP and Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
if conditions should match.
Fixes: a18d09ea38 ("fpga: zynqmp: Add secure bitstream loading for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile
and zynqmp.c to simplify if/endif logic in zynqmp.c.
This change is mostly done to be able to use CONFIG_IS_ENABLED macro and
obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync.
And removing one line from Topic Miami boards which is not needed because
symbol is not enabled via Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable position independent pre-relocation to let users options to put
u-boot to different locations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode.
Maybe that logic can be tuned for more complicated use cases and better
tested for different bootmodes.
Tested on zcu104 to SD(FAT) and JTAG(NOWHERE).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to have name variable saved in BSS section when it
doesn't need to be really used. That's why remove static from variable
definition and use strdup() to duplicate string with exact size from malloc
area instead.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Current algorithm used to get the silicon name is bit complicated and
hard to follow. Updated to use more straightforward mechanism based on
the Device ID code table (Table 1-2). The full IDCODE register is used
(except device revision bits [31:28]) to get the device name and IDCODE2
value is used for identifying the variant.
Additionally to make the algorithm bit more clear it also save some space
as the devices table is slightly bit smaller.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
flush_cache() arguments are not type casted to take care of 64 bit
systems. Use phys_addr_t to type cast for it to work properly for 32 bit
and 64 bit systems.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
There are compilation warnings showing up when we compile AXI ethernet
driver for 64bit architectures. Fix them, so that it works on both 32
and 64 bit architectures.
DMA descriptors are not taking care of 64bit addresses. To fix it,
change axidma_bd members as below:
next ==> next_desc
reserverd1 ==> next_desc_msb
phys ==> buf_addr
reserverd2 ==> buf_addr_msb
and update next_desc and buf_addr with lower 32 bits of the addresses,
update next_desc_msb and buf_addr_msb with upper 32 bits of the 64bit
addresses.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add MSCC header with delay definitions for VSC8531 and associated
family devices.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It was protected just for SPL_OS_BOOT but this function is only called when
SPL_ATF is enabled that's why change macro name.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
NAND_ARASAN selecting DM_MTD uunconditionally. Driver can be enabled with
!DM that's why Kconfig it showing it as error:
WARNING: unmet direct dependencies detected for DM_MTD
Depends on [n]: DM [=n]
Selected by [y]:
- NAND_ARASAN [=y] && MTD_RAW_NAND [=y]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Value of shunt resistor for INA226s that monitor VCCINT and VCC_SOC power
rails are incorrect. This patch corrects those values.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1
ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and
channel 2 is connected to J288 connector for QSFP1.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to
enable uartlite driver support by default.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This endinness changes are taken from linux uartlite driver.
Reset TX fifo in control register and check TX fifo empty
flag in lower byte of the status register to detect if it
is a little endian system. Based on this check, program the
registers with le32 or be32 through out the driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable required configs for using ubifs in uboot.
UBIFS testing procedure from u-boot:
Let's say we have two partitions in dt as below and want to format
partition1 "images" with ubifs.
partition@0 {
label = "boot";
reg = <0x0 0x1000000>;
};
partition@1 {
label = "images";
reg = <0x1000000 0x7000000>;
};
We will format the partition from linux and copy some files and access
from uboot later.
First thing, in linux config disable CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
this is required as ubifs expects min LEB size as 15*1024 bytes.
Use below commands in linux to format "images" partition with ubifs.
ubiformat /dev/mtd1
ubiattach /dev/ubi_ctrl -m 1
ubimkvol /dev/ubi0 -N images -m
mount -t ubifs ubi0:images /mnt
We can copy files to /mnt and unmount it.
To access this ubifs partition from uboot, run below commands.
(Don't forget to probe device before, e.g. sf probe 0 0 0)
setenv mtdids "nor0=nor0"
setenv mtdparts "mtdparts=nor0:16m(boot),112m(images)"
ubi part images
ubifsmount ubi0:images
make sure we match "mtdparts" to whatever is given in dt w.r.t partition
sizes.
"mtdparts" command will list the mtd partitions in u-boot.
Once ubifs is mounted, we can use "ubifsls" to list the files in that
partition and use "ubifsload <addr> <filename>" to load files from ubifs
partition to DDR.
Reading information about mtd layout from DT is not supported.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add read/write memory utilities for 16 and 32 bits. Add these
api's for both little and big endian systems similar to arm
architecture.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
U-Boot on xilinx boards is checking one address where DTB can be placed as
the first location for DTB. Originally this code was developed for Versal
where QEMU was putting generated DTB for U-Boot to use.
The patch enables changing this address which is necessary for cases where
default address is pointing to location (DDR) which is not present. The
access to this location can cause exception.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Do not source xilinx board Kconfig by other boards. These configs should be
available only when Xilinx platforms are selected.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.
This is follow up patch based on commit 664e16ce99 ("xilinx: kconfig:
Change Kconfig dependencies for Xilinx drivers").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zynq is similar to ZynqMP u-boot feature wise that's why also enable
default option for ENV_FAT_DEVICE_AND_PART Kconfig entry.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Find out MDIO bus and enable MDIO access to it if this is done via
different GEM controller. Only works across GEM instances.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The most of drivers are using '_' instead of '-' in driver name. That's why
sync up these names to be aligned. It looks quite bad to see both in use.
It is visible via dm tree command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When a message is written by a log driver (e.g. via the network stack) this
may result in the generation of further messages. We cannot allow these
additional messages to be emitted as this might result in an infinite
recursion.
Up to now only the syslog driver was safeguarded. We should safeguard all
log drivers instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the live tree API ofnode_parse_phandle_with_args, the cell_count
argument must be used when cells_name is NULL.
But this argument is not provided to the live DT function
of_parse_phandle_with_args even it is provided to
fdtdec_parse_phandle_with_args.
This patch adds support of the cells_count parameter in dev_ and
of_node API to allow migration and support of live DT:
- of_parse_phandle_with_args
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
OP-TEE reserved memory node must set property "no-map" to prevent
Linux kernel from mapping secure memory unless what non-secure world
speculative accesses of the CPU can violate the memory firmware
configuration.
Fixes: 6ccb05eae0 ("image: fdt: copy possible optee nodes to a loaded devicetree")
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add a test to verify that the no-map property is added in reserved-memory
node when fdtdec_add_reserved_memory() no-map parameter is set to true.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add boolean input argument @no_map to helper function
fdtdec_add_reserved_memory() to add or not "no-map" property
for an added reserved memory node.
Property no-map is used by the Linux kernel to not not map memory
in its static memory mapping. It is needed for example for the|
consistency of system non-cached memory and to prevent speculative
accesses to some firewalled memory.
No functional change. A later change will update to OPTEE library to
add no-map property to OP-TEE reserved memory nodes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When an external blob is missing it can be quite confusing for the user.
Add a way to provide a help message that is shown.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Add a new entry argument to the fit entry which allows selection of the
default configuration to use. This is the 'default' property in the
'configurations' node.
Update the Makefile to pass in the value of DEVICE_TREE or
CONFIG_DEFAULT_DEVICE_TREE to provide this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Explain that binman interprets these environment variables in the
"External tools" section to run target/host specific versions of the
tools, and add a new section on how to use CROSS_COMPILE to run the
tests on non-x86 machines.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch lets tools.Run() use host-specific versions with the
for_host keyword argument, based on the host-specific environment
variables (HOSTCC, HOSTOBJCOPY, HOSTSTRIP, etc.).
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, binman always runs the compile tools like cc, objcopy, strip,
etc. using their literal name. Instead, this patch makes it use the
target-specific versions by default, derived from the tool-specific
environment variables (CC, OBJCOPY, STRIP, etc.) or from the
CROSS_COMPILE environment variable.
For example, the u-boot-elf etype directly uses 'strip'. Trying to run
the tests with 'CROSS_COMPILE=i686-linux-gnu- binman test' on an arm64
host results in the '097_elf_strip.dts' test to fail as the arm64
version of 'strip' can't understand the format of the x86 ELF file.
This also adjusts some command.Output() calls that caused test errors or
failures to use the target versions of the tools they call. After this,
patch, an arm64 host can run all tests with no errors or failures using
a correct CROSS_COMPILE value.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These test files are currently "intended for use on x86 hosts", but most
of the tests using them can still pass when cross-compiled to x86 on an
arm64 host.
This patch enables non-x86 hosts to run the tests by specifying a
cross-compiler via CROSS_COMPILE. The list of variables it sets is taken
from the top-level Makefile. It would be possible to automatically set
an x86 cross-compiler with a few blocks like:
ifneq ($(shell i386-linux-gnu-gcc --version 2> /dev/null),)
CROSS_COMPILE = i386-linux-gnu-
endif
But it wouldn't propagate to the binman process calling this Makefile,
so it's better just raise an error and expect 'binman test' to be run
with a correct CROSS_COMPILE.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch makes buildman create linked working trees instead of clones
of the source repository, but keeps updating the older clones of the
repository that might already exist. These worktrees share "everything
except working directory specific files such as HEAD, index, etc." with
the source repository. See the git-worktree(1) manual page for more
information.
If git-worktree isn't available, silently falls back to cloning the
repository.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
At present 64-bit sunxi boards use the Makefile to create a FIT, using
USE_SPL_FIT_GENERATOR. This is deprecated.
Update sunxi to use binman instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present binman warns about missing external blobs only when the
BUILD_ROM is defined. Enable this behaviour always, since many boards
are starting to use these (e.g. ARM Trusted Firmware's BL31).
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is useful to generate a FIT which has a number of DTB
images, selectable by configuration. Add support for this in binman,
using a simple iterator and string substitution.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an entry for ARM Trusted Firmware's 'BL31' payload, which is the
device's main firmware. Typically this is U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have an Entry_blob_ext which implement a blob which holds an
external binary. We need to support other entry types that hold external
binaries, e.g. Entry_blob_named_by_arg. Move the support into the base
Entry class to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the Python sequential-write interface can produce an error when
it calls fdt_finish(), since this needs to add a terminating tag to the
end of the struct section.
Fix this by automatically expanding the buffer if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tidy up a few test functions which lack argument comments. Rename one that
has the same name as a different test.
Also fix up the comment for PrepareImagesAndDtbs().
Signed-off-by: Simon Glass <sjg@chromium.org>
If an entry argument is needed by an entry but the entry argument is not
present, then a strange error can occur when trying to read the file.
Fix this by allowing arguments to be required. Select this option for the
cros-ec-rw entry. If a filename is provided in the node, allow that to be
used.
Also tidy up a few related tests to make the error string easier to find,
and fully ignore unused return values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently of_match_ptr is used to avoid referencing compatible strings
when OF_CONTROL is not enabled. This behaviour could be improved by
taking into account also OF_PLATDATA, as when this configuration is
enabled the compatible strings are not used at all.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we look for resources based on the path of the Python module
that wants them. Instead we should use Python's pkg_resources feature
which is designed for this purpose.
Update binman to use this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When reading subentries of each image, the FIT entry type directly
concatenates their contents without padding them according to their
offset, size, align, align-size, align-end, pad-before, pad-after
properties.
This patch makes sure these properties are respected by offloading this
image-data building to the section etype, where each subnode of the
"images" node is processed as a section. Alignments and offsets are
respective to the beginning of each image. For example, the following
fragment can end up having "u-boot-spl" start at 0x88 within the final
FIT binary, while "u-boot" would then end up starting at e.g. 0x20088.
fit {
description = "example";
images {
kernel-1 {
description = "U-Boot with SPL";
type = "kernel";
arch = "arm64";
os = "linux";
compression = "none";
u-boot-spl {
};
u-boot {
align = <0x10000>;
};
};
};
}
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reinstate check in testPadInSections(), squash in
"binman: Allow FIT binaries to have missing external blobs"
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Other relevant properties (pad-after, offset, size, align, align-size,
align-end) already work since Pack() sets correct ranges for subentries'
data (.offset, .size variables), but some padding here is necessary to
align the data within this range to match the pad-before property.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Switch to str.startswith for matching like the FIT etype does since the
current version doesn't ignore 'hash-1', 'hash-2', etc.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Linking a U-Boot larger than 1MB fails with PIE enabled:
u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation
truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end'
defined in .bss_start section in u-boot.
This extends the supported range by using adrp & add to load symbols
early while starting up.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Atmel PIT timer is not available for next products that
have another timer hardware block.
To be able to use the common at91 code, guard the code that uses PIT
by ifdefs.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
We already have a function to retrieve the mac address from one EEPROM.
For boards with a second Ethernet interface, however, we would
require another EEPROM with a second unique MAC address.
Introduce at91_set_eth1addr which will look for a second EEPROM
and set the 'eth1addr' variable with the obtained MAC address.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add sckc driver compatible with common clock framework. Driver
implements slow clock support for SAM9X60 compatible IPs (in this
list it is also present SAMA7G5's slow clock IP).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add pre-requisite headers for AT91 clock architecture. These
are based on already present files on Linux and will be used
by following commits for AT91 CCF clock drivers.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk_get_by_indexed_prop() retrieves a clock with dev member being set
with the pointer to the udevice for the clock controller driver. But
in case of CCF each clock driver has set in dev member the reference
to its parent (the root of the clock tree is a fixed clock, every
node in clock tree is a clock registered with clk_register()). In this
case the subsequent operations like dev_get_clk_ptr() on clocks
retrieved by clk_get_by_indexed_prop() will fail. For this, get the
pointer to the proper clock registered (with clk_register()) using
clk_get_by_id() before proceeding.
Fixes: 1d7993d1d0 ("clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clock re-parenting is not binding the clock's device to its new
parent device, it only calls the clock's ops->set_parent() API. The
changes in this commit re-parent the clock device to its new parent
so that subsequent operations like clk_get_parent() to point to the
proper parent.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In common clock framework the relation b/w parent and child clocks is
determined based on the udevice parent/child information. A clock
parent could be changed based on devices needs. In case this is happen
the functionalities for clock who's parent is changed are broken. Add
a function that reparent a device. This will be used in clk-uclass.c
to reparent a clock device.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are drivers to support built in USB controller and PHY-s now, so lets add the USB nodes to DTSI.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0
ports.
Qualcomm has some custom config registers on top of the generic ones,
but for host mode these are not needed.
So lets add the neccessary compatible string.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the reset controller.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Its common to use dt-bindings instead of hard-coding clocks or resets.
So lets use the imported Linux GCC bindings on IPQ40xx target.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
mpc83xx, keymile boards: enable DM_ETH and add DTS
- mpc83xx: remove unneeded extern declaration in cpu_init
- powerpc, qe: fix codingstyle issues for drivers/qe
- powerpc, qe: add DTS support for parallel I/O ports
- net, qe: add DM support for QE UEC ethernet
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
enable DTS support for keymile mpc83xx based boards.
get rid of compile warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Therefore done:
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Series-to: u-boot
Series-version: 3
Series-changes: 3
- rebase patchset to current mainline commit
c0192950df
- update defconfig files
Series-changes: 2
- add patch which fixes Codingstyle errors in drivers/qe
- add patch which converts the mpc83xx based boards from
keymile to DM_ETH
Cover-letter:
powerpc, mpc83xx: add DM_ETH support
This patch series adds DM ethernet support for mpc83xx based
keymile boards.
Travis build:
END
add DM/DTS support for the UEC ethernet on QUICC Engine
Block.
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com>
Series-changes: 3
- revert:
commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled")
as now qe works with DM and DM_ETH support.
- fix mailaddress from Holger
Series-changes: 2
- add comments from Qiang Zhao:
- add device node documentation
- I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c
because using drivers/net/fsl_mdio.c leads in none existent
udevice mdio@3320
instead boards with DM ETH support should use now this
driver.
- remove RFC tag
Commit-notes:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This Code should be removed if all boards are converted
to DM/DTS.
- add the DM based qe uec driver under drivers/net/qe
- Therefore copied the files uccf.c uccf.h uec.h from
drivers/qe. So there are a lot of Codingstyle problems
currently. I fix them in next version if this RFC
patch is OK or it needs some changes.
- The dm based driver code is now under drivers/net/qe/dm_qe_uec.c
Used a lot of functions from drivers/qe/uec.c
- seperated the PHY specific code into seperate file
drivers/net/qe/dm_qe_uec_phy.c
END
add DM support for parallel I/O ports on QUICC Engine Block
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl
Commit-notes:
Open questions / discussion:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This should be removed if all boards are converted to
DM/DTS.
- Unfortunately linux DTS does not use "pinctrl-"
properties, instead "pio-handle" properties.
Even worser old U-Boot code initializes all pins
defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
table in board code. As linux does the same I decided
to also scan through all subnodes containing "pio-map"
property and initialize them too.
The proper solution would be to check for "pio-handle"
when a device is probed.
END
- Hyperflash boot for J7200
- Update Main R5FSS lockstep mode
- R5F remoteproc support for J7200
- Minor env fixes
- Add SPI boot support for am335x-icev2
am335x internal SRAM is too small to support the addition of
SPI bootmode to the default defconfig. Add a separate spiboot_defconfig
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add an ofdata_to_platdata() callback to access dts in U-boot and
access all platform data in it. This prepares the driver for supporting
both device tree as well as static platform data structures in SPL.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add platform data and a device structure for the spi device
present on am335x-icev2. This requires moving all omap3_spi
platform data structures and symbols to an omap3_spi.h so that
the board file can access them.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
There are devices which don't use OF_CONTROL or OF_PLATDATA but instead
rely on statically defined platdata. Block dm_scan_fdt_dev() with both
configs to avoid build failures under this condition.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If devtype variable is setted via setenv, then the following devtype=X style is
ignored. Currently, many u-boot commands use devtype variable in the latter
manner:
mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
Use devtype=mmc instead of setenv devtype mmc to avoid bugs with booting from
another devtype.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Enable the FS_LOADER and associated configs in the j7200_evm_r5_defconfig
so that the R5 SPL can support the loading of firmware files from a boot
media/file system.
Signed-off-by: Suman Anna <s-anna@ti.com>
Add a generic fs_loader node to the K3 J7200 R5 common board dts
file and use it as the chosen firmware-loader so that it can be
used for loading various firmwares from a boot media/filesystem
in R5 SPL on K3 J7200 EVM.
Signed-off-by: Suman Anna <s-anna@ti.com>
The R5 SPL on J7200 SoCs will be limited to booting just the
MCU R5FSS0 R5F core in LockStep-mode at present, so add the
two required environment variables 'addr_mcur5f0_0load' and
'name_mcur5f0_0fw' that are needed by the R5 SPL early-boot
logic. The firmware name used is also different from that on
J721E SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
The A72 U-boot can support early booting of any of the Main or MCU R5F
remote processors from U-boot prompt to achieve various system usecases
before booting the Linux kernel. Update the default BOOTCOMMAND to provide
an automatic and easier way to start various remote processors through
added environment variables.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs has two R5F sub-systems. Enable the TI K3
R5F remoteproc driver and the remoteproc command options
to allow these R5F processors to be booted from A72 U-Boot.
The Kconfigs are added using savedefconfig.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs have different number of remote processors, but reuse
the same environment settings as the J721E SoCs. The current env
variable rproc_fw_binaries is geared towards J721E SoCs and is
incorrect for J7200 SoCs. Please see the logic originally added in
commit 0b4ab9c9a7 ("env: ti: j721e-evm: Add support to boot rprocs
including R5Fs and DSPs").
Fix this by defining the DEFAULT_RPROCS macro appropriately using
the corresponding TARGET_EVM Kconfig symbol. This macro is used by
the 'rproc_fw_binaries' env variable in the common remoteproc env
header file k3_rproc.h.
The list of R5F cores to be started before loading and booting the
Linux kernel are as follows, and mainly comprises of the Main R5FSS0
cores in this order:
Main R5FSS0 (Split) Core0 : 2 /lib/firmware/j7200-main-r5f0_0-fw
Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7200-main-r5f0_1-fw
The MCU R5FSS0 is in LockStep mode and is expected to be booted by
R5 SPL, so it is not included in the list. The order of rprocs to
boot cannot be really modified as only the Main R5FSS0 cores are
involved and Core0 has to be booted first always before the
corresponding Core1.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MAIN domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in LockStep mode by default, with
the ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
The A72 U-Boot code can load and boot a number of the available
R5FSS Cores on the J7200 SoC. Change the memory attributes for the
DDR regions used by the remote processors so that the cores can see
and execute the proper code.
The J7200 SoC has less number of remote processors compared to J721E,
so use less memory for the remote processors. So, a separate table
based on the current J721E table is added for J7200 SoCs, and selected
using the appropriate Kconfig CONFIG_TARGET_J7200_A72_EVM symbol.
Signed-off-by: Suman Anna <s-anna@ti.com>
The K3 J7200 SoC family has a revised R5F sub-system and contains a
subset of the R5F clusters present on J721E SoCs. The integration of
these clusters is very much similar to J721E SoCs otherwise.
The revised IP has the following two new features:
1. TCMs are auto-initialized during module power-up, and the behavior
is programmable through a MMR bit controlled by System Firmware.
2. The LockStep-mode allows the Core1 TCMs to be combined with the
Core0 TCMs effectively doubling the amount of TCMs available.
The LockStep-mode on previous SoCs could only use the Core0 TCMs.
This combined TCMs appear contiguous at the respective Core0 TCM
addresses.
Add the support to these clusters in the K3 R5F remoteproc driver
using J7200 specific compatibles and revised logic accounting for
the above IP features/differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
The K3 J7200 SoCs have two dual-core Arm R5F clusters/subsystems, with
2 R5F cores each, one in each of the MCU and MAIN voltage domains.
These clusters are a revised version compared to those present on
J721E SoCs. Update the K3 R5F remoteproc bindings with the compatible
info relevant to these R5F clusters/subsystems on K3 J7200 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
The commit 316c927135 ("include: configs: j721e_evm: Add env variables
for mcu_r5fss0_core0 & main_r5fss0_core0") added four different new env
variables 'addr_mainr5f0_0load', 'name_mainr5f0_0fw', 'addr_mcur5f0_0load'
and 'name_mcur5f0_0fw' to the generic environment, but these are only
needed and used in R5 SPL for early-booting the MCU R5FSS0 and Main
R5FSS0 Core0 on J721E SoCs.
These are not really needed for A72 U-Boot, so limit the scope of
these variables only to R5 SPL. While at this, also fix the loadaddr
variable values to include the hex prefix like with other such env
variables.
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
The default rproc list currently used by A72 U-Boot to boot various
remote processors include the Main R5FSS0 (Split-mode) Core1, Main
R5FSS1 (LockStep mode) Core0 and the three DSPs. The Main R5FSS1 cluster
is configured for Split mode by default in the dts now, so add the
Main R5FSS1 Core1 (rproc #5) to the default rproc boot list. This
core is now booted after the Main R5FSS1 Core0 and before the DSPs.
The order of the rprocs to boot can always be changed at runtime if
desired by overwriting the 'rproc_fw_binaries' environment variable
at U-boot prompt. Note that the R5FSS Core1 cannot be booted before
its associated Core0.
Signed-off-by: Suman Anna <s-anna@ti.com>
Switch the MAIN R5FSS1 cluster to be configured for Split-mode as the
default so that two different applications can be run on each of the
R5F cores in performance mode. LockStep-mode would be available only
on SoCs efused with the appropriate bit, and Split-mode is the mode
that is available on all J721E SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Enable configs required to support HyperFlash boot and detection of
onboard mux switch for HyperFlash selection
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
On J7200 SoC OSPI and HypeFlash are muxed at HW level and only one of
them can be used at any time. J7200 EVM has both HyperFlash and OSPI
flash on board. There is a user switch (SW3.1) that can be toggled to
select OSPI flash vs HyperFlash.
Read the state of this switch via wkup_gpio0_6 line and fixup the DT
nodes to select OSPI vs HyperFlash
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Include ast2500-evb.dtb for CONFIG_ASPEED_AST2500 instead of
for all aspeed targets.
ast2400 is based on ARM926EJ-S processor (ARMv5-architecture).
ast2500 is based on ARM1176JZS processor (ARMv6-architecture).
ast2600 is based on Cortex A7 processor (ARMv7-A architecture).
Each of the above SOC is using a different ARM CPU(s) with different ARM
architecture revision. It is not possible to support all 3 of these
families in a single binary. So there is no need to build ast2500-evb.dtb
for other SOC families.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Import Qualcomm IPQ4019 GCC bindings from Linux.
This will enable using bindings instead of raw clock numbers both in the driver and DTS like Linux does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
v2: modify title description aspeed:clock -> clock:aspeed
Use kernel include/dt-bindings/clock/aspeed-clock.h define
for clock driver.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Chimp is a core in Broadcom netxtream controller (bnxt).
Add support to check bnxt's chimp component status.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add command to update the environmental variables which
are used to read the data from QSPI offsets and load
the binaries to bnxt.
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
As the error message is now displayed by generic phy functions,
the dev_err/pr_err can be change to dev_dbg/pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the dev_err can be change to dev_dbg.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_idebug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Since the current code base is mostly from btrfs-progs, anyone
contributing to U-Boot btrfs code could also help us to improve
btrfs-progs and btrfs kernel module.
Also add myself as designated reviewer.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This cleans up the now unneeded code from the old btrfs implementation.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch introduces a new function, list_one_subvol(), which will
resolve the path to FS_TREE of one subvolume.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch introduces a new function, get_path_in_subvolume(), which
resolves inode number into path inside a subvolume.
This function will be later used for btrfs subvolume list functionality.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This version of btrfs_file_read() has the following new features:
- Tries all mirrors
- More handling on unaligned size
- Better compressed extent handling
The old implementation doesn't handle compressed extent with offset
properly: we need to read out the whole compressed extent, then
decompress the whole extent, and only then copy the requested part.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This implements lookup_data_extent() function for the incoming
new implementation of btrfs_file_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
These two functions are used to do sector aligned read, which will be
later used to implement btrfs_file_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Rename btrfs_file_read() and its callees to avoid name conflicts with
the incoming new code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
After this the only remaining function that still utilizes
__btrfs_lookup_path() is btrfs_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Use extent buffer based infrastructure to re-implement btrfs_readdir().
Along this rework, some small corner cases fixed:
- Subvolume tree mtime
Mtime of a subvolume tree is recorded in its root item, since there is
no INODE_ITEM for it.
This needs extra search from tree root.
- Output the unknown type
If the DIR_ITEM is corrupted, at least don't try to access the memory
out of boundary.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This is the extent buffer based path lookup routine.
To implement this, btrfs_lookup_dir_item() is crossported from
btrfs-progs, and implements btrfs_lookup_path() from scratch.
Unlike the existing __btrfs_lookup_path(), since btrfs_read_fs_root()
will check whether a root is a orphan at read time, there is no need to
check root backref, this makes the code a little easier to read.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
All existing next_length() caller handles return value > BTRFS_NAME_LEN,
so there is no need to do BTRFS_NAME_LEN check in next_length().
But still, we want to exit early if we're beyond BTRFS_NAME_LEN, so this
patch makes next_length() exit as soon as we're beyond BTRFS_NAME_LEN.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
The existing __btrfs_readlink() can be easily re-implemented using the
extent buffer based btrfs_readlink().
This is the first step to re-implement U-Boot's btrfs code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Since the old code is using __btrfs_path/__btrfs_root which is different
from the regular extent buffer based one, we add "__" prefix for the old
implementation to avoid name conflicts for the incoming crossport.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
open_ctree_fs_info() is the main entry point to open btrfs.
This version is a simplfied version of __open_ctree_fd() of btrfs-progs,
the main differences are:
- Parameters on how to specify a block device
Instead of @fd and @path, U-Boot uses blk_desc and disk_partition_t.
- Remove open_ctree flags
There won't be multiple open ctree modes in U-Boot.
Otherwise functions structures are all kept the same.
With open_ctree_fs_info() implemented, also introduce the global
current_fs_info pointer to show the current opened btrfs.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
These two functions play a big role in btrfs bootstrap.
The following function is removed:
- Seed device support
Although in theory we can still support multiple devices, we don't have
a facility in U-Boot to do device scan without opening them.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch copies the core function, btrfs_search_slot(), from
btrfs-progs.
This version has the following functionality removed:
- The ability to COW tree block
Related code is commented out, and can be enabled in the future.
- The readahead functionality
This is abused in kernel. Remove it completely.
With the core function in place, btrfs developers should feel at home now.
This also crossports supporting code like btrfs_previous_item() to
ctree.[ch].
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Crossport struct btrfs_root to ctree.h from btrfs-progs, with write
related members deleted.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This is to avoid naming conflicts between extent buffer based
btrfs_root.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
To avoid name conflicting between the extent buffer based btrfs_path
from btrfs-progs, rename struct btrfs_path to struct __btrfs_path.
Also rename btrfs_free_path() to __btrfs_free_path() to avoid conflicts.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This is the one of the basic stone function for btrfs, which:
- Resolves the chunk mappings
- Reads data from disk
- Does various sanity check
With read_tree_block(), we can finally crossport needed btrfs btree
operations to U-Boot.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch crossports volumes.[ch] from btrfs-progs, including:
- btrfs_map_block()
The core mechanism to map btrfs logical address to physical address.
This version includes multi-device support, along with RAID56 support.
- btrfs_scan_one_device()
This is the function to register one btrfs device to the list.
This is the main part of the multi-device btrfs assembling process.
Although we're not going to support multiple devices until U-Boot
allows us to scan one device without actually opening it.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
[trini: Use %zu in a debug print to avoid warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
This brings all structure accessors from btrfs-progs/ctree.h, as in
kernel's ctree.h.
All these accessors handle the endian convert at runtime, and since all
of them are defined as static inline functions, those which aren't used
won't take space in resulting binary.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This brings the extent_io_tree infrastructure, with which we can finally
bring in proper btrfs_fs_info structure to ctree.h.
With read/write_extent_buffer() implemented we also backport
read/write_eb_member() to ctree.h.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch implements an infrastructure to insert/search/merge an extent
range (with variable length).
This provides the basis for later extent buffer cache used in btrfs.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch uses generic code from btrfs-progs to read one super block
from block device.
To support the btrfs-progs coding style, the following is also
crossported:
- BTRFS_SETGET_FUNC for btrfs_super_block
- btrfs_check_super() function
- Move btrfs_read_superblock() to disk-io.[ch]
Since super.c only contains pretty small amount of code, and
the extra check will be covered in later root read patches.
Differences between this implementation and btrfs-progs:
- No sbflags/sb_bytenr support
Since we only need to read the primary super block (like kernel),
sbflags/sb_bytenr used by super block recovery is not needed.
This also changes the following behavior of U-Boot btrfs:
- Only reads the primary super block
The old implementation reads all 3 super blocks, and also one
non-existing backup.
This is not correct, especially if there is another filesystem created
on the device but old superblocks are not rewritten.
Just like kernel, we only check the primary super block.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
[trini: Change error to be a define in compat.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
This mostly crossports crypto/hash.[ch] from btrfs-progs.
The differences are:
- No blake2 support
No blake2 related library in U-Boot yet.
- Use uboot xxhash/sha256 directly
No need to implement the code as U-Boot has already provided the
interface.
This adds the support for the following csums:
- SHA256
- XXHASH
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This version includes all needed on-disk format from kernel.
Only need to modify the include headers for U-Boot, everything else is
untouched.
Also, since U-Boot btrfs is using a different endian convert timing (at
tree block read time), it needs some forced type conversion before
proper crossport.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
bi_memstart & bi_memsize are now not referenced any more. This patch
removes their definitions from the bd_info struct.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove printing of the superseeded (by bi_dram[]) memory values from the
bdinfo command.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Most likely these deprecated (removed) variables are not needed. Lets
remove the assignments completely from all spl.c files.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Oleksandr Zhadan and Michael Durrant
Reviewed-by: Simon Glass <sjg@chromium.org>
All platforms support bi_dram[] since quite some time. Lets remove the
and bi_memsize values completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When this no-op dram_init_banksize() is removed, the weak default will
be used instead, which correctly sets the bi_dram[] banksize values.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
arch_setup_bdinfo() only configures the deprecated bi_memstart &
bi_memsize values, which should not be needed any more. Lets remove
this file completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
With the planned removal of bi_memstart & bi_memsize, this patch now
moves the references to the better suiting gd->ram_base/ram_size
variables.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove the bi_memstart / bi_memsize assignment in setup_bdinfo() and
make sure, that bd_dram[] is always configured in the weak default
implementation of dram_init_banksize(), when CONFIG_SYS_SDRAM_BASE is
not set.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Use only gd->ram_base/_size in env_get_bootm_size() instead of bi_dram[]
in some cases and bi_memstart in others.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 86cf1c8285 ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-26 09:19:16 +02:00
5679 changed files with 240773 additions and 61484 deletions
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