Update version in Makefile to prepare the label v2021.10-stm32mp-r2
for OpenSTLinux V4.1
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I235b2792161ab02f0eee2af19506eed828a8dc6e
Since the commit d5ba6188df ("cmd: pxe_utils: Check fdtcontroladdr
in label_boot") the FDT or the FDTDIR label is required in extlinux.conf
and the fallback done by bootm command for device tree present is no more
performed when FIT is used for kernel.
When the labels FDT or FDTDIR are absent or if the device tree file is
absent, the PXE command in U-Boot uses the default U-Boot device tree
selected by fdtcontroladdr = gd->fdt_blob, it is the "Scenario 3".
With this patch the bootm FIP fallback is no more possible with
the extlinux.conf when only "kernel" label is present and is a FIP:
kernel <path>#<conf>[#<extra-conf[#...]]
As the U-Boot FDT is selected in the third bootm argument the device
tree from FIP is not used as it was done previously.
This patch adds a new field kernel_label to save the full kernel label.
The FDT bootm parameters use the kernel address (to avoid to load a
second time the same FIP) and the config when this full label is reused
for "fdt" or "initrd" label.
This FIP support in extlinux.conf is restored when the "FDT" label
can be found and select the same FIP (identical file and configuration):
kernel <path>#<conf>[#<extra-conf[#...]]
fdt <path>#<conf>[#<extra-conf[#...]]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I4662774cdd525de1992f84f0ea97255e2e43d8c2
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/268490
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: CIBUILD <MDG-smet-aci-builds@list.st.com>
The sandbox in U-Boot v2021.10 don't support the video test
introduced in commit 8657ad43f3 ("sandbox: video: Add BMP
tests for 32bpp and 8bpp modes"), merged in dm-pull-13jan22
v2022.04-rc1.
Revert the sandbox and test part of previous patch.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ia98e6d864635c901b8dda5f4d359a327082aec81
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/267408
Reviewed-by: CIBUILD <MDG-smet-aci-builds@list.st.com>
At present this uses RGB555 format for blitting to a display. Sandbox uses
565 and that seems to be more normal for BMP as well. Update the code
accordingly and add a test.
Note that this likely breaks the theadorable board so we may need to
discuss supporting both formats.
[Backport of commit 4ea1548210 ("video: theadorable: Use RGB565 for
BMP blitting")]
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ifae9f08166f4c7c3f8a1aa41f6fc0c898c3be5b5
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/265323
Reviewed-by: CIBUILD <MDG-smet-aci-builds@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
When the STM32CubeProgrammer sent a empty flashlayout.tsv
file, the command stm32prog correctly parse the file
but data->dev_nb = 0 and the stm32prog_devices_init
treatments can be skipped.
Also remove the trace "partition: Done" when GPT partitioning
is not done.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I9928b88f3a453611043b484158b02efe9b0c06bf
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/260198
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
If using OF_CONTROL, fdtcontroladdr is set to the fdt used to configure
U-Boot. When using PXE, if no fdt is defined in the menu file, and
there is no fdt at fdt_addr, add fall back on fdtcontroladdr too.
We are developing board support for the Armv8r64 FVP using
config_distro_bootcmd. We are also using OF_BOARD and would like the
PXE boot option to default to the fdt provided by board_fdt_blob_setup.
[Backport of commit d5ba6188df ("cmd: pxe_utils: Check fdtcontroladdr
in label_boot")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Change-Id: Iad7341a89d9a31a2d58ee831b3808857a763cab5
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/261342
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: CIBUILD <MDG-smet-aci-builds@list.st.com>
USB Type-c controller (stm32g0) has an interrupt pin wired to a
STM32MP13 PWR wakeup pin on DK board. It can be used as a wakeup source,
to wakeup the system from standby mode, when changes are identified on the
Type-c connector.
All is configured in OPTEE, adopt it. This will avoid attempt to configure
a secure GPIO
Change-Id: Id2391286462fa394a5dd4d05b0c7666c5ea61ce1
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/260818
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Current compatible string used to update SPI NAND and SPI NOR devices
can lead to a wrong partitions update (for example, SPI NAND partitions
added to SPI NOR node in the device tree). To avoid this wrong behavior,
use jedec,spi-nor compatible string for SPI NOR devices and spi-nand
compatible string for SPI NAND devices.
Change-Id: Iae28ab1a0be932b26f9cf8b17d870508efa88b79
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/260967
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Christophe KERELLO <christophe.kerello@st.com>
When a GPIO is secure-protected, it can't be accessed from U-Boot.
In that case, set its 'function' to GPIOF_PROTECTED.
This makes the "gpio status" command returning the "protected" status.
Example with GPIOA6 pin secure-protected
> gpio status -a
Bank GPIOA:
GPIOA0: unused: 0 [ ]
GPIOA1: func
...
GPIOA6: protected
...
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: If3297d920741a6a1b915503650de1cfb69c726f9
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/252040
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Depending on backup register value, U-Boot SPL maintains the debug unit
powered-on for debugging purpose; only BUCK1 is required for powering
the debug unit, so revert the setting for all the other power lanes,
except BUCK3 that has to be always on.
To be functional this patch requires a modification in the debugger
,openocd for example, to update the STM32MP15 backup register when it is
required to debug SPL after reset. After deeper analysis this behavior
will be never supported in tools so the associated code, will be never
used and the associated code can be removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I50f3ce7fb4a4bb3169f40cf4bab0ec75936e5c03
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/254231
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can now
be removed, they are no more needed since the commit 16cc5ad0b4 ("power:
regulator: add dummy helper").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I18e4ad5947e3b321573efe2085dd4c593cabbabe
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/250167
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can now
be removed, they are no more needed since the commit 16cc5ad0b4 ("power:
regulator: add dummy helper").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: If8c377a910cabf108ec14bc570c381126e1531e9
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/250098
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Id4e8f33e11a972d985f29b7a4363b1622f4128c2
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/250832
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Detect the GC2145 camera sensor connected to the stm32mp135f-dk
board in order to enable instead the OV5640 if the GC2145 isn't
detected via I2C. For that purpose, necessary dependencies
(regulator / gpio) are enabled and GC2145 ID registers are checked
to determine if the GC2145 is attached or not. If it isn't found,
then the device-tree is updated (camera nodes status & stmipid02
CSI bridge remote node phandle) to enable the OV5640 sensor
and the remote-endpoint property setting in the ov5640 to
make it point to the stmipi endpoint node.
This remote-endpoint property is not setted within the DT by
default in order to avoid a non birectionnal graph connection
warning during DT build.
Change-Id: If56f670e530158d21926148eadb9ec004797ac20
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/242645
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/245022
Set the environment variable "console", used in extlinux.conf file when it
is generated by YOCTO in OpenSTLinux distribution:
UBOOT_EXTLINUX_CONSOLE ??= "console=${console},${baudrate}"
With these 2 variables, U-Boot give dynamically the used console and
baudrate in the Linux kernel bootargs.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I23ed8b36e294031f1f614d2304ea17085f075612
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/241463
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Update the stm32prog command to allow the reception of U-Boot script in
the FlashLayout alternate during the first USB enumeration.
This patch is aligned with the last TF-A behavior: the Flashlayout
is now loaded by U-Boot; it is no more present at STM32_DDR_BASE when
the stm32prog is launched after a serial boot, on UART or on USB.
The received script must be a U-Boot legacy image, no more need to add
a stm32image header.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I08598ebf2b427ac25eaf56e05799ac8d2dc42947
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/240544
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
When a interruption is received during the first USB enumeration
used to received the FlashLayout, with handle ctrl-c, the second
enumeration is not needed and the result for stm32prog_usb_loop
is false (reset is not needed).
This patch avoid the need of a second ctrl to interrupt the command
stm32prog.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie76b6efe731c9d721b794d9ad6b394b38492a4df
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/240543
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
As the fip partition is duplicated in eMCC/SDCard for the firmware
update support in TF-A: "fip-a" and "fip-b", the U-Boot use a dedicated
partition named "u-boot-env" to avoid issue when the FIP is updated by
the update agent.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I1fa341f578929363fb0f0194600009f6c6c9e8a8
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/238557
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Add in MTD partitions the new partitions needed by TF-A firmware update:
- metadata to save the TF-A information: 2 copy
- fip-a / fip-b: two FIP slots, used for system A/B (seamless) update
- the previous "fsbl" partition with 2 copy of TFA is replaced
by 2 partitions (only one copy in each MTD partition) to simplify
the update: no need to managed this copy on update, need to update the
two partition (skip bad block for NAND)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie51edf3fe13dabb66fde99eaf781fdd7b1990e3c
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/238556
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Nicolas TOROMANOFF <nicolas.toromanoff@st.com>
Tested-by: Nicolas TOROMANOFF <nicolas.toromanoff@st.com>
Add support of UUID for FIP parttion, required by Firmware update
support in TF-A:
- UUID TYPE for FIP partition: 19d5df83-11b0-457b-be2c-7559c13142a5
- "fip-a" partition UUID: 4fd84c93-54ef-463f-a7ef-ae25ff887087
- "fip-b" partition UUID: 09c54952-d5bf-45af-acee-335303766fb3
This check is done with a new partition type "FIP" associated
at the FIP UUID.
The A/B partition UUID is detected by the partition name:
"fip-a", "fip-b".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I94e74b521fd55dcc68ab8d000cb93ef48fc12f14
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/238555
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
On eMMC, the erase_grp_size > 1 so the address and size for the erase
block command can be unaligned on erase group size and some strange
trace occurs and the result is not guarantee by MMC devices.
The SD-Card behavior don't change as erase_grp_size = 1 for SD-Card.
For example, on eMMC present on STM32MP15C-EV1, before the patch:
STM32MP> env erase
Erasing Environment on MMC...
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x27ff
16 blocks erased: OK
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x23ff
16 blocks erased: OK
OK
After this patch:
STM32MP> env erase
Erasing Environment on MMC...
1024 blocks erased at 0x2000: OK
1024 blocks erased at 0x2000: OK
OK
Here the 2 copies of U-Boot environment are in the same devices Erase
group: it is erased twice.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I26fa615c6898db0d17024664b17b20412638bfd7
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/238836
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Fix the end address in the message for unaligned erase request in
mmc_berase() when start + blkcnt is aligned to erase_grp_size.
for example:
- start = 0x2000 - 26
- count = 26
- erase_grp_size = 0x400
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x27ff
But no issue when the end address is not aligned, for example
- start = 0x2000 - 2 * 26
- count = 26
- erase_grp_size = 0x400
Caution! Your devices Erase group is 0x400
The erase range would be change to 0x2000~0x23ff
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I5f92544259c3d1dad2df30c9d7762ec7860f07cf
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/238835
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
On STMicroelectronics boards, the UART can reliably go up to
- 2000000 bauds when connected to the on-board ST-LINK-V2 for STM32MP15
- 12000000 bauds when connected to the external ST-LINKV3 for STM32MP13
Unfortunately U-Boot will fall back to 115200 unless higher rates are
declared via CONFIG_SYS_BAUDRATE_TABLE.
This patch add the support of higher baudrates on STMicroelectronics
boards with ST-LINK.
Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Change-Id: Ie4aa91b7f1b08b59b02853e7f28c2b48445ba0f6
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/241313
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/239497
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
Commit dbf928dd26 ("gpio: stm32f7: Add gpio bank holes management")
proposed a first implementation by not counting GPIO "inside" hole. GPIO
are not displaying correctly using gpio or pinmux command when GPIO holes
are located at the beginning of GPIO bank.
To simplify, consider that all GPIO have 16 GPIO and use the gpio_ranges
struct to indicate if a GPIO is mapped or not. GPIO uclass offers several
GPIO functions ("input", "output", "unused", "unknown" and "func"), use
"unknown" GPIO function to indicate that a GPIO is not mapped.
stm32_offset_to_index() is no more needed and removed.
This must be reflected using the "gpio" command to indicate to user
that a particular GPIO is not mapped (marked as "unknown") as shown below:
Example for a 16 pins GPIO bank with the [2-7] mapping (only 6 pins
mapped):
GPIOI0 : unknown
GPIOI1 : unknown
GPIOI2 : analog
GPIOI3 : analog
GPIOI4 : alt function 0 push-pull pull-down
GPIOI5 : alt function 0 push-pull pull-down
GPIOI6 : alt function 0 push-pull pull-down
GPIOI7 : analog
GPIOI8 : unknown
GPIOI9 : unknown
GPIOI10 : unknown
GPIOI11 : unknown
GPIOI12 : unknown
GPIOI13 : unknown
GPIOI14 : unknown
GPIOI15 : unknown
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I55c39a2707fa8dae108d90c4a72590f1a4520ca9
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/239065
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Fabien DESSENNE <fabien.dessenne@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Increase HUB_DEBOUNCE_TIMEOUT to 2000 because some usb device
needs around 1.5 or more to make the hub port status to be
connected steadily after being powered off and powered on.
These value is aligned with Linux driver and avoids to configure
"usb_pgood_delay" as a workaround for connection timeout on
some USB device; normally the env variable "usb_pgood_delay" is used
to delay the first query after power ON and thus the device answer,
not to increase the connection timeout delay.
Commit-notes:
Hi,
I think this patch solves a general issue because a 1s timeout for
USB connection is too short on problematic USB keys.
The issue was introduced by the commit c998da0d67 ("usb: Change
power-on / scanning timeout handling")
Patch in usb_hub allow to avoid patch in each board/driver.
for example, commit 0417169054 ("imx: ventana: add usb_pgood_delay
2sec default") => use pgood_delay = 2s !?
("ARM: stm32: Increase USB power-good delay on DHSOM")
https://patchwork.ozlabs.org/project/uboot/patch/20211113022444.231801-1-marex@denx.de/
or commit 2bf352f0c1 ("usb: dwc2: Add delay to fix the USB
detection problem on SoCFPGA") => patch in USB DWC2 driver to add
a timeout in driver
the commit 319418c01c ("usb: hub: allow pgood_delay to be
specified via env") => introduce env variable for warm-up times
Patrick
END
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I5eabf3f9fdbbaf763cd44e9c018cb5b74a0c65ac
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236836
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Remove the U-Boot specific add-on for SDMMCv2 IP used in the STM32MP15
as this compatible "st,stm32-sdmmc2" is present in kernel device
tree v5.15-stm32mp-r1.
This patch reduces the device tree difference with kernel device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I1c465a221cb3da2c7b54cbf8467a0f97ba6f397e
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/195269
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Solve a issue with AXI_WIDTH_32 on a the 64 bytes cache line platform;
in this case the requested descriptor padding length should be 12 but the
associated parameter EQOS_DMA_CH0_CONTROL.DSL is limited at 3bits = 7.
As the DMA descriptor can't be correctly aligned with the cache line,
the maintenance of each descriptor can't be guarantee by a simple cache
line operation: flush or invalid.
To avoid all the maintenance issues, these descripto need to be allocated
in a NOT CACHEABLE memory, allocated by noncached_alloc() when
CONFIG_SYS_NONCACHED_MEMORY is enable.
This patch don't change the current behavior when the descriptor
can be cache-aligned with the filed "Descriptor Skip Length" of
the DMA channel control register, when eqos->desc_pad = true.
Change-Id: Iada23492743e3af977e07c1f1b8c2f32550436f7
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236650
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Christophe ROULLIER <christophe.roullier@st.com>
In clk_clean_rate_cache, clk->rate should update the private clock
struct when CCF is activated to save the cached rate value.
When clk_get_parent_rate is called, the cached information
is read from pclk->rate, with pclk = clk_get_parent(clk)
which use dev_get_clk_ptr() to access to private data.
As the cached is read from private clk data, the update should
be done also on it.
Series-cc: Tero Kristo <t-kristo@ti.com>
Series-cc: Tero Kristo <kristo@kernel.org>
Fixes: 6b7fd3128f ("clk: fix set_rate to clean up cached rates for the hierarchy")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ifa06360115ffa3f3307372e6cdd98ec16759d6ba
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236864
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Some I/Os are connected to ADC input channels, when the corresponding bit
in PCSEL register are set on STM32H7 and STM32MP15.
PCSEL shouldn't be let enabled when VDDA supply is disabled, to avoid
current leakage. This may occur if the kernel disable the VDDA supply
of the ADC, while the PCSEL remains set, after leaving U-boot.
Clear PCSEL bits after each end of conversion, when relevant, to
prevent this case.
Change-Id: I147f128cd67392220a8924cf407bcdae0e1eb555
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/233126
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Add smart calibration support for STM32MP1.
- STM32MP15x: both linear & offset calibration are supported
- STM32MP13x: Only offset calibration is supported
Linear calibration:
Linear calibration is SoC dependent and does not change over
time. As it is time consuming, do it only once.
Restore calibration data from environment variable to save time.
If no calibration data are found in u-boot environment variables
run a new calibration.
Offset calibration:
This calibration is fast and may vary over time.
Run offset single-ended and differential calibration on each boot.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Change-Id: If8739d96e019d42341901c5da6a83925cc78333a
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/231628
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Before relying on u-boot,force-b-session-valid property presence to set
force_b_session_valid field, use typec_get_driver_from_usb() which check
if a Type-C connector is present. In this case invoke typec_get_data_role()
which indicates if current data role is DEVICE or HOST.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I3dc5da0c332c5b557a855564985317345d25458f
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/232354
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
The typec_get_driver_from_usb() allows to retrieve a Type-C device from
an USB device.
typec_get_driver_from_usb() checks in USB device node for port and endpoint
sub-node, if exist, retrieve the connector node, probe the associated
Type-C device and return it.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: If564cdf463f3915bec26f17a4717c9ab9d42f692
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/232353
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Implement a minimal UCSI uclass which allows to send request
to UCSI compatible chip. It provides the read() and write() ops.
It offers 3 services:
- ucsi_is_attached() which informs if Type-C connector is attached
or not.
- ucsi_get_data_role() which informs if the Type-C controller acts
as Device or host.
- usci_get_nb_connector() which indicates how many connector are
managed.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I319cf1f49b0980d33e2b47f1b14a513eb4466da5
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/232349
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Remove TYPEC_STUSB160X config from board/st/common/Kconfig
before introduction of real stusb160x Type-C driver.
This will avoid the following Kconfig warning:
drivers/usb/typec/Kconfig:15:warning: ignoring type redefinition of 'TYPEC_STUSB160X' from 'tristate' to 'bool'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ia464dcc7e1b5e3c6e8c8ccd8c3ac84d858ae8588
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/232344
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Update the Linux kernel device tree to support boot with TF-A SP-MIN and
without OP-TEE on STM32MP15 platform.
By default the Linux kernel have OP-TEE nodes, including the SCMI agent,
to support the boot with OP-TEE, the default supported boot mode.
For the TF-A SP-MIN support, the OP-TEE nodes need to be dynamically
updated, including the reserved memory and the SCMI agent nodes.
This patch allows to support this legacy mode, boot with TF-A SP-MIN as
secure monitor and without OP-TEE, with the latest device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I6ba5eb92850869ab08d5c09bf119089fb283a4a8
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/228518
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236082
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Change the mask of OTP0 used to close the device on STM32MP
- STM32MP15x: bit 6 of OPT0
- STM32MP13x: 0b111111 = 0x3F for OTP_SECURED closed device
And support the 2 keys for STM32MP13x
- PKHTH : Hash of the 8 ECC Public Keys Hashes Table
(ECDSA is the authentication algorithm)
- EDMK : Encryption/Decryption Master Key
Change-Id: I1431827b62d294343069ff0aa7e59abaacb8bdd5
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/230109
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/242599
Update the command stm32key to support several keys selected by
key name and managed by the new sub-command:
stm32key list
stm32key select [<key>]
stm32key read -a
This patch don't change the STM32MP15 behavior, only PKH is supported,
but it is a preliminary patch for STM32MP13 support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic9d9cb1cf9d05b9e305f158b26076cf908d7c0b8
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/230108
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk
device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: If62e8c985dd17697c445e229f7375013b22a8c0d
Add support for new compatible "st,stm32mp13-ddr" to manage the
DDR sub system (Controller and PHY) in STM32MP13x SOC:
- only one AXI port
- support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)
The STM32MP15x SOC have 2 AXI ports and 32 bits support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3c50158401b3eb022059c7394e48980af23b9582
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/195458
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Add support for "st,stm32mp135-pinctrl" for STM32MP13x
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ie30eda7a5fb54abc98f89edeee53932bef15a09f
Add sub Kconfig for each SOC in the STM32 CPU family.
It is a preliminary step to introduce a new SOC in the STM32MP family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I90e6955a55b1eea31e8a17d216eb9bdd76332f5d
# Conflicts:
# arch/arm/mach-stm32mp/Kconfig
Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c
when low level init without TFABOOT is supported.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ia90133663740dcf00ee2799a01f92f2acee683da
The SPL is only supported by STM32MP15x not by all the
SOC with STM32MP arch.
Only TFABOOT is supported in next products.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Iea6a315c629bbbb6cbc18889a2207a465acb9bcc
Remove unnecessary nodes for TFABOOT and move the mandatory part
in SOC dtsi. This patch allow to include stm32mp15-ddr.dtsi only if
it is needed, when TFABOOT is not defined
Change-Id: I1dd8baddc1f804ccab03ffa99bb5b33c924ab07a
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the counter of the PLL user n_pll_cons managed by the 2 functions
stm32_usbphyc_pll_enable / stm32_usbphyc_pll_disable.
This counter allow to remove the function stm32_usbphyc_is_init
and it is a preliminary step for ck_usbo_48m introduction.
Change-Id: I15bd7c3c8c983d6a6cec3d2ee371d75fe72fcd41
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/195028
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Add property regulator-supply for SCMI regulator nodes to define
a supply needed by the related SCMI regulator. On regulator enable, the
supply is enabled but on regulator disable, the supply is left as is
since U-Boot regulator class does not make any reference counting on
enable/disable requests.
Add sandbox test for scmi voltage regulators supply regulator
dependencies.
Change-Id: Ica4baa246dd49c3a0d9fa0951ff19dc2b1894f5a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/194456
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Allow DT to define the voltage domain name (new string property
voltd-name) instead of the voltage domain ID from property reg.
This change makes SCMI regulators binding more flexible between
SCMI server and U-Boot SCMI agent.
Change-Id: I8e1cbd0745bf61d00238eb1d13ff73ff99920b38
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/194453
For trusted boot, STM32MP1 need to use SMC to access PWR secure
resources.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I65c85d36be51d381c6b95a795f4d589986c01cb3
As the RNG device is secured by default with OP-TEE, only accessible with
the RNG TA, the CONFIG_RNG_OPTEE need to activated for STM32MP15 targets
with OP-TEE support.
CONFIG_RNG_STM32MP1 is not deactivated in the STM32MP15 defconfig,
so the device tree with RNG not secured are still supported ,
when the associated node is activated:
&rng1 {
status = "okay";
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I0782b2e4122e700b562bf2149fa3668e82a15b24
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/241702
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@foss.st.com>
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vbus supply. This way the driver doesn't see an error
when disabling an always-on regulator.
This patch is needed for STM32MP157C-DK2 board with the always-on
regulator v3v3: buck4 used as the phy vbus supply in kernel device tree:
&usbphyc_port0 {
...
/*
* Hack to keep hub active until all connected devices are suspended
* otherwise the hub will be powered off as soon as the v3v3 is disabled
* and it can disturb connected devices.
*/
connector {
compatible = "usb-a-connector";
vbus-supply = <&v3v3>;
};
};
Without this patch the command "usb stop" failed and the next command
"usb start" cause a crash.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Iff08cf94aa6c6d3678acb28a8dd012d466184b42
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/237035
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Tested-by: Patrice CHOTARD <patrice.chotard@foss.st.com>
Resync defconfig with tools/moveconfig.py
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ib2c04b92e1c8009d55f850efff59b927d0426da2
Device tree alignment with Linux kernel v5.17-rc1
- ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins
on STM32MP15 DKx boards
- ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15
- ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx
- ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1
- ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
[Backport of commit 182738fe2f ("arm: dts: stm32mp15: alignment
with v5.17")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I31f8fb35304486855af3da479195f839c83f195d
Add support of the permanent lock support in U-Boot proper
when BSEC is not managed by secure monitor (TF-A SP_MIN or OP-TEE).
This patch avoid issue with stm32key command and fuse command
on basic boot for this missing feature of U-Boot BSEC driver.
[Backport of commit 0c20f53b3f ("stm32mp: bsec: add permanent
lock write support")]
Reported-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ieeaf41663269419a8dd8a97d43e860dff3bb39ff
The function clk_lookup can be replaced by a direct call
to uclass_get_device_by_name for UCLASS_CLK.
This patch removes duplicated codes by the generic DM API and avoids
issue in clk_lookup because result of uclass_get_device wasn't tested;
when ret < 0, dev = NULL and dev->name is invalid, the next function
call strcmp(name, dev->name) causes a crash.
[Backport of commit afcc26140b ("cmd: clk: replace clk_lookup by
uclass_get_device_by_name")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20220131172131.2.I7bc7762eff1e31ab7ff5b34c416ee03b8fe52200@changeid
Change-Id: I7bc7762eff1e31ab7ff5b34c416ee03b8fe52200
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/237053
Test the number of argument in setfreq command to avoid a crash when
the command setfreq is called without argument:
STM32MP> clk setfreq
data abort
pc : [<ddba3f18>] lr : [<ddba3f89>]
reloc pc : [<c018ff18>] lr : [<c018ff89>]
sp : dbaf45b8 ip : ddb1d859 fp : 00000002
r10: dbb3fd80 r9 : dbb11e90 r8 : ddbf38cc
r7 : ddb39725 r6 : 00000000 r5 : 00000000 r4 : dbb3fd84
r3 : dbb3fd84 r2 : 0000000a r1 : dbaf45bc r0 : 00000011
Flags: nzCv IRQs off FIQs off Mode SVC_32 (T)
Code: 4dd3 1062 85a3 ddbd (7803) 2b30
Resetting CPU ...
[Backport of commit 3386fb1e48 ("cmd: clk: test the number
of argument in setfreq command")]
Fixes: 7ab418fbe6 ("clk: add support for setting clk rate from cmdline")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220131172131.1.I32a8f213d330dccd922f7aafc60d3d63fcbe8615@changeid
Change-Id: I32a8f213d330dccd922f7aafc60d3d63fcbe8615
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/237052
It is safe to check if the uclass id on the device is UCLASS_CLK
before to call the clk_ functions, but today this comparison is
not done on the device used in API: clkp->dev->parent
but on the device himself: clkp->dev.
This patch corrects this behavior and tests if the parent device
is a clock device before to call the clock API, clk_enable or
clk_disable, on this device.
[Backport of commit b0cdd8287a ("clk: ccf: correct the test on the
parent uclass in clk_enable/clk_disable")]
Fixes: 0520be0f67 ("clk: prograte clk enable/disable to parent")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/235901
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Change-Id: Ic9cd1563aac729132cadae8c5df372be1a49ecc7
The original purpose of mtd_erase_callback() in Linux at the time it was
imported to U-Boot, was to inform the caller that erasing is done (since
it was an asynchronous operation).
All supplied callback methods in U-Boot do nothing, but the
mtd_erase_callback() function was (until previous patch) grossly abused
in U-Boot's mtdpart implementation for completely different purpose.
Since we got rid of the abusement, remove the mtd_erase_callback()
function and the .callback member from struct erase_info entirely, in
order to avoid such problems in the future.
[Backport of commit 0d1ecc99cb ("mtd: Remove mtd_erase_callback()
entirely")]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I375d1c8bc77b0c21f91f94b7d3cd9b000ed4fddc
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/244490
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
The _erase() method of the mtdpart driver, part_erase(), currently
implements offset shifting (for given mtdpart partition) in a weird way:
1. part_erase() adds partition offset to block address
2. parent driver's _erase() method is called
3. parent driver's _erase() method calls mtd_erase_callback()
4. mtd_erase_callback() subtracts partition offset from block address
so that the callback function is given correct address
The problem here is that if the parent's driver does not call
mtd_erase_callback() in some scenario (this was recently a case for
spi_nor_erase(), which did not call mtd_erase_callback() at all), the
offset is not shifted back.
Moreover the code would be more readable if part_erase() not only added
partition offset before calling parent's _erase(), but also subtracted
it back afterwards. Currently the mtd_erase_callback() is expected to do
this subtracting since it does have to do it anyway.
Add the more steps to this procedure:
5. mtd_erase_callback() adds partition offset to block address so that
it returns the the erase_info structure members as it received them
6. part_erase() subtracts partition offset from block address
This makes the code more logical and also prevents errors in case
parent's driver does not call mtd_erase_callback() for some reason.
(BTW, the purpose of mtd_erase_callback() in Linux is to inform the
caller that it is done, since in Linux erasing is done asynchronously.
We are abusing the purpose of mtd_erase_callback() in U-Boot for
completely different purpose. The callback function itself has empty
implementation in all cases in U-Boot.)
[Backport of commit a60397d219 ("mtd: mtdpart: Make mtdpart's _erase
method sane")]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Change-Id: I3361bf8715b32637de097eb8b79f2cde81d902de
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/244489
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
The spi_nor_erase() function does not call mtd_erase_callback() as it
should.
The mtdpart code currently implements the subtraction of partition
offset in mtd_erase_callback().
This results in partition offset being added prior calling
spi_nor_erase(), but not subtracted back on return. The result is that
the `mtd erase` command does not erase the whole partition, only some of
it's blocks:
=> mtd erase "Rescue system"
Erasing 0x00000000 ... 0x006fffff (1792 eraseblock(s))
jedec_spi_nor spi-nor@0: at 0x100000, len 4096
jedec_spi_nor spi-nor@0: at 0x201000, len 4096
jedec_spi_nor spi-nor@0: at 0x302000, len 4096
jedec_spi_nor spi-nor@0: at 0x403000, len 4096
jedec_spi_nor spi-nor@0: at 0x504000, len 4096
jedec_spi_nor spi-nor@0: at 0x605000, len 4096
jedec_spi_nor spi-nor@0: at 0x706000, len 4096
This is obviously wrong.
Add proper calling of mtd_erase_callback() into the spi_nor_erase()
function.
[Backport of commit ff0000b47d ("mtd: spi-nor-core: Call
mtd_erase_callback() from spi_nor_erase()")]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reported-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Change-Id: I7e16c0664ff5d175e3dfe0947a0647b1778156db
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/244487
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Check for zero length in the legacy spi_flash_read() /
spi_flash_write() / spi_flash_erase() functions.
On zero length, return 0 immediately, don't call the underlying method.
Rationale:
- these legacy functions call the _read(), _write() and _erase() methods
of struct mtd
- the DM callers of these methods already check for zero length
- making all callers of these methods check for zero length makes it
possible to remove the check from implementations of these _read(),
_write() and _erase() methods
[Backport of commit a67b3719f3 ("mtd: spi-flash: Check for zero
length in legacy spi_flash_*()")]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I2b587ef1357036f4307d75170c28c7d30cd647da
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/244485
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Updates sandbox SCMI clock driver and tests since enabling CCF will
mandate clock discovery that is all exposed SCMI clocks shall be
discovered at initialization. For this reason, sandbox SCMI clock
driver must emulate all clocks exposed by SCMI server, not only those
effectively consumed by some other U-Boot devices.
Therefore the sandbox SCMI test driver exposes 3 clocks (IDs 0, 1 and 2)
and sandbox SCMI clock consumer driver gets 2 of them.
Change-Id: If031596fa5d89d1286c892a654b443261516e80a
Series-links: 246809
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236343
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Changes devm_scmi_process_msg() first argument from target parent device
to current SCMI device and lookup the SCMI agent device among SCMI device
parents for find the SCMI agent operator needed for communication with
the firmware.
This change is needed in order to support CCF in clk_scmi driver unless
what CCF will fail to find the right udevice related to exposed SCMI
clocks.
This patch allows to simplify the caller sequence, using SCMI device
reference as parameter instead of knowing SCMI uclass topology. This
change also adds some protection in case devm_scmi_process_msg() API
function is called for invalid device type.
Change-Id: Ic79f2f736b772878a572f856981f3112d2677d7a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236333
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
As per DT bindings since Linux kernel v5.14, the device tree can define
only 1 SCMI agent node that is named scmi [1]. As a consequence, change
implementation of the SCMI driver test through sandbox architecture to
reflect that.
This change updates sandbox test DT and sandbox SCMI driver accordingly
since all these are impacted.
Change-Id: I642704049f6fe50bc13c5cd776250ee34efb570a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/236332
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
When OF_LIVE flag is enabled on a 64 bits platform, there is an
issue when dev_read_addr() is called and need to perform an address
translation using __of_translate_address().
In case of error, __of_translate_address() return's value is OF_BAD_ADDR
(wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff).
The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE
which is defined as (-1U) = 0xffffffff.
In this case the comparison is always false.
To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of
AARCH64. Update accordingly related tests.
[Backport of commit 9876ae7db6 ("dm: Fix OF_BAD_ADDR definition")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: I39eddb1dd012a892f57110722e6c87013f3591ca
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/237676
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@foss.st.com>
In DFU v1.1 specification [1] the DFU_UPLOAD (Short Frame)
is handled only in dfuUPLOADIDLE state:
- Figure A.1 Interface state transition diagram
- the state description in chapter A.2
A.2.3 State 2 dfuIDLE
on Receipt of the DFU_UPLOAD request,and bitCanUpload = 1
the Next State is dfuUPLOADIDLE
A.2.10 State 9 dfuUPLOAD-IDLE
When the length of the data transferred by the device in response
to a DFU_UPLOAD request is less than wLength. (Short frame)
the Next State is dfuIDLE
In current code, when an UPLOAD is completely performed after the first
request (for example with wLength=200 and data read = 9), the DFU state
stay at dfuUPLOADIDLE until receiving a DFU_UPLOAD or a DFU_ABORT request
even it is unnecessary as the previous DFU_UPLOAD request already reached
the EOF.
This patch proposes to finish the DFU uploading (don't go to dfuUPLOADIDLE)
and completes the control-read operation (go to DFU_STATE_dfuIDLE) when
the first UPLOAD response has a short frame as an end of file (EOF)
indicator even if it is not explicitly allowed in the DFU specification
but this seems logical.
[1] https://www.usb.org/sites/default/files/DFU_1.1.pdf
[Backport of commit 86b6a38863 ("dfu: handle short frame result of UPLOAD in state_dfu_idle")]
Change-Id: I1158bd6d095c996f2dbd4b0aa9327e4eee202331
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/206350
Reviewed-by: CITOOLS <MDG-smet-aci-reviews@list.st.com>
Add the partition name and remove the line number in error messages
of treat_partition_list() to provide correct information to user of
STM32CubeProgrammer.
The "line number" value was confusing because it is incorrect here;
the index in part_array[] is not aligned with the line number in
the parsed Layout file, because the empty lines and the lines beginning
by '#' are skipped during the first parsing in parse_flash_layout().
[Backport of commit 94e561f84a ("stm32prog: add partition name in treat_partition_list error messages")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ic9dd7501d7e1e832827438c6a94605cdfdb17f0b
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/232876
Solve compilation issue on undefined CONFIG_SYS_MMC_ENV_DEV when
CONFIG_ENV_IS_IN_MMC is deactivated on STMicroelectronics boards
defconfig
[Backport of commit 046bdb8064 ("board: stm32mp1: solve compilation issue when ENV_IS_IN_MMC is deactivated")]
Fixes: 9f97193616 ("board: stm32mp1: use CONFIG_SYS_MMC_ENV_DEV when available")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ied2e1c9b4790072658cbab4515ba8933878ce029
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/229109
MAX_SEARCH_PARTITIONS is the highest possible partition number.
Do not skip the last partition in board_get_alt_info_mmc().
[Backport of commit 6ddc71c13e ("stm32mp: fix board_get_alt_info_mmc()")]
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I2fd8cd4dd5f6a6e00166a11fc2ddfd0ae1a6df8d
Default value for CONFIG_SYS_BOOTCOUNT_SINGLEWORD and
CONFIG_SYS_BOOTCOUNT_ADDR are only needed when
CONFIG_BOOTCOUNT_GENERIC is used.
This patch avoids to define these configs when an other bootcount backend
is activated, for example for CONFIG_BOOTCOUNT_ENV.
[Backport of commit 5c68904fe1 ("stm32mp: correct the dependency for bootcount configs")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I6347e4b7268b9a30a04d597cd467fbcf8defd684
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/229111
Today the bootcount is not managed by the Linux kernel for STM32MP15 as
we don't have driver to update the used backup register in TAMP and the
recovery command still executes the normal bootcmd with
'altbootcmd=run bootcmd'.
So the bootcount feature is never used, the config CONFIG_BOOTCOUNT_LIMIT
and the associated environment variable 'altbootcmd' can be removed to
reduce the U-Boot size.
Each boards can re-enable this feature later in their defconfig, if it is
needed, with the expected backend, for example CONFIG_BOOTCOUNT_GENERIC
or CONFIG_BOOTCOUNT_ENV.
[Backport of commit d5e8119bae ("stm32mp: remove the bootcount activation")]
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Iafe36c0d5ba0a3fbd8016d9ae07ef5db77c553c7
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/229112
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.
This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.
[Backport of commit 560e1e0050 ("clk: define LOG_CATEGORY for generic and ccf clocks")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Change-Id: I7e1b337de95ed3ecef41dace307271e7a412c35c
Reorder include files in the U-Boot expected order:
the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.
It is a preliminary step for next patch.
[Backport of commit 572c446e98 ("clk: cosmetic: reorder include files")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Change-Id: I02f0f915095a8089745f18fb6146ec917ff4d1bd
This change implements an SCMI transport for agent interfacing the
OP-TEE SCMI service. OP-TEE provides an SCMI PTA (Pseudo-TA) for
non-secure world to send SCMI messages over an identified channel.
The driver implemented here uses a SMT shared memory for passing
messages between client and server.
The implementation opens and releases channel resources for each
passed SCMI message so that resources allocated (sessions) or
registered (shared memory areas) in OP-TEE firmware are released for
example before relocation as the driver will likely allocate/register
them back when probed after relocation.
The integration of the driver using dedicated config switch
CONFIG_SCMI_AGENT_OPTEE is designed on the model posted to the
U-Boot ML by Patrick Delaunay [1].
[Backport of commit 48108f3a6a ("firmware: scmi: Add OP-TEE transport")]
Link: [1] https://lore.kernel.org/all/20211028191222.v3.4.Ib2e58ee67f4d023823d8b5404332dc4d7e847277@changeid/
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I9c0b57b2546ca1f69f693ac3ae2cc75494f4377d
Introduce compatible "linaro,scmi-optee" for SCMI transport channel
based on an OP-TEE service invocation.
Define "linaro,optee-channel-id" property to identify the OP-TEE SCMI
channel used by the protocol(s). OP-TEE SCMI transport can either use
shared memory or a static shared memory buffer identified by the DT.
These bindings were posted to the Linux kernel DT bindings mailing list
and acked by maintainer [1].
[Backport of commit fcb41d4db2 ("dt-bindings: arm: scmi: OP-TEE as transport channel for SCMI messages")]
Link: [1] https://lore.kernel.org/linux-arm-kernel/20211029102118.GG6526@e120937-lin/T/
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Change-Id: I03756231fc4e44827847fcfa5da66e19591f4a29
Adds TEE_ERROR_SHORT_BUFFER as TEE error code. This error code is
commonly used by TEEs to inform caller that the buffer(s) it provided
is too small for the desired operation.
[Backport of commit 1442e9f330 ("tee: optee: define TEE error code TEE_ERROR_SHORT_BUFFER")]
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Change-Id: I25b093c117709e73f80266229261efd18f756eb4
Define identifiers for clnt_login field in struct tee_open_session_arg
based in GlobalPlatform Device TEE IDs and on the REE_KERNEL identifier
extension from OP-TEE OS.
[Backport of commit 1662ed0c1a ("tee: define session login identifiers")]
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Change-Id: I20fbe41122e8fd2dec48a67bc1f194e90804f952
Change SCMI smccc transport drivers to use platform data rather
than private data for channel reference since it only stores platform
data retrieved from the DT. Consequently the probe handler is replaced
with a of_to_plat handler.
[Backport of commit 3de5aef451 ("firmware: scmi: smccc transport: use plat data, not priv data")]
Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I6aa5778eea6819d032743ec641c932b966276ee2
Change SCMI mailbox transport drivers to use platform data rather
than private data for channel reference since it only stores platform
data retrieved from the DT. Consequently the probe handler is replaced
with a of_to_plat handler.
[Backport of commit 88a304f864 ("firmware: scmi: mailbox transport: use plat data, not priv data")]
Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ifdfefc6f8fd7ef24ad034cc652865161c0263674
Correct scmi mailbox probe function that can't free the scmi channel
instance since its auto-allocated by the device model framework.
[Backport of commit 7b4993907a ("firmware: scmi: mailbox transport: fix probe failure implementation")]
Cc: Simon Glass <sjg@chromium.org>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ied97ff5dbf4064456587b8fb40c920eeb140b933
Correct inline comment describing API function devm_scmi_process_msg().
[Backport of commit 5ddbbd1957 ("firmware: scmi: fix description of an API function")]
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I79fdb25f5f254e69484fb3a9458823a26aba26cb
Deactivate the SCMI agent mailbox which is not used on STM32MP15
platforms.
[Backport of commit 7f6743d4f8 ("stm32mp15: deactivate CONFIG_SCMI_AGENT_MAILBOX")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Change-Id: I25b78c7ff42419afa5facdad0cbf5e2ff2bde65e
Add two configs CONFIG_SCMI_AGENT_MAILBOX and CONFIG_SCMI_AGENT_SMCCC
to select the supported agents as all the agents are not supported.
[Backport of commit 73ead2bcc5 ("firmware: scmi: add configs to select the supported agents")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Change-Id: I5bd5db3cf3cc6dff9e6b5f00f6601e72e4565fca
Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit b7f060565e ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").
[Backport of commit c7c06fa776 ("board: stm32mp1: add support of nor1 device in dfu command")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ifa1206a0d08c00615e9482ea2fd911c30a5e1fdd
Since the commit f42045b2e7 ("stm32mp15: replace CONFIG_TFABOOT when
it is possible") the function stm32mp1_ddr_setup is always called so the
__maybe_unused can be removed.
[Backport of commit b2ac9645e6 ("ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ib33f5447856b8b4de40f0e723581f02622ecd2e6
Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.
This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.
[Backport of commit d72e7bbe7c ("ram: stm32mp1: compute DDR size from DDRCTL registers")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I0c0981faa0778c7033293fa0d6234469481b56c7
The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.
So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.
[Backport of commit e84ee40b0b ("configs: stm32mp15: deactivate the CONFIG_STM32_IPCC")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ie32fc26f389edf7bfbd9820263e260fa7d5008c2
Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.
These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.
See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml
[Backport of commit 8ad37e6f16 ("board: stm32mp1: enable simple framebuffer node for splashscreen")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I8a9c43da9cd49ac56f76da9903bdb1c1ab11c58e
Align the framebuffer size on MMU_SECTION_SIZE in kernel, = max 2MB for
LPAE for armV7, to avoid issue with the simple frame buffer activation,
when U-Boot add a reserved memory in the kernel device tree to preserve
the splash screen until Linux driver initialization.
See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml
[Backport of commit 6cdeb323b8 ("video: stm32: stm32_ltdc: align framebuffer on 2MB")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ifc2d836424147a9aeeb6cf82a019dc27404e658c
Add a new function to activate an existing simple frame buffer node
and add the associated reserved memory, with no-map properties.
This device tree update is only done when the video device is active
and the video buffer is used.
This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because
gd->video_bottom and gd->video_top are only defined when CONFIG_DM_VIDEO
is activated.
[Backport of commit 77debf61ef ("common: add fdt_simplefb_enable_and_mem_rsv function")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I88c09f1bf230a660894ccaa5cd01ff2a601867bb
Add the helper function video_is_active() to test if one video device
is active.
This function can be used in board code to execute operation
only when the display is probed / really used.
[Backport of commit 2e2e6d8cac ("video: Add video_is_active function")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ibe5144de9135347b4a6949af5ebe16a648fce689
Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned
with the associated file name fdt_simplefb.h/fdt_simplefb.c
[Backport of commit fded97adce ("common: rename functions lcd_dt_simplefb to fdt_simplefb")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Change-Id: I2e93578115e732921ff501244e6cc2c2d2bb2b53
Rename the file lcd_simplefb.c to fdt_simplefb.c to be aligned
with the configuration name and with the associated include file
./include/fdt_simplefb.h
[Backport of commit 4ca979e314 ("common: rename lcd_simplefb.c file to fdt_simplefb.c")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ie710ba4b30fcd1b63717bfd118265d831a609006
# Conflicts:
# common/Makefile
This converts the following to Kconfig:
CONFIG_LCD_DT_SIMPLEFB
This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in
common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO.
[Backport of commit d71587c2ab ("Convert CONFIG_LCD_DT_SIMPLEFB to Kconfig")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Change-Id: Ic2828ce2e8227f0aa65b5f3f98b3dcd44d972256
Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.
Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.
[Backport of commit b3c29dc9e5 ("stm32mp1: ram: remove tuning support")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Id6f8d515501c0cc1b2d3c036ada5da7a33d87a87
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.
The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.
This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
the optional parameter "st,phy-cal"
After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.
[Backport of commit 9819fe345c ("stm32mp1: ram: remove the support of calibration result")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I9bcea5f88b3cde5417ae2bbc3e288c16708b1515
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.
This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.
[Backport of commit 4831ba2903 ("stm32mp1: ram: add read valid training support")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I97b9564ad2e5f1895985eca090b0f712c4f19ff2
The uSD level translator on DHSOM and Avenger96 are optional, however it
is possible to auto-detect it. This is done by setting SD CMD line high,
and then testing whether signal level on CK line matches the signal level
on CKIN line. If so, the uSD level translator is present, otherwise it is
not populated.
[Backport of commit 77d043cac6 ("ARM: dts: stm32: Auto-detect DHSOM with uSD level translator")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ib7ef5a36fc0b4c26d1cf612ee6ed2868b2331360
Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.
The translator test sets CMD high to avoid interfering with a card, and
then verifies whether signal set on CK is detected on CKIN. If the signal
is detected, translator is present, otherwise the CKIN feedback clock are
disabled.
[Backport of commit 8e5266eefd ("mmc: stm32_sdmmc2: Add support for probing bus voltage level translator")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib066453bd287f4285f706bcc71d7d796dda72d3c
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.
[Backport of commit 312011e8e7 ("ARM: dts: stm32: Add custom PHY reset bindings on AV96")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I440f9be69a5db017d9add8acb7f96c1b8f8e1ea0
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.
[Backport of commit 525dd34535 ("ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id148ef10efdff753ddcbaed554cd903c89f920ab
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.
[Backport of commit 5e3e882cf2 ("ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I75b8ac110afb7c6c85694aeb57cba478b5f84615
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.
[Backport of commit 1aba8e51d8 ("ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I73f68f15dd4e42ab611d3edd89d4f2d265b2eb94
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.
This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.
[Backport of commit 15e20e4bdf ("ARM: stm32: Increase USB power-good delay on DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I228f832a4e5df6211aa73d79835b5fd91458abbe
Replace upper-case hex with lower-case hex for address.
[Backport of commit 0c6079c2a9 ("ARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ia6565b7738b0dbec3d7b43d31ec57f4775195ecf
Replace upper-case hex with lower-case hex for address.
[Backport of commit a2f823e49e ("ARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I543854127540bed5f9c905be106a0b0efa158cfd
Replace upper-case hex with lower-case hex for address.
[Backport of commit fbe6b99d96 ("ARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic613cc447da712ee0871f9d6ad5dbe811af01818
Replace upper-case hex with lower-case hex for address.
[Backport of commit e114ddc385 ("ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I10304aa255b1d00fdb47925c3f428e3e9805ff2f
Replace upper-case hex with lower-case hex for address.
[Backport of commit e447a18095 ("ARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: If48300f72c6c3eee681e954ce7de027bc912ac80
Replace upper-case hex with lower-case hex for address.
[Backport of commit 4aace3da3c ("ARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic8e4bb4976966d00c340e28c0f4e09f4f6c33112
Replace upper-case hex with lower-case hex for address.
[Backport of commit f1a3eb59c8 ("ARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsi")]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I7e04b4fa388f70b859e13b807dc4973ab69fd351
We should avoid #ifdef in C modules and the unused functions
are eliminated by the linker.
Use the more readable IS_ENABLE() instead.
[Backport of c8b2eef52b ("stm32mp15: tidy up #ifdefs in cpu.c")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I245a84f891205ff0de3d0dfdc915f554733d98a8
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced
by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.
This patch also simplifies the code in cpu.c, stm32mp1_ram.c and
clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and
without TFA) is not supported: the associated initialization code is
present only in SPL.
This cleanup patch is a preliminary step to support SPL load of OP-TEE
in secure world, with SPL in secure world and U-Boot in no-secure world.
[Backport of commit f42045b2e7 ("stm32mp15: replace CONFIG_TFABOOT
when it is possible")]
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: If632457b6024170f5096a19ab2a513e2b657162a
Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig
- always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI
and CONFIG_CPU_V7_HAS_NONSEC
- CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig
- the correct sysreset driver is activated in each defconfig:
CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON
[Backport of commit 17aeb589fa ("stm32mp15: remove configs
dependency on CONFIG_TFABOOT")]
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I2a6fc3736770ae75424203c835377c813d71d267
Currently the upper OTP (after 57) are shadowed in U-Boot proper,
when TFABOOT is not used.
This choice cause an issue when U-Boot is not executed after SPL,
so this BSEC initialization is moved in SPL and no more executed in U-Boot,
so it is still executed only one time.
After this patch this BSEC initialization is done in FSBL: SPL or TF-A.
To force this initialization in all the case, the probe of the BSEC
driver is forced in SPL in the arch st32mp function: spl_board_init().
Even if today BSEC driver is already probed in STM32MP15x clock driver
clk_stm32mp1.c because get_cpu_type() is called in
stm32mp1_get_max_opp_freq() function.
[Backport of commit 9788708f03 ("arm: stm32mp: bsec: Update OTP shadow
registers in SPL")]
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ib7e4b1ed806bc7c308f0e36f608a4e6e082e2446
The DHSOM uses different SPI NOR layout than the ST devkit, stop
pulling in the ST specific runtime mtdparts settings and adjust
the mtdparts accordingly.
[Backport of commit 819408d001 ("ARM: stm32: Align mtdparts
with SPI NOR layout on DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ib45f116308edf11d4a16f071cabad8c9c7f3b5e4
The video output support is unused and disabling it saves about 20 kiB of space.
In case video output support is required, it can be re-enabled.
[Backport of commit d59c65817c ("ARM: stm32: Disable video output on
DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I20d1657e24b75d69e6fb30e456c4f9028c24f367
Increase default SPI NOR bus frequency from 1 MHz to 50 MHz and
enable SFDP parsing to obtain more accurate SPI NOR configuration.
[Bckport of commit 848da6f17a ("ARM: stm32: Increase default SF bus
frequency to 50 MHz and enable SFDP")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I1b8c40c7da07055e014f49ebfed2c9a1aeb9d5b2
The nWP GPIO hog was used to unlock the SPI NOR write protect when U-Boot
used to operate the SPI NOR in 1-1-1 mode. Now that the SPI NOR is operated
in 1-1-4 mode, the hog has adverse effects and causes transfer corruption,
since the hogged pin is also the IO2 pin. Remove the hogs.
[Backport of commit eb319d8795 ("ARM: dts: stm32: Drop nWP GPIO hog on
DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I41090745edccc41a94be8407c3a40e221db8c2b0
All the STM32MP1 based DHSOM have SPI NOR from which they boot,
enable DFU_MTD support to make it possible to expose that SPI NOR
via the DFU.
[Backport of commit c5eb35651c ("ARM: stm32: Enable DFU MTD
support on DHSOM")]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ib6dc42c88258be1b32709715176b1009be91c14d
The stm32 gpio driver private data are not needed in arch include files,
they are not used by code except for stm32 gpio and pincontrol drivers,
using the same IP; the defines for this IP is moved in a new file
"stm32_gpio_priv.h" in driver/gpio.
This patch avoids to have duplicated file gpio.h for each SOC
in MPU directory mach-stm32mp and in each MCU directory arch-stm32*
and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32.
[Backport of commit 56a368f661 ("gpio: stm32: create include file for
driver private data")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Icc59387789a4f725f3d325cda49777939ee543ff
Add a configuration file "stm32mp15_st_common.h" to handle the
STMicroelectronics boards configuration and rename stm32mp1.h to
"stm32mp15_common.h" to handle the generic STM32MP15x series configuration.
The configuration file "dh_stm32mp1.h" is also renamed to
"stm32mp15_dh_dhcom" for the configuration of board based on the
dhelectronics STM32MP15x SOM.
In the STMicroelectronics board configuration the default bootcmd
"bootcmd_stm32mp" is updated to only select the extlinux file found on
SD-Card on STM32MP15x EV1 for boot from NOR device.
[Backport of commit c67ca25dfc ("board: stmp32mp1: split board and
SOC STM32MP15 configuration")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I11ee472d24587efa9d87d62adac7158d52270ecb
Device tree alignment with Linux kernel v5.15-rc6
- Set {bitclock,frame}-master phandles on ST DKx
- Add coprocessor detach mbox on stm32mp15x-dkx boards
- Add coprocessor detach mbox on stm32mp157c-ed1 board
[Backport of commit 784c567317 ("arm: dts: stm32mp15:
alignment with v5.15-rc6")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Iac649e9023f13d9144d71a85f4c368a700b9c35f
Use binman to add the stm32image header on SPL binary for basic boot
or on U-Boot binary when it is required, i.e. for TF-A boot without FIP
support, when CONFIG_STM32MP15x_STM32IMAGE is activated.
The "binman" tool is the recommended tool for specific image generation.
This patch allows to suppress the config.mk file and it is a preliminary
step to manage FIT generation with binman.
The init_r parsing of U-Boot device tree to search the binman
information is not required for STM32MP15, so the binman library
can be removed in U-Boot (CONFIG_BINMAN_FDT is deactivated).
[Backport of commit 5564b4cd4d ("stm32mp: add binman support for
STM32MP15x")}
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: I8e1d20c718b55731b73aa22758a87777df9ece40
The missing trailing newline could confuse check-config.sh if the
definition of an option was on the first line of the next file that
find(1) happened to return.
[Backport of commit 3067971aa9 ("stm32mp: stm32prog: Normalise
newlines")]
Signed-off-by: William Grant <wgrant@ubuntu.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I91077773b31a501da49029c26a0c870cf2934457
Correct the test on RNG device presence,when ret is equal to 0,
before to call dm_rng_read function.
Without this patch the RNG device is not used when present (when ret == 0)
or a data abort occurs in dm_rng_read when CONFIG_DM_RNG is activated but
the RNG device is not present in device tree (ret != 0 and devp = NULL).
[backport of commit 70a9f4d25b ("lib: uuid: fix the test on RNG device presence")]
Fixes: 92fdad28cf ("lib: uuid: use RNG device if present")
CC: Matthias Brugger <mbrugger@suse.com>
CC: Torsten Duwe <duwe@suse.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: I98a420a5666428a3c4737db51d3f9c31d64c66b5
Use dev_ function to support a live tree.
[backport of commit c3ef4550a2 ("reboot-mode: migrate uclass to livetree")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: Ibe70e88c973d8143ade654e2c36374769af904a9
Use dev_ function to read the sides and colour to support a live tree.
[backport of 455f2d15bf ("demo: migrate uclass to livetree")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: I0606a98b64d33f5cc04cf034ea789a1369751050
Use dev_ function to read the name and boolean to support a live tree.
[backport of e2170c29ee ("remoteproc: migrate uclass to livetree")]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: Id5c36114a6fb293d3b00bb9b9b5f5ca4ad6201f4
This is needed for new gadget binding test.
[Backport of 299f12508b - configs: sandbox: add USB_ETHER and GADGET_DOWNLOAD gadget support]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: I4b0b1e65cfd81da9e7143e19792317981bfa36ec
Add usb_gadget_handle_interrupts(), usb_gadget_register_driver()
and usb_gadget_unregister_driver() to be able to test
binding usb gadget.
[Backport of 4c3dc6f69a - usb: sandbox: Add gadget callbacks]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: Ib39d14124de9f732e4a781f9cb837ef090c99d21
Add an entry in usb_gadget_controller_number() for the DWC2
gadget controller. It is used to bind the USB Ethernet driver.
[Backport of 9d591106dc - usb: gadget: Add bcdDevice for the DWC2 USB Gadget Controller]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Change-Id: I47e828b813f4bedbd1abcda4123c74e8ad948f7d
Fix a regression brings by commit 84f8e36f03 ("cmd: bind: allow to
bind driver with driver data")
As example, the following bind command doesn't work:
bind /soc/usb-otg@49000000 usb_ether
As usb_ether driver has no compatible string, it can't be find by
lists_bind_fdt(). In bind_by_node_path(), which called lists_bind_fdt(),
the driver entry is known, pass it to lists_bind_fdt() to force the driver
entry selection.
For this, add a new parameter struct *driver to lists_bind_fdt().
Fix also all lists_bind_fdt() callers.
[Backport 38f7d3b653 - cmd: bind: Fix driver binding on a device]
Fixes: 84f8e36f03 ("cmd: bind: allow to bind driver with driver data")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change-Id: I35308ad4f058bcd7c7ef1c13995f2345ea84281d
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb492 ("gpio: fixes for gpio-hog support").
And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.
[Backport of 089e433e56 - board: dh_stm32mp1: Remove gpio_hog_probe_all() from board]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8a8678312ecc1d895f65a1920b4e104a8c01acfe
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb492 ("gpio: fixes for gpio-hog support").
And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.
[Backport of d901d76eca - board: stm32mp1: Remove gpio_hog_probe_all() from board]
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I5ff512461a7519711510aeb095843058e3106d1e
Compute i2cclk only one time in stm32_i2c_compute_timing()
and remove setup parameter (accessible in i2c_priv).
[Backport of c31cf40096 - i2c: stm32f7: compute i2cclk only one time]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I412ffcccca13d02279d1afd07858e7978148c9b8
Add the support for the i2c-digital-filter binding, allowing to enable
the digital filter via the device-tree and indicate its value in the DT
[Backport of 6338b45888 - i2c: stm32f7: add support for DNF i2c-digital-filter binding]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I22fa0da0fe8094f186ead52a1b86340c69761452
The digital filter related computation are present in the driver
however the programming of the filter within the IP is missing.
The maximum value for the DNF is wrong and should be 15 instead of 16.
[Backport of 6bbb14f018 - i2c: stm32f7: fix configuration of the digital filter]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Ic658478dbd4429fba573d7ce55ab1c29ea91270a
Today all the I2C instance point on the same global
variable stm32_i2c_setup according the compatible: i2c_priv->setup =
pointer to the same driver data.
This patch changes this driver data (stm32f7_setup and stm32mp15_setup)
to a const struct and move the timing struct 'setup' as element of i2c
privdata, initialized in stm32_ofdata_to_platdata() with the driver
configuration data.
This patch solves issues when several I2C instance have not the same
clock source or not the same configuration: each timing setup is saved
is the I2C privdata.
[Backport of 1fd9eb68d6 - i2c: stm32f7: move driver data of each instance in a privdata]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Idb7021619fb0d48e7640b76add671ff632b94c1b
Remove the following STV0991 specific configs:
- CONFIG_STV0991 (never used, only defined in CONFIG_SYS_EXTRA_OPTIONS)
- CONFIG_STV0991_HZ (replaced by generic CONFIG_SYS_HZ)
- CONFIG_STV0991_HZ_CLOCK (replaced by generic CONFIG_SYS_HZ_CLOCK)
This patch allows to reduce the file config_whitelist.txt.
[Backport of 20a3969d33 - stv0991: remove specific CONFIG_STV0991 configs]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I2c6f378cb4451ca0656fdd13e8b1d6ad80a24074
Move CONFIG_BOOTCOMMAND defined in Kconfig in the board defconfig.
[Backport of c7f85e1f61 - stm32f429: move CONFIG_BOOTCOMMAND in defconfig]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I3e407f9bb293ff79063624d3af1b53fee504fd86
Using the tools moveconfig.py to move the following config in the
defconfig files:
CONFIG_USB_HOST_ETHER
CONFIG_USB_ETHER_ASIX
CONFIG_USB_ETHER_MCS7830
CONFIG_USB_ETHER_SMSC95XX
These option are already migrated since the commit f58ad98a62 ("usb: net:
migrate USB Ethernet adapters to Kconfig") and the commit ae3584498b
("usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig").
[Backport of 454994727d - configs: Move some usb config in defconfig]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ian Ray <ian.ray@ge.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I93bbf1290afc1697cce2f81f95525d649dcdc314
This converts the CONFIG_STM32_FLASH to Kconfig by using
tools/moveconfig.py
[Backport of cc30ea584e - Convert CONFIG_STM32_FLASH to Kconfig]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: Iea1500582ea1adca9151e281995a3dffc8af99dd
This reverts commit d5d726d3cc,
which breaks boards which ship with multiple SD/eMMC sockets.
This stm32mp1.h config is not used only by the ST reference
boards, but all the other STM32MP1 based boards in U-Boot, so
changes to this stm32mp1.h cannot break the other boards.
[Backport of 2d0808161b - Revert "configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp"]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id325a1b031cec2799bc4a95e116386ea9f05cec3
Add protection on presence and order of the phy node sub node
by using the mandatory reg information.
[Backport of 5d81616fb8 - phy: stm32-usbphyc: stm32: usbphyc: add protection on phy sub-node]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I9a7a100a92bbd681c6fcc3802b1b4a1b71158210
The vbus-supply is an optional property of sub-node connector node.
and no more in the usb phyc node (in first proposed binding).
This regulator for USB VBUS may be needed for host mode.
See the latest kernel binding for details in
Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml.
usbphyc_port0: usb-phy@0 {
reg = <0>;
phy-supply = <&vdd_usb>;
#phy-cells = <0>;
connector {
compatible = "usb-a-connector";
vbus-supply = <&vbus_sw>;
};
};
[Backport of 5b4fa85d65 - phy: stm32-usbphyc: use connector for vbus-supply with phy-stm32-usbphyc]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change-Id: I00aea12bfe61c5752abfa692e93d66b3e2e1eedf
The stm32 platforms never had to support an ATAGs-based Linux Kernel,
so remove the bi_boot_params initialization.
[Backport of e69c4143e8 - board: stm32: Remove the bi_boot_params initialization]
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Change-Id: Ibc6a52313fd69f391abddc9d2c2cb0e20bf4d2d0
Both dummy.nbytes and dummy.buswidth may be zero. By not checking
the later, it is possible to trigger division by zero and a crash.
This does happen with tiny SPI NOR framework in SPL. Fix this by
adding the check and returning zero dummy bytes in such a case.
Fixes: 38b0852b0e ("spi: cadence-qspi: Add support for octal DTR flashes")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
[trini: Drop Pratyush's RB as his requested changes weren't made as
Marek disagreed]
Rebuild our current docker image so that ca-certificates will be updated
and Let's Encrypt issued certificates will work again.
Signed-off-by: Tom Rini <trini@konsulko.com>
XHCI firmware upload must be performed only once after initializing the
PCI bridge. This fixes USB stack initialization after calling "usb stop;
usb start" on Raspberry Pi 4B.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The @suse.de address doesn't exist anymore. Update it to something not
dependent on my workplace.
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
During the migration to a single DTSI for the CP110-s specific pinctrl
compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics.
Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting
the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect
the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor.
So, the mvebu-pinctrl driver check specifically for the
"marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit.
Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl"
for CP0 and "marvell,8k-cps-pinctrl" for the CP1.
This is obviously incorrect as the pinctrl driver does not know about these.
So fix the regression by applying correct compatibles to the DTSI.
Regression found and tested on the Puzzle M801 board.
Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
- Reintroduce creating internally the "nor%d" style names, in order to
fix some use U-Boot use-cases involving the "mtd" command.
- Fix a regression over the default SPI bus mode shown by having the
compiled default actually start being used. The correct default here
is 0.
- Fix ethernet on imx7d-sdb
- Fix a regression with MTD NAND devices when OF_LIVE is enabled
Commit 0d52bab46 (mx7dsabre: Enable DM_ETH) changed these flags from 0
(aka GPIO_ACTIVE_HIGH) to GPIO_ACTIVE_LOW. It claimed to "Also sync
device tree with v5.5-rc1", but in the linux tree, these gpios have
always been GPIO_ACTIVE_HIGH ever since this node was introduced
around v4.13 (linux commit 184f39b5).
I'm guessing that the reason for the GPIO_ACTIVE_LOW was to work
around the behaviour of the soft-spi driver back then, which
effectively defaulted to spi-mode 3 and not 0. That was arguably a bug
in the soft-spi driver, which then got fixed in 0e146993bb (spi: add
support for all spi modes with soft spi), but that commit then broke
ethernet on this board.
Fix it by setting the gpios as active high, which as a bonus actually
brings us in sync with the .dts in the linux source tree.
Without this, one gets
Net: Could not get PHY for FEC0: addr 0
No ethernet found.
With this, ethernet (at least ping and tftp) works as expected from
the U-Boot shell.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Joris Offouga <offougajoris@gmail.com>
Cc: "Christian Bräuner Sørensen" <yocto@bsorensen.net>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.
For doing this, node parameter type must be ofnode.
First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().
So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Force the mtd name of spi-nor to "nor" + the driver sequence number:
"nor0", "nor1"... beginning after the existing nor devices.
This patch is coherent with existing "nand" and "spi-nand"
mtd device names.
When CFI MTD NOR device are supported, the spi-nor index is chosen after
the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
is replaced by to cfi_flash_num_flash_banks in the include file
mtd/cfi_flash.h.
This generic name "nor%d" can be use to identify the mtd spi-nor device
without knowing the real device name or the DT path of the device,
used with API get_mtd_device_nm() and is used in mtdparts command.
This patch also avoids issue when the same NOR device is present 2 times,
for example on STM32MP15F-EV1:
STM32MP> mtd list
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
total 64 MiB
List of MTD devices:
* nand0
- type: NAND flash
- block size: 0x40000 bytes
- min I/O: 0x1000 bytes
- OOB size: 224 bytes
- OOB available: 118 bytes
- ECC strength: 8 bits
- ECC step size: 512 bytes
- bitflip threshold: 6 bits
- 0x000000000000-0x000040000000 : "nand0"
* mx66l51235l
- device: mx66l51235l@0
- parent: spi@58003000
- driver: jedec_spi_nor
- path: /soc/spi@58003000/mx66l51235l@0
- type: NOR flash
- block size: 0x10000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "mx66l51235l"
* mx66l51235l
- device: mx66l51235l@1
- parent: spi@58003000
- driver: jedec_spi_nor
- path: /soc/spi@58003000/mx66l51235l@1
- type: NOR flash
- block size: 0x10000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "mx66l51235l"
The same mtd name "mx66l51235l" identify the 2 instances
mx66l51235l@0 and mx66l51235l@1.
This patch fixes a ST32CubeProgrammer / stm32prog command issue
with nor0 target on STM32MP157C-EV1 board introduced by
commit b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when
DM is enabled").
Fixes: b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR]
Signed-off-by: Tom Rini <trini@konsulko.com>
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated,
CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks,
but this variable is defined in drivers/mtd/cfi_flash.c, which is
compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot
or in SPL when CONFIG_SPL_MTD_SUPPORT is activated.
This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT
when flash cfi driver is not activated to avoid compilation issue in
the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In commit b24bb99d cp110 configuration initially done in u-boot
was removed and delegated to atf firmware as smc call.
That commit didn't account for later introduced in d13b740c SATA invert polarity support.
This patch adds support of passing SATA invert polarity flags to atf
firmware during the smc call.
Signed-off-by: Denis Odintsov <shiva@mail.ru>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
After getting MTD device via get_mtd_device_nm(), we need to put it with
put_mtd_device(), otherwise we get
Removing MTD device #0 (mx25l6405d) with use count 1
before booting kernel.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
TCG EFI Protocol Specification defines the number_of_algorithms
field in spec ID event to be equal to the number of active
algorithms supported by the TPM device. In current implementation,
this field is populated with the count of all algorithms supported
by the TPM which leads to incorrect spec ID event creation.
Similarly, the algorithm array in spec ID event should be a variable
length array with length being equal to the number_of_algorithms field.
In current implementation this is defined as a fixed length array
which has been fixed.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
CC: Masahisa Kojima <masahisa.kojima@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The devicetree binding files are in their own directory and use a simple
text format. Add a link for the binding for the /config node, since it
is otherwise hard to find.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since Albert Aribaud is not maintaining anymore the LaCie Ethernet Disk
mini V2 board, then I am taking over.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr
support").
Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
I am taking over responsibility for the GE board from Sebastian Reichel.
Updating the MAINTAINERS files to reflect this.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
As the lastest spear directories are removed, delete the associated entry
in the MAINTAINERS file:
- arch/arm/cpu/arm926ejs/spear/
- arch/arm/include/asm/arch-spear/
Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Output like the following is quite irritating:
=> bootefi hello
Scanning disk mmc2.blk...
No valid Btrfs found
Bad magic number for SquashFS image.
** Unrecognized filesystem type **
Scanning disk mmc1.blk...
No valid Btrfs found
Bad magic number for SquashFS image.
** Unrecognized filesystem type **
Scanning disk mmc0.blk...
No valid Btrfs found
Bad magic number for SquashFS image.
** Unrecognized filesystem type **
Albeit a whole disk may be formatted with a filesystem in most cases
a partition table is used and the whole disk (partition number 0) doesn't
contain a filesytem. Some partitions may only contain a blob. Not seeing a
filesytem on the whole disk or on any partition is only worth a debug
message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Our mailmapper script required Python 2 which is no longer maintained.
A main difference when converting to Python 3 is that byte strings are not
character strings. So add conversion and skip over conversion errors.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tpm test cases relies on tpm device setup. Provide an environment
variable "env__tpm_device_test_skip = True" to skip the test case
if tpm device is not present.
Only needed will have to add variable to the py-test framework.
Test runs successfully even this variable is absent.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The KBUILD_BASENAME contains just the name of the compiled module,
in this case 'sequencer', rather than a full path to the compiled
file. Use it to prevent pulling the full path into the U-Boot binary,
which is useless and annoying.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
The SPI NOR bus mode is 0 on this system, update it accordingly.
Increase frequency to 40 MHz and enable SFDP parsing, since the
flashes on this system support that and it is a huge performance
improvement.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
This adds support for the DWC_sub31 controllers such as those
found on Apple's M1 SoC. This version of the controller
seems to work fine with the existing driver.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Allow using different PHY interfaces for multiple USB controllers. When no
value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay
compatible with current board configurations.
This also adds support for the HSIC mode of the i.MX7.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
The MXC_EHCI_MODE_ definitions are redundant. Replace MXC_EHCI_MODE_SERIAL
with the equivalent PORT_PTS_SERIAL.
Only the zmx25 platform is affected.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Pine H64 and Orange Pi 3 both provide a USB3 type A port.
Enable it in U-Boot.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some platforms, like the Allwinner H6, do not have a separate glue layer
around the dwc3. Instead, they rely on the clocks/resets/phys referenced
from the dwc3 DT node itself. Add support for enabling the clocks/resets
referenced from the dwc3 DT node.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Resetting an XHCI controller inside xhci_register undoes any register
setup performed by the platform driver. And at least on the Allwinner
H6, resetting the XHCI controller also resets the PHY, which prevents
the controller from working. That means the controller must be taken out
of reset before initializing the PHY, which must be done before calling
xhci_register.
The logic in the XHCI core was added to support the Raspberry Pi 4
(although this was not mentioned in the commit log!), which uses the
xhci-pci platform driver. Move the reset logic to the platform driver,
where it belongs, and where it cannot interfere with other platform
drivers.
This also fixes a failure to call reset_free if xhci_register failed.
Fixes: 0b80371b35 ("usb: xhci: Add reset controller support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This driver is needed for XHCI to work on the Allwinner H6 SoC. The
driver is copied from Linux v5.10.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Continue to use the "ssbl" name for GPT partition of secondary boot
stage = U-Boot for basic boot with SPL to avoid to disturb existing user.
The "fip" partition name is only used for TFA_BOOT with FIP, it is a TF-A
BL2 requirement; it the default configuration for STMicroelectronics
boards.
Fixes: b73e8bf453 ("arm: stm32mp: add defconfig for trusted boot with FIP")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
reset_*_bulk expects a real pointer.
Fixes: 4f7abafe1c ("driver: watchdog: reset watchdog in designware_wdt_stop() function")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This was unfortunately applied despite much discussion about it beiong
the wrong way to implement this feature.
Revert it before too many other things are built on top of it.
This reverts commit ddf67daac3.
Signed-off-by: Simon Glass <sjg@chromium.org>
With Device Manager firmware in an elf file form, we cannot load the FIT
image to the exact same address as any of the executable sections of the
elf file itself is located.
However, the device tree descriptions for the ARMV8 bootloader/OS
includes DDR regions only the final sections in DDR where the Device
Manager firmware is actually executing out of.
As the R5 uC is usually operating at a slower rate than an ARMv8 MPU,
by starting the Armv8 ahead of parsing the elf and copying the correct
sections to the required memories creates a race condition where the
ARMv8 could overwrite the elf image loaded from the FIT image prior to
the R5 completing parsing and putting the correct sections of elf in
the required memory locations. OR create rather obscure debug conditions
where data in the section is being modified by ARMV8 OS while the elf
copy is in progress.
To prevent all these conditions, lets make sure that the elf parse and
copy operations are completed ahead of ARMv8 being released to execute.
We will pay a penalty of elf copy time, but that is a valid tradeoff in
comparison to debug of alternate scenarios.
Signed-off-by: Nishanth Menon <nm@ti.com>
NB0 is bridge to SRAM and NB1 is bridge to DDR.
To ensure that SRAM transfers are not stalled due to delays during DDR
refreshes, SRAM traffic should be higher priority (threadmap=2) than
DDR traffic (threadmap=0).
This fixup is critical to provide deterministic access latency to
MSMC from ICSSG, it applies to all AM65 silicon revisions and is due
to incorrect reset values (has no erratum id) and statically setting
things up should be done independent of usecases and board.
This specific style of Northbridge configuration is specific only to
AM65x devices, follow-on K3 devices have different data prioritization
schemes (ASEL and the like) and hence the fixup applies purely to
AM65x.
Without this fix, ICSSG TX lock-ups due to delays in MSMC transfers in
case of SR1 devices, on SR2 devices, lockups were not observed so far
but high retry rates of ICSSG Ethernet (icssg-eth) and, thus, lower
throughput.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Benoit Parrot <bparrot@ti.com>
[Jan: rebased, dropped used define, extended commit log]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
[Nishanth: Provide relevant context in the commit message]
Signed-off-by: Nishanth Menon<nm@ti.com>
The K3 SoCs have some PLL output clocks (POSTDIV clocks) which in
turn serve as inputs to other HSDIV output clocks. These clocks use
the actual value to compute the divider clock rate, and need to be
registered with the CLK_DIVIDER_ONE_BASED flags. The current k3-clk
driver and data lacks the infrastructure to pass in divider flags.
Update the driver and data to account for these divider flags.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
There are three different divider values in the DIV_CTRL register
controlled by the k3-pll driver. Currently the ti_pll_clk_set_rate
function writes the entire register when programming plld, even though
plld only resides in the lower 6 bits.
Change the plld programming to read-modify-write to only affect the
relevant bits for plld and to preserve the other two divider values
present in the upper 16 bits, otherwise they will always get set to zero
when programming plld.
Fixes: 0aa2930ca1 ("clk: add support for TI K3 SoC PLL")
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add a note to the automatically generated clk-data and dev-data files
for j721e and j7200 to indicate that they are in fact auto-generated and
should not be hand edited.
Also adjust TI URL to use https instead of http and also add an empty
line before first header inclusion.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The TI K3 Fractional PLLs use two programmable POSTDIV1 and POSTDIV2
divisors to generate the final FOUTPOSTDIV clock. These are in sequence
with POSTDIV2 following the POSTDIV1 clock. The current J7200 clock data
has the POSTDIV2 clock as the parent for the POSTDIV1 clock, which is
opposite of the actual implementation. Fix the data by simply adjusting
the register bit-shifts.
The Main PLL1 POSTDIV clocks were also defined incorrectly using Main PLL0
register values, fix these as well.
Fixes: 277729eaf3 ("arm: mach-k3: Add platform data for j721e and j7200")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The TI K3 Fractional PLLs use two programmable POSTDIV1 and POSTDIV2
divisors to generate the final FOUTPOSTDIV clock. These are in sequence
with POSTDIV2 following the POSTDIV1 clock. The current J721E clock data
has the POSTDIV2 clock as the parent for the POSTDIV1 clock, which is
opposite of the actual implementation. Fix the data by simply adjusting
the register bit-shifts.
The Main PLL1 POSTDIV clocks were also defined incorrectly using Main PLL0
register values, fix these as well.
Fixes: 277729eaf3 ("arm: mach-k3: Add platform data for j721e and j7200")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add a weak release_resources_for_core_shutdown() stub implementation
that can be overridden by actual implementation if a SoC supports that
function.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
The common TI SCI header file uses some macros from err.h and these
get exercised when CONFIG_TI_SCI_PROTOCOL is not defined. Include
the linux/err.h header file in this header file directly rather
than relying on source files to include it to eliminate any
potential build errors.
While at this, reorder the existing header file include to the
beginning of the file.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Ivan's patch fixes a kernel warning when booting RPi2, as the firmware
already
provides a frambebuffer node.
Marek's patch fixes random crashes on 32 bit RPi4 with newer firmware.
My SMBIOS patchesfixes an issue that show up with
e4f8e543f1 ("smbios: Drop the unused Kconfig options").
Basically the SMBIOS table broke and wasn't readable anymore.
It appears that RPi firmware has already added framebuffer
node under /chosen, at least on RPi 2 versions. So check
for this and don't add duplicate node.
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Move the XHCI PCI device base up in the virtual address space. This fixes
initialization failure observed with newer Raspberry Pi firmware, later
than 63b1922311 ("firmware: arm_loader: Update armstubs with those from
PR 117). It looks that chosing 0xff800000 as the XHCI PCI device base
conflicts with the updated ARM/VideoCore firmware.
This also requires to reduce the size of the mapped PCI device region
from 8MiB to 4MiB to fit into 32bit address space. This is still enough
for the XHCI PCI device.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Enable this driver to allow U-Boot to get SMBIOS table information from
a device tree node.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Fabian Vogt <fvogt@suse.com>
At present SMBIOS tables are empty, which breaks some use-cases that
rely on that. Add some minimal information to fulfill this.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The hash algorithm selection was streamlined in commit 92055e138f
("image: Drop if/elseif hash selection in calculate_hash()"). Said
commit kept the call to cpu_to_uimage() to convert the CRC to big
endian format.
This would have been correct when calling crc32_wd(). However, the
->hash_func_ws member of crc32 points to crc32_wd_buf(), which already
converts the CRC to big endian. On a little endian host, doing both
conversions results in a little-endian CRC. This is incorrect.
To remedy this, simply drop the call to cpu_to_uimage(), thus only
doing the byte-order conversion once.
Fixes: 92055e138f ("image: Drop if/elseif hash selection in
calculate_hash()")
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
We are not guaranteed to have the padding_pkcs_15_verify symbol since
commit 92c960bc1d ("lib: rsa: Remove #ifdefs from rsa.h"), and
commit 61416fe9df ("Kconfig: FIT_SIGNATURE should not select RSA_VERIFY")
The padding_algos only make sense with RSA verification, which can now
be disabled in lieu of ECDSA. In fact this will lead to build failures
because of the missing symbol mentioned earlier.
To resolve this, move the padding_algos to a linker list, with
declarations moved to rsa_verify.c. This is consistent with commit
6909edb4ce ("image: rsa: Move verification algorithm to a linker list")
One could argue that the added #ifdef USE_HOSTCC is ugly, and should
be hidden within the U_BOOT_PADDING_ALGO() macro. However, this would
be inconsistent with the "cryptos" list. This logic for was not
previously explored:
Without knowledge of the U_BOOT_PADDING_ALGO() macro, its use is
similar to something being declared. However, should #ifndef
USE_HOSTCC be part of the macro, it would not be obvious that it
behaves differently on host code and target code. Having the #ifndef
outside the macro makes this obvious.
Also, the #ifdef is not always necessary. For example ecda-verify
makes use of U_BOOT_CRYPTO_ALGO() without any accompanying #ifdefs.
The fundamental issue is a lack of separation of host and target code
in rsa_verify. Therefore, the declaration of a padding algo with the
external #ifdef is more readable and consistent.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
There are trivial typos in the Kconfig file. Fixed them.
Also, fixed grammar in the descriptions with typos.
Fixes: d56b4b1974 ("configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS")
Fixes: 7264f2928b ("spl: fit: Eanble GZIP support for image decompression")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If keydir is not provided but name is we want to use name as key_id.
But with the current coding name is only used on its own if it is NULL
and keydir is provided which never occurs.
Fixes: 824ee745fb ("lib/rsa: Use the 'keyfile' argument from mkimage")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the
FIFO is completely full: the level size reads as zero, but the FIFO_FULL
bit is set. We won't do a single iteration of the read loop in this
case, so will be stuck forever.
Check for this situation and use a safe minimal FIFO size instead when
we hit this case.
This fixes MMC boot on A20 devices after the MMC FIFO optimisation
(9faae5457f).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
We don't need this check anymore since when PCI is enabled, driver model
is always used.
Sadly this doesn't work with nds32 for some reason to do with the
toolchain. Add a work-around for that.
Signed-off-by: Simon Glass <sjg@chromium.org>
This board has not been converted to CONFIG_DM_PCI by the deadline.
Remove it.
Note that we have to add CONFIG_SPIFLASH to scripts/config_whitelist.txt
because it's not really migrated at this point.
Acked-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Acked-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
Acked-by: Oleksandr Zhadan and Michael Durrant <arcsupport@arcturusnetworks.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Handle CONFIG_SPIFLASH differently and delete Kconfig file]
Signed-off-by: Tom Rini <trini@konsulko.com>
Support using mmc command for enumerating mmc card in a given mode
Fix device_remove in mmc
Fix switch issue with send_status disabled
Drop 1ms delay in fsl_esdhc command sending
Revert "mmc: sdhci: set to INT_DATA_END when there are data"
Since the beginning of this driver which was initially for the MPC8379
and MPC8536 SoCs, there is this spurious 1ms delay. According to the
comment it should actually be only 8 clock cycles. Esp. during EFI block
transfers, this 1ms add up to a significant delay and slows down EFI
boot.
I couldn't find any mention in the MPC8536 that there should be a delay
of 8 clock cycles between commands. The SD card specification mentions that
the clock has to be left enabled for 8 cycles after a command or
response. But I don't see how this delay will help with this.
Go ahead and just remove it. If there will ever be any regression we can
introduce a compile time flag, but for now I'd like to keep it simple.
In the split off imx driver this delay was also removed in commit
9098682200 ("mmc: fsl_esdhc_imx: remove the 1ms delay before sending
command").
Signed-off-by: Michael Walle <michael@walle.cc>
Reduce the code size by avoiding using the external UEFI API and using our
internal functions instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There is two unneeded EFI_CALL references in tcg2_measure_pe_image().
The first one in efi_search_protocol() and the second on in the device path
calculation. The second isn't even a function we should be calling, but a
pointer assignment, which happens to work with the existing macro.
While at it switch the malloc call to a calloc, remove the unnecessary cast
and get rid of an unneeded if statement before copying the device path
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The move to driver model should by now be completed. To be able to remove
pre-driver model code from our block IO code require CONFIG_BLK=y for UEFI
support.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sort these and add a type so it is clear how to set the value. Add a note
about usage to the top. Correct the 'no-keyboard' binding which is missing
a prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On J721e R5 SPL, dfu buffer for loading sysfw.itb image gets allocated
before DRAM gets initialized. So, the buffer gets allocated in MCU L3
RAM. The current buffer size to be allocated is 256KB and the available
total heap memory is 0x70000 (448KB). This leads to NOMEM errors during
allocation.
In other cases when constraints such as above are not present fix the size
of buffers to the sector size in OSPI for proper functioning.
Also, if CONFIG_SYS_DFU_DATA_BUF_SIZE is defined and
CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then the max file size for dfu
transfer is defined as CONFIG_SYS_DFU_DATA_BUF_SIZE.
Fix these by setting appropriate buffer sizes in their respective defconfig
files and defining the max file size as 8 MB which is the default dfu
buffer size.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The size of u-boot.img is above 1MB and that of tispl.bin is close to 1MB,
in case of j721e. Therefore, increase the sizes allocated for tispl.bin and
u-boot.img to 2 MB and 4 MB respectively, in dfu_alt_info_ram environment
variable.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
In the cdns3 usb driver, the clock name looked for is ref. Therefore, fix
the clock-names property in usb0 instance for proper initialization of
cdns3 usb gadget driver.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The DM binary runs on the MCU R5F Core0 after R5 SPL on J721E and J7200
SoCs. The binary is built alongside the TFA, OPTEE and A72 SPL binaries
and included in the tispl.bin FIT image. The R5 SPL loads the DM binary
at 0xA0000000 address, based on the value used in the FIT image build
script. The DM binary though is an ELF image and not a regular binary
file, and so is processed further to load the actual program segments
using the U-Boot's standard ELF loader library.
The DM binary does leverage a certain portion of DDR for its program
segments, and typically reserves 16 MB of DDR at 0xA0000000 with the
1st MB used for IPC between Linux and the remote processor, and
remaining memory for firmware segments. This can cause an incomplete
loading of the program segments if the DM binary is larger than 1 MB,
due to overlap of the initial loaded binary and the actual program
segments.
Fix this by using the address 0x89000000, which matches the current
"addr_mcur5f0_0load" env variable used by R5 SPL before the DM firmware
inclusion into the tispl.bin.
Fixes: df5363a67f ("tools: k3_fit_atf: add DM binary to the FIT image")
Signed-off-by: Suman Anna <s-anna@ti.com>
Add u-boot,dm-spl tag in the pinmux device tree node, required for MMCSD1
subsystem.
Fixes: b6059ddc45 ("arm: dts: k3-am642: Add r5 specific dt support")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add env variables for booting to kernel from USB MSC device. The second
partition in the USB MSC device needs to formatted as ext4 file system with
kernel and dtb images, present in the /boot folder.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Make finduuid generic by making it dependent on the boot variable. For
example, this can now be used for finding the uuid of partitions in usb
device too.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Fix the dr_mode in the U-Boot device tree blob, by reading the mode field
from the USB Boot Configuration fields. The dr_mode will only be fixed when
booting from USB.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This commit uses the existing DEFAULT_MMC_TI_ARGS and
DEFAULT_FIT_TI_ARGS defintions to replace the 'mmc*' environment
variables in the configuration. The check for the 'boot_fit' is handled
like the 'am335x_*' boards with 'CONFIG_BOOTCOMMAND'.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Both am335x_boneblack_vboot and am335x_evm_spiboot require
SPL_OF_CONTROL to function but are currently missing this option. Add
it.
Signed-off-by: Tom Rini <trini@konsulko.com>
HS400_ES is missed when down grade to HS mode during
device_remove the mmc device
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
When send_status is false or wait_dat0 is not supported, the switch
function should not send CMD13 but directly return.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add documentation on the usage of "mmc dev" and "mmc rescan" commands to
set user defined speed modes.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add support for enumerating MMC card in a given mode using mmc rescan and
mmc dev commands. The speed mode is provided as the last argument in these
commands and is indicated using the index from enum bus_mode in
include/mmc.h. A speed mode can be set only if it has already been enabled
in the device tree.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
This reverts commit 17ea3c8628.
In eMMC specification, for the response-with-busy(R1b, R5b)
command, the DAT0 will driven to LOW as BUSY status, and in
sdhci specification, the transfer complete bit should be wait
for BUSY status de-assert.
All response-with-busy commands don't contain data, the data
judgement is no need.
Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Andy Wu <Andy.Wu@sony.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Use dev_dbg() instead of dev_err() in pcie_advk_check_pio_status().
For example CRS is not an error status, it just says that the request
should be retried.
Without this, U-Boot spams the terminal with
pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x100000
pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x108000
pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x110000
pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x120000
pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x128000
pcie_advk pcie@d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x130000
...
when a device is not connected to a PCIe switch (Unsupported Request
from the switch).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
While a board could have multiple SATA ports, some of the ports might
not have a disk attached to them. So while probing for disks,
sata_mv_probe() should continue probing all ports, and skip one with
no disk attached.
Tests with:
- Seagate Goflex Net (Marvell Kirkwood 88F6281) out-of-tree u-boot.
- Zyxel NSA325 (Marvell Kirkwood 88F6282 out-of-tree u-boot.
Observation:
If a board has 2 or more SATA ports, and there is only one disk
attached to one of the ports, sata_mv_probe() does not return
a successful probe status. And if only one disk is attached to the
2nd port (i.e. port 1), it is not probed at all.
Patch Description:
Let sata_mv_probe() continues probing all ports, even if there
is error in probing a given port, and then return a successful
status if there is at least one port was probed successfully.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Fix baudrate value 5150000 which was added in commit ead4864fa6 ("arm:
mvebu: a38x: Define supported UART baudrates").
Exact value for divisor 3 with 250 MHz TCLK is 5208333 baudrate. In above
commit I incorrectly rounded it to 5150000 value due to testing with
USB-UART hw which incorrectly reported exact value and divisor configured
on other other end of UART link.
Fix this value to 520000 baudrate which is more close to the exact hardware
value and also has less fraction parts.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: ead4864fa6 ("arm: mvebu: a38x: Define supported UART baudrates")
Reviewed-by: Stefan Roese <sr@denx.de>
According to PCIe base specification, if CRS Software Visibility is not
enabled, the Root Complex must re-issue the Configuration Request as a new
Request.
Normally this part of Root Complex is implemented in hardware but aardvark
is somehow special and does not implement it in hardware and expect that
handling of config requests are fully implemented in software.
This re-issuing functionality is required also because U-Boot does not
support CRS Software Visibility feature and therefore expects that Root
Complex re-issues requests as is specified in PCIe base specification.
Retry / re-issue config request up to the PIO_MAX_RETRIES, to prevent
infinite loop. After retry count exceed PIO_MAX_RETRIES, returns failure.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
There was mistake in commit 4cd61c43fd ("arm: a37xx: pci: Fix handling
PIO config error responses"). U-Boot does not support handling of CRS
return value for PCI_VENDOR_ID config read request and also does not set
CRSSVE bit.
Therefore disable returning CRS response for now.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 4cd61c43fd ("arm: a37xx: pci: Fix handling PIO config error responses")
Reviewed-by: Stefan Roese <sr@denx.de>
Since mvpp2 is using the new mdio driver and the cp110 has been
synced with the linux upstream, the mdio has to enabled in the
device tree file.
This is missing for some device tree files and therefore the
network cards do not come online.
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Change maintainer to me. Prafulla is no longer active in U-Boot community.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When dropping SHA512_ALGO in general, we didn't catch some cases where
an option was selecting both SHA512 and SHA512_ALGO and caused them to
select SHA512 twice. Kconfig doesn't complain, but this is still wrong
and should be corrected.
Fixes: e60e449931 ("lib: Drop SHA512_ALGO in lieu of SHA512")
Reported-by: Andreas Schwab <schwab@suse.de>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
- Merge some fixes to how we enable hash algorithms for FIT images in
SPL. This fixes a few cases where we should have had some options
enabled, but did not. This also removes otherwise unused options in a
few other cases.
calculate_hash() would try to select the appropriate hashing function
by a if/elseif contruct. But that is exactly why hash_lookup_algo()
exists, so use it instead.
This does mean that we now have to 'select HASH' to make sure we get
the hash_lookup_algo() symbol. However, the change makes sense because
even basic FITs will have to deal with "hash" nodes.
My only concern is that the 'select SPL_HASH' might cause some
platform to grow above its SPL size allowance
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Make FSL_CAAM be implied only on ARM && SPL]
Signed-off-by: Tom Rini <trini@konsulko.com>
MD5 is being called directly in some places, but it is not available
via hash_lookup_algo("md5"). This is inconsistent with other hasing
routines. To resolve this, add an "md5" entry to hash_algos[].
The #ifdef clause looks funnier than those for other entries. This is
because both MD5 and SPL_MD5 configs exist, whereas the other hashes
do not have "SPL_" entries. The long term plan is to get rid of the
ifdefs, so those should not be expected to survive much longer.
The md5 entry does not have .hash_init/update/finish members. That's
okay because hash_progressive_lookup_algo() will catch that, and
return -EPROTONOSUPPORT, while hash_lookup_algo() will return the
correct pointer.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Use CONFIG_IS_ENABLED not IS_ENABLED for MD5 check]
Signed-off-by: Tom Rini <trini@konsulko.com>
All of these configs exist. Stick to using CONFIG_[ST]PL_HASH, and drop all
references to CONFIG_[ST]PL_HASH_SUPPORT. This means we need for
CHAIN_OF_TRUST to select SPL_HASH now.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Add TPL case, fix CHAIN_OF_TRUST, other tweaks]
Signed-off-by: Tom Rini <trini@konsulko.com>
SHA512_ALGO was used as a "either SHA512 or SHA384", although the
implementations of these two algorithms share a majority of code.
From a Kconfig interface perspective, it makes sense to present two
distinct options. This requires #ifdefing out the SHA512
implementation from sha512.c. The latter doesn't make any sense.
It's reasonable to say in Kconfig that SHA384 depends on SHA512, and
seems to be the more polite way to handle the selection.
Thus, automatically select SHA512 when SHA384 is enabled.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only
for hash_calculate() in common/image-fit.c. However, since commit
14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"),
the correct selector was changed to CONFIG_SHAxxx.
The extra "_FIT_" variants are neither used, nor needed. Remove them.
One defconfig disables FIT_SHA256, which is now changed to 'SHA256'.
CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined
references to "sha256_*()". bubt.c needs sha256, so this selection is
correct. It is not clear why this problem did not manifest before.
Note that SHA selection in SPL is broken for this exact reason. There
is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of
this change.
Also note that we make CONFIG_FIT now imply SHA256, to make up for
FIT_SHA256 previously being a default y option.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Add imply SHA256 to FIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
The enable_caches is a generic hook for architecture-implemented, we
define this function to enable composable cache of sifive platforms.
In sifive_cache, it invokes the generic cache_enable interface of cache
uclass to execute the relative implementation in SiFive ccache driver.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The enable_caches is a generic hook for architecture-implemented, we
leverage this function to enable caches for RISC-V
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
This driver is currently responsible for enabling all ccache ways.
Composable cache could be configure as RAM or cache, we will use it as
RAM at the beginning to put the u-boot SPL there. In u-boot proper
phrase, we will use the composable cache as cache, and try to enable the
cache ways.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The ocores_i2c.c driver is missing a sentinel at the end of
the compatible strings list. This causes the "dm compat" command
to spew garbage.
Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.
Here is an example:
=> exception ebreak
Unhandled exception: Breakpoint
EPC: 000000008ff5d50e RA: 000000008ff5d62c TVAL: 0000000000000000
EPC: 000000008020b50e RA: 000000008020b62c reloc adjusted
Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)
To disassemble the code we can use the decodecode script:
$ echo 'Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)' | \
CROSS_COMPILE=riscv64-linux-gnu- scripts/decodecode
Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)
All code
========
0: 2785 addiw a5,a5,1
2: 07a00693 li a3,122
6: fef6dce3 bge a3,a5,0xfffffffffffffffe
a: 47a5 li a5,9
c: 00e7d563 bge a5,a4,0x16
10:* 9002 ebreak <-- trapping instruction
...
Code starting with the faulting instruction
===========================================
0: 9002 ebreak
...
As it is not always clear if the first 16 bits are at the start or in the
middle of a 32bit instruction it may become necessary to strip the first
u16 from the output before calling decodecode to get the correct
disassembled code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Both for 64bit and 32bit at least on one board we should compile the sbi
command. Enabling it on QEMU will allow to write a test for it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When booting in EFI, lib/efi_loader/efi_memory.c calls
board_get_usable_ram_top(0) which returns by default
gd->ram_base + gd->ram_size which is the top of DDR.
In case of OPTEE boot, the top of DDR is currently reserved by OPTEE,
board_get_usable_ram_top(0) must return an address outside OPTEE
reserved memory.
gd->ram_top matches this constraint as it has already been initialized
by substracting all DT reserved-memory (included OPTEE memory area).
Fixes: 92b611e8b0 ("stm32mp: correctly handle board_get_usable_ram_top(0)")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Pull request for efi-2021-10-rc4
Documentation:
Remove invalid reference to configuration variable in UEFI doc
UEFI:
Parameter checks for the EFI_TCG2_PROTOCOL
Improve support of preseeding UEFI variables.
Correct the calculation of the size of loaded images.
Allow for UEFI images with zero VirtualSize
TCG EFI Protocol Specification defines that PCRIndex parameter
passed from caller must be 0 to 23.
TPM2_MAX_PCRS is currently used to check the range of PCRIndex,
but TPM2_MAX_PCRS is tpm2 device dependent and may have larger value.
This commit newly adds EFI_TCG2_MAX_PCR_INDEX macro, it is used to
check the range of PCRIndex parameter.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
TCG EFI Protocol Specification requires to the input
ProtocolCapability.Size < size of the EFI_TCG2_BOOT_SERVICE_CAPABILITY
up to and including the vendor ID field.
Current implementation does different calculation, let's fix it.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
TCG EFI Protocol Specification defines the required parameter
checking and return value for each API.
This commit adds the missing parameter check and
fixes the wrong return value to comply the specification.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When U-Boot is started we have to use the existing variables to determine
in which secure boot state we are.
* If a platform key PK is present and DeployedMode=1, we are in deployed
mode.
* If no platform key PK is present and AuditMode=1, we are in audit mode.
* Otherwise if a platform key is present, we are in user mode.
* Otherwise if no platform key is present, we are in setup mode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Writing variables AuditMode and DeployedMode serves to switch between
Secure Boot modes. Provide a separate value for these in efi_auth_var_type.
With this patch the variables will not be read from from file even if they
are marked as non-volatile by mistake.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The UEFI specification requires that the signature database may only be
stored in tamper-resistant storage. So these variable may not be read
from an unsigned file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We should not first allocate memory and then report a rounded up value as
image size. Instead first round up according to section allocation and then
allocate the memory.
Fixes: 82786754b9 ("efi_loader: ImageSize must be multiple of SectionAlignment")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In a section header VirtualSize may be zero. This is for instance seen in
the .sbat section of shim. In this case use SizeOfRawData as section size.
Fixes: 9d30a941cc ("efi_loader: don't load beyond VirtualSize")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Asherah Connor <ashe@kivikakk.ee>
This Kconfig symbol was never added to U-Boot but it was mentioned in the
origin commit c35df7c9e4 ("qemu: arm64: Add documentation for capsule
update"). That's why remove it from documentation to be accurate.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
DMA is aligned to ARCH_DMA_MINALIGN(64 bytes), but as per spec, alignment
required is 4bytes only. Change DMA alignment from ARCH_DMA_MINALIGN to
GQSPI_DMA_ALIGN. Remove alignment of data length in non-exponential case.
Some minor improvements in the initialization to initialize gen_fifo
threshold and disable qspi controller while setting config register.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Current implementation uses auto mode for starting generic FIFO.
The recommendation from IP designers is to use manual mode, hence
change to manual start mode.
In fill genfifo first write to genfio and then trigger manual start.
Also enable and check for genfifo empty interrupt status in place of
genfifo not full interrupt.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This Kconfig symbol was never added to U-Boot but it was mentioned in the
origin commit c35df7c9e4 ("qemu: arm64: Add documentation for capsule
update"). That's why remove it from documentation to be accurate.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
BTRFS volume consists of a number of subvolumes which can be mounted separately
from each other. The top-level subvolume always exists even if no subvolumes
were created manually. A subvolume can be denoted as the default subvolume i.e.
the subvolume which is mounted by default.
The default "default subvolume" is the top-level one, but this is far from the
common practices used in the wild. For instance, openSUSE provides an OS
snapshot/rollback feature based on BTRFS. To achieve this, the actual OS root
filesystem is located into a separate subvolume which is "default" but not
"top-level". That means that the /boot/dtb/ directory is also located inside
this default subvolume instead of top-level one.
However, the existing btrfs u-boot driver always uses the top-level subvolume
as the filesystem root. This behaviour 1) is inconsistent with
mount /dev/sda1 /target
command, which mount the default subvolume 2) leads to the issues when
/boot/dtb cannot be found properly (see the reference).
This patch uses the default subvolume as the filesystem root to overcome
mentioned issues.
Reference: https://bugzilla.suse.com/show_bug.cgi?id=1185656
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Fixes: f06bfcf54d ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Reviewed-by: Qu Wenruo <wqu@suse.com>
Support for register headers in v1 images was implemented in commit
02ba70ad68 ("tools: kwbimage: Add support for DATA command also for v1
images"). So remove old comment.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 02ba70ad68 ("tools: kwbimage: Add support for DATA command also for v1 images")
Reviewed-by: Stefan Roese <sr@denx.de>
image_get_csk_index() may return -1 in case of an error. Don't use this
value as index.
This resolves Coverity CID 338488
Memory - illegal accesses (NEGATIVE_RETURNS)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Always check the return value of fopen().
This resolves Coverity CID 338491:
Null pointer dereferences (NULL_RETURNS)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Disable MCU watchdog in board_late_init() instead of board_init(), so
that it is disabled after U-Boot enables SOC watchdog instead of before.
This way there is no window when the board is vulnerable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
When booting over UART, sending U-Boot proper may take too much time and
MCU watchdog will reset the board before U-Boot proper is loaded.
Better disable MCU watchdog in SPL when booting over UART.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We do not need to guard code in board_init() and board_late_init()
functions with the CONFIG_SPL_BUILD macro, since these functions are not
called in SPL.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Move the function get_boot_device() from spl.c to cpu.c.
Make it visible, so that it may be used from other files.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Armada 37xx serial driver does not use CONFIG_DEBUG_UART_SHIFT.
So do not define any bogus value for CONFIG_DEBUG_UART_SHIFT option in any
Armada 37xx defconfig file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
PCIe-based NVMe SSD disks in M.2 2230/2242/2260 form-factor can be
connected to Turris Omnia mPCIe slot via passive M.2 <--> mPCIe adapter.
So enable PCIe NVMe drivers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
SATA disks could be connected via mPCIe add-in card with PCIe-SATA
controller into Mox-B or Mox-G module.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Espressobin has one on-board SATA port which is connected directly to CPU.
More SATA disks can be connected via mPCIe add-in card with PCIe-SATA
controller.
So enable required SATA AHCI PCIe drivers in defconfig file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
File mach/soc.h is included also in 64-bit mvebu processors, so define
Armada XP related macros only when compiling for Armada XP.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
There are already IBR_HDR_* constants for these numbers, so use them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Part of image data is 4 byte checksum, so every image must contain at least
4 bytes. Verify it to prevent memory corruptions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Only image versions 0 and 1 are supported. Verify it in
kwbimage_verify_header() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Define all standard baudrates plus 3 non-standard high speed:
3125000 4000000 5150000
3125000 matches divisor 5 with 250 MHz TCLK and divisor 4 with 200 MHz TCLK.
4000000 is the rounded value for divisor 4 with 250 MHz TCLK (3906250) and
divisor 3 with 200 MHz TCLK (4166666).
5150000 is the rounded value (5208333) for divisor 3 with 250 MHz TCLK.
Testing showed that rounded value is more stable then exactly calculated.
And it is the highest possible baudrate which is stable on A38x platform.
Any other baudrate values above 2500000 are unstable, which is reason why
e.g. standard value 3000000 is not defined, and it is needed to use
non-standard value 3125000.
Tested all defined UART baudrates on Turris Omnia (A38x with 250 MHz TCLK).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
There is a QSPI NOR flash part on the board. Because this chip isn't
yet supported in Linux, but it is supported in U-Boot, and the
face that the RPC_SPI compatible names are different in U-Boot and
Linux, the device tree updates are confined to -u-boot.dtsi files.
In order to use the QSPI, TF-A must leave RPC unlocked by compiling
TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
2021-08-24 20:03:09 +02:00
647 changed files with 26819 additions and 11331 deletions
This document serves as a checklist before contributing to this repository. It includes links to read up on if topics are unclear to you.
This guide mainly focuses on the proper use of Git.
## 1. Issues
STM32MPU projects do not activate "Github issues" feature for the time being. If you need to report an issue or question about this project deliverables, you can report them using [ ST Support Center ](https://my.st.com/ols#/ols/newrequest) or [ ST Community MPU Forum ](https://community.st.com/s/topic/0TO0X0000003u2AWAQ/stm32-mpus).
## 2. Pull Requests
STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual CLA (https://cla.st.com).
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* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check here (https://cla.st.com).
Please note that:
* The Corporate CLA will always take precedence over the Individual CLA.
* One CLA submission is sufficient, for any project proposed by STMicroelectronics.
__How to proceed__
* We recommend to fork the project in your GitHub account to further develop your contribution. Please use the latest commit version.
* Please, submit one Pull Request for one new feature or proposal. This will ease the analysis and final merge if accepted.
__Note__
Merge will not be done directly in GitHub but it will need first to follow internal integration process before public deliver in a standard release. The Pull request will stay open until it is merged and delivered.
ST places a high priority on security, and our Product Security Incident Response Team (PSIRT) is committed to rapidly addressing potential security vulnerabilities affecting our products. PSIRT's long history and vast experience in security allows ST to perform clear analyses and provide appropriate guidance on mitigations and solutions when applicable.
If you wish to report potential security vulnerabilities regarding our products, **please do not report them through public GitHub issues.** Instead, we encourage you to report them to our ST PSIRT following the process described at: **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html**
### IMPORTANT - READ CAREFULLY:
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/* spare dmas for other usage (un-delete to enable pwm capture) */
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm2_pins_a>;
pinctrl-1 = <&pwm2_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@1 {
status = "okay";
};
};
&timers8 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm8_pins_a>;
pinctrl-1 = <&pwm8_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@7 {
status = "okay";
};
};
&timers12 {
/delete-property/dmas;
/delete-property/dma-names;
status = "disabled";
pwm {
pinctrl-0 = <&pwm12_pins_a>;
pinctrl-1 = <&pwm12_sleep_pins_a>;
pinctrl-names = "default", "sleep";
status = "okay";
};
timer@11 {
status = "okay";
};
};
&usart3 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart3_pins_b>;
pinctrl-1 = <&usart3_sleep_pins_b>;
pinctrl-2 = <&usart3_idle_pins_b>;
/*
* HW flow control USART3_RTS is optional, and isn't default wired to
* the connector. SB23 needs to be soldered in order to use it, and R77
* (ETH_CLK) should be removed.
*/
uart-has-rtscts;
status = "disabled";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbotg_hs {
pinctrl-0 = <&usbotg_hs_pins_a>;
pinctrl-names = "default";
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
&usbphyc {
status = "okay";
};
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