Compare commits

...

1526 Commits

Author SHA1 Message Date
d637294e26 Prepare v2022.01
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-10 13:46:34 -05:00
a0f6959293 .mailmap: add Atish Patra, Anup Patel
Both have left Western Digital.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-10 08:13:26 -05:00
675c3ccc5c lib/rsa: avoid -Wdiscarded-qualifiers
The return type of EVP_PKEY_get0_RSA() is const struct rsa_st *.
Our code drops the const qualifier leading to

In file included from tools/lib/rsa/rsa-sign.c:1:
./tools/../lib/rsa/rsa-sign.c: In function ‘rsa_add_verify_data’:
./tools/../lib/rsa/rsa-sign.c:631:13: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
  631 |         rsa = EVP_PKEY_get0_RSA(pkey);
      |             ^

Add a type conversion.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-10 08:13:24 -05:00
6ef836acce Merge branch '2022-01-08-further-important-updates'
- Further udoo_neo fixes, nitrogen6x mmc pinctrl fix
- dwc2_udc_otg fix
- Make imx8mq be consistent with yesterdays imx8 fixes
2022-01-08 20:26:19 -05:00
b05cebb5f2 imx8mq: Generate a single bootable flash.bin again
All i.MX8MQ boards have been converted to binman, which makes it
necessary to flash both flash.bin and u-boot.itb to get a bootable
system. Prior to the conversion, only flash.bin was needed.

Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.

Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.

After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).

Also update imx8mq_evk.rst to remove the u-boot.itb copy step.

This is a cherry-pick of 028abfd9b1 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-01-08 11:16:03 -05:00
1b2fb345d7 nitrogen6x: add missing pinctrl to fix mmc
Since commit f7ac30b042, the pin muxing for mmc was removed from the
board file to be managed by DM_MMC which requires PINCTRL to work. It
made the change for sabrelite but nitrogen configs were forgotten.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2022-01-08 11:16:03 -05:00
8f758683a8 usb: gadget: dwc2_udc_otg: set ep's desc during enable/disable
Fastboot support has been broken on platforms using dwc2 controller
since the gadget gets its max packet size from it.
This patch is the equivalent of 723fd5668f which fixed the same issue
but for the chipidea controller.

Fixes: 27c9141b11 ("usb: gadget: fastboot: use correct max packet size")

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2022-01-08 11:16:03 -05:00
7ad0cee754 udoo: Select CMD_DM
CMD_DM is useful for showing the whole DM tree.

Enable it via "imply CMD_DM".

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08 11:16:03 -05:00
6a69afe796 udoo: Increase CONFIG_ENV_OFFSET
Increase CONFIG_ENV_OFFSET to avoid the environment region to
overlap with U-Boot proper.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08 11:16:03 -05:00
353aa7b06f udoo: Adjust the SD card device numbering
After the conversion to DM the SD card shows up as 'mmc 2'
device.

Adjust the 'mmcdev' and the distro command 'func' accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08 11:16:03 -05:00
c280ec210f udoo: Call gpio_request()
Calling gpio_request() prior to its usage is now mandatory.

This fixes the following GPIO errors:

U-Boot SPL 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300)
Trying to boot from MMC1

U-Boot 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: WDOG
Model: Udoo i.MX6 Quad Board
Board: Udoo Quad
DRAM:  1 GiB
MMC:   FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
gpio@20a0000: set_dir_flags: error: gpio GPIO2_31 not reserved
gpio@20a4000: set_dir_flags: error: gpio GPIO3_23 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_24 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_25 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_27 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_28 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_29 not reserved
gpio@20a4000: set_value: error: gpio GPIO3_23 not reserved
Net:   Could not get PHY for FEC0: addr -2
No ethernet found.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08 11:16:03 -05:00
6869bab6a1 ARM: dts: imx6qdl-udoo: Properly describe the SD card detect
GPIO7_IO00 is used as SD card detect.

Properly describe this in the devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2022-01-08 11:16:03 -05:00
11907cb5cf udoo_spl: Initialize the eSDHC controller in SPL
Currently, imx6q udoo board fails to boot like this:

U-Boot SPL 2022.01-rc3-00061-g95ca715adad3 (Dec 18 2021 - 18:04:40 -0300)
Trying to boot from MMC1

The reason is that the eSDHC controller is not initialized in SPL.

Initialize the eSDHC controller in SPL via C code as DM is not
used in SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2022-01-08 11:16:03 -05:00
47de135994 Merge branch '2022-01-07-imx8-and-buildman-updates'
- A large number of updates for i.MX8 platforms.  We update buildman /
  binman to be able to fake binaries if needed, for CI, and tell the user
  the binary won't work.  Update platforms to build again with these
  changes.
2022-01-07 19:11:58 -05:00
c225601c60 imx: imx8mm: imx8mm-kontron-n801x-s: Fix binman error
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in imx8mm-kontron-n801x-s-u-boot.dtsi and causes
a build error.  Remove the duplicate.

Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 17:38:01 -05:00
83514ca08b board: phytec: imx8mm-phycore: Remove duplicate binman node
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in phycore-imx8mm-u-boot.dtsi and causes a build
error.  Remove the duplicate.

Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 17:38:01 -05:00
7d926c9544 imx8mm_venice: switch to use binman to pack images
Use binman to pack images.

Note that imx8mm_venice supports several boards via multiple DTB's thus
in the fit node we must use:
- fit,fdt-list = "of-list"
- fdt-SEQ
- config-SEQ

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 15:49:13 -05:00
f17fb6cae4 arm64: dts: imx8mm-u-boot.dtsi: improve odd blob-ext naming
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
86b7f2069c arm64: dts: imx8mm-u-boot.dtsi: explicitly add spl filename
Explicitly add SPL aka u-boot-spl.bin filename.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
f08c3fee57 arm64: dts: imx8mm-u-boot.dtsi: alphabetically re-order properties
Alphabetically re-order properties.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
7cf5597b84 arm64: dts: imx8mm: use common binman configuration
With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
e9c63ab0e3 arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi
Use common imx8mm-u-boot.dtsi.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
2dc3ac5772 arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: alphabetically re-order
Alphabetically re-order nodes and properties.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
01bc128a11 imx8mm-cl-iot-gate: fix imximage intermediate binary naming
This fixes the following build time issue:

...
  BINMAN  all
binman: Error 1 running 'mkimage -d ./mkimage.spl.mkimage -n
 spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000
 ./mkimage-out.spl.mkimage': mkimage.flash.mkimage: Can't open: No such
 file or directory

make: *** [Makefile:1094: all] Error 1

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:42 -05:00
70e59a0d17 doc: imx8mq_evk: update doc after using binman
Update doc after using binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:41 -05:00
ea6ad1a42a imx: imx8mq use common imximage.cfg
After all these board switch to binman, we could use common imximage.cfg

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2022-01-07 15:42:41 -05:00
ddc890bc7e imx: pico-imx8mq: switch to use binman
Switch to use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2022-01-07 15:42:41 -05:00
f7f70ea216 imx: imx8mq_phanbell: switch to binman
Switch to binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2022-01-07 15:42:41 -05:00
c1ecd03d90 imx: imx8mq_evk: switch to binman
Switch to use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-01-07 15:42:41 -05:00
83ba8c539d imx8mn_beacon_2g: Switch to binman
The standard 1GB Nano was converted to binman, but the 2G version
was neglected.  Convert it to binman as well.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
2022-01-07 15:42:39 -05:00
2baacc75a5 imx8mn_beacon: Fix booting hang and switch to binman
Somewhere along the line, the board stopped being able to boot.
Rather than just fixing the issue, let's fix the issue and migrate
to binman to eliminate a warning when using custom imx tools for
generating the binary.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 15:41:58 -05:00
80efad1342 imx8mm_beacon: Switch to binman for generating image
To eliminate a warning when using custom imx tools for generating
a binary, use binman to generate flash.bin.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-07 12:10:59 -05:00
a89c8f2111 binman: add support for creating dummy files for external blobs
While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
(--fake-ext-blobs) is introduced that can be switched on via the u-boot
makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files are
created.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-07 12:10:55 -05:00
a14af7216a Merge branch '2022-01-06-assorted-important-fixes'
- Revert a clk change, to enable some platforms to work again
- Updates to the udoo NEO family of boards to work correctly
- Fix SiFive Unleashes/Unmatched boards booting
- Update rockchip maintainer entry
2022-01-07 09:30:59 -05:00
75f080df46 Revert "clk: Detect failure to set defaults"
This reverts commit 92f1e9a4b3.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-07 09:30:45 -05:00
392aa4ba96 udoo: neo: Do not print the Model information
By default the Model information from DT is printed:

CPU:   Freescale i.MX6SX rev1.2 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 63C
Reset cause: POR
Model: UDOO Neo Basic
Board: UDOO Neo FULL
I2C:   ready

As the udoo basic DT is used, such output may be confusing.

Improve it by only printing the Board model instead, which is
read from the board identification GPIOs.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Tommaso Merciai <tomm.merciai@gmail.com>
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
2022-01-07 09:30:45 -05:00
b7404a9d38 udoo: neo: Fix the board model printing
Currently, the board model is not printed correctly:

Board: UDOO Neo UNDEFINED

Read the model type in SPL and store it the internal OCRAM, so that
U-Boot proper can retrieve it correctly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 09:30:45 -05:00
87c34fe216 udoo_neo: Enable support for USB and storage
Enable support for USB and USB storage on the UDOO Neo.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 09:30:45 -05:00
79ac6917d0 udoo_neo: Fix ethernet
The ethernet has a RMII not RGMII, also needs DM_MDIO and finally
initialise it later in the process as it's not needed that early on
and not everything is ready so it locks up the device.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 09:30:45 -05:00
2bbe1ba0c7 udoo_neo: Fixes for booting from the mSD card
This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 09:30:44 -05:00
4be9947edf udoo_neo: Call gpio_request()
Calling gpio_request() prior to its usage is now mandatory.

This fixes the following GPIO errors:
gpio@20a8000: set_dir_flags: error: gpio GPIO4_16 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_13 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_0 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_13 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_0 not reserved
gpio@20a0000: set_dir_flags: error: gpio GPIO2_1 not reserved
gpio@20a0000: set_value: error: gpio GPIO2_1 not reserved

Fixes: 191840ae99 ("ARM: imx: udoo_neo: Enable OF_CONTROL and DM gpio/pin control")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-01-07 09:30:44 -05:00
f77549fe74 riscv: sifive: Fix OF_BOARD boot failure
When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.

This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().

[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot

Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes: d6f8ab30a2 ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-07 09:30:44 -05:00
dae0829c6e rockchip: puma/lion: update MAINTAINERS file
Philipp does not work at Theobroma Systems anymore so let's swap
Philipp's address with mine.

Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2022-01-07 09:30:44 -05:00
c00c147dae Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kwbimage: Fix checksum calculation for v1 images (Pierre)
2022-01-05 13:08:45 -05:00
9203c73895 tools: kwbimage: Fix checksum calculation for v1 images
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.

Fixes: 2b0980c240 ("tools: kwbimage: Fill the real header size into the main header")

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-05 16:31:58 +01:00
b3f84a939f Merge tag 'video-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video
- mxsfb axi/disp_axi clock enable fix
2021-12-28 11:19:26 -05:00
880f3ee4f5 Merge tag 'efi-2022-01-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc4-4

UEFI:

* allow for more than 16 KiB UEFI variable size when using StMM

Others:

* make watchdog sysreset compatible with separate poweroff driver
* avoid OpenSSL deprecation warnings
2021-12-28 07:59:56 -05:00
d241d2c879 doc: Fix usage of CFG_RPMB_WRITE_KEY
This is a 'y/n' selection, so fix it.
While at it remove the duplicate usage of CFG_CORE_HEAP_SIZE

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-27 11:38:50 +01:00
f36b3f8f17 video: mxsfb: fix clk_get_by_name() return value check
If clk_get_by_name() returns 0 it means it executed successfully while now
we consider it as an error. So let's check if return value is negative to
be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-12-27 00:30:37 +01:00
c9964879ab Merge https://source.denx.de/u-boot/custodians/u-boot-spi 2021-12-26 14:07:41 -05:00
578b479aff Merge tag 'u-boot-rockchip-20211226' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add kaslrseed support;
- rk3568 spl and image tool support;
- px30 dts sync from kernel;
- rk3399 emmc fix;
- rockchip fastboot cmd fix;
2021-12-26 07:57:54 -05:00
3a8b919932 tools: avoid OpenSSL deprecation warnings
Our Gitlab CI buildsystem is set up to treat warnings as errors.
With OpenSSL 3.0 a lot of deprecation warnings occur.

With the patch compatibility with OpenSSL 1.1.1 is declared.
In the long run we should upgrade our code to use the current API.

A -Wdiscarded-qualifiers warning is muted by casting.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-26 06:57:20 +01:00
88c4cbedfb sysreset: watchdog: watchdog cannot power off
The watchdog system reset driver can reboot the device but it cannot power
it off. If power off is requested, the driver should not reset the system
but leave powering off to one of the other system reset drivers.

As power cycling is typically not a feature of a watchdog driver the reset
types SYSRESET_POWER and SYSRESET_POWER_OFF shall both be excluded.

Fixes: 17a0c14164 ("dm: sysreset: add watchdog-reboot driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-26 06:49:14 +01:00
2b18d95d91 efi_loader: Don't limit the StMM buffer size explicitly
Currently we allow and explicitly check a single shared page with
StandAloneMM.  This is dictated by OP-TEE which runs the application.
However there's no way for us dynamically discover the number of pages we
are allowed to use.  Since writing big EFI signature list variable
requires more than a page, OP-TEE has bumped the number of shared pages to
four.

Let's remove our explicit check and allow the request to reach OP-TEE even
if it's bigger than what it supports.  There's no need to sanitize the
number of pages internally.  OP-TEE will fail if we try to write more
than it's allowed. The error will just trigger later on,  during the
StMM access.

While at it add an error message to help users figure out what failed.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>

Signed-off-by: Ilias Apalodimas <apalos@gmail.com>
2021-12-26 06:49:14 +01:00
cc65faf2a3 efi: fix typo in description of struct efi_entry_hdr
Add missing colon.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-26 06:49:14 +01:00
376b08d0f1 rockchip: mkimage: Add support for rk3568 SoC
rk3568 is the first SoC which supports idb header v2.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 18:30:08 +08:00
8935e5299d rockchip: mkimage: Add support for idb header V2
Rockchip BootRom supports new idb header v2 instead of legacy version.
Add support for it so that we can generate image for new SoCs.

Signed-off-by: Yi Liu <liuyi@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 18:30:08 +08:00
0faa7da54a rockchip: mkimage: Add image header version
We are going to have more than one version header, add the version in the
header info.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 18:00:36 +08:00
d7a4461be0 rockchip: mkimage: rename RK_SIGNATURE to RK_MAGIC
The first 4byte of idbimage is a magic number instead of signature,
correct it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 17:58:32 +08:00
7af3a46ce9 configs: rock-pi-4: Enable rockchip efuse support
Enable efuse support for reading the cpuid#, serial# and generate a
board unique mac address

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 15:17:59 +08:00
eaee44aaaa rockchip: boot_mode: fix fastboot command
The USB controller index must be separated from the type argument,
otherwise the preboot command fails with the error:

	Error: Wrong USB controller index format

Add the missing space to fix fastboot mode here.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 15:17:51 +08:00
2206356a3e power: pmic/fan53555: allow dm be omitted by SPL
Allow the dm driver be omitted by SPL.

Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 15:15:03 +08:00
0ade02526b engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 14:56:58 +08:00
19a4d31c12 arm64: dts: rockchip: Sync px30 from linux-next
Sync the px30 devicetree files from linux-next tree.

commit <14ce8069f48b> ("lib/stackdepot: allow optional init and
stack_table allocation by kvmalloc() - fixup3")

Note, this path even sync rk3326 files as it depends on px30.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 14:56:58 +08:00
43419b936c arm64: dts: rockchip: px30: Move dmc into -u-boot.dtsi
dmc node is specific to U-Boot, it is always better practice
to maintain U-Boot specific nodes into -u-boot.dtsi files
in order to maintain Linux dts file sync compatibility.

Move the dmc into px30-u-boot.dtsi, also add dmc node
explicitly in rk3326-odroid-go2-u-boot.dtsi since it is
using px30.dts.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 14:56:58 +08:00
780fc003ed doc: rockchip: puma: update build and flash instructions
Long gone is the time a custom TF-A was needed for Puma, upstream TF-A
works just fine now.

The flashing instructions are updated to match how newer rkdeveloptool
and rkbin work.

Finally, rkbin provides a way to flash SPI via USB OTG interface so
let's document that.

Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 14:53:31 +08:00
f8b36089af dts: rockchip: rk3399: enable emmc phy for spl
adapting commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock
config for rk3399") to fix the issue "Not found emmc phy device".

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com> - on a Rock960
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se> - on a Pinebook Pro
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 14:46:25 +08:00
ef7f43084f rockchip: rk3568: add arch_cpu_init()
We configured the drive strength and security of EMMC in
arch_cpu_init().

Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 11:10:24 +08:00
6b97f2d0ed arm: dts: rockchip: rk3568: Enable sdhci and sdmmc0 node
Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi

Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 11:10:24 +08:00
daec31e5cc rockchip: Kconfig: Enable SPL support for rk3568
Enable SPL support in Kconfig and add some related option in
rk3568_common.h

Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 11:10:24 +08:00
b774be9de5 rockchip: px30: add support for HW RNG for Odroid Go Advance
The Odroid Go Advance has a hardware random number generator present.
The device does not have an upstream Linux driver, but does have a
U-Boot driver. Add the appropriate node so that the hardware RNG can be
used in U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-12-24 10:58:59 +08:00
fe3dde3e7b cmd: kaslrseed: add command to generate value from hwrng
Allow the kaslr-seed value in the chosen node to be set from a hardware
rng source.

Tested on a Rockchip PX30 (Odroid Go Advance), you must have loaded
the devicetree first and prepared it for editing. On my device the
workflow goes as follows:

setenv dtb_loadaddr "0x01f00000"
load mmc 0:1 ${dtb_loadaddr} rk3326-odroid-go2.dtb
fdt addr ${dtb_loadaddr}
fdt resize
kaslrseed

and the output can be seen here:
fdt print /chosen
chosen {
        kaslr-seed = <0x6f61df74 0x6f7b996c>;
        stdout-path = "serial2:115200n8";
};

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-24 10:54:56 +08:00
734ad93376 Prepare v2022.01-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-20 11:15:15 -05:00
621158d106 Revert "image: Remove #ifdefs from select_ramdisk()"
This reverts commit f33a2c1bd0.

This causes a crash on some platforms as seen here:
https://lore.kernel.org/r/f153017b-c41a-0d32-67b9-f288e695f900@baylibre.com/

Reported-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-20 09:36:32 -05:00
08cf1a5e69 fw_setenv: Unbreak fw_setenv caused by buggy MEMISLOCKED use
Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.

Fixes: 8a726b852502 ("fw_setenv: lock the flash only if it was locked before")
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
2021-12-20 09:21:48 -05:00
1cd75ceae5 Merge tag '20211220-fixes-for-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for 20211220-fixes-for-2022.01

- mvtwsi: Swab the register address if its size is > 1
2021-12-20 08:51:53 -05:00
ccea46c05b i2c: mvtwsi: Swab the register address if its size is > 1
Testing on Armada XP with an EEPROM using register address with size
of 2 has shown, that the register address bytes are sent to the I2C
EEPROM in the incorrect order. This patch swabs the address bytes so
that the correct address is transferred to the I2C device.

BTW: This worked without any issues before migrating Armada XP to
DM I2C.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Holland <samuel@sholland.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Pali Rohár <pali@kernel.org>
Cc: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
2021-12-20 07:57:48 +01:00
d3213c26b5 Merge tag 'efi-2022-01-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc4-3

Documentation:

* add Calxeda Highbank/Midway board documentation

Bug fixes:

* call part_init() in blk_get_device_by_str() only for MMC
* fix an 'undefined' error in some driver model macros
2021-12-18 14:39:21 -05:00
3cfc042d43 dm: fix an 'undefined' error in some macros
Due to a non-existing parameter name in macro's, use of those macro's will
cause a compiler error of "undefined reference".
Unfortunately, dm test doesn't fail because a wrong name ("&dev", hence it
is accidentally a valid name in the context of a caller site) is passed on.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f262d4ca4b ("dm: core: Add a way to read platdata for all
	child devices")
Fixes: 903e83ee84 ("dm: core: Add a way to iterate through children,
	probing each")
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-18 12:05:19 +01:00
19b241c61f blk: add a helper function, blk_probe_or_unbind()
This function will be commonly used in block device drivers
in the succeeding patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-18 12:05:19 +01:00
5d21dfec4a part: call part_init() in blk_get_device_by_str() only for MMC
In blk_get_device_by_str(), the comment says: "Updates the partition table
for the specified hw partition."
Since hw partition is supported only on MMC, it makes no sense to do so
for other devices.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-18 12:05:19 +01:00
35f3ef93d6 doc: board: Add Calxeda Highbank/Midway documentation
The Calxeda servers are using U-Boot as the primary bootloader, which
was shipped as part of a firmware upgrade package.
Even though the machines are considered legacy at this point, the port
still works, so deserves some documentation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-18 12:05:19 +01:00
c03942ddc9 Merge commit '4720b83d2c711062cfb55f03591b8f12c897d7cb' of https://github.com/tienfong/uboot_mainline 2021-12-17 07:24:56 -05:00
4720b83d2c arm: socfpga: arria10: Enable double peripheral RBF configuration
Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17 12:58:01 +08:00
3b4ee40f20 arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF
This patch triggers warm reset to recover the MPFE NoC from corruption
due to high frequency transient clock output from HPS EMIF IOPLL at
VCO startup after peripheral RBF is programmed.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17 12:58:01 +08:00
2f27754eb7 arm: socfpga: arria10: Setting image magic value to romcode initswstate reg
The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID
value if the current FSBL image is found valid, otherwise BootROM will
look for next subsequent valid FSBL image when warm reset is triggered.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-12-17 12:58:01 +08:00
d7b1d8259e mtd: spi-nor-ids: Add support for W25Q01JV
Adds support for Winbond's new 128MB spi nor flash.

datasheet: https://www.winbond.com/resource-files/W25Q01JV%20SPI%20RevC%2005032021%20Plus%20dummy.pdf

Signed-off-by: Ram Narayanan <ramnara@linux.microsoft.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-16 12:58:47 +05:30
5b20efeafe Merge tag 'clk-2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-clk
Clock patches for v2022.01-rc3

This adds better logging support for many CCF drivers, and clarifies some
documentation regarding clk_get_rate.
2021-12-15 14:51:44 -05:00
560e1e0050 clk: define LOG_CATEGORY for generic and ccf clocks
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.

This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:16 -05:00
572c446e98 clk: cosmetic: reorder include files
Reorder include files in the U-Boot expected order:

the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.

It is a preliminary step for next patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:16 -05:00
9e578f6340 clk: fix clk_get_rate() documentation
Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:15 -05:00
e09ca91cfa Merge tag 'rpi-next-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
- enable RPi Zero 2 W
- fix MMC numbering issue
- Update link to documentation
2021-12-15 11:49:30 -05:00
5a59f634e9 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR
  setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)
2021-12-15 07:14:20 -05:00
fed5beca18 arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.

In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.

Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
a48e4287d6 pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.

In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.

Fixes: a7b61ab58d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
e967c84a6d pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
cfbd2bc695 Merge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm
- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling

# gpg verification failed.
2021-12-13 10:20:25 -05:00
5c592b636a ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:22 +01:00
98fe251a24 ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:11 +01:00
7c870f8d70 ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:04 +01:00
e1d7b0b9c5 ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:59 +01:00
44beea2845 ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:53 +01:00
e8e66801bd ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-12-13 14:33:47 +01:00
026c010c4a Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- A few clean ups for the RZG2
2021-12-13 07:11:09 -05:00
d5f1beb058 configs: beacon-rzg2m: Config to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
dcbf1145e2 ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
61b3a0101a arm: dts: Create common rz-g2-beacon-u-boot file
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other.  Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
1eaf61c84d arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3
The device trees for the Beacon RZ/G2[MNH] boards have undergone
some changes over time, so resync them now.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
182754f43a net: ravb: Support multiple clocks
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
a1c01b17c5 Merge tag 'efi-2022-01-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2022-01-rc4-2

UEFI:

* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app

# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2021-12-10 07:58:43 -05:00
d8063dc373 efi: Add a media/block driver for EFI block devices
Add a block driver which handles read/write for EFI block devices. This
driver actually already exists ('efi_block') but is not really suitable
for use as a real U-Boot driver:

- The operations do not provide a udevice
- The code is designed for running as part of EFI loader, so uses
    EFI_PRINT() and EFI_CALL().
- The bind method probes the device, which is not permitted
- It uses 'EFI' as its parent device

The new driver is more 'normal', just requiring its platform data be set
up in advance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
42b7f4212a efi: Add uclass for devices provided by UEFI firmware
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.

This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.

If the two uclasses can be unified, is left to future redesign.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
2abd8d1c99 efi: Rename UCLASS_EFI and IF_TYPE_EFI
These names are better used for access to devices provided by an EFI
layer. Use EFI_LOADER instead here, since these are only available in
U-Boot's EFI_LOADER layer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
f9b51dcf29 efi_loader: correctly handle no tpm device error
When the TCG2 protocol is installed in efi_tcg2_register(),
TPM2 device must be present.
tcg2_measure_pe_image() expects that TCP2 protocol is installed
and TPM device is available. If TCG2 Protocol is installed but
TPM device is not found, tcg2_measure_pe_image() returns
EFI_SECURITY_VIOLATION and efi_load_image() ends with failure.

The same error handling is applied to
efi_tcg2_measure_efi_app_invocation().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
9e32bf9362 efi_loader: check tcg2 protocol installation outside the TCG protocol
There are functions that calls tcg2_agile_log_append() outside
of the TCG protocol invocation (e.g tcg2_measure_pe_image).
These functions must to check that TCG2 protocol is installed.
If not, measurement shall be skipped.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
54bec17f6b efi_loader: efi_tcg2_register returns appropriate error
This commit modify efi_tcg2_register() to return the
appropriate error.
With this fix, sandbox will not boot because efi_tcg2_register()
fails due to some missing feature in GetCapabilities.
So disable sandbox if EFI_TCG2_PROTOCOL is enabled.

UEFI secure boot variable measurement is not directly related
to TCG2 protocol installation, tcg2_measure_secure_boot_variable()
is moved to the separate function.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
446266b024 doc: usage: Fix command in fdt overlay apply sequence
Literally adhering to the docs gave this wrong output:

    U-Boot> setenv fdtaddr 0x87f00000
    U-Boot> fdtaddr $fdtaddr
    Unknown command 'fdtaddr' - try 'help'

Fixes: d80162cfc5 ("doc: Document how to apply fdt overlays")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-09 11:43:25 -08:00
1530ad5bec Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This fixes two regressions: eMMC operation on boards with WiFi (so using
three MMC devices), and a repeated wrong error message in USB gadget
mode (fastboot, ums).
2021-12-09 08:43:30 -05:00
fbd9207e7f sunxi: Remove misleading USB-OTG charger message
The sunxi MUSB glue driver has some code to check for external VBUS
presence when it's going to use the MUSB host mode, and it warns if
there is VBUS provided through the cable (in sunxi_musb_enable()).

This code was apparently copied to the USB gadget detection code
(g_dnl_board_usb_cable_connected()), but here we actually *expect*
external VBUS power, so a warning is wrong and confusing.
So far this message rarely triggered, but a recent patch (6fa41cdd19)
changed this:
===========================
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe90000
A charger is plugged into the OTG
/A charger is plugged into the OTG
\A charger is plugged into the OTG
|A charger is plugged into the OTG
-A charger is plugged into the OTG
....
===========================

Remove the message for the gadget cable detection call, and just return
the status of the VBUS detection, as this is what the callers are after.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-08 23:07:15 +00:00
e32dad292a sunxi: dts: Fix typoed eMMC check
Commit 03510bf621 ("sunxi: only include alias for eMMC when mmc2
used") protected the eMMC alias in U-Boot's DT stub the with the
associated Kconfig symbol, but was actually using the wrong name.

Fix the name of the symbol to match what's defined in Kconfig and what
the defconfig files actually use.

Fixes: 03510bf621 ("sunxi: only include alias for eMMC when mmc2 used")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: 5kft@5kft.org
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-08 23:06:56 +00:00
558002a0f2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-12-03 09:02:49 -05:00
5b9ee01685 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-net
- Two fixes from Marek for designware and mdio.
2021-12-02 09:58:20 -05:00
c0ffc12a70 riscv: Enable SPI flash env for SiFive Unmatched.
Enable saving environment to SPI flash memory on SiFive
Unmatched.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
6a863894ad riscv: Support booting SiFive Unmatched from SPI.
Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
ffb78a7c71 doc: board: Update Microchip MPFS Icicle Kit doc
UART1 use for U-Boot and Linux console instead of UART0 and
UART0 is reserved for Hart Software Services(HSS).

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-12-02 16:43:52 +08:00
5c007d24b9 riscv: Update Microchip MPFS Icicle Kit support
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addresses and default build for SBI_V02.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:52 +08:00
06142d6874 riscv: dts: Split Microchip device tree
The device tree split into .dtsi and .dts files, common
device node for eMMC/SD, enable I2C1, UART1 for console
instead of UART0, enable the DDR 2GB memory and in
that 288MB memory is reserved for fabric buffer.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
0dc0d1e094 i2c: Add Microchip PolarFire SoC I2C driver
Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
0d914ad10d net: macb: Remove Microchip compatible string
Remove the microchip compatible string and default compatible "cdns,macb"
support both 32-bit and 64-bit DMA access.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
666da85dc9 board: ae350: Support autoboot from RAM
Add boot command "bootcmd_ram" to support autoboot from RAM.

This feature could be useful at the very initial state of chip design
when there is only a minimal set of peripheral. (e.g. without mmc and mac ..etc)

The kernel image is default to be loaded at 0x2000000 via debug port,
and the following script serves as an example:

spl()
{
	cmd="riscv64-linux-gdb -q \
	-ex \"target remote $host:$port\" \
	-ex \"load\" \
	-ex \"thread apply all set \\\$pc=&_start\" \
	-ex \"thread apply all set \\\$a0=\\\$mhartid\" \
	-ex \"thread apply all set \\\$a1=<dtb address>\" \
	-ex \"restore u-boot.itb binary 0x200000\" \
	-ex \"restore Image binary 0x2000000\" \
	-ex \"c\" \
	spl/u-boot-spl
	"

	echo $cmd
	eval $cmd
}

The address where the kernel is loaded can be altered by
changing the value of KERNEL_IMAGE_ADDR.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-12-02 16:43:45 +08:00
3fbd17aadf net: dwc_eth_qos: Enable clock in probe
Enable DWC IP clock in driver probe, so the MII access is possible even
outside of active network transfers. This is particularly useful when
using 'mii' or 'mdio' commands to explore PHY state, neither of which
works with DWMAC currently due to the disabled clock.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:35:44 +02:00
8777033722 net: eth-phy: Handle gpio_request_by_name() return value
The gpio_request_by_name() returns zero in case of success, however the
conditional return value check in gpio_request_by_name() checks only for
(ret != -ENOENT) and if the condition is true, returns ret outright.

This leads to a situation where successful gpio_request_by_name() return
leads to immediate successful eth_phy_of_to_plat() return as well, and
to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the
PHY driver operates with valid reset GPIO, but with assert/deassert times
set to default, which is 0, instead of the values from DT. This breaks
PHY reset.

Fix this by checking if return value is non-zero and then for this one
single allowed non-zero return value, -ENOENT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:35:37 +02:00
b3425a3f4e mtd: spi: Remove SF_DUAL_FLASH symbol from Kconfig
This symbol is not used anywhere in the code. Just enable in couple of
defconfigs but it does nothing that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-02 11:33:01 +05:30
846d1d9c11 mtd: cqspi: Wait for transfer completion
Wait for the read/write transfer finish bit get actually cleared,
this does not happen immediately on at least SoCFPGA Gen5.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
2021-12-02 11:10:40 +05:30
874e544e89 Fix MMC numbering issue for Raspberry Pi 3
Using mmc.dtbo from rpi-firmware to switch the controller for the SD
card slot from sdhci to sdhost causes the numbering to change; the
SD card is then not recognized at boot.  Add to the range checked.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:07:40 +01:00
5e7e6619c8 rpi: Add identifier for the new RPi Zero 2 W
The Raspberry Pi Foundation released the new Zero 2 W which we
want to detect, so we can detect the correct device tree file name.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:01:23 +01:00
3ede1a62a6 rpi: Update the Raspberry Pi doucmentation URL
The Raspberry Pi Foundation has updated their documentation so update
the URL to the latest place to find the HW device revision codes.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:00:54 +01:00
4a14bfffd4 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- turris_omnia: enable A385 watchdog before disabling MCU watchdog
  (Pali)
- a37xx: Reset whole UART when changing parent clock from TBG to XTAL
  (Pali)
2021-11-30 08:59:22 -05:00
ca819284d3 Merge tag 'tpm-30112021' of https://source.denx.de/u-boot/custodians/u-boot-tpm
TPM2 API fixes

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-30 08:04:28 -05:00
ce29c52891 Merge tag 'efi-2022-01-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc4

Documentation:

* describe how to enable Virtio RNG on QEMU ARM

UEFI:

* enable testing the TCG2 protocol
* support TPM event log passed from firmware
2021-11-30 08:03:21 -05:00
c3de051c41 tis: fix tpm_tis_remove()
tpm_tis_remove() leads to calling tpm_tis_ready() with the IO region
unmapped and chip->locality == -1 (locality released). This leads to a
crash in mmio_write_bytes().

The patch implements these changes:

tpm_tis_remove(): Unmap the IO region after calling tpm_tis_cleanup().

tpm_tis_cleanup(): Request locality before IO output and releasing
locality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 14:11:05 +02:00
c0d9bb0b4a efi_loader: Extend PCR's for firmware measurements
Firmwares before U-Boot may be capable of doing tpm measurements
and passing them to U-Boot in the form of eventlog. However there
may be scenarios where the firmwares don't have TPM driver and
are not capable of extending the measurements in the PCRs.
Based on TCG spec, if previous firnware has extended PCR's, PCR0
would not be 0. So, read the PCR0 to determine if the PCR's need
to be extended as eventlog is parsed or not.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:49 +01:00
2957a1e224 tpm: use more algorithms than sha256 on pcr_read
The current tpm2_pcr_read is hardcoded using SHA256. Make the
actual command to TPM configurable to use wider range of algorithms.
The current command line is kept as is i.e limited to SHA-256 only.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:49 +01:00
34287efdaf efi_loader: Add check for event log passed from firmware
Platforms may have support to measure their initial firmware components
and pass the event log to u-boot. The event log address can be passed
in property tpm_event_log_addr and tpm_event_log_size of the tpm node.
Platforms may choose their own specific mechanism to do so. A weak
function is added to check if even log has been passed to u-boot
from earlier firmware components. If available, the eventlog is parsed
to check for its correctness and further event logs are appended to the
passed log.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:49 +01:00
3b7bf8a9e4 test: unit test for the EFI_TCG2_PROTOCOL
Encapsulate the UEFI EFI_TCG2_PROTOCOL unit test in an Python test.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-30 09:23:48 +01:00
617270b97b configs: enable CMD_TPM on QEMU ARM
With TPM emulation enabled in u-boot-test-hooks we should also provide the
tpm2 command used for the test/py/tests/test_tpm2.py test.

One of the Python TPMv2 tests expects sandbox specific values. So disable
it on other platforms.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-30 09:23:37 +01:00
9d2465347c doc: qemu-arm peripherials
* add description how to add RNG device
* for a disk specify format=raw to avoid a warning
* fix a typo

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-30 09:23:27 +01:00
5db5815e99 serial: a37xx: Reset whole UART when changing parent clock from TBG to XTAL
Sometimes UART stops transmitting characters after UART clock is changed
back to XTAL. In this state UART fifo is always full. Kernel during early
boot wants to print output on UART and is waiting for non-empty UART fifo.
Which leads to CPU hangup without any (debug) output on UART.

Marvell Armada 3700 Functional Specifications says that for programming
fractional divisor registers it is required to disable UART, enable
loopback mode, reset fifos, program registers, disable loopback mode,
release reset of fifos and enable UART.

But these steps do not fix above mentioned issue that UART hangup. Also
gating UART clock does not help. And even resetting UART state machines do
not help.

Experiments showed that UART fifo is unblocked after board is being reset
(during board reset UART HW transmit UART fifo even CPU is not executing
kernel/bootloader anymore).

And another experiments showed that same workaround can be achieved also
by external reset of UART HW (without need to reset board).

So do not implement any of "Marvell recommended" steps from Functional
Specifications as they do not work. And rather prior changing parent clock
back to XTAL, do external reset of UART HW. This operation also resets all
UART registers, so basically it also sets UART clock to default, which is
XTAL. It is unknown why UART hangups and enters such broken state.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-30 08:31:04 +01:00
10c3befc68 arm: mvebu: turris_omnia: enable A385 watchdog before disabling MCU watchdog
Commit aeb0ca64db ("arm: mvebu: turris_omnia: disable MCU watchdog in
SPL when booting over UART") disabled MCU watchdog when booting over
UART to ensure that watchdog does not reboot the board before UART
transfer finishes.

But if UART transfer fails for some reason, or if U-Boot binary crashes,
then board hangs forever as there is no watchdog running which could
reset it.

To fix this issue, enable A385 watchdog with very high timeout before
disabling MCU watchdog to ensure that even slow transfer can finish
successfully before watchdog timer expires and also to ensure that if
board hangs for some reason, watchdog will reset it.

Omnia's MCU watchdog has fixed 120 seconds timer and it cannot be
changed (without updating MCU firmware). A385 watchdog by default uses
25 MHz input clock and so the largest timeout value (2^32-1) can be
just 171 seconds. But A385 watchdog can be switched to use NBCLK (L2) as
input clock (on Turris Omnia it is 800 MHz clock) and in this case final
watchdog clock frequency is calculated as:

  freq = NBCLK / 2 / (2 ^ R)

So A385 watchdog on Turris Omnia can be configured to at most 1374
seconds (about 22 minutes). We set it to 10 minutes, which should be
enough even for bigger U-Boot binaries or slower UART transfers.

Both U-Boot and Linux kernel, when initializing A385 watchdog, switch
watchdog timer to 25 MHz input clock, so usage of NBCLK input clock in
U-Boot SPL does not cause any issues.

Fixes: aeb0ca64db ("arm: mvebu: turris_omnia: disable MCU watchdog in SPL when booting over UART")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-11-30 08:31:04 +01:00
ade37460a9 Prepare v2022.01-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-29 11:16:03 -05:00
2f7c7aeb5c board: iot2050: update build documentation for OP-TEE
Set ta-target explicitly to correspond with OP-TEE recipe in
siemens/meta-iot2050.

Errors without explicit set of ta-target:
aarch64-linux-gnu-gcc: error: unrecognized command-line option ‘-mthumb’
aarch64-linux-gnu-gcc: error: unrecognized command-line option ‘-mno-unaligned-access’
aarch64-linux-gnu-gcc: error: unrecognized command-line option ‘-mfloat-abi=hard’
make: *** [mk/compile.mk:159: out/arm-plat-k3/ta_arm32-lib/libdl/dlfcn.o] Error 1

Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-11-29 11:15:37 -05:00
270eeb6871 qemu: common: Fix build with update capsule
The common emulation Makefile has a dependency on a non-existent
qemu_capsule.o when building with support for capsule update enabled
(CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y).
The code which was in qemu_capsule.c has been completely moved to
lib/efi_loader/efi_capsule.c by commit 7a6fb28c8e ("efi_loader: capsule:
add back efi_get_public_key_data()").
Remove the false dependency.

This fixes the following build error:

  make[1]: *** No rule to make target 'board/emulation/common/qemu_capsule.o', needed by 'board/emulation/common/built-in.o'.  Stop.

Fixes: commit 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to .rodata"")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Simon Glass <sjg@chromium.org>
2021-11-29 11:15:37 -05:00
7d3bebb206 fastboot: Add maintainers entry
Add an entry in maintainers for fastboot. It is starting off orphaned, but
hopefully someone can pick it up.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2021-11-29 11:15:37 -05:00
4469d3b4db clk: Add myself as a maintainer for the clock subsystem
Lukasz has not been very responsive in reviewing clock patches. Add
myself as a maintainer.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2021-11-29 11:15:37 -05:00
693650b15d Merge tag 'efi-2022-01-rc3-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc3-2

Test:
* fix pylint warnings

UEFI:
* disable interrupts before removing devices in ExitBootServices()
* implement poweroff in efi_system_reset() on sandbox
* allow booting via EFI even if some block device fails
2021-11-26 17:10:53 -05:00
2b5e710859 test: fix pylint error in u_boot_console_exec_attach.py
* provide module docstring

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-26 22:02:37 +01:00
6e6d37f7f9 test: fix pylint error in u_boot_console_sandbox.py
* provide module docstring

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-26 22:02:37 +01:00
9aa1a14d13 test: fix pylint errors in u_boot_utils.py
* there is no os.path.unlink() method
* don't inherit from object
* add module docstring
* move imports to the top
* avoid unused variable

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-26 22:02:37 +01:00
67e9b64701 test: fix pylint errors in u_boot_spawn.py
* don't inherit from object
* imports should be on the top level
* avoid unused variable names
* avoid unnecessary else after raise

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-26 22:02:37 +01:00
09e409810a test: fix pylint errors in multiplexed_log.py
* don't inherit from object
* remove superfluous comprehension
* add module docstring

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-26 22:02:37 +01:00
9abd2ca96e efi_selftest: simplify endian conversion for FDT test
UEFI code is always little-endian. Remove a superfluous test.

Remove a superfluous type conversion.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-26 21:30:59 +01:00
9d1564dabc efi_loader: segfault in efi_clear_os_indications()
If we call efi_clear_os_indications() before initializing the memory store
for UEFI variables a NULL pointer dereference occurs.

The error was observed on the sandbox with:

    usb start
    host bind 0 sandbox.img
    load host 0:1 $kernel_addr_r helloworld.efi
    bootefi $kernel_addr_r

Here efi_resister_disk() failed due to an error in the BTRFS implementation.

Move the logic to clear EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED
to the rest of the capsule code.

If CONFIG_EFI_IGNORE_OSINDICATIONS=y, we should still clear the flag.
If OsIndications does not exist, we should not create it as it is owned by
the operating system.

Fixes: 149108a3eb ("efi_loader: clear OsIndications")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-26 21:30:59 +01:00
1ae35c72b8 test: address some pylint warnings
* remove unused variables
* module description must precede import statements
* fix inconsistent return values

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-26 21:30:59 +01:00
7a001e0f3d sandbox: poweroff in efi_system_reset()
efi_system_reset() should exit if called with EFI_RESET_SHUTDOWN.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-26 21:30:59 +01:00
cd9a26bfe5 efi_loader: efi_disk_register() should not fail
Our algorithm for creating USB device paths may lead to duplicate device
paths which result in efi_disk_register() failing. Instead we should just
skip devices that cannot be registered as EFI block devices.

Fix a memory leak in efi_disk_add_dev() caused by the duplicate device
path.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-26 21:30:59 +01:00
3f73e79de8 efi: Call bootm_disable_interrupts earlier in efi_exit_boot_services
If we look at the path that bootm/booti take when preparing to boot the
OS, we see that as part of (or prior to calling do_bootm_states,
explicitly) the process, bootm_disable_interrupts() is called prior to
announce_and_cleanup() which is where udc_disconnect() /
board_quiesce_devices() / dm_remove_devices_flags() are called from.  In
the EFI path, these are called afterwards.  In efi_exit_boot_services()
however we have been calling bootm_disable_interrupts() after the above
functions, as part of ensuring that we disable interrupts as required
by the spec.  However, bootm_disable_interrupts() is also where we go
and call usb_stop().  While this has been fine before, on the TI J721E
platform this leads us to an exception.  This exception seems likely to
be the case that we're trying to stop devices that we have already
disabled clocks for.  The most direct way to handle this particular
problem is to make EFI behave like the do_bootm_states() process and
ensure we call bootm_disable_interrupts() prior to ending up in
usb_stop().

Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-26 21:30:59 +01:00
2ad8d0cb95 Merge branch 'efi-2022-01' of https://source.denx.de/u-boot/custodians/u-boot-efi
Scripts:
* Update spelling.txt

LMB:
* remove extern keyword in lmb.h
* drop unused lmb_size_bytes()

Test:
* test truncation in snprintf()

Documentation:
* add include/lmb.h to HTML documentation

UEFI:
* reduce non-debug logging output for measured boot
* fix use after free in measured boot
* startup the tpm device when installing the protocol
* implement EFI_EVENT_GROUP_BEFORE_EXIT_BOOT_SERVICES
* record capsule result only if capsule is read
2021-11-20 09:36:37 -05:00
d6b55a420c efi_loader: startup the tpm device when installing the protocol
Due to U-Boot's lazy binding mentality the TPM is probed but not properly
initialized.  The user can startup the device from the command line
e.g 'tpm2 startup TPM2_SU_CLEAR'.  However we can initialize the TPM during
the TCG protocol installation,  which is easier to use overall.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-20 10:53:01 +01:00
5ba0397049 efi_loader: fix FinalEvents table if an EFI app invoked GetEventLog
As described in the TCG spec [1] in sections 7.1.1 and 7.1.2 the FinalEvent
table should include events after GetEventLog has been called.  This
currently works for us as long as the kernel is the only EFI application
calling that.  Specifically we only implement what's described in 7.1.1.

So refactor the code a bit and support EFI application(s) calling
GetEventLog.  Events will now be logged in both the EventLog and FinalEvent
table as long as ExitBootServices haven't been invoked.

[1] https://trustedcomputinggroup.org/wp-content/uploads/EFI-Protocol-Specification-rev13-160330final.pdf

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
dc52578d7b efi_loader: bump EFI_SPECIFICATION_VERSION to 2.9
We have implemented all what is new in UEFI specification 2.9 and relevant
for U-Boot.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-20 10:53:00 +01:00
22ad3f5f7b efi_selftest: unit test for EFI_GROUP_BEFORE_EXIT_BOOT_SERVICE
Add a test for the EFI_GROUP_BEFORE_EXIT_BOOT_SERVICE event group.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-20 10:53:00 +01:00
43eaf5b13f efi_loader: EFI_EVENT_GROUP_BEFORE_EXIT_BOOT_SERVICES
Implement the EFI_EVENT_GROUP_BEFORE_EXIT_BOOT_SERVICES event group
handling.

Add the definition of EFI_EVENT_GROUP_AFTER_READY_TO_BOOT.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-20 10:53:00 +01:00
5d49b32f0a efi_loader: capsule: Record capsule result only if capsule is read
Record capsule update result only if the capsule file is
successfully read, because the capsule GUID is not sure when
the file can not be read or the file is not a capsule.
Without this fix, if user puts a dummy (non-capsule) file
under (ESP)EFI/UpdateCapsule, U-Boot causes a synchronous
abort.

This also fixes use-after-free bug of the 'capsule' variable.

Fixes: c74cd8bd08 ("efi_loader: capsule: add capsule_on_disk support")
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
3961bd9b55 efi_loader: Reduce efi_tcg2 logging statement
log_info() is used for the debug level logging statement
which should use log_debug() instead. Convert it to reduce the
log output.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-20 10:53:00 +01:00
e032cb2ac9 efi_loader: Sphinx comments in efi_api.h
Fix incorrect Sphinx comments in efi_api.h:

* add missing 'struct'
* correct indentation

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-20 10:53:00 +01:00
45c16fd0c2 efi: add comment for efi_system_table and efi_configuration_table
This commit adds the comment for efi_system_table and
efi_configuration_table structure.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-20 10:53:00 +01:00
3f80064fd5 doc: fix typos in trace.rst
Fix obvious typos. Use US spelling consistently.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-20 10:53:00 +01:00
dfec0e9d9c scripts: update spelling.txt from upstream Linux
This list is used by checkpatch.pl. The Linux v5.15 version has several
words that where mispelled in U-Boot too.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-20 10:53:00 +01:00
0c9e8bf2bb test: test truncation in snprintf()
Test that the return value of snprintf() is correct in the case of
truncation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-20 10:53:00 +01:00
ac7606af7d lmb: fix typo 'commun'
%s/commun/common/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
7db07aa24f lmb: drop unused lmb_size_bytes()
lmb_size_bytes() is unused.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
951a8c4871 lmb: remove extern keyword in lmb.h
The extern keyword is not needed in include/lmb.h to declare functions.
Remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
4ad4c2daeb doc: add include/lmb.h to the HTML documentation
Correct Sphinx style comments in include/lmb.h

Add the logical memory block API to the HTML documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
5a515132d9 lmb: remove lmb_is_nomap() from include
Defining static functions in includes should be avoided.
Function lmb_is_nomap() is only used in the unit test.
So move it to the unit test.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-20 10:53:00 +01:00
454a97485a Merge tag 'u-boot-amlogic-20211119' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- pinctrl: Correct the driver GPIO declaration
- meson64_android: handle errors on boot and run fastboot on boot failure
2021-11-19 16:33:33 -05:00
b5f2c68d5c Merge tag 'tpm-19112021' of https://source.denx.de/u-boot/custodians/u-boot-tpm
TPM1.2 and Atmel fixes

# gpg verification failed.
2021-11-19 16:33:23 -05:00
28f70cfcfd configs: meson64_android: add PANIC stage for SYSTEM fails
If bootloader was updated without running oem format, reboot will cause
boot loop because the SYSTEM stage fails.

Add a final PANIC stage running fastboot to permit recovery.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2021-11-19 18:15:26 +01:00
bdc68df4dd configs: meson64_android: bypass other checks on run_fastboot=1
This can lead to GPT and BCB errors even if fastboot was selected early
by usb rom boot and the eMMC is blank/invalid.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2021-11-19 18:15:26 +01:00
886d36efdb pinctrl: meson: Correct the driver GPIO declaration
This should use the provided U_BOOT_DRIVER() macro so that the driver gets
added to the appropriate linker list. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7c9dcfed50 ("pinctrl: meson: rework gx pmx function")
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-11-19 18:15:26 +01:00
8391a0f3d9 Merge branch '2021-11-18-regression-fixes'
- An assortment of fixes related to GD, GD_FLG_SKIP_RELOC, and the lmb
- Environment fix on synquacer developmentbox
- Fix for get_info is not valid in partition code
2021-11-18 18:25:19 -05:00
b1f3f982fa arm64: Add missing GD_FLG_SKIP_RELOC handling
In case U-Boot enters relocation with GD_FLG_SKIP_RELOC, skip the
relocation. The code still has to set up new_gd pointer and new
stack pointer.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2021-11-18 18:20:19 -05:00
bd994c007a lmb: Reserve U-Boot separately if relocation is disabled
In case U-Boot starts with GD_FLG_SKIP_RELOC, the U-Boot code is
not relocated, however the stack and heap is at the end of DRAM
after relocation. Reserve a LMB area for the non-relocated U-Boot
code so it won't be overwritten.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2021-11-18 18:20:19 -05:00
47d7d03622 board_f: Copy GD to new GD even if relocation disabled
Even if U-Boot has relocation disabled via GD_FLG_SKIP_RELOC , the
relocated stage of U-Boot still picks GD from new_gd location. The
U-Boot itself is not relocated, but GD might be, so copy the GD to
new GD location even if relocation is disabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2021-11-18 18:20:19 -05:00
50f7b2effd part: return -ENOSYS when get_info not valid.
In some case, get_info() interface can be NULL, add this check to stop
from crash.

Signed-off-by: schspa <schspa@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-18 18:20:06 -05:00
0171d056ec Revert "board: synquacer: developerbox: Don't set gd->env_addr to default_environment"
Without default setting of gd->env_addr, U-Boot will cause
a synchronous abort if the env-variables on the SPI flash is
broken or not saved corectly. Set gd->env_addr correctly.

This reverts commit 535870f3b0.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2021-11-18 14:22:11 -05:00
4a08dba019 drivers: tpm: atmel_twi: fix printf specifier compile warning
%d was being used as the specifier for size_t, leading to a
compiler warning

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:36 +02:00
fb30d99df8 drivers: tpm: atmel_twi: implement get_desc operation
Without get_desc, the tpm command will not provide a
description of the device in 'tpm device' or 'tpm info'.

Due to the characteristics of the Atmel TPM it isn't
possible to determine certain attributes (e.g open/close
status) without using the TPM stack (compare Infineon
and ST TPM drivers), so just print out the chip model
and udevice name as the identifier.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:33 +02:00
fdb4a5fcd7 drivers: tpm: atmel_twi: do not use an offset byte
This driver was broken due to an empty offset byte being prepended
at the start of every transmission.

The hardware does not mimic an EEPROM device with registers so
an offset byte is not required.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:31 +02:00
02f50d8ebb drivers: tpm: atmel_twi: drop non-DM_I2C compatibility
There are no users of this driver without DM_I2C

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:29 +02:00
e845dd7c8b cmd: tpm-v1: fix load_key_by_sha1 compile errors
This command is not compiled by default and has not been updated alongside
changes to the tpmv1 API, such as passing the TPM udevice to the relevant
functions.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:27 +02:00
ebb6d74df3 cmd: tpm-v1: fix compile error in TPMv1 list resources command
This command is not compiled by default and was not
updated to pass the udevice to tpm_get_capability.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:21 +02:00
3144ba23bf Merge branch '2021-11-15-assorted-fixes'
- Rename "tqc" to "tq" and related updates
- Assorted minor ARM updates, build updates and documentation updates
2021-11-16 14:23:30 -05:00
2ffa0e87df Merge tag 'xilinx-for-v2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.01-rc3

sdhci:
- Fix emmc mini case with missing firmware interface

zynqmp:
- Restore JTAG interface if required
- Allow overriding board name
- Add support for DLC21
- Fix one fallthrought statement description
- Use config macro instead of name duplication
- Save multiboot to variable

firmware:
- Handle ipi_req errors better
- Use local buffer in case user doesn't need it instead of NULL/0 location

spi:
- gqsi: Fix write issue at low frequencies

net:
- gem: Disable broadcasts
2021-11-16 09:51:04 -05:00
4b32531be2 image: Explicitly declare do_bdinfo()
Compiler is not happy:

common/image-board.c: In function ‘boot_get_kbd’:
common/image-board.c:902:17: warning: implicit declaration of function ‘do_bdinfo’ [-Wimplicit-function-declaration]
  902 |                 do_bdinfo(NULL, 0, 0, NULL);
      |                 ^~~~~~~~~

Move the forward declaration to a header.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-15 14:33:33 -05:00
b5f3850727 usb: doc: Fix spelling issues in README.usb
Fix spelling issues in README.usb.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-11-15 14:33:33 -05:00
38de2bad64 arm: Fix bad memcpy.S str8w macro argument count
Remove the extra (empty) argument passed to str8w, causing the following
error:

   <instantiation>:40:47: error: too many positional arguments
     str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
                                                 ^
   u-boot/arch/arm/lib/memcpy.S:240:5: note: while in macro instantiation
   17: forward_copy_shift pull=16 push=16
       ^

Note: no functional change intended.

Fixes: d8834a1323 ("arm: Use optimized memcpy and memset from linux")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-11-15 14:33:32 -05:00
4d492b0c0f configs: synquacer: Fix dfu_alt_info to use nor1
Fix dfu_alt_info to use nor1 instead of the device name.
This reverts a part of commit 59bd18d4c4 ("configs: synquacer:
Remove mtdparts settings and update DFU setting") because the
commit a4f2d83414 ("mtd: spi: nor: force mtd name to "nor%d"")
changed the mtd device naming scheme to nor%d.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-15 14:33:32 -05:00
5130102fc4 makefile: add missing semicolons
On some distributions, as Debian GNU 11, this targets fails
with errors.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
2021-11-15 14:33:32 -05:00
a5e305256b board: tq: fix spelling of "TQ-Systems"
"TQ-Systems" is written with a dash.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-11-15 14:33:32 -05:00
679530c3c6 board: rename "tqc" vendor to "tq"
The subdivision name "TQ Components" hasn't been in use for a long time.
Rename the vendor directory to "tq", which also matches our Device Tree
vendor prefix.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-11-15 14:33:32 -05:00
9d3d981661 arm64: relocate-rela: Add support for ld.lld
Cap end of relocations by the binary size.

Linkers like to insert some auxiliary sections between .rela.dyn and
.bss_start. These sections don't make their way to the final binary, but
reloc_rela still tries to relocate them, resulting in attempted read
past the end of file.

When linking U-Boot with ld.lld, the STATIC_RELA feature (enabled by
default on arm64) breaks the build. After this patch, U-Boot can be
linked successfully with and without CONFIG_STATIC_RELA.

Originally-from: Elena Petrova <lenaptr@google.com>
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: David Brazdil <dbrazdil@google.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Tom Rini <trini@konsulko.com>
2021-11-15 14:33:32 -05:00
9272805139 Prepare v2022.01-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-15 11:58:37 -05:00
f4642e58e0 usb: Make USB_MUSB_PIO_ONLY selected by USB_MUSB_SUNXI
This ensures the USB_MUSB_PIO_ONLY config is set to an apppropriate
value from the changes enabling USB_MUSB_GADGET does.

Namely, USB_MUSB_PIO_ONLY default to =y on USB_MUSB_SUNXI being y.

Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
2021-11-15 11:17:39 -05:00
11c0255cd8 xilinx: zynqmp: fix ZYNQMP_RESTORE_JTAG check
Config check should be done without the SPL_ prefix.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/20211104192802.3093811-1-ricardo@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-11-15 15:59:33 +01:00
99cffa233c Dockerfile, CI: Update to latest "focal" tag
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-14 10:30:48 -05:00
8a87d1ae95 Dockerfile: build swtpm
For testing the TPM drivers and the EFI_TCG2_PROTOCOL we need the tool
swtpm.

Once we move to Ubuntu Impish we can take libtpms from package libtpms-dev.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-14 10:30:48 -05:00
e035ce4b3b Merge tag 'dm-pull-13nov21' of https://source.denx.de/u-boot/custodians/u-boot-dm
env tidy-ups
test fixes
binman fixes and ELF enhancements
2021-11-13 21:14:51 -05:00
b8a156f54e Merge tag 'efi-2022-01-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc2-2

UEFI:
* fix measurement of BootOrder variable for TCG2 protocol

TPM:
* TIS mmio driver. This driver supports QEMU's emulated TPM.
2021-11-13 18:13:35 -05:00
89cc0520d7 binman: Fix replace subcommand help and comments
Fix some copy&paste artifacts.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-11-13 14:29:25 -07:00
c1df3d54d6 bootstage: Differentiate boot progress kconfig entries
Both U-Boot proper and SPL entries were using the same description.

Fixes: b55881dd ("bootstage: Add SPL support")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:17:22 -07:00
592e2e5929 sandbox: fix sandbox_wdt_expire_now()
With CONFIG_SYSRESET_WATCHDOG=y the sandbox can use a watchdog based system
reset.

To make this work calling sandbox_wdt_expire_now() must lead to a reset.

With this change we can test the development suggested in

  [PATCH 0/4] Improved sysreset/watchdog uclass integration
  https://lists.denx.de/pipermail/u-boot/2021-August/458656.html

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:52 -07:00
ace5bb3eca test/dm: fix watchdog test
For successful execution of the watchdog test we need both the GPIO as well
as the SANDBOX watchdog.

Avoid a build failure for CONFIG_WDT_GPIO=n.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:52 -07:00
ebee206ad9 Makefile: Correct TPL rule for OF_REAL
Correct an error in the tpl-dtb parameter to binman. At present the TPL
rule follows SPL but this is not correct, if TPL uses of-platdata, for
example.

Fixes: f99cbe4e86 ("fdt: Update Makefile rules with the new OF_REAL Kconfig")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-13 08:16:52 -07:00
4e7c8b2a1c env: Simplify env_get_default()
Instead of pretending that we don't have environment to force searching
default environment in env_get_default(), get the data from the
default_environment[] buffer directly.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
e8459c12fd env: Fix env_get() when returning empty string using env_get_f()
The env_get_f() function returns -1 on failure. Returning 0 means that
the variable exists, and is empty string.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
c9db4c5440 env: Don't set ready flag if import failed in env_set_default()
Do not set GD_FLG_ENV_READY nor GD_FLG_ENV_DEFAULT if failed importing
in env_set_default().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
0427bed63b binman: Support updating the dtb in an ELF file
WIth EFI we must embed the devicetree in an ELF image so that it is loaded
as part of the executable file. We want it to include the binman
definition in there also, which in some cases cannot be created until the
ELF (u-boot) is built. Add an option to binman to support writing the
updated dtb to the ELF file u-boot.out

This is useful with the EFI app, which is always packaged as an ELF file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
7115f00bb7 binman: Tidy up comments on _DoTestFile()
The comment for this function is missing an argument and the return value.
Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
056f0efd8b binman: Support reading the offset of an ELF-file symbol
Binman needs to be able to update the contents of an ELF file after it has
been build. To support this, add a function to locate the position of a
symbol's contents within the file.

Fix the comments on bss_data.c and Symbol while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
2fb2cd75f3 binman: Report an error if test files fail to compile
At present any error from the 'make' command is silently swallowed by the
test system. Fix this by showing it when detected.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
e5eaf810f9 patman: Use a ValueError exception if tools.Run() fails
The Exception base class is a very vague and could be confusing to the
test system. Use the more specific ValueError exception instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-13 08:16:39 -07:00
a51673eb75 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 23:37:42 +00:00
e0d7d06f39 Merge branch '2021-11-12-Kconfig-migrations'
- An assortment of "finish migrating .." symbol patches.  This will help
  make it harder for migrated symbols to end up again in board config.h
  files.
2021-11-12 18:33:12 -05:00
82cd1e3da0 Convert CONFIG_LAST_STAGE_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_LAST_STAGE_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
d3fb2e3991 Remove CONFIG_SERIAL_MULTI
This symbol has been functionally dead for a long time.  Remove the last
and recent re-introductions of setting it, and update the whitelist so
it will not be re-introduced again.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
1914075c88 Convert CONFIG_PL011_SERIAL et al to Kconfig
This converts the following to Kconfig:
   CONFIG_PL011_SERIAL
   CONFIG_PL01X_SERIAL

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
b8475e6aca Convert CONFIG_MACB to Kconfig
This converts the following to Kconfig:
   CONFIG_MACB

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
dfb34d0d4a Convert CONFIG_MD5 to Kconfig
This converts the following to Kconfig:
   CONFIG_MD5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
8a25b8b5b4 Convert CONFIG_MX6 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_MX6
   CONFIG_MX7

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
b70b2bed1a Convert CONFIG_IMX_BOOTAUX et al to Kconfig
This converts the following to Kconfig:
   CONFIG_IMX_BOOTAUX
   CONFIG_IMX_THERMAL

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
99e6feb23c Convert CONFIG_SYS_PROMPT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_PROMPT
   CONFIG_SYS_PROMPT_HUSH_PS2

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
21e0432058 Convert CONFIG_I2C_EDID et al to Kconfig
This converts the following to Kconfig:
   CONFIG_I2C_EDID
   CONFIG_I2C_EEPROM

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
8bd39de9b1 Convert CONFIG_PHYLIB et al to Kconfig
This converts the following to Kconfig:
   CONFIG_PHYLIB
   CONFIG_PHY_ATHEROS
   CONFIG_PHY_GIGE
   CONFIG_MII

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
406257ae41 Convert CONFIG_MISC_INIT_F et al to Kconfig
This converts the following to Kconfig:
   CONFIG_MISC_INIT_F
   CONFIG_MISC_INIT_R

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
53b3df4e0c Convert CONFIG_TRACE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_TRACE
   CONFIG_TRACE_BUFFER_SIZE
   CONFIG_TRACE_EARLY
   CONFIG_TRACE_EARLY_ADDR
   CONFIG_TRACE_EARLY_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
c745299156 Convert CONFIG_SYS_CONSOLE_IS_IN_ENV to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_CONSOLE_IS_IN_ENV

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
27480e0a9f Convert CONFIG_ENV_IS_IN_SPI_FLASH et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_IS_IN_SPI_FLASH
   CONFIG_ENV_IS_NOWHERE
   CONFIG_ENV_OFFSET
   CONFIG_ENV_OVERWRITE
   CONFIG_ENV_SECT_SIZE
   CONFIG_SYS_MMC_ENV_DEV
   CONFIG_SYS_MMC_ENV_PART

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
1ed68f9204 Convert CONFIG_FSL_USDHC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_USDHC

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
75c995a1be Convert CONFIG_FSL_LAYERSCAPE to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_LAYERSCAPE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:17 -05:00
45e19cf378 Convert CONFIG_BITBANGMII to Kconfig
This converts the following to Kconfig:
   CONFIG_BITBANGMII

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:16 -05:00
b67f54b10b Convert CONFIG_DOS_PARTITION to Kconfig
This converts the following to Kconfig:
   CONFIG_DOS_PARTITION

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:16 -05:00
a8f31121fb Convert CONFIG_E1000 to Kconfig
This converts the following to Kconfig:
   CONFIG_E1000

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:16 -05:00
b8260c1715 Convert CONFIG_ARCH_CPU_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_CPU_INIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-12 14:18:16 -05:00
515bf78ff9 Merge branch '2021-11-12-assorted-updates'
- A number of pxe related cleanups and related re-organization.
- A few related pxe/sysboot/extlinux improvements
- Remove some dead code.
- Update Azure to use a newer Windows build environment
- Add a .get_maintainer.conf file
- A few minor TI SoC platform updates
2021-11-12 10:14:24 -05:00
6f84e809d9 rtc: ds1337: fix compatible string typo
The driver supports the ds1339 as well, which was probably intended by
the author but prevented by a typo. Fix the typo.

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
2021-11-11 19:02:44 -05:00
f01081d8f7 boards: siemens: iot2050: Ignore network errors during bootstage tracking
We need to filter out NET_ETH_START errors because we have to enable
networking in order to propagate the MAC addresses to the DT while there
is no network driver for the prueth in U-Boot yet.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-11-11 19:02:44 -05:00
83ef79b60b boards: siemens: iot2050: Re-enable bootstage reporting
This got lost while fixing up the condition in
board/siemens/iot2050/board.c

Fixes: b55881dd ("bootstage: Add SPL support")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-11 19:02:44 -05:00
33fa496aea ARM: dts: am335x-chiliboard: add /chosen/tick-timer
Commit 4b2be78ab6 ("time: Fix get_ticks being non-monotonic") has
broken boot on chiliboard platform, as it requires '/chosen/tick-timer'
in device-tree. This resulted in following panic message:

  Could not initialize timer (err -19)

Provide missing chosen property in device-tree to fix chiliboard
support.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-11-11 19:02:44 -05:00
d507b25091 get_maintainer.pl: add .get_maintainer.conf
Since commit e57c7c5c42 ("get_maintainer.pl: update from Linux kernel
v5.13-rc6") only the top level MAINTAINERS file is used. This is because
this commit (accidentally) disabled the search of MAINTAINERS files
(find_maintainer_files is set to 0 again). Before that, commit
b79372ae94 ("scripts/get_maintainer.pl: enable find_maintainer_files")
explicitly enabled that feature. Nowadays, we also have to set
maintainer_path to a directory.

To fix it and enable recursive search of MAINTAINERS, create a
configuration file to set these two variables.

Signed-off-by: Michael Walle <michael@walle.cc>
2021-11-11 19:02:44 -05:00
38a9840d98 Azure: Move to windows-2019
As per https://github.com/actions/virtual-environments/issues/4312 the
Windows-2016 environments are scheduled for deprecation and removal in
early 2022.  Move to windows-2019 now to avoid this (Visual Studio 2019
is included here, hence the tag naming scheme change).

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-11 19:02:44 -05:00
7e713067ee Remove LYNX KDI remainders
The last board that used to set CONFIG_LYNXKDI has been removed in
commit 242836a893 ("powerpc: ppc4xx: remove pcs440ep support"),
doc/README.lynxkdi only talks about a MPC8260 board being supported,
and the mpc8260 support has been removed four years ago in commit
2eb48ff7a2 ("powerpc, 8260: remove support for mpc8260") already,
and common/lynxkdi.c only consists of an "#error" statement these
days, so it seems like the LYNX KDI code is dead code nowadays.
Let's remove it now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-11-11 19:02:44 -05:00
d50244e9d8 pxe: Allow calling the pxe_get logic directly
Refactor this code so that we can call the 'pxe get' command without going
through the command-line interpreter. This makes it easier to get the
information we need, without going through environment variables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:43 -05:00
37c5195dfc doc: Move distro boot doc to rST
Move this over to the new rST format.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:41 -05:00
81a2f8d34b pxe: Refactor sysboot to have one helper
The only difference between the three helpers is the filesystem type.
Factor this out and call the filesystem functions directly, instead of
through the command-line interpreter. This allows the file size to be
obtained directly, instead of via an environment variable.

We cannot do the same thing with PXE's tftpboot since there is no API
at present to obtain information about the file that was read. So there
is no point in changing pxe_getfile_func to use a ulong for the address,
for example.

This is as far as the refactoring can go for the present.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:39 -05:00
4d79e884ad pxe: Return the file size from the getfile() function
It is pretty strange that the pxe code uses the 'filesize' environment
variable find the size of a file it has just read.

Partly this is because it uses the command-line interpreter to parse its
request to load the file.

As a first step towards unwinding this, return it directly from the
getfile() function. This makes the code a bit longer, for now, but will be
cleaned up in future patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:36 -05:00
4a255ea3b6 lib: Add a function to convert a string to a hex value
Add an xtoa() function, similar to itoa() but for hex instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
2021-11-11 19:02:34 -05:00
3bfb0f719a lib: Add tests for simple_itoa()
Add test and a comment for this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
2021-11-11 19:02:32 -05:00
74b7a2b881 pxe: Drop get_bootfile_path()
This function no longer makes sense, since it is pretty easy to prepend
the boot directory to the filename. Drop it and update its only caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:30 -05:00
12df842ee3 pxe: Clean up the use of bootfile
The 'bootfile' environment variable is read in the bowels of pxe_util to
provide a directory to which all loaded files are relative.

This is not obvious from the API to PXE and it is strange to make the
caller set an environment variable rather than pass this as a parameter.

The code is also convoluted, which this feature implemented by
get_bootfile_path().

Update the API to improve this. Unfortunately this means that
pxe_setup_ctx() can fail, so add error checking.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:28 -05:00
9e62e7ca54 pxe: Move common parsing coding into pxe_util
Both the syslinux and pxe commands use essentially the same code to parse
and run extlinux.conf files. Move this into a common function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:27 -05:00
929860bfbb pxe: Tidy up code style a little in pxe_utils
There are a few more blank lines than makes sense for readability. Also
free() handles a NULL pointer so drop the pointless checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:26 -05:00
18109cc3fb pxe: Tidy up some comments in pxe_utils
Some of these functions are a big vague in the comments. Tidy them up a
bit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:25 -05:00
262cfb5b15 pxe: Move pxe_utils files
Move the header file into the main include/ directory so we can use it
from the bootmethod code. Move the C file into boot/ since it relates to
booting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:21 -05:00
8018b9af57 pxe: Tidy up the is_pxe global
Move this into the context to avoid a global variable. Also rename it
since the current name does not explain what it actually affects.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:19 -05:00
4ad5d51edb pxe: Add a userdata field to the context
Allow the caller to provide some info which is passed back to the
readfile() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:18 -05:00
b1ead6b908 pxe: Move do_getfile() into the context
Rather than having a global variable, pass the function as part of the
context.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:14 -05:00
fd3fa5c394 pxe: Use a context pointer
At present the PXE functions pass around a pointer to command-table entry
which is very strange. It is only needed in a few places and it is odd to
pass around a data structure from another module in this way.

For bootmethod we will need to provide some context information when
reading files.

Create a PXE context struct to hold the command-table-entry pointer and
pass that around instead. We can then add more things to the context as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:11 -05:00
3d24636e92 pxe: Move API comments to the header files
Put the function comments in the header file so that the full API can we
examined in one place.

Expand the comments to cover parameters and return values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-11 19:02:08 -05:00
19a91f2464 Create a new boot/ directory
Quite a lot of the code in common/relates to booting and images. Before
adding more it seems like a good time to move the code into its own
directory.

Most files with 'boot' or 'image' in them are moved, except:

- autoboot.c which relates to U-Boot automatically running a script
- bootstage.c which relates to U-Boot timing

Drop the removal of boot* files from the output directory, since this
interfers with the symlinks created by tools and there does not appear
to be any such file from my brief testing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
2021-11-11 19:01:56 -05:00
1e72ad6b38 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- device-tree sync-up with Linux for ls1028a
- fixes/update in fsl-ddr driver, fsl-validate, lx2162a, fsl-mc,
  spintable code, configs, qspi node, pci
- enable EFI_SET_TIME support in sl28
- powerpc: Drop -mstring
2021-11-11 09:04:20 -05:00
2a10e06e07 MAINTAINERS: Add entry for TPM drivers
TPM drivers have currently no maintainers.  Add myself since I contributed
the TIS implementation.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
be2868f097 doc: qemu: Add instructions for swtpm usage
A previous patch added support for an mmio based TPM.
Add an example in QEMU on it's usage

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
1fb868c6b2 configs: Enable tpmv2 mmio on qemu for arm/arm64
A previous commit is adding an MMIO TPMv2 driver.  Include in the default
qemu arm configs, since we plan on using them on EFI testing

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
a5c30c26b2 tpm: Use the new API on tpm2 spi driver
Convert our SPI TPM driver and use the newly added API

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
e0ff348997 tpm2: Add a TPMv2 MMIO TIS driver
Add support for devices that expose a TPMv2 though MMIO.
Apart from those devices, we can use the driver in our QEMU setups and
test TPM related code which is difficult to achieve using the sandbox
driver (e.g test the EFI TCG2 protocol).

It's worth noting that a previous patch added TPMv2 TIS core functions,
which the current driver is consuming.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
2c9626c463 tpm2: Introduce TIS tpm core
There's a lot of code duplication in U-Boot right now.  All the TPM TIS
compatible drivers we have at the moment have their own copy of a TIS
implementation.

So let's create a common layer which implements the core TIS functions.
Any driver added from now own, which is compatible with the TIS spec, will
only have to provide the underlying bus communication mechanisms.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
c9e6d9c8e5 tpm: refactor function names for LPC based TPMs
With the upcoming TPM2 API, some of the functions name are part of the new
header file.  So switch conflicting internal function names and defines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
07b6b15bb2 tpm: refactor function names and macros for infineon v1.2 TPM
With the upcoming TPM2 API, some of the functions name are part of the new
header file.  So switch conflicting internal function names and defines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
c9c1cdbda3 efi_loader: fix BootOrder variable measurement handling
UEFI specification does not require that BootOrder is defined.
In current implementation, boot variable measurement fails and
returns EFI_NOT_FOUND if BootOrder is not defined.

This commit correcly handles this case, skip the boot variable
measurement if BootOrder is not defined.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-10 20:57:54 +01:00
166a77b34b Merge tag 'u-boot-stm32-20211110' of https://source.denx.de/u-boot/custodians/u-boot-stm
- DHSOM update:
   - Remove nWP GPIO hog
   - Increase SF bus frequency to 50Mhz and enable SFDP
   - Disable video output for DHSOM
   - Disable EFI
   - Enable DFU_MTD support
- Create include file for STM32 gpio driver private data
- Split board and SOC STM32MP15 configuration
- Device tree alignement with v5.15-rc6 for STM32MP15
- Add binman support for STM32MP15x
- Normalise newlines for stm32prog
- Update OTP shadow registers in SPL
2021-11-10 14:11:30 -05:00
c8b2eef52b stm32mp15: tidy up #ifdefs in cpu.c
We should avoid #ifdef in C modules and the unused functions
are eliminated by the linker.

Use the more readable IS_ENABLE() instead.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:07:31 +01:00
f42045b2e7 stm32mp15: replace CONFIG_TFABOOT when it is possible
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced
by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.

This patch also simplifies the code in cpu.c, stm32mp1_ram.c and
clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and
without TFA) is not supported: the associated initialization code is
present only in SPL.

This cleanup patch is a preliminary step to support SPL load of OP-TEE
in secure world, with SPL in secure world and U-Boot in no-secure world.

Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:07:31 +01:00
17aeb589fa stm32mp15: remove configs dependency on CONFIG_TFABOOT
Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig
- always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI
  and CONFIG_CPU_V7_HAS_NONSEC
- CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig
- the correct sysreset driver is activated in each defconfig:
  CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON

Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:07:30 +01:00
9788708f03 arm: stm32mp: bsec: Update OTP shadow registers in SPL
Currently the upper OTP (after 57) are shadowed in U-Boot proper,
when TFABOOT is not used.

This choice cause an issue when U-Boot is not executed after SPL,
so this BSEC initialization is moved in SPL and no more executed in U-Boot,
so it is still executed only one time.

After this patch this BSEC initialization is done in FSBL: SPL or TF-A.

To force this initialization in all the case, the probe of the BSEC
driver is forced in SPL in the arch st32mp function: spl_board_init().

Even if today BSEC driver is already probed in STM32MP15x clock driver
clk_stm32mp1.c because get_cpu_type() is called in
stm32mp1_get_max_opp_freq() function.

Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:06:51 +01:00
819408d001 ARM: stm32: Align mtdparts with SPI NOR layout on DHSOM
The DHSOM uses different SPI NOR layout than the ST devkit, stop
pulling in the ST specific runtime mtdparts settings and adjust
the mtdparts accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:03:59 +01:00
d59c65817c ARM: stm32: Disable video output on DHSOM
The video output support is unused and disabling it saves about 20 kiB of space.
In case video output support is required, it can be re-enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:03:59 +01:00
00d7878275 ARM: stm32: Disable EFI on DHSOM
The EFI support is unused and disabling it saves about 70 kiB of space.
In case EFI support is required, it can be re-enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:03:59 +01:00
848da6f17a ARM: stm32: Increase default SF bus frequency to 50 MHz and enable SFDP
Increase default SPI NOR bus frequency from 1 MHz to 50 MHz and
enable SFDP parsing to obtain more accurate SPI NOR configuration.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:03:59 +01:00
eb319d8795 ARM: dts: stm32: Drop nWP GPIO hog on DHSOM
The nWP GPIO hog was used to unlock the SPI NOR write protect when U-Boot
used to operate the SPI NOR in 1-1-1 mode. Now that the SPI NOR is operated
in 1-1-4 mode, the hog has adverse effects and causes transfer corruption,
since the hogged pin is also the IO2 pin. Remove the hogs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:03:59 +01:00
c5eb35651c ARM: stm32: Enable DFU MTD support on DHSOM
All the STM32MP1 based DHSOM have SPI NOR from which they boot,
enable DFU_MTD support to make it possible to expose that SPI NOR
via the DFU.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 17:03:57 +01:00
56a368f661 gpio: stm32: create include file for driver private data
The stm32 gpio driver private data are not needed in arch include files,
they are not used by code except for stm32 gpio and pincontrol drivers,
using the same IP; the defines for this IP is moved in a new file
"stm32_gpio_priv.h" in driver/gpio.

This patch avoids to have duplicated file gpio.h for each SOC
in MPU directory mach-stm32mp and in each MCU directory arch-stm32*
and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-10 17:03:36 +01:00
c67ca25dfc board: stmp32mp1: split board and SOC STM32MP15 configuration
Add a configuration file "stm32mp15_st_common.h" to handle the
STMicroelectronics boards configuration and rename stm32mp1.h to
"stm32mp15_common.h" to handle the generic STM32MP15x series configuration.

The configuration file "dh_stm32mp1.h" is also renamed to
"stm32mp15_dh_dhcom" for the configuration of board based on the
dhelectronics STM32MP15x SOM.

In the STMicroelectronics board configuration the default bootcmd
"bootcmd_stm32mp" is updated to only select the extlinux file found on
SD-Card on STM32MP15x EV1 for boot from NOR device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-10 17:03:36 +01:00
784c567317 arm: dts: stm32mp15: alignment with v5.15-rc6
Device tree alignment with Linux kernel v5.15-rc6
- Set {bitclock,frame}-master phandles on ST DKx
- Add coprocessor detach mbox on stm32mp15x-dkx boards
- Add coprocessor detach mbox on stm32mp157c-ed1 board

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-10 17:03:36 +01:00
6354913def Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell
- Minor kwboot improvements (Pali)
- Misc kwbimage improvements (Pali)
- pci_mvebu: Use global MBUS_PCI_MEM_SIZE macro (Pali)
2021-11-10 09:15:18 -05:00
5564b4cd4d stm32mp: add binman support for STM32MP15x
Use binman to add the stm32image header on SPL binary for basic boot
or on U-Boot binary when it is required, i.e. for TF-A boot without FIP
support, when CONFIG_STM32MP15x_STM32IMAGE is activated.

The "binman" tool is the recommended tool for specific image generation.
This patch allows to suppress the config.mk file and it is a preliminary
step to manage FIT generation with binman.

The init_r parsing of U-Boot device tree to search the binman
information is not required for STM32MP15, so the binman library
can be removed in U-Boot (CONFIG_BINMAN_FDT is deactivated).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-10 15:12:16 +01:00
3067971aa9 stm32mp: stm32prog: Normalise newlines
The missing trailing newline could confuse check-config.sh if the
definition of an option was on the first line of the next file that
find(1) happened to return.

Signed-off-by: William Grant <wgrant@ubuntu.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10 15:11:15 +01:00
5c61710c98 tools: kwbimage: Properly set srcaddr in kwbimage v0
Field srcaddr in kwbimage v0 needs to be adjusted similarly like in v1.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
851114be1a tools: kwbimage: Properly calculate and align kwbimage v0 header size
Kwbimage v0 has similar alignment requirements as v1.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
2b0980c240 tools: kwbimage: Fill the real header size into the main header
Fill the real header size without padding into the main header

This allows to reduce final image when converting image to another format
which does not need additional padding.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
5cad2e6cce tools: kwbimage: Align kwbimage header to proper size
Currently kwbimage header is always aligned to 4096 bytes. But it does not
have to be aligned to such a high value.

The header needs to be just 4-byte aligned, while some image types have
additional alignment restrictions.

This change reduces size of kwbimage binaries by removing extra padding
between header and data part.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
e23ad5d55c tools: kwbimage: Do not put final image padding to the image data size
This change allows to convert image from one format to another without need
to include unnecessary padding (e.g. when target image format has smaller
alignment requirement as source image format).

Do it by storing real image data size without padding to the kwbimage
header.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
188099ed7f tools: kwbimage: Align final UART image to 128 bytes
xmodem block size is 128 bytes, therefore it is possible to transfer only
images with size multiple of 128 bytes. kwboot automatically pads image
with zero bytes at the end to align it to 128 bytes boundary.

Do this padding when generating image to allow uploading with other xmodem
tools or older kwboot versions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
56087c1b4d tools: kwbimage: Remove unused enums and prototypes
There are more unused enums and function prototypes. Remove them. The
function kwbimage_check_params() does not return enum kwbimage_cmd_types,
but a boolean value returned as int.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
700ea98b2e tools: kwbimage: Fix validation of kwbimage v0
kwbimage v0 sldo has 32-bit data checksum at the end like kwbimage v1.

Use same data checksum validation for both v0 and v1 image types.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
d1547b3672 tools: kwbimage: Set BOOT_FROM by default to SPI
kwbimage must have valid blockid member instead of zero value. Thus if
config file does not contain BOOT_FROM command, use by default the value
for SPI booting (which is probably the most common).

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
01bdac6df6 tools: kwbimage: Explicitly set version also for kwbimage v0
For documentation purposes update struct main_hdr_v0 to include information
where version of the image must be stored. For kwbimage v0 it obviously
must be 0. By default all image header memory is initialized to zero,
therefore this change has no functional effect.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
12f2c03f4d tools: kwbimage: Add support for new commands UART_PORT and UART_MPP
These two commands allow to specify custom setting of UART port used for
printing BootROM messages.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
cbf0d3a56d pci: pci_mvebu: Use global MBUS_PCI_MEM_SIZE macro
Header file mach/cpu.h already defines MBUS_PCI_MEM_SIZE macro which
defines size of MBUS_PCI_MEM_BASE window. So use global MBUS_PCI_MEM_SIZE
macro instead of locally defined PCIE_MEM_SIZE macro. Both macros have same
definition.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
75176dc863 tools: kwboot: Always print kwboot version
It is useful to see kwboot version in the boot log output for debugging
purposes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:06 +01:00
f8017c3779 tools: kwboot: Fix sending Kirkwood v0 images
Properly calculate and align image header size to xmodem block size.

Kirkwood v0 images do not have stored total size of header in header
structure itself like it is for v1 images. So kwbheader_size() calculates
size by traversing image structure itself. Aligning is done in kwboot by
putting zero padding bytes between the header and data part.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-10 12:08:05 +01:00
a7795821ce Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
- watchdog: don't autostart watchdog on Sunxi boards
2021-11-09 22:26:56 -05:00
86798ee0c1 watchdog: don't autostart watchdog on Sunxi boards
The Sunxi boards only support a 16 second watchdog timeout. This is too
short to boot Linux. The UEFI specification requires 300 seconds as
default timeout.

Change the default for CONFIG_WATCHDOG_AUTOSTART for ARCH_SUNXI.

Fixes: b147bd3607 ("sunxi: Enable watchdog timer support by default")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-11-10 01:38:07 +00:00
e8e9c6f484 Merge https://source.denx.de/u-boot/custodians/u-boot-samsung
[trini: Migrate CONFIG_EXYNOS7420 as part of merging, so espresso7420
still builds]

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-09 15:05:33 -05:00
99e1fa89f1 configs: ls1028a: ensure Ethernet is enabled
CONFIG_FSL_ENETC is not explicitly enabled in the NXP LS1028A config
files, instead it is selected by CONFIG_MSCC_FELIX_SWITCH, a state of
matters which is fragile.

CONFIG_MSCC_FELIX_SWITCH depends on CONFIG_DM_DSA, which depends on
CONFIG_PHY_FIXED.

Not all LS1028A boards did enable CONFIG_PHY_FIXED, which resulted in
all of Ethernet being compiled out.

This patch makes sure that CONFIG_PHY_FIXED is enabled for all LS1028A
boards, and CONFIG_FSL_ENETC as well - don't rely on that fragile
selection done by the Felix switch config.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
be38416034 pci: layerscape: Fix the LUT and msi-map mismatch issue
In the current code, it doesn't reset the cursors of LUT entry and
StreamID at the beginning of the fixup, so it can result in LUT entry
setup and msi-map mismatch and LUT entries and StreamID leaking
when reload and fixup the DTB.
This patch move the initialization of LUT entry and StreamID cursors
to the beginning of the fixup to resolve the issues.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
a97a071d10 configs: fsl: migrate FMAN/QE specific defines to Kconfig
Use moveconfig.py script to convert CONFIG_SYS_FMAN_FW_ADDR,
CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_QE_FMAN_FW_LENGTH to Kconfig and
move these entries to defconfigs.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
5e736c9397 configs: ls1046aqds: Configure environment related configs
LS1046A-QDS board requires updation in few environment configs in TFA
defconfigs of the board.

Following are the changes:
- Update CONFIG_ENV_ADDR
- Update CONFIG_ENV_SECT_SIZE
- Enable CONFIG_SYS_RELOC_GD_ENV_ADDR

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
266e68be75 configs: ls1046aqds: Move CONFIG_SPI_FLASH_* definitions to defconfigs
LS1046A-QDS has CONFIG_SPI_FLASH_SST, CONFIG_SPI_FLASH_EON and
CONFIG_SPI_FLASH_STMICRO defines present in header. Move these entries
from header to defconfigs.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
8bbbb29815 board: kontron: sl28: add myself to ls1028a.dtsi maintainers
I'd like to keep informed about ls1028a.dtsi changes. For now, there is
no top-level entry for any layerscape specific files. Instead, add the
file entry to my board MAINTAINERS file.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
cdf8534b8a armv8: layerscape: use memalign() to allocate spintable code
Don't use efi_allocate_pages(). The allocated memory isn't carved out of
the lmb allocations. The memory might then be allocated twice.
Particulary, this might happened with the fdt_high/initrd_high feature
which will relocate the fdt/ramdisk. This might then overlap with the
spin table.

Instead use memalign() which allocates on memory on the heap which is
correctly carved out by lmb.

Please note, that the memory is later reserved in the device tree as
well as in the EFI memory map in ft_fixup_cpu() (in
arch/arm/cpu/armv8/fsl-layerscape/fdt.c).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
12d2b42a05 board: sl28: enable USB periheral support and gadgets
Enable support to update the board via the DFU protocol and make it
possible to export the block devices via USB mass storage protocol.

This will not work out of the box, yet. You have to change the dr_mode
of the usb0 controller to peripheral manually to make it work. True, OTG
support will hopefully coming soon.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
f6cc9da166 board: sl28: switch to dwc3 driver
Now that the DWC3 USB driver has support for the layerscape platform,
use it. This will have the benefit that peripheral mode will work.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
2b0b51d0be usb: dwc3: add layerscape support
Add support for the proper dwc3 device tree binding support as specified
in the offical device tree spec.

Initially, add support for the LS1028A support. Other SoCs should be
easy to add by just adding the corresponding compatible string.
Unfortunately, the device trees of all other layerscape SoCs are not
converted and uses a wrong compatible string only known in u-boot.

To maintain backwards compatibility with current u-boot device trees,
add the generic "fsl,layerscape-dwc3" compatible string.

OTG mode is not supported yet. The dr_mode in the devicetree will either
have to be set to peripheral or host.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
f150b8d28b usb: dwc3: Enable undefined length INCR burst type
[backport from linux commit d9612c2f0449e24983a8b689603210486a930c90]

Enable the undefined length INCR burst type and set INCRx.
Different platform may has the different burst size type.
In order to get best performance, we need to tune the burst
size to one special value, instead of the default value.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
d274cbbc1c usb: dwc3: Add frame length adjustment quirk
[backport from linux commit db2be4e9e30c6e43e48c5749d3fc74cee0a6bbb3]

Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
7f79a2c235 usb: common: silence dubious errors
Both dr_mode and maximum-speed properties are usually optional. Drivers
will still try to fetch the properties nonetheless, which leads to error
messages, although they are no errors. Change pr_err() to pr_debug().

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
f53e102e12 armv8: fsl-layerscape: rework the dwc3 snooping enable code
Instead of looking at all USB (host) devices, just search all DWC3
device tree nodes. This will (1) fix a panic if of_match is zero and (2)
also apply the fixup if the controller is in peripheral mode. Both
happen when the DWC3 USB controller driver is used.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
bce039acf2 test: dm: add test for ofnode_for_each_compatible_node()
Check that all matching nodes have the correct compatible and that there
is at least one match.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
b8ec9458a3 dm: core: add ofnode_for_each_compatible_node()
Add a helper to iterate over all nodes with a given compatible string.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
c7155d29fb arm: dts: sl28: sync dtbs
Copy the board device tree files from linux v5.14. On top of the v5.14
dtbs the changes of these two patches are included here which are needed
for u-boot:
  https://lore.kernel.org/linux-devicetree/20210831134013.1625527-7-michael@walle.cc/
  https://lore.kernel.org/linux-devicetree/20210831134013.1625527-8-michael@walle.cc/

At the time of this writing the patches were accepted and will be
included in 5.15.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
7f900eabf7 arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.12.

Notable changes:
 - second watchdog added
 - the number of chip selects of the SPI controller is now correct and
   reflects what the hardware offers
 - the LPUARTs have the correct clock parent
 - USB controllers are enabled by default, which was already the case
   before this sync because all board enabled all the USB controller
   nodes. A linux patch to fix this is pending.
 - the eSDHC controller changes from big-endian to little-endian, but
   that property seems to be not used at all.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
d08011d7f9 arm: dts: ls1028a: disable the PCIe controller by default
Disable the PCIe controllers by default, just like in the linux device
tree. But there is one catch, for linux they are enabled in-place by the
bootloader. Obviously, this doesn't work for the bootloader. Thus we
explicitly enable the controllers in the -u-boot.dtsi files.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
938d9355e6 arm: dts: ls1028a: move the PCI I/O window to match
To make the synchronization of the u-boot device tree with the one from
linux easier, move the I/O window to the one which is specified in the
linux device tree. The actual value shouldn't matter as long as it
mapped to the corresponding memory window of the PCIe controller which
is a 32GiB window at 80_0000_0000h (first controller) or 88_0000_0000h
(second controller).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
d4a64821fb arm: dts: ls1028a: remove num-lanes in the PCIe controller nodes
This property is unused in the layerscape PCIe controller driver and not
present in the linux device tree. Remove it to be similarly.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
e10da1f985 pci: layerscape: add official ls1028a binding support
The official bindind of the PCIe controller of the ls1028a has the
following compatible string:
  compatible = "fsl,ls1028a-pcie";

Additionally, the resource names and count are different. Update the
driver to support this binding and change the entry in the ls1028a
device tree.

Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
8f176eb8ac usb: xhci: fsl: add new compatible fsl,ls1028a-dwc3
The official ls1028a binding of the driver uses the following as
compatibles:
  compatible = "fsl,ls1028a-dwc3", "snps,dwc3";

Change the ls1028a device tree and add this new compatible to the fsl
specific xhci driver, otherwise the generic dwc3 driver will be used
with the compatibles above.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
cde9b147ba scsi: ceva: rename the resource name to match the linux kernel one
The driver will look for a named resource "ecc-addr", but this isn't the
official binding. In fact, the official device tree binding
documentation doesn't mention any resource names at all. But it is safe
to assume that it's the linux ones we have to use if we want to be
compatible with the linux device tree. Thus rename "ecc-addr" to
"sata-ecc" and convert all the users in u-boot.

While at it, also rename "sata-base" to "ahci" although its not used at
all.

This change doesn't affect the SATA controller on the ZynqMP.

Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
c9bf9af9a7 serial: lpuart: add new compatible fsl, ls1028a-lpuart
The official ls1028a binding of the driver uses the following as
compatibles:
  compatible = "fsl,ls1028a-lpuart";

Add the missing compatible to the driver and update the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
8c58089287 spi: fsl_dspi: rename num-cs to spi-num-chipselects
The official devicetree bindings specifies spi-num-chipselects as the
name. Use it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
765afe7fb3 spi: fsl_dspi: add new compatible fsl, ls1021a-v1.0-dspi
The official ls1028a binding of the driver uses the following as
compatibles:
  compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";

Add the missing compatible to the driver and update the device tree.
We can use the fallback "fsl,ls1021a-v1.0-dspi", because the endianness
is determined by the little-endian property and not by the compatible
string itself. Further, we won't need and specific details on the DMA
configuration (which is different on the LS1021A). If it's ever needed,
we can later add the more specific "fsl,ls1028a-dspi" compatible to the
driver.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
5709a858c0 watchdog: sp805_wdt: use correct compatible string
According to the linux device tree specification the compatible string
is:
  compatible = "arm,sp805", "arm,primecell";

Fix all users in u-boot.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
c816dd0324 arm: dts: ls1028a: update the labels
Update the labels of the nodes to match the kernel ones.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
f3f41f6c5c arm: dts: ls1028a: move the iRC node and its devices into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

While at it fix the indentation.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
575205c9cc arm: dts: ls1028a: move the watchdog node into /soc
While inserting it into the new location, keep it sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
3c5c47777c arm: dts: ls1028a: move the PCIe controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

While at it fix the indentation.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
659fafc3fd arm: dts: ls1028a: move SATA and USB controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
65da65f6e2 arm: dts: ls1028a: move the GPIO controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
ebcd6d77ca arm: dts: ls1028a: move the low-power UART nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
44800f2b4f arm: dts: ls1028a: move the UART controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
fbddc2701d arm: dts: ls1028a: move the SPI and eSDHC controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
f02f2f93a5 arm: dts: ls1028a: move the FlexSPI controller node
While inserting it into the new location, keep it sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
fb19c6b159 arm: dts: ls1028a: move I2C controller nodes into /soc
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
9b38ba5846 arm: dts: ls1028a: move the clockgen node into /soc
Populate the /soc node with the first device node.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
cd80d5d924 arm: dts: ls1028a: add an empty /soc
To keep the device tree similar to the linux kernel one, we need to move
all CCSR related devices into the /soc node. To keep the patches easy to
review, we initially add an empty /soc node and populate it piece by
piece.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
541deeea59 arm: dts: ls1028a-{rdb, qds}: remove dm-pre-reloc property
Nowadays, both boards boot using the TF-A BL1/BL2 and SPL isn't used at
all. The property is not needed, remove it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
d89fa39227 arm: dts: ls1028a: remove /memory node
This node is some hodgepodge between the ddr controller node at SoC
offset 0x1080000 and some static memory size of 2GiB. Remove this bogus
node because it doesn't seem to be used at all.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
fb5ff321d0 armv8: ls1028a: use the official compatible string for the GPU
There is no "fsl,ls1028a-gpu" compatible string. It is solely for the
proprietary driver which will never be open source. Lately, linux gained
support for the open source etnaviv driver for the GPU (although there
is still support for the DisplayPort PHY missing to get actual graphics
output). Thus, instead of supporting some proprietary driver, switch
over to the open source one, which also have an official device tree
binding.

Cc: Andy Tang <andy.tang@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
38ce95a1c6 drivers: ddr: lc_common_dimm_params.c : Fix Divison by zero issue
Adds check for memory clock variable before calculating caslat_actual.

Set mclk_ps to slowest DIMM supported if mclk_ps is found zero.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:23 +05:30
ed06772a60 drivers: net: fsl-mc: add a command which dumps the MC log
Extended fsl_mc command adding an extra option dump_log

Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 17:18:06 +05:30
a48492679c ppc: mpc8xx: Drop -mstring from PLATFORM_CPPFLAGS
This has not been supported by toolchains for some time and has been
putting out a warning.  Drop this.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:50:22 +05:30
f5402117ad arm: dts: ls1088a: Update qspi node properties
Remove "num-cs" property from device-tree as it is no longer used by
qspi driver anymore.

Also, specify status as "disabled" and enable qspi support in respective
board dts files. This will also help in aligning node properties with
other board properties.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:50:22 +05:30
cbdc4c974f board: sl28: add update image documentation
Document the update image and how to use the EFI UpdateCapsule.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:50:21 +05:30
f06add11f0 doc: board: kontron: sl28: Reduce section levels and change title
In order to add other Kontron boards to the docs alongside the existing sl28 board,
we need to reduce the levels of the sections and change the title.

Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:50:21 +05:30
ed30254ef6 board: sl28: enable EFI UpdateCapsule support
Enable support for update over EFI UpdateCapsule mechanism. This board
doesn't support setting EFI variables after ExitBootservices().
Therefore, we are also enabling EFI_IGNORE_OSINDICATIONS.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:49:01 +05:30
d8ffd938f1 board: sl28: generate FIT update image
Generate a FIT update image during build. The image will be called
"u-boot.update" and can be used to build an EFI UpdateCapsule or during
DFU mode. Although, the latter isn't supported because there is no USB
OTG driver yet.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
9e91bb0367 board: sl28: enable EFI_SET_TIME support
Allow EFI to actually set the time before ExitBootServices().

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
0ecf45f5bd board: freescale: lx216x : increase fdt blob size
Increase fdt blob size for lx2160 and lx2162 series
to fix below errors/warnings during device tree fixup.

Unable to update property /soc/spi@2100000:status, err=FDT_ERR_NOSPACE
Unable to update property /soc/spi@2110000:status, err=FDT_ERR_NOSPACE
Unable to update property /soc/spi@2120000:status, err=FDT_ERR_NOSPACE
WARNING: could not set reg FDT_ERR_NOSPACE.
WARNING unable to set iommus: FDT_ERR_NOSPACE

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
bd2a4eb977 board: fsl_validate: Fix Double free Issue
Remove Double free issue from calc_img_key_hash() and
calc_esbchdr_esbc_hash() function.
Verified the secure boot changes using lx2162aqds board.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
c0e0cf4989 configs: lx2162a: Enable CONFIG_SPI_FLASH_MT35XU for lx2162a-qds
LX2162A-QDS has micron mt35xu512aba flash which requires flag
CONFIG_SPI_FLASH_MT35XU on to probe flash successfully.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
2a98944b43 armv8: fsl-layerscape: Erratum A010315 needs PCIE support
Disabling PCIE support currently lead to a crash because the code for
erratum A010315 is still run. Add a conditional to only select
CONFIG_SYS_FSL_ERRATUM_A010315 when CONFIG_PCIE_LAYERSCAPE is enabled.

Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
b2a6ccd4dd lx2162a : Rename emmc boot command variable
Rename emmc_bootcmd environment variable to sd2_bootcmd
to fix emmc boot on lx2162aqds board.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
3c922ce99c board: freescale: t104xrdb: Set popts->cpo_sample to 0x54 for DDR3
Set popts->cpo_sample to 0x54 in t104xrdb/ddr.c to optimize cpo

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
71b255b657 drivers: ddr: main.c: Fix Bad Shift operator issue
Fix Bad Shift operator issue in step_to_string function
by adding an if check

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
f5a37b02b0 drivers: ddr: fsl_ddr_gen4.c: Fix divide by zero issue
Fix possible divide by zero issue in fsl_ddr_set_memctl_regs
by adding an if check

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
a1932ece70 drivers: ddr: util.c: Fix divide by zero issue
Fix possible divide by zero issue in get_memory_clk_period_ps
by adding a check

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-11-09 14:43:24 +05:30
a80f582688 exynos: mmu: use CONFIG_IS_ENABLED
to fix following checkpatch warnings.
Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where
possible

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-09 14:07:46 +09:00
2b77d9a3ee exynos78x0: pinctrl: set const to structs
to fix following checkpatch warings.
WARNING: struct  should normally be const

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-09 14:07:46 +09:00
dfb8470fd0 exynos: pwm: Deal with a PWM at 100%
At present the counter never hits the comparitor in this case. Add a
special case.

This ensures that the snow backlight works when at full brightness.

Fixes: 76c2ff3e5f video: backlight: fix pwm's duty cycle calculation

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2021-11-09 11:57:22 +09:00
b842340a10 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-11-08 21:44:02 -05:00
990e1e4bea Fix syntax error
This statement has an unmatched parentheses, fix it.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-08 15:35:55 +08:00
5f888ab951 riscv: ae350: Use #if defined instead of CONFIG_IS_ENABLED
According to ./include/linux/kconfig.h,
CONFIG_IS_ENABLED(OF_BOARD) expands to 0
when CONFIG_SPL_BUILD is defined because
there is no CONFIG_SPL_OF_BOARD.

Use #if defined instead.

Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-08 15:35:55 +08:00
41635cca6e riscv: add #define in asm/io.h for some device drivers
This patch adds memcpy_fromio and memcpy_toio definitions for some device
drivers which have these definitions, like cadence_qspi_apb.c

Signed-off-by: Wei Fu <wefu@redhat.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-08 15:35:55 +08:00
89a86dcf61 cmd: sbi: show SBI implementation version
Let the sbi command show the SBI implementation version

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-11-08 15:35:55 +08:00
afb8e1f067 riscv: function to retrieve SBI implementation version
Provide function sbi_get_impl_version() to retrieve the SBI implementation
version.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-11-08 15:35:55 +08:00
f8ed905900 Merge tag 'efi-2022-01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc2

Documentation:
* improve description of mmc rescan
* remove obsolete PPC documenation

UEFI
* Provide unit test for the EFI_TCG2_PROTOCOL
* Implement add EFI_TCG2_PROTOCOL.SubmitCommand
* Start the implementation of a 64 bit EFI app
* Reduce rcar3_salvator-x image size
2021-11-07 23:00:29 -05:00
f8d7e6e941 dfu: newline after updating
Currently output of dfu commands ends on a line with leading hash signs
('#'). The succeeding output should be placed on a new line.

After writing updates via dfu print a new line.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-07 18:36:56 +01:00
34f2577e92 ARM: renesas: reduce rcar3_salvator-x image size
rcar3_salvator-x u-boot.img is very close to the 0x100000 size limit.

Disable support for Unicode capitalization.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
aa1b504927 efi_selftest: add selftest for EFI_TCG2_PROTOCOL and Measured Boot
This commit adds the missing EFI_TCG2_PROTOCOL selftest
and Measured Boot selftest in lib/efi_selftest.

This selftest includes PE/COFF image measurement test, some PCR values are
different in each architecture. With that, this commit also adds pre-built
versions of lib/efi_selftest/efi_miniapp_file_image_exit.c for PE/COFF
image measurement test for 32-bit arm, arm64, ia32, x86_64, riscv32 and
riscv64. Prebuilding avoids the problem of reproducible builds.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>

Make the test 'onrequest'.
Add code comments to the includes with the binaries.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
1834c081d3 efi: Add video support to the app
The current EFI video driver only works when running in the stub. In that
case the stub calls boot services (before jumping to U-Boot proper) and
copies the graphics info over to the efi table. This is necessary because
the stub exits boot services before jumping to U-Boot.

The app maintains access to boot services throughout its life, so does not
need to do this. Update the driver to support calling boot services
directly.

Enable video output for the app. Note that this uses the
EFI_GRAPHICS_OUTPUT_PROTOCOL protocol, even though it mentions vesa.

A sample qemu command-line for this case is:

   qemu-system-x86_64 -bios /usr/share/edk2.git/ovmf-ia32/OVMF-pure-efi.fd
   -drive id=disk,file=try.img,if=none,format=raw -nic none
   -device ahci,id=ahci -device ide-hd,drive=disk,bus=ahci.0

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
f844573762 efi: Add a way to obtain boot services in the app
Add a function to return this information along with a stub for the
efi_info_get() function, since calling it otherwise hangs U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
9c297a3dab x86: Don't duplicate global_ptr in 64-bit EFI app
This variable is already defined by the EFI code. Drop the duplicate
definition when building a 64-bit EFI app.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
e16c47fa3d efi: Create a 64-bit app
Most modern platforms use 64-bit EFI so it is useful to have a U-Boot app
that runs under that. Add a (non-functional) build for this.

Note that --whole-archive causes the gcc 9.2 linker to crash, so disable
this for now. Once this is resolved, things should work.

For now, avoid mentioning the documentation for the 64-bit app, since it
does not work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
f4d227c99f x86: Create a 32/64-bit selection for the app
Most EFI implementations use 64-bit but U-Boot only supports running as
a 32-bit app at present. While efi-x86_payload64 does boot from 64-bit
UEFI it immediately changes back to 32-bit before starting U-Boot.

In order to support a 64-bit U-Boot app, update the Kconfig to add an
option for 32/64 bit. Update the prompt for the existing option so it is
clear it relates to the stub. Move both up to just under the choice that
controls them, since this looks better and the menu.

Use CONFIG_EFI_APP in the Makefile instead of CONFIG_TARGET_EFI_APP,
since the latter is specific to a single target and we will have two.

Memory size is set to 32MB for now so that it can run on qemu without
increasing the default memory size. We may need to increase the default
later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
26e24d626b efi: Drop the OF_EMBED warning for EFI
For the EFI app, we must embed the devicetree in the ELF file since that
is the only thing that is run by UEFI. Drop the warning to avoid
confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-07 18:36:55 +01:00
815ef1ca1d efi: Enable DM_ETH for the app
There is no need to avoid driver model for networking. Drop this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
6b2f82901e efi: Add a script to build an image for testing on UEFI
It is quite complicated to run U-Boot on QEMU since we have four
different builds and they must use different versions of qemu and the
UEFI binaries.

Add a script to help. It requires U-Boot itself to be built. Once that
is done you can use this script to build an image for use with qemu and
optionally run it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-07 18:36:55 +01:00
7fc93cae49 efi_loader: add EFI_TCG2_PROTOCOL.SubmitCommand
This commit adds the EFI_TCG2_PROTOCOL.SubmitCommand
required in the TCG PC Client PFP spec.
SubmitCommand enables to send the raw command to the TPM device.

To implement this api, tpm2_submit_command() is added
into tpm-v2.c.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-07 18:36:55 +01:00
14cbb330fe efi_loader: use byteshift unaligned access helper
Calling unaligned/access-ok.h version of put_unaligned_le64()
causes data abort in arm 32-bit QEMU.

The similar issue also occurs in linux kernel,
unaligned/access-ok.h is no longer used in linux kernel[1].

This commit uses the unaligned/be_byteshift.h and
unaligned/le_byteshift.h helper instead of unaligned/access-ok.h.

[1]https://lore.kernel.org/all/20210507220813.365382-8-arnd@kernel.org/

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-07 18:36:55 +01:00
50b05eb606 efi_loader: capsule: drop __weak from efi_get_public_key_data()
As we discussed in ML, currently a device tree is the only place
to store public keys for capsule authentication. So __weak is not
necessary for now.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-07 18:36:55 +01:00
212f078496 doc: mmc rescan speed mode
Provide human readable descriptions of the speed nodes instead of the name
of constants from the code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-11-07 18:36:55 +01:00
a212f5d09c doc: Remove the obsolete README.AMCC-eval-boards-cleanup file
The related boards have been removed four years ago already, in
commit 98f705c9ce ("powerpc: remove 4xx support"), so this README
file is not required anymore.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-07 18:36:55 +01:00
c6e13c7151 doc: Remove obsolete doc/README.nand-boot-ppc440
The PPC440 support has been removed in commit 98f705c9ce
("powerpc: remove 4xx support"). This patch removes this obsolete
file as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Thomas Huth <thuth@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
2021-11-07 18:36:55 +01:00
52207514ba Merge branch '2021-11-05-Kconfig-syncs'
- An assortment of changes to finish migration of a number of symbols,
  and move YAFFS2 related options that we enable to Kconfig as well.
2021-11-05 15:38:46 -04:00
ce5bae5ccd configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 15:31:59 +00:00
5523afbe4a Convert CONFIG_BOARD_EARLY_INIT_F et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOARD_EARLY_INIT_F
   CONFIG_BOARD_LATE_INIT
   CONFIG_DISPLAY_BOARDINFO
   CONFIG_DISPLAY_BOARDINFO_LATE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:26:29 -04:00
1616626417 Convert CONFIG_SPL_DRIVERS_MISC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_DRIVERS_MISC
   CONFIG_SPL_ENV_SUPPORT
   CONFIG_SPL_GPIO
   CONFIG_SPL_I2C
   CONFIG_SPL_LDSCRIPT
   CONFIG_SPL_LIBCOMMON_SUPPORT
   CONFIG_SPL_LIBGENERIC_SUPPORT
   CONFIG_SPL_LOAD_FIT_ADDRESS
   CONFIG_SPL_MMC
   CONFIG_SPL_NAND_SUPPORT
   CONFIG_SPL_NO_CPU_SUPPORT
   CONFIG_SPL_OS_BOOT
   CONFIG_SPL_POWER
   CONFIG_SPL_STACK_R
   CONFIG_SPL_STACK_R_ADDR
   CONFIG_SPL_WATCHDOG
   CONFIG_SPL_TEXT_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:26:29 -04:00
4ca10b9ee5 Convert CONFIG_BMP_16BPP to Kconfig
This converts the following to Kconfig:
   CONFIG_BMP_16BPP

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
4d7a3f52d0 Convert CONFIG_OF_EMBED to Kconfig
This converts the following to Kconfig:
   CONFIG_OF_EMBED

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-11-05 11:23:29 -04:00
74337aa450 Convert CONFIG_MCFUART to Kconfig
This converts the following to Kconfig:
	CONFIG_MCFUART

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
61e1972e73 Convert CONFIG_FEC_MXC to Kconfig
This converts the following to Kconfig:
	CONFIG_FEC_MXC

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
bca1bce92a Convert CONFIG_SUPPORT_EMMC_BOOT to Kconfig
This converts the following to Kconfig:
	CONFIG_SUPPORT_EMMC_BOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
465547bddf Convert CONFIG_SYS_TEXT_BASE to Kconfig
This converts the following to Kconfig:
	CONFIG_SYS_TEXT_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
1a77da4b33 Convert CONFIG_SYS_HZ to Kconfig
This converts the following to Kconfig:
	CONFIG_SYS_HZ

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
7115007ccf spl: Make use of CONFIG_IS_ENABLED(OS_BOOT) in SPL/TPL common code paths
When building a system that has both TPL and SPL_OS_BOOT, code which
tests for CONFIG_SPL_OS_BOOT will be built and enabled in TPL, which is
not correct.  While there is no CONFIG_TPL_OS_BOOT symbol at this time
(and likely will not ever be) we can use CONFIG_IS_ENABLED(OS_BOOT) in
these common paths to ensure we only compile these parts in the SPL
case.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
2ad74301a0 fs: yaffs2: Finish Kconfig migration
For the symbols which are both hard-coded as enabled and used, move to
Kconfig.  The rest of the CONFIG_YAFFS namespace is unselected anywhere,
so we leave it as is.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05 11:23:29 -04:00
2a5ad542e6 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Improved sysreset/watchdog uclass integration (Samuel)
2021-11-04 09:14:19 -04:00
40edc320b1 sunxi: Use sysreset framework for poweroff/reset
Instead of hardcoding the watchdog for reset, and the PMIC for poweroff,
use the sysreset framework to manage the available poweroff/reset
backends. This allows (as examples) using the PMIC to do a cold reset,
and using a GPIO to power off H3/H5 boards lacking a PMIC. Furthermore,
it removes the need to hardcode watchdog MMIO addresses, since the
sysreset backends can be discovered using the device tree.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04 08:57:19 +01:00
6e19dc84c1 sunxi: Avoid duplicate reset_cpu with SYSRESET enabled
The sysreset uclass unconditionally provides a definition of the
reset_cpu() function. So does the sunxi board code. Fix the build with
SYSRESET enabled by omitting the function from the board code in that
case. The code still needs to be kept around for use in SPL.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04 08:57:19 +01:00
a8f63d18bb watchdog: Automatically register device with sysreset
Add an option to automatically register watchdog devices with the
wdt_reboot driver for use with sysreset. This allows sysreset to be a
drop-in replacement for platform-specific watchdog reset code, without
needing any device tree changes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04 08:57:19 +01:00
5544a01142 sysreset: watchdog: Move watchdog reference to plat data
Currently, the wdt_reboot driver always gets its watchdog device
reference from an OF node. This prevents selecting a watchdog at
runtime. Move the watchdog device reference to the plat data, so
the driver can be bound with the reference pre-provided. The
reference will still be acquired from the OF node if it is not
already provided.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04 08:57:19 +01:00
30ba45dbd6 sysreset: Mark driver probe functions as static
These driver probe functions are not (and should not be) called from
outside the respective driver source files. Therefore, the functions
should be marked static.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04 08:57:19 +01:00
6b84217227 sysreset: Add uclass Kconfig dependency to drivers
None of the sysreset drivers do anything beyond providing sysreset
uclass ops. They should depend on the sysreset uclass.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04 08:57:19 +01:00
bc18582a14 Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- usb: mtu3: flush cache for the first GPD when allocate GPD ring
2021-11-03 09:42:45 -04:00
0bf6563a3e Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- pci_mvebu: Fix access to config space and PCIe Root Port (Pali)
- a37xx: pci: Program the data strobe for config read requests (Pali)
- kwboot: Misc improvements and fixes (Pali)
2021-11-03 09:42:22 -04:00
2c4f21763d usb: mtu3: flush cache for the first GPD when allocate GPD ring
When allocate the GPD ring, and tell its address to the controller, then
the driver starts or resumes the QMU, the controller will try to access
the first GPD, so need flush the first one to avoid wrong GPD status.

Reported-by: Xin Lin <Xin.Lin@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-11-03 08:47:57 +01:00
57fa6fb932 arm: a37xx: pci: Program the data strobe for config read requests
According to the Armada 3720 Functional Specification Data Strobe applies
for both read and write config requests.

Data strobe bits configure which bytes from the start address should be
returned for read request. Set value 0xf (all 4 bits) into Data Strobe
register to read all four bytes from specified 32-bit config space
register. Same value for Data Strobe register is programmed by Linux
pci-aardvark.c driver for config read requests.

Without this patch pci-aardvark driver sets data strobe register only
during config write operations. So any followup config read operations
could result with just partial datai returned (if previous write operation
was not 32-bit wide). This patch fixes it and ensures that config read
operations always read all bytes from requested register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:34 +01:00
62a98f496a tools: kwboot: Do not send magic seq when changing baudrate back to 115200
After successful transfer of whole image only two things can happen:
- BootROM starts execution of data block, which changes UART baudrate
  back to 115200 Bd,
- board crashes and causes CPU reset

In both cases UART baudrate is reset to the default speed. So there is
no need to send special magic sequence to inform kwboot that baudrate is
going to be reset and kwboot does not need to wait for this event and
can do it immediately after BootROM acknowledges end of xmodem transfer.

Move ARM code for sending magic sequence from main baudrate change
section to binhdr_pre section which is executed only before changing
baudrate from the default value of 115200 Bd to some new value. Remove
kwboot code waiting for magic sequence after successful xmodem transfer.

Rationale: sometimes when using very high UART speeds, magic sequence is
damaged and kwboot fails at this last stage. Removal of this magic
sequence makes booting more stable.

Data transfer protocol (xmodem) is using checksums and retransmit, so it
already deals with possible errors on transfer line.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:34 +01:00
8dbe027fc7 tools: kwboot: Do not use stack when setting baudrate back to default value
The ARM code we inject into the image to change baudrate back to the
default value of 115200 Baud, which is run after successful UART transfer
of the whole image, cannot use stack as at this stage stack pointer is not
initialized yet.

Stack can only be used when BootROM is executing binary header, to
preserve state of registers, since BootROM expects that.

Change the ARM baudrate code to not use stack at all and put binary
header specific pre + post code (which stores and restores registers) into
separate arrays.

The baudrate change code now jumps at it's end and expects that there is
either code which returns to the BootROM or jumps to the original exec
address.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
558176dcb1 tools: kwboot: Replace ARM mov + movt instruction pair by mov + orr
Older Armada SoCs have custom ARMv5te compatible core which does not
support movt instruction. So replace mov + movt instruction pair used for
immediate move construction by mov + orr instructions which are supported
also by ARMv5te.

After this change kwboot ARM code should be compatible with any 32-bit ARM
core compatible by ARMv2 or new. At least GNU AS does not throw any error
or warning.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
56452295c3 tools: kwboot: Increase delay after changing baudrate in ARM code
Increase loop cycles from 600000 to 2998272, which should increase delay
from 1ms to about 5ms on 1200 MHz CPU.

The Number 2998272 was chosen as the nearest value around 3000000 which can
be encoded into one ARM mov instruction. It avoids usage of movt instruction
which is not supported by ARMv5te cores.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
cab817d260 tools: kwboot: Do not call tcdrain() after each sent packet
Kwboot puts each xmodem packet to kernel queue, then waits until all bytes
of that packet are transmitted over UART and then waits for xmodem reply
until it is received into kernel queue.

If some reply is received during the time we are waiting until all bytes
are transmitted, then kernel puts them into the queue and returns it to
kwboot in next read() call.

So there is no need to wait (with tcdrain() function) until all bytes from
xmodem packet are transmitted over UART, since any reply received either
during that time or after is returned to kwboot with the next read().

Therefore do not call tcdrain() after each xmodem packet sent. Instead
directly wait for any reply after putting xmodem packet into write kernel
queue.

This change could speed up xmodem transfer in case tcdrain() function waits
for a longer time.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
455c0d22fb tools: kwboot: Fix sending retry of last header packet
After the trasfer of last header packet, it is possible that baudrate
change pattern is received, and also that NAK byte is received so that
the packet should be sent again.

Thus we should not clear the baudrate change state when sending retry
of that packet.

Move code for initializing state variables from kwboot_xm_recv_reply()
to kwboot_xm_sendblock().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
a6fcac274a tools: kwboot: Resend first 3 xmodem retry packets immediately
Currently when kwboot receive some garbage reply which does not understand,
it waits 1s before it tries to resend packet again.

The most common error on UART is that receiver sees some bit flipped which
results in invalid reply.

This behavior slows down xmodem transfer over UART as basically on every
error kwboot is waiting one second.

To fix this, try to resend xmodem packet for first 3 attempts immediately
without any delay. If broken reply is received also after the 3 attempts,
continue retrying with 1s delay like it was before.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
d14a342073 tools: kwboot: Change retry loop from decreasing to increasing
This patch does not change behavior of the code, just allows to implement
new changes more easily.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
d656f5a0ee tools: kwboot: Calculate real used space in kwbimage header when calling kwboot_img_grow_hdr()
Size of the header stored in kwbimage may be larger than real used size in
the kwbimage header. If there is unused space in kwbimage header then use
it for growing it. So update code to calculate used space of kwbimage
header.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
e511cc3b1a tools: kwboot: Do not modify kwbimage header before increasing its size
This ensures that kwboot_img_grow_hdr() function still sees valid kwbimage
header.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
ed792c2938 tools: kwboot: Simplify code for aligning image header
Expression (hdrsz % KWBOOT_XM_BLKSZ) is non-zero therefore expression
(KWBOOT_XM_BLKSZ - hdrsz % KWBOOT_XM_BLKSZ) is always less than value
KWBOOT_XM_BLKSZ. So there is no need to add another modulo. Also rename
variable `offset` to `grow` which better describes what is stored in
this variable.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
8e2e7ca1fe tools: kwboot: Show verbose message when waiting for baudrate change magic
It is hard to debug why kwboot is failing when the last message is
'Finishing transfer' and no additional output. So show verbose message when
kwboot finished transfer and is waiting for baudrate change magic sequence.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
4bebab69a9 tools: kwboot: Correctly set configuration of UART for BootROM messages
For kwbimage v1, tell BootROM to send BootROM messages to UART port number
0 (used also for UART booting) with default baudrate (which should be
115200) and do not touch UART MPP configuration.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
82c5a0ac71 tools: kwboot: Recalculate 4-byte data checksum after injecting baudrate code
If data part of image is modified, update 4-byte data checksum.

It looks like A385 BootROM does not verify this checksum for image
loaded via UART, but we do not know if other BootROMs are also ignoring
it. It is always better to provide correct checksum.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
063cb35281 tools: kwboot: Inject baudrate change back code after data part
Some vendor U-Boot kwbimage binaries (e.g. those for A375) have load
address set to zero. Therefore it is not possible to inject code which
changes baudrate back to 115200 Bd before the data part.

So instead inject it after the data part and change kwbimage execution
address to that offset. Also store original execution address into
baudrate change code, so after it changes baudrate back to 115200 Bd, it
can jump to orignal address.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
ad9a3ac500 tools: kwboot: Validate 4-byte image data checksum
Data part of the image contains 4-byte checksum. Validate it when
processing the image.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
5923ef686a tools: kwboot: Reserve enough space for patching kwbimage in memory
SPI image header and data parts do not have to be aligned to 128 byte
xmodem block size. So reserve additional memory for aligning header part
and additional memory for aligning data part.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:27 +01:00
2ecca3d0d7 tools: kwboot: Fix initialization of tty device
Explicitly disable 2 stop bits by clearing CSTOPB flag, disable modem
control flow by clearing CRTSCTS flag and do not send hangup after closing
device by clearing HUPCL flag.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
0a14341cf8 tools: kwboot: Initialize rfds to zero
Explicitly zero out the rfds fd_set with FD_ZERO() before using it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
03a8a5e26a pci: pci_mvebu: Fix comment about driver class name
This is a pci driver, not an eth driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
2344a76f29 pci: pci_mvebu: Setup PCI controller to Root Complex mode
Root Complex should be the default mode, let's set it explicitly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
42ab3b3004 pci: pci_mvebu: Do not automatically enable bus mastering on PCI Bridge
Now that PCI Bridge is working, U-Boot's CONFIG_PCI_PNP code automatically
enables memory access and bus mastering when it is needed. So do not
prematurely enable memory access and bus mastering.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
79b4eb21b4 pci: pci_mvebu: Fix place of link up detection
PCI Bridge is always accessible also when link is down. So move detection
of link up from mvebu_pcie_of_to_plat() function to mvebu_pcie_valid_addr()
function which is used when accessing PCI config space.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
452f2e73c6 pci: pci_mvebu: Remove unused functions
Functions mvebu_pcie_get_local_bus_nr() and mvebu_pcie_get_local_dev_nr()
are not used, so remove them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
a7b61ab58d pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)
The mysterious "Memory controller" PCI device which is present in PCI
config space is improperly configured and crippled PCI Bridge which acts
as PCIe Root Port for endpoint PCIe card.

This PCI Bridge reports in PCI config space incorrect Class Code (Memory
Controller) and incorrect Header Type (Type 0). It looks like HW bug in
mvebu PCIe controller but apparently it can be changed via mvebu registers
to correct values.

The worst thing is that this PCI Bridge is crippled and its PCI config
registers in range 0x10-0x34 alias access to internal mvebu registers which
have different functionality as PCI Bridge registers. Moreover,
configuration of PCI primary and secondary bus numbers (registers 0x18
and 0x19) is done via totally different mvebu registers via totally strange
method and cannot be done via PCI Bridge config space.

Due to above fact about PCI config range 0x10-0x34, allocate a private
cfgcache[] buffer in the driver, to which PCI config access requests to
the 0x10-0x34 space will be redirected in mvebu_pcie_read_config() and
mvebu_pcie_write_config() functions. Function mvebu_pcie_write_config()
will also catch writes to PCI_PRIMARY_BUS (0x18) and PCI_SECONDARY_BUS
(0x19) registers and set PCI Bridge primary and secondary bus numbers via
mvebu's own method.

Also, Expansion ROM Base Address register (0x38) is available, but at
different offset 0x30. So recalculate register offset before accessing PCI
config space.

After these steps U-Boot sees working PCI Bridge and CONFIG_PCI_PNP code
can finally start enumerating all PCIe devices correctly, even with more
complicated PCI topology. So update also mvebu_pcie_valid_addr() function
to reflect state of the real device topology.

Each PCIe port is de-facto isolated and every PCI Bridge which is part of
PCIe Root Complex is also isolated, so put them on separate PCI buses as
(local) device 0.

U-Boot already supports enumerating separate PCI buses, real (HW) bus
number can be retrieved by "PCI_BUS(bdf) - dev_seq(bus)" code, so update
config read/write functions to properly handle more complicated tree
topologies (e.g. when a PCIe switch with multiple PCI buses is connected
to the PCIe port).

Local bus number and local device number on mvebu are used for determining
which config request type is used (Type 0 vs Type 1). On normal non-broken
PCIe hardware it is done by primary and secondary bus numbers. So correctly
translate settings between these numbers to ensure that correct config
requests are sent over the PCIe bus.

As bus numbers are correctly re-configured, it does not make sense to print
some initial bogus configuration during probe, so remove this debug code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
657177ad8e pci: pci_mvebu: Fix read_config() with PCI_SIZE_8 or PCI_SIZE_16
When reading 8 or 16 bits from config space, use appropriate readb() or
readw() calls. This ensures that PCIe controller does not read more bits
from endpoint card as asked by read_config() function.

Technically there should not be an issue with reading data from config
space which are not later used as there are no clear-by-read registers.
But it is better to use correct read operation based on requested size.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
daa9bfdb9c pci: pci_mvebu: Fix write_config() with PCI_SIZE_8 or PCI_SIZE_16
Current implementation of write_config() is broken for PCI_SIZE_8 or
PCI_SIZE_16 as it always uses writel(), which means that write operation
is always 32-bit, so upper 24 bits for PCI_SIZE_8 and upper 16 bits for
PCI_SIZE_16 are cleared.

Fix this by using writeb() and writew(), respectively.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-03 06:45:26 +01:00
b8bfe05282 Merge tag 'u-boot-amlogic-20211102' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- add sm efuse write support and cmd for read/write efuse
- add JetHub D1 eth mac generation with manufacturer OUI
2021-11-02 08:56:42 -04:00
a79115dde3 Prepare v2022.01-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 15:16:43 -04:00
9802154a94 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 12:19:22 +00:00
daaa10fddb Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Fixes for x86 build with Clang/LLVM compiler
- Tangier ACPI changes
- Edison SD card detect pin fix
- EFI on x86 doc update with latest instructions
- PXE utility fixes to align with latest x86 zboot implementation
2021-11-01 08:14:45 -04:00
5270bee9b2 x86: tangier: pinmux: Move error message to the caller
Move error message to the caller of mrfld_pinconfig*() in order
to unify them in the future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 10:19:05 +08:00
74bf2048e6 x86: tangier: pinmux: Move is_protected assignment closer to its user
Move is_protected assignment closer to its user.
This increases readability and makes maintenance easier.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 10:10:11 +08:00
144cb06083 x86: edison: Don't take SD card detect pin into consideration
There are two PCB designs in the wild which use the opposite
signaling for SD card detection. This makes U-Boot working
in one case and failing in the other. Quirk this out by
disconnecting SD card detection pin from the PCB by switching
it to mode 3. In the disconnected state the read value is always
the same and inverted to what we are expecting in the code.

BugLink: https://github.com/edison-fw/meta-intel-edison/issues/136
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 09:50:55 +08:00
90cc2c5c64 x86: tangier: Enable support for SD/SDIO family in the pinmux driver
We would need to quirk out the Card Detect case and for that we allow
configuring the SD/SDIO family of pins.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 09:50:55 +08:00
9bcd51b838 x86: Fix i8254 ifdef include guard
When building U-Boot with clang, it notices that the i8254.h include
guard does not work correctly due to a typo. Fix it.

Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the other same typo at the end of the same file]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 09:50:55 +08:00
daf26a6bc2 x86: chromebook_coral: fix C block comment
Fix a warning seen when compiling this dts file.

Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 09:50:55 +08:00
d3023b8139 x86: tangier: Replace Method() by Name() for _STA object
There is no point to use Method() for the constant.
Replace it with Name() defined object. For the _STA
case it saves 3 bytes per each entry.

Before: 2881
After: 2833

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 09:50:55 +08:00
c97bd17b2c pxe_utils: Clean up {bootm,zboot}_argv generation
Signed-off-by: Zhaofeng Li <hello@zhaofeng.li>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-01 09:50:55 +08:00
23f3e399de pxe_utils: Fix arguments to x86 zboot
bootm and zboot accept different arguments:

> bootm [addr [arg ...]]
>    - boot application image stored in memory
>        passing arguments 'arg ...'; when booting a Linux kernel,
>        'arg' can be the address of an initrd image

> zboot [addr] [size] [initrd addr] [initrd size] [setup] [cmdline]
>       addr -        The optional starting address of the bzimage.
>                     If not set it defaults to the environment
>                     variable "fileaddr".
>       size -        The optional size of the bzimage. Defaults to
>                     zero.
>       initrd addr - The address of the initrd image to use, if any.
>       initrd size - The size of the initrd image to use, if any.

In the zboot flow, the current code will reuse the bootm args and attempt
to pass the initrd arg (argv[2]) as the kernel size (should be argv[3]).
zboot also expects the initrd address and size to be separate arguments.

Let's untangle them and have separate argv/argc locals.

Signed-off-by: Zhaofeng Li <hello@zhaofeng.li>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-01 09:50:55 +08:00
7a0eecb2bd docs: uefi: Update stale U-Boot on EFI doc
The existing intructions in the U-Boot on EFI doc do not work with
the latest QEMU. Update the doc with the correct instructions, as
well as using the new OVMF URL link.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01 09:50:55 +08:00
360e392274 Merge tag 'dm-pull-boo21' of https://source.denx.de/u-boot/custodians/u-boot-dm
Environment tidy-ups
patman 'postfix' support
fix binman test race condition causing a timeout error

# gpg: Signature made Sun 31 Oct 2021 03:36:55 PM EDT
# gpg:                using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg:                issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655  B627 7F17 3A3E 9008 ADE6
2021-10-31 15:48:43 -04:00
b55881ddb4 bootstage: Add SPL support
Allow usage of the bootstage facilities in SPL.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
082c119af9 patman: Add "postfix" support to patch subjects
In some communities, it may be necessary to append something after PATCH
in the subject line. For example, the Linux networking subsystem
expects [1] patch subject prefixes like [RFC PATCH net-next 0/99]. This
adds support for such "postfix"s to patman. Although entirely cosmetic,
it is still nice to have.

[1] https://www.kernel.org/doc/html/latest/networking/netdev-FAQ.html#how-do-i-indicate-which-tree-net-vs-net-next-my-patch-should-be-in

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
37f3758a25 env: Use static_assert() to check if default_environment is too large
Check sizeof(default_environment) against ENV_SIZE in a static_assert()
instead of runtime.
Only check if !USE_HOSTCC (for in fw_env tool ENV_SIZE expands to a
variable, and cannot be checked statically) nad
!DEFAULT_ENV_INSTANCE_EMBEDDED, for in that case the default_environment
variable is not set.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
c5cbbe35fd env: Always use char for default_environment
Sometimes we use uchar and sometimes char for the default environment
array. By always using char, we can get rid of some explicit casts.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
b26334824b board: freescale: various boards: Let env subsystem set gd->env_addr
Various freescale boards set gd->env_addr to default_environment in
board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is
redundant, since it is done by env_init() before board_init() is called.

Let the env subsystem handle this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
535870f3b0 board: synquacer: developerbox: Don't set gd->env_addr to default_environment
This board sets gd->env_addr to default_environment in board_init(), but
the board has environment in SPI flash according to defconfig. Let the
env API handle environment automatically.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
ee483902ae env: flash: Cosmetic fix
Change tab to space in env_flash_init().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
cf89c5180a env: flash: Let generic env_init() assign default environment
env_flash_init() (both implementations) assigns default environment if
ENV_INVALID, but this is done in the generic env_init() function, which
calls this initializer, so drop it from here.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
9fc3106219 env: nowhere: Cosmetic fix
Use spaces instead of tabs in assignments, since there are no lines to
align assignment values to.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
5aab7f5dec env: nowhere: Let generic env_init() assign default environment
env_nowhere_init() assigns default environment if ENV_INVALID, but this
is done in the generic env_init() function, which calls this
initializer, so drop it from here.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
a73c1f006c env: nvram: Cosmetic fix in env_nvram_init()
Use spaces consistently in assignments instead of tabs.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
4735de4ffc env: nvram: Let generic env_init() assign default environment
env_nvram_init() assigns default environment if ENV_INVALID, but this is
done in the generic env_init() function, which calls this initializer,
so drop it from here.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
07dcd82546 env: nand: Put ENV_INVALID into gd->env_valid if default environment
env_nand_init() says the environment is valid even if it is assigning
default environment due to not being able to access nand pre-reloaction
(determined by macro values). Change this to ENV_INVALID and let the
generic env_init() function, which calls this initializer, assign the
default environment.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
af8149e9ac env: sf: Put ENV_INVALID into gd->env_valid on CRC failure
env_sf_init_addr() says the environment is valid even if it is assigning
default environment due to CRC failure. Change this to ENV_INVALID and
let the generic env_init() function, which calls this initializer,
assign the default environment.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
87221bd66c env: sf: Use ENV_VALID enum names instead of literals
The function env_sf_init_addr() assigns number literals (1) instead of
ENV_VALID to gd->env_valid. Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
9ab30d2baf env: sf: Cosmetic fix in env_sf_init_addr()
In the if clause we use tabs and in the else clause spaces. Let's use
spaces in the if clause too.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
5877228321 x86: Fix linking u-boot with ld.lld
When linking the final u-boot binary with LLD, the following link errors
are seen:

ld.lld: error: can't create dynamic relocation R_386_32 against local
               symbol in readonly segment; recompile object files with
               -fPIC or pass '-Wl,-z,notext' to allow text relocations
               in the output
>>> defined in arch/x86/cpu/start.o
>>> referenced by arch/x86/cpu/start.o:(.text.start+0x32)
[...]
>>> defined in arch/x86/cpu/start16.o
>>> referenced by arch/x86/cpu/start16.o:(.start16+0x1C)

According to Nick Desaulniers:

"This is a known difference between GNU and LLVM linkers; the GNU
 linkers permit relocations in readonly segments (making them not read
 only), LLVM does not (by default)."

Since U-Boot apparently seems to use relocations in readonly segments,
change the global linker flags to permit them when linking with LLD by
specifying '-z notext'.

Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
286a1595fb sandbox: Migrate ARCH_MAP_SYSMEM to Kconfig
Move this from a hard-coded define in config.mk to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
b2dfe8382d binman: Allow timeout to occur in the image or its section
At present testThreadTimeout() assumes that the expected timeout happens
first when building the section, but it can just as easily happen at the
top-level image. Update the test to cope with both.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2021-10-31 12:26:44 -06:00
2289629f27 image.h: make image_sign_info.fit point to const
The data blob apparently does not need to be modified through the fit
field of the image_sign_info struct so make it point to const to avoid
the need to cast away constness in functions that assign a pointer to
const data to the field.

fit_image_setup_verify already had to cast away constness as it assigned
a const void * argument to the field. The cast can now be removed.

Signed-off-by: Hannu Lounento <hannu.lounento@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 12:26:44 -06:00
77680d8f85 Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- usb_mass_storage, xhci-brcm bugfixes
2021-10-31 12:48:08 -04:00
e63a3130e9 Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- rzg2_beacon updates
2021-10-31 12:47:35 -04:00
50bff6a6f8 Merge branch '2021-10-31-assorted-platform-updates'
- Revert GIC LPI changes that need to be reworked.
- mvebu SATA booting bugfix
- Samsung Galaxy S9/S9+(SM-G96x0), Samsung Galaxy A and Apple M1
  platform support.
2021-10-31 12:21:12 -04:00
3e2095e960 board: samsung: add support for Galaxy A series of 2017 (a5y17lte)
Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones.
U-boot can be used as chain-loaded bootloader to gain control
on booting vanilla linux(and possibly others) kernels

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31 11:25:39 -04:00
69bde0410a SoC: exynos: add support for exynos 78x0
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets
introduced on March 2017.
Features:
- 8 Cortex A53 cores
- ARM Mali-T830 MP3 GPU
- LTE Cat. 7 (7880) or 6 (7870) modem

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31 11:25:39 -04:00
d8428f73c3 pinctrl: exynos: add support for multiple pin banks
Iterate all pin banks to find a pin

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31 11:25:39 -04:00
85fcf94160 serial: samsung: add support for skip debug init in s5p
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31 11:25:39 -04:00
80565ec6f0 board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) board
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone,
for China \ Hong Kong markets.
Has unlockable bootloader, unlike SM-G960U (American market version),
which allows running u-boot as a chain-loaded bootloader.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-10-31 11:25:38 -04:00
4cbc16ceb2 SoC: qcom: add support for SDM845
Hi-end qualcomm chip, introduced in late 2017.
Mostly used in flagship phones and tablets of 2018.
Features:
- arm64 arch
- total of 8 Kryo 385 Gold / Silver cores
- Hexagon 685 DSP
- Adreno 630 GPU

Tested only as second-stage bootloader.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
2021-10-31 08:46:44 -04:00
90496afc27 clocks: qcom: add clocks for SDM845 debug uart
Allows to change clock frequency of debug uart,
thus supporting wide range of baudrates.
Enable / disable functionality is not implemented yet.
In most use cases of SDM845 (i.e. mobile phones and tablets)
it's not needed, because qualcomm first stage bootloader leaves it
initialized, and on the other hand there's no possibility to
replace signed first stage bootloader with u-boot.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-10-31 08:46:44 -04:00
7964c30541 pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoC
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
[trini: Add CONFIG_SDM845 around sdm845_data usage]
2021-10-31 08:46:44 -04:00
f5a2d6b4b0 spmi: msm: add arbiter version 5 support
Currently driver supports only version 1 and 2.
Version 5 has slightly different registers structure

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-10-31 08:46:44 -04:00
324df15a29 serial: qcom: add support for GENI serial driver
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-10-31 08:46:44 -04:00
91ce6bf20b doc: board: apple: Add Apple M1 documentation
Provide preliminary instructions on how to get U-Boot to run on
Apple Silicon Macs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00
3dfef53610 arm: dts: apple: Add preliminary device trees
Add preliminary device trees for the Apple M1 mini (2020) and
Apple M1 Macbook Pro 13" (2020).  Device tree bindings for
the Apple M1 SoC are still being formalized and these device
trees will be synchronized with the Linux kernel as needed.

The device trees in this commit are based on the initial Apple
M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl,
pmgr, usb based on bindings on track for inclusion in Linux
5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and
watchdog that don't have a proposed binding yet.

These device trees are provided as a reference only as U-Boot
uses the device tree passed by the m1n1 bootloader.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00
785cfde5b3 iommu: Add Apple DART driver
The DART is an IOMMU that is used on Apple's M1 SoC.  This driver
configures the DART such that it operates in bypass mode which is
enough to support DMA for the USB3 ports integrated on the SoC.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00
d520e1fb72 serial: s5p: Add Apple M1 support
Apple M1 SoCs include an S5L UART which is a variant of the S5P
UART.  Add support for this variant and enable it by default
on Apple SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00
003b657edc arm: apple: Add initial support for Apple's M1 SoC
Add support for Apple's M1 SoC that is used in "Apple Silicon"
Macs.  This builds a basic U-Boot that can be used as a payload
for the m1n1 boot loader being developed by the Asahi Linux
project.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add MAINTAINERS entry]
2021-10-31 08:46:44 -04:00
fb57462437 test: Add tests for IOMMU uclass
Add a set of tests for the IOMMU uclass.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00
40dbf03d7d iommu: Add IOMMU uclass
This uclass is intended to manage IOMMUs on systems where the
IOMMUs are not in bypass mode by default.  In that case U-Boot
cannot ignore the IOMMUs if it wants to use devices that need
to do DMA and sit behind such an IOMMU.

This initial IOMMU uclass implementation does not implement and
device ops and is intended for IOMMUs that have a bypass mode
that does not require address translation.  Support for IOMMUs
that do require address translation is planned and device ops
will be defined when support for such IOMMUs will be added.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00
d73db30427 arm: mvebu: Fix booting from SATA
Use proper SATA macro for boot_device switch in spl_boot_device() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
2021-10-31 08:46:44 -04:00
60b9b47d29 Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"
Stop using the device tree as a source for ad-hoc information.

This reverts commit 2ae7adc659.

Signed-off-by: Michael Walle <michael@walle.cc>
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-31 08:46:29 -04:00
a84cea06bb Revert "arm64: Layerscape: Survive LPI one-way reset workaround"
Ad-hoc bindings that are not part of the upstream device tree / bindings
are not allowed in-tree.  Only bindings that are in-progress with
upstream and then re-synced once agreed upon are.

This reverts commit af288cb291.

Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marc Zyngier <maz@kernel.org>
2021-10-30 23:07:51 -04:00
1833e68c4f cmd: usb_mass_storage: Use part_get_info_by_dev_and_name_or_num
This allows specifying partitions using more extended syntax. This is
particularly useful to access eMMC hardware partitions. For example,
this allows something like

	ums 0 mmc 0.0,0.1,0.2,0.3

to expose four LUNs for each of the four default eMMC hardware
partitions. Note that the comma syntax was already present, and this
syntax is already documented.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2021-10-30 22:55:00 +02:00
617e851e3a usb: xhci-brcm: Include header file needed for dev_err
dev_err seems to be moved to different header file. Include
dm/device_compat.h file to compile properly.

Fixes: 69dae8902b ("linux/compat.h: Remove redefinition of dev_xxx macros")
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-10-30 22:54:57 +02:00
16f1f00589 ARM: rmobile: Rename r8a774a1_beacon_defconfig to rzg2_beacon_defconfig
Now that the three M/N/H variants can be built from one config,
rename the defconfig file to be more generic since it supports multiple
RZ/G2.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-30 22:54:07 +02:00
5c5437b81e ARM: rmobile: beacon: Enable reference clocks for USB and AVB
Both Ethernet and USB drivers get their reference clocks from
the versaclock.  Enable that driver and the common clock driver
by default.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29 21:52:20 +02:00
8e8fb50a93 ARM: rmobile: Beacon: Remove dead code
There are a few do-nothing functions that can be removed.
Remove them.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29 21:52:20 +02:00
cde373f04f ARM: rmobile: beacon: Remove duplicated for RZ/G2 M/N/H
Now that TARGET_BEACON_RZG2M can handle all the work that
was done with TARGET_BEACON_RZG2N and TARGET_BEACON_RZG2H,
remove them since they just create more duplicate code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29 21:52:19 +02:00
0d115694ab ARM: rmobile: beacon: Support RZ/G2 [M/N/H] on TARGET_BEACON_RZG2M
The three different boards share the same board file and only differ
in terms of which SoC is being used.  By enabling FIT on
TARGET_BEACON_RZG2M, it can support all three boards and elimate
duplicate code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29 21:51:54 +02:00
a72fca75f9 ARM: rmobile: Enable board detection when FIT is enabled
There are three boards from Beacon, RZ/G2 M/N/H which all
use the same board file, but different device trees.
Add code to automatically select the proper device tree
based on the CPU type.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29 21:51:54 +02:00
4f4f974a46 ARM: amlogic: add JetHub D1 eth mac generation with manufacturer OUI
JetHome has own MAC OUI. Add jethub-j100 board file. Update config.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-29 19:16:07 +02:00
a09929cc6c Merge https://source.denx.de/u-boot/custodians/u-boot-mmc
- Fix mmc_switch timeout
- Update mmc hwpartitiion command
- Support wait_dat0 for Freescale eSDHC/sdhci drivers
2021-10-29 08:27:32 -04:00
52195ba5f5 ARM: amlogic: add sm efuse write support and cmd for read/write efuse
This adds support for amlogic efuse write and provides two subcommands
of "sm" command: "efuseread" and "efusewrite" to read/write bytes between
memory and efuse.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
[narmstrong: fixed indent at end of patch]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-29 14:06:45 +02:00
412ab13328 arm64: zynqmp: Replace comma by semicolon
Fix issue reported by checkpatch.pl

WARNING: Possible comma where semicolon could be used
 #499: FILE: board/xilinx/zynqmp/zynqmp.c:499:
 +	size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
 +	reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/ef264451ef9455ada9784bedbc91f74b94b8a237.1634799528.git.michal.simek@xilinx.com
2021-10-29 13:01:47 +02:00
e8b43c6409 xilinx: zynqmp: Save multiboot as variable
Save multiboot register as u-boot variable. And use it as primary source
for composing dfu_alt_info for capsule update. If variable is not defined

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/96556221443489c952717bcb340b4707901c9bdd.1635149450.git.michal.simek@xilinx.com
2021-10-29 13:00:52 +02:00
c95b0297e9 mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI
There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
needs to be enabled for multi block writes (MMC CMD 18).

Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-29 18:22:32 +09:00
44645f87de mmc: Fix mmc_switch excessive timeout
Fix branching to avoid premature falling back on a long timeout instead
of continuation of the initialization attempt.

Clear of the comment to avoid the ambiguity.

Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-29 18:22:32 +09:00
0d453c84ba cmd: mmc: check whether card is SD or eMMC before hwpartition
It doesn't need to follow more sequence to do the hwparititioning,
because SD doesn't support hwpartitioning feature.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-29 18:22:32 +09:00
f702dc1e1f cmd: mmc: Support mmc hwpartition user enh start -
Add option to extend the hardware partition to the maximum size by
using the '-' dash sign instead of $cnt parameter. This is useful
in case we want to switch the entire eMMC user area into pSLC mode,
especially in case the device may be populated with different size
eMMCs. With this change, we do not have to calculate the number of
blocks of the user area manually.

To switch the pSLC mode for user area, use e.g. the following.
WARNING: This is a one-time irreversible change.
=> mmc hwpartition user enh 0 - wrrel on complete

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-29 18:22:32 +09:00
40e6f52454 drivers: mmc: Add wait_dat0 support for sdhci driver
Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-29 18:22:32 +09:00
ee02543561 drivers: mmc: Add wait_dat0 support for Freescale eSDHC driver
Adds an implementation of the wait_dat0 MMC operation for the Freescale
eSHDC driver, allowing the driver to continue when the card is ready
rather than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-29 18:22:32 +09:00
aafc378a6c Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Fix usage of BIN header arguments (Pali)
- mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali)
- mvebu: nandpagesize support for kwbimage v1 (Pali)
2021-10-28 07:57:54 -04:00
7af368f471 arm: mvebu: Fix comments about kwbimage structures
kwbimage v1 is used on more SoCs.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
33cdd9eeaa arm: mvebu: Update name of kwbimage v1 field at offset 0x2-0x3
At this offset is stored nand page size.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
0089f61e2d tools: kwboot: Patch nandpagesize to zero also for v1 image
kwbimage v1 has also nandpagesize field. So set it to zero for both image
versions when image is not signed.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
2fdba4f658 tools: kwbimage: Add support for NAND_PAGE_SIZE command also for v1 images
The NAND_PAGE_SIZE command is already supported by mkimage for v0 images,
but not for v1 images.

A38x and A39x BootROM supports reading NAND flash page size from v1 image
in the same way as Kirkwood BootROM from v0 image. It it documented in A38x
and A39x Functional Specification.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
59102987be arm: mvebu: turris_omnia: Fix MTD partitions order for Linux
Linux enumerates MTD partitions in DTB order, while the fdt_add_subnode()
function puts a new subnode at the beginning.

To fix this, put MTD partitions into DTB in reverse order.

Fixes: 92f36c8e74 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
e6571f38c9 arm: mvebu: Remove dummy BIN header arguments for SPL binary
U-Boot SPL binary does not read BIN header arguments, so passing some dummy
values 0000005b and 00000068 has no effect for U-Boot SPL code.

Probably these two values comes from old Marvell DDR training code which
was separated from U-Boot and used it for some configuration.

Seems that two 32-bit values were specified here to ensure SPL code
alignment to 128-bit boundary as it is required e.g. for A370 or AXP
processors. Main kwbimage header is 64-byte long which is aligned to
128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header
arguments is stored in 32-bit number. So for alignment to 128-bit boundary
is needed 64-bit padding which exactly these two 32-bit dummy arguments
provided.

Now when mkimage correctly aligns start of executable code in BIN header to
128-bit boundary, there is no requirement to put dummy argument values into
kwbimage. So remove them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
701769d87e arm: mvebu: Add documentation for save_boot_params() function
Important detail is availability of kwbimage BIN header arguments passed
via r0 and r1 registers by BootROM.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
e58f08b479 tools: kwbimage: Align BIN header executable code to 128-bit boundary
ARM executable code inside the BIN header on some mvebu platforms
(e.g. A370, AXP) must always be aligned with the 128-bit boundary. This
requirement can be met by inserting dummy arguments into BIN header.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
a85a71d396 tools: kwboot: Align UART baudrate change code in BIN header to 128-bit boundary
ARM executable code inside the BIN header on some mvebu platforms
(e.g. A370, AXP) must always be aligned with the 128-bit boundary. This
requirement can be met by inserting dummy arguments into BIN header.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28 10:33:32 +02:00
e7fb789612 sandbox: Remove OF_HOSTFILE
OF_HOSTFILE is used on sandbox configs only.  Although it's pretty
unique and not causing any confusions,  we are better of having simpler
config options for the DTB.

So let's replace that with the existing OF_BOARD.  U-Boot would then
have only three config options for the DTB origin.
- OF_SEPARATE, build separately from U-Boot
- OF_BOARD, board specific way of providing the DTB
- OF_EMBED embedded in the u-boot binary(should not be used in production

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-27 16:38:26 -04:00
670d657dfb Merge tag 'efi-2022-01-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc1-2

doc:
	Remove obsolete PPC4XX references

UEFI:
	Implement missing TCG2 measurements
	Code clean up

# gpg: Signature made Tue 26 Oct 2021 05:56:47 PM EDT
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2021-10-26 18:42:52 -04:00
c9661d0fee Merge branch '2021-10-26-add-nand-biterr-and-bugfixes'
- Add biterr sub-command to "nand"
- scmi, rsa, uuid bugfixes, re-sort DFU menu in Kconfig and remove
  superfluous checks before free in env.
2021-10-26 18:34:55 -04:00
65aa259aa7 efi_loader: add DeployedMode and AuditMode variable measurement
This commit adds the DeployedMode and AuditMode variable
measurement required in TCG PC Client Platform Firmware
Profile Specification.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-10-26 21:33:19 +02:00
96485d2f3f efi_loader: simplify tcg2_measure_secure_boot_variable()
This commit simplifies tcg2_measure_secure_boot_variable()
using secure_variables table.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-10-26 21:33:19 +02:00
ce3dbc5d08 efi_loader: add UEFI GPT measurement
This commit adds the UEFI GPT disk partition topology
measurement required in TCG PC Client Platform Firmware
Profile Specification

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-10-26 21:32:46 +02:00
28ab12ad14 env: superfluous check before free()
Free() checks if its argument in NULL. There is no need for the caller to
do the same.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-26 15:26:45 -04:00
73d18e352d dfu: Sort Kconfig entries alphabetically
The DFU_MTD Kconfig entry is in the wrong position, move it into the
correct alphabetically sorted position. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-26 15:26:45 -04:00
70a9f4d25b lib: uuid: fix the test on RNG device presence
Correct the test on RNG device presence,when ret is equal to 0,
before to call dm_rng_read function.

Without this patch the RNG device is not used when present (when ret == 0)
or a data abort occurs in dm_rng_read when CONFIG_DM_RNG is activated but
the RNG device is not present in device tree (ret != 0 and devp = NULL).

Fixes: 92fdad28cf ("lib: uuid: use RNG device if present")
CC: Matthias Brugger <mbrugger@suse.com>
CC: Torsten Duwe <duwe@suse.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-26 15:26:45 -04:00
5d39c93244 common: Kconfig.boot: add config SPL_FIT_RSASSA_PSS
The padding pss is only supported on u-boot and tools since
commit 2bbed3ff8c ("image: Use Kconfig to enable FIT_RSASSA_PSS on host")

This commit adds the config SPL_FIT_RSASSA_PSS to support
the padding pss in the SPL.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-26 15:26:45 -04:00
b560c704d6 lib: rsa: rsa-verify: also check that padding is not NULL
This commit adds a check on the padding in the function rsa_verify_key
to avoid using a NULL pointer.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-26 15:26:45 -04:00
32cc3929a1 firmware: scmi: fix struct layout for scmi_clk_rate_set_in
First two fields are reversed compared to what is expected by the SCMI
specification.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Fixes: 6038884483 ("clk: add clock driver for SCMI agents")
2021-10-26 15:26:45 -04:00
4ea84c5dce cmd: nand biterr - Add support for nand biterr command
The command shall be used to induce bit errors in the nand page
manually. The code flips a bit in the specified offset without
changing the ECC. This helps to see how the software handles the
error.

The patch is ported from
https://patchwork.ozlabs.org/project/uboot/patch/\
1325691123-19565-1-git-send-email-holger.brunck@keymile.com

The implementation is inspired from
'mtd-utils/nand-utils/nandflipbits.c'

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2021-10-26 15:26:45 -04:00
3d49ee8510 efi_loader: add SMBIOS table measurement
TCG PC Client Platform Firmware Profile Specification
requires to measure the SMBIOS table that contains static
configuration information (e.g. Platform Manufacturer
Enterprise Number assigned by IANA, platform model number,
Vendor and Device IDs for each SMBIOS table).

The device- and environment-dependent information such as
serial number is cleared to zero or space character for
the measurement.

Existing smbios_string() function returns pointer to the string
with const qualifier, but exisintg use case is updating version
string and const qualifier must be removed.
This commit removes const qualifier from smbios_string()
return value and reuses to clear the strings for the measurement.

This commit also fixes the following compiler warning:

lib/smbios-parser.c:59:39: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
  const struct smbios_header *header = (struct smbios_header *)entry->struct_table_address;

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2021-10-26 17:58:14 +02:00
75e33b378b Merge branch '2021-10-25-assorted-updates'
- Allow redundant environment on the eMMC HW boot partitions
- Use LMB in "loads"
- env, dfu + spi, OPTEE bugfixes
2021-10-26 09:33:17 -04:00
ca341e98c8 dfu: dfu_sf: Read the SPI flash in 16 MiB chunks
Not all SPI flashes and controllers can do continuous transfer longer
than 16 MiB, so perform the DFU read in 16 MiB chunks.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2021-10-25 18:13:12 -04:00
949eb228f3 arm: spl: prepare for jumping to OPTEE
Make sure to (if applicable) flush the D-cache, invalidate I-cache,
and disable MMU and caches before jumping to OPTEE.
This fixes the SDP->SPL->OPTEE boot flow on iMX6Q and most likely on
some other ARM SoCs.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-25 17:17:24 -04:00
a45dac1785 efi_loader: simplify tcg2_measure_secure_boot_variable()
Don't duplicate GUIDs.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-25 21:13:07 +02:00
02fef8b101 efi_loader: simplify efi_sigstore_parse_sigdb()
Simplify efi_sigstore_parse_sigdb() by using existing functions.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-25 21:13:07 +02:00
e618d1d285 efi_loader: function to get GUID for variable name
In multiple places we need the default GUID matching a variable name.
The patch provides a library function. For secure boot related variables
like 'PK', 'KEK', 'db' a lookup table is used. For all other variable
names EFI_GLOBAL_VARIABLE is returned.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-25 21:13:06 +02:00
d47671c631 efi_loader: treat UEFI variable name as const
UEFI variable names are typically constants and hence should be defined as
const. Unfortunately some of our API functions do not define the parameters
for UEFI variable names as const. This requires unnecessary conversions.

Adjust parameters of several internal functions to tre UEFI variable names
as const.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-25 21:13:06 +02:00
7a6fb28c8e efi_loader: capsule: add back efi_get_public_key_data()
The commit 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to
.rodata"") failed to revert the removal of efi_get_public_key_data().

Add back this function and move it under lib/efi_loader so that other
platforms can utilize it. It is now declared as a weak function so that
it can be replaced with a platform-specific implementation.

Fixes: 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to
	.rodata"")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-25 21:13:06 +02:00
c5e81fddf2 Revert "Revert "doc: Update CapsuleUpdate READMEs""
This reverts commit a7e4f905d2.
The description originally written by Sughosh is still valid
even after the commit 47a25e81d3 ("Revert "efi_capsule: Move signature
from DTB to .rodata"") was applied.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2021-10-25 21:13:06 +02:00
18cfbbba1e Revert "Revert "mkeficapsule: Remove dtb related options""
This reverts commit d428e81266.
We have agreed with removing dtb-related stuff from mkeficapsule
command even if the commit 47a25e81d3 ("Revert "efi_capsule: Move
signature from DTB to .rodata"") was applied.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-25 21:13:06 +02:00
e0b56e068c .mailmap: add Heinrich Schuchardt
Add a mailmap entry for me.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-25 21:13:06 +02:00
f86352eb82 efi_loader: add missing const qualifier
This commit fixes the following compilation warning
of boottime->install_configuration_table() function.

lib/efi_selftest/efi_selftest_tcg2.c:475:46:
warning: passing argument 1 of ‘boottime->install_configuration_table’
discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
  ret = boottime->install_configuration_table(&smbios_guid, dmi);

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-25 21:13:06 +02:00
8e7791a959 doc: Remove the obsolete README.mpc74xx file
Support for the PPC74xx processors has been removed in commit
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")
more than 6 years ago already. So the corresponding README file
can now be removed, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-25 21:13:06 +02:00
b0f100e0f5 doc: remove AMCC PPC405 processor references
Support for PPC4XX processors has been removed. So we should not mention it
in the documentation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
2021-10-25 21:13:06 +02:00
d11d1becbd env: mmc: Add support for redundant env in both eMMC boot partitions
Currently the MMC environment driver supports storing redundant environment
only in one eMMC partition at different offsets. This is sub-optimal, since
if this one boot partition is erased, both copies of environment are lost.
Since the eMMC has two boot partitions, add support for storing one copy of
environment in each of the two boot partitions.

To enable this functionality, select CONFIG_SYS_REDUNDAND_ENVIRONMENT to
indicate redundant environment should be used. Set CONFIG_SYS_MMC_ENV_PART
to 1 to indicate environment should be stored in eMMC boot partition. Set
CONFIG_ENV_OFFSET equal to CONFIG_ENV_OFFSET_REDUND, and both to the offset
from start of eMMC boot partition where the environment should be located.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-10-25 14:33:13 -04:00
c6855195e4 loads: Block writes into LMB reserved areas of U-Boot
The loads srec loading may overwrite piece of U-Boot accidentally.
Prevent that by using LMB to detect whether upcoming write would
overwrite piece of reserved U-Boot code, and if that is the case,
abort the srec loading.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-25 14:29:37 -04:00
f47f87f257 env: mmc: Add missing eMMC bootpart restoration to env erase
If the environment is stored in eMMC hardware boot partition, the environment
driver first stores the currently selected eMMC boot partition, then does the
requested operation, and then restores the original boot partition settings.
In case the environment operation fails, the boot partition settings are also
restored.

The 'env erase' implementation in the MMC environment driver lacks the path
which restores the boot partition. This could lead to various failure modes,
like the system boots the wrong copy of bootloader etc. Fix this by filling
in the missing restoration path.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-10-25 14:29:37 -04:00
397b35f097 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Add and enable watchdog driver
- Prepare for SYSRESET driven AXP poweroff
- Prepare for SoCs without MMC2
- Some fixes for extending SPL (SPL-DM for RISC-V)
- Some preparations for proper VBUS management
- Fix secure monitor move
2021-10-25 12:09:57 -04:00
c846fe43f0 mmc: sunxi: conditionally include MMC2 initialization code
Allwinner R329 has no MMC2.

Only include the code of MMC2 if the base address of it is defined.

Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:54:57 +01:00
03510bf621 sunxi: only include alias for eMMC when mmc2 used
Some Allwinner SoCs (e.g. R329) doesn't have a MMC2 controller at all,
and on boards that we do not utilize MMC2, the alias for it is just
useless.

Only include the alias when we specify CONFIG_MMC_SUNXI_EXTRA_SLOT to 2.

Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:54:50 +01:00
08bdb976b7 sunxi: dts: H616: Enable the watchdog
For some reason, the watchdog was disabled in the H616 device tree. Most
likely this is a copy-paste from the H6 device tree: the H6 watchdog is
disabled because it is broken in some chips. However, there is no
evidence of issues with the H616 watchdog.

Enable the watchdog node so it can be used by the driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:54:42 +01:00
35a7677e38 Merge tag 'u-boot-imx-20211022' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20211022
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9561

- i.MX8:
	- Toradex Verdin (switch to binman, cleanup, etc.)
	- Phytec phycore_imx8mm (fixes, boot from SPI-NOR)
	- fixes for imx8mp_evk
- doc (i.MX): MX8MM with Fast boot
- i.MX6:
	- Toradex : colibri-imx6ull with eMMC, fixes
- i.MX7ULP :
	- preparation for OPTEE + Serial Number
- generic:
	- imx8m_image: Support ddr3 firmware
2021-10-25 09:54:36 -04:00
b147bd3607 sunxi: Enable watchdog timer support by default
A watchdog helps recover from hangs or failure to boot an OS. It can
also be used by the sysreset framework to intentionally reset the
system. Now that a driver is available, let's enable this functionality
on sunxi boards.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:54:36 +01:00
93d34faeda watchdog: Add a driver for the sunxi watchdog
This driver supports the sun4i/sun6i/sun20i watchdog timers.
They have a maximum timeout of 16 seconds.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:54:26 +01:00
e0c628d728 clk: sunxi: Extend DM_RESET selection to SPL
The sunxi clock driver exposes a reset controller, so it selects the
reset controller framework. Ensure that dependency is also satisfied
when building the driver for the SPL.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:54:06 +01:00
0ec88323da sunxi: SPL SPI: Allow larger SPL
The more recent Allwinner SoCs BootROMs can actually load SPL images
larger than 32KB. We use this on the H616 to fit the extra code needed
for the PMIC into the image, and have provisions in board.c to respect
that larger SPL size when booting from MMC.

However the sunxi SPL SPI loader has a hardcoded load offset of 32KB,
which will fail on the H616.

To fix this, use the same algorithm we use for MMC: if the SPL size is
smaller than 32KB, we use 32KB, otherwise we expect the U-Boot payload
directly after the SPL code.

This prepares for SPI booting with larger SPLs like on the H616.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-25 14:48:58 +01:00
95d9ffd7b6 power: pmic: axp: Implement poweroff via sysreset
The AXP PMICs have the ability to power off the system. The existing
code for this is duplicated for each PMIC variant, and uses the legacy
non-DM "pmic_bus" interface. When SYSRESET is enabled, this can all be
replaced with a sysreset device using the DM_PMIC interface.

Since the trigger bit is the same on all PMIC variants, use the register
definitions from the oldest supported PMIC.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:51:03 +01:00
830e161eb4 power: axp: Avoid do_poweroff conflict with sysreset
The sysreset uclass has an option to provide the do_poweroff() function.
When that option is enabled, the AXP power drivers should not provide
their own definition.

For the AXP305, which is paired with 64-bit systems where TF-A provides
PSCI, there is another possible conflict with the PSCI firmware driver.
This driver can be enabled even if CONFIG_PSCI_RESET is disabled, so
make sure to use the right symbol in the condition.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:50:54 +01:00
344df3ca2c include: axp_pmic: Include headers for all variants
A single DM-based driver should be able to support some feature for
several PMIC variants where the interface is the same. For example,
all PMIC variants use the same register bit to trigger poweroff.

However, currently only definitions for a single PMIC are available at
a time. This requires drivers to use #ifdefs and different indentifiers
for each variant they support.

Let's simplify this by making register definitions for all variants
available from the header. Then no preprocessor conditions are needed;
the driver can use the register definition from any variant that
supports the relevant feature.

An exception is the GPIO-related definitions, which do not use unique
identifiers. So for now, keep them like before. They will be cleaned up
along with the GPIO driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:50:42 +01:00
5b4afbd40c include: axp_pmic: Add missing header guard definition
This header attempted to avoid multiple inclusion using a header guard.
But the preprocessor symbol was never defined, so the guard had no
effect. Fix this by defining the symbol.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:50:07 +01:00
a13fa74a8e tools: mksunxiboot: Use sunxi_image header directly
When adding eGON support to mkimage, the struct boot_file_head
definition was moved to its own header. This is the only thing
mksunxiboot needed out of asm/arch/spl.h. Clean up the relative
include by switching to new header.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:49:58 +01:00
00f82fcfba sunxi: A23/A33/H3: Actually move the secure monitor
commit 1ebfc0c631 ("sunxi: A23/A33/H3: Move sun8i secure monitor to
SRAM A2") attempted to move the secure monitor to SRAM A2. But not all
sun8i SoCs have SRAM A2, so a check was put in for SUNXI_SRAM_A2_SIZE to
avoid breaking the other SoCs.

However, because the header providing SUNXI_SRAM_A2_SIZE was not
included, this unintentionally skipped the new definitions on all SoCs.
Fix this by including the right header.

Fixes: 1ebfc0c631 ("sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:49:42 +01:00
6fa41cdd19 phy: sun4i-usb: Support VBUS detection via power supply
The device tree binding provides for getting VBUS state from a device
referenced by phandle, as an optional alternative to using a GPIO. In
U-Boot, where there is no power supply class, this VBUS detection will
be implemented using a regulator device and its get_enable method.
Let's hook this up to the PHY driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:49:28 +01:00
1da7b88cad phy: sun4i-usb: Refactor VBUS detection to match Linux
The Linux driver checks the VBUS detection GPIO first; then VBUS power
supply; then finally assumes VBUS is present. When adding VBUS power
supply support, we want to match that order, so we get the same behavior
in case both a GPIO and a power supply are provided in the device tree.

So refactor the function a bit to remove the early return, and use the
same "assume VBUS is present" final fallback.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:49:16 +01:00
6617894b69 phy: sun4i-usb: Remove a couple of debug messages
Both of these messages log the GPIO number of the ID detection GPIO,
which is not terribly useful, especially in the VBUS detection function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:49:07 +01:00
a3010bcfed sunxi: Select SPL_SEPARATE_BSS
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in
DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will
attempt to load its DTB from the wrong address (after BSS in DRAM).

This change fixes booting with SPL_OF_CONTROL=y.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25 14:48:58 +01:00
4f9d25537c spi: zynqmp_gqspi: Fix write issue at low frequencies
With current implementation we are seeing write issues at low frequencies
below 15Mhz. Make below changes to fix the issue.

1. Remove dummy genfifo entry in zynqmp_qspi_chipselect() which was
   incorrectly added in the past

2. Enable and poll for TX_FIFO_Empty after Tx data is filled in FIFO in
   zynqmp_qspi_fill_tx_fifo().

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1634652780-21755-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-25 10:02:25 +02:00
355d1e24f6 Merge https://source.denx.de/u-boot/custodians/u-boot-spi
- Fix mtd erase with mtdpart (Marek Behún)
- NXP fspi driver fixes (Kuldeep Singh)
2021-10-23 10:49:28 -04:00
b9cfd8b091 spi: nxp_fspi: Implement errata workaround for LS1028A
Errata ERR050568 description says that "Flash access by FlexSPI AHB
command may not work with platform frequency equal to 300 MHz" on
LS1028A.

By default, smaller length reads(equal to RX FIFO size) are done by IP
bus and larger length reads using AHB bus. For adding errata workaround,
use IP bus to read entire flash contents and disable AHB path when
platform frequency is 300Mhz.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23 15:56:47 +05:30
e8751a9387 spi: nxp-fspi: Add support for IP read only
Add support for disabling AHB bus and read entire flash contents via IP
bus only. Please note, this enables IP bus read using a quirk which can
be enabled directly in device-type data or in existence of an errata
where AHB bus may need to be disabled.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23 15:56:25 +05:30
85886161ef mtd: spi-nor-ids: Add SECT_4K to mt25qu512a
The mt25qu512a supports 4K or 64K sectors, so adding
SECT_4K to enable 4K sector usage.

Tested on Intel n5x hardware with QSPI carrier card

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
[jagan: droped Tested-by of patch author and datasheet link]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23 15:54:51 +05:30
b7a772a3bb mtd: spi-nor-ids: Add is25lp512 and is25wp512 devices
Add is25lp512 and is25wp512 devices to spi-nor id table

Tested on Intel n5x hardware with QSPI carrier card

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
[jagan: droped Tested-by of patch author]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23 15:52:29 +05:30
0d1ecc99cb mtd: Remove mtd_erase_callback() entirely
The original purpose of mtd_erase_callback() in Linux at the time it was
imported to U-Boot, was to inform the caller that erasing is done (since
it was an asynchronous operation).

All supplied callback methods in U-Boot do nothing, but the
mtd_erase_callback() function was (until previous patch) grossly abused
in U-Boot's mtdpart implementation for completely different purpose.

Since we got rid of the abusement, remove the mtd_erase_callback()
function and the .callback member from struct erase_info entirely, in
order to avoid such problems in the future.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-23 15:47:33 +05:30
a60397d219 mtd: mtdpart: Make mtdpart's _erase method sane
The _erase() method of the mtdpart driver, part_erase(), currently
implements offset shifting (for given mtdpart partition) in a weird way:
  1. part_erase() adds partition offset to block address
  2. parent driver's _erase() method is called
  3. parent driver's _erase() method calls mtd_erase_callback()
  4. mtd_erase_callback() subtracts partition offset from block address
     so that the callback function is given correct address
The problem here is that if the parent's driver does not call
mtd_erase_callback() in some scenario (this was recently a case for
spi_nor_erase(), which did not call mtd_erase_callback() at all), the
offset is not shifted back.

Moreover the code would be more readable if part_erase() not only added
partition offset before calling parent's _erase(), but also subtracted
it back afterwards. Currently the mtd_erase_callback() is expected to do
this subtracting since it does have to do it anyway.

Add the more steps to this procedure:
  5. mtd_erase_callback() adds partition offset to block address so that
     it returns the the erase_info structure members as it received them
  6. part_erase() subtracts partition offset from block address

This makes the code more logical and also prevents errors in case
parent's driver does not call mtd_erase_callback() for some reason.

(BTW, the purpose of mtd_erase_callback() in Linux is to inform the
 caller that it is done, since in Linux erasing is done asynchronously.
 We are abusing the purpose of mtd_erase_callback() in U-Boot for
 completely different purpose. The callback function itself has empty
 implementation in all cases in U-Boot.)

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
1fd5e67595 mtd: spi-nor-core: Check for ctrlc() in spi_nor_erase()
May it possible to interrupt the spi_nor_erase() function.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
ff0000b47d mtd: spi-nor-core: Call mtd_erase_callback() from spi_nor_erase()
The spi_nor_erase() function does not call mtd_erase_callback() as it
should.

The mtdpart code currently implements the subtraction of partition
offset in mtd_erase_callback().

This results in partition offset being added prior calling
spi_nor_erase(), but not subtracted back on return. The result is that
the `mtd erase` command does not erase the whole partition, only some of
it's blocks:

  => mtd erase "Rescue system"
  Erasing 0x00000000 ... 0x006fffff (1792 eraseblock(s))
  jedec_spi_nor spi-nor@0: at 0x100000, len 4096
  jedec_spi_nor spi-nor@0: at 0x201000, len 4096
  jedec_spi_nor spi-nor@0: at 0x302000, len 4096
  jedec_spi_nor spi-nor@0: at 0x403000, len 4096
  jedec_spi_nor spi-nor@0: at 0x504000, len 4096
  jedec_spi_nor spi-nor@0: at 0x605000, len 4096
  jedec_spi_nor spi-nor@0: at 0x706000, len 4096

This is obviously wrong.

Add proper calling of mtd_erase_callback() into the spi_nor_erase()
function.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reported-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
7398c1b758 mtd: spi-nor-core: Don't check for zero length in spi_nor_write() / spi_nor_erase()
This check is already done in all callers: mtdcore's mtd_write() /
mtd_erase(), legacy spi_nor_write() / spi_flash_erase(). No reason to do
this here as well.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-23 15:47:33 +05:30
a67b3719f3 mtd: spi-flash: Check for zero length in legacy spi_flash_*()
Check for zero length in the legacy spi_flash_read() /
spi_flash_write() / spi_flash_erase() functions.
On zero length, return 0 immediately, don't call the underlying method.

Rationale:
- these legacy functions call the _read(), _write() and _erase() methods
  of struct mtd
- the DM callers of these methods already check for zero length
- making all callers of these methods check for zero length makes it
  possible to remove the check from implementations of these _read(),
  _write() and _erase() methods

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-23 15:47:33 +05:30
f57277997b mtd: spi-nor-core: Check return value of write_disable() in spi_nor_erase()
The cleanup code of spi_nor_erase() function calls write_disable(), but
does not return it's return value even in case of failure. Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
a9d9d412e0 mtd: spi-nor-core: Don't overwrite return value if it is non-zero
The cleanup code of the spi_nor_erase() function overwrites the ret
variable with return value of clean_bar(), even if the ret variable is
already set. Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
5ea6dccee4 mtd: spi-nor-core: Check return value of write_enable() in spi_nor_erase()
The spi_nor_erase() function does not check return value of the
write_enable() call. Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
36384f612d mtd: spi-nor-core: Try cleaning up in case writing BAR failed
Use the cleanup codepath of spi_nor_erase() also in the event of failure
of writing the BAR register.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23 15:47:33 +05:30
e66c6f1027 mtd: spi-nor: Add support for Spansion S25FL256L
The S25FL256L is a part of the S25FL-L family and has the same feature set
as S25FL128L except the density.

The datasheet can be found in the following link.
https://www.cypress.com/file/316171/download

The S25FL256L is 32MB NOR Flash that does not support Bank Address
Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and
returns ENOTSUPP in setup() hook to avoid further ops.

Tested on Xilinx Zynq-7000 FPGA board.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
2021-10-23 15:38:27 +05:30
e4f97f1262 mtd: spi-nor-ids: Add GD25LQ256D Chip
Add Gigadevice GD25LQ256D SPI NOR chip.
https://www.gigadevice.com/datasheet/gd25lq256d/

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[jagan: updated commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-23 15:38:19 +05:30
f055f2e5a2 Merge tag 'efi-2022-01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc1

Documentation:
	Use Sphinx 3.43.
	Move system reset documentation to HTML

UEFI:
	Fix linking EFI apps with LLVM
	Fix alignment of loaded image
	Correct simple network protocol test
	Code cleanup
2021-10-22 12:43:30 -04:00
06685f9de2 Merge tag 'dm-pull-21oct21' of https://source.denx.de/u-boot/custodians/u-boot-dm
Refactoring of env_get_char() etc.
Update buildman to use gcc-11.1.0
Use in-container toolchain for nokia_rx51 CI test

# gpg: Signature made Thu 21 Oct 2021 09:34:07 PM EDT
# gpg:                using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg:                issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655  B627 7F17 3A3E 9008 ADE6
2021-10-21 21:41:47 -04:00
f231566475 env: Move non-cli env functions to env/common.c
Move the following functions from cmd/nvedit.c to env/common.c:
  env_set_ulong()
  env_set_hex()
  env_get_hex()
  eth_env_get_enetaddr()
  eth_env_set_enetaddr()
  env_get()
  from_env()
  env_get_f()
  env_get_ulong()
since these functions are not specific for U-Boot's CLI.

We leave env_set() in cmd/nvedit.c, since it calls _do_env_set(), which
is a static function in that file.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
a80652ebb3 env: Simplify env_match() and inline into env_get_f()
In the past the env_match() function was used to match envs with
- name, i.e. string "name"
- variable assignment, i.e. string "name=other_value"

The latter is not the case anymore, since the env_match() function is
now used only in env_get_f(), and so we can simplify the function into
a simple strncmp() with an additional comparison to '='.

Let's do this, and since the resulting function is quite simple, let's
also inline its code into env_get_f().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
a473766cce env: Use memcpy() instead of ad-hoc code to copy variable value
Copy the value of the found variable into given buffer with memcpy()
instead of ad-hoc code.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
3112ce0ce8 env: Make return value of env_get_f() behave like sprintf() on success
Currently the env_get_f() function's return value behaves weirdly: it
returns the number of bytes written into `buf`, but whether this is
excluding the terminating NULL-byte or including it depends on whether
there was enough space in `buf`.

Change the function to always return the actual length of the value of
the environment variable (excluding the terminating NULL-byte) on
success. This makes it behave like sprintf().

All users of this function in U-Boot are compatible with this change.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
6b6e3eeba9 env: Early return from env_get_f() on NULL name
Test non-NULL name immediately, not in env_match().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
6ba4473fb7 env: Don't match empty variable name in env_match()
Do we really allow zero-length variable name? I guess not.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
d1bca8d2a1 env: Use better name for variable in env_get_f()
The `nxt` variable actually points to the terminating null-byte of the
current env var, and the next env var is at `nxt + 1`, not `nxt`. So a
better name for this variable is `end`.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
eff73b2eed env: Use string pointer instead of indexes in env_get_f()
Since we no longer use env_get_char() to access n-th character of
linearized environment data, but rather access the arrays themselves, we
can convert the iteration to use string pointers instead of position
indexes.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
52f9ed34cb env: Inline env_get_char() into its only user
This function is a relic from the past when environment was read from
underlying device one character at a time.

It is used only in the case when getting an environemnt variable prior
relocation, and the function is simple enough to be inlined there.

Since env_get_char() is being changed to simple access to an array, we
can drop the failing cases and simplify the code (this could have been
done before, since env_get_char() did not fail even before).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
7b611ee90e env: Change env_match() to static and remove from header
This function was used by other parts of U-Boot in the past when
environment was read from underlying device one character at a time.

This is not the case anymore.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
6aa652d008 examples: api: glue: Remove comment that does not apply anymore
This comment is not true since commit 6215bd4c1f ("api: Use hashtable
function for API_env_enum").

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
dd1c5a7f80 env: Drop env_get_char_spec() and old, unused .get_char() implementations
Commit b2cdef4861 ("env: restore old env_get_char() behaviour")
dropped the .get_char() method from struct env_driver, but left the two
existing implementations (eeprom and nvram) in case someone would use
them by overwriting weak function env_get_char_spec().

Since this was never done in the 3.5 years, let's drop these methods and
simplify the code.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
6dc1e2f10c env: Fix documentation for env_get_f()
This function actually returns:
- the number of bytes written into @buf excluding the terminating
  NULL-byte, if there was enough space in @buf
- the number of bytes written into @buf including the terminating
  NULL-byte, if there wasn't enough space in @buf
- -1 if the variable is not found

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
3610970872 dm: Fix util.h's broken include guard
Fix up the header's include guard to contain the definition of
dm_priv_to_rw(), which was erroneously added outside of it, by moving
its #endif to the end of the file (i.e. where it belongs). This removes
the risk of compilation errors resulting from the redefinition of that
function where the header might have been (indirectly) included more
than once.

Fixes: cfb9c9b77c ("dm: core: Use separate priv/plat data region")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Cc: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
737fd142de sandbox: provide /chosen/boot-hartid property
On RISC-V the sandbox must provide the /chosen/boot-hartid in the
devicetree.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 12:50:48 -06:00
f7832ee552 buildman: Add gcc-11.1.0 to the directory list
While CI has been using gcc-11.1.0 for a long time, we have not updated
buildman to match.  Correct this omission.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-21 12:50:48 -06:00
e2d6a77a8f CI: Switch running the nokia_rx51 test with in-container toolchain
Instead of fetching an arm toolchain to use, run the test with the one
that's already in the container image.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2021-10-21 12:50:48 -06:00
56ced77099 tools: imx8m_image: Support ddr3 firmware
Some boards use ddr3, not ddr4, so we need to check ddr3 firmware.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2021-10-21 13:59:26 +02:00
b5a2a76454 mx7ulp: add getting a board serial number
Get Unique ID of SoC iMX7ULP, using the logic described in Fusemap
(IMX7ULPRMB2_Rev0_Fusemap) attached in the i.MX 7ULP APRM [1].

[1]
https://www.nxp.com/docs/en/reference-manual/IMX7ULPRMB2.pdf

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-21 13:59:26 +02:00
cdf3192452 board: ea: mx7ulp_com: allocate specific region of memory to OP-TEE
On the iMX7ULP uCOM board, OP-TEE uses the memory region defined by the
maximum DRAM address minus CONFIG_OPTEE_TZDRAM_SIZE, so subtract
CONFIG_OPTEE_TZDRAM_SIZE from the available DRAM size to avoid
conflicts.

Note the OPTEE boot process itself subtracts the DRAM region it
lives in from the memory map passed to Linux.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-21 13:59:26 +02:00
35813490d6 arm: dts: imx8mp: Delete default clocks for clock controller node
Since SPL has initialized clocks for bus and core. We don't need to
set the default clocks for clock controller node.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2021-10-21 13:59:26 +02:00
b65dc989a7 imx8mp_evk: Enable the DWC EQoS iMX driver
Enable the EQoS i.MX driver in defconfig, also enable the PHYLIB
to facilitate the case that only has FEC enabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
127fb45495 imx8mp_evk: Delete noncached memory config
DWC EQOS driver has removed to use noncached memory, so delete
the configuration from iMX8MP EVK head file.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
c852a2bf6f imx8mp_evk: Remove EQoS PHY reset codes
Since we uses the DTS and PHY reset gpio in EQoS driver to do the
reset, remove the duplicated codes from board file.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
e1260aef37 imx8mp_evk: Fix incorrect cascade for FEC and EQOS setup
The setup functions should be independent for two ethernet controllers

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
a65b7fb2a5 arm: dts: imx8mp-evk: Enable the EQoS ethernet port
i.MX8MP EVK has two ethernet ports. Add relevant nodes and properties
for EQoS port to the EVK DTS file.
In -u-boot.dtsi, change the u-boot eqos compatible string, add PHY
reset gpio and remove assigned clocks as not supported in CCF.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
5d3ba244d7 arm: mach-imx: Allow to build mac.c for EQoS driver
i.MX8MP has one DWC EQoS controller, so allow to build mac.c when
only this driver is enabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21 13:59:26 +02:00
6daa6a97d1 arm: mach-imx: Update MAC fuse for i.MX8MP
i.MX8MP has two ENET controllers, have to update the function to
enable loading two MAC addresses.

Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-21 13:59:26 +02:00
5fac11e6d5 Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
2021-10-21 13:58:13 +02:00
f200a4bcec Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Turris MOX and Omnia changes, mostly moving to Kconfig (Marek)
- a37xx: pci: Misc smaller fixes (Pali)
- cmd: tlv_eeprom: Fix building with DEBUG enabled (Sven)
- termios_linux.h: Fix tcsendbreak() implementation (Pali)
- mvebu: Add missing "if SPL" (Tom)
2021-10-21 07:52:15 -04:00
60705883d2 xilinx: zynqmp: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
There is no need to use u-boot.itb as name when this is already recorded in
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/38a236ed317510c26b37525da0e7bc26b411222c.1634558534.git.michal.simek@xilinx.com
2021-10-21 08:56:41 +02:00
f510927d55 xilinx: zynqmp: Handle fallthrough statement properly
Now intentional fallthrough in switch-case should be labelled that's why
convert comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/b3e976bd3b9bbe7061fec5ba0a3b4e78fdd78394.1634556602.git.michal.simek@xilinx.com
2021-10-21 08:55:46 +02:00
53f5d1688e firmware: zynqmp: fix write to an uninitialised pointer in ipi_req()
When a caller is not interested in the returned message, the ret_payload
pointer is set to NULL in the u-boot-sources. In this case, under EL3, the
memory from address 0x0 would be overwritten by ipi_req() with the returned
IPI message, damaging the original data under this address. The patch, in
case ret_payload is NULL, assigns the pointer to the array holding the IPI
message being sent.

Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Adrian Fiergolski <Adrian.Fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/3178ff7651948270b714daa4adad48b94eaca9ba.1634309856.git.michal.simek@xilinx.com
2021-10-21 08:54:50 +02:00
b05cc389ba firmware: zynqmp: Handle errors from ipi_req properly
There are multiple errors what can happen in ipi_req but they are not
propagated properly. That's why propage all error properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Adrian Fiergolski <Adrian.Fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/7ac4f3b2104f04c72d287c46d1ccbce20f138fd4.1634309856.git.michal.simek@xilinx.com
2021-10-21 08:54:49 +02:00
eafdcda4a8 net: gem: Disable broadcast setting
There is no need for GEM to accepts broadcast packets because they are not
handled by u-boot anyway. That's why use HW IP feature and don't waste time
on these packats which will be dropped anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/0e236c3a6514a2a633ef3a5b71a967c46f7fbae7.1634303007.git.michal.simek@xilinx.com
2021-10-21 08:53:55 +02:00
599becb0ae arm64: zynqmp: Fix sgmii clock input freq for p-a2197
Input frequency for sgmii is 125MHz on all Xilinx designs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87153c59cc526f5955b3bff3db11027b5848c042.1634302099.git.michal.simek@xilinx.com
2021-10-21 08:52:30 +02:00
d2d14383ba arm64: zynqmp: Add support for DLC21 (Smartlynq+) board
DLC21 is used as fast jtag cable. The patch adds support for this board
from PS perspective. The most interesting part on the board is seps525 oled
display. Also i2c, gpio, ethernet, uart, SD and eMMC are tested.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3d35cd6a11cffc7456e21a88b214cc965734e852.1634231268.git.michal.simek@xilinx.com
2021-10-21 08:51:33 +02:00
181419446a arm64: zynqmp: allow overriding board name
There is no need to use zynqmp name as SYS_BOARD for all boards.
The patch is adding an option to change it.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Link: https://lore.kernel.org/r/20211020152518.3511912-1-liambeguin@gmail.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:51:00 +02:00
398a74ae33 zynqmp: restore the jtag interface
When boot.bin is configured for secure boot the CSU will disable the
JTAG interface on all cases.

Some boards might rely on this interface for flashing to QSPI in which
case those systems might end up bricked during development.

This commit will restore the interface under CSU control

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Link: https://lore.kernel.org/r/20211013134800.19452-1-jorge@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:51:00 +02:00
a3e3d4698e mmc: zynq_sdhci: Add xilinx_pm_request weak function
Mini emmc does not use any pmufw and ZYNQMP_FIRMWARE is disabled.
xilinx_pm_request() will not be compiled and causes undefined reference to
`xilinx_pm_request' error. So add a weak function in zynq_sdhci.c file.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1633086518-32636-1-git-send-email-t.karthik.reddy@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:50:59 +02:00
bd4064ff8a arm: a37xx: pci: Fix condition for CRS response
As stated in comment above the code, CRS response can be returned to OS
only for 4-byte PCI_VENDOR_ID config read request. So fix the code.

Fixes: 1d7ad68559 ("arm: a37xx: pci: Handle propagation of CRSSVE bit from PCIe Root Port")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
7609e02a25 arm: mvebu: Add missing "if SPL"
We can only select SPL_SKIP_LOWLEVEL_INIT if SPL is enabled, otherwise
we get a warning about unmet dependencies on platforms that don't use
SPL.

Fixes: cf47a8cf8f ("arm: mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT")
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
aaddce0d35 arm: a37xx: pci: Do not allow setting bars on PCI Bridge
PCI Bridge which represents Aardvark PCIe Root Port does not have
configurable bars.

So ensure that write operation to bars registers on PCI Bridge is noop and
bars registers always contain zero address which indicates that bars are
unsupported.

After this change U-Boot 'pci bar 0.0.0' command does not show any
allocated bars for PCI Bridge device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
6d7bfb658e arm: mvebu: turris_omnia: Move CONFIG_SPL_DRIVERS_MISC to Kconfig
Instead of declaring CONFIG_SPL_DRIVERS_MISC in board config header,
select it in Kconfig.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
2c8a4e4d76 arm: mvebu: turris_omnia: Move SPL's SYS_MALLOC_SIMPLE to Kconfig
Instead of declaring CONFIG_SYS_MALLOC_SIMPLE dependant on
CONFIG_SPL_BUILD in board config header, select
CONFIG_SPL_SYS_MALLOC_SIMPLE in Kconfig.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
dc096a5e90 arm: mvebu: turris_omnia: Use show_board_info()
We are printing board information in checkboard() function, which is
called from the default weak implementation of show_board_info().

Rename checkboard() to show_board_info(). This throws away the weak
implementation of show_board_info().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
1335e31ecc arm: mvebu: turris_omnia: Overwrite ethaddr only if invalid
Currently we always overwrite ethaddrs with those from EEPROM.

In order to allow user to use a cloned MAC address in U-Boot, change the
code so that it sets ethaddr variables only if they aren't set or are
invalid.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
0034d84a66 arm: mvebu: turris_mox: Better check for valid ethernet addresses in env
Currently we overwrite ethaddr and eth1addr only if these variables
don't exist.

Better overwrite them even if the env variable exists, but is invalid -
eth_env_get_enetaddr_by_index() checks for validity.

Refactor the code to use a for cycle.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
f3c71e75b0 arm: mvebu: turris_mox: Always handle reset button
Handle reset button even if we can't configure modules.

This happens if we fail retrieving reset GPIO with which we can reset
the modules.

(Note that this GPIO is different from reset button GPIO.)

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
d3159c6b18 arm: mvebu: turris_mox: Use show_board_info()
We are printing board information in last_stage_init(), but U-Boot has
dedicated function, show_board_info(), for this.

Move code which prints board information (board version, serial number,
module topology, ...) to show_board_info().

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
ba89abd028 arm: mvebu: turris_mox: Cosmetic update for board config header
Reorder the definitions in Turris MOX' board config header, drop the
comment relics from when this file was copied, fix indentation.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
a3b055fc70 arm: kirkwood, mvebu: Remove CONFIG_SYS_RESET_ADDRESS option
This option is not used anywhere.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
999ac22b59 arm: mvebu: a3720: Create Kconfig option for I2C_MV
Move the config option CONFIG_I2C_MV to a Kconfig option
CONFIG_SYS_I2C_MV and move the default definition from config header
files into defconfigs.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
3c36d745a8 arm: mvebu: turris_mox: Move options to defconfig
Move config options CONFIG_LAST_STAGE_INIT and
CONFIG_DISPLAY_BOARDINFO_LATE to turris_mox_defconfig.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
a46877eeb2 tools: termios_linux.h: Fix tcsendbreak() implementation
There are two Linux ioctls which implements tcsendbreak() functionality:
TCSBRK and TCSBRKP

TCSBRK with non-zero parameter implements tcdrain() and with zero parameter
implements tcsendbreak() for duration of 0.25s.

TCSBRKP with zero parameter is same as TCSBRK and with non-zero parameter
implements tcsendbreak() for duration in deciseconds specified by
parameter. TCSBRKP does not have to be provided by older toolchain
versions.

So tcsendbreak() has to either use TCSBRK with zero parameter or TCSBRKP
with any parameter.

Fix code to use TCSBRKP and fallback to TCSBRK with 0.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
ee8ce3840a cmd: tlv_eeprom
The function show_eeprom is missing int i if debug is enabled.

Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 07:39:05 +02:00
af484011f1 efi_loader: Fix link of EFI apps with ld.lld
When compiling U-Boot with ld.lld as the linker, the helloworld EFI app
example fails to link:

LD      lib/efi_loader/helloworld_efi.so
ld.lld: error: section: .dynamic is not contiguous with other relro
                        sections

LLD will always create RELRO program header regardless of target
emulation, whereas BFD may automatically disable it for unsupported
targets. Add -znorelro to disable it explicitly in all cases.

Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:04 +02:00
db61e70e0d efi_loader: efi_dp_from_lo() should skip VenMedia node
The 'efidebug boot dump' command should not display the VenMedia() device
path node preceding the device path of the initial ram disk.

By letting efi_dp_from_lo() skip the VenMedia() device path node we can
simplify the coding.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-21 03:46:04 +02:00
9ad37fe405 efi_loader: avoid multiple local copies of lf2_initrd_guid
Create the GUID as a global variable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-21 03:46:04 +02:00
05345425ca efi_loader: efi_dp_from_lo() unused parameter size
Parameter size is never used in function efi_dp_from_lo(). Remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-10-21 03:46:04 +02:00
fc42b8bb75 efi_loader: simplify show_efi_boot_opt_data()
Use printf code %pD for printing device paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:04 +02:00
0421735dd8 efi_loader: efi_dp_from_lo() don't copy GUID
Instead of copying a GUID and then using a pointer to the copy for calling
guidcmp(), just pass the pointer to the orginal GUID.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:04 +02:00
ebdea88d57 efi_loader: Fix loaded image alignment
We are ignoring the alignment communicated via the PE/COFF header.
Starting 5.10 the Linux kernel will loudly complain about it. For more
details look at [1] (in linux kernel).

So add a function that can allocate aligned EFI memory and use it for our
relocated loaded image.

[1] c32ac11da3f83 ("efi/libstub: arm64: Double check image alignment at entry")

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Vincent Stehlé <vincent.stehle@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:04 +02:00
fa00b6fc3f efi_loader: don't load Shim's MOK database from file
When using a file to store UEFI variables we must make sure that secure
boot related variables are not loaded from this file. With commit
9ef82e2947 ("efi_loader: don't load signature database from file")
this has already been implemented for variables defined in the UEFI
specification. As most Linux distributions use Shim we should do the same
for Shim's MOK database.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-21 03:46:04 +02:00
567dfef2fe x86: Show some EFI info with the bdinfo command
It is useful to see some basic EFI info with the command as it forms part
of the information about a board.

Add a hook for this and show the table address as a start.

While here, fix an invalid cast in setup_efi_info(). Note that this
function is using a data structure defined by Linux so we cannot change
it. Also note that ulong is used since this is the standard in U-Boot
(>6k uses), despite there being quite a bit of the more verbose uintptr_t
(930 uses).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
e70be676eb x86: Create a new header for EFI
The setup routines are called from zimage but don't really belong in the
zimage header. Add a new EFI header to house these. Add comments so it is
clear what the functions do.

Note that these functions are x86-specific. The zimage business is not
used on other architectures.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
8d76744e50 x86: Keep symbol information in u-boot ELF file
At present this information is stripped when linking. It is useful to keep
it around. Strip it from the .efi files instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
91aa8476b2 efi: Add a separate maintainer entry for the app
Separate this out slightly from the payload, with a new entry.

We might consider renaming EFI PAYLOAD to EFI LOADER, but that would
require quite a lot of file changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
c779e0d923 efi_loader: Drop code that doesn't work with driver model
This code should never have been added as it builds a new feature on top
of legacy code. This has already been improved with the dependency on BLK.

Add a dependency on DM_ETH also, to avoid needing to deal with this old
code.

Boards which want EFI_LOADER should migrate to driver model first.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
28fc87ee3a efi_selftest: Receive the packets until the receive buffer is empty
Repeatedly receive the packets until the receive buffer is empty.
If the buffer is empty, EFI_SIMPLE_NETWORK_PROTOCOL::Receive()
returns EFI_NOT_READY. We don't need to use the wait_for_event()
every time.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
9845b92436 efi_selftest: Do not check EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT
Do not check EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT in packet
receiving loop. This depends on the implementation and not
related to whether the packet can be received or not.

Whether the received packets are available or not is ensured
by wait_for_packet, and that is already done in the loop.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
39a37adf51 efi_selftest: Use EFI_SIMPLE_NETWORK_PROTOCOL::GetStatus() for media check
According to the UEF specification v2.9, the main purpose of the
EFI_SIMPLE_NETWORK_PROTOCOL::GetStatus() is for checking the link
status via EFI_SIMPLE_NETWORK_MODE::MediaPresent.
So this uses net->get_status() for checking the link status before
running network test.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
6b7b9ff14d configs: add mkeficapsule to tools-only_defconfig
mkeficapsule is used to create capsules for UEFI firmware update.
To ease inclusion into U-Boot tools packages of Linux distributions we
should add it to the tools-only_defconfig.

Provide dummy values for CONFIG_AVB_BUF_ADDR, CONFIG_AVB_BUF_SIZE to
satisfy Kconfig.

Suggested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-21 03:46:03 +02:00
0c83c8ac40 doc: Remove obsolete README.440-DDR-performance file
The PPC 440 support has been removed in commit 98f705c9ce
("powerpc: remove 4xx support") already, so this file is
certainly not required anymore.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-21 03:46:03 +02:00
2443fd7032 doc: add python3-pkg-resources to build dependencies
tools/binman/control.py imports Python package pkg_resources.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-21 03:46:03 +02:00
1da0b6ab2a doc: add system reset to API documentation
Complete the Sphinx documentation in include/sysreset.h
Add the include to the generated HTML documentation of the U-Boot API.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-21 03:46:03 +02:00
87a4fc1081 doc: require Sphinx 3.4.3
For enums documented according to the requirements in chapter
"Structure, union, and enumeration documentation" of
https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html
errors occur with Sphinx 2.4.4 which disappear with Sphinx 3.4.3,
e.g.
/builds/u-boot/custodians/u-boot-efi/doc/api/sysreset:6:
./include/sysreset.h:60:Unknown interpreted text role "enum".

Sphinx 3.4.3 is the version used by Debian in the current release.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
79b8849d4c Merge tag 'u-boot-imx-20211020' of https://source.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20211020
-------------------

First PR from u-boot-imx for 2022.01

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535

- new board: kontron-sl-mx8mm
- imx8m:
	- fix secure boot
- imx ESDHC: fixes
- i.MX53: Support thum2, bmode and fixes for Menlo board
	  usbarmory switch to Ethernet driver model
- imx6 :
	- DDR calibration for Toradex boards
- imx7:
	- Fixes
- Updated gateworks boards (ventana / venice)

# gpg verification failed.
2021-10-20 14:24:09 -04:00
11c41192ec Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Assorted warning fixes, io read/write bugfix
2021-10-20 14:23:08 -04:00
e03aa34bdf doc: imx: psb: Add documentation for MX8MM behavior with Fast Boot fuse blown
On iMX8MM with Fast Boot fuse blown, the SIT and A-copy image are
placed at different offset than on iMX8MM with Fast Boot fuse NOT
blown. List both options and both offsets to avoid confusion.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 17:58:58 +02:00
d0223ff169 doc: imx: psb: Fix PERSIST_SECONDARY_BOOT bit location in GPR10
The PERSIST_SECONDARY_BOOT is in GPR10 address 0x30390098, adjust the
text which currently says it is in GPR0 while using the correct address
of GPR10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 17:56:57 +02:00
80ef6926e7 colibri-imx6ull: add emmc variant
Add code to build the eMMC variant of the Colibri iMX6ULL, i.e. the
'Colibri iMX6ULL 1GB' which has a eMMC instead of the raw NAND used
on other SKUs.

Related-to: ELB-4056, ELB-4057
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 17:54:31 +02:00
3c80a4c781 colibri-imx6ull: imximage.cfg: integrate new 1GiB RAM variant
Integrate new Toradex SKU 0062 Colibri iMX6ULL 1GB IT. This commit
basically adjusts three parameters of the RAM settings:

Increase density from 4Gb to 8Gb
Increase ROW address from 15 to 16
Increase tRFC (refresh command time) from 260 to 350

This timing is valid for all Toradex Colibri iMX6ULL SKUs

Related-to: ELB-4055, ELB-4057
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 17:49:59 +02:00
c9585087bc toradex: tdx-cfg-block: add new i.mx 6ull and 8m plus skus
Add new i.MX 6ULL and 8M Plus SKUs to ConfigBlock handling:

0062: Colibri iMX6ULL 1GB IT (eMMC)

0063: Verdin iMX8M Plus Quad 4GB IT

0064: Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT

0065: Verdin iMX8M Plus QuadLite 1GB IT

0066: Verdin iMX8M Plus Quad 8GB Wi-Fi / BT

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 17:49:59 +02:00
ab98ebf79c toradex: configblock: fix interactive mode it handling
Restore "Is the module an IT version? [y/N]" for "cfgblock create"
interactive mode command, which was leading to invalid detection
of 0051 Colibri iMX8DX 1GB WB module;

Fixes: a5b5ad4d85 ("toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skus")
Related-to: ELB-3482
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 17:49:59 +02:00
c7b24915cf toradex: take over maintainership
Also take over maintainership of remaining Toradex SoMs as Oleksandr
has left our company.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
CC: Oleksandr Suvorov <cryosay@gmail.com>
2021-10-20 17:49:59 +02:00
028abfd9b1 imx8mm-evk: Generate a single bootable flash.bin again
After the conversion to binman in commit 8996e6b7c6 ("imx8mm_evk: switch
to use binman to pack images"), it is necessary to flash both flash.bin and
u-boot.itb to get a bootable system. Prior to this commit, only flash.bin
was needed.

Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.

Generate a final flash.bin that can be used again as a single
bootable binary to keep the original behavior.

After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone
(for example, for secure boot purposes).

Also update imx8mm_evk.rst to remove the u-boot.itb copy step.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
2021-10-20 17:46:09 +02:00
936bf17263 colibri-imx6ull: fix setup of nand gpmi clock
NXP used to setup the gpmi clock root from gpmi_clk in early versions
in their downstream BSP. [1]
However on mainline the gpmi clock root was always setup from enfc
since the beginning of the i.MX 6 series SoCs, which is still the same
today. [2]

NXP followed the mainline approach at some point and changed
setup_gpmi_io_clk to setup gpmi clock root from enfc which left faulty
code behind in our board file. [3]

This commit follows the change of NXP as it improves the performance of
the NAND from ~1.2 MiB/s to ~12 MiB/s. [3]

This change was verified to work in recovery-mode and u-boot loaded
from NAND on all four Colibri iMX6ULL SKUs from Toradex.

The frequency used to read the NAND, measured on RE# (Read Enable):
before this patch: 1.4 MHz
after this patch:   22 MHz
in Linux Kernel:    50 MHz

[1] https://source.codeaurora.org/external/imx/uboot-imx/tree/arch/arm/cpu/armv7/mx6/clock.c?h=nxp/imx_v2016.03_4.1.15_2.0.0_ga#n62
[2] commit 23608e23fd ("i.mx: add the initial support for freescale i.MX6Q processor")
[3] https://source.codeaurora.org/external/imx/uboot-imx/commit/?id=7a82a19ceabfb04bbc1591a67c99751748781c7d

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2021-10-20 17:42:55 +02:00
463a01c7e4 board: phytec: imx8mm-phycore: Switch to binman
Use binman for image creation.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:10:13 +02:00
454ea0e2c6 configs: phycore-imx8mm_defconfig: Enable clk command
Enable clk command to dump clock tree.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:26 +02:00
f38b1da8bb board: phytec: phycore-imx8mm: Add SPI-NOR flash support
Adds SPI-NOR flash support to erase, read and write in bootloader.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:26 +02:00
115732170e arm: dts: phycore-imx8mm: Fix property
Fix misspelled property "stdout-path".

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:26 +02:00
5eee18d848 arm: dts: phycore-imx8mm-u-boot: Add wdog pinctrl entry
Add missing pinctrl entry in spl.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:25 +02:00
0caa81fb33 include: configs: phycore-imx8mm: Do not use macro for address
Do not use size macros for addesses. So convert PHYS_SDRAM to address.
No functional change.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:25 +02:00
34a8128ebe include: configs: phycore-imx8mm: Remove not needed defines
Remove obsolet defines in phycore_imx8mm.h.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:25 +02:00
10b317fd86 include: configs: phycore_imx8mm: Remove hard coded network settings
Remove ip address and server ip from board config as they should not
be added hardcoded.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:25 +02:00
163089ca57 board: phytec: phycore_imx8mm: Clean up spl
Remove not needed code in the spl board code.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2021-10-20 15:09:25 +02:00
f254a46809 verdin-imx8mm: fix watchdog pinctrl issue
Finally, found the root cause of the issue already once mentioned back
here [2] which caused the following error message during boot:

imx_wdt watchdog@30280000:
 pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19

Turns out while the watchdog node itself was already u-boot,dm-spl its
pinctrl node was not which caused it to be unavailable at that early
stage. Note that any and all other boards I checked also seem to be
missing this. However, I can't judge whether or not they might indeed
need a similar fix or not.

[2] https://marc.info/?l=u-boot&m=161786572422973

Fixes: commit d304e7ace3
 ("ARM: imx8m: Fix reset in SPL on Toradex iMX8MM Verdin")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:26 +02:00
e5505e9ebb verdin-imx8mm: use preboot for fdtfile evaluation
Enable and set preboot var with fdtfile evaluation.
It will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.

This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:26 +02:00
41d4b0029d include/configs: apalis-imx8/verdin-imx8mm: rename kernel image variable
Variable "kernel_image" is used in boot.scr script only, that sets its
own default value to the constant string @@KERNEL_IMAGETYPE@@ in case
"kernel_image" is not set.
The default name of the kernel image shipped with BSP 5.x is "Image.gz".
Setting kernel_image="Image" as a pre-defined u-boot variable
breaks booting systems with modern versions of boot.scr, whereas
renaming it fixes booting with modern scripts and does not break working
of earlier versions of boot.scr.

While at it also update the copyright period, rather than hard-coding
fdtfile default fdt_board to dev for the Verdin iMX8M Mini and fix its
closing #endif comment.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:26 +02:00
deccb1b2e0 verdin-imx8mm: drop support for v1.0 hardware
We drop support for Verdin iMX8M Mini V1.0B.

Related-to: ELB-3551
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:26 +02:00
ae05a2a162 verdin-imx8mm: clean-up include order
Alphabetically order includes.
While at it also update copyright year resp. period.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 15:08:26 +02:00
8da72960ed verdin-imx8mm: enable sleep_moci output
This powers some peripherals on the carrier board e.g. the USB hub.

Related-to: ELB-3206
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:26 +02:00
5cfa55930b verdin-imx8mm: switch to use binman to pack images
Use binman to pack images.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-10-20 15:08:26 +02:00
088eb75407 arm64: dts: imx8mm-verdin-u-boot.dtsi: alphabetically re-order
Alphabetically re-order nodes and properties.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2021-10-20 15:08:25 +02:00
8d060e4a66 ARM: dts: imx8mm-verdin: prepare for dek blob encapsulation
Prepare for DEK blob encapsulation support through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application
call. U-boot sends and receives the DEK and the DEK blob binaries
through OP-TEE dynamic shared memory.

To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y

Taken from NXP's commit 56d2050f40 ("imx8m: Add DEK blob encapsulation
for imx8m").

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:25 +02:00
5206f1ce0c verdin-imx8mm: fix ethernet
Turns out Microship (formerly Micrel) meanwhile integrated proper
support for the DLL setup on their KSZ9131. Unfortunately, this
conflicts with our previous board code doing that.
Fix this by getting rid of our board code and just relying on the
generic implementation relying on rgmii-id being used as phy-mode.

Fixes: commit c6df0e2ffd
       ("net: phy: micrel: add support for DLL setup on ksz9131")
Fixes: commit af2d3c91d8
       ("ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:25 +02:00
4b3abe5972 imx8m: clean-up kconfig indentation
Replace spurious spaces with proper tabs.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-20 15:08:25 +02:00
f0045799c6 imx8mm-cl-iot-gate-optee: align config with Kconfig
Due to missing configs, CI goes in deadlock until an OOM is tracked. Add
CONFIG_SYS_LOAD_ADDR and replace CONFIG_SYS_EXTRA_OPTIONS with
CONFIG_IMX_CONFIG.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
CC: Fabio Estevam <festevam@denx.de>
2021-10-20 12:13:44 +02:00
0105bda050 kontron-sl-mx8mm: fix missing configs and deadlock in CI
Even if board can be successfuly built, CI goes in deadlock (see thread
on https://www.mail-archive.com/u-boot@lists.denx.de/msg419663.html).
This is caused by SYS_CONFIG set in header file and because defconfig
for the board is out of sync with Kconfig. As result, buildman goes on
to read from stdin until an OOM is reached.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Frieder Schrempf <frieder.schrempf@kontron.de>
2021-10-20 11:55:25 +02:00
7bf83a5d7b buildman: Detect Kconfig loops
Hex and int Kconfig options are supposed to have defaults. This is so we
can configure U-Boot without having to enter particular values for the
items that don't have specific values in the board's defconfig file.

If this rule is not followed, then introducing a new Kconfig can produce
a loop like this:

   Break things (BREAK_ME) [] (NEW)
   Error in reading or end of file.

   Break things (BREAK_ME) [] (NEW)
   Error in reading or end of file.

The continues forever since buildman passes /dev/null to 'conf', and
the build system just tries again. Eventually there is so much output that
buildman runs out of memory.

We can detect this situation by looking for a symbol (like 'BREAK_ME')
which has no default (the '[]' above) and is marked as new. If this
appears multiple times in the output, we know something is wrong.

Add a filter function for the output which detects this situation. Allow
it to return True to terminate the process. Implement this termination in
cros_subprocess.

With this we get a nice message:

   buildman --board sandbox -T0
   Building current source for 1 boards (0 threads, 32 jobs per thread)
      sandbox:  w+   sandbox
   +.config:66:warning: symbol value '' invalid for BREAK_ME
   +
   +Error in reading or end of file.
   +make[3]: *** [scripts/kconfig/Makefile:75: syncconfig] Terminated
   +make[2]: *** [Makefile:569: syncconfig] Terminated
   +make: *** [Makefile:177: sub-make] Terminated
   +(** did you define an int/hex Kconfig with no default? **)

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-20 10:59:55 +02:00
bafdeb4546 buildman: Write output even on fatal error
At present buildman does not write any output (to the 'out' and 'err)
files if the build terminates with a fatal error. This is to avoid adding
lots of spam to the logs.

However there are times when this is actually useful, such as when the
build fails for an obscure reason such as a Kconfig loop.

Update the logic to always write the output, so that the user gets a clue
as to what is happening.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-20 10:59:54 +02:00
ddf4972834 riscv: Avoid io read/write cause wrong result
io read/write may cause wrong result because they may read/write data
from/to register instead of memory. Add 'volatile' to avoid it.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-20 10:59:17 +08:00
b18c4ae82f board: sifive: Fix -Wint-to-pointer-cast warning
The following warning is seen in unleashed.c in a 32-bit build:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Cast with uintptr_t.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
d36c94279d ram: sifive: Fix -Wint-to-pointer-cast warnings
The following warning is seen in sifive_ddr.c in a 32-bit build:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Change to use dev_read_addr_index_ptr().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
b422ed05f7 net: macb: Fix -Wint-to-pointer-cast warnings
The following warning is seen in macb.c in a 32-bit build:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Change to use dev_read_addr_index_ptr(), or cast with uintptr_t.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-10-20 10:59:09 +08:00
bdce903106 dm: Provide dev_read_addr_index_ptr() wrapper
Like dev_read_addr_ptr(), provide a wrapper for the indexed version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-20 10:59:09 +08:00
fb9bec8e8a dm: core: Add a new API devfdt_get_addr_index_ptr()
At present there is only devfdt_get_addr_ptr() which only returns
the first <addr, size> pair in the 'reg' property. Add a new API
devfdt_get_addr_index_ptr() to return the indexed pointer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
7e22c85918 i2c: ocores: Fix -Wint-to-pointer-cast warning
The following warning is seen in ocores_i2c.c in a 32-bit build:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Change to use dev_read_addr_ptr().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
d710c7e841 gpio: sifive: Fix -Wint-to-pointer-cast warning
dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit
address and plat->base is a pointer. In a 32-bit build, this causes the
following warning seen when building sifive-gpio.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Change to use dev_read_addr_ptr().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
2edb02ead7 clk: sifive: Fix -Wint-to-pointer-cast warning
dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit
address and pd->va is a pointer. In a 32-bit build, this causes the
following warning seen when building sifive-prci.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Change to use dev_read_addr_ptr().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
2fb91a2ea7 cache: sifive: Fix -Wint-to-pointer-cast warning
The following warning is seen in cache-sifive-ccache.c in a 32-bit build:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Fix by casting it with uintptr_t.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-20 10:59:09 +08:00
a0cfe13715 board: sifive: Fix a potential build warning in board_fdt_blob_setup()
Commit 47d73ba4f4 ("board: sifive: overwrite board_fdt_blob_setup in u-boot proper")
added a board-specific implementation of board_fdt_blob_setup() which
takes a pointer as the return value, but it does not return anything
if CONFIG_OF_SEPARATE is not enabled. This will cause a build warning
seen when testing booting S-mode U-Boot directly from QEMU, per the
instructions in [1]:

  board/sifive/unleashed/unleashed.c: In function ‘board_fdt_blob_setup’:
  board/sifive/unleashed/unleashed.c:125:1: warning: control reaches end of non-void function [-Wreturn-type]

Return &_end as the default case.

[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-10-20 10:59:00 +08:00
fb1018106a Merge branch '2021-10-19-assorted-changes'
- Assorted minor fixes and a new GPIO driver
2021-10-19 20:45:12 -04:00
17864406a4 clk: fixed_rate: add dummy disable() function
commit 6bf6d81c11 ("clk: fixed_rate: add dummy enable() function")
implemented .enable, so fixed rate clocks can be used where drivers
might call clk_enable(). Implement the .disable op for the same reason;
some drivers, e.g. USB PHYs, may attempt to disable clocks at runtime.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-10-19 11:25:25 -04:00
b20b16a794 arm: total_compute: increase DRAM to 8GB
The extra 6GB start at 0x8080000000.

Signed-off-by: Usama Arif <usama.arif@arm.com>
2021-10-19 11:25:25 -04:00
4f03a4c766 tools: Stop re-defining -std= when building tools
While we intentionally set -std=gnu11 for building host tools, and have
for quite some time, we never dropped -std=gnu99 from tools/Makefile.
This resulted in passing -std=gnu11 ... -std=gnu99 when building, and
gnu99 would win.  This in turn would result now in warnings such as:
tools/mkeficapsule.c:25:15: warning: redefinition of typedef 'u32' is a C11 feature [-Wtypedef-redefinition]
typedef __u32 u32;
              ^

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-19 11:25:25 -04:00
1860bdca6a configs: am335x_evm: enable CONFIG_CLK_TI_CTRL
This enables the clock controller driver support on TI's SoCs. This will
fix this GPIO issue at boot time:
request_and_set_gpio: Unable to request GPIO_PR1_MII_CTRL
request_and_set_gpio: Unable to request GPIO_MUX_MII_CTRL
request_and_set_gpio: Unable to request GPIO_FET_SWITCH_CTRL
request_and_set_gpio: Unable to request GPIO_PHY_RESET

This issue comes from the fact that the clock controller is not probed.

Enable the TI's clock controller driver support to solve this.

Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-10-19 11:25:24 -04:00
bba76a17bd drivers/gpio: add support for MAX7320 i2c i/o expander
This commit adds support for the MAX7320 (and clones) gpio expander.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2021-10-19 11:25:24 -04:00
93b1965322 Makefile: Only build dtc if needed
At present U-Boot always builds dtc if CONFIG_OF_CONTROL is defined, even
when DTC is provided. The built dtc is not actually used, so this is a
waste of time.

Update the Makefile logic to build dtc only if one is not provided to the
build with the DTC variable. Add documentation to explain this.

This saves about 3.5 seconds of elapsed time on a clean build of
sandbox_spl for me.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-19 11:23:07 -04:00
d7faa082a5 Revert "kbuild: remove unused dtc-version.sh script"
We need this to make building dtc optional. It makes no sense to build our
own dtc if the system one works correctly.

This reverts commit ddb87a0b40.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-19 11:23:07 -04:00
9c79815c5c Merge branch '2021-10-18-OF_xxx-cleanup'
- Clean things up and rework such that we can drop OF_PRIOR_STAGE
2021-10-19 09:07:07 -04:00
abc6eee0e7 ARM: imx: mx5: Add altbootcmd and resets to M53Menlo
Bulletproof the default boot command with reset statements in case
any command in the chain would fail. In case a failure were to happen,
the board will reset, increment boot counter and retry the procedure.
In case the failures persist and the boot counter reaches the bootlimit,
U-Boot starts altbootcmd instead of the default bootcmd boot command.

The altbootcmd swaps the default boot partition for the other boot
partition, which is an identical copy or an older copy, and tries
booting from that one instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2021-10-19 12:36:51 +02:00
521418daee ARM: imx: mx5: Enable Thumb2 build on MX53 Menlo board
Build U-Boot in Thumb2 mode for M53Menlo board, this makes better
use of the CPU since the instruction density is higher.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2021-10-19 12:36:51 +02:00
92f6718995 ARM: imx: mx5: Enable BMODE command on MX53 Menlo board
The board can do primary/secondary boot switching, enable the bmode command.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2021-10-19 12:36:50 +02:00
4d98af6996 board: ea: mx7ulp_com: move setting CONFIG_BOOTCOMMAND to defconfig
Move setting CONFIG_BOOTCOMMAND to the mx7ulp_com_defconfig file.
It also allows replacing the default CONFIG_BOOTCOMMAND without
code modification.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-10-19 10:51:39 +02:00
9d8f87f0cd smegw01: Select IMX_HAB
Select IMX_HAB to allow secure boot.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-10-19 10:51:39 +02:00
04f423e41d smegw01: Add redundant environment support
Add redundant environment support as it is required
by SWUpdate.

While at it, place the CONFIG_ENV_OFFSET at 0x100000 to allow
more headroom.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-10-19 10:51:39 +02:00
a591e75fbc apalis-imx6: use dynamic DDR calibration
Enable dynamic DDR calibration to have a reliable behavior on edge
temperatures conditions.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2021-10-19 10:51:39 +02:00
1194d17117 colibri-imx6: use dynamic DDR calibration
Enable dynamic DDR calibration to have a reliable behavior on edge
temperatures conditions.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2021-10-19 10:51:39 +02:00
d6f8ab30a2 treewide: Remove OF_PRIOR_STAGE
The previous patches removed OF_PRIOR_STAGE from the last consumers of the
Kconfig option.  Cleanup any references to it in documentation,  code and
configuration options.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18 13:19:50 -04:00
2ea63271e5 board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

So let's remove the option in an effort to simplify U-Boot's config and DTB
management,  and use OF_BOARD instead.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-18 13:19:50 -04:00
2e8d2f8843 riscv: Remove OF_PRIOR_STAGE from RISC-V boards
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced,  in order to support a DTB handed over by an earlier stage boo
loader.  However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.

On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t.  Apart from that they copy it to prior_stage_fdt_address,  if
the Kconfig option is selected, which is unnecessary.

So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-18 13:19:50 -04:00
d990f7d75d Merge tag 'u-boot-rockchip-20211015' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for Rockchip mmc HS400 mode;
- Fix for px30 board Odroid Go;
- rockchip_sfc update;
- rk3568 clk update;
- doc fix;
2021-10-17 21:13:49 -04:00
6a86f12126 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-tegra
On merge, fixup order of fdtdec_add_reserved_memory parameters in
arch/arm/cpu/armv8/fsl-layerscape/soc.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 18:30:33 -04:00
86acfc9664 Merge branch '2021-10-15-Kconfig-migrations'
- Assorted Kconfig migration patches
2021-10-15 13:45:15 -04:00
cdcbd593ad configs: Resync with savedefconfig
Resync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-15 09:42:22 -04:00
56882dc4cb Convert CONFIG_USB_EHCI_IS_TDI to Kconfig
On mvebu this is defined if and only if !ARM64.

Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
645a0afb32 Drop CONFIG_USB_EHCI_KIRKWOOD
This config option doesn't do anything.

nas220 uses USB_EHCI_MARVELL.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
7b805009fa Convert CONFIG_USB_EHCI_MXS to Kconfig
This option is only used for
  mx23evk_defconfig
  mx23_olinuxino_defconfig
which are the only i.MX23 boards.

Add depend on ARCH_MX23 and default to y.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
92832045c5 Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-15 09:42:22 -04:00
022f552704 mmc: rockchip_sdhci: enable strobe line for HS400
The default configuration of rk3399 EMMC PHY does not enable the
strobe line, and EMMC controller will got data transmission error
at HS400 mode.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:41 +08:00
f2cdd44adb clk: rockchip: rk3568: update clks
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.

Change in V2:
remove change id.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:31 +08:00
24c627b57a spi: rockchip_sfc: Using read_poll
Using read_poll logic.

Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:11 +08:00
51f29239b7 spi: rockchip_sfc: Implement set_speed logic
Set clock related processing into set_speed logic. And Optimize
printing format.

Tested-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:57:11 +08:00
193ab22797 rockchip: px30: sync serial flash controller bindings with mainline
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:55 +08:00
3ad88ecc6b doc: rockchip: write all brand names with a capital
Brand names are supposed to be written with a capital,
so change them all.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:43 +08:00
734dcdcbf2 doc: rockchip: sort rockchip support list for rk3188
In the list of mainline U-boot supported Rockchip boards
rk3188 is placed below under the name rv3188. Give back it's
original name and sort the list in alphabetical order.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:43 +08:00
63e13530fc rockchip: rk33xx: Drop ROCKCHIP_USB2_PHY on boards without it
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so
drop the configs as they were likely copied over from other
boards during enablement.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:30 +08:00
8d43e2412a rockchip: board: remove SCLK_GPU from U-Boot DT
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:09 +08:00
ef120e0b30 rockchip: px30: add support for setting cpll clock
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-10-15 20:56:09 +08:00
42d32c3552 Remove unused CONFIG_CONS_NONE
Remove the latest reference of CONFIG_CONS_NONE in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:52 -04:00
0d76e4ec8d Remove unused CONFIG_SYS_FLASH_AMD_CHECK_DQ7
Remove the latest reference of CONFIG_SYS_FLASH_AMD_CHECK_DQ7 in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:52 -04:00
155fb86e2c Remove unused CONFIG_NO_RELOCATION
Remove the latest reference of CONFIG_NO_RELOCATION in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
e7421b0e41 am33x: Remove unused define CONFIG_MUSB_HOST
This define was left over from a previous revision, and was never used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
ff07cc9ed1 scripts: remove some configs in config_whitelist.txt
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.

for example:
  doc/uImage.FIT/command_syntax_extensions.txt:
     ... #ifdef CONFIG_OF_*  |	...

  cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
     FLASH|MMC|FAT|EXT4|\

Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2021-10-15 07:55:17 -04:00
2d34be0a9e Merge branch '2021-10-14-assorted-updates'
- Update to LLVM-13 in CI, assorted PCI fixes and pytest in CI
  improvements
2021-10-15 07:50:59 -04:00
35b2b5f04c board/km: update MAINTAINERS files
Update the e-mail addresses and person responsible.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
CC: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
CC: Rainer Boschung <rainer.boschung@hitachienergy.com>
2021-10-14 19:45:07 -04:00
35839eda8b pytest: Show a message when sandbox crashes
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.

With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.

So instead of:

test/py/u_boot_spawn.py:171: in expect
    c = os.read(self.fd, 1024).decode(errors='replace')
E   OSError: [Errno 5] Input/output error

We get:

test/py/u_boot_spawn.py:171: in expect
    c = os.read(self.fd, 1024).decode(errors='replace')
E   ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14 19:45:07 -04:00
c3aea68705 pci: Fix printf format for regions
Correct printf format for unsigned long long is %llx and not %llxx.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
43dad07cd4 pci: Fix showing registers
Header type is 7-bit number so use all 7 bits when detecting header type
and not only 2 bits.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
e6335d3eaa pci: Fix showing bars
Header type is 7-bit number so properly clear upper 8th bit which
indicates multifunction device.

And do not try to show bars for unsupported header types.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
c7cd6f734b pci: Fix configuring BARs
Number of BARs is defined by header type, not by class code.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
63ae80dd98 pci: Skip configuring invalid P2P bridge devices
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
b9caab8b47 pci: Skip configuring PCI Rom Address for unsupported header types
PCI Rom Address is currently supported only for Normal (0x00) and
Bridge (0x01) header types. Fix code accordingly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-14 19:45:07 -04:00
b04f64aa48 pytest: Shorten traceback length by default
This produces a lot of code output which is not very helpful and is quite
annoying to wade through. Use the short format by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-14 19:45:07 -04:00
927e0eedfc CI: Update to LLVM-13
- Switch sources and CI scripts to install and use LLVM-13
- Update to latest "focal" tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-14 19:45:07 -04:00
a0ba216ed4 ARM: tegra: Copy memory-region-names property
If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
77409c7f83 ARM: tegra: Refactor DT update helpers
Rather than duplicate the Ethernet MAC address and carveout updating
code for each board, move it to a common location and make it more
reusable.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
f814ff5e0b ARM: tegra: Support EMC frequency tables on Tegra210
The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.

Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
db8a0306c9 ARM: tegra: Support multiple reserved memory regions
Support multiple reserved memory regions per device to support platforms
that use both a framebuffer and color conversion lookup table for early
boot display splash.

While at it, also pass along the name, compatible strings and flags of
the carveouts.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
b9aad37591 fdtdec: Support reserved-memory flags
Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.

This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
9019487608 fdtdec: Reorder fdtdec_set_carveout() parameters for consistency
The fdtdec_set_carveout() function's parameters are inconsistent with
the parameters passed to fdtdec_add_reserved_memory(). Fix up the order
to make it more consistent.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
46cb067803 fdtdec: Support compatible string list for reserved memory
Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
4bf88ba76a fdtdec: Support retrieving the name of a carveout
When retrieving a given carveout for a device, allow callers to query
the name. This helps differentiating between carveouts when there are
more than one.

This is also useful when copying carveouts to help assign a meaningful
name that cannot always be guessed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
d5598cfa9b fdtdec: Allow using fdtdec_get_carveout() in loops
In order make it possible to use fdtdec_get_carveout() in loops, return
FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles
present in the given property.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-10-13 14:18:30 -07:00
10cd8efe1a Merge branch '2021-10-12-assorted-fixes-and-updates'
- Add Macronix raw NAND controller, fastboot, spelling and nvme fixes,
  ds1307 fix for oscillator-stop bit and fatfs optimization.
2021-10-13 10:14:35 -04:00
30ac0b496b nvme: invalidate correct memory range after read
The current code invalidates the range after the read buffer since the
buffer pointer gets incremented in the read loop. Use a temporary
pointer to make sure we have a pristine pointer to invalidate the
correct memory range after read.

Fixes: 704e040a51 ("nvme: Apply cache operations on the DMA buffers")
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2021-10-12 16:49:21 -04:00
2c6bcab6e6 tools/image-host.c: Fix spelling of "expected".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12 16:49:21 -04:00
07c652400d rtc: ds1307: Handle oscillator-stop bit correctly
The DS1307 driver was originally based on the DS1337 driver. However,
the functionality of the clock set/get functions has diverged. In the
original DS1337 driver, the set/get functions did the following:
  1) Setting the clock ensured the oscillator was enabled.
  2) Getting the clock checked and reset the oscillator-stop flag.
The DS1307 does not have an oscillator-stop flag, but the driver tried
(incorrectly) to emulate this by ensuring the oscillator was running. It
really makes no sense to start a stopped clock without setting it.

This patch makes the DS1307 driver behave like the original DS1337
driver again. For the DS1307 itself, this is just a removal of code,
since there is no oscillator-fail bit to check or reset, and the clock
is started when it is set. Since the DS1307 driver can now also be used
for the DS1337 and DS1340 which do have this bit, add code to handle the
oscillator-stop bit in the same was the original DS1337 driver did --
i.e. report that the oscillator had stopped and clear the flag.

This means that setting the date using the date command (which does both
a get and a set) will now clear the oscillator-stop flag in addition to
setting and starting the clock.

The old-style (non-DM) code has not been updated and will be removed in
a future patch. Note that this older code does not support the DS1337,
as there is a separate driver for this. Also note that the original (DM)
code used the wrong control-register address for the DS1337.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
2021-10-12 16:49:21 -04:00
41130eb893 fs: fat: check for buffer size before reading blocks
This patch optimizes the commit mentioned below by avoiding running
a set of commands which are useless in the case when
size < mydata->sect_size and sect_count would be 0.

Fixes: 5b3ddb17ba ("fs/fat/fat.c: Do not perform zero block reads if there are no blocks left")

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-12 16:49:21 -04:00
0892a7e5fa mtd: rawnand: Add Macronix raw NAND controller driver
Add a driver for Macronix raw NAND controller.

This patch referred from linux mxic_nand.c. The difference from the
linux version is described here.

1. In order to adapt to the uboot nand framework, add function
   binding (cmdfunc, read_byte, read_buf, write_buf).

2. Added parsing command format to use hardware correctly.

3. Remove the incompatible functions of Uboot.

Signed-off-by: Zhengxun Li <zhengxunli@mxic.com.tw>
2021-10-12 16:48:38 -04:00
5f9338ad56 fastboot: fix partition name truncation in environment lookup
strlcat() need to be passed the full buffer length. The incorrect call
caused truncation of partition names for fastboot_raw_partition_... and
fastboot_partition_alias_... env lookup to much less than PART_NAME_LEN.

Fixes: 69a7529831 ("fastboot: Fix possible buffer overrun")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-10-12 16:48:38 -04:00
776bf6a545 Merge tag 'u-boot-stm32-20211012' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Disable ATAGS for STM32 MCU and MPU boards
- Disable bi_boot_params for STM32 MCU and MPU boards
- Update stm32-usbphyc node management
- Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards
- Convert some USB config flags to Kconfig for various boards
- Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board
- Remove specific CONFIG_STV0991 flags
- Remove unused CONFIG_USER_LOWLEVEL_INIT flag
- Add ofdata_to_platdata() callback for stm32_spi driver
- Update for stm32f7_i2c driver
- Remove gpio_hog_probe_all() from STM32 MP1 board
- Fix bind command

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-12 12:01:00 -04:00
618c77d99a Merge tag 'u-boot-at91-2022.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.01 cycle:

This small feature set adds the support for PWM driver for the sama5d2
SoC. It also adds a node in the DT for this SoC.
2021-10-12 11:49:15 -04:00
2aab77f726 Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C
deprecation warnings for most 32-bit boards. It also includes some
smaller refactorings that pave the way for more changes, mostly driven
by needing to support the Allwinner RISC-V SoC later on.

Board wise we gain support for the FriendlyARM NanoPi R1S H5 router
board and official Pinetab support.

Build-tested for all 160 sunxi boards, and boot tested on a A64, A20,
H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there
(where applicable).
2021-10-12 11:45:00 -04:00
39bd2c8e1a test/py: Add usb gadget binding test
Add a specific usb gadget binding test which check that
binding a driver without compatible string is working as expected.

the command "bind /usb@1 usb_ether" should give the following "dm tree"
command output:

[...]
 usb           0  [   ]   usb_sandbox           |-- usb@1
 usb_hub       0  [   ]   usb_hub               |   |-- hub
 usb_emul      0  [   ]   usb_sandbox_hub       |   |   `-- hub-emul
 usb_emul      1  [   ]   usb_sandbox_flash     |   |       |-- flash-stick@0
 usb_emul      2  [   ]   usb_sandbox_flash     |   |       |-- flash-stick@1
 usb_emul      3  [   ]   usb_sandbox_flash     |   |       |-- flash-stick@2
 usb_emul      4  [   ]   usb_sandbox_keyb      |   |       `-- keyb@3
 eth           4  [   ]   usb_ether             |   `-- usb@1
[...]

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12 14:20:04 +02:00
299f12508b configs: sandbox: add USB_ETHER and GADGET_DOWNLOAD gadget support
This is needed for new gadget binding test.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12 14:20:04 +02:00
4c3dc6f69a usb: sandbox: Add gadget callbacks
Add usb_gadget_handle_interrupts(), usb_gadget_register_driver()
and usb_gadget_unregister_driver() to be able to test
binding usb gadget.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12 14:20:04 +02:00
9d591106dc usb: gadget: Add bcdDevice for the DWC2 USB Gadget Controller
Add an entry in usb_gadget_controller_number() for the DWC2
gadget controller. It is used to bind the USB Ethernet driver.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
2021-10-12 14:20:04 +02:00
38f7d3b653 cmd: bind: Fix driver binding on a device
Fix a regression brings by commit 84f8e36f03 ("cmd: bind: allow to
bind driver with driver data")

As example, the following bind command doesn't work:

   bind /soc/usb-otg@49000000 usb_ether

As usb_ether driver has no compatible string, it can't be find by
lists_bind_fdt(). In bind_by_node_path(), which called lists_bind_fdt(),
the driver entry is known, pass it to lists_bind_fdt() to force the driver
entry selection.

For this, add a new parameter struct *driver to lists_bind_fdt().
Fix also all lists_bind_fdt() callers.

Fixes: 84f8e36f03 ("cmd: bind: allow to bind driver with driver data")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-12 14:19:52 +02:00
1f83bda788 ARM: dts: sama5d2: Add pwm0 definition
Add node for the PWM0 on the SAMA5D2 SoC.

Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com>
2021-10-12 15:18:39 +03:00
2d2273fa1e dt-bindings: pwm: pwm-at91: Add PWM bindings for A5D2
Document the bindings needed for the PWM device on the SAMA5D2.

Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com>
2021-10-12 15:18:39 +03:00
9b075973e9 pwm: Add PWM driver for SAMA5D2
Add support for the PWM found on the SAMA5D2 family of devices.

Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com>
2021-10-12 15:18:39 +03:00
f9437b00c0 sunxi: Enable DM_I2C for all sunxi boards
Now that the last users of legacy I2C (outside of SPL) have been
resolved, we can enable DM_I2C at the sunxi architecture level.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 11:01:27 +01:00
2421497cb7 sunxi: video: Convert panel I2C to use DM_I2C
Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).

Since the i2c-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.

This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 11:01:17 +01:00
8b0eacdf2b sunxi: pmic_bus: Use the DM PMIC interface when possible
The pmic_bus functions are used in both SPL (for regulator setup) and
U-Boot proper (for regulator setup, SID access, GPIO, and poweroff).

Currently, pmic_bus conflicts with DM_I2C because it uses the legacy I2C
interface. This commit makes pmic_bus dual-compatible with either the
legacy I2C functions or the newly-added PMIC_AXP driver (which uses
DM_I2C). In turn, this allows platforms to start transitioning to DM_I2C
in U-Boot proper, without breaking boards that still depend on the
legacy I2C interface for other reasons.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 10:48:37 +01:00
d3b02987cb sunxi: pmic_bus: Clean up preprocessor conditions
Instead of using the SoC symbols to decide the bus type, use whichever
bus driver is actually enabled. This allows collapsing all of the AXP2xx
and AXP8xx variants into one "else" case. It also has the advantage of
falling back to I2C when the other bus drivers are disabled; this works
because all of the PMICs support I2C in addition to other interfaces.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 10:30:19 +01:00
3227c85fe7 i2c: Add a DM_I2C driver for the sun8i RSB controller
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.

Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.

The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.

There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 10:19:18 +01:00
104950a7fe i2c: Add a DM_I2C driver for the sun6i P2WI controller
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.

Refactor the p2wi functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.

The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants. Move that to the common header, so it can be used by
both interface implementations.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:50:56 +01:00
4ab39e74b6 sunxi: pmic_bus: Fix Kconfig dependencies
AXP_PMIC_BUS enables communication with a specific AXP PMIC at a
PMIC-dependent I2C/P2WI/RSB bus address. It is automatically selected
as a dependency of the PMIC driver. It should not be selectable by the
user when no PMIC is chosen.

AXP_GPIO uses the pmic_bus functions, and also depends on a specific
PMIC header to pick up register definitions.

Both of these changes have no impact on any existing configs, since
the code does not compile if the dependencies are not met.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:50:27 +01:00
abd2e783f1 sunxi: Select SUN8I_RSB more carefully
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
As it currently stands, selecting that option also requires using it in
some way, which is not the case for one A80 board. Since we have only
three A80 boards in total, we select it their via their defconfigs.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixing up Sunchip_CX-A99 build]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:50:21 +01:00
ea261fdeb2 sunxi: Only initialize legacy I2C when enabled
CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level
Kconfig symbol (not specific to either legacy or DM I2C), whereas the
i2c_init() function is specific to legacy I2C. This change fixes a
build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:49:09 +01:00
526c4f2e43 power: pmic: Add a driver for X-Powers AXP PMICs
These PMICs provide some combination of battery charger, fuel gauge,
GPIOs, regulators, and VBUS routing. These functions are represented
as child nodes in the device tree. Add the minimal driver needed to
probe these child devices and provide the DM_PMIC ops.

Enable the driver by default for SoCs that normally pair with a PMIC.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:41:57 +01:00
3fd90e43d9 power: pmic: Consistently depend on SPL_DM_PMIC
Now that there is a separate symbol to enable DM_PMIC in SPL, update the
the SPL-specific driver symbols to depend on this new option.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:36:02 +01:00
7f51b554be power: pmic: Consistently depend on DM_PMIC
Kconfig symbols for two PMIC drivers (PMIC_AS3722 and DM_PMIC_MC34708)
were missing a dependency on DM_PMIC. To fix this inconsistency, and to
keep it from happening again, wrap the driver section with "if DM_PMIC"
instead of using a "depends on DM_PMIC" clause for each driver.

Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-12 09:35:41 +01:00
4c1996ce37 Merge branch '2021-10-11-TI-platform-updates'
- Assorted TI platform updates
2021-10-11 22:39:27 -04:00
08ad739f38 arm: dts: Update IOT2050 device tree files
This fixes the usage of the USB 3.0-capable port under U-Boot as USB
2.0-only port.

Original patch by Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-10-11 15:02:50 -04:00
ce543d0d4e board: siemens: iot2050: Adjust to changes in DT and configuration
Account for the changes done between merge proposal and the final merge.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-10-11 15:02:50 -04:00
5134f79ee6 ARM: omap3_logic: Cleanup usage of MUX_VAL
The macro called MUX_VAL generates a writel instruction with
semicolon at the end.  This table was written to use semicolons,
however one was missed:

   MUX_VAL(CP(SYS_BOOT2),      (IEN  | PTD | DIS | M4))    /* GPIO_4 */

Since the extra semicolon is unnecessary with the use of the macro,
remove all of them, and cleanup whitespace.

Reviewed-by: Wolfgang Denk <wd@denx.de>
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-11 15:02:50 -04:00
165e8fe5db clk: ti: add am33xx/am43xx spread spectrum clock support
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.
As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for
DDR, PER, and CORE PLLs.

Calculating the required values and setting the registers accordingly
was taken from the set_mpu_spreadspectrum routine contained in the
arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.

In locked condition, DPLL output clock = CLKINP *[M/N]. In case of
SSC enabled, the reference manual explains that there is a restriction
of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts
to select the minimum possible N, the value of M obtained is not
guaranteed to be within the range required. With the new "ti,min-div"
parameter it is possible to increase N and consequently M to satisfy the
constraint imposed by SSC.

Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-10-11 14:27:32 -04:00
15a0411787 ARM: dts: am43xx-clocks: add spread spectrum support
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruhl7x RM, SSC is supported only for LCD
and MPU PLLs, but the PRCM_CM_SSC_DELTAMSTEP_DPLL_XXX and
PRCM_CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field
in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
MPU, DDR, PER, DISP, EXTDEV).

Link: https://lore.kernel.org/r/20210606202253.31649-5-dariobin@libero.it

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-10-11 14:27:32 -04:00
bf4a54fa78 ARM: dts: am33xx-clocks: add spread spectrum support
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for LCD
and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).

Link: https://lore.kernel.org/r/20210606202253.31649-4-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-10-11 14:27:32 -04:00
56c7f882ee configs: omap3x_logic: Enable LTO on more LogicPD OMAP3 boards
There are five omap3 based boards from LogicPD.  Two of them
have added LTO support. Add the remaining three to use LTO.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-11 14:27:32 -04:00
e7510d24ca sunxi: Add support for FriendlyARM NanoPi R1S H5
This adds support for the NanoPi R1S H5 board.

Allwinner H5 SoC
512MB DDR3 RAM
10/100/1000M Ethernet x 2
RTL8189ETV WiFi 802.11b/g/n
USB 2.0 host port (A)
MicroSD Slot
Reset button
Serial Debug Port
WAN - LAN - SYS LED

The dts file is taken from Linux 5.14 tag.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
23c83366f3 clk: sunxi: Add drivers for A31 and H6 PRCM CCUs
Add a driver so the clocks/resets for these peripherals (especially I2C,
RSB, and UART) can be enabled using the normal uclass methods.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
c61897bf02 clk: sunxi: Add support for I2C gates/resets
Currently, the I2C clocks are configured in the sunxi board code. Add
the I2C clocks to the DM clock driver so they can be enabled from the
DM I2C driver using the normal uclass methods.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
8fe8ff3411 sunxi: gpio: Remove bank-specific size macros
Since the beginning, all banks have had space for 32 pins, even when
not all pins were implemented. Let's use a single constant for the GPIO
bank size here, like the GPIO driver is already doing.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
4d9958b642 sunxi: gpio: Remove name_to_gpio macro
This clarifies which callers must be updated to complete the DM_GPIO
conversion.

The only remaining caller of name_to_gpio in generic code is inside the
!DM_GPIO block in cmd/gpio.c. DM_GPIO is always selected on sunxi, so
that code cannot be reached. And after this commit, there are only two
remaining implementations of name_to_gpio.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
425084610e sunxi: Clean up inclusions of asm/arch/gpio.h
As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will
remove the asm/arch/gpio.h header. In preparation, clean up the various
files that include it.

Some files did not contain any GPIO code at all, so this header was
completely unused.

A few files contained only legacy platform-specific GPIO code for
setting up pin muxes. They were left unchanged, as that code will be
completely removed by the DM_PINCTRL migration.

The remaining files contain some combination of DM_GPIO and legacy GPIO
code. For those, switch to including asm/gpio.h (if it wasn't included
already). Right now, this header provides both sets of functions,
because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the
right header to include once the DM_GPIO migration is complete and
GPIO_EXTRA_HEADER is no longer needed.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
0534153fd1 pinephone_defconfig: add support for early-boot status LED
This commit enables the green status LED (PD18/GPIO 114) on boot in the
SPL, in order to provide visual feedback that the PinePhone is booting.

Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
8f872bb37d board: sunxi: enable status LED early
For some systems, such as the PinePhone, there is no way for the end
user to make sure the system is indeed booting before the boot script is
executed, which takes several seconds. Therefore, it can be useful to
provide early visual feedback as soon as possible.

In order achieve this goal, this patch initializes the status LED (if
configured) in the SPL.

Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
14c8c631e9 gpio: sunxi: Remove the sunxi_name_to_gpio_bank function
The only caller of this function was the MMC pinmux code, which used it
to parse a string given from a Kconfig symbol. As the Kconfig symbol has
been converted to a Boolean, this function is no longer needed.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
dda9fa734f sunxi: Simplify MMC pinmux selection
Only one board, Yones Toptech BD1078, actually uses a non-default MMC
pinmux. All other uses of these symbols select the default value or an
invalid value. To simplify things, remove support for the unused pinmux
options, and convert the remaining option to a Boolean.

This allows the pinmux to be chosen by the preprocessor, instead of
having the code parse a string at runtime (for a build-time option!).
Not only does this reduce code size, but it also allows this Kconfig
option to be used in a table-driven DM pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
21d314a661 clk: sunxi: Move header out of arch directory
The CCU header is only used by the DM drivers, not any platform code.
Its current location adds an artificial dependency on CONFIG_ARM and
ARCH_SUNXI, which will be problematic when adding the CCU driver for
a RISC-V sunxi platform.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:44 +01:00
5427da02be configs: add PineTab defconfig
The PineTab device-tree is already in u-boot, this commit adds the
corresponding defconfig, based on pinephone_defconfig.

Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-11 10:46:43 +01:00
f331497d3a Merge tag 'video-20211009' of https://source.denx.de/u-boot/custodians/u-boot-video
- add 30bpp support (EFI, simplefb, vidconsole)
 - fix video console name in CONSOLE_MUX Kconfig help
 - move mxsfb driver config option to Kconfig
 - remove unused mx3fb driver

# gpg verification failed.
2021-10-09 17:47:27 -04:00
79c05335a9 video: move MXS to Kconfig
Move CONFIG_VIDEO_MXS from board headers to Kconfig
and drop it from obsolete cfb_console driver.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-09 19:50:03 +02:00
450d937812 video: remove not used mx3fb driver
i.MX31 support was removed, and the non dm-video driver
is obsolete and not used. Remove it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2021-10-09 19:42:32 +02:00
de99e776b8 common: Kconfig: use 'vidconsole' name instead of old 'video'
After DM_VIDEO conversion the 'vidconsole' is the correct name
for the frame buffer console. 'video' will not work, so update
the description of the config option.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2021-10-09 19:41:33 +02:00
2a2d8e94dd lz4: Use a private header for U-Boot
At present U-Boot has a header file called lz4.h for its own use. If the
host has its own lz4 header file installed (e.g. from the 'liblz4-dev'
package) then host builds will use that instead.

Move the U-Boot file into its own directory, as is done with various
other headers with the same problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-09 13:09:56 -04:00
79f9defeba efi_loader: GOP: Fix 30bpp block transfer support
Convert pixel values when necessary like we do for 16bpp
framebuffers.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-09 18:50:31 +02:00
2c2653d6f9 video: simplefb: Add 30bpp support
Recognize the canonical format strings for framebuffers in
30bpp mode and 32/24bpp mode.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-10-09 18:48:25 +02:00
01fcf0eea6 efi_loader: GOP: Add 30bpp support
Provide correct framebuffer information for 30bpp modes.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-10-09 18:46:13 +02:00
0efe41ca15 video: Add 30bpp support
Add support for 30bpp mode where pixels are picked in 32-bit
integers but use 10 bits instead of 8 bits for each component.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-10-09 18:43:51 +02:00
94e922c76a Merge branch '2021-10-08-image-cleanups'
- A large number of image file and tooling related cleanups
2021-10-08 16:02:55 -04:00
4cb35b7a1f image: Split up boot_get_fdt()
This function is far too long. Before trying to remove #ifdefs, split out
the code that deals with selecting the FDT into a separate function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
a2198cd018 image: Reduce variable scope in boot_get_fdt()
Move the variables declarations to where they are needed, to reduce the
number of #ifdefs needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
b53541f7f6 image: Remove some #ifdefs from image-fit and image-fit-sig
Drop the #ifdefs which are easy to remove without refactoring.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
f33a2c1bd0 image: Remove #ifdefs from select_ramdisk()
Use boolean variables to deal with the strange #ifdef logic of this
function, so we can remove the #ifdefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
e4c928792e image: Split up boot_get_ramdisk()
This function is far too long. Before trying to remove #ifdefs, split out
the code that deals with selecting the ramdisk into a separate function.

Leave the code indented as it was for easier review. The next patch cleans
this up along with checkpatch violations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
78f88790e3 image: Reduce variable scope in boot_get_ramdisk()
Move the variables declarations to where they are needed, to reduce the
number of #ifdefs needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
1df654a6af image: Drop most #ifdefs in image-board.c
Remove ifdefs in this file, so far as possible without too much
refactoring.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
78740bcce8 image: Drop #ifdefs for fit_print_contents()
Use a simple return to drop the unwanted code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
13c133b995 image: Drop unnecessary #ifdefs from image.h
This file has a lot of conditional code and much of it is unnecessary.
Clean this up to reduce the number of build combinations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
0ab5e02704 image: Tidy up fit_unsupported_reset()
This function is only used in one place and does not need to use the
preprocessor. Move it to the C file and convert it to a normal function.

Drop fit_unsupported() since it is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
1eccbb16a2 efi: Correct dependency on FIT_SIGNATURE
At present EFI_SECURE BOOT selects RSA but does not necessarily enable
FIT_SIGNATURE. Mostly this is fine, but a few boards do not enable it,
so U-Boot tries to do RSA verification when loading FIT images, but it
is not enabled.

This worked because the condition for checking the RSA signature is
wrong in the fit_image_verify_with_data() function. In order to fix it
we need to fix this dependency. Make sure that FIT_SIGNATURE is enabled
so that RSA can be used.

It might be better to avoid using 'select' in this situation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:27 -04:00
fa13940740 image: Drop IMAGE_ENABLE_IGNORE
We can use the new host_build() function for this, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:27 -04:00
3ac0f50412 image: Drop IMAGE_OF_SYSTEM_SETUP
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
30ba282865 image: Drop IMAGE_OF_BOARD_SETUP
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
806d1ff37b image: Drop IMAGE_BOOT_GET_CMDLINE
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough and the board code is now in a separate file. Update the only place
where this is used and drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
e7d285b2f3 image: Use the correct checks for CRC32
Add a host Kconfig for CRC32. With this we can use CONFIG_IS_ENABLED(CRC32)
directly in the host build, so drop the unnecessary indirection.

Add a few more conditions to SPL_CRC32 to avoid build failures as well as
TPL_CRC32. Also update hash.c to make crc32 optional and to actually take
notice of SPL_CRC32.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
2bbed3ff8c image: Use Kconfig to enable FIT_RSASSA_PSS on host
Add a host Kconfig for FIT_RSASSA_PSS. With this we can use
CONFIG_IS_ENABLED(FIT_RSASSA_PSS) directly in the host build, so drop the
forcing of this in the image.h header.

Drop the #ifdef around padding_pss_verify() too since it is not needed.
Use the compiler to check the config where possible, instead of the
preprocessor.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
e059157f0d image: Use Kconfig to enable CONFIG_FIT_VERBOSE on host
Add a host Kconfig for FIT_VERBOSE. With this we can use
CONFIG_IS_ENABLED(FIT_VERBOSE) directly in the tools build, so drop the
forcing of this in the image.h header.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
0c303f9a66 image: Drop IMAGE_ENABLE_OF_LIBFDT
Add a host Kconfig for OF_LIBFDT. With this we can use
CONFIG_IS_ENABLED(OF_LIBFDT) directly in the tools build, so drop the
unnecessary indirection.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
bf371b4cf5 image: Drop IMAGE_ENABLE_FIT
Make use of the host Kconfig for FIT. With this we can use
CONFIG_IS_ENABLED(FIT) directly in the host build, so drop the unnecessary
indirection.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
d54f7e3f23 hash: Drop some #ifdefs in hash.c
We can use the __maybe_unused attribute to avoid some of the #ifdefs in
this file. Update the functions accordingly.

Note: The actual hashing interface is still a mess, with four separate
combinations and lots of #ifdefs. This should really use a driver
approach, e.g. as is done with partition drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
2c21256b27 hash: Use Kconfig to enable hashing in host tools and SPL
At present when building host tools, we force CONFIG_SHAxxx to be enabled
regardless of the board Kconfig setting. This is done in the image.h
header file.

For SPL we currently just assume the algorithm is desired if U-Boot proper
enables it.

Clean this up by adding new Kconfig options to enable hashing on the host,
relying on CONFIG_IS_ENABLED() to deal with the different builds.

Add new SPL Kconfigs for hardware-accelerated hashing, to maintain the
current settings.

This allows us to drop the image.h code and the I_WANT_MD5 hack.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
603d15a572 spl: cypto: Bring back SPL_ versions of SHA
Unfortunately these were removed by mistake. This means that adding hash
support to SPL brings in all software algorithms, with a substantial
increase in code size.

The origin of the problem was renaming them to SPL_FIT_xxx and then these
were removed altogether in a later commit.

Add them back. This aligns with CONFIG_MD5, for example, which has an SPL
variant.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f5bc9c25f3 ("image: Rename SPL_SHAxxx_SUPPORT to SPL_FIT_SHAxxx")
Fixes: eb5171ddec ("common: Remove unused CONFIG_FIT_SHAxxx selectors")
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
e02b3fd4b9 image: Add Kconfig options for FIT in the tools build
In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
some options to enable the various FIT options expected in these tools.
This will ensure that the code builds correctly when CONFIG_TOOLS_xxx
is distinct from CONFIG_xxx.

Drop some #ifdefs which are immediately unnecessary (many more are in
later patches).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
5500a408dd kconfig: Add tools support to CONFIG_IS_ENABLED()
At present we must separately test for the host build for many options,
since we force them to be enabled. For example, CONFIG_FIT is always
enabled in the host tools, even if CONFIG_FIT is not enabled by the
board itself.

It would be more convenient if we could use, for example,
CONFIG_IS_ENABLED(FIT) and get CONFIG_HOST_FIT, when building for the
host. Add support for this.

With this and the tools_build() function, we should be able to remove all
the #ifdefs currently needed in code that is build by tools and targets.

This will be even nicer when we move to using CONFIG(xxx) everywhere,
since all the #ifdef and IS_ENABLED/CONFIG_IS_ENABLED stuff will go away.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> # b4f73886
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
c9d6b5b5dc compiler: Rename host_build() to tools_build()
With the new TOOLS_LIBCRYPTO and some other changes, it seems that we are
heading towards calling this a tools build rather than a host build,
although of course it does happen on the host.

I cannot think of anything built by the host which cannot be described as
a tool, so rename this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 15:53:26 -04:00
4ed37abc49 image: Remove ifdefs around image_setup_linux() el at
Drop some more ifdefs in image-board.c and also the FPGA part of bootm.c
which calls into it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
c5a68d29e3 image: Avoid #ifdefs for manual relocation
Add a macro to handle manually relocating a pointer. Update the iamge code
to use this to avoid needing #ifdefs.

This also fixes a bug where the 'done' flag was not set.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
2ac00c0505 image: Create a function to do manual relocation
Rather than adding an #ifdef and open-coding this calculation, add a
helper function to handle it. Use this in the image code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
5d3248a688 image: Split host code out into its own file
To avoid having #ifdefs in a few functions which are completely different
in the board and host code, create a new image-host.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
3d2a47f11c image: Fix up checkpatch warnings in image-board.c
Tidy up the warnings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
41506ff5a5 image: Split board code out into its own file
To avoid a large #ifdef in the image.c file, move the affected code into
a separate file.

Avoid any style fix-ups for easier review. Those are in the next patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
458b30af66 image: Update image_decomp() to avoid ifdefs
Adjust this function so that preprocessor macros are not needed. With
this, the host build uses more of the same header files as the target
build.

Rather than definining CONFIG_SYS_MALLOC_LEN, add a CONSERVE_MEMORY
define, since that is the purpose of the value.

This appears to have no impact on code size from a spot check of a few
boards (snow, firefly-rk3288, boston32r2el, m53menlo).

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
5a4f10d71b gzip: Avoid use of u64
The gzip API uses the u64 type in it, which is not available in the host
build. This makes it impossible to include the header file.

We could make this type available, but it seems unnecessary. Limiting the
compression size to that of the 'unsigned long' type seems good enough. On
32-bit machines the limit then becomes 4GB, which likely exceeds available
RAM anyway, therefore it should be sufficient. On 64-bit machines this is
effectively u64 anyway.

Update the header file and implementation to use 'ulong' instead of 'u64'.

Add a definition of u32 for the cases that seem to need exactly that
length. This should be safe enough.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
02ace2cd49 image: Update zstd to avoid reporting error twice
The zstd implementation prints the error in image_decomp() which is
incorrect and does not match other algorithms. Drop this and let the
caller report the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
b876eb87e9 image: Avoid switch default in image_decomp()
At present this function is full of preprocessor macros. Adjust it to
check for an unsupported algorithm after the switch(). This will allow
us to drop the macros.

Fix up the return-value path and an extra blank line while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
918adf8e07 btrfs: Use U-Boot API for decompression
Use the common function to avoid code duplication.

Acked-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
94d0a2efc0 zstd: Create a function for use from U-Boot
The existing zstd API requires the same sequence of calls to perform its
task. Create a helper for U-Boot, to avoid code duplication, as is done
with other compression algorithms. Make use of of this from the image
code.

Note that the zstd code lacks a test in test/compression.c and this should
be added by the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
c45b7920db compiler: Add a comment to host_build()
This function should have a comment explaining what it does. Add one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
67bc59df05 Add support for an owned buffer
When passing a data buffer back from a function, it is not always clear
who owns the buffer, i.e. who is responsible for freeing the memory used.
An example of this is where multiple files are decompressed from the
firmware image, using a temporary buffer for reading (since the
compressed data has to live somewhere) and producing a temporary or
permanent buffer with the resuilts.

Where the firmware image can be memory-mapped, as on x86, the compressed
data does not need to be buffered, but the complexity of having a buffer
which is either allocated or not, makes the code hard to understand.

Introduce a new 'abuf' which supports simple buffer operations:

- encapsulating a buffer and its size
- either allocated with malloc() or not
- able to be reliably freed if necessary
- able to be converted to an allocated buffer if needed

This simple API makes it easier to deal with allocated and memory-mapped
buffers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
930c887e0f lib: Add memdup()
Add a function to duplicate a memory region, a little like strdup().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-08 15:53:26 -04:00
e896613817 mtd: spi-nor-ids: Reinstate Micron MT25QL02G
This ID disappeared in 5b66fdb29d ("mtd: spi: Remove unused files"),
add the ID back, since the chip is used on devices supported by U-Boot.

Fixes: 5b66fdb29d ("mtd: spi: Remove unused files")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-08 18:18:24 +05:30
b2be695166 mtd: spinand: macronix: Fix ECC Status Read
According to datasheet, the upper four bits are reserved or used for
reflecting the ECC status of the accumulated pages. The error bits
number for the worst segment of the current page is encoded on lower
four bits. Fix it by masking the upper bits.

This same issue has been already fixed in the linux kernel by:
"mtd: spinand: macronix: Fix ECC Status Read"
(sha1: f4cb4d7b46f6409382fd981eec9556e1f3c1dc5d)

Apply the same fix in the U-Boot driver.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-08 17:59:34 +05:30
0caf37e973 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- a37xx: pci: Increase PCIe IO size from 64 KiB to 1 MiB (Pali)
- phy: marvell: a3700: Misc improvements (Pali)
- a38x serdes cleanup (Pali)
- A3720 PCIe enhancements (Pali & Marek)
- mvebu: mvebu_armada-8k: Puzzle M801 enhancements (Robert)
- mvebu: x530: Remove custom kwbimage.cfg (Chris)
- mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT (Stefan)
2021-10-08 08:02:47 -04:00
089e433e56 board: dh_stm32mp1: Remove gpio_hog_probe_all() from board
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb492 ("gpio: fixes for gpio-hog support").

And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-08 08:46:10 +02:00
d901d76eca board: stm32mp1: Remove gpio_hog_probe_all() from board
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb492 ("gpio: fixes for gpio-hog support").

And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-08 08:46:02 +02:00
c31cf40096 i2c: stm32f7: compute i2cclk only one time
Compute i2cclk only one time in stm32_i2c_compute_timing()
and remove setup parameter (accessible in i2c_priv).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:41 +02:00
6338b45888 i2c: stm32f7: add support for DNF i2c-digital-filter binding
Add the support for the i2c-digital-filter binding, allowing to enable
the digital filter via the device-tree and indicate its value in the DT

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:40 +02:00
6bbb14f018 i2c: stm32f7: fix configuration of the digital filter
The digital filter related computation are present in the driver
however the programming of the filter within the IP is missing.
The maximum value for the DNF is wrong and should be 15 instead of 16.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:40 +02:00
0959999891 i2c: stm32f7: support DT binding i2c-analog-filter
Replace driver internally coded enabling/disabling of the
analog-filter with the DT binding "i2c-analog-filter".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:40 +02:00
2aaac1787a arm: dts: stm32: Add i2c-analog-filter property in I2C nodes for stm32h743
Add i2c-analog-filter property in I2C nodes to enable analog
filter feature.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:40 +02:00
5d59bd553b arm: dts: stm32: Add i2c-analog-filter property in I2C nodes for stm32f746
Add i2c-analog-filter property in I2C nodes to enable analog
filter feature.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:40 +02:00
1fd9eb68d6 i2c: stm32f7: move driver data of each instance in a privdata
Today all the I2C instance point on the same global
variable stm32_i2c_setup according the compatible: i2c_priv->setup =
pointer to the same driver data.

This patch changes this driver data (stm32f7_setup and stm32mp15_setup)
to a const struct and move the timing struct 'setup' as element of i2c
privdata, initialized in stm32_ofdata_to_platdata() with the driver
configuration data.

This patch solves issues when several I2C instance have not the same
clock source or not the same configuration: each timing setup is saved
is the I2C privdata.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:42:40 +02:00
81b2445af4 spi: stm32: Add ofdata_to_platdata() callback
Parse DT in ofdata_to_platdata() callback instead of probe().

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-08 08:41:47 +02:00
1ead6c20bd ARM: mvebu: x530: Remove custom kwbimage.cfg
Commit ca1a4c8632 ("mvebu: select boot device at SoC level") made it
unnecessary for the A385 boards to have their own kwbimage.cfg but as
the x530 was in flight at the time it was added with it's own
kwbimage.cfg. Remove the custom kwbimage.cfg as the SoC level file is
suitable.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
bdce2124ac arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code
Since the CP1 pinctrl is not properly set in the DTS, there is no
need for setting the pinctrl by writing hardcoded values to the MPP
registers.

So, drop the code relating to that.

Fixes: 87c220d0 ("arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
cfb7102d8d arm: mvebu: dts: m801: correct CP1 pinctrl
Current CP1 pinctrl that is set on the Puzzle M801 is incorrect.
CP1 pins are only used for the SMI bus and the MSS I2C, all other
pins are just GPIO-s.

Due to this being set completely wrong, the pinctrl was actually
ended up being hardcoded in the board_early_init_f() step so that
SMI would work.

That is obviously not the right thing to do, so convert the register
hex values that were being written to individual pin modes and set it
in the DTS.
Add the SMI pins to the CP1 MDIO node as otherwise CP1 pinctrl does
not get probed without an consumer.

Fixes: 2ae2b8a2 ("arm: mvebu: Initial iEi Puzzle-M801 support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
cf47a8cf8f arm: mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT
Select SPL_SKIP_LOWLEVEL_INIT on 32bit Armada platforms via Kconfig,
as this was removed from mach/config.h in a2ac2b96 ("Convert
CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig").

Signed-off-by: Stefan Roese <sr@denx.de>
Fixes: a2ac2b96 ("Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig")
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Behún <kabel@kernel.org>
Cc: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
2021-10-08 08:37:55 +02:00
8247c90e92 arm: a37xx: pci: Update private structure documentation
There were several changes for this structure but the documentation was
not changed at the time. Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
96a3c989dc arm: a37xx: pci: Cosmetic change
Update indentation in driver's private structure.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
1d7ad68559 arm: a37xx: pci: Handle propagation of CRSSVE bit from PCIe Root Port
Now that PCI Bridge (PCIe Root Port) for Aardvark is emulated in U-Boot,
add support for handling and propagation of CRSSVE bit.

When CRSSVE bit is unset (default), driver has to reissue config
read/write request on CRS response.

CRSSVE bit is supported only when CRSVIS bit is provided in read-only
Root Capabilities register. So manually inject this CRSVIS bit into read
response for that register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
95e101e86a arm: a37xx: pci: Do not automatically enable bus mastering on PCI Bridge
Now that PCI Bridge is working for the PCIe Root Port, U-Boot's PCI_PNP
code automatically enables memory access and bus mastering when needed.

We do not need to enable it when setting the HW up.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
cb056005dc arm: a37xx: pci: Add support for accessing PCI Bridge on root bus
Aardvark does not have a real PCIe Root Port device on the root bus.
Instead it has PCIe registers of PCIe Root Port device mapped in
internal Aardvark memory space starting at offset 0xc0.

The PCIe Root Port itself is normally available as a PCI Bridge device
on the root bus with bus number zero. Aardvark instead has the
configuration registers of this PCI Bridge at offset 0x00 of Aardvark's
memory space, but the class code of this device is Mass Storage
Controller (0x010400), instead of PCI Bridge (0x600400), which causes
U-Boot to fail to recognize it as a P2P Bridge

Add a hook into the pcie_advk_read_config() / pcie_advk_write_config()
functions to redirect access for root bus from PIO transfer to this
internal Aardvark memory space. This will allow U-Boot to access
configuration space of this PCI Bridge which represents PCIe Root Port.

Redirect access to PCI Bridge registers in range 0x10 - 0x34 to driver's
internal buffer (cfgcache[]). This is because at those addresses
Aardvark has different registers, incompatible with config space of a
PCI Bridge.

Redirect access to PCI Bridge register PCI_ROM_ADDRESS1 (0x38) to
Aardvark internal address for that register (0x30).

When reading PCI Bridge register PCI_HEADER_TYPE, set it explicitly to
value Type 1 (PCI_HEADER_TYPE_BRIDGE) as PCI Bridge must be of Type 1.

When writing to PCI_PRIMARY_BUS or PCI_SECONDARY_BUS registers on this
PCI Bridge, correctly update driver's first_busno and sec_busno
variables, so that pcie_advk_addr_valid() function can check if address
of any device behind the root bus is valid and that PIO transfers are
started with correct config type (1 vs 0), which is required for
accessing devices behind some PCI bridge after the root bus.

U-Boot's PCI_PNP code sets primary and secondary bus numbers as relative
to the configured bus number of the root bus. This is done so that
U-Boot can support multiple PCIe host bridges or multiple root port
buses, when internal bus numbers are different.

Now that root bus is available, update code in pcie_advk_read_config()
and pcie_advk_write_config() functions to correctly calculate real
Aardvark bus number of the target device from U-Boot's bus number as:
  busno = PCI_BUS(bdf) - dev_seq(bus)

Stefan: Small fix of header masking as suggested by Pali.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:37:55 +02:00
6b2771cb19 arm: a37xx: pci: Fix pcie_advk_link_up()
Aardvark reports Disabled and Hot Reset LTSSM states as values >= 0x20.
Link is not up in these states, so fix pcie_advk_link_up() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
de72930433 arm: mvebu: a38x: serdes: Update comment about PCIE*_ENABLE_* defines
These are part of SOC_CONTROL_REG1 register, not PEX_CAPABILITIES_REG.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
28c935b5ee arm: mvebu: a38x: serdes: Remove unused PCIe macros and functions
Remove unused PCIe functions from SerDes code. They are unused and are
duplicated either from generic PCIe code or from pci_mvebu.c.

Remove also unused PCIe macros from SerDes code. They are just obfuscated
variants of standards macros in include/pci.h or in pci_mvebu.c.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
177ee6c77e arm: mvebu: a38x: serdes: Don't configure PCIe cards in SerDes init code
This code is trying to parse PCIe config space of PCIe card connected on
the other end of link and then is trying to force 5.0 GT/s speed via Target
Link Speed bits in PCIe Root Port Link Control 2 Register on the local part
of link if it sees that card supports 5.0 GT/s via Max Link Speed bits in
Link Capabilities Register.

The code is incorrect for more reasons:
- Accessing config space of an endpoint card cannot be done immediately.
  If the PCIe link is not up, reading vendor/device ID registers will
  return all ones.
- Parsing is incomplete, so it can cause issues even for working cards.

Moreover there is no need to force speed to 5.0 GT/s via Target Link Speed
bits on PCIe Root Port Link Control 2 Register. Hardware changes speed from
2.5 GT/s to 5.0 GT/s autonomously when it is supported.

Most importantly, this code does not change link speed at all, since
because after updating Target Link Speed bits on PCIe Root Port Link
Control 2 Register, it is required to retrain the link, and the code for
that is completely missing.

The code was probably needed for making buggy endpoint cards work. Such a
workaround, though, should be implemented via PCIe subsystem (via quirks,
for example), as buggy cards could also affect other PCIe controllers.

Note that this code is fully unrelated to a38x SerDes code and really
should not have been included in SerDes initialization. Usage of magic
constants without names and comments made this SerDes code hard to read and
understand.

Remove this PCIe application code from low level SerDes code. As this code
is configuring only 5.0 GT/s part, in the worst case, it could leave buggy
cards at the initial speed of 2.5 GT/s (if somehow before this change they
could have been "upgraded" to 5.0 GT/s speed even with missing link
retraining). Compliant cards which just need longer initialization should
work better after this change.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
db5ea818ce arm: mvebu: a38x: serdes: Don't overwrite PCI device ID
PCI device ID is part of the PCIe controller SoC / revision. For Root
Complex mode (which is the default and the only mode supported currently
by U-Boot and Linux kernel), it is PCI device ID of PCIe Root Port device.

If there is some issue with this device ID, it should be set / updated by
PCIe controller driver (pci_mvebu.c), as this register resides in address
space of the controller. It shouldn't be done in SerDes initialization
code.

In the worst case (a specific board for example) it could be done via
U-Boot's weak function board_pex_config().

But it should not be overwritten globally for all A38x devices.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
3fc8b90d68 arm: mvebu: a38x: serdes: Don't set PCIe Common Clock Configuration
Enabling Common Clock Configuration bit in PCIe Root Port Link Control
Register should not be done unconditionally. It is enabled by operating
system as part of ASPM. Also after enabling Common Clock Configuration it
is required to do more work, like retraining link. Some cards may be broken
due to this incomplete Common Clock Configuration and some cards are broken
and do not support ASPM at all.

Remove this incomplete code for Common Clock Configuration. It really
should not be done in SerDes code as it is not related to SerDes, but to
PCIe subsystem.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
3bedbcc3aa arm: mvebu: a38x: serdes: Don't overwrite read-only SAR PCIe registers
Device/Port Type bits of PCIe Root Port PCI Express Capabilities Register
are read-only SAR registers and are initialized according to current mode
configured by PCIe controller. Changing PCIe controller mode (from Root
Complex mode to Endpoint mode or the other way) is possible via PCI
Express Control Register (offset 0x41A00), bit 1 (ConfRoot Complex). This
has to be done in PCIe controller driver (in our case pci_mvebu.c). Note
that default mode is Root Complex.

Maximum Link Speed bits of PCIe Root Port Link Capabilities Register are
platform specific and overwriting them does not make sense. They are set by
PCIe controller according to current SerDes configuration. For A38x it is
5.0 GT/s if SerDes supports appropriate speed.

Maximum Link Width bits of PCIe Root Port Link Capabilities Register are
read-only SAR registers, but unfortunately if this is not set correctly
here, then access PCI config space of the endpoint card behind this Root
Port does not work.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
2d5f51f680 arm: mvebu: a38x: serdes: Add comments for hws_pex_config() code
Add comments to understand what this magic code is doing.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
eb5d31645e arm: mvebu: a38x: serdes: Remove duplicate macro SOC_CTRL_REG
SoC Control 1 Register (offset 0x18204) is already defined by macro
SOC_CONTROL_REG1.

Use macro SOC_CONTROL_REG1 instead of macro SOC_CTRL_REG in ctrl_pex.c
code and remove the other definition.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
cfd4a8ad0f arm: mvebu: a38x: serdes: Add comments and use macros in PCIe code
Replace magic register offsets by macros to make code more readable.
Add comments about what this code is doing.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
021a98a2d6 phy: marvell: a3700: Return correct error code when power up fails
Subroutines in comphy_usb2_power_up() and comphy_sgmii_power_up() functions
may fail. In this case, do not continue execution of current function and
instead jump to the end. Return value in 'ret' variable is already set.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
4ca474d306 phy: marvell: a3700: Fix configuring polarity invert bits
phy_txd_inv or phy_rxd_inv needs to be set only in case when
appropriate polarity is inverted. Otherwise these bits should be
cleared.

Same change was included in TF-A project:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/9406

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
4adb16b29a phy: marvell: a3700: Set TXDCLK_2X_SEL bit during PCIe initialization
Marvell Armada 3700 Functional Specifications, section 52.2 PCIe Link
Initialization says that TXDCLK_2X_SEL bit needs to be enabled for PCIe
Root Complex mode.

Same change was included in TF-A project:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/9408

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
646a152247 arm: a37xx: pci: Increase PCIe IO size from 64 KiB to 1 MiB
Commit 079b35a261 ("arm: a37xx: pci: Increase PCIe MEM size from 16 MiB
to 127 MiB") increased size of PCIe MEM to 127 MiB, which is the maximal
possible size for allocated 128 MiB PCIe window. PCIe IO size in that
commit was unchanged.

Armada 3720 PCIe controller supports 32-bit IO space mapping so it is
possible to assign more than 64 KiB if address space for IO.

Currently controller has assigned 127 MiB + 64 KiB memory and therefore
there is 960 KiB of unused memory. So assign it to IO space by increasing
IO window from 64 KiB to 1 MiB.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 079b35a261 ("arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB")
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-08 08:33:52 +02:00
b0e763b7b8 pm9263: Remove unused CONFIG_USER_LOWLEVEL_INIT
Remove the latest reference of CONFIG_USER_LOWLEVEL_INIT in code

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:31:24 +02:00
20a3969d33 stv0991: remove specific CONFIG_STV0991 configs
Remove the following STV0991 specific configs:
- CONFIG_STV0991 (never used, only defined in CONFIG_SYS_EXTRA_OPTIONS)
- CONFIG_STV0991_HZ (replaced by generic CONFIG_SYS_HZ)
- CONFIG_STV0991_HZ_CLOCK (replaced by generic CONFIG_SYS_HZ_CLOCK)

This patch allows to reduce the file config_whitelist.txt.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:30:18 +02:00
c7f85e1f61 stm32f429: move CONFIG_BOOTCOMMAND in defconfig
Move CONFIG_BOOTCOMMAND defined in Kconfig in the board defconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:25:57 +02:00
454994727d configs: Move some usb config in defconfig
Using the tools moveconfig.py to move the following config in the
defconfig files:
 CONFIG_USB_HOST_ETHER
 CONFIG_USB_ETHER_ASIX
 CONFIG_USB_ETHER_MCS7830
 CONFIG_USB_ETHER_SMSC95XX

These option are already migrated since the commit f58ad98a62 ("usb: net:
migrate USB Ethernet adapters to Kconfig") and the commit ae3584498b
("usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ian Ray <ian.ray@ge.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:25:12 +02:00
cc30ea584e Convert CONFIG_STM32_FLASH to Kconfig
This converts the CONFIG_STM32_FLASH to Kconfig by using
tools/moveconfig.py

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:24:20 +02:00
2d0808161b Revert "configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp"
This reverts commit d5d726d3cc,
which breaks boards which ship with multiple SD/eMMC sockets.

This stm32mp1.h config is not used only by the ST reference
boards, but all the other STM32MP1 based boards in U-Boot, so
changes to this stm32mp1.h cannot break the other boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-08 08:22:43 +02:00
5d81616fb8 phy: stm32-usbphyc: stm32: usbphyc: add protection on phy sub-node
Add protection on presence and order of the phy node sub node
by using the mandatory reg information.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:19:59 +02:00
5b4fa85d65 phy: stm32-usbphyc: use connector for vbus-supply with phy-stm32-usbphyc
The vbus-supply is an optional property of sub-node connector node.
and no more in the usb phyc node (in first proposed binding).

This regulator for USB VBUS may be needed for host mode.

See the latest kernel binding for details in
Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml.

  usbphyc_port0: usb-phy@0 {
      reg = <0>;
      phy-supply = <&vdd_usb>;
      #phy-cells = <0>;
      connector {
          compatible = "usb-a-connector";
          vbus-supply = <&vbus_sw>;
      };
  };

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:19:59 +02:00
e69c4143e8 board: stm32: Remove the bi_boot_params initialization
The stm32 platforms never had to support an ATAGs-based Linux Kernel,
so remove the bi_boot_params initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 08:15:39 +02:00
b703dcb0fe arm: stm32: Disable ATAGs support
These platforms never had to support an ATAGs-based Linux Kernel, so
remove the options.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 08:15:39 +02:00
fa0223a759 mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP
Import HS400 support for iMX7ULP B0 from the Linux kernel:

2eaf5a533afd ("mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP")

According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET
before any setting of STROBE_DLL_CTRL register.

USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL)
for slave sel value. If this register bits value is 0,  it needs
256 ref_clk cycles to update slave sel value. IC suggest to set
bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave
sel value. This will short the lock time of slave.

i.MX7ULP B0 will need more time to lock the REF and SLV, so change
to add 5us delay.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-10-07 21:58:49 +02:00
c1412cbb17 mmc: fsl_esdhc_imx: initialize data for imx7ulp
Import data for eSDHC driver for SoC iMX7ULP from the Linux kernel.
Set supported by u-boot flags only.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-10-07 21:58:49 +02:00
a31de24473 arm64: dts: imx8mm-venice-gw7902: use imx8mm-venice-u-boot.dtsi
Use the common imx8mm-venice-u-boot.dtsi (dtb for the
'DEFAULT_DEVICE_TREE) so that it inherits things like binman.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 17:45:01 +02:00
129c0c57b5 arm64: dts: imx8mm-venice-gw7901: use imx8mm-venice-u-boot.dtsi
Use the common imx8mm-venice-u-boot.dtsi (dtb for the
'DEFAULT_DEVICE_TREE) so that it inherits things like binman.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 17:45:00 +02:00
75c337cf2b arm64: dts: imx8mm-venice-gw700x: use imx8mm-venice-u-boot.dtsi
Use the common imx8mm-venice-u-boot.dtsi (dtb for the
'DEFAULT_DEVICE_TREE) so that it inherits things like binman.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 17:45:00 +02:00
84482e4f4e smegw01: Pass 'mmcpart' to the kernel command line
When using SWUpdate, it is necessary to toggle between partitions.

Use the 'mmcpart' environment variable to accomplish that.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-10-07 17:45:00 +02:00
68de913c12 imx: makefile: drop the use of imx8mimage.sh
After switch to use binman, no need to use the bash script
to check file exsiting or not. And there is bug that
the script will be executed everytime Makefile is used which is
confusing people.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2021-10-07 17:45:00 +02:00
c7b871111b tools: imx8mimage: not abort when mmap fail
When creating flash.bin, the hdmi firmware might not be
copied to U-Boot source tree. Then mkimage will fail.
However we are switching to binman, binman will show the
message if the file not there, and create empty file per
i.MX8MQ binman node. So we not fail mkimage here othersize
CI will fail if hdmi firmware not copied here.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 17:45:00 +02:00
9cab87f184 imx: imx8mm: Add support for Kontron Electronics SL/BL i.MX8M-Mini boards (N801x)
The Kontron SoM-Line i.MX8MM (N801x) by Kontron Electronics GmbH is a SoM
module with an i.MX8M-Mini SoC, 1/2/4 GB LPDDR4 RAM, SPI NOR, eMMC and PMIC.

The matching evaluation boards (Board-Line) have 2 Ethernets, USB 2.0, HDMI/LVDS,
SD card, CAN, RS485 and much more.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
2021-10-07 17:31:58 +02:00
23ce06b246 imx53: usbarmory: Use ethernet driver model
Enable ethernet driver model as it is mandatory.

Signed-off-by: Andrej Rosano <andrej.rosano@f-secure.com>
2021-10-07 16:53:50 +02:00
073b105e79 imx: ventana: fix USB hub reset
Remove board_ehci_hcd_init function that is not used with DM_USB
and replace its functionality with device-tree configuraton that treats
USB HUB RST# as a gpio enable for the usbh1 vbus regulator.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
397d697fd4 imx: ventana: update LVDS support
Enable LVDS display detection and panel-specific configuration

Make I2C based LVDS detection and configuration model specific:
- not all boards support LVDS connectors; fail detection that do not
  support LVDS to avoid misdetecting an I2C device as a display
- GPIO configuration is panel specific; use panel name where needed

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
d75ebf3482 imx: ventana: fix splash logo drawing
After mxc_ipuv3 DM_VIDEO conversion showing splash image
doesn't work. Fix this by adding new requirements:
- splashimage env variable.
- CONFIG_SPLASH_SCREEN
- CONFIG_CMD_BMP

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
a0040df98a imx: ventana: enable additional USB ether devices
Enable additional USB ethernet devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
54347344ce imx: ventana: remove phy gpio reset from dt
We configure network phy configuration for internal delay, LED config,
and clock config. If we leave the phy reset gpio defined in dt the
kernel may issue a reset to the phy and break these configs. While some
may be handled by a kernel phy driver, others may not (typically LED
config).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
4ecaeb6c0f imx: ventana: add U-Boot watchdog support
Add watchdog support for U-Boot

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
5e25a28b61 imx: ventana: add part command
Add part command for obtaining info about disk partitions.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
e6f48aad15 imx: imx6ul: Add support for Kontron Electronics SL/BL i.MX6UL/ULL boards (N63xx/N64xx)
This adds support for i.MX6UL/ULL-based evaluation kits with SoMs by
Kontron Electronics GmbH.

Currently there are the following SoM flavors (SoM-Line):
  * N6310: SOM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
  * N6311: SOM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND
  * N6411: SOM with i.MX6ULL, 512MB RAM, 512MB SPI NAND

And the according evaluation boards (Board-Line):
  * N6310-S: Baseboard with SOM N6310, eMMC, display (optional), ...
  * N6311-S: Baseboard with SOM N6311, eMMC, display (optional), ...
  * N6411-S: Baseboard with SOM N6411, eMMC, display (optional), ...

Currently U-Boot describes i.MX6UL and i.MX6ULL through separate config
options at compile-time. Though the differences are so minor, that for
the scope of these SoMs we just use a single defconfig that is compatible
with both SoCs.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2021-10-07 16:53:50 +02:00
bc959905df imx: mx7: spl: fix CONFIG_SPL_MAX_SIZE definition
The CONFIG_SPL_MAX_SIZE definition did not account for all areas that
are used by the boot ROM according to the manual, causing boot failures
due to truncated SPL images when actually hitting this limit.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-10-07 16:53:50 +02:00
33e9a69560 misc: ocotp: Allow disabling ocotp driver in SPL
This allows removal of the OCOTP driver when SPL is enabled.
Disabling OCOTP reduces SPL size efficiently.

Signed-off-by: Michael Scott <mike@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 16:53:50 +02:00
cdb18048f9 ARM: dts: imx: use generic name bus
Synchronize the u-boot and kernel imx device trees, using tuned
script from commit c0157bdcafa1 ("ARM: dts: imx: use generic name bus")

Per devicetree specification, generic names are recommended to be
used, such as bus.

i.MX AIPS is an AHB - IP bridge bus, so we could use bus as node
name.

Script:
sed -i "s/\<aips@/bus@/" arch/arm/dts/imx*.dtsi
sed -i "s/\<aips@/bus@/" arch/arm/dts/vf*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm/dts/imx*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm/dts/vf*.dtsi

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 16:53:50 +02:00
64fe0ffca0 mx7ulp: Update wdog disable sequence
Update the mx7ulp wdog disable sequence to avoid potential reset
issue in unlock or refresh sequence. Both sequence need two words
write to wdog CNT register in 16 bus clocks window, if miss the
window, the write will cause violation in wdog and reset the chip.

Current u-boot code is using writel() function which has a DMB
barrier to order the memory access. The DMB between two words write
may introduce some delay in certain circumstance, causing the wdog
reset due to 16 bus clock window requirement.

Also, WDOG1 might have been enabled already depending on FUSE hence
we need to be as close as possible to its reconfiguration timing
requirement of 128 bus clock limit.

This patch replaces writel() function by __raw_writel() to avoid such
issue, and improve to check if watchdog is already disabled or
unlocked.

Signed-off-by: Ye Li <ye.li@nxp.com>
Co-developed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Co-developed-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-07 16:53:50 +02:00
e1918ce299 rtc: rv8803: add epson,rx8803 and epson,rx8900 compatible
The RX8803 and RX8900 register layouts are compatible with the one of
the RV8803. So add these to the compatibles.

The same compatible strings are used and approved in linux kernel.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2021-10-07 16:53:50 +02:00
5089d2fc8e ARM: dts: imx6-apalis: enable watchdog
Add u-boot.dtsi specific to imx6-apalis with a watchdog enabled.

If OP-TEE is loaded by SPL, it may use a watchdog to handle fails of
u-boot running. Enable the watchdog in SPL to use it by OP-TEE.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 16:53:50 +02:00
af2d3c91d8 ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
Since c6df0e2ffd ("net: phy: micrel: add support for DLL setup on ksz9131")
the Micrel PHY driver correctly configures the delay register. The Verdin PHY
is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2021-10-07 16:53:50 +02:00
32139c25e4 imx8qm_mek: Increase CONFIG_SYS_BOOTM_LEN to 64MB
The BSP platform LmP supports the board NXP iMX8QM MEK. The
kernel size in LmP exceeds 32Mb. Increase the maximum size
of an uncompressed kernel to fix the following error:
    Uncompressing Kernel Image
    Error: inflate() returned -5
    Image too large: increase CONFIG_SYS_BOOTM_LEN
    Must RESET board to recover

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-07 16:53:50 +02:00
13586e4668 imx8mq_evk: Increase CONFIG_SYS_BOOTM_LEN to 64MB
The BSP platform LmP supports the board NXP iMX8M Plus EVK. The
kernel size in LmP exceeds 32Mb. Increase the maximum size
of an uncompressed kernel to fix the following error:
    Uncompressing Kernel Image
    Error: inflate() returned -5
    Image too large: increase CONFIG_SYS_BOOTM_LEN
    Must RESET board to recover

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-07 16:53:50 +02:00
80c9cb3cb5 imx8mm_evk: Increase CONFIG_SYS_BOOTM_LEN to 64MB
The BSP platform LmP supports the board NXP iMX8M Mini EVK. The
kernel size in LmP exceeds 32Mb. Increase the maximum size
of an uncompressed kernel to fix the following error:
    Uncompressing Kernel Image
    Error: inflate() returned -5
    Image too large: increase CONFIG_SYS_BOOTM_LEN
    Must RESET board to recover

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-07 16:53:50 +02:00
7ce83854f2 Kconfig: Don't use RSA_FREESCALE_EXP on MX7ULP
The CAAM on IMX7ULP doesn't support public key hardware acceleration
(PKHA), as in other NXP parts. Disable RSA_FREESCALE_EXP for IMX7ULP
too.

Fixed: f4e9ff7135 ("Kconfig: Don't use RSA_FREESCALE_EXP on IMX")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-07 16:53:50 +02:00
42cef89e86 arm: dts: imx8mp: Generate single bootable binary
binman conversion made flashing flash.bin
and u-boot.itb necessary. Update binman config
to create a single flash.bin image again.

This updates imx8mp_evk and phyCORE-i.MX8MP as they share the
same binman config.

Updated also imx8mp_evk documentation.

Tested on phyCORE-i.MX8MP.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-10-07 16:53:50 +02:00
0f328fcc4c arm: imx8m: imx8mm-cl-iot-gate: Add support for detect memory size
When purchasing imx8mm-cl-iot-gate it is able to customize the
memory size. It could be 1GB, 2GB and 4GB. We implement
board_phys_sdram_size() to detect the memory size for usage.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2021-10-07 16:53:50 +02:00
d9a6f0eed6 tree: imx: remove old fit generator script
Since derivatives are moving to binman from usage of the FIT generator
script, and considering the warning introduced in f4a43d2925
("Makefile: Warn against using CONFIG_SPL_FIT_GENERATOR"), usage of FIT
generator is discouraged.

Current FIT generator also generates broken output, since commit
3f04db891a ("image: Check for unit addresses in FITs") prohibits using
'@' for unit addresses but the generator script still emits the old
sematics.

Remove the generator script and corresponding call in Makefile, all
derivatives should be migrated to binman in order to provide binary
images.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-07 16:53:50 +02:00
53a24dee86 imx8mm-cl-iot-gate: Split the defconfigs
Currently imx8mm-cl-iot-gate_defconfig fails to produce a working boot
binary due to the lack of fip.bin:

"  BINMAN  all
Image 'main-section' is missing external blobs and is non-functional: blob-ext

Some images are invalid"

To make the build process more consistent with the other i.MX8M targets,
split the defconfig in two:

- imx8mm-cl-iot-gate_defconfig: standard defconfig that only
requires ATF / DDR firmware.

- imx8mm-cl-iot-gate-optee_defconfig: "more advanced" defconfig that
requires ATF / Optee / mbedtls / DDR firmware.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2021-10-07 16:53:50 +02:00
88f4f50989 mx7ulp: Allow to enable CONFIG_IMX_HAB
Secure boot support on mx7ulp was added in the
commit 27117b2024 ("mx7ulp: Add HAB boot support").

Allow selecting CONFIG_IMX_HAB for ARCH_IMX7ULP.

Fixes: 27117b2024 ("mx7ulp: Add HAB boot support")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-07 16:53:50 +02:00
5a6af8c19a imx8m: Restrict usable memory based on rom_pointer[0]
When TEE is loaded, we need to restrict the memory usage based
on rom_pointer[0]

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2021-10-07 16:53:50 +02:00
0cf5622998 arm: dts: imx8mm-venice*: remove thermal zone overrides
Remove the unnecessary thermal zone overrides.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
f8a792e51d board: gateworks: venice: update thermal temp thresholds per cpu grade
Update the passive/critical thermal zone dt config per CPU temperature
grade.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
cd7f37666a arm: dts: imx8mm-venice-gw700x: fix mp5416 pmic config
Fix various MP5416 PMIC configurations:
 - Update regulator names per dt-bindings
 - ensure values fit among valid register values
 - add required regulator-max-microamp property
 - add regulator-always-on prop

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
45e82c379c board: gateworks: venice: do not overwrite serial#
Do not overwrite existing serial# env to avoid:
 ## Error: Can't overwrite "serial#"
 ## Error inserting "serial#" variable, errno=1

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
9e4b38a12a board: gateworks: venice: display hwmon details by default
Display hwmon values by default when using the 'gsc' command.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-07 16:53:50 +02:00
aaac39218d imx53: usbarmory: Add card detect configuration
After the enforcement of DM_MMC the microSD card is not detected. Fix by
correctly configuring the card detect in the devicetree.

Signed-off-by: Andrej Rosano <andrej.rosano@f-secure.com>
2021-10-07 16:53:50 +02:00
f68c897e2d mtd: nand: mxs_nand_spl: Add nand_spl_adjust_offset
Since the mxs_nand_spl has implemented adjust read offset in
nand_spl_load_image, so we don't need to check the bad block in
nand_spl_adjust_offset. Directly return the offset to continue
read by nand_spl_load_image.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-07 16:53:50 +02:00
ae3f752919 arm: imx8m: Fix pad DSE issue for i.MX8MM/MN/MP
According to 8MM/MN/MP reference manual, their pad registers only have
4 valid DSE values. And DSE2 and DSE4 are different with current
definitions in iomux-v3.h. Fix the issue to align with manual.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 16:53:50 +02:00
9b7c349550 mmc: fsl_esdhc_imx: Fix clock disable issue
The SD clock disable is wrapped by MMC_SUPPORTS_TUNING. So it
only works when UHS is enabled. However, in SD initialization the
power cycle does not depends on UHS. But the power cycle needs
disable the SD clock before power down.
So this causes a problem when UHS is not enabled. Some cards can't
become ready (ACMD14 timeout) due to the clock is enabled during
power cycle.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-10-07 16:53:50 +02:00
deb80ec023 imx: spl: fix imx8m secure boot
cherry-picked from NXP code:
719d665a87c6: ("MLK-20467 imx8m: Fix issue for booting signed image through uuu")

which fixes secure boot on imx8m based boards. Problem was
that FIT header and so IVT header too, was loaded to
memallocated address. So the ivt header address coded
in IVT itself does not fit with the real position.

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com>
2021-10-07 16:53:50 +02:00
9de3544858 imx: spl: implement spl_load_simple_fit_fix_load
read the address where the IVT header must sit
from IVT image header, loaded from SPL into
an malloced buffer and copy the IVT header
to this address

May make this dependend on SoC ?

Signed-off-by: Heiko Schocher <hs@denx.de>
2021-10-07 16:53:50 +02:00
884ba50a07 spl_fit. add hook to make fixes after fit header is loaded
add hook function spl_load_simple_fit_fix_load()
which is called after fit image header is loaded.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-07 16:53:50 +02:00
7d4541cdfb mtd: nand: Fix typo in MXC Kconfig symbol description
Trivial typo fix.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2021-10-07 16:53:50 +02:00
7a508a7245 Merge tag 'u-boot-amlogic-20211007' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- Add new SoC ID for S905Y2 found in Radxa Zero
- pcie_dw_meson: fix usb fail when pci link fails to go up
- Sync Amlogic DT from Linux 5.14
- dwc3-meson-gxl: add AXG compatible
- dts: keep back HW order for MMC devices since change in Upstream Linux
- Cleanup local AXG DT USB nodes now everything is upstream
- distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot
- New Boards:
  - Odroid-HC4: a variant of Odroid-C4 with 2 SATA ports (via PCIe-SATA bridge)
  - Beelink GS-King X: A variant of the other Beelink board with 2 SATA ports (via USB3-SATA bridge)
  - Banana Pi M5: another credit card SBC
  - JetHub D1/H1: home automation controllers
  - Radxa Zero: another RPi Zero sized SBC
2021-10-07 09:02:22 -04:00
11a69a9ef3 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Reset improvements, enable coherence manager on ae350, k210 clk
  improvements, other fixes
2021-10-07 09:00:45 -04:00
506fd30740 doc: boards: amlogic: update for Radxa Zero
Add documentation bits for the Radxa Zero

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:46 +02:00
e294f64b71 boards: amlogic: add Radxa Zero defconfig
Add a defconfig for the Radxa Zero SBC, using an Amlogic S905Y2 chip.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS & add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:46 +02:00
b1463cbb54 ARM: dts: add support for Radxa Zero
Import the initial dts queued for Linux 5.16.y

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:35 +02:00
8ee224bfe4 ARM: dts: sort Amlogic Makefile section
Alpha sort the Amlogic dtb list (same as the kernel).

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:35 +02:00
2ae382285b ARM: amlogic: add JetHub D1/H1 docs
Fix doc/board/amlogic/index.rst:
- Add S905W to S905X column.
- Add JetHub devices to the corresponding columns.
- Fix tabs to spaces for table alignment

Add doc/board/amlogic files:
- jethub-j100.rst
- jethub-j80.rst

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:35 +02:00
de19baef68 ARM: amlogic: add JetHub D1/H1 device support
Add support for new home automation devices.

JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features:
- DIN Rail Mounting case
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 512Mb/1GB DDR3
- 8/16GB eMMC flash
- 1 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- 2 x gpio LEDS
- GPIO user Button
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
- 3 x relay GPIO outputs
- DC source with a voltage of 9 to 56 V / Passive POE

JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features:
- Square plastic case
- Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 1GB DDR3
- 8/16GB eMMC flash
- 2 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- MicroSD 2.x/3.x/4.x DS/HS cards.
- 1 x gpio LED
- ADC user Button
- DC source 5V microUSB with serial console

Patches from:
- JetHub H1
  https://lore.kernel.org/r/20210915085715.1134940-4-adeep@lexina.in
  https://git.kernel.org/amlogic/c/abfaae24ecf3e7f00508b60fa05e2b6789b8f607
- JetHub D1
  https://lore.kernel.org/r/20210915085715.1134940-5-adeep@lexina.in
  https://git.kernel.org/amlogic/c/8e279fb2903990cc6296ec56b3b80b2f854b6c79

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: removed unused variable value]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:35 +02:00
15eda54676 ARM: amlogic: add JetHub common config header
JetHub devices uses its own boot sequence with "rescue" button

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:35 +02:00
fe8b4c1080 ARM: amlogic: add Banana Pi M5
Banana Pi BPI-M5 is a credit card format SBC with the following features:
- Amlogic S905X3 quad core Cortex-A55
- Mali-G31 GPU
- 4GB LPDDR4
- 16GB eMMC flash
- 4 USB 3.0
- 1 GbE ethernet
- HDMI output
- 2x LEDS
- SDCard
- 2.5mm Jack with Stereo Audio + CVBS
- Infrared Received
- ADC Button
- GPIO Button
- 40 pins header + 3pins debug header

[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:35 +02:00
2c9269b14b ARM: meson: add Beelink GS-King X board
The Beelink GS-King X is a variant of the GS King boards but with an internal
USB to SATA bridge and advanced audio features.

[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:32 +02:00
76bb027802 doc: boards: amlogic: update for Odroid HC4
Add documentation bits for the Odroid-HC4.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:28 +02:00
a4b553e31b ARM: amlogic: add support for Odroid-HC4 device
The Odroid-HC4 is a variant of the Odroid-C4 board but with a PCIe-SATA bridge
instead of the USB3 ports.

[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 13:45:28 +02:00
d565a35dbd distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot
The SCSI device can be a PCIe adapter, so run pcie enum if enabled.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 10:14:50 +02:00
f485e9dfa7 configs: meson64: add SCSI boot target
Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using
an on-board AHCI PCIe controller.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-10-07 10:14:50 +02:00
3da675a93b ARM: meson-axg: remove local USB nodes
Drop the local USB nodes after Linux 5.14 sync.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 10:14:50 +02:00
535dcb55a5 ARM: meson: keep HW order for MMC devices
Since Linux commmit [1], the order is fixed with aliases, in order to keep the
MMC device order, set it back to HW order in U-Boot dtsi files.

[1] ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 10:14:50 +02:00
c7c0858586 usb: dwc3: meson-gxl: add AXG compatible
Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs.

This adds it to the compatible list for this driver.

Reported-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Vyacheslav Bocharov <adeep@lexina.in>
2021-10-07 10:14:50 +02:00
2e8d47c641 ARM: meson: Sync Amlogic DT from Linux 5.14
Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"),
dt-bindings clock changes and new meson-g12b-gsking-x.dts,
meson-sm1-bananapi-m5 & odroid-hc4 boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 10:14:50 +02:00
d6c10360dc pci: pcie_dw_meson: fix usb fail when pci link fails to go up
On Amlogic A311D, when the PCIe link fails disabling the related clocks
makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC.

Mimic the Linux behavior by not considering a link failure a probe failure,
and continue even if the PCIe link is down.

Reported-by: Art Nikpal <email2tema@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07 10:14:50 +02:00
ea36f110f7 ARM: meson: Add S905Y2 SOC ID
Add the SOC ID for the S905Y2 to board info, see below for before/after
tested with a Radxa Zero board:

SoC:   Amlogic Meson G12A (Unknown) Revision 28:b (30:2)
SoC:   Amlogic Meson G12A (S905Y2) Revision 28:b (30:2)

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07 10:14:50 +02:00
1b2b52f294 riscv: ae350: enable Coherence Manager for ae350
If Coherence Manager were not set in the beginning,
u-boot-spl would sometimes fail to boot to u-boot proper.

Enable CM and I/D cache at the same time in harts_early_init

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-10-07 16:08:23 +08:00
b11f42015f configs: enable SYSRESET_SBI on qemu-riscvXX_smode_defconfig
There should be a platform compiled with the new driver.

Enable CONFIG_SYSRESET_SBI for all QEMU boards using SBI.

If you want to test the SBI sysreset driver, disable
CONFIG_SYSRESET_SYSCON.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07 16:08:23 +08:00
24ed5317d4 sysreset: provide SBI based sysreset driver
Provide sysreset driver using the SBI system reset extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>
2021-10-07 16:08:23 +08:00
09d7cc3369 cmd/sbi: use constants instead of numerical values
Use constants for extension IDs.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07 16:08:23 +08:00
3fbcfaa6f3 riscv: add missing SBI extension definitions
Add the System Reset Extension and the Hart State Management Extension
definitions.

Add missing RFENCE Extension enum values.

The SBI 0.1 extension constants are needed for the sbi command. Remove
an #ifdef.

Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07 16:08:23 +08:00
dd573b6b21 riscv: image: Use the first DRAM bank for bootm_low
bootm_low is used as a base address is used to allocate space for the
FDT blob, initrd, cmdline, etc. when booting Linux. Set the default
value for RISC-V to the start of the first DRAM bank, so platforms can
get their DRAM layout from the device tree, and do not need to define
CONFIG_SYS_SDRAM_BASE.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07 16:08:23 +08:00
0d625f400b riscv: Fix setting no-map in reserved memory nodes
The no-map property is wrongly skipped if a no-map reserved memory
node follows one without that property. Fix this by not remembering
the absence of a no-map property across loop iterations.

Fixes: d4ea649f17 ("riscv: Provide a mechanism to fix DT for reserved memory")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-10-07 16:08:23 +08:00
41f7be7334 serial: Add a debug console using the RISC-V SBI interface
The RISC-V SBI interface v0.1 provides a function for printing a
character to the console. Even though SBI v0.1 functions are deprecated,
the SBI console is quite useful for early debugging, because it works
without any dcache, memory, or MMIO access in S mode.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07 16:08:23 +08:00
425c08faa8 clk: k210: Try harder to get the best config
In some cases, the best config cannot be used because the VCO would be
out-of-spec. In these cases, we may need to try a worse combination of r/od
in order to find the best representable config. This also adds a few test
cases to catch this and other (possible) unlikely errors.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-07 16:08:23 +08:00
6e23c9f0c1 test: dm: k210: Reduce duplication in test cases
Having to copy-paste the same 3 lines makes adding new test cases
error-prone. Use a macro.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07 16:08:23 +08:00
4970874970 k210: clk: Refactor out_of_spec tests
Everything here sits in a while (true) loop. However, this introduces a
couple of layers of indentation. We can simplify the code by introducing a
single goto instead of using continue/break. This will also make adding
loops in the next patch easier.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07 16:08:22 +08:00
54d5d2d56b clk: k210: Fix checking if ulongs are less than 0
The PLL functions take ulong arguments for rate, but still check if that
rate is negative (which is never true). The correct way to handle this is
to use IS_ERR_VALUE (like is already done in k210_clk_set_rate). While
we're at it, we can move the error checking up into the caller of the pll
set/get rate functions.  This also protects our other calculations from
using bogus values for rate.

Fixes: 609bd60b94 ("clk: k210: Rewrite to remove CCF")
Reported-by: Coverity Scan <scan-admin@coverity.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07 16:08:22 +08:00
ea67f467a4 Merge branch '2021-10-06-assorted-improvements'
- Use better values for ACPI OEM_VERSION
- Assorted NAND related Kconifg migrations and another dependency fix
2021-10-06 13:46:31 -04:00
6115f1c4fe Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in
include/linux/mtd/omap_gpmc.h for valid ECC schemes.  Make which one we
will use be a choice statement, enumerating the ones which we have
implemented.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
871fd508fc Convert CONFIG_SYS_NAND_U_BOOT_LOCATIONS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_U_BOOT_LOCATIONS
   CONFIG_SYS_NAND_U_BOOT_OFFS

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
53f06134ed Convert CONFIG_NAND_FSL_ELBC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_FSL_ELBC
   CONFIG_NAND_FSL_IFC

Note that a number of PowerPC platforms had previously enabled
CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer
enable the option, reducing the size of a few functions.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
b2e25afabd Convert CONFIG_SYS_NAND_MAX_CHIPS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_MAX_CHIPS

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:24 -04:00
1cefed1e39 nand.h: Cleanup linux/mtd/rawnand.h usage
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward
declaration of struct nand_chip, so do that directly.  Then, include
<linux/mtd/rawnand.h> where required directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
c0ad62c5f7 Convert CONFIG_SYS_NAND_ONFI_DETECTION to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_ONFI_DETECTION

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
4884d829d7 Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_5_ADDR_CYCLE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
9d9f59dd0a Convert CONFIG_SYS_NAND_BAD_BLOCK_POS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_BAD_BLOCK_POS

In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS
as those are the only valid values.  Use LARGE as the default as no
in-tree boards use SMALL, but it is possible.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
606c377849 nand_spl_simple: Drop CONFIG_SYS_NAND_4_ADDR_CYCLE support
This code is unused, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
8db73ec106 Convert CONFIG_SYS_NAND_PAGE_COUNT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_PAGE_COUNT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
a0de075392 Convert CONFIG_SPL_NAND_LOAD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NAND_LOAD
   CONFIG_SYS_NAND_BLOCK_SIZE
   CONFIG_SYS_NAND_PAGE_SIZE
   CONFIG_SYS_NAND_OOBSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:16:23 -04:00
ccdc7cfbdc Convert CONFIG_NAND_LPC32XX_MLC to Kconfig
This converts the following to Kconfig:
   CONFIG_NAND_LPC32XX_MLC

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:15:14 -04:00
d73b9e67ed m53menlo: Switch to deriving CONFIG_SYS_NAND_PAGE_COUNT
Typically platforms will define CONFIG_SYS_NAND_PAGE_COUNT based on
CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE.  Switch to this
in preparation for migrating CONFIG_SYS_NAND namespace to Kconfig.

Cc: Marek Vasut <marex@denx.de>
Cc: Olaf Mandel <o.mandel@menlosystems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:15:14 -04:00
c25ca9060a rk3308: Remove unused NAND defines
These platforms do not currently enable NAND, remove these references.

Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06 09:15:14 -04:00
d4f05b3198 lib: rsa: fix dependency for SPL_RSA_VERIFY
SPL_RSA_VERIFY requires SPL_RSA to be enabled. Add correct
dependency.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-06 09:15:14 -04:00
a3423b3f23 acpi: Use U-Boot version for OEM_REVISION
OEM_REVISION is 32-bit unsigned number. It should be increased only when
changing software version. Therefore it should not depend on build time.

Change calculation to use U-Boot version numbers and set this revision
to date number.

Prior this change OEM_REVISION was calculated from build date and stored in
the same format.

After this change macro U_BOOT_BUILD_DATE is not used in other files so
remove it from global autogenerated files and also from Makefile.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-06 09:15:14 -04:00
7240e1b8f9 Merge branch '2021-10-05-general-updates'
- Assorted OPTEE cleanups
- pinctrl, gpio improvements, assorted livetree migrations
- Assorted pytest improvements
2021-10-05 17:16:23 -04:00
c3ef4550a2 reboot-mode: migrate uclass to livetree
Use dev_ function to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
455f2d15bf demo: migrate uclass to livetree
Use dev_ function to read the sides and colour to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
e2170c29ee remoteproc: migrate uclass to livetree
Use dev_ function to read the name and boolean to support a live tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
5f8cefb7b1 doc: test: Explain how to run pytests in parallel
Add documentation for this so people can try it out. At present it does
not fully work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
17d1fe1c44 test: Allow tpm2 tests to run in parallel
These tests currently run in a particular sequence, with some of them
depending on the actions of earlier tests.

Add a check for sandbox and reset to a known state at the start of each
test, so that all tests can run in parallel.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
ea3164eeb0 test: Allow hush tests to run in parallel
The -z tests don't really need to be part of the main set. Separate them
out so we can drop the test setup/cleans functions and thus run all tests
in parallel.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
cfb83f3666 test: Allow vboot tests to run in parallel
Update the tests to use separate working directories, so we can run them
in parallel. It also makes it possible to see the individual output files
after the tests have completed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
01e1e2a966 test/py: Check hashes produced by mkimage against known values
Target code and mkimage share the same hashing infrastructure. If one
is wrong, it's very likely that both are wrong in the same way. Thus
testing won't catch hash regressions. This already happened in
commit 92055e138f ("image: Drop if/elseif hash selection in
calculate_hash()"). None of the tests caught that CRC32 was broken.

Instead of testing hash_calculate() against itself, create a FIT with
containing a kernel with pre-calculated hashes. Then check the hashes
produced against the known good hashes.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
8a47982ed8 gpio: Factor out DT flag translation
The generic GPIO flags binding is shared across many drivers, some of
which need their own xlate function. Factor out the flag translation
code from gpio_xlate_offs_flags so it does not need to be duplicated.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
37c10bf7ef gpio: Verify validity of pin offsets from device trees
Translation of an OF GPIO specifier should fail if the pin offset is
larger than the number of pins in the GPIO bank.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
390ccffe07 gpio: Verify validity of pin offsets when looking up names
Translation of a pin name to a device+offset should fail if the offset
is larger than the number of pins in the GPIO bank.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:50:15 -04:00
c5b68ef8af arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee
This config is only used by three boards with this SOC. Most other
platforms derive this information from devicetree, and are unlikely
to ever need this config.

Moreover, it is confusing when Kconfig asks for this value under
"Support OPTEE images", but does not do anything with the value.
Move it to imx7 for those boards who still make use of it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05 08:50:14 -04:00
f6953047cb lib: optee: Remove CONFIG_OPTEE_LOAD_ADDR
This value is not used by u-boot, and it should not. The load address
of an OPTEE image is defined by said image. Either a uImage or a FIT
will have a defined load address and entry point. Those values are the
correct ones, not CONFIG_OPTEE_LOAD_ADDR.

Commit f25006b96e ("optee: Add CONFIG_OPTEE_LOAD_ADDR") justifies
this config by requiring its presence in u-boot's .config for other
images as part of a larger build, claiming it is "the best way".

This argument is not persuasive. U-boot's configuration is driven by
platform requirements, not the other way around. It seems more likely
that the argument is conflating tooling issues with Kconfig. Yocto and
buildroot have excellent mechanisms for defining values across the
board (pun intended). u-boot's Kconfig is the wrong place to do it.

Furthermore, it is not "best" for u-boot because it hardcodes a value
which is then not used. In fact the load address that u-boot uses is
the one derived from the OPTEE image.

Confused yet? I sure was. To prevent future confusion, remove
CONFIG_OPTEE_LOAD_ADDR.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05 08:47:13 -04:00
1ab968b2fb lib: optee: Remove CONFIG_OPTEE_TZDRAM_BASE
It is no longer used in u-boot. Information about the TZDRAM location
is usually available in the devicetree as "/reserved-memory/" nodes.
Because this isn't used, remove it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05 08:46:56 -04:00
26fc66709c lib: optee: Avoid CONFIG_TZDRAM_* in optee_verify_bootm_image()
The configs TZDRAM_BASE and TZDRAM_SIZE are expected to describe the
memory allocated to the OPTEE region. according to according to commit
c5a6e8bd00 ("optee: Add optee_verify_bootm_image()"). The TZDRAM is
with some limitations, described by "/reserved-memory" nodes in the
devicetree.

Consequently TZDRAM_BASE and TZDRAM_SIZE can point to imaginary
regions which have nothing to do with actual DRAM. They are not used
to configure the hardware or set up the Trust Zone Controller (TZC)
for OP-TEE -- the devicetree values are used instead.

When a valid OP-TEE image does not fall within the region described by
these configs, u-boot will refuse to load it. In fact, it mostly
serves to cause "bootm" to reject perfectly good OP-TEE images.

Ironically, someone has to correctly configure the devicetree for
TZDRAM, then go back and enter the same information in Kconfig for
"bootm". To remedy this, do not use TZDRAM_BASE and TZDRAM_SIZE in the
verification of OPTEE images.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05 08:46:23 -04:00
4f53ac2adb tee: add a stub for tee_find_device
Add stub for tee_find_device function when CONFIG_TEE is not activated
to simplify the caller code.

This patch allows to remove the CONFIG_IS_ENABLED(OPTEE) tests
for stm32 platform.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@inaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-05 08:44:48 -04:00
51827f9a8b lib: optee: remove the duplicate CONFIG_OPTEE
The configuration CONFIG_OPTEE is defined 2 times:
1- in lib/optee/Kconfig for support of OPTEE images loaded by bootm command
2- in drivers/tee/optee/Kconfig for support of OP-TEE driver.

It is abnormal to have the same CONFIG define for 2 purpose;
and it is difficult to managed correctly their dependencies.

Moreover CONFIG_SPL_OPTEE is defined in common/spl/Kconfig
to manage OPTEE image load in SPL.

This definition causes an issue with the macro CONFIG_IS_ENABLED(OPTEE)
to test the availability of the OP-TEE driver.

This patch cleans the configuration dependency with:
- CONFIG_OPTEE_IMAGE (renamed) => support of OP-TEE image in U-Boot
- CONFIG_SPL_OPTEE_IMAGE (renamed) => support of OP-TEE image in SPL
- CONFIG_OPTEE (same) => support of OP-TEE driver in U-Boot
- CONFIG_OPTEE_LIB (new) => support of OP-TEE library

After this patch, the macro have the correct behavior:
- CONFIG_IS_ENABLED(OPTEE_IMAGE) => Load of OP-TEE image is supported
- CONFIG_IS_ENABLED(OPTEE) => OP-TEE driver is supported

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-05 08:44:48 -04:00
fd921d2037 pinctrl: single: Add request() api
Add pinctrl_ops->request api to configure pctrl
pad register in gpio mode.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05 08:43:03 -04:00
62f86c6a01 pinctrl: single: Parse gpio details from dt
Parse different gpio properties from dt as part of probe
function. This detail is required to enable pinctrl pad
later when gpio lines are requested.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2021-10-05 08:43:03 -04:00
50c84208ad Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-04 11:28:16 -04:00
e17cbdd050 Merge branch '2021-10-03-platform-updates' into next
- TI K3 updates, add IOT2050 platform
- rtc rx8025 updates, PCI fixes
2021-10-03 19:31:04 -04:00
26fa063c6e iot2050: Enable watchdog support, but do not auto-start it
This allows to use the watchdog in custom scripts but does not enforce
that the OS has to support it as well.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-10-03 14:40:56 -04:00
f3efb1d106 watchdog: rti_wdt: Add support for loading firmware
To avoid the need of extra boot scripting on AM65x for loading a
watchdog firmware, add the required rproc init and loading logic for the
first R5F core to the watchdog start handler. In case the R5F cluster is
in lock-step mode, also initialize the second core. The firmware itself
is embedded into U-Boot binary to ease access to it and ensure it is
properly hashed in case of secure boot.

One possible firmware source is https://github.com/siemens/k3-rti-wdt.

The board is responsible for providing the firmware as additional
loadable via the U-Boot fit image. The driver will pick up its location
from /fit-images/k3-rti-wdt-firmware then.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-10-03 14:40:56 -04:00
a2db09e269 board: siemens: Add support for SIMATIC IOT2050 devices
This adds support for the IOT2050 Basic and Advanced devices. The Basic
used the dual-core AM6528 GP processor, the Advanced one the AM6548 HS
quad-core version.

Both variants are booted via a Siemens-provided FSBL that runs on the R5
cores. Consequently, U-Boot support is targeting the A53 cores. U-Boot
SPL, ATF and TEE have to reside in SPI flash.

Full integration into a bootable image can be found on
https://github.com/siemens/meta-iot2050

Based on original board support by Le Jin, Gao Nian and Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-10-03 14:40:56 -04:00
c3a879510a arm: dts: Add IOT2050 device tree files
Prepares for the addition of the IOT2050 board which is based on the TI
AM65x. The board comes in four variants, Basic and Advanced, each as
product generation 1 (SR1.0) and 2 (SR2.x), so there are separate dts
files needed. Furthermore, the SPL has its own device tree.

Based on original board support by Le Jin, Gao Nian and Chao Zeng.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-10-03 14:40:56 -04:00
903d8ede9a pci: pcie_layerscape_fixup_common: lx2_board_fix_fdt can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
0cab66c5c4 pci: pcie_layerscape_fixup_common: include fdt_support.h for ft_pci_setup
The function prototype for ft_pci_setup is inside fdt_support.h, we need
to include that header.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
c67930ef3e pci: layerscape: ls_pcie_conf_address can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
8101a40bf4 pci: _dm_pci_phys_to_bus can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
1512ac17e5 pci: pci_read_config can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
f98aa78ee4 pci: pci_write_config can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
577fd581a7 pci: pciinfo_header can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
a95f8ee911 pci: pci_header_show can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
f5164f6b25 pci: pci_bar_show can be static
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
7f76084e2b pci: include pci_internal.h inside pci_auto.c
To avoid a build warning with W=1, provide a function prototype for
dm_pciauto_prescan_setup_bridge, which is a non-static function whose
definition is inside pci_auto.c.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
2649f69f13 pci: provide prototype for pci_skip_dev outside of #if defined(CONFIG_DM_PCI_COMPAT)
The weak definition of pci_skip_dev from drivers/pci/pci_common.c is not
under CONFIG_DM_PCI_COMPAT, and that definition needs a previous
function prototype declaration to avoid W=1 build warnings.

That prototype is not available due to it being under CONFIG_DM_PCI_COMPAT,
so move it outside of that preprocessor block.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-03 14:40:56 -04:00
701c04f331 rtc: rx8025: revise single register write to use offset
Writing of individual registers was not functioning
correctly as a 0 'offset' byte under DM-managed
I2C was being appended in front of register we
wanted to access.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
771fc0c079 rtc: rx8025: set date in a single i2c transaction
The RX8025/RX8035 does not like having it's time registers
set byte-by-byte in separate I2C transactions.

From the note at the top of the file, it appears
target-dependent workarounds have been used in the
past for this.

Resolve this by setting the time registers in a single
I2C transaction.

As part of this, also ensure the '24/12' flag in the RTC
is reset before writing the date (instead of after), otherwise
the RX8035 will clear the seconds and minutes registers.

Tested on Traverse Ten64 (NXP LS1088A) with RX8035.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
9ca4ae2d2a rtc: rx8025: add support for EPSON RX8035.
The RX8035 is a newer model from EPSON which is
very similar in operation to the RX8025.

The changes mirror similar ones that will be
in Linux 5.15:
https://lore.kernel.org/all/20210709044518.28769-2-matt@traverse.com.au/

The UBOOT_DRIVER ID has also been corrected, previously
it declared itself as rx8010sj_rtc which is a different driver.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
152ef916f8 rtc: rx8025: drop non-DM support
A search of the tree showed there is only one user
of this driver (soon to be two) - board/socrates

The second user will be the Traverse Ten64 board.

Both these boards have DM_RTC.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
8e1ebdcfd7 ARM: dts: ast2600: Make WDT by default disabled
The WDT devices described in the general .dtsi file
should be marked as "disabled" by default.

A WDT should be then enabled in the board specific
.dts file on demands.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-10-03 11:59:22 -04:00
fa09b12dc5 arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14
This resyncs the dts files for all of the currently in-tree K3
platforms, along with relevant bindings, with the v5.14 Linux Kernel
release.  Of note are that the main-navss/mcu-navss nodes were renamed
to main_navss / mcu_navss and so the u-boot.dtsi files needed to be
updated to match.

Tested on j721e_evm and am65x_evm.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-03 11:59:22 -04:00
4698bb8c94 dt-bindings: pinctrl: k3: Synchronize with v5.14 kernel
Synchronize with the upstream version as of v5.14 kernel tag

Signed-off-by: Nishanth Menon <nm@ti.com>
2021-10-03 11:59:22 -04:00
67e6c540a0 Merge branch '2021-10-01-assorted-removal-and-migration' into next
- Remove the last non-CONFIG_DM boards, and their related unused code.
- Finish a few partial migrations to Kconfig, and remove some redundant
  serial related code.
2021-10-02 15:47:28 -04:00
561d1d3fba serial: Remove extraneous SYS_MALLOC_F check
We enforce that DM_SERIAL will have SYS_MALLOC_F enabled and so
SYS_MALLOC_F_LEN will have a value.  Remove the build-time check.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:19 -04:00
d92cb66236 serial: Use the default CONFIG_SYS_BAUDRATE_TABLE in more platforms
A number of platforms are still defining CONFIG_SYS_BAUDRATE_TABLE to
the fallback default of "{ 9600, 19200, 38400, 57600, 115200 }", but
with varying whitespace, or were introduced after the default fallback
was added.  Use the default table here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:19 -04:00
62efcba5d5 Convert CONFIG_BAUDRATE to Kconfig
This converts the following to Kconfig:
   CONFIG_BAUDRATE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:19 -04:00
cc1386b0d3 kgdb: Remove unused serial related options
We have a few CONFIG options for KGDB that are not referenced, remove
them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:19 -04:00
fae2ea5951 ppc: Remove MPC8349EMDS board and ARCH_MPC8349 support
This board has not been converted to CONFIG_DM by the deadline.
Remove it.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:19 -04:00
4987658be5 arm: Remove bg0900 board
This board has not been converted to CONFIG_DM by the deadline.
Remove it.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:19 -04:00
8ba59608dc arm: Remove zmx25 board and ARCH_MX25
This board has not been converted to CONFIG_DM by the deadline.
Remove it.  As this is the last ARCH_MX25 platform, remove those
references as well.

Cc: Matthias Weisser <weisserm@arcor.de>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 21:08:18 -04:00
d9be8606bb arm: Remove aspenite board
This board has not been converted to CONFIG_DM by the deadline.
Remove it.  As this is the last armada100 platform, remove that support
as well.

Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-01 12:10:09 -04:00
14b38cb0c2 arm: Remove flea3 board
This board has not been converted to CONFIG_DM by the deadline.
Remove it.  As this is the last mx35 platform, remove that support as
well.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2021-10-01 12:08:19 -04:00
570320da3b Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next
- kwboot higher baudrate (Pali & Marek)
2021-10-01 09:15:48 -04:00
6c96332441 MAINTAINERS: Add entry for kwbimage / kwboot tools
Add entry for these tools with Marek, Pali and Stefan as maintainers.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-01 11:07:13 +02:00
d1d7174012 doc/kwboot.1: Update man page
Update man page for the kwboot utility.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
cf8c9321a6 tools: kwboot: Add Pali and Marek as authors
Add Pali and Marek as another authors of the kwboot utility.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
b843aedeb2 tools: kwboot: Update file header
Mention all supported platforms in file header.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
b4eea8f9b0 tools: kwboot: Avoid code repetition in kwboot_img_patch()
Change kwboot_img_patch() to avoid code repetition of setting errno to
EINVAL.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
5fa04f47d7 tools: kwboot: Cosmetic fix
Add spaces around the | operator.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
911515b339 tools: kwboot: Disable non-blocking mode
The kwboot utility does not handle EAGAIN / EBUSY errors, it expects
blocking mode on tty - it uses select() to check if data is available.

Disable non-blocking mode by clearing O_NDELAY flag which was set by
open().

We can't just take O_NDELAY from open(), because it is required there
until the CLOCAL flag is set on the tty.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-01 11:07:13 +02:00
24a471bc4b tools: kwboot: Disable tty interbyte timeout
Function kwboot_tty_recv() has its own handling of read timeout, we
don't need to do set it in tty settings.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
c704e0e1df tools: kwboot: Fix initializing tty device
Retrieve current terminal settings via tcgetattr(), set to raw mode with
cfmakeraw(), enable receiver via CREAD and ignore modem control lines
via CLOCAL.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
99a3d02370 tools: kwboot: Check whether baudrate was set to requested value
The tcsetattr() function can return 0 even if baudrate was not changed.
Check whether baudrate was changed to requested value, and in case of
arbitrary baudrate, check whether the set value is within 3% tolerance.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
93b55636b0 tools: kwboot: Allow any baudrate on Linux
The A38x platform supports more baudrates than just those defined by the
Bn constants, and some of them are higher than the highest Bn baudrate
(the highest is 4 MBd while A38x support 5.15 MBd).

On Linux, add support for arbitrary baudrates. (Since there is no
standard POSIX API to specify arbitrary baudrate for a tty device, this
change is Linux-specific.)

We need to use raw TCGETS2/TCSETS2 or TCGETS/TCSETS ioctls with the
BOTHER flag in struct termios2/termios, defined in Linux headers
<asm/ioctls.h> (included by <sys/ioctl.h>) and <asm/termbits.h>. Since
these headers conflict with glibc's header file <termios.h>, it is not
possible to use libc's termios functions and we need to reimplement them
via ioctl() calls.

Note that the Bnnn constants from <termios.h> need not be compatible
with Bnnn constants from <asm/termbits.h>.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ termios macros rewritten to static inline functions (for type control)
  and moved to tools/termios_linux.h ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
ca272041c0 tools: kwboot: Support higher baudrates when booting via UART
Add support for uploading the boot image (the data part only) at higher
baudrate than the standard one.

The kwboot utility already has -B option, but choosing other baudrate
than the standard one (115200 Bd) can only work for debug mode, not for
booting the device. The BootROM for kwboot supported platforms (Orion,
Kirkwood, Dove, Discovery, AXP, A37x, A38x, A39x) cannot change the
baudrate when uploading boot image via the Xmodem protocol, nor can it
be configured via strapping pins.

So instead we add this support by injecting baudrate changing code into
the kwbimage v1 header as a new optional binary extension. This code is
executed by BootROM after it receives the whole header. The code sends
the magic string "$baudratechange\0" just before changing the baudrate
to let kwboot know that it should also change it. This is because the
injected code is run as the last binary extension, and we do not want
to loose possible output from other possible binary extensions that
came before it (in most cases this is U-Boot SPL).

We also inject the code before the payload (the data part of the image),
to change the baudrate back to the standard value, in case the payload
does not reset UART.

This change improves boot time via UART significantly (depending on the
chosen baudrate), which is very useful when debugging.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ major refactor ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
5c8f812ca9 tools: kwboot: Explicitly check against size of struct main_hdr_v1
Explicitly check the image size against size of struct main_hdr_v1.
This way the check is more readable, since the `hdrsz` variable
may semantically contain another value.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
04ced0296e tools: kwboot: Round up header size to 128 B when patching
The beginning of image data must be sent in a separate xmodem block;
the block must not contain end of header with the beginning of data.

Therefore we need to ensure that the image header size is a multiple of
xmodem block size (which is 128 B).

Read the file into a malloc()ed buffer of enough size instead of
mmap()ing it. (If we are going to move the data, most of the pages will
be dirty anyway.) Then move the payload if header size needs to be
increased.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
8010f4ffc5 tools: kwbimage: Update comments describing kwbimage v1 structures
These structures are relevant for several other platforms, mention them
all.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
fe2fd73d55 tools: kwbimage: Refactor kwbimage header size determination
Add functions kwbheader_size() and kwbheader_size_for_csum().

Refactor code determining header size to use these functions.

Refactor header checksum determining function.

Remove stuff that is not needed anymore.

This simplifies the code a little and fixes one instance of validating
header size meant for checksum instead of whole header size.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
acb0b38d6a tools: kwbimage: Refactor image_version()
Rename this function to kwbimage_version() and don't cast argument if
not needed.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
f2c644e0b8 tools: kwboot: Patch destination address to DDR area for SPI image
SPI/NOR kwbimage may have destination address set to 0xFFFFFFFF, which
means that the image is not downloaded to DDR but rather it is executed
directly from SPI/NOR. In this case execution address is set to SPI/NOR
area.

When patching image to UART type, change destination and execution
addresses from SPI/NOR XIP area to DDR area 0x00800000 (which is default
for A38x).

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
792e423550 tools: kwboot: Patch source address in image header
Some image types have source address in non-bytes unit; for example for
SATA images, it is in 512 B units.

We need to multiply by unit size when patching image type to UART.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
550c93085a tools: kwboot: Don't patch image header if signed
It is not possible to modify image with secure header due to
cryptographic signature.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-01 11:07:13 +02:00
732c930b21 tools: kwbimage: Simplify iteration over version 1 optional headers
Create macro
  for_each_opt_hdr_v1
and functions
  opt_hdr_v1_size(),
  opt_hdr_v1_valid_size(),
  opt_hdr_v1_ext(),
  opt_hdr_v1_first() and
  opt_hdr_v1_next()
to simplify iteration over version 1 optional headers.

This prevents ugly code repetition and makes it nicer to read.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-01 11:07:13 +02:00
ddc04fac90 tools: kwboot: Always call kwboot_img_patch_hdr()
The kwboot_img_patch_hdr() function already decides if header patching
is needed. Always call this function and deprecate the unneeded command
line option `-p`.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
9cdc264e2c tools: kwboot: Properly finish xmodem transfer
After kwboot sends EOT, BootROM sends back ACK. Add code for handling
this and retry sending EOT on error.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
819cd3281d tools: kwboot: Prevent waiting indefinitely if no xmodem reply is received
Currently if BootROM fails to respond with ACK/NAK to a xmodem block, we
will be waiting indefinitely for such response.

Make sure that we only wait at most 1 second (blk_rsp_timeo) for ACK/NAK
for each block in case non-xmodem text output is not being expected.
Interpret this timeout expiration as NAK, to try to send the block
again.

On the other hand, if timeout expires without ACK while some non-xmodem
output was already received (DDR training output, for example), we know
that the block was received, since the code is being executed, so in
this case exit with ETIMEDOUT.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
12df7b790f tools: kwboot: Allow greater timeout when executing header code
When executing header code (which contains U-Boot SPL in most cases),
wait 10s after every non-xmodem character received (i.e. printed by
U-Boot SPL) before timing out.

Sometimes DDR training, which runs in SPL, may be slow.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
2e81b3ab0e tools: kwboot: Print new line after SPL output
There is no separation between output from the code from binary header
(U-Boot SPL in most cases) and subsequent kwboot output.

Print '\n' to make distinguishing these two easier.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
48b3ea66ca tools: kwboot: Allow non-xmodem text output from BootROM only in a specific case
When sending image header / image data, BootROM does not send any
non-xmodem text output. We should therefore interpret unknown bytes in
the xmodem protocol as errors and resend current packet. This should
improve the transfer in case there are errors on the UART line.

Text output from BootROM may only happen after whole image header is
sent and before ACK for the last packet of image header is received.
In this case BootROM may execute code from the image, which may interact
with UART (U-Boot SPL, for example, prints stuff on UART).

Print received non-xmodem output from BootROM only in this case.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored & simplified ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
408ea6138b tools: kwboot: Use a function to check whether received byte is a Xmodem reply
This is a non-functional change that should make the code more readable.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
2ef87f75d1 tools: kwboot: Split sending image into header and data stages
This change is required to implement other features in kwboot.

Split sending header and data parts of the image into two stages.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
d5ba8dbd75 tools: kwboot: Print newline on error when progress was not completed
When progress was not completed, current terminal position is in progress
bar. So print newline before printing error message to make error message
more readable.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
5a1f8cbe86 tools: kwboot: Fix printing progress
Ensure that `pos` is still in range up to the `width` so printing 100%
works also for bigger images. After printing 100% progress reset it to
zero, so that next progressbar can be started.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
d8cc851dd1 tools: kwboot: Fix comparison of integers with different size
The compiler complains that we are comparing int with size_t when
compiled with -W.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
c5d666aab3 tools: kwboot: Fix return type of kwboot_xm_makeblock() function
Function kwboot_xm_makeblock() always returns length of xmodem block. It
is always non-negative and calculated from variable with size_t type. Set
return type of this function to size_t and remove dead code which checks
for negative value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
00a1deed1c tools: kwboot: Fix kwboot_xm_sendblock() function when kwboot_tty_recv() fails
When kwboot_tty_recv() fails or times out, it does not set the `c`
variable to NAK. The variable is then compared, while it holds either
an undefined value or a value from previous iteration. Set `c` to NAK so
that the other side will try to resend current block, and remove the
now unnecessary break.

In other failure cases return immediately.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
a050a862a7 tools: kwboot: Print version information header
Print kwboot's (U-Boot's) version when printing usage.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
e453bb42ce tools: kwboot: Refactor and fix writing buffer
There are 3 instances in kwboot.c where we need to write() a given
buffer whole (iteratively writing until all data are written), and 2 of
those instances are wrong, for they do not increment the buffer pointer.

Refactor the code into a new function kwboot_write() where it is fixed.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
46237e63d5 tools: kwboot: Make the quit sequence buffer const
This buffer is never written to. Make it const.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
f30cb0d3b9 tools: kwboot: Fix buffer overflow in kwboot_terminal()
The `in` variable is set to -1 in kwboot_terminal() if stdin is not a
tty. In this case we should not look whether -1 is set in fd_set, for it
can lead to a buffer overflow, which can be reproduced with
  echo "xyz" | ./tools/kwboot -t /dev/ttyUSB0

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
3b5da64edf tools: kwbimage: Fix printf format warning
On 32-bit ARM the compiler complains:
  tools/kwbimage.c:547: warning: format ‘%lu’ expects argument of type
                                 ‘long unsigned int’, but argument 4 has
		                 type ‘unsigned int’

Fix this by using %zu instead of %lu format specifier.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-01 11:07:13 +02:00
7fde64c004 Azure/GitLab CI: Update docker image
Rebuild our current docker image so that ca-certificates will be updated
and Let's Encrypt issued certificates will work again.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-30 11:36:10 -04:00
8bef036836 Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.01-rc1

zynq:
- Enable capsule update for qspi and mmc
- Update zed DT qspi compatible string

zynqmp:
- Add missing modeboot for EMMC
- Add missing nand DT properties
- List all eeproms for SC on vck190
- Add vck190 SC psu_init

clk:
- Handle only GATE type clock for Versal

watchdog:
- Update versal driver to handle system reset
2021-09-30 11:29:41 -04:00
c8988efc88 Merge branch '2021-09-30-whitespace-cleanups' into next
- A large number of whitespace cleanups from Wolfgang
2021-09-30 10:26:43 -04:00
0cf207ec01 WS cleanup: remove SPACE(s) followed by TAB
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 09:08:16 -04:00
0a50b3c97b WS cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-30 08:08:56 -04:00
c72231d272 WS cleanup: remove excessive empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
66356b4c06 WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
dced079c53 watchdog: versal: Add support for expire now
Wdt expire command makes the wdt to count least possible ticks(1)
and expires immediately. Add expire_now option to the xlnx_wwdt_ops
and implement it by calling xlnx_wwdt_start() with minimum possible
count(1).

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1632808919-8600-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-30 12:30:38 +02:00
8c287ed8c3 watchdog: versal: Add support for basic window watchdog
Existing driver uses generic watchdog mode which generates a signal to
PLM firmware, but the signal cannot be used to reset the system.

Change driver to use window watchdog basic mode. This window watchdog mode
generates a signal to PLM firmware which decides what action to take upon
expiry of watchdog.

Timeout value for xlnx_wwdt_start will come in milli seconds from wdt
framework. Make changes to load count value accordingly.

Add checks before loading the timer for min and max possible values.

Fix authour email id of Ashok Reddy Soma to long email id.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1632808919-8600-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-30 12:30:33 +02:00
1db1acbb84 clk: versal: Enable only GATE type clocks
Clocks should be enabled or disabled only if they are of GATE type
clocks. If they are not of GATE type clocks, don't touch them.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1632808827-6109-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-30 12:30:28 +02:00
0285d75a93 arm64: zynqmp: Add psu_init_gpl for vck190/vmk180 SC
Add psu_init_gpl file for getting SPL to work directly from the tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6675723ad52d29982e62c6ca4832ed18688076cb.1632488774.git.michal.simek@xilinx.com
2021-09-30 12:30:14 +02:00
876b854a22 arm64: zynqmp: Define all eeproms for SC on vck190
There are multiple eeproms on vck190 that's why list all of them.
FMC eeproms are present only when fmcs are plugged.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/96902661e3ab9e20b59d626e6129ccf6f3317c4d.1632488695.git.michal.simek@xilinx.com
2021-09-30 12:29:49 +02:00
3482ed6faf arm: zynq: Use s25fl256s1 compatible string on zedboard
Use compatible string which is listed in the Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/49bc6b056b0f6f69d4d90351dc875a66b7e37619.1631715748.git.michal.simek@xilinx.com
2021-09-30 12:29:08 +02:00
1a94d0554d arm64: zynqmp: Add device tree properties for nand flash
Add ecc strength & ecc step size properties for nand flash devices,
when operating in software-ecc mode.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/866f4b888129ff0213df9cdb51b5529b199fb7b7.1631713594.git.michal.simek@xilinx.com
2021-09-30 12:28:34 +02:00
5d498a12b6 xilinx: zynqmp: Set modeboot env variable in eMMC bootmode
Set environment variable modeboot to "emmcboot" in case of eMMC boot
mode.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c61231e4b8c6118862dfc82e923211637bf29991.1631688736.git.michal.simek@xilinx.com
2021-09-30 12:27:54 +02:00
c67fecd212 ARM: zynq: Enable capsule update for qspi and mmc
Generate dfu_alt_info setup at runtime for capsule update.
Enabling this feature will help with upgrading boards without remembering
what is where.

The similar change was done for ZynqMP by commit b86f43de0b ("xilinx:
zynqmp: Add support for runtime dfu_alt_info setup").
Code needs to be enabled by CONFIG_SET_DFU_ALT_INFO.

And also enable capsule on disk for RAW firmware images with efidebug
command.

Two indexes are supported for SPL flow. Images can be generated like:
./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin
./tools/mkeficapsule --raw u-boot.img --index 2 capsule2.bin

Then place them to SD card and load them:
load mmc 0 10000000 capsule1.bin && efidebug capsule update -v 10000000
load mmc 0 10000000 capsule2.bin && efidebug capsule update -v 10000000

FSBL flow will also work where only index 1 capsule is used. There
should be enough space for using boot.bin with bitstream too.

Zynq also support multiple boot locations in SPI or MMC but it is not wired
by this patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bea5fc75a87a5971f118b46bab4aa7ca39a629c6.1630061610.git.michal.simek@xilinx.com
2021-09-30 12:26:25 +02:00
6eecaf5d0f Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net into next
- Fix some non-NULL terminated strings in the networking subsystem
- net: tsec: Mark tsec_get_interface as __maybe_unused
2021-09-29 07:58:20 -04:00
ba17871884 Merge branch '2021-09-25-TI-platform-updates' into next
- Start moving some TI board docs to rST
- Assorted TI-specific Kconfig migrations and namespace cleanups.  This
  also allows for some code cleanups.
2021-09-28 19:18:56 -04:00
68545c1ac1 Merge tag '20210928-for-next' of https://source.denx.de/u-boot/custodians/u-boot-i2c into next
i2c changes for 20210928-for-next

- i2c: rcar_i2c: Enable configuring SCL rise and fall times
- i2c: mvtwsi: Add support for DM clocks and resets
- mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface
2021-09-28 16:36:25 -04:00
4df9f5e39f scripts: ensure the cocci script for miiphy_register does not leak the MDIO bus
When mdio_register fails, mdio_free should be called on the mdiodev that
was previously allocated with mdio_alloc.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-09-28 18:50:57 +03:00
19ef59f1e0 arch: powerpc: mpc85xx: free MDIO bus if mdio_register fails
If mdio_register fails, it is nice to not leave behind dangling
allocated memory.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:57 +03:00
4fdc7e3530 net: dsa: ensure port names are NULL-terminated after DSA_PORT_NAME_LENGTH truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass DSA_PORT_NAME_LENGTH - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:57 +03:00
c9131fc72b net: dsa: felix: check return code of mdio_alloc and mdio_register
These functions can return errors, it's best to catch them and trigger
the driver unwind code path.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:57 +03:00
81386ed405 scripts: ensure the cocci script for miiphy_register does not leave NULL-unterminated strings
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-09-28 18:50:57 +03:00
bf35c3121a net: mdio-uclass: rewrite dm_mdio_post_probe using strlcpy
dm_mdio_post_probe used to be vulnerable after truncation, but has been
patched by commit 398e7512d8 ("net: Fix Covarity Defect 244093").
Nonetheless, we can use strlcpy like the rest of the code base now,
which yields the same result.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:57 +03:00
977b53f0b3 net: qe: uec: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
fe04172479 net: davinci_emac: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
30c40398b6 net: smc911x: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
7616240b4d net: sh_eth: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
77003e532c net: mvgbe: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
47aa50d7db net: dsa: felix: ensure mii_bus->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
56b9caed59 net: mpc8xx_fec: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
73894f6938 net: macb: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
6b96ca6c00 net: lpc32xx: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
1a5d3e9a1e net: ftmac110: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
e6324f4384 net: mcdmafec: ensure bus->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
f848b4804e net: enetc: ensure imdio.name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
9be5fa4d57 net: ep93xx: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
e7444a199a net: eepro100: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
5f1d1a1940 net: bcm-sf2: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
05b7cb5ef1 net: at91_emac: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
6209788da8 net: armada100_fec: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
61efbece57 board: gdsys: a38x: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
fca315a382 arch: powerpc: mpc85xx: ensure mdiodev->name is NULL terminated after MDIO_NAME_LEN truncation
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.

One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.

The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
bc4e98282e net: tsec: read the phy-mode property as fallback to phy-connection-type
The two should be equivalent, but at the moment some platforms
(ls1021a-tsn.dts) use phy-mode only, which is not parsed.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
d883a5fb52 net: tsec: only call tsec_get_interface as fallback to DT-specified PHY mode
Currently the init_phy function may overwrite the priv->interface
property, since it calls tsec_get_interface which tries to determine it
dynamically based on default register values in ECNTRL.

Let's do that only if phy-connection-type happens to not be defined in
the device tree.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
9bf2b962ff net: dsa: felix: remove "xgmii" phy-mode
The felix driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
f8ca46e561 net: enetc: remove support for "xgmii" phy-mode
The enetc driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
7c2d5d1642 net: freescale: replace usage of phy-mode = "sgmii-2500" with "2500base-x"
After the discussion here:
https://lore.kernel.org/netdev/20210603143453.if7hgifupx5k433b@pali/

which resulted in this patch:
https://patchwork.kernel.org/project/netdevbpf/patch/20210704134325.24842-1-pali@kernel.org/

and many other discussions before it, notably:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/1512016235-15909-1-git-send-email-Bhaskar.Upadhaya@nxp.com/

it became apparent that nobody really knows what "SGMII 2500" is.
Certainly, Freescale/NXP hardware engineers name this protocol
"SGMII 2500" in the reference manuals, but the PCS devices do not
support any "SGMII" specific features when operating at the speed of
2500 Mbps, no in-band autoneg and no speed change via symbol replication
. So that leaves a fixed speed of 2500 Mbps using a coding of 8b/10b
with a SERDES lane frequency of 3.125 GHz. In fact, "SGMII 2500 without
in-band autoneg and at a fixed speed" is indistinguishable from
"2500base-x without in-band autoneg", which is precisely what these NXP
devices support.

So it just appears that "SGMII 2500" is an unclear name with no clear
definition that stuck.

As such, in the Linux kernel, the drivers which use this SERDES protocol
use the 2500base-x phy-mode.

This patch converts U-Boot to use 2500base-x too, or at least, as much
as it can.

Note that I would have really liked to delete PHY_INTERFACE_MODE_SGMII_2500
completely, but the mvpp2 driver seems to even distinguish between SGMII
2500 and 2500base-X. Namely, it enables in-band autoneg for one but not
the other, and forces flow control for one but not the other. This goes
back to the idea that maybe 2500base-X is a fiber protocol and SGMII-2500
is an MII protocol (connects a MAC to a PHY such as Aquantia), but the
two are practically indistinguishable through everything except use case.

NXP devices can support both use cases through an identical configuration,
for example RX flow control can be unconditionally enabled in order to
support rate adaptation performed by an Aquantia PHY. At least I can
find no indication in online documents published by Cisco which would
point towards "SGMII-2500" being an actual standard with an actual
definition, so I cannot say "yes, NXP devices support it".

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
77b11f7604 net: replace the "xfi" phy-mode with "10gbase-r"
As part of the effort of making U-Boot work with the same device tree as
Linux, there is an issue with the "xfi" phy-mode. To be precise, in
Linux there was a discussion (for those who have time to read:
https://lore.kernel.org/netdev/1576768881-24971-2-git-send-email-madalin.bucur@oss.nxp.com/)

which led to a patch:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c114574ebfdf42f826776f717c8056a00fa94881

TL;DR: "xfi" was standardized in Linux as "10gbase-r".

This patch changes the relevant occurrences in U-Boot to use "10gbase-r"
instead of "xfi" wherever applicable.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
a17776be1d net: phy: genphy_init can be static
To avoid a warning with W=1 about this function not having a previous
prototype, declare it as static, because it is not used outside of this
translation module.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
5ecdf0a5a4 net: dsa: remove unused variables
"dev" and "dsa_pdata" are unused inside dsa_port_of_to_pdata.

"dsa_priv" is unused inside dsa_port_probe.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
5cc283b781 net: dsa: pass CPU port fixed PHY to .port_disable
While adding the logic for DSA to register a fixed-link PHY for the CPU
port, I forgot to pass it to the .port_disable method too, just
.port_enable.

Bug had no impact for felix_switch.c, due to the phy argument not being
used, but ksz9477.c does use it => NULL pointer dereference.

Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
66fd01fe59 net: update NXP copyright text
NXP Legal insists that the following are not fine:

- Saying "NXP Semiconductors" instead of "NXP", since the company's
  registered name is "NXP"

- Putting a "(c)" sign in the copyright string

- Putting a comma in the copyright string

The only accepted copyright string format is "Copyright <year-range> NXP".

This patch changes the copyright headers in the networking files that
were sent by me, or derived from code sent by me.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:56 +03:00
4f8f801c97 net: dsa: felix: propagate the error code from phy_startup()
Make sure that the link status returned by phy_startup() is propagated
to the .start() method of struct eth_ops.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
2021-09-28 18:50:56 +03:00
4f5bd8d68b net: dsa: felix: call phy_config at .port_probe() time
It is an unfortunate reality that some PHY settings done by U-Boot
persist even after the PHY is reset and taken over by Linux, and even
more unfortunate that Linux has come to depend on things being set in a
certain way.

For example, on the NXP LS1028A-RDB, the felix switch ports are
connected to a VSC8514 QSGMII PHY. Between the switch port PCS and the
PHY, the U-Boot drivers enable in-band auto-negotiation which makes the
copper-side negotiated speed and duplex be transmitted from the PHY to
the MAC automatically.

The PHY driver portion that does this is in vsc8514_config():

	/* Enable Serdes Auto-negotiation */
	phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
		  PHY_EXT_PAGE_ACCESS_EXTENDED3);
	val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON);
	val = val | MIIM_VSC8574_MAC_SERDES_ANEG;
	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON, val);

The point is that in-band autoneg should be turned on in both the PHY
and the MAC, or off in both the PHY and the MAC, otherwise the QSGMII
link will be broken.

And because phy_config() is currently called at .port_enable() time, the
result is that ports on which traffic has been sent in U-Boot will have
in-band autoneg enabled, and the rest won't.

It can be argued that the Linux kernel should not assume one way or
another and just reinitialize everything according to what it expects,
and that is completely fair. In fact, I've already started an attempt to
remove this dependency, although admittedly I am making slow progress at
it:
https://patchwork.kernel.org/project/netdevbpf/cover/20210212172341.3489046-1-olteanv@gmail.com/

Nonetheless, the sad reality is that NXP also has, apart from kernel
drivers, some user space networking (DPDK), and for some reason, the
expectation there is that somebody else initializes the PHYs. The kernel
can't do it because the device ownership doesn't belong to the kernel,
so what remains is for the bootloader to do it (especially since other
drivers generally call phy_config() at probe time). This is a really
weak guarantee that might break at any time, but apparently that is
enough for some.

Since initializing the ports and PHYs at probe time does not break
anything, we can just do that.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
2021-09-28 18:50:56 +03:00
4b46e83885 net: dsa: introduce a .port_probe() method in struct dsa_ops
Some drivers might want to execute code for each port at probe time, as
opposed to executing code just-in-time for the port selected for
networking.

To cater to that use case, introduce a .port_probe() callback method
into the DSA switch operations which is called for each available port,
at the end of dsa_port_probe().

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
2021-09-28 18:50:56 +03:00
5eee5ab916 net: dsa: refactor the code to set the port MAC address into a dedicated function
This snippet of code has a bothering "if (...) return 0" in it which
assumes it is the last piece of code running in dsa_port_probe().

This makes it difficult to add further code at the end of dsa_port_probe()
which does not depend on MAC address stuff.

So move the code to a dedicated function which returns void and let the
code flow through.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
2021-09-28 18:50:55 +03:00
f4b712b840 net: dsa: use "err" instead of "ret" in dsa_port_probe
DM DSA uses "err" for error code values, so use this consistently.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
2021-09-28 18:50:55 +03:00
351b6bb422 net: dsa: felix: felix_init() can be static
No one is calling this function from outside felix_switch.c.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
2021-09-28 18:50:55 +03:00
596ec9ba5e net: tsec: Mark tsec_get_interface as __maybe_unused
Non DM builds fail with the following error:
drivers/net/tsec.c:641:24: error: 'tsec_get_interface' defined but not used [-Werror=unused-function]
  641 | static phy_interface_t tsec_get_interface(struct tsec_private *priv)

Fix that.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-28 18:50:55 +03:00
c098a8376c Prepare v2021.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28 18:50:55 +03:00
c6fd4fd756 phy: marvell: cp110: Support SATA invert polarity
In commit b24bb99d cp110 configuration initially done in u-boot
was removed and delegated to atf firmware as smc call.
That commit didn't account for later introduced in d13b740c SATA invert polarity support.

This patch adds support of passing SATA invert polarity flags to atf
firmware during the smc call.

Signed-off-by: Denis Odintsov <shiva@mail.ru>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-28 18:50:55 +03:00
4d515607dd arm: mvebu: turris_omnia: fix leaked mtd device
After getting MTD device via get_mtd_device_nm(), we need to put it with
put_mtd_device(), otherwise we get

  Removing MTD device #0 (mx25l6405d) with use count 1

before booting kernel.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-28 18:50:55 +03:00
019801863b efi_loader: Fix spec ID event creation
TCG EFI Protocol Specification defines the number_of_algorithms
field in spec ID event to be equal to the number of active
algorithms supported by the TPM device. In current implementation,
this field is populated with the count of all algorithms supported
by the TPM which leads to incorrect spec ID event creation.

Similarly, the algorithm array in spec ID event should be a variable
length array with length being equal to the number_of_algorithms field.
In current implementation this is defined as a fixed length array
which has been fixed.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
CC: Masahisa Kojima <masahisa.kojima@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-28 18:50:55 +03:00
9ac134876a doc: Add mention of the /config binding
The devicetree binding files are in their own directory and use a simple
text format. Add a link for the binding for the /config node, since it
is otherwise hard to find.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-28 18:50:55 +03:00
dc22e64d3e arm: orion5x: edminiv2: change maintainer
Since Albert Aribaud is not maintaining anymore the LaCie Ethernet Disk
mini V2 board, then I am taking over.

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-28 18:50:55 +03:00
4c3e847848 mtd: remove SPEAr flash driver st_smi
Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr
support").

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-28 18:50:55 +03:00
dba7eea008 Taking over responsibility for GE boards from Sebastian
I am taking over responsibility for the GE board from Sebastian Reichel.
Updating the MAINTAINERS files to reflect this.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-09-28 18:50:55 +03:00
26e21d3816 MAINTAINERS: remove SPEAR entry
As the lastest spear directories are removed, delete the associated entry
in the MAINTAINERS file:
- arch/arm/cpu/arm926ejs/spear/
- arch/arm/include/asm/arch-spear/

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-28 18:50:55 +03:00
001615386a fs: avoid superfluous messages
Output like the following is quite irritating:

    => bootefi hello
    Scanning disk mmc2.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **
    Scanning disk mmc1.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **
    Scanning disk mmc0.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **

Albeit a whole disk may be formatted with a filesystem in most cases
a partition table is used and the whole disk (partition number 0) doesn't
contain a filesytem. Some partitions may only contain a blob. Not seeing a
filesytem on the whole disk or on any partition is only worth a debug
message.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-28 18:50:55 +03:00
785b857d99 scripts/mailmapper: enable running with Python 3
Our mailmapper script required Python 2 which is no longer maintained.
A main difference when converting to Python 3 is that byte strings are not
character strings. So add conversion and skip over conversion errors.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-28 18:50:55 +03:00
577e45f36f test/py: tpm2: Skip tpm pytest based on env variable
Tpm test cases relies on tpm device setup. Provide an environment
variable "env__tpm_device_test_skip = True" to skip the test case
if tpm device is not present.
Only needed will have to add variable to the py-test framework.
Test runs successfully even this variable is absent.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-28 18:50:55 +03:00
c74d0ae519 ddr: altera: use KBUILD_BASENAME instead of __FILE__
The KBUILD_BASENAME contains just the name of the compiled module,
in this case 'sequencer', rather than a full path to the compiled
file. Use it to prevent pulling the full path into the U-Boot binary,
which is useless and annoying.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
9de0f144c7 arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
888d3d44af arm: socfpga: vining: Enable DW I2C driver
The Designware I2C IP is used to communicate with I2C peripherals on
SoCFPGA, and required to access I2C EEPROM on this board. Enable it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
4a60d3571b arm: socfpga: vining: Fix UDC controller phandle in DT
The USB peripheral controller is the DWC2 controller 1, not 0.
Update the phandle to fix UDC support on this board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
4527568e3f arm: socfpga: vining: Un-disable WDT in DT
The WDT on this system should be enabled, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
dc5d071792 arm: socfpga: vining: Set default SPI NOR mode and frequency
The SPI NOR bus mode is 0 on this system, update it accordingly.
Increase frequency to 40 MHz and enable SFDP parsing, since the
flashes on this system support that and it is a huge performance
improvement.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
563b90cc94 arm: socfpga: vining: Set USB gadget manufacturer to Softing with capital S
This was configured in downstream, so it is likely that most of the
custom software used around the device depends on it. Make upstream
compatible.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
3cecab95a2 arm: socfpga: vining: Increase environment size
Increase the environment size from 4k to 16k to prevent
environment from becoming full.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
946af58f11 arm: socfpga: vining: Drop meaningless comment
The comment is no longer meaningful due to DT conversion, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-28 18:50:55 +03:00
275c4f25f7 usb: xhci-dwc3: Add support for USB 3.1 controllers
This adds support for the DWC_sub31 controllers such as those
found on Apple's M1 SoC.  This version of the controller
seems to work fine with the existing driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-28 18:50:55 +03:00
e2a41bf638 usb: ehci-mx6: use phy_type from device tree
Allow using different PHY interfaces for multiple USB controllers. When no
value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay
compatible with current board configurations.

This also adds support for the HSIC mode of the i.MX7.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-28 18:50:55 +03:00
656bc27d50 usb: ehci-ci: remove redundant PORTSC flag definitions
These definitions are unused, all boards that define portsc flags use
the equivalent PORT_* definitions instead.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-28 18:50:55 +03:00
bc31f6a1b1 include/configs: replace MXC_EHCI_MODE_SERIAL with PORT_PTS_SERIAL
The MXC_EHCI_MODE_ definitions are redundant. Replace MXC_EHCI_MODE_SERIAL
with the equivalent PORT_PTS_SERIAL.

Only the zmx25 platform is affected.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-28 18:50:55 +03:00
daa632907e usb: add support for ULPI/SERIAL/HSIC PHY modes
Import usb_phy_interface enum values and DT match strings from the Linux
kernel.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-28 18:50:55 +03:00
de5aef0fc7 configs: Enable USB3 on Allwinner H6 boards
Pine H64 and Orange Pi 3 both provide a USB3 type A port.
Enable it in U-Boot.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-28 18:50:55 +03:00
02d824e3ac usb: xhci-dwc3: Add support for clocks/resets
Some platforms, like the Allwinner H6, do not have a separate glue layer
around the dwc3. Instead, they rely on the clocks/resets/phys referenced
from the dwc3 DT node itself. Add support for enabling the clocks/resets
referenced from the dwc3 DT node.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-28 18:50:55 +03:00
a0a5c43193 usb: xhci-pci: Move reset logic out of XHCI core
Resetting an XHCI controller inside xhci_register undoes any register
setup performed by the platform driver. And at least on the Allwinner
H6, resetting the XHCI controller also resets the PHY, which prevents
the controller from working. That means the controller must be taken out
of reset before initializing the PHY, which must be done before calling
xhci_register.

The logic in the XHCI core was added to support the Raspberry Pi 4
(although this was not mentioned in the commit log!), which uses the
xhci-pci platform driver. Move the reset logic to the platform driver,
where it belongs, and where it cannot interfere with other platform
drivers.

This also fixes a failure to call reset_free if xhci_register failed.

Fixes: 0b80371b35 ("usb: xhci: Add reset controller support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-28 18:50:55 +03:00
a814dbe722 phy: sun50i-usb3: Add a driver for the H6 USB3 PHY
This driver is needed for XHCI to work on the Allwinner H6 SoC. The
driver is copied from Linux v5.10.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-28 18:50:55 +03:00
5501fadb45 x86: tangier: acpi: Add GPIO card detection to SDHCI #2
On Intel Tangier the SDHCI #2 provides SD card connection.
Add GPIO card detection for it.

Fixes: 39665beed6 ("x86: tangier: Enable ACPI support for Intel Tangier")
BugLink: https://github.com/edison-fw/meta-intel-edison/issues/135
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-28 18:50:55 +03:00
2f025b96bc x86: edison: Mark eMMC non-removable
eMMC is non-removable on Intel Edison board. Fix the DTS accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-28 18:50:54 +03:00
a70c3f9fb8 mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface
nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.

For doing this, node parameter type must be ofnode.

First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().

So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28 06:34:45 +02:00
06cec894a5 i2c: mvtwsi: Add support for DM clocks and resets
The controller may need to have clocks/resets enabled for it to work.
Add support for this. Since the clocks/resets are optional on some
platforms (per the device tree binding), do not prevent probing the
controller if they are missing.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-09-28 06:34:27 +02:00
e53979cd34 i2c: rcar_i2c: Enable configuring SCL rise and fall times
The Linux i2c driver supports i2c-scl-rising-time-ns,
and i2c-scl-falling-time-ns, but U-Boot uses hard-coded values
for these values.

Update the calculation by fetching them from the device tree if
present and use the previous values as the default if they are
missing.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-09-28 06:34:14 +02:00
4b62ba8fa2 ti: keystone: Migrate CONFIG_SOC_K2* to Kconfig
Move the individual keystone 2 SoC symbols to the mach Kconfig file,
select them as needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
f899cc1432 ti: keystone: Move away from CONFIG_SOC_KEYSTONE
We have individual SOC symbols for each keystone 2 platform.  Use the
existing CONFIG_ARCH_KEYSTONE rather than CONFIG_SOC_KEYSTONE to
encompass all of the keystone families.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
b17cc80781 omap4_panda: Remove unused comments/code
Clean up the config header file by removing some now irrelevant code /
comments.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
0eeabc63d2 omap3_logic: Remove unused comments/code
Clean up the config header file by removing some now irrelevant code /
comments.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
e124b65246 am3517_evm: Remove unused comments/code
Clean up the config header file by removing some now irrelevant code /
comments.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
899867a28a Convert CONFIG_OMAP_EHCI_PHY1_RESET_GPIO et al to Kconfig
This converts the following to Kconfig:
   CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
   CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
   CONFIG_OMAP_EHCI_PHY3_RESET_GPIO

To do this, we also introduce CONFIG_HAS_CONFIG_OMAP_EHCI_PHYn_RESET_GPIO
options to get setting the GPIO number.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
fb1d1778f9 usb: ehci-omap: Drop non-DM_USB legacy code
Now that DM_USB is always enabled, we can drop some legacy code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
425c121d7a omapl138_lcdk: Stop using CONFIG_MACH_OMAPL138_LCDK
We have one places that uses this symbol and CONFIG_TARGET_OMAPL138_LCDK
works equally well, switch to that.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
2043f9c4c1 ti: keystone: dma: Migrate to Kconfig
Move the main option for handling drivers/dma/keystone_nav* to Kconfig,
and enable it by default.  All of the sub-symbols are not configurable,
so remove them from the CONFIG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
c8c934b910 ti: keystone: Clean up or migrate some NAND related options.
The COFNIG_KEYSTONE_RBL_NAND option is always enabled for the driver on
keystone platforms, but not older davinci platforms.  Use def_bool for
the symbol. For CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE, it's only used within
the driver and derived from another symbol, so remove CONFIG from the
name.  Finally, CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE is a bit more fixed.
For now, use the value directly.  Long term, as part of DM'ifying NAND,
this should come from the device tree.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
bdeedc16e1 compulab: Clean up some unused symbols
Since cm_t35 was removed, CONFIG_CM_T3X does not exist.  This lets us
simplify the code in board/compulab/common/eeprom.c a bit.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
8d8d7e9361 Convert CONFIG_USB_XHCI_OMAP to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_XHCI_OMAP

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
2c8419feb2 usb: phy: ti: Remove non-DM PHY code
At this point in time, all platforms that had previously used
drivers/usb/phy/omap_usb_phy.c have been migrated to DM and related
options.  Remove this now unused code and some related unused defines.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
bfbb7247b6 keystone2: Move CONFIG_AEMIF_CNTRL_BASE out of CONFIG namespace
This is only used in the aemif driver that is otherwise currently
keystone2 centric.  Moving forward, if this is applicable to some other
platform then such base addresses should be able to be obtained via the
device tree.  Use KS2_AEMIF_CNTRL_BASE directly now rather than
indirectly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 21:38:34 -04:00
b8292240d7 doc: ti: am335x_evm: Minor general updates
- At this point there are a large number of Beaglebone boards, refer to
  them as a family rather than a growing list.
- Reword customization as we're largely Kconfig-oriented now.
- Remove the NOR section as the relevant defconfigs have long been
  removed and the general support was not updated.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 17:27:41 -04:00
c8fff5d2b5 doc: ti: Convert am335x_evm README to rST
Convert the existing documentation to rST, keeping to just making
formatting changes to start with.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 17:27:41 -04:00
1d1f98c8ee Merge tag 'dm-pull-next-27sep21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
Various of-platdata improvements, including CONFIG_OF_REAL
2021-09-27 11:09:23 -04:00
e908d20fcb Merge tag 'v2021.10-rc5' into next
Prepare v2021.10-rc5
2021-09-27 09:45:36 -04:00
933bf26445 fdt_support.h: Remove duplicated declarations
There are two duplicated declarations for ft_cpu_setup() and
ft_pci_setup().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2021-09-25 09:46:15 -06:00
2348e72d6d dm: pci: Fix handling of errors when scanning device
Some PCIe controller's read_config() method support indicating error
directly via return value, but some cannot distinguish all-ones (or
all-zeros) read response from an error.

The current code in pci_bind_bus_devices() interprets all-ones /
all-zeros in PCI_VENDOR_ID register as "nothing connected", and
continues the cycle, but an error returned via return value breaks the
cycle.

This is wrong for the PCIe controllers which return this error via
return value.

Handle all errors when reading PCI_VENDOR_ID the same way.

This fixes enumeration of PCI devices for example when there is a PCI
bridge connected behind another PCI bridge and not all ports are
connected to a device, and the controller (for example Aardvark)
translates the UR error (Unsupported Request) as -EOPNOTSUPP.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-25 09:46:15 -06:00
8ae8da10b3 sandbox: correct cpu nodes
The cpu nodes in arch/sandbox/dts/test.dts should conform to the devicetree
specification:

* property device_type must be set to "cpu"
* the reg property must be provided
* the cpu nodes must have an address

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
48609d0789 dm: gpio: Add of-platdata support
Add support for accessing GPIOs using of-plata. This uses the same
mechanism as for clocks, but allows use of the xlate() method so that
the driver can interpret the parameters.

Update the condition for GPIO_HOG so that it is not built into SPL,
since it needs SPL_OF_REAL which is not enabled in sandbox_spl.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
3e57ad907c irq: Tidy up of-platdata irq support
This function is available but not exported. More generally it does not
really work as intended.

Reimplement it and add a sandbox test too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
f521be6083 dm: doc: Add a note about of-platdata header files
This error can be confusing so mention it specifically in the
documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
f0ab8f9fbe clk: Rename clk_get_by_driver_info()
This is actually a misnomer now, since the phandle info may contain
a driver_info index or a udevice index. Rename it to use the word
'phandle', which seems more accurate. Add a comment while we are here.

Also add a test for this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
4ee0cc89db dm: Add comments to dt-structs contents
These structs do not have comments at present. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
f99cbe4e86 fdt: Update Makefile rules with the new OF_REAL Kconfig
Simplify some of the Makefile rules using this Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
dcfc42b12f treewide: Try to avoid the preprocessor with OF_REAL
Convert some of these occurences to C code, where it is easy to do. This
should help encourage this approach to be used in new code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
62470afed1 mmc: nds32: ftsdc010: Convert to livetree
Use the livetree API for this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-09-25 09:46:15 -06:00
9539738509 treewide: Use OF_REAL instead of !OF_PLATDATA
Now that we have a 'positive' Kconfig option, use this instead of the
negative one, which is harder to understand.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
414cc15144 treewide: Simply conditions with the new OF_REAL
Use this new Kconfig to simplify the compilation conditions where
appropriate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
eaad01a3d0 fdt: Create a new OF_REAL Kconfig
The condition to indicate whether there is a runtime devicetree available
is OF_CONTROL && !OF_PLATDATA. This is a bit unweidly and is repeated in
a lot of places.

Add a new OF_REAL Kconfig which provides this information directly.

Note: This is similar in effect to LIBFDT. We might consider dropping
LIBFDT and using this instead, but this is left for now as we also have
OF_LIBFDT_OVERLAY which it would not make sense to change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
7de8bd03c3 treewide: fdt: Move fdt_get_config_... to ofnode_conf_read...
The current API is outdated as it requires a devicetree pointer.

Move these functions to use the ofnode API and update this globally. Add
some tests while we are here.

Correct the call in exynos_dsim_config_parse_dt() which is obviously
wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
bb38d77ca7 vexpress_ca9x4: Add missing SYS_LOAD_ADDR
- Add missing CONFIG_SYS_LOAD_ADDR based on other platforms
- Resync

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-24 22:12:35 -04:00
bf0491f8d8 Merge branch '2021-09-24-assorted-updates' into next
- A few minor updates
2021-09-24 20:35:50 -04:00
cc5afabc9d drivers: tpm2: update reset gpio semantics
Use the more generic reset-gpios property name.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-24 14:36:50 -04:00
8a0f5f6e70 Avoid polluting CONFIG_ namespace with board specific define.
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-24 14:30:46 -04:00
0d60e5d8e9 tools: Handle PAGER containing arguments
When printing full help output from a tool, we should be able to handle
a PAGER variable which includes arguments, e.g. PAGER='less -F'.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-09-24 14:30:46 -04:00
5fe50f9a40 tools: Refactor full help printing
Collect the code for printing the full help message of patman, buildman
and binman into a single function in patman.tools.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2021-09-24 14:30:46 -04:00
15e30106ce ARM: vexpress_ca9x4: Reintroduce board in order to use with QEMU.
vexpress_ca9x4 is seemingly the only board except for qemu_arm which
is able to run U-Boot correctly, using the `-M vexpress-a9` option to
QEMU. Building for qemu_arm and running qemu-system-arm with the `-M
virt` argument has a number of downsides, most importantly that it
only supports virtio storage drivers. This significantly reduces its
usefulness in testing memory card and Flash solutions, especially when
the tested images are from a third party source.

So therefore we reintroduce the vexpress_ca9x4 board in this commit,
with the explicit goal of using it with QEMU.

A number of differences to note from the original:

* Since the board was apparently unmaintained, I have now set myself
  as the maintainer.

* The board has been converted to use the driver model, which was the
  reason it was removed in the first place.

* The vexpress_ca15_tc2 and vexpress_ca5x2 boards, which were removed
  in the same commit, are not necessary for the QEMU use case, and
  have been omitted.

* An `mmc0` alias was introduced in the dts file. The mmc is not
  detected correctly without this, now that it's based on the device
  tree instead of the board's init function.

* A couple of other nodes were removed because they were problematic
  when trying to run the UEFI bootmgr. Once again, the primary use
  case here is QEMU, and these nodes are not needed for that to work.

* Unnecessary board init code has been removed, thanks to driver model
  and device tree.

* `CONFIG_OF_EMBED` has been enabled. I know this goes against
  recommended practice, but there doesn't seem to be any other way to
  pass the dtb to U-Boot in the QEMU scenario. Using the -dtb argument
  does not work, I suppose because U-Boot doesn't use the same
  mechanics as the kernel when it's booting.

* Load addresses have been changed to fit QEMU use case.

People wanting to get a more detailed, yet somewhat isolated, diff
between this and the original, can run this command:

  git diff c6c26a05b89f25a06e7562f8c2071b60fd0c9eac~1 -- \
      $( git diff-tree --diff-filter=A -r --name-only HEAD~1 HEAD)

(Make sure to either check out this commit first, or replace HEAD with
the commit ID of this commit)

Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
2021-09-24 14:30:46 -04:00
6493fa4c3d arm: use CONFIG_SUPPORT_PASSING_ATAGS
Simplify the bootm and the spl code by using the new config
CONFIG_SUPPORT_PASSING_ATAGS.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-24 14:30:46 -04:00
7d1fcaea12 Merge branch '2021-09-24-arm64-optimized-str-funcs' into next
- Bring in, but disable by default, asm optimized string functions for
  arm64.
2021-09-24 10:13:44 -04:00
4e062fc955 arm64: Kconfig: Enable usage of optimized memset/memcpy/memmove
This patch enables the use of the optimized memset(), memmove() &
memcpy() versions recently added on ARM64.

Please note that these optimized functions are now only enabled for
recent GCC versions (>= 9.4), as earlier GCC versions throw these
errors:

aarch64-linux-ar: warning: arch/arm/lib/memset-arm64.o: unsupported GNU_PROPERTY_TYPE (5) type: 0xc0000000
...

Signed-off-by: Stefan Roese <sr@denx.de>
[trini: Make this default to off as it causes problems on some platforms still]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-24 07:49:16 -04:00
1e43bb6732 arm64: memset-arm64: Use simple memset when cache is disabled
The optimized memset uses the dc opcode, which causes problems when the
cache is disabled. This patch adds a check if the cache is disabled and
uses a very simple memset implementation in this case. Otherwise the
optimized version is used.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-09-24 07:48:06 -04:00
dbf6b14e0a arm64: arch/arm/lib: Add optimized memset/memcpy/memmove functions
Ported from https://github.com/ARM-software/optimized-routines

These files are included from this repository, including the latest
git commit ID:
string/aarch64/memcpy.S: afd6244a1f8d
string/aarch64/memset.S: e823e3abf5f8
string/asmdefs.h: e823e3abf5f8

Note that memmove is also handled by the memcpy function.

Please note that when adding these optimized functions as default memset
memcpy functions in U-Boot, U-Boot fails to boot on the LX2160ARDB.
After the initial ATF output, no U-Boot output is shown on the serial
console. Some exception is triggered here in the very early boot process
as some of the assembler opcodes need the caches to be enabled.

Because of this, a follow-up patch will add a check to use a simple
non-optimized memset for the "cache disabled" case.

Note:
I also integrated and tested with the Linux versions of these optimized
functions. They are similar to the ones now integrated but these ARM
versions are still a small bit faster.

Signed-off-by: Stefan Roese <sr@denx.de>
2021-09-24 07:48:06 -04:00
2c14ff5879 Revert "env: Make _init() expect _INVALID when _IS_NOWHERE"
Upon further discussion, this is not required now.

This reverts commit f6bc5d17af.

Link: https://lore.kernel.org/r/ebd92337-669a-9a0a-0af3-d06b957f3b40@denx.de/
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-24 07:43:22 -04:00
657668348b Merge branch '2021-09-23-assorted-updates' into next
- Rework lmb reservation so we have common code for all arches to use
- armv8 cache.S cleanups, crc32 speedup
- ENV_IS_NOWHWERE, pci io/memory base configuration fixes
2021-09-23 22:38:21 -04:00
8e85f36a8f pci: Fix configuring io/memory base and limit registers of PCI bridges
Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved
and should be zero. So do not set them to non-zero value.

Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers
contain information if 64-bit memory addressing is supported. So preserve
this information when overwriting these registers.

Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information
if 32-bit io addressing is supported. So preserve this information and do
not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and
PCI_IO_LIMIT_UPPER16 registers) when it is unsupported.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-23 14:15:32 -04:00
df3ab898f6 arm: mediatek: merge board Kconfigs into mach-mediatek
On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME
variables from defconfig.
This is because in board/mediatek/mtXXXX/Kconfig this value was override
by default due to the if CONFIG_TARGET_MTXXXX condition.

Merge all the Kconfigs to the mach-medatek/Kconfig.

This way:
- we only define SYS_{SOC,VENDOR} once
- all board definitions are in a single place, simplifying the build logic.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
2021-09-23 14:15:32 -04:00
a69753f31d lmb: x86: Add arch_lmb_reserve()
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic().
It is rather likely this architecture also needs to cover U-Boot with
LMB before booting Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
7996b7e9f5 lmb: xtensa: Add arch_lmb_reserve()
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic().
It is rather likely this architecture also needs to cover U-Boot with
LMB before booting Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
1e0e557774 lmb: sh: Add arch_lmb_reserve()
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic().
This architecture also needs to cover U-Boot with LMB before booting
Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
eeaa3fe652 lmb: riscv: Add arch_lmb_reserve()
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic().
It is rather likely this architecture also needs to cover U-Boot with
LMB before booting Linux.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Leo <ycliang@andestech.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
6a0890a61e lmb: nds32: Add arch_lmb_reserve()
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic().
It is rather likely this architecture also needs to cover U-Boot with
LMB before booting Linux.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Rick Chen <rick@andestech.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
a02c18f31f lmb: nios2: Add arch_lmb_reserve()
Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic().
It is rather likely this architecture also needs to cover U-Boot with
LMB before booting Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
c16de86ec0 lmb: Remove imx board_lmb_reserve()
This function is clearly architecture specific code, not board specific
code. The only difference from the previous arm arch_lmb_reserve() is the
extra reservation of 16k of memory below the stack bottom, rather than
the 4k. The common code now also uses 16k alignment. Remove this custom
implementation, as it now behaves exactly as the common code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Hai Pham <hai.pham.ud@renesas.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ye Li <ye.li@nxp.com>
2021-09-23 14:15:32 -04:00
b1d0487cfe lmb: arm: Increase LMB alignment to 16k in arch_lmb_reserve_generic()
According to input NXP, the 4k alignment is not always sufficient.
Currently iMX works around this problem by implementing board specific
LMB reservation, however it is likely this could also occur on other
systems. Increase the LMB reservation alignment to 16k by default.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Hai Pham <hai.pham.ud@renesas.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
1f391c3454 lmb: Switch to generic arch_lmb_reserve_generic()
Switch arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() to
arch_lmb_reserve_generic().

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Hai Pham <hai.pham.ud@renesas.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wolfgang Denk <wd@denx.de>
2021-09-23 14:15:32 -04:00
1274698d13 lmb: Add generic arch_lmb_reserve_generic()
The arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() implementations
are all mostly the same, except for a couple of details. Implement a
generic arch_lmb_reserve_generic() function which can be parametrized
enough to cater for those differences between architectures. This can
also be parametrized enough so it can handle cases where U-Boot is not
relocated to the end of DRAM e.g. because there is some other reserved
memory past U-Boot (e.g. unmovable firmware for coprocessor), it is not
relocated at all, and other such use cases.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Hai Pham <hai.pham.ud@renesas.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
cfa1971977 lmb: Always compile arch_lmb_reserve() into U-Boot on arc
The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even
if CMD_BOOTM is not enabled. However, the arc variant of arch_lmb_reserve()
is only compiled in if CMD_BOOTM is enabled.

This currently does not trigger build error, because there is an empty
weak implementation of arch_lmb_reserve(), however that is not the
function that should be used on arc.

Fix this by moving the arch_lmb_reserve() implementation into common
code and always compile it in.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
8120e0681c lmb: Always compile arch_lmb_reserve() into U-Boot on arm
The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even
if CMD_BOOT{I,M,Z} is not enabled. However, the arm32/arm64 variant of
arch_lmb_reserve() is only compiled in if CMD_BOOT{I,M,Z} is enabled.

This currently does not trigger build error, because there is an empty
weak implementation of arch_lmb_reserve(), however that is not the
function that should be used on arm32/arm64.

Fix this by moving the arch_lmb_reserve() implementation into common
code and always compile it in.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
2ddb8fcd2e image: add lz4 zstd compression magic map
Add lz4 and zstd compression magic map. Already can decompress images
with lz4 and zstd compression type.

Signed-off-by: Artem Lapkin <art@khadas.com>
2021-09-23 14:15:32 -04:00
270f8710f9 crc32: Add crc32 implementation using __builtin_aarch64_crc32b
ARMv8.0 has optional crc32 instruction for crc32 calculation. The
instruction is mandatory since ARMv8.1. The crc32 calculation is
faster using the dedicated instruction, e.g. 1.4 GHz iMX8MN gives:

  => time crc32 0x50000000 0x2000000
  time: 0.126 seconds # crc32 instruction
  time: 0.213 seconds # software crc32

Add implementation using the compiler builtin wrapper for the crc32
instruction and enable it by default, since we don't support any
platforms which do not implement this instruction.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
[trini: Make crc32_table guarded by CONFIG_ARM64_CRC32]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-23 14:15:32 -04:00
37479e65a3 armv8/cache.S: Triple with single instruction
Replace the current 2-instruction 2-step tripling code by a
corresponding single instruction leveraging ARMv8-A's "flexible second
operand as a register with optional shift". This has the added benefit
(albeit arguably negligible) of reducing the final code size.

Fix the comment as the tripled cache level is placed in x12, not x0.

Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-09-23 08:55:06 -04:00
f050bfacc5 armv8/cache.S: Read sysreg fields through ubfx
Improve the file's readability and conciseness by using the appropriate
Aarch64 instruction: ubfx (unsigned bitfield extract). This makes the
code easier to follow as it directly manipulates the offsets and widths
of the fields read from system registers, as they are expressed in the
Standard (ARM ARM). This has the added benefit (albeit arguably
negligible) of reducing the final code size.

Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-09-23 08:55:06 -04:00
f6bc5d17af env: Make _init() expect _INVALID when _IS_NOWHERE
Avoid applying the "fix" introduced by commit 5557eec01c ("env: Fix
invalid env handling in env_init()") to the environment "nowhere".

This is necessary as that commit, by setting the return value of
env_init() to -ENOENT if gd->env_valid is ENV_INVALID, forces that
function to reset gd->env_valid to ENV_VALID. By doing so, it breaks the
assumption (required by ENV_IS_NOWHERE) that gd->env_valid must be
ENV_INVALID.

This, in turn, results in env_relocate() calling env_load() (it should
not), which itself, calls U_BOOT_ENV_LOCATION(nowhere).load() i.e.
env_nowhere_load(). That function, being implemented under the
assumption mentioned above, calls env_set_default(), which in turn,
seeing that gd->env_valid is ENV_VALID (it should not), tries to
dereference whatever lies in gd->env_addr (most likely garbage), leading
to a faulty memory access.

Note that other env_locations might be concerned by this bug but that
this commit only intends to fix it for when ENV_IS_NOWHERE.

Fixes: 5557eec01c ("env: Fix invalid env handling in env_init()")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
2021-09-23 08:55:06 -04:00
7b57e56739 Merge tag 'u-boot-at91-2022.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.01 cycle:

This feature set includes : the support for CPU driver for arm926
(sam9x60 device); changes required for OP-TEE boot for sama5d2_xplained
and sama5d27_som1_ek boards; QSPI boot configuration for sama5d2_icp;
starting to remove old Kconfig unused symbols from config_whitelist.txt
(work will take more time); also small fixes and updates in mach, DT,
configs, etc.
2021-09-22 21:17:39 -04:00
63823da4b9 Merge branch '2021-09-22-general-updates' into next
- Some sandbox improvements
- Make cleanups related to the overusage of the exact build time
  variable.
2021-09-22 14:54:21 -04:00
d65b84a1d0 ARM: dts: at91: update flexcom defines using include file
Replace the number in the flexcom-mode property with the define from the
include file.
This corresponds to the approach in Linux kernel.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:08:24 +03:00
0d58dafd64 include: dt-bindings: mfd: add atmel flexcom include file
Add dt-bindings include file for Atmel Flexcom hardware block.
This file is copied from Linux kernel.
It is used in devicetrees from Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:08:24 +03:00
0c66872f99 net: remove unused CONFIG_DRIVER_AT91EMAC_*
AT91EMAC driver is unused, thus removing.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-21 10:08:24 +03:00
a6bbb8b596 ARM: at91: remove references to RM9200DK
The AT91 RM9200DK board was removed long time ago.
Remove existing references that were not cleaned up.

Fixes: 1c85752258 ("ARM: remove broken "at91rm9200dk" board")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:08:24 +03:00
b73c366eb6 board: pm926x: remove unused CONFIG_SYS_AT91_CPU_NAME
CONFIG_SYS_AT91_CPU_NAME looks to be unused.
Remove it and remove it from config_whitelist.txt

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:08:24 +03:00
9e4bf2161c board: atmel: sama7g5ek: avoid rewriting of configured CONFIG_BOOTCOMMAND
Rewrite the CONFIG_BOOTCOMMAND only if it's not previously configured from
defconfig file.
This allows the user to select from defconfig/menuconfig the desired
boot command.
Adjust the current board defconfigs to reflect the default booting command
for the specific ENV configuration.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:07:04 +03:00
d2b4809bde configs: sama5d2: add qspi config for QSPI1
Add new config for storing environment from QSPI1.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: cleanup and add MAINTAINERS entry]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:05:38 +03:00
26671aabcc ARM: dts: at91: sama5d2: fix dtc warning for ohci and ehci
Fixed the following DTC build warning (reproducible with W=1)

arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ohci@00400000: unit name should not have leading 0s
arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ehci@00500000: unit name should not have leading 0s

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
2021-09-21 10:05:38 +03:00
b6a8cce941 ARM: dts: at91: sama5d2_icp: cosmetic arrangement of the nodes
Reorder the nodes following the kernel rules: nodes in a range are sorted
by ascending bus address, and when referenced by phandle, are ordered
alphabetically.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:05:38 +03:00
5b43508419 ARM: dts: at91: sama5d2_icp: add QSPI1 device
Add support for sst26vf064b 64Mbit qspi-flash that is
present on sama5d2_icp board.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: move u-boot properties to sama5d2_icp-u-boot.dtsi]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:05:38 +03:00
c1f7ef9ab3 board: sama5d2_xplained: Modify load addresses
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved.
This modification allows to have a system which always work even when
OP-TEE is present.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:38 +03:00
8f5972ca2b board: sama5d2_xplained: Get dram size and base from device tree
In order to make it more flexible and allow modifying the base address
of DRAM without recompiling U-Boot, use memory node from device tree
with fdtdec functions.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:38 +03:00
b25d7618be ARM: dts: at91: sama5d2_xplained: Add memory node in devicetree
sama5d2_xplained DRAM detection code will be modified to use device tree
instead of hardcoded addresses. In order to prepare that, add the memory
node to at91-sama5d2_xplained.dts.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:38 +03:00
9a211d5776 board: sama5d27_som1_ek: Modify load addresses
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved.
This modification allows to have a system which always work even when
OP-TEE is present.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:38 +03:00
73c1589f02 board: sama5d27_som1_ek: Get dram size and base from device tree
In order to make it more flexible and allow modifying the base address
of DRAM without recompiling U-Boot, use memory node from device tree
with fdtdec functions.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:38 +03:00
094f19c527 ARM: mach-at91: armv7: fix multiple cpu_reset definition when enabling SYSRESET
When SYSRESET is enabled, cpu_reset function is also defined in
sysreset-uclass.c which lead to multiple definitions of this function
since reset.c is build unconditionally. Add a check in Makefile to build
this file only if SYSRESET isn't enabled.
SYSRESET can be enabled when building SYSRESET_PSCI for instance on this
platform.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
2021-09-21 10:05:37 +03:00
b8ccd77193 configs: gardena-smart-gateway-at91sam: Adjust to production values
This commit updates the default config with the values that will be used
soon on the Atmel / Microchip AT91SAM9G25 based GARDENA smart gateway.

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-21 10:05:37 +03:00
4e3a428e60 configs: sam9x60ek: enable CONFIG_CPU
Enable CONFIG_CPU for SAM9X60EK configs.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21 10:05:37 +03:00
63ba551d70 ARM: dts: at91: sam9x60: add bindings for CPU
Add bindings for CPU. This will allow displaying correctly the crystal,
CPU and master clock.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21 10:05:37 +03:00
7d4ce3ac58 cpu: at91: add compatible for ARM9260EJ-S
The crystal, CPU and master clock were not displayed correctly on SAM9X60
after adding CCF clock support. Add compatible for ARM926EJ-S to fix
this.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21 10:05:37 +03:00
c05be59ca8 clk: at91: clk-master: split master clock in pres and divider
Split master clock in 2 controlling block: one for prescaler one for
divider. This will allow referencing correctly the CPU clock and
master clock in device trees.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-09-21 10:05:37 +03:00
6beb4a3a59 ARM: at91: Add chip ID of SAMA5D29
Add SAMA5D29 SoC for identification during the boot up.

Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
2021-09-21 10:05:37 +03:00
121a165c51 Remove including timestamp.h in version.h
Header file version.h does not use anything from timestamp.h. Including of
timestamp.h has side effect which cause recompiling object file at every
make run because timestamp.h changes at every run.

So remove timestamp.h from version.h and include timestamp.h in files
which needs it.

This change reduce recompilation time of final U-Boot binary when U-Boot
source files were not changed as less source files needs to be recompiled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add in lib/acpi/acpi_table.c and test/dm/acpi.c, rework a few others]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
bc21ccbaaa version: Remove global macro U_BOOT_VERSION_STRING from version.h
Version string is available in global variable char version_string[].
Macro U_BOOT_VERSION_STRING is not used by any other file, so remove it
completely from version.h. Other files were already converted to use
variable version_string[].

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
fd00495080 x86: quark: MRC: Remove U_BOOT_DATE and U_BOOT_TIME from debug log
U_BOOT_DATE and U_BOOT_TIME are updated on every run of make command.
Therefore mrc.c file is recompiled every time when running make which means
that whole U-Boot binary is recompiled on every run of make command.

Simplify it and do not recompile U-Boot binary on every run of make command
by not depending on macros U_BOOT_DATE and U_BOOT_TIME.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-17 12:10:44 -04:00
7629b52a94 version: Do not make version_string[] variable as a weak
There is no platform which needs to overload version_string[] variable, so
remove weak symbol mark.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
d502c5f3b4 powerpc: Drop version_string placement optimization
As explained by Wolfgang, historically PowerPC would do a number of
things to hand-optimize placement of the binary on NOR flash in order to
maximize utilization of very scarce resources.  These days, we simply
aren't optimizing our binary layout for NOR flash placement and it's
quite likely this wasn't working as intended.  Furthermore, this level
of optimization makes it difficult to have version_string be a global,
instead of a weak and overridden value, and so make more progress on
reproducible builds, which is a current concern.

Move to having PowerPC no longer store version_string in the early part
of text so that it might be part of the first page of NOR and instead
use the same declaration everyone else does.

Link: https://lore.kernel.org/r/96716.1629798400@gemini.denx.de/
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
ad5720a357 m68k: mcf: Remove overloading version_string
There is no need to overload version_string at the end of start.S files.
Common implementation of version_string should be fine.

Signed-off-by: Pali Rohár <pali@kernel.org>
[trini: Keep the align, it's important for the rest of linkage]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
bdfb6d70bb version: Move version_string[] from version.h to version_string.h
More C files do not use compile time timestamp macros and do not have to be
recompiled every time when SOURCE_DATE_EPOCH changes.

This patch moves version_string[] from version.h to version_string.h and
updates other C files which only needs version_string[] string to include
version_string.h instead of version.h. After applying this patch these
files are not recompiled every time when SOURCE_DATE_EPOCH changes.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
fa9c5da702 efi_loader: Use directly version_string variable
Macro U_BOOT_VERSION_STRING is already stored in variable version_string.
So use directly this variable instead of storing U_BOOT_VERSION_STRING into
temporary variable.

Signed-off-by: Pali Rohár <pali@kernel.org>
[trini: This area was reworked since posted, what is here is now really
        inspired by the previous version, so drop Ilias' Acked-by]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
a79f823314 Remove #include <version.h> from files which do not need it
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
0072f5fce3 Remove #include <timestamp.h> from files which do not need it
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
6252fd05a2 m68k: Add missing ENTRY entry in linker script
Currently, there is no ENTRY() entry in the m68k linker script.
However, since they currently contain a version_string symbol, which
then overrides the default weak version_string symbol, the linker
decides we must keep start.o in the resulting link.  Add an ENTRY() line
so that the linker will know to keep this, even when version_string is
no longer provided in start.S

Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
2e09008c3c test: Add a way to skip console checking until a string matches
Some tests produce a lot of output that does not need to be individually
checked by an assertion. Add a macro to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 14:39:40 -04:00
b9274095c2 sandbox: Add a way to map a file into memory
It is useful to map a file into memory so that it can be accessed using
simple pointers. Add a function to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 13:19:25 -04:00
b4467fae06 sandbox: Add a way to find the size of a file
Add a function to return the size of a file. This is useful in situations
where we need to allocate memory for it before reading it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2021-09-16 13:19:25 -04:00
79b3f36730 dm: core: Fix a few incorrect comments on first/next functions
Tighten up these comments to make the behaviour clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 13:19:25 -04:00
127ca10467 test: Tidy a comment in the bloblist test
Fix up a copy error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 13:19:25 -04:00
ad6ddc57ee sqfs: Suppress the message about missing filesystem
This message comes up a lot when scanning filesystems. It suggests to the
user that there is some sort of error, but in fact there is no reason to
expect that a particular partition has a sqfs filesystem. Other
filesystems don't print this error.

Turn it into a debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2021-09-16 13:19:25 -04:00
64acd46a82 btrfs: Suppress the message about missing filesystem
This message comes up a lot when scanning filesystems. It suggests to the
user that there is some sort of error, but in fact there is no reason to
expect that a particular partition has a btrfs filesystem. Other
filesystems don't print this error.

Turn it into a debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-09-16 13:19:25 -04:00
7dcc2f7e7a sandbox: Add license headers to the dts files
Many of these files are missing a header. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 13:19:25 -04:00
130401e017 sandbox: Correct handling of --rm_memory
This option has no argument so we should not trip to skip one.

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 13:19:25 -04:00
032e7f6ef8 dtoc: Further improve documentation about warnings
Split this information into subsections and expand it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-16 13:19:25 -04:00
44131caa40 scripts/config_whitelist.txt: Fix after merging
CONFIG_SPIFLASH is manually re-added as it is not a new symbol, but now
only exists in CONFIG_SYS_EXTRA_OPTIONS.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-16 13:18:21 -04:00
36f890f6b0 pci: Fix mismerge with v2021.10-rc4
With legacy PCI code removed and thus DM_PCI also removed, a few places
did not get correctly updated with the merge to next and thus broke.
Remove now extraneous dependencies on DM_PCI.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-16 11:46:44 -04:00
6674edaabf Merge tag 'v2021.10-rc4' into next
Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt
2021-09-16 10:29:40 -04:00
4f8bf67f9c Merge branch '2021-09-11-update-docker-container' into next
- Update to latest Docker container images for CI.  This includes QEMU
  6.1.0 and support for SiFive Unleashed being tested.
2021-09-11 13:18:35 -04:00
201853834a CI: Update to latest container images
- Current Ubuntu/Focal tag
- QEMU 6.1.0
- genimage tool added

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-11 12:15:15 -04:00
0e60b3a718 azure/gitlab: Add tests for SiFive Unleashed board
This adds CI tests for SiFive Unleashed board.

QEMU supports booting exact the same images as used on the real
hardware out of the box, that U-Boot SPL loads U-Boot proper
from either an SD card or the SPI NOR flash, hence we can easily
set up CI to cover these 2 boot flows of SiFive Unleashed board.

With this, now we can have regression testing of mmc-spi-slot and
sifive spi drivers, as well as mmc and spi-nor subsystems.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-11 10:40:31 -04:00
8c17a18f8c riscv: sifive: unleashed: Add genimage config files
This adds genimage [1] config files for generating SD card and spi-nor
images, which can be programmed to an SD card or SPI flash and boot
from there.

The same images will be used for U-Boot CI testing for this board.

[1] https://github.com/pengutronix/genimage

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-11 10:40:31 -04:00
3283a05275 tools: docker: Build and install genimage
genimage [1] is a tool to create flash/disk images. This is required
by some targets, e.g.: sifive_unleashed, to generate sdcard or spi-nor
images for real hardware, as well as U-Boot CI testing.

[1] https://github.com/pengutronix/genimage

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-11 10:40:31 -04:00
a30e53cc37 tools: docker: Bump up QEMU version to 6.1.0
At present U-Boot CI testing is still using QEMU 4.2.0 which is
pretty old. Let's bump up to QEMU 6.1.0.

ninja-build is added as the prerequisite required by QEMU 6.1.0.

Note there is a bug in QEMU 6.1.0 Xilinx Zynq UART emulation codes.
A quick fix [1] was posted on QEMU mailing list but it it too late
for 6.1.0 release. Let's manually apply the bug fix on top of the
v6.1.0 release tag at the time being.

[1] http://patchwork.ozlabs.org/project/qemu-devel/patch/20210823020813.25192-2-bmeng.cn@gmail.com/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-11 10:40:31 -04:00
5c1ed64259 Dockerfile: Update to latest "focal" tag
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-11 10:40:31 -04:00
07298e4828 Merge branch '2021-09-07-ATAGs-and-related-migration' into next
- Merge ATAGs and MACH_ID options to Kconfig, and then disable them for
  nearly all platforms.  A small number of platforms actively require
  this support still, and have it still enabled.  Otherwise, it's migrated
  and disabled.
2021-09-07 22:29:57 -04:00
5f588f831b arm: Finish migration of CONFIG_MACH_TYPE
As this is only useful when booting with ATAGs, which are now largely
disabled, remove this value for the remaining platforms.  We have a few
places in the code that had been testing for MACH_TYPE as a sort of
internal logic.  Update those to use different but still correct CONFIG
symbols.

Cc: Phil Sutter <phil@nwl.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07 19:17:32 -04:00
87e8d38a39 arm: Add Kconfig entry for MACH_TYPE
As part of migrating support for ATAGs to Kconfig, add an option for
setting and passing MACH_TYPE.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07 16:22:31 -04:00
9774462e34 arm: Disable ATAGs support
With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and
stemmy, disable ATAG support.  A large number of platforms had enabled
support but never supported a kernel so old as to require it.  Further,
some platforms are old enough to support both, but are well supported by
devicetree booting, and have been for a number of years.  This is
because some of the ATAGs related functions have been re-used to provide
the same kind of information, but for devicetree or just generally to
inform the user.  When needed still, rename these functions to
get_board_revision() instead, to avoid conflicts.  In other cases, these
functions were simply unused, so drop them.

Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07 16:22:30 -04:00
b9d66a061b imx: Convert SERIAL_TAG support to ENV_VARS_UBOOT_RUNTIME_CONFIG
No iMX platforms have supported ATAG-based booting.  They have however
re-used the CONFIG_SERIAL_TAG option as a way to enable support of
reading the OTP fuses and setting the serial# environment variable in
some cases.  Change the warp7 support to use this symbol, use this for
updating the rest of the imx7 code, and update the imx8 conditionals.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07 13:04:52 -04:00
f84b48a1ba Convert CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07 13:04:09 -04:00
ec929484ec configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 15:47:53 -04:00
21b86803eb Merge branch '2021-09-04-makefile-cleanups-part-b' into next
- Further Makefile/Kconfig namespace cleanups from Simon.  This migrates
  a number of symbols to Kconfig and replaces some inconsistencies
  between CONFIG_FOO and CONFIG_SPL_FOO_SUPPORT/CONFIG_TPL_FOO_SUPPORT.
2021-09-04 15:43:59 -04:00
9f6649209f net: Move network rules to drivers/net
The code under drivers/net is related to ethernet networking drivers, in
some fashion or another.  Drop these from the top-level Makefile and
also move the phy rule into drivers/net/Makefile which is where it
belongs.  Make the new rule for drivers/net check for the build-stage
relevant ETH symbol.

Fix up some Kconfig dependencies while we're here to mirror how the
Makefile logic now works.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Introduce ETH, Kconfig dependency changes, am43xx fix]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 12:51:47 -04:00
5ed16a9511 net: Rename SPL_NET_SUPPORT to SPL_NET
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:48:53 -04:00
a4faf1f563 power: Refactor Makefile rules
Move the power/ rules into drivers/power to avoid clutter in the Makefile
and drivers/Makefile files.

We must select SPL_POWER if SPL_POWER_DOMAIN is used, since the two are
currently independent and boards do not necessarily enable SPL_POWER.

Add a TPL_POWER as well, as that is used by one board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-09-04 12:26:02 -04:00
14c251ffe1 power: Add a POWER config
At present we have SPL_POWER but not piain POWER. This works because
there is a special build rule in Makefile that always includes the
drivers/power directory.

It is better to have all driver directories included by drivers/Makefile
and there is already a rule in there for this purpose. It just needs a
Kconfig for U-Boot proper, so add one.

Update the pmic.h header file so that it defines the old pmic struct
always, when driver model is not in use. That will avoid build errors
for boards which enable POWER but not DM_PMIC.

Enable this option always. That seems strange at first sight, but it
actually but mimics the current Makefile behaviour. Once we can drop the
old PMICs it should be easy enough to rename DM_PMIC to POWWER, or
something similar.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
9d8665b709 i2c: Convert CONFIG_POWER_I2C et al to Kconfig
This converts the following to Kconfig:
   CONFIG_POWER_I2C
   CONFIG_POWER_LEGACY

They are handled at the same time due to a dependency between them.
Update the Makefile rule to use legacy power only in U-Boot proper.
Unfortunately a separate rule is needed in SPL to be able to build
legacy power.  Add SPL related symbols for both, to allow for SPL-only
usage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: More SPL related cleanups, reword commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 12:26:02 -04:00
29d7153ec3 power: Rename CONFIG_POWER to CONFIG_POWER_LEGACY
This option is used in pre-driver model code and much of it has never
been converted to driver model.

We want to add a new option to enable power support, so we can use a
simple rule in the Makefile. Rename this one, which is really about
a particular implementation of power.

Also update the pmic.h header file so it either includes the legacy
API or the driver model one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-09-04 12:26:02 -04:00
7abf178bb8 power: Tidy up #undef of CONFIG_DM_PMIC
Add a proper Kconfig option for SPL so we can remove the hack in some of
the board config files.

This involves adding CONFIG_SPL_DM_PMIC to some of the configs as well
as updateing the Makefile rule for PMIC_RK8XX to exclude SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Add SPL_PMIC_RK8XX, enable when needed, handle undef of
        CONFIG_DM_PMIC_PFUZE100 as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 12:26:02 -04:00
b2f9bac0e7 gpio: Add a GPIO config
At present we have SPL_GPIO and TPL_GPIO but not piain GPIO. This
works because there is a special build rule in Makefile that always
includes the drivers/gpio directory.

It is better to have all driver directories included by drivers/Makefile
and there is already a rule in there for this purpose. It just needs a
Kconfig for U-Boot proper, so add one.

Enable the option always for now, since this mimics current behaviour.
This can be updated once DM_GPIO is used everywhere.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
80a4876c86 tegra: gpio: Drop use of CONFIG_xxx variables
It is not a good idea to use things called CONFIG_xxx in the source code
since this prefix is reserved for use by Kconfig. Rename these variables.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
39f09140a1 Makefile: Move drivers/dma/ into drivers/Makefile
This rule should not be in the top-level Makefile. Move it, making use
of the new LEGACY_DMA Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
a7ebc6925b Convert CONFIG_DMA_LPC32XX to Kconfig
This converts the following to Kconfig:
   CONFIG_DMA_LPC32XX

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
7b278eacc5 ti: Convert CONFIG_TI_EDMA3 to Kconfig
This converts the following to Kconfig:
   CONFIG_TI_EDMA3

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-09-04 12:26:02 -04:00
70edba0784 dma: Add a Kconfig for legacy DMA
We cannot use the existing DMA config for the MCD driver because it is
not migrated to driver model. In order to move it to drivers/Makefile
we need some sort of option for it. Add a new DMA_LEGACY option, which
also acts as a signal that it should be migrated.

Enable this for devkit3250 which uses CONFIG_DMA_LPC32XX which is not
converted to Kconfig.

For now this is not used in the Makefile. That update happens in a
following patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
807cc640ed Makefile: Unify the rules for BOOTCOUNT_LIMIT
Use a single rule that works for all phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
f7560376ae sata: Rename SATA_SUPPORT to SATA
Rename this options so that CONFIG_IS_ENABLED can be used with it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
6f004adaf6 ppc: Rename MPC8XXX_INIT_DDR_SUPPORT to MPC8XXX_INIT_DDR
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
de213c71a3 Rename CACHE_SUPPORT to CACHE
Rename this option so that CONFIG_IS_ENABLED can be used with it.

Oddly there is already an SPL_CACHE option. Drop it in favour of this one.

Drop the special SPL Makefile rule which is now superfluous.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
ea2ca7e17e spi: Rename SPI_SUPPORT to SPI
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
52510486c5 serial: Add a SERIAL config
At present we have SPL_SERIAL and TPL_SERIAL but not piain SERIAL. This
works because there is a special build rule in Makefile that always
includes the drivers/serial directory.

It is better to have all driver directories included by drivers/Makefile
and there is already a rule in there for this purpose. It just needs a
Kconfig for U-Boot proper, so add one.

It is always enabled, for now, since that mimics the current behaviour.
It should be possible to drop the strange 'SERIAL_PRESENT' option at some
point and use SERIAL instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:02 -04:00
2a73606668 serial: Rename SERIAL_SUPPORT to SERIAL
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 12:26:01 -04:00
73c6ff6aac rtc: Rename RTC_SUPPORT to RTC
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 11:42:41 -04:00
15042e7b9b pch: Rename PCH_SUPPORT to PCH
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04 11:42:41 -04:00
103c5f1806 mmc: Rename MMC_SUPPORT to MMC
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup some incorrect renames]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-04 11:42:41 -04:00
a48f5ff4f5 Merge branch '2021-09-03-xyz-modem-fixes' into next
- Assorted x/y/z modem fixes from Pali
2021-09-03 17:15:44 -04:00
dffeb40098 xyz-modem: Allow to cancel transfer also by CTRL+C
Currently it is possible to cancel loadx and loady commands by pressing
CTRL+X (CAN character) at least 3 times quickly.

All other U-Boot commands, including loadb and loads can be cancelled by
CTRL+C. So allow it also in xyz-modem code used by loadx and loady
commands. Implement it by handling CTRL+C (ETX character) in the same way
as CTRL+X (CAN character).

Due to how x/y-modem protocol works, it is required to press
CTRL+C or CTRL+X at least 3 times quickly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-03 14:32:41 -04:00
c97b2557bc xyz-modem: Show information about finished transfer
Show "## Start Addr" or "## Binary (...) download aborted" information like
in Kermit "loadb" command.

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-09-03 14:32:41 -04:00
081bd249d1 xyz-modem: Properly abort/terminate transfer on error
Transfer termination tries to instruct sender that transfer was terminated.

Print error message and indicates aborted transfer in return value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-03 14:32:41 -04:00
1f26c49ea1 xyz-modem: Close stream after processing/sending terminate sequence
Obviously it is not possible to send terminate sequence over stream after
closing stream.

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-09-03 14:32:41 -04:00
f05d69bd0a xyz-modem: Put xyzModem_stream_close debug diagnostic message into ZM_DEBUG()
This is how all other debug / diagnostic messages are handled.

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-09-03 14:32:40 -04:00
15c27a5a22 xyz-modem: Fix x-modem "xyzModem_eof error" at the end of file
In x-modem protocol EOF is not an error state at the end of file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-03 14:32:40 -04:00
1e7478461b xyz-modem: Fix crash after cancelling transfer
Variable xyz.len is set to -1 on error. At the end xyzModem_stream_read()
function calls memcpy() with length from variable xyz.len. If this variable
is set to -1 then value passed to memcpy is casted to unsigned value, which
means to copy whole address space. Which then cause U-Boot crash. E.g. on
arm64 it cause CPU crash: "Synchronous Abort" handler, esr 0x96000006

Fix this issue by checking that value stored in xyz.len is valid prior
trying to use it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-03 14:32:40 -04:00
0017931971 Revert most of the series for adding vexpress_aemv8r support
Per a request from Andre Przywara and agreed with by Peter Hoyes, the
vexpress aemv8r support wasn't quite ready to be merged, but the
discussion had moved off list.  We should keep the first patch in the
series for now, but revert the rest.  This reverts the following
commits:

e0bd6f31ce doc: Add documentation for the Arm vexpress board configs
30e5a449e8 arm: Use armv8_switch_to_el1 env to switch to EL1
b53bbca63b vexpress64: Add BASER_FVP vexpress board variant
2f5b7b7490 armv8: Add ARMv8 MPU configuration logic
37a757e227 armv8: Ensure EL1&0 VMSA is enabled

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-03 10:42:15 -04:00
b35be5ed42 Merge branch '2021-09-02-assorted-platform-and-bugfixes' into next
- Add position independent execution support for ARMv7
- Snapdragon, synquacer, vexpress64 fixes / improvements
- Prevent NEON register use on ARMv8
- Other assorted fixes
2021-09-02 18:39:28 -04:00
6628813f9d tools: env: Handle shorter read calls
On some cases, the actual number of bytes read can be shorter
than what was requested. This can be handled gracefully by
taking this difference into account instead of exiting.

Signed-off-by: Thibault Ferrante <thibault.ferrante@gmail.com>
2021-09-02 11:19:58 -04:00
7befc8490a psci: fix double declaration
The prototype of psci_features() duplicated. Remove extra declaration.

Fixed: e21e3ffdd1 ("psci: Fix warnings when compiling with W=1")
Reported-by: Michael Scott <mike@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-09-02 11:19:58 -04:00
2cb32607e1 pci: iproc: fix compilation errors and warnings
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
2021-09-02 11:19:58 -04:00
210985b5e5 mailmap: Update e-mail for Jernej Skrabec
Old address doesn't exist anymore. Map it to new one.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2021-09-02 11:19:58 -04:00
f43312c974 ARM: Prevent the compiler from using NEON registers
For ARMv8-A, NEON is standard, so the compiler can use it even when no
special target flags are provided. For example, it can use stores from
NEON registers to zero-initialize large structures. GCC 11 decides to
do this inside the DRAM init code for the Allwinner H6.

However, GCC 11 has a bug where it generates misaligned NEON register
stores even with -mstrict-align. Since the MMU is not enabled this early
in SPL, the misaligned store causes an exception and breaks booting.

Work around this issue by restricting the compiler to using GPRs only,
not vector registers. This prevents any future surprises relating to
NEON use as well.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
2021-09-02 11:19:58 -04:00
e0bd6f31ce doc: Add documentation for the Arm vexpress board configs
Create a new documentation section for Arm Ltd boards with a sub-page
for the vexpress board (FVP-A, FVP-R and Juno).

Document how the armv8_switch_to_el1 environment variable can be used
to switch between booting from S-EL2/S-EL1 at runtime on the BASER_FVP.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-09-02 11:19:57 -04:00
30e5a449e8 arm: Use armv8_switch_to_el1 env to switch to EL1
Use the environment variable armv8_switch_to_el1 to determine whether
to switch to EL1 at runtime. This is an alternative to the
CONFIG_ARMV8_SWITCH_TO_EL1 compile-time option.

The environment variable will be ineffective if the ARMV8_MULTIENTRY
config is used.

This is required by the Armv8r64 architecture, which must be able to
boot at S-EL1 for Linux but may need to boot at other ELs for other
systems.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-09-02 10:17:45 -04:00
b53bbca63b vexpress64: Add BASER_FVP vexpress board variant
The BASER_FVP board variant is implemented on top of the BASE_FVP board
config (which, in turn, is based on the Juno Versatile Express board
config). They all share a similar memory map - for BASER_FVP the map is
inverted from the BASE_FVP
(https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map)

 * Create new TARGET_VEXPRESS64_BASER_FVP target, which uses the same
   board config as BASE_FVP and JUNO
 * Adapt vexpress_aemv8a.h header file to support BASER_FVP (and rename
   to vexpress_aemv8.h)
 * Enable config to switch to EL1 for the BASER_FVP
 * Create vexpress_aemv8r defconfig
 * Provide an MPU memory map for the BASER_FVP

For now, only single core boot is supported.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[trini: Add MAINTAINERS, move BOOTCOMMAND to defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-02 10:17:45 -04:00
2f5b7b7490 armv8: Add ARMv8 MPU configuration logic
Armv8r64 is the first Armv8 platform that only has a PMSA at the
current exception level. The architecture supplement for Armv8r64
describes new fields in ID_AA64MMFR0_EL1 which can be used to detect
whether a VMSA or PMSA is present. These fields are RES0 on Armv8a.

Add logic to read these fields and, for the protection of the memory
used by U-Boot, initialize the MPU instead of the MMU during init, then
clear the MPU regions before transition to the next stage.

Provide a default (blank) MPU memory map, which can be overridden by
board configurations.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-09-02 10:17:45 -04:00
37a757e227 armv8: Ensure EL1&0 VMSA is enabled
On Armv8-R, the EL1&0 memory system architecture is configurable as a
VMSA or PMSA, and resets to an "architecturally unknown" value.

Add code to armv8_switch_to_el1_m which detects whether the MSA at
EL1&0 is configurable using the id_aa64mmfr0_el1 register MSA fields.
If it is we must ensure the VMSA is enabled so that a rich OS can boot.

The MSA and MSA_FRAC fields are described in the Armv8-R architecture
profile supplement (section G1.3.7):
https://developer.arm.com/documentation/ddi0600/latest/

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-09-02 10:17:45 -04:00
53b40e8d54 armv8: Disable pointer authentication traps for EL1
The use of ARMv8.3 pointer authentication (PAuth) is governed by fields
in HCR_EL2, which trigger a 'trap to EL2' if not enabled. The reset
value of these fields is 'architecturally unknown' so we must ensure
that the fields are enabled (to disable the traps) if we are entering
the kernel at EL1.

The APK field disables PAuth instruction traps and the API field
disables PAuth register traps

Add code to disable the traps in armv8_switch_to_el1_m. Prior to doing
so, it checks fields in the ID_AA64ISAR1_EL1 register to ensure pointer
authentication is supported by the hardware.

The runtime checks require a second temporary register, so add this to
the EL1 transition macro signature and update 2 call sites.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2021-09-02 10:17:45 -04:00
99a2bd65f1 Revert "configs: synquacer: Make U-Boot binary position independent"
This reverts commit f7e16bb0c5, since
the U-Boot doesn't boot if it is booted directly from SPI-NOR with
CONFIG_POSITION_INDEPENDENT=y. Unless fixing this issue, it is better
to revert this change.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-09-02 10:17:45 -04:00
c8291f53b0 lib: add crc16.o if CONFIG_MMC_SPI_CRC_ON for SPL build
CONFIG_MMC_SPI_CRC_ON needs the crc16 functions, but it was not included
in an SPL build.  For non-SPL builds, crc16.o is already added
unconditionally.  This also removes CONFIG_SPL_YMODEM_SUPPORT from the
sifive board configs, which is only relevant for some ARM boards and was
only set for its side effect of adding crc16.o.
2021-09-02 10:17:45 -04:00
d9d8849183 cmd/part: correct alignment of partition list
When running 'part list' for an ISO partition the numbers are not under the
labels.

Correct the alignment of the ISO partition list. With the patch the
output looks like:

    Part   Start     Sect x Size Type
      1     3720     5024    512 U-Boot

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-02 09:48:20 -04:00
15dd941202 arm: mach-snapdrgon: misc: Simplify msm_generate_mac_addr()
The logic in msm_generate_mac_addr() was originally taken from the LK
bootloader where the serial number is a string and must be parsed first.
However, in U-Boot msm_board_serial() returns an u32 and
msm_generate_mac_addr() has quite complicated code that will first
print it as a hex string and then immediately parse it again.

What this function actually does at the end is to put the serial number
encoded as big endian (the order used for the hex string) into the u8 *mac.
Use put_unaligned_be32() to do that with bit shifts instead of going
through the string format.

This should be slightly more efficient and cleaner but does not result
in any functional difference.

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-02 09:48:20 -04:00
1eb006249e arm: mach-snapdragon: misc: Initialize eMMC if necessary
At the moment U-Boot produces an empty MAC address (02:00:00:00:00:00)
if the eMMC is not used by anything in U-Boot (e.g. with
CONFIG_ENV_IS_NOWHERE=y instead of having the environment on eMMC).
This happens because then there is nothing that actually initializes
the eMMC and reads the "cid" that is later accessed.

To fix this, call mmc_init() to ensure the eMMC is initialized.
There is no functional difference if the eMMC is already initialized
since then mmc_init() will just return without doing anything.

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-02 09:48:20 -04:00
cd82f19985 armv7: Add Position Independent Execution support
A U-Boot image could be loaded and executed at a different
location than it was linked at.

For example, Aspeed takes a stable release version of U-Boot image
as the golden one for recovery purposes. When the primary storage
such as flash is corrupted, the golden image would be loaded to any
SRAM/DRAM address on demands through ethernet/UART/etc and run for
rescue.

To deal with this condition, the PIE is needed as there is only one
signed, golden image, which could be however executed at different
places.

This patch adds the PIE support for ARMv7 platform.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-02 09:48:20 -04:00
aa29b21d62 arm: Fix option dependency with Kconfig language
Use Kconfig 'depends on' instead of #if macro to
express the option depdencies.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-02 09:48:20 -04:00
4bb7de1b3c Merge branch '2021-09-02-assorted-fixes' into next
- Drop old OpenSSL support
- Add DM_HASH support, use it.
- Assorted "stemmy" platform updates
- Various bugfixes
2021-09-02 09:25:43 -04:00
73059529b2 ata: ahci-pci: Add new option CONFIG_SPL_AHCI_PCI
This new option allows to disable ahci-pci driver in SPL. Disabling it is
needed when SPL_PCI is not enabled as ahci-pci depends on PCI.

This change fixes following compile error when CONFIG_SPL_SATA_SUPPORT is
enabled and SPL_PCI is disabled.

    LD      spl/u-boot-spl
  arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.o: in function `ahci_probe_scsi_pci':
  drivers/ata/ahci.c:1205: undefined reference to `dm_pci_map_bar'
  arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.c:1215: undefined reference to `dm_pci_read_config16'
  arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.c:1216: undefined reference to `dm_pci_read_config16'
  arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.c:1220: undefined reference to `dm_pci_map_bar'
  make[1]: *** [scripts/Makefile.spl:512: spl/u-boot-spl] Error 1
  make: *** [Makefile:1977: spl/u-boot-spl] Error 2

    LD      spl/u-boot-spl
  arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci-pci.o: in function `ahci_pci_probe':
  drivers/ata/ahci-pci.c:21: undefined reference to `ahci_probe_scsi_pci'
  make[1]: *** [scripts/Makefile.spl:512: spl/u-boot-spl] Error 1
  make: *** [Makefile:1977: spl/u-boot-spl] Error 2

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 19:25:37 -04:00
20aa320a4f ata: ahci-pci: Fix dependency on DM_PCI
File drivers/ata/ahci-pci.c calls function ahci_probe_scsi_pci() which is
compiled only when DM_PCI is enabled. So add missing dependency into
Kconfig.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 19:25:37 -04:00
223c44904d rtc: ds1307: Fix incorrect clock reset for DS13xx
The ds1307 driver also supports the DS1339 and DS1340.
However, in ds1307_rtc_reset the register writes assume that the chip
is a DS1307. This is evident in the writing of bits SQWE, RS1, RS0 to
the control register. While this applies correctly to the DS1307, on a
DS1340 the control register doesn't contain those bits (instead, the
register is used for clock calibration). By writing these bits the
clock calibration will be changed and the chip can become
non-functional after a reset call.

Signed-off-by: Callum Sinclair <callum.sinclair@alliedtelesis.co.nz>
2021-09-01 19:25:37 -04:00
8956854d48 arm: u8500: Prefer building in thumb mode by default
Enabling CONFIG_SYS_THUMB_BUILD produces a significantly smaller
U-Boot binary (250 KiB vs 320 KiB) that still seems to be fully
functional. Make use of that by default but keep it as "imply" so it
can be disabled for testing in case this causes trouble for someone.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
f629895fa3 board: stemmy: Update documentation
Over the time, the "stemmy" U-Boot board was tested on several other
Samsung smartphones based on ST-Ericsson NovaThor Ux500. Convert the
documentation to reStructuredText at doc/board/ste/stemmy.rst and
make the device list complete. Also note that the board now boots
into USB Fastboot instead of just ending up at the U-Boot prompt.

The device table is mostly taken from the postmarketOS wiki article
(https://wiki.postmarketos.org/wiki/ST-Ericsson_NovaThor_U8500).
All the newly added devices were tested by Linus Walleij.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
f64011e11e board: stemmy: Add basic Fastboot support
Make use of the new drivers for ARM U8500 introduced in the U-Boot
2021.10 merge window by adding basic support for USB Fastboot with
the "stemmy" board. As a first step this will always boot directly
into USB Fastboot for now with the console displayed on the screen
to make that obvious.

Samsung uses quite strange GPT partition labels on these boards,
so also add a bunch of fastboot_partition_alias_* to make this more
easy to use.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
fc9d4b123d arm: dts: u8500: u-boot: Add fixed clock for eMMC
So far there is no need for a clock driver in U-Boot because the
previous boot stage leaves all the necessary clocks on. However,
some drivers in U-Boot (e.g. arm_pl180_mmci) depend on having a clock
driver to obtain the clock frequency.

Setting up the clock drivers properly is a bit tricky on U8500,
so for now add a simple fixed-clock for the eMMC that allows obtaining
the clock frequency. This should be replaced eventually if some board
actually requires enabling some of the clocks.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
1ae43a0e23 arm: dts: u8500: Update from Linux ux500-dts-for-v5.15
Update ste-dbx5x0.dtsi, ste-ab8500.dtsi and ste-ab8505.dtsi with
the changes made in upstream Linux. They are taken from
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git/
branch "ux500-dts-for-v5.15" (pending merge for Linux 5.15).

The only relevant change for U-Boot here is
"ARM: dts: ux500: ab8500: Link USB PHY to USB controller node" [1]
which links the USB PHY to the USB controller. This is necessary on
U-Boot because the PHY driver is implemented as part of the generic
PHY subsystem that makes use of these bindings.

[1]: https://lore.kernel.org/linux-arm-kernel/20210709182234.47232-1-stephan@gerhold.net/

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
9f78ccf186 arm: u8500: Imply options for new drivers
Imply the options for new drivers added for ARM U8500 during the
U-Boot 2021.10 merge window. Adding these as "imply" in the Kconfig
avoids having to add them to all the board defconfigs but still allows
disabling them if wanted.

Also select DM_USB_GADGET if DM_USB is selected because otherwise
the Ux500 MUSB glue driver does not show up in the configuration.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
7093df3c75 MAINTAINERS: Add new drivers for ARM U8500
Update MAINTAINERS with various drivers for ARM U8500 that were
added during the U-Boot 2021.10 merge window.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
515381414d loadb: Properly indicate aborted kermit transfer
When k_recv() returns zero it indicates that kermit transfer was aborted.
Function do_load_serial_bin() (caller of load_serial_bin()) interprets
value ~0 as aborted transfer, so properly propagates information about
aborted transfer from k_recv() to do_load_serial_bin().

Signed-off-by: Pali Rohár <pali@kernel.org>
2021-09-01 19:25:37 -04:00
e199fb35b4 scripts/checkpatch.pl: Resync with v5.13
This resyncs us with the version found in v5.13 of the Linux kernel with
the following exceptions:
- Keep our u-boot specific tests / code area.
- Change the location of checkpatch.rst (which we now import)
- Drop the "use strscpy" test as we don't have that, but do have strlcpy
  and want that used now.
- Keep debug/printf in the list for $logFunctions

And note that we now also include the spdxcheck.py tool that
checkpatch.pl supports calling out to, and include upstream's
checkpatch.rst in our develop section of the documentation.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-01 19:25:37 -04:00
eaa6442e4f mkimage: clarify error message for empty input files
Currently, an empty imput file causes `mmap()` to fail, and you get an
error like "mkimage: Can't read file.img: Invalid argument", which is
extremely unintuitive and hard to diagnose if you don't know what to
look for. Add an explicit check for an empty file and provide a clear
error message instead.

We already bounds check the image size when listing and re-signing
existing images, so we only need this check here, when opening data
files going into a image.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-01 19:25:37 -04:00
295ab733df lib: -Wformat-truncation in rsa_engine_get_priv_key
With glibc 2.33 (Ubuntu package glibc6 2.33-0ubuntu9) building
sifive_unmatched_defconfig results in:

In file included from /usr/include/stdio.h:866,
                  from ././include/compiler.h:26,
                  from <command-line>:
In function ‘snprintf’,
     inlined from ‘rsa_engine_get_priv_key’ at ./tools/../^:273:4:
/usr/include/riscv64-linux-gnu/bits/stdio2.h:71:10: warning:
‘%s’ directive argument is null [-Wformat-truncation=]
    71 |   return __builtin___snprintf_chk (__s, __n,
__USE_FORTIFY_LEVEL - 1,
       |
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    72 |        __glibc_objsize (__s), __fmt,
       |        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    73 |        __va_arg_pack ());
       |        ~~~~~~~~~~~~~~~~~

Avoid passing a NULL string.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-01 19:25:37 -04:00
ca47955a66 fit: Use DM hash driver if supported
Calculate hash using DM driver if supported.
For backward compatibility, the call to legacy
hash functions is reserved.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-01 19:25:37 -04:00
e5d870fa1e crypto: hash: Add software hash DM driver
Add purely software-implmented drivers to support multiple
hash operations including CRC, MD5, and SHA family.

This driver is based on the new hash uclass.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-01 19:25:37 -04:00
4deaff791c dm: hash: Add new UCLASS_HASH support
Add UCLASS_HASH for hash driver development. Thus the
hash drivers (SW or HW-accelerated) can be developed
in the DM-based fashion.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-01 19:25:37 -04:00
74bda4fe3d lib/md5: Export progressive APIs
Export the MD5 hash init/update/finish progressive APIs
for better flexibility.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-09-01 19:25:37 -04:00
fe68a67a5f lib/rsa: Remove support for OpenSSL < 1.1.0 and libressl < 2.7.0
Older OpenSSL and libressl versions have a slightly different API.
This require #ifdefs to support. However, we still can't support it
because the ECDSA path does not compile with these older versions.
These #ifdefs are truly a vestigial appendage.

Alternatively, the ECDSA path could be updated for older libraries,
but this requires significant extra code, and #ifdefs. Those libraries
are over three years old, and there concerns whether it makes sense to
build modern software for real world use against such old libraries.

Thusly, remove #ifdefs and code for old OpenSSL and LibreSSL support.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-09-01 19:25:37 -04:00
e2e5eec6ce Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next
- Handling all DM watchdogs in watchdog_reset() (Rasmus)
2021-08-31 19:11:15 -04:00
df6cf3d809 Merge branch '2021-08-31-kconfig-migrations-part2' into next
- Further CONFIG to Kconfig migrations
  - Some DDR related symbols
  - CONFIG_SYS_LOAD_ADDR moved, loadaddr always set in environment now.
  - Finish MX7D, convert IMX_CONFIG
  - Some RAMBOOT related options
  - L1 cache size converted and named consistently for all arches.  A
    further follow-up to rename things for even better clarity is welcome.
  - CONFIG_SKIP_LOWLEVEL_INIT, CONFIG_SYS_MALLOC_LEN
2021-08-31 17:55:32 -04:00
b4c2c151b1 Kconfig: Remove all default n/no options
default n/no doesn't need to be specified. It is default option anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
7cfbba36e9 Convert CONFIG_SYS_MALLOC_LEN to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MALLOC_LEN

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:47:49 -04:00
a2ac2b964b Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SKIP_LOWLEVEL_INIT
   CONFIG_SKIP_LOWLEVEL_INIT_ONLY

In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
ab92b38a01 Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage.  For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol.  This lets us remove a little bit of otherwise
unused code.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:47:49 -04:00
e4ddf14305 ls1046ardb_qspi*: Enable RAMBOOT_PBL
Based on include/configs/ls1046ardb.h it seems that CONFIG_RAMBOOT_PBL
should have been enabled, but was not.  Enable and migrate the values to
Kconfig.

Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
d8ef01e964 Convert CONFIG_RAMBOOT_PBL et al to Kconfig
This converts the following to Kconfig:
   CONFIG_RAMBOOT_PBL
   CONFIG_SYS_FSL_PBL_PBI
   CONFIG_SYS_FSL_PBL_RCW

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
ca2b13c885 Convert CONFIG_QSPI_BOOT to Kconfig
This converts the following to Kconfig:
   CONFIG_QSPI_BOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
c224cfd86c Convert CONFIG_SYS_FSL_DDR4 to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR4

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
506eef1521 configs: Remove unused IMX_NAND symbol
The symbol CONFIG_IMX_NAND is not referenced in the code, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:47:49 -04:00
395110284b nitrogen6x: Populate FDTFILE at build-time for all platforms
Rather than using CONFIG_SABRELITE to set FDTFILE for only that
platform, switch to always setting this based on
CONFIG_DEFAULT_DEVICE_TREE as this should always match the kernel
device tree name anyhow.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2021-08-31 17:47:51 -04:00
c278b05bc6 nitrogen6x: Migrate DDR_MB to Kconfig
Move the CONFIG_DDR_MB symbol to Kconfig.  A later clean-up would be to
make dynamic memory size detection work based on how this is done on
other i.MX6 platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2021-08-31 17:47:49 -04:00
c603f6bdc3 Convert CONFIG_SPL to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
148b8bb4b6 imx: Finish migration of IMX_CONFIG to Kconfig
- Provide a default Kconfig value of the default script
- Largely continue to define this via the board Kconfig file
- For the boards that select a script based on defconfig rather than
  TARGET, keep this within the defconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
0c2729edad imx: Introduce CONFIG_MACH_IMX
Currently, there is no over-arching symbol for access to
arch/arm/mach-imx nor the CONFIG symbols that are common over all of
these related platforms.  This new CONFIG symbol will allow us to start
down this path.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
fcadcaa521 Convert CONFIG_MX7D to Kconfig
This converts the following to Kconfig:
   CONFIG_MX7D

Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
49c8ef0e45 Convert CONFIG_SYS_LOAD_ADDR to Kconfig
Now that we have consistent usage, migrate this symbol to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-31 17:46:37 -04:00
72d81360aa global: Convert CONFIG_LOADADDR to CONFIG_SYS_LOADADDR
- In most of the codebase, we reference CONFIG_SYS_LOAD_ADDR and not
  CONFIG_LOADADDR.
- Generally, CONFIG_SYS_LOADADDR is set to CONFIG_LOADADDR and then as
  noted, we use CONFIG_SYS_LOADADDR.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
2f45b3041e qfw: Switch to CONFIG_SYS_LOAD_ADDR from CONFIG_LOADADDR
All platforms define CONFIG_SYS_LOAD_ADDR, but only some define
CONFIG_LOADADDR.  Very very rarely are these not the same address, and
qemu-ppce500 is one such case.  However, based on reading the history of
the code, this mismatched value was simply a copy-paste from other
PowerPC platforms where it is this unused currently.  Switch the code to
use CONFIG_SYS_LOAD_ADDR and update the documentation.

Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-31 17:46:37 -04:00
9582af1afa Convert CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
95372165ae nxp: Migrate a number of DDR related symbols to Kconfig
- Guard most of the options in drivers/ddr/fsl/Kconfig with
  SYS_FSL_DDR || SYS_FSL_MMDC.
- Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER
  to Kconfig.
- Clean up the logic for including the DDR_ECC_CMD code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
efb5dab7ba nxp: Migrate CONFIG_DDR_CLK_FREQ to Kconfig
As this symbol can either be a fixed value or the function
get_board_ddr_clk, migration is tricky.  Introduce a choice of DYNAMIC
or STATIC_DDR_CLK_FREQ.  If DYNAMIC, we continue to use the board
defined get_board_ddr_clk function.  If STATIC, set CONFIG_DDR_CLK_FREQ
to that value and now include/clock_legacy.h contains the function
prototype or defines get_board_ddr_clk() to that static value.  Update
callers to test for DYNAMIC or STATIC.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
222d22a39a ddr: Migrate DDR_SPD to Kconfig
Move the symbol that controls building some JEDEC SPD support functions
to Kconfig.  This is required on the TI keystone 2 platforms and very
frequently (but not always) used on large number of Freescale/NXP
platforms, so use imply there.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
f66a3fde38 mvebe: Migrate CONFIG_DDR_LOG_LEVEL to Kconfig
Move this specific option to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31 17:46:37 -04:00
94752f5fb1 mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
We have a number of CONFIG symbols to express the fixed size of system
memory.  For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
size rather than MiB.

Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <marek.behun@nic.cz>
2021-08-31 17:46:37 -04:00
5b527c505f mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig
Move CONFIG_DDR_32BIT/64BIT to Kconfig as a choice for Armada XP
platforms.  Make 64bit the default as this mirrors the current code.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-31 17:46:37 -04:00
4171c57472 sandbox: add test of wdt-uclass' watchdog_reset()
Check that the watchdog_reset() implementation in wdt-uclass behaves
as expected:

- resets all activated watchdog devices
- leaves unactivated/stopped devices alone
- that the rate-limiting works, with a per-device threshold

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
a9346b93b4 sandbox: add test of wdt_gpio driver
It seems that no other test has claimed gpio_a:7 yet, so use that.

The only small wrinkle is modifying the existing wdt test to use
uclass_get_device_by_driver() since we now have two UCLASS_WDT
instances in play, so it's a little more robust to fetch the device by
driver and not merely uclass+index.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
2ac8490412 watchdog: add gpio watchdog driver
A rather common kind of external watchdog circuit is one that is kept
alive by toggling a gpio. Add a driver for handling such a watchdog.

The corresponding linux driver apparently has support for some
watchdog circuits which can be disabled by tri-stating the gpio, but I
have never actually encountered such a chip in the wild; the whole
point of adding an external watchdog is usually that it is not in any
way under software control. For forward-compatibility, and to make DT
describe the hardware, the current driver only supports devices that
have the always-running property. I went a little back and forth on
whether I should fail ->probe or only ->start, and ended up deciding
->start was the right place.

The compatible string is probably a little odd as it has nothing to do
with linux per se - however, I chose that to make .dts snippets
reusable between device trees used with U-Boot and linux, and this is
the (only) compatible string that linux' corresponding driver and DT
binding accepts. I have asked whether one should/could add "wdt-gpio"
to that binding, but the answer was no:

  https://lore.kernel.org/lkml/CAL_JsqKEGaFpiFV_oAtE+S_bnHkg4qry+bhx2EDs=NSbVf_giA@mail.gmail.com/

If someone feels strongly about this, I can certainly remove the
"linux," part from the string - it probably wouldn't the only place where
one can't reuse a DT snippet as-is between linux and U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
492ee6b8d0 watchdog: wdt-uclass.c: handle all DM watchdogs in watchdog_reset()
A board can have and make use of more than one watchdog device, say
one built into the SOC and an external gpio-petted one. Having
wdt-uclass only handle the first is both a little arbitrary and
unexpected.

So change initr_watchdog() so we visit (probe) all DM watchdog
devices, and call the init_watchdog_dev helper for each.

Similarly let watchdog_reset() loop over the whole uclass - each
having their own ratelimiting metadata, and a separate "is this device
running" flag.

This gets rid of the watchdog_dev member of struct global_data.  We
do, however, still need the GD_FLG_WDT_READY set in
initr_watchdog(). This is because watchdog_reset() can get called
before DM is ready, and I don't think we can call uclass_get() that
early.

The current code just returns 0 if "getting" the first device fails -
that can of course happen because there are no devices, but it could
also happen if its ->probe call failed. In keeping with that, continue
with the handling of the remaining devices even if one fails to
probe. This is also why we cannot use uclass_probe_all().

If desired, it's possible to later add a per-device "u-boot,autostart"
boolean property, so that one can do CONFIG_WATCHDOG_AUTOSTART
per-device.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
1c5aedcd9a board: x530: switch to wdt_stop_all()
Since the gd->watchdog_dev member is going away, switch to using the
new wdt_stop_all() helper.

While here, clean up the preprocessor conditional: The ->watchdog_dev
member is actually guarded by CONFIG_WDT [disabling that in
x530_defconfig while keeping CONFIG_WATCHDOG breaks the build], and in
the new world order so is the existence of the wdt_stop_all()
function.

Actually, existence of wdt_stop_all() depends on CONFIG_${SPL_}WDT, so
really spell the condition using CONFIG_IS_ENABLED, and make it a C
rather than cpp if.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
90555dc83e watchdog: wdt-uclass.c: add wdt_stop_all() helper
Since the watchdog_dev member of struct global_data is going away in
favor of the wdt-uclass handling all watchdog devices, prepare for
that by adding a helper to call wdt_stop() on all known devices.

If an error is encountered, still do wdt_stop() on remaining devices,
but remember and return the first error seen.

Initially, this will only be used in one single
place (board/alliedtelesis/x530/x530.c).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
815529ebe1 sandbox: disable CONFIG_WATCHDOG_AUTOSTART
For the unit tests, it is more convenient if the tests are in charge
of when the watchdog devices are started and stopped, so prevent
wdt-uclass from doing it automatically.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
f1b112afbb watchdog: wdt-uclass.c: keep track of each device's running state
As a step towards handling all DM watchdogs in watchdog_reset(), use a
per-device flag to keep track of whether the device has been started
instead of a bit in gd->flags.

We will still need that bit to know whether we are past
initr_watchdog() and hence have populated gd->watchdog_dev -
incidentally, that is how it was used prior to commit 9c44ff1c5f.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
3eaf6e2e42 watchdog: wdt-uclass.c: refactor initr_watchdog()
In preparation for handling all DM watchdogs in watchdog_reset(), pull
out the code which handles starting (or not) the gd->watchdog_dev
device.

Include the device name in various printfs.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
068f8eafe9 watchdog: wdt-uclass.c: neaten UCLASS_DRIVER definition
The addition of .pre_probe and .per_device_auto made this look
bad. Fix it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
6d24dc89f0 watchdog: wdt-uclass.c: introduce struct wdt_priv
As preparation for having the wdt-uclass provided watchdog_reset()
function handle all DM watchdog devices, and not just the first such,
introduce a uclass-owned struct to hold the reset_period and
next_reset, so these become per-device instead of being static
variables.

No functional change intended.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
8967ebb653 watchdog: wdt-uclass.c: use wdt_start() in wdt_expire_now()
wdt_start() does the "no ->start? return -ENOSYS" check, don't
open-code that in wdt_expire_now().

Also, wdt_start() maintains some global (and later some per-device)
state, which would get out of sync with this direct method call - not
that it matters much here since the board is supposed to reset very
soon.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-08-31 12:04:03 +02:00
8897bf4288 global: Remove unused or unnecessary CONFIG symbols related to DDR
These symbols are now either unused or were only used within the config
file to determine other logic, which could be done in a way that doesn't
further pollute the CONFIG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 19:49:22 -04:00
a85a8e63c5 Merge branch '2021-08-30-kconfig-migrations-part1' into next
- Begin merging some Kconfig migration, and CONFIG namespace cleanup
  series in.  This gives us:
  - A number of I2C symbols migrated over
  - DWC2, i8042, altera_spi and a few other areas updated to use CFG not
    CONFIG for the concept of "configuration space" defines.
  - Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS
  - Some dead code removal.
  - Rename a number of CONFIG symbols that were only referenced within
    the config header to not use CONFIG as a prefix.
2021-08-30 16:56:54 -04:00
809c4f242f Kconfig: Use spaces not tabs in Kconfig entires
While the Kconfig language seems to accept either form of whitespace, we
use a space throughout the project, except in these spots.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:13:28 -04:00
a3e7a3640b astro_mcf5373l: Rework ASTRO_ID logic
Rather than using CONFIG namespace for logic internal to
include/configs/astro_mcf5373l.h to select ASTRO_ID (and populate the
default environment), strip CONFIG from the various options used and
set.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:13:28 -04:00
0c1b10fecc mpc83xx: Update comment
Update the comment here to refer to PCI_CONFIG_ADDRESS rather than
CONFIG_ADDRESS.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30 14:13:28 -04:00
b166f0449c spi: altera_spi: Do not abuse CONFIG namespace
The value CONFIG_ALTERA_SPI_IDLE_VAL is never re-defined by a board.
Rename this to ALTERA_SPI_IDLE_VAL.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30 14:13:28 -04:00
dad7c6652d video: Remove ati_radeon_fb
This driver is currently unused.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30 14:13:28 -04:00
d1240b6ab2 global: Remove dead code that starts with CONFIG_[0-9A]
This removes a number of spots of dead code based on symbols that start
with CONFIG_[0-9] or CONFIG_A.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:13:28 -04:00
b21f965bb0 i8042: Do not abuse CONFIG namespace
This driver uses the CONFIG namespace to set the chips internal CONFIG
namespace related bits.  However, CONFIG is reserved for the top-level
Kconfig based configuration system.  Use CFG as the namespace here
instead to avoid pollution.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30 14:13:28 -04:00
7ae1b0804d ppc: Rework some hard-coded BOOTCOMMANDS
There are an assortment of hard-coded CONFIG_BOOTCOMMAND options in some
board headers.  Rework these so that they do not add to the CONFIG
namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:13:28 -04:00
5afdcca019 arm: Migrate GICV2 / GICV3 to Kconfig
Migrate CONFIG_GICV2 and CONFIG_GICV3 to Kconfig.  We still have the GIC
related registers that need to be handled more cleanly but start by
moving this symbol to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:13:26 -04:00
4d540a3a81 nand: vf610_nfc: Do not abuse CONFIG namespace
This driver uses the CONFIG namespace to set the chips internal CONFIG
namespace related bits.  However, CONFIG is reserved for the top-level
Kconfig based configuration system.  Use CFG as the namespace here
instead to avoid pollution.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30 14:10:08 -04:00
d93d363cb7 varisys: Remove dead code
The platforms this code was for have been removed, drop this support
code as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:08 -04:00
66cc5aebde README: Remove some old i2c related text
These sections are no longer relevant, remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2021-08-30 14:10:08 -04:00
fc8d3b9a2f Convert CONFIG_I2C_SET_DEFAULT_BUS_NUM et al to Kconfig
This converts the following to Kconfig:
   CONFIG_I2C_SET_DEFAULT_BUS_NUM
   CONFIG_I2C_DEFAULT_BUS_NUMBER

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:08 -04:00
81bc599dfa tegra: Cleanup I2C support
Remove the irrelevant section from the README and remove the
non-functional SPL-undef section.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
6d5d0c955e i2c: fsl_i2c: Migrate to Kconfig
- As there are no boards that use different values for speed / slave on
  different buses, use a single option.
- Switch to using the common SYS_I2C_SPEED / SYS_I2C_SLAVE options.
- Introduce _HAS_ options for additional buses as only the first one is
  common to all users.
- Convert all remaining symbols to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
6aa075432e rcar: i2c: Migrate SYS_I2C_SH to Kconfig
- Migrate SYS_I2C_SH and related defines to Kconfig
- Remove currently unused SYS_I2C_SH related defines
- Cleanup related README section.

Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
15e7b76824 Convert CONFIG_SYS_I2C_MXC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_MXC
   CONFIG_SYS_I2C_MXC_I2C1
   CONFIG_SYS_I2C_MXC_I2C2
   CONFIG_SYS_I2C_MXC_I2C3
   CONFIG_SYS_I2C_MXC_I2C4

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
a5752f8a25 Convert CONFIG_SYS_I2C_SPEED et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_SPEED
   CONFIG_SYS_I2C_SLAVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
1edef7693b cmd/i2c.c: Remove unused legacy code
There are no longer any cases where we are neither SYS_I2C_LEGACY nor
DM_I2C.  Remove these code paths.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
38a671d21e i2c: Remove non-DM code from ihs_i2c.c
This driver and it's only user are converted to DM_I2C, remove legacy
code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
14376b8e6c ti: i2c: Convert CONFIG_SYS_OMAP24_I2C to CONFIG_SYS_I2C namespace
The omap24xx I2C driver uses its own CONFIG namespace for common I2C
variables.  Rather than convert more of them to Kconfig, rename these to
the common I2C ones and remove the entirely unused functionality.  As
part of this, we make the am335x_shc platforms consistent with their
intended speed values.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
db157874fc am43xx: Drop non-DM_I2C code
On this platform, we have DM_I2C and SPL_DM_I2C always enabled.
Remove legacy options.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-08-30 14:10:07 -04:00
bbd94278d1 am335x: Drop non-DM_I2C code
On this platform, we have DM_I2C and SPL_DM_I2C always enabled.  Remove
legacy options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
27bedff99d i2c: designware: Remove unused non-DM functionality
There are no users of more than 1 i2c bus in the non-DM case currently.
Remove the additional defines for this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
52c7e37596 Convert CONFIG_SYS_I2C_EARLY_INIT to Kconfig
Convert SYS_I2C_EARLY_INIT to Kconfig, and make it depend on
SPL_SYS_I2C_LEGACY.  Remove the weak implementation as it's either
something that needs to exist for real, or shouldn't be called.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
55dabcc8f2 Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACY
First, we convert CONFIG_SYS_I2C_LEGACY to Kconfig.  Next, as you cannot
have SYS_I2C_LEGACY and DM_I2C at the same time, introduce
CONFIG_SPL_SYS_I2C_LEGACY so that we can enable the legacy option only
in SPL.  Finally, for some PowerPC cases we also need
CONFIG_TPL_SYS_I2C_LEGACY support.  Convert all of the existing users to
one or more symbols.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:07 -04:00
5b4225511e i2c: Remove unused additional legacy soft i2c bus support
Currently the legacy software i2c support is only used for a single bus.
Remove all of the extra and unused support.  Also update the README to
not reference that, and finish removing some already badly auto-edited
related text.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
2656145224 Convert CONFIG_SYS_I2C_MVTWSI to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_MVTWSI

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
de69572569 Convert CONFIG_SYS_I2C_SOFT et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_SOFT
   CONFIG_SYS_I2C_SOFT_SPEED
   CONFIG_SYS_I2C_SOFT_SLAVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
88cd7d0ea9 Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to Kconfig
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR
  based on current usage.
- Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
  CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE
  CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
  to Kconfig.  We move these symbols around a bit and add appropriate
  dependencies to them.  In some cases, we now add a correct default value
  as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
c18afbe0ab eeprom: Drop CONFIG_ENV_EEPROM_IS_ON_I2C usage
At this point in time, there's no systems with "U-Boot environment
exists on an EEPROM which is accessed over the I2C bus" that sets this
option.  Drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
abe50c1c82 cl-som-imx7: Enable CMD_EEPROM
This platform defines everything needed to be able to use the
eeprom command.  In addition, board/compulab/common/eeprom.c is required
by the platform, and does not use CONFIG_ID_EEPROM to enable/disable
builing of it.  In order to migrate CONFIG symbols to Kconfig and to not
have to add complex logic to handle this case, enable CMD_EEPROM on this
board.

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
0283da445a i2c: S3C24X0: Finish Kconfig migration
Finish moving this driver to Kconfig.
- Update the dependency logic for Exynos5 too
- Remove the unused CONFIG_SYS_I2C_S3C24X0_SPEED variable
- Drop CONFIG_SYS_I2C_S3C24X0_SLAVE as it's always set to 0.
- Move the internal SYS_I2C_S3C24X0_SLAVE define closer to the only user.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-30 14:10:05 -04:00
d7d40f614d Convert CONFIG_ID_EEPROM to Kconfig
This converts the following to Kconfig:
   CONFIG_ID_EEPROM

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
433eb4affc siemens: Move CONFIG_SYS_I2C_EEPROM_ADDR usage out of CONFIG namespace
The instances of CONFIG_SYS_I2C_EEPROM_ADDR on these platforms doesn't
match up with the rest of the EERPOM related defines in U-Boot.  Move
these out of the CONFIG namespace rather than make complex Kconfig
logic.

Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2021-08-30 14:10:05 -04:00
d64d1536b8 keymile: Use CONFIG_SYS_IVM_EEPROM_ADR
As the code reads now, making this code path use
CONFIG_SYS_IVM_EEPROM_ADR rather than CONFIG_SYS_I2C_EEPROM_ADDR seems
to make sense as the rest of the EEPROM infrastructure isn't used on
these platforms.

Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
2021-08-30 14:10:05 -04:00
b61d18c07d arm: shc: Change CONFIG_SYS_I2C_EEPROM_ADDR to EEPROM_ADDR
The shc platforms do not make use of the rest of the EEPROM
infrastructure.  Rather than make more elaborate Kconfig logic, remove
this setting from the CONFIG namespace.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-08-30 14:10:05 -04:00
20815ecdcf davinci: Drop CONFIG_MAC_ADDR_IN_EEPROM
Looking over the current boards, there are no users of
CONFIG_MAC_ADDR_IN_EEPROM.  Further, omapl138_lcdk uses
CONFIG_NET_RANDOM_ETHADDR.  Drop various unused code paths.

Cc: Adam Ford <aford173@gmail.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
2a1453695d kp_imx53: Switch to using a local namespace for ID EEPROM
This platform does not use any of the standard EEPROM functionality and
instead provides its own.  Use a local namespace for the I2C related
defines to access the EEPROM.

Cc: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2021-08-30 14:10:05 -04:00
c347e42f43 powerpc: Remove unused FCC ethernet code
This code is no longer used, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
c863204183 exynos: Update environment macros a bit
Rework the default environment a bit to not use non-standard
CONFIG_ENV_... names and similar one-off CONFIG names.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-30 14:10:05 -04:00
90e5e78b1d arm: keystone2: Rename CONFIG_ENV_KS2_BOARD_SETTINGS
Rename CONFIG_ENV_KS2_BOARD_SETTINGS to ENV_KS2_BOARD_SETTINGS so that
it better fits with the rest of the environment addition macros.

Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
eb7d30eaf6 aristainetos2: Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS
Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in
order to not further add to the CONFIG namespace.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-08-30 14:10:05 -04:00
33e8e61694 usb: dwc2: Rename CONFIG_DWC2 namespace to DWC2
There are a number of DWC2 configuration options that are set in dwc2.h
and referenced in dwc2.c only.  Move these out of the CONFIG_DWC2
namespace and in to the DWC2 namespace.  Note that hikey was defining an
option that was already always enabled, so we can remove that hunk.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
3870 changed files with 65449 additions and 41873 deletions

View File

@ -1,8 +1,8 @@
variables:
windows_vm: vs2017-win2016
windows_vm: windows-2019
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210723-30Sep2021
ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20211006-14Nov2021
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@ -169,8 +169,7 @@ jobs:
options: $(container_option)
steps:
- script: |
./tools/buildman/buildman --fetch-arch arm
export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH
export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH
test/nokia_rx51_test.sh
- job: test_py
@ -183,7 +182,7 @@ jobs:
TEST_PY_BD: "sandbox"
sandbox_clang:
TEST_PY_BD: "sandbox"
OVERRIDE: "-O clang-12"
OVERRIDE: "-O clang-13"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
@ -195,6 +194,9 @@ jobs:
evb_ast2500:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
vexpress_ca9x4:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
integratorcp_cm926ejs:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_ID: "--id qemu"
@ -254,6 +256,12 @@ jobs:
r2dplus_tulip:
TEST_PY_BD: "r2dplus"
TEST_PY_ID: "--id tulip_qemu"
sifive_unleashed_sdcard:
TEST_PY_BD: "sifive_unleashed"
TEST_PY_ID: "--id sdcard_qemu"
sifive_unleashed_spi-nor:
TEST_PY_BD: "sifive_unleashed"
TEST_PY_ID: "--id spi-nor_qemu"
xilinx_zynq_virt:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_ID: "--id qemu"
@ -289,7 +297,7 @@ jobs:
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
@ -302,6 +310,18 @@ jobs:
cp /opt/grub/grubriscv64.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_riscv64.efi
cp /opt/grub/grubaa64.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_arm64.efi
cp /opt/grub/grubarm.efi ${UBOOT_TRAVIS_BUILD_DIR}/grub_arm.efi
# create sdcard / spi-nor images for sifive unleashed using genimage
if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
mkdir -p root;
cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .;
cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg;
cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg;
cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
fi
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt

1
.get_maintainer.conf Normal file
View File

@ -0,0 +1 @@
--find-maintainer-files --maintainer-path=.

View File

@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://source.denx.de/u-boot/gitlab-ci-runner
image: trini/u-boot-gitlab-ci-runner:focal-20210723-30Sep2021
image: trini/u-boot-gitlab-ci-runner:focal-20211006-14Nov2021
# We run some tests in different order, to catch some failures quicker.
stages:
@ -23,7 +23,7 @@ stages:
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]] || [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.9/opensbi-0.9-rv-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.9-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin;
fi
@ -40,6 +40,18 @@ stages:
- cp /opt/grub/grubriscv64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_riscv64.efi
- cp /opt/grub/grubaa64.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi
- cp /opt/grub/grubarm.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi
# create sdcard / spi-nor images for sifive unleashed using genimage
- if [[ "${TEST_PY_BD}" == "sifive_unleashed" ]]; then
mkdir -p root;
cp ${UBOOT_TRAVIS_BUILD_DIR}/spl/u-boot-spl.bin .;
cp ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.itb .;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_sdcard.cfg;
cp images/sdcard.img ${UBOOT_TRAVIS_BUILD_DIR}/;
rm -rf tmp;
genimage --inputpath . --config board/sifive/unleashed/genimage_spi-nor.cfg;
cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
fi
- virtualenv -p /usr/bin/python3 /tmp/venv
- . /tmp/venv/bin/activate
- pip install -r test/py/requirements.txt
@ -165,8 +177,7 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
Run tests for Nokia RX-51 (aka N900):
stage: testsuites
script:
- ./tools/buildman/buildman --fetch-arch arm;
export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH;
- export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH;
test/nokia_rx51_test.sh
# Test sandbox with test.py
@ -178,7 +189,7 @@ sandbox test.py:
sandbox with clang test.py:
variables:
TEST_PY_BD: "sandbox"
OVERRIDE: "-O clang-12"
OVERRIDE: "-O clang-13"
<<: *buildman_and_testpy_dfn
sandbox_spl test.py:
@ -204,6 +215,12 @@ sandbox_flattree test.py:
TEST_PY_BD: "sandbox_flattree"
<<: *buildman_and_testpy_dfn
vexpress_ca9x4 test.py:
variables:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
<<: *buildman_and_testpy_dfn
integratorcp_cm926ejs test.py:
variables:
TEST_PY_BD: "integratorcp_cm926ejs"
@ -317,6 +334,18 @@ r2dplus_tulip test.py:
TEST_PY_ID: "--id tulip_qemu"
<<: *buildman_and_testpy_dfn
sifive_unleashed_sdcard test.py:
variables:
TEST_PY_BD: "sifive_unleashed"
TEST_PY_ID: "--id sdcard_qemu"
<<: *buildman_and_testpy_dfn
sifive_unleashed_spi-nor test.py:
variables:
TEST_PY_BD: "sifive_unleashed"
TEST_PY_ID: "--id spi-nor_qemu"
<<: *buildman_and_testpy_dfn
xilinx_zynq_virt test.py:
variables:
TEST_PY_BD: "xilinx_zynq_virt"

View File

@ -20,15 +20,19 @@ Allen Martin <amartin@nvidia.com>
Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann <andreas@biessmann.org>
Aneesh V <aneesh@ti.com>
Anup Patel <anup@brainfault.org> <anup.patel@wdc.com>
Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
Dirk Behme <dirk.behme@googlemail.com>
Fabio Estevam <fabio.estevam@nxp.com>
Heinrich Schuchardt <xypron.glpk@gmx.de> <heinrich.schuchardt@canonical.com>
Jagan Teki <402jagan@gmail.com>
Jagan Teki <jaganna@gmail.com>
Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
Markus Klotzbuecher <mk@denx.de>

29
Kconfig
View File

@ -83,7 +83,6 @@ config CC_OPTIMIZE_FOR_SIZE
config OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in full U-Boot"
default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
@ -93,7 +92,6 @@ config OPTIMIZE_INLINING
config SPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in SPL"
depends on SPL
default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
@ -106,7 +104,6 @@ config ARCH_SUPPORTS_LTO
config LTO
bool "Enable Link Time Optimizations"
depends on ARCH_SUPPORTS_LTO
default n
help
This option enables Link Time Optimization (LTO), a mechanism which
allows the compiler to optimize between different compilation units.
@ -127,7 +124,6 @@ config LTO
config TPL_OPTIMIZE_INLINING
bool "Allow compiler to uninline functions marked 'inline' in TPL"
depends on TPL
default n
help
This option determines if U-Boot forces gcc to inline the functions
developers have marked 'inline'. Doing so takes away freedom from gcc to
@ -249,8 +245,11 @@ config SYS_MALLOC_F_LEN
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
depends on ARCH_ZYNQ || ARCH_VERSAL || ARCH_STM32MP || ARCH_ROCKCHIP
default 0x2000000 if ARCH_ROCKCHIP
default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON
default 0x4020000 if ARCH_SUNXI && !MACH_SUN8I_V3S
default 0x200000 if ARCH_BMIPS || X86
default 0x220000 if ARCH_SUNXI && MACH_SUN8I_V3S
default 0x400000
help
This defines memory to be allocated for Dynamic allocation
TODO: Use for other architectures
@ -307,7 +306,6 @@ if EXPERT
config SYS_MALLOC_DEFAULT_TO_INIT
bool "Default malloc to init while reserving the memory for it"
default n
help
It may happen that one needs to move the dynamic allocation
from one to another memory range, eg. when moving the malloc
@ -389,6 +387,20 @@ config SYS_LDSCRIPT
Path within the source tree to the linker script to use for the
main U-Boot binary.
config SYS_LOAD_ADDR
hex "Address in memory to use by default"
default 0x01000000 if ARCH_SOCFPGA
default 0x02000000 if PPC || X86
default 0x22000000 if MACH_SUN9I
default 0x42000000 if ARCH_SUNXI && !MACH_SUN9I
default 0x82000000 if ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
default 0x82000000 if ARCH_MX6 && (MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL)
default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL)
default 0x80800000 if ARCH_MX7
default 0x90000000 if FSL_LSCH2 || FSL_LSCH3
help
Address in memory to use as the default safe load address.
config ERR_PTR_OFFSET
hex
default 0x0
@ -423,7 +435,6 @@ config SYS_HAS_SRAM
default y if TARGET_PIC32MZDASK
default y if TARGET_DEVKIT8000
default y if TARGET_TRICORDER
default n
help
Enable this to allow support for the on board SRAM.
SRAM base address is controlled by CONFIG_SYS_SRAM_BASE.
@ -455,6 +466,8 @@ endmenu # General setup
source "api/Kconfig"
source "boot/Kconfig"
source "common/Kconfig"
source "cmd/Kconfig"

View File

@ -133,7 +133,7 @@ such a program is covered only if its contents constitute a work based
on the Library (independent of the use of the Library in a tool for
writing it). Whether that is true depends on what the Library does
and what the program that uses the Library does.
1. You may copy and distribute verbatim copies of the Library's
complete source code as you receive it, in any medium, provided that
you conspicuously and appropriately publish on each copy an

View File

@ -108,6 +108,15 @@ L: uboot-snps-arc@synopsys.com
F: doc/device-tree-bindings/mmc/snps,dw-mmc.txt
F: drivers/mmc/snps_dw_mmc.c
APPLE M1 SOC SUPPORT
M: Mark Kettenis <kettenis@openbsd.org>
S: Maintained
F: arch/arm/include/asm/arch-m1/
F: arch/arm/mach-apple/
F: configs/apple_m1_defconfig
F: drivers/iommu/apple_dart.c
F: include/configs/apple.h
ARM
M: Tom Rini <trini@konsulko.com>
S: Maintained
@ -312,6 +321,7 @@ F: arch/arm/mach-at91/
F: board/atmel/
F: drivers/cpu/at91_cpu.c
F: drivers/misc/microchip_flexcom.c
F: include/dt-bindings/mfd/atmel-flexcom.h
F: drivers/timer/mchp-pit64b-timer.c
ARM NEXELL S5P4418
@ -390,7 +400,9 @@ F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
F: drivers/phy/msm8916-usbh-phy.c
F: drivers/serial/serial_msm.c
F: drivers/serial/serial_msm_geni.c
F: drivers/smem/msm_smem.c
F: drivers/spmi/spmi-msm.c
F: drivers/usb/host/ehci-msm.c
ARM STI
@ -525,7 +537,12 @@ R: Linus Walleij <linus.walleij@linaro.org>
S: Maintained
F: arch/arm/dts/ste-*
F: arch/arm/mach-u8500/
F: drivers/gpio/nmk_gpio.c
F: drivers/phy/phy-ab8500-usb.c
F: drivers/power/pmic/ab8500.c
F: drivers/timer/nomadik-mtu-timer.c
F: drivers/usb/musb-new/ux500.c
F: drivers/video/mcde_simple.c
ARM UNIPHIER
S: Orphan (Since 2020-09)
@ -650,6 +667,7 @@ F: drivers/mtd/jedec_flash.c
CLOCK
M: Lukasz Majewski <lukma@denx.de>
M: Sean Anderson <seanga2@gmail.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-clk.git
F: drivers/clk/
@ -687,6 +705,20 @@ F: drivers/core/
F: include/dm/
F: test/dm/
EFI APP
M: Simon Glass <sjg@chromium.org>
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
S: Maintained
W: https://u-boot.readthedocs.io/en/latest/develop/uefi/u-boot_on_efi.html
F: board/efi/efi-x86_app
F: configs/efi-x86_app*
F: doc/develop/uefi/u-boot_on_efi.rst
F: drivers/block/efi-media-uclass.c
F: drivers/block/sb_efi_media.c
F: lib/efi/efi_app.c
F: scripts/build-efi.sh
F: test/dm/efi_media.c
EFI PAYLOAD
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
R: Alexander Graf <agraf@csgraf.de>
@ -732,6 +764,18 @@ F: test/env/
F: tools/env*
F: tools/mkenvimage.c
FASTBOOT
S: Orphaned
F: cmd/fastboot.c
F: doc/android/fastboot*.rst
F: include/fastboot.h
F: include/fastboot-internal.h
F: include/net/fastboot.h
F: drivers/fastboot/
F: drivers/usb/gadget/f_fastboot.c
F: net/fastboot.c
F: test/dm/fastboot.c
FPGA
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
@ -750,6 +794,7 @@ F: include/fdt*
F: include/linux/libfdt*
F: cmd/fdt.c
F: common/fdt_support.c
F: scripts/dtc-version.sh
FREEBSD
M: Rafal Jaworowski <raj@semihalf.com>
@ -769,6 +814,16 @@ S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-i2c.git
F: drivers/i2c/
KWBIMAGE / KWBOOT TOOLS
M: Pali Rohár <pali@kernel.org>
M: Marek Behún <marek.behun@nic.cz>
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git
F: doc/README.kwbimage
F: doc/kwboot.1
F: tools/kwb*
LOGGING
M: Simon Glass <sjg@chromium.org>
S: Maintained
@ -1010,6 +1065,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-riscv.git
F: arch/riscv/
F: cmd/riscv/
F: doc/usage/sbi.rst
F: drivers/sysreset/sysreset_sbi.c
F: drivers/timer/andes_plmt_timer.c
F: drivers/timer/sifive_clint_timer.c
F: tools/prelink-riscv.c
@ -1147,6 +1203,11 @@ F: configs/am65x_hs_evm_a53_defconfig
F: configs/j721e_hs_evm_r5_defconfig
F: configs/j721e_hs_evm_a72_defconfig
TPM DRIVERS
M: Ilias Apalodimas <ilias.apalodimas@linaro.org>
S: Maintained
F: drivers/tpm/
TQ GROUP
#M: Martin Krause <martin.krause@tq-systems.de>
S: Orphaned (Since 2016-02)

View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2021
PATCHLEVEL = 10
VERSION = 2022
PATCHLEVEL = 01
SUBLEVEL =
EXTRAVERSION =
NAME =
@ -299,9 +299,7 @@ KBUILD_HOSTLDLIBS := $(HOST_LFS_LIBS) $(HOSTLDLIBS)
# have older compilers as their default, so we make it explicit for
# these that our host tools are GNU11 (i.e. C11 w/ GNU extensions).
CSTD_FLAG := -std=gnu11
ifeq ($(HOSTOS),linux)
KBUILD_HOSTCFLAGS += $(CSTD_FLAG)
endif
ifeq ($(HOSTOS),cygwin)
KBUILD_HOSTCFLAGS += -ansi
@ -327,14 +325,14 @@ os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \
$(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
os_x_after = $(shell if [ $(DARWIN_MAJOR_VERSION) -ge $(1) -a \
$(DARWIN_MINOR_VERSION) -ge $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
$(DARWIN_MINOR_VERSION) -ge $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
# Snow Leopards build environment has no longer restrictions as described above
HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc")
KBUILD_HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
KBUILD_HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
# macOS Mojave (10.14.X)
# macOS Mojave (10.14.X)
# Undefined symbols for architecture x86_64: "_PyArg_ParseTuple"
KBUILD_HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "")
endif
@ -415,7 +413,13 @@ PERL = perl
PYTHON ?= python
PYTHON2 = python2
PYTHON3 ?= python3
DTC ?= $(objtree)/scripts/dtc/dtc
# The devicetree compiler and pylibfdt are automatically built unless DTC is
# provided. If DTC is provided, it is assumed the pylibfdt is available too.
DTC_INTREE := $(objtree)/scripts/dtc/dtc
DTC ?= $(DTC_INTREE)
DTC_MIN_VERSION := 010406
CHECK = sparse
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
@ -804,6 +808,7 @@ HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makef
libs-$(CONFIG_API) += api/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
libs-y += boot/
libs-y += cmd/
libs-y += common/
libs-$(CONFIG_OF_EMBED) += dts/
@ -813,23 +818,9 @@ libs-y += fs/
libs-y += net/
libs-y += disk/
libs-y += drivers/
libs-y += drivers/dma/
libs-y += drivers/gpio/
libs-y += drivers/net/
libs-y += drivers/net/phy/
libs-y += drivers/power/ \
drivers/power/domain/ \
drivers/power/fuel_gauge/ \
drivers/power/mfd/ \
drivers/power/pmic/ \
drivers/power/battery/ \
drivers/power/regulator/
libs-y += drivers/spi/
libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
libs-$(CONFIG_SYS_FSL_MMDC) += drivers/ddr/fsl/
libs-$(CONFIG_$(SPL_)ALTERA_SDRAM) += drivers/ddr/altera/
libs-y += drivers/serial/
libs-y += drivers/usb/cdns3/
libs-y += drivers/usb/dwc3/
libs-y += drivers/usb/common/
@ -957,7 +948,7 @@ INPUTS-$(CONFIG_BINMAN_STANDALONE_FDT) += u-boot.dtb
ifeq ($(CONFIG_SPL_FRAMEWORK),y)
INPUTS-$(CONFIG_OF_SEPARATE) += u-boot-dtb.img
endif
INPUTS-$(CONFIG_OF_HOSTFILE) += u-boot.dtb
INPUTS-$(CONFIG_SANDBOX) += u-boot.dtb
ifneq ($(CONFIG_SPL_TARGET),)
INPUTS-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:"%"=%)
endif
@ -1007,6 +998,9 @@ LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
# ld.lld support
LDFLAGS_u-boot += -z notext
LDFLAGS_u-boot += --build-id=none
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
@ -1101,7 +1095,7 @@ endif
ifeq ($(CONFIG_DEPRECATED),y)
$(warning "You have deprecated configuration options enabled in your .config! Please check your configuration.")
endif
ifeq ($(CONFIG_OF_EMBED),y)
ifeq ($(CONFIG_OF_EMBED)$(CONFIG_EFI_APP),y)
@echo >&2 "===================== WARNING ======================"
@echo >&2 "CONFIG_OF_EMBED is enabled. This option should only"
@echo >&2 "be used for debugging purposes. Please use"
@ -1252,7 +1246,7 @@ binary_size_check: u-boot-nodtb.bin FORCE
echo "u-boot.map shows a binary size of $$map_size" >&2 ; \
echo " but u-boot-nodtb.bin shows $$file_size" >&2 ; \
exit 1; \
fi \
fi; \
fi
ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy)
@ -1306,10 +1300,6 @@ u-boot.ldr: u-boot
# Use 'make BINMAN_VERBOSE=3' to set vebosity level
default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE))
# Tell binman whether we have a devicetree for SPL and TPL
have_spl_dt := $(if $(CONFIG_SPL_OF_PLATDATA),,$(CONFIG_SPL_OF_CONTROL))
have_tpl_dt := $(if $(CONFIG_TPL_OF_PLATDATA),,$(CONFIG_TPL_OF_CONTROL))
quiet_cmd_binman = BINMAN $@
cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
--toolpath $(objtree)/tools \
@ -1323,7 +1313,9 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
-a scp-path=$(SCP) \
-a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \
-a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \
-a spl-dtb=$(have_spl_dt) -a tpl-dtb=$(have_tpl_dt) \
-a spl-dtb=$(CONFIG_SPL_OF_REAL) \
-a tpl-dtb=$(CONFIG_TPL_OF_REAL) \
$(if $(BINMAN_FAKE_EXT_BLOBS),--fake-ext-blobs) \
$(BINMAN_$(@F))
OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex
@ -1352,9 +1344,6 @@ $(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
else
ifneq ($(CONFIG_USE_SPL_FIT_GENERATOR),)
U_BOOT_ITS := u-boot.its
ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-imx/mkimage_fit_atf.sh")
U_BOOT_ITS_DEPS += u-boot-nodtb.bin
endif
ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
U_BOOT_ITS_DEPS += u-boot
endif
@ -1423,7 +1412,7 @@ u-boot-lzma.img: u-boot.bin.lzma FORCE
u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
$(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_OF_HOSTFILE)$(CONFIG_BINMAN_STANDALONE_FDT),dts/dt.dtb) \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX)$(CONFIG_BINMAN_STANDALONE_FDT),dts/dt.dtb) \
,$(UBOOT_BIN)) FORCE
$(call if_changed,mkimage)
$(BOARD_SIZE_CHECK)
@ -1437,7 +1426,7 @@ MKIMAGEFLAGS_u-boot.itb += -B 0x8
ifdef U_BOOT_ITS
u-boot.itb: u-boot-nodtb.bin \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_OF_HOSTFILE),dts/dt.dtb) \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX),dts/dt.dtb) \
$(U_BOOT_ITS) FORCE
$(call if_changed,mkfitimage)
$(BOARD_SIZE_CHECK)
@ -1756,7 +1745,7 @@ endif
# May be overridden by arch/$(ARCH)/config.mk
ifdef CONFIG_LTO
quiet_cmd_u-boot__ ?= LTO $@
cmd_u-boot__ ?= \
cmd_u-boot__ ?= \
$(CC) -nostdlib -nostartfiles \
$(LTO_FINAL_LDFLAGS) $(c_flags) \
$(KBUILD_LDFLAGS:%=-Wl,%) $(LDFLAGS_u-boot:%=-Wl,%) -o $@ \
@ -1769,12 +1758,16 @@ quiet_cmd_u-boot__ ?= LTO $@
-Wl,-Map,u-boot.map; \
$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
else
# Note: Linking efi-x86_app64 causes a segfault in the linker at present
# when using x86_64-linux-gnu-ld.bfd
# For now, disable --whole-archive which makes things link, although not
# correctly
quiet_cmd_u-boot__ ?= LD $@
cmd_u-boot__ ?= $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
-T u-boot.lds $(u-boot-init) \
--whole-archive \
$(if $(CONFIG_EFI_APP_64BIT),,--whole-archive) \
$(u-boot-main) \
--no-whole-archive \
$(if $(CONFIG_EFI_APP_64BIT),,--no-whole-archive) \
$(PLATFORM_LIBS) -Map u-boot.map; \
$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
endif
@ -1907,7 +1900,6 @@ define filechk_timestamp.h
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_DATE "%b %d %C%y"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TZ "%z"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_EPOCH %s'; \
else \
return 42; \
@ -1916,7 +1908,6 @@ define filechk_timestamp.h
LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \
LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C date +'#define U_BOOT_TZ "%z"'; \
LC_ALL=C date +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; \
LC_ALL=C date +'#define U_BOOT_EPOCH %s'; \
fi)
endef
@ -1973,9 +1964,29 @@ endif
endif
# Check dtc and pylibfdt, if DTC is provided, else build them
PHONY += scripts_dtc
scripts_dtc: scripts_basic
$(Q)$(MAKE) $(build)=scripts/dtc
$(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \
$(MAKE) $(build)=scripts/dtc; \
else \
if ! $(DTC) -v >/dev/null; then \
echo '*** Failed to check dtc version: $(DTC)'; \
false; \
else \
if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \
echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \
false; \
else \
if [ -n "$(CONFIG_PYLIBFDT)" ]; then \
if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \
echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \
false; \
fi; \
fi; \
fi; \
fi; \
fi
# ---------------------------------------------------------------------------
quiet_cmd_cpp_lds = LDS $@
@ -2095,7 +2106,7 @@ CLEAN_DIRS += $(MODVERDIR) \
$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
boot* u-boot* MLO* SPL System.map fit-dtb.blob* \
u-boot* MLO* SPL System.map fit-dtb.blob* \
u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \
idbloader.img flash.bin flash.log defconfig keep-syms-lto.c

218
README
View File

@ -144,6 +144,7 @@ Directory Hierarchy:
/xtensa Files generic to Xtensa architecture
/api Machine/arch-independent API for external apps
/board Board-dependent files
/boot Support for images and booting
/cmd U-Boot commands functions
/common Misc architecture-independent functions
/configs Board default configuration files
@ -300,7 +301,6 @@ board_init_r():
- loads U-Boot or (in falcon mode) Linux
Configuration Options:
----------------------
@ -465,10 +465,6 @@ The following options need to be configured:
Board config to use DDR3L. It can be enabled for SoCs with
DDR3L controllers.
CONFIG_SYS_FSL_DDR4
Board config to use DDR4. It can be enabled for SoCs with
DDR4 controllers.
CONFIG_SYS_FSL_IFC_BE
Defines the IFC controller register space as Big Endian
@ -481,15 +477,6 @@ The following options need to be configured:
CONFIG_SYS_FSL_LBC_CLK_DIV
Defines divider of platform clock(clock input to eLBC controller).
CONFIG_SYS_FSL_PBL_PBI
It enables addition of RCW (Power on reset configuration) in built image.
Please refer doc/README.pblimage for more details
CONFIG_SYS_FSL_PBL_RCW
It adds PBI(pre-boot instructions) commands in u-boot build image.
PBI commands can be used to configure SoC before it starts the execution.
Please refer doc/README.pblimage for more details
CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian
@ -599,16 +586,6 @@ The following options need to be configured:
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
This setting is mandatory for all boards that have only one
machine type and must be used to specify the machine type
number as it appears in the ARM machine registry
(see https://www.arm.linux.org.uk/developer/machines/).
Only boards that have multiple machine types supported
in a single configuration file and the machine type is
runtime discoverable, do not have to use this setting.
- vxWorks boot parameters:
bootvx constructs a valid bootline using the following
@ -629,10 +606,6 @@ The following options need to be configured:
controller register space
- Serial Ports:
CONFIG_PL011_SERIAL
Define this if you want support for Amba PrimeCell PL011 UARTs.
CONFIG_PL011_CLOCK
If you have Amba PrimeCell PL011 UARTs, set this variable to
@ -671,11 +644,6 @@ The following options need to be configured:
time on others. This setting #define's the initial
value of the "loads_echo" environment variable.
- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
CONFIG_KGDB_BAUDRATE
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
- Removal of commands
If no commands are needed to boot, you can disable
CONFIG_CMDLINE to remove them. In this case, the command line
@ -702,13 +670,6 @@ The following options need to be configured:
U-Boot needs to get its device tree from somewhere. This can
be done using one of the three options below:
CONFIG_OF_EMBED
If this variable is defined, U-Boot will embed a device tree
binary in its image. This device tree file should be in the
board directory and called <soc>-<board>.dts. The binary file
is then picked up in board_init_f() and made available through
the global data structure as gd->fdt_blob.
CONFIG_OF_SEPARATE
If this variable is defined, U-Boot will build a device tree
binary. It will be called u-boot.dtb. Architecture-specific
@ -860,18 +821,11 @@ The following options need to be configured:
SCSI devices found during the last scan.
- NETWORK Support (PCI):
CONFIG_E1000
Support for Intel 8254x/8257x gigabit chips.
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
This does not do anything useful unless you set at least one
of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
CONFIG_E1000_SPI_GENERIC
Allow generic access to the SPI bus on the Intel 8257x, for
example with the "sspi" command.
CONFIG_NATSEMI
Support for National dp83815 chips.
@ -879,17 +833,6 @@ The following options need to be configured:
Support for National dp8382[01] gigabit chips.
- NETWORK Support (other):
CONFIG_DRIVER_AT91EMAC
Support for AT91RM9200 EMAC.
CONFIG_RMII
Define this to use reduced MII inteface
CONFIG_DRIVER_AT91EMAC_QUIET
If this defined, the driver is quiet.
The driver doen't show link status messages.
CONFIG_CALXEDA_XGMAC
Support for the Calxeda XGMAC device
@ -1031,10 +974,6 @@ The following options need to be configured:
whether the enumeration has succeded at high speed or full
speed.
CONFIG_SYS_CONSOLE_IS_IN_ENV
Define this if you want stdin, stdout &/or stderr to
be set to usbtty.
If you have a USB-IF assigned VendorID then you may wish to
define your own vendor specific values either in BoardName.h
or directly in usbd_vendor_info.h. If you don't define
@ -1246,11 +1185,6 @@ The following options need to be configured:
Support drawing of RLE8-compressed bitmaps on the LCD.
CONFIG_I2C_EDID
Enables an 'i2c edid' command which can read EDID
information over I2C from an attached LCD display.
- MII/PHY support:
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
@ -1461,129 +1395,7 @@ The following options need to be configured:
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
- I2C Support: CONFIG_SYS_I2C_LEGACY
Note: This is deprecated in favour of driver model. Use
CONFIG_DM_I2C instead.
This enable the legacy i2c subsystem, and will allow you to use
i2c commands at the u-boot command line (as long as you set
CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
for defining speed and slave address
- activate second bus with I2C_SOFT_DECLARATIONS2 define
CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
for defining speed and slave address
- activate third bus with I2C_SOFT_DECLARATIONS3 define
CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
for defining speed and slave address
- activate fourth bus with I2C_SOFT_DECLARATIONS4 define
CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
for defining speed and slave address
- drivers/i2c/fsl_i2c.c:
- activate i2c driver with CONFIG_SYS_I2C_FSL
define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
bus.
- If your board supports a second fsl i2c bus, define
CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
CONFIG_SYS_FSL_I2C2_SPEED for the speed and
CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
second bus.
- drivers/i2c/tegra_i2c.c:
- activate this driver with CONFIG_SYS_I2C_TEGRA
- This driver adds 4 i2c buses with a fix speed from
100000 and the slave addr 0!
- drivers/i2c/ppc4xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_PPC4XX
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
- drivers/i2c/i2c_mxc.c
- activate this driver with CONFIG_SYS_I2C_MXC
- enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
- enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
- enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
- enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
- define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
- define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
- define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
- define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
- define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
- define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
- define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
- define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
If those defines are not set, default value is 100000
for speed, and 0 for slave.
- drivers/i2c/rcar_i2c.c:
- activate this driver with CONFIG_SYS_I2C_RCAR
- This driver adds 4 i2c buses
- drivers/i2c/sh_i2c.c:
- activate this driver with CONFIG_SYS_I2C_SH
- This driver adds from 2 to 5 i2c buses
- CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
- CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
- CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
- CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
- CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
- CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
- CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
- CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
- CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
- CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
- CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
- drivers/i2c/omap24xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_OMAP24XX
- CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
- CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
- CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
- CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
- CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
- CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
- CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
- CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
- CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
- CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
- drivers/i2c/s3c24x0_i2c.c:
- activate this driver with CONFIG_SYS_I2C_S3C24X0
- This driver adds i2c buses (11 for Exynos5250, Exynos5420
9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
with a fix speed from 100000 and the slave addr 0!
- drivers/i2c/ihs_i2c.c
- activate this driver with CONFIG_SYS_I2C_IHS
- CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
- CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
- CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
- CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
- CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
- CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
- CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
- CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
- CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
- CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
- CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
- activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
- CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
- CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
- CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
- CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
- CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
- CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
- CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
- CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
additional defines:
- I2C Support:
CONFIG_SYS_NUM_I2C_BUSES
Hold the number of i2c buses you want to use.
@ -2110,9 +1922,6 @@ The following options need to be configured:
CONFIG_SPL
Enable building of SPL globally.
CONFIG_SPL_LDSCRIPT
LDSCRIPT for linking the SPL binary.
CONFIG_SPL_MAX_FOOTPRINT
Maximum size in memory allocated to the SPL, BSS included.
When defined, the linker checks that the actual memory
@ -2167,10 +1976,6 @@ The following options need to be configured:
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
CONFIG_SPL_OS_BOOT
Enable booting directly to an OS from SPL.
See also: doc/README.falcon
CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information
about the running system.
@ -2236,9 +2041,6 @@ The following options need to be configured:
Defines the size and behavior of the NAND that SPL uses
to read U-Boot
CONFIG_SYS_NAND_U_BOOT_OFFS
Location in NAND to read U-Boot from
CONFIG_SYS_NAND_U_BOOT_DST
Location in memory to load U-Boot to
@ -2873,22 +2675,6 @@ Low Level (hardware related) configuration options:
This only takes effect if the memory commands are activated
globally (CONFIG_CMD_MEMORY).
- CONFIG_SKIP_LOWLEVEL_INIT
[ARM, NDS32, MIPS, RISC-V only] If this variable is defined, then certain
low level initializations (like setting up the memory
controller) are omitted and/or U-Boot does not
relocate itself into RAM.
Normally this variable MUST NOT be defined. The only
exception is when U-Boot is loaded (to RAM) by some
other boot loader or by a debugger which performs
these initializations itself.
- CONFIG_SKIP_LOWLEVEL_INIT_ONLY
[ARM926EJ-S only] This allows just the call to lowlevel_init()
to be skipped. The normal CP15 init (such as enabling the
instruction cache) is still performed.
- CONFIG_SPL_BUILD
Set when the currently-running compilation is for an artifact
that will end up in the SPL (as opposed to the TPL or U-Boot

View File

@ -2,7 +2,6 @@ menu "API"
config API
bool "Enable U-Boot API"
default n
help
This option enables the U-Boot API. See api/README for more information.

View File

@ -7,6 +7,27 @@ config HAVE_ARCH_IOREMAP
config NEEDS_MANUAL_RELOC
bool
config SYS_CACHE_SHIFT_4
bool
config SYS_CACHE_SHIFT_5
bool
config SYS_CACHE_SHIFT_6
bool
config SYS_CACHE_SHIFT_7
bool
config SYS_CACHELINE_SIZE
int
default 128 if SYS_CACHE_SHIFT_7
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
default 16 if SYS_CACHE_SHIFT_4
# Fall-back for MIPS
default 32 if MIPS
config LINKER_LIST_ALIGN
int
default 32 if SANDBOX
@ -29,6 +50,7 @@ config ARC
select DM
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SYS_CACHE_SHIFT_7
select TIMER
config ARM
@ -44,6 +66,7 @@ config M68K
select NEEDS_MANUAL_RELOC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
select SYS_CACHE_SHIFT_4
select SUPPORT_OF_CONTROL
config MICROBLAZE
@ -97,7 +120,7 @@ config RISCV
imply SPL_OF_CONTROL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_SERIAL
imply SPL_TIMER
config SANDBOX
@ -122,6 +145,7 @@ config SANDBOX
select SPI
select SUPPORT_OF_CONTROL
select SYSRESET_CMD_POWEROFF
select SYS_CACHE_SHIFT_4
select IRQ
select SUPPORT_EXTENSION_SCAN
imply BITREVERSE
@ -187,6 +211,7 @@ config X86
select OF_CONTROL
select PCI
select SUPPORT_OF_CONTROL
select SYS_CACHE_SHIFT_6
select TIMER
select USE_PRIVATE_LIBGCC
select X86_TSC_TIMER
@ -233,9 +258,9 @@ config X86
imply SPL_PINCTRL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_SERIAL
imply SPL_SPI_FLASH_SUPPORT
imply SPL_SPI_SUPPORT
imply SPL_SPI
imply SPL_OF_CONTROL
imply SPL_TIMER
imply SPL_REGMAP
@ -247,7 +272,7 @@ config X86
imply TPL_PINCTRL
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
imply TPL_SERIAL_SUPPORT
imply TPL_SERIAL
imply TPL_OF_CONTROL
imply TPL_TIMER
imply TPL_REGMAP
@ -325,6 +350,63 @@ config SYS_DISABLE_DCACHE_OPS
Note that, its up to the individual architectures to implement
this functionality.
config SKIP_LOWLEVEL_INIT
bool "Skip the calls to certain low level initialization functions"
depends on ARM || NDS32 || MIPS || RISCV
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
itself into RAM.
Normally this variable MUST NOT be defined. The only exception is
when U-Boot is loaded (to RAM) by some other boot loader or by a
debugger which performs these initializations itself.
config SPL_SKIP_LOWLEVEL_INIT
bool "Skip the calls to certain low level initialization functions"
depends on SPL && (ARM || NDS32 || MIPS || RISCV)
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
itself into RAM.
Normally this variable MUST NOT be defined. The only exception is
when U-Boot is loaded (to RAM) by some other boot loader or by a
debugger which performs these initializations itself.
config TPL_SKIP_LOWLEVEL_INIT
bool "Skip the calls to certain low level initialization functions"
depends on SPL && ARM
help
If enabled, then certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does not relocate
itself into RAM.
Normally this variable MUST NOT be defined. The only exception is
when U-Boot is loaded (to RAM) by some other boot loader or by a
debugger which performs these initializations itself.
config SKIP_LOWLEVEL_INIT_ONLY
bool "Skip the call to lowlevel_init during early boot ONLY"
depends on ARM
help
This allows just the call to lowlevel_init() to be skipped. The
normal CP15 init (such as enabling the instruction cache) is still
performed.
config SPL_SKIP_LOWLEVEL_INIT_ONLY
bool "Skip the call to lowlevel_init during early boot ONLY"
depends on SPL && ARM
help
This allows just the call to lowlevel_init() to be skipped. The
normal CP15 init (such as enabling the instruction cache) is still
performed.
config TPL_SKIP_LOWLEVEL_INIT_ONLY
bool "Skip the call to lowlevel_init during early boot ONLY"
depends on TPL && ARM
help
This allows just the call to lowlevel_init() to be skipped. The
normal CP15 init (such as enabling the instruction cache) is still
performed.
source "arch/arc/Kconfig"
source "arch/arm/Kconfig"
source "arch/m68k/Kconfig"

View File

@ -104,13 +104,11 @@ endchoice
config CPU_BIG_ENDIAN
bool "Enable Big Endian Mode"
default n
help
Build kernel for Big Endian Mode of ARC CPU
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
@ -123,7 +121,6 @@ config SPL_SYS_ICACHE_OFF
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
@ -136,14 +133,12 @@ config SPL_SYS_DCACHE_OFF
menuconfig ARC_DBG
bool "ARC debugging"
default n
if ARC_DBG
config ARC_DBG_IOC_ENABLE
bool "Enable IO coherency unit"
depends on CPU_ARCHS38
default n
help
Enable IO coherency unit to debug problems with caches and
DMA peripherals.

View File

@ -16,9 +16,6 @@
*/
#define ARCH_DMA_MINALIGN 128
/* CONFIG_SYS_CACHELINE_SIZE is used a lot in drivers */
#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
#if defined(ARC_MMU_ABSENT)
#define CONFIG_ARC_MMU_VER 0
#elif defined(CONFIG_ARC_MMU_V2)

View File

@ -8,42 +8,12 @@
#include <env.h>
#include <image.h>
#include <irq_func.h>
#include <lmb.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
static ulong get_sp(void)
{
ulong ret;
asm("mov %0, sp" : "=r"(ret) : );
return ret;
}
void arch_lmb_reserve(struct lmb *lmb)
{
ulong sp;
/*
* Booting a (Linux) kernel image
*
* Allocate space for command line and board info - the
* address should be as high as possible within the reach of
* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
* memory, which means far enough below the current stack
* pointer.
*/
sp = get_sp();
debug("## Current stack ends at 0x%08lx ", sp);
/* adjust sp by 4K to be safe */
sp -= 4096;
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
static int cleanup_before_linux(void)
{
disable_interrupts();
@ -93,7 +63,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
} else {

View File

@ -11,6 +11,7 @@
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/log2.h>
#include <lmb.h>
#include <asm/arcregs.h>
#include <asm/arc-bcr.h>
#include <asm/cache.h>
@ -820,3 +821,16 @@ void sync_n_cleanup_cache_all(void)
__ic_entire_invalidate();
}
static ulong get_sp(void)
{
ulong ret;
asm("mov %0, sp" : "=r"(ret) : );
return ret;
}
void arch_lmb_reserve(struct lmb *lmb)
{
arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096);
}

View File

@ -35,7 +35,7 @@ typedef int HItype __attribute__ ((mode (HI)));
typedef unsigned int UHItype __attribute__ ((mode (HI)));
#if MIN_UNITS_PER_WORD > 1
/* These typedefs are usually forbidden on dsp's with UNITS_PER_WORD 1. */
typedef int SItype __attribute__ ((mode (SI)));
typedef int SItype __attribute__ ((mode (SI)));
typedef unsigned int USItype __attribute__ ((mode (SI)));
#if __SIZEOF_LONG_LONG__ > 4
/* These typedefs are usually forbidden on archs with UNITS_PER_WORD 2. */

View File

@ -9,9 +9,19 @@ config ARM64
select PHYS_64BIT
select SYS_CACHE_SHIFT_6
if ARM64
config ARM64_CRC32
bool "Enable support for CRC32 instruction"
depends on ARM64
default y
help
ARMv8 implements dedicated crc32 instruction for crc32 calculation.
This is faster than software crc32 calculation. This instruction may
not be present on all ARMv8.0, but is always present on ARMv8.1 and
newer.
config POSITION_INDEPENDENT
bool "Generate position-independent pre-relocation code"
depends on ARM64 || CPU_V7A
help
U-Boot expects to be linked to a specific hard-coded address, and to
be loaded to and run from that address. This option lifts that
@ -22,6 +32,7 @@ config POSITION_INDEPENDENT
config INIT_SP_RELATIVE
bool "Specify the early stack pointer relative to the .bss section"
depends on ARM64
default n if ARCH_QEMU
default y if POSITION_INDEPENDENT
help
@ -37,6 +48,7 @@ config INIT_SP_RELATIVE
config SYS_INIT_SP_BSS_OFFSET
int "Early stack offset from the .bss base address"
depends on ARM64
depends on INIT_SP_RELATIVE
default 524288
help
@ -46,6 +58,7 @@ config SYS_INIT_SP_BSS_OFFSET
do not overlap any appended DTB.
config LINUX_KERNEL_IMAGE_HEADER
depends on ARM64
bool
help
Place a Linux kernel image header at the start of the U-Boot binary.
@ -54,19 +67,21 @@ config LINUX_KERNEL_IMAGE_HEADER
image header reports the amount of memory (BSS and similar) that
U-Boot needs to use, but which isn't part of the binary.
if LINUX_KERNEL_IMAGE_HEADER
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
depends on LINUX_KERNEL_IMAGE_HEADER
hex
help
The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
TEXT_OFFSET value written to the Linux kernel image header.
endif
endif
config GICV2
bool
config GICV3
bool
config GIC_V3_ITS
bool "ARM GICV3 ITS"
select REGMAP
select SYSCON
select IRQ
help
ARM GICV3 Interrupt translation service (ITS).
@ -104,7 +119,6 @@ config THUMB2_KERNEL
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
@ -117,7 +131,6 @@ config SPL_SYS_ICACHE_OFF
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
@ -332,21 +345,6 @@ config SYS_ARM_ARCH
default 4 if CPU_SA1100
default 8 if ARM64
config SYS_CACHE_SHIFT_5
bool
config SYS_CACHE_SHIFT_6
bool
config SYS_CACHE_SHIFT_7
bool
config SYS_CACHELINE_SIZE
int
default 128 if SYS_CACHE_SHIFT_7
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
choice
prompt "Select the ARM data write cache policy"
default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
@ -452,12 +450,11 @@ config ENABLE_ARM_SOC_BOOT0_HOOK
config ARM_CORTEX_CPU_IS_UP
bool
default n
config USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy"
default y
depends on !ARM64
default y if !ARM64
depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
help
Enable the generation of an optimized version of memcpy.
Such an implementation may be faster under some conditions
@ -466,7 +463,7 @@ config USE_ARCH_MEMCPY
config SPL_USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy for SPL"
default y if USE_ARCH_MEMCPY
depends on !ARM64 && SPL
depends on SPL
help
Enable the generation of an optimized version of memcpy.
Such an implementation may be faster under some conditions
@ -475,16 +472,43 @@ config SPL_USE_ARCH_MEMCPY
config TPL_USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy for TPL"
default y if USE_ARCH_MEMCPY
depends on !ARM64 && TPL
depends on TPL
help
Enable the generation of an optimized version of memcpy.
Such an implementation may be faster under some conditions
but may increase the binary size.
config USE_ARCH_MEMMOVE
bool "Use an assembly optimized implementation of memmove" if !ARM64
default USE_ARCH_MEMCPY if ARM64
depends on ARM64
help
Enable the generation of an optimized version of memmove.
Such an implementation may be faster under some conditions
but may increase the binary size.
config SPL_USE_ARCH_MEMMOVE
bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
default SPL_USE_ARCH_MEMCPY if ARM64
depends on SPL && ARM64
help
Enable the generation of an optimized version of memmove.
Such an implementation may be faster under some conditions
but may increase the binary size.
config TPL_USE_ARCH_MEMMOVE
bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
default TPL_USE_ARCH_MEMCPY if ARM64
depends on TPL && ARM64
help
Enable the generation of an optimized version of memmove.
Such an implementation may be faster under some conditions
but may increase the binary size.
config USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset"
default y
depends on !ARM64
default y if !ARM64
depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
help
Enable the generation of an optimized version of memset.
Such an implementation may be faster under some conditions
@ -493,7 +517,7 @@ config USE_ARCH_MEMSET
config SPL_USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset for SPL"
default y if USE_ARCH_MEMSET
depends on !ARM64 && SPL
depends on SPL
help
Enable the generation of an optimized version of memset.
Such an implementation may be faster under some conditions
@ -502,7 +526,7 @@ config SPL_USE_ARCH_MEMSET
config TPL_USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset for TPL"
default y if USE_ARCH_MEMSET
depends on !ARM64 && TPL
depends on TPL
help
Enable the generation of an optimized version of memset.
Such an implementation may be faster under some conditions
@ -525,11 +549,6 @@ config ARCH_AT91
select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
select SPL_SEPARATE_BSS if SPL
config TARGET_ASPENITE
bool "Support aspenite"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926EJS
@ -579,11 +598,6 @@ config TARGET_STV0991
select SPI_FLASH
imply CMD_DM
config TARGET_FLEA3
bool "Support flea3"
select CPU_ARM1136
select GPIO_EXTRA_HEADER
config ARCH_BCM283X
bool "Broadcom BCM283X family"
select DM
@ -620,12 +634,16 @@ config ARCH_BCMSTB
select DM
select GPIO_EXTRA_HEADER
select OF_CONTROL
select OF_PRIOR_STAGE
imply CMD_DM
help
This enables support for Broadcom ARM-based set-top box
chipsets, including the 7445 family of chips.
config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
select CPU_V7A
select PL011_SERIAL
config TARGET_BCMCYGNUS
bool "Support bcmcygnus"
select CPU_V7A
@ -723,6 +741,7 @@ config ARCH_KEYSTONE
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
@ -787,6 +806,7 @@ config ARCH_IMX8
select ARM64
select DM
select GPIO_EXTRA_HEADER
select MACH_IMX
select OF_CONTROL
select ENABLE_ARM_SOC_BOOT0_HOOK
@ -794,9 +814,11 @@ config ARCH_IMX8M
bool "NXP i.MX8M platform"
select ARM64
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_I2C_MXC
select DM
select SUPPORT_SPL
imply CMD_DM
@ -805,6 +827,7 @@ config ARCH_IMX8ULP
bool "NXP i.MX8ULP platform"
select ARM64
select DM
select MACH_IMX
select OF_CONTROL
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
@ -816,6 +839,7 @@ config ARCH_IMXRT
select DM
select DM_SERIAL
select GPIO_EXTRA_HEADER
select MACH_IMX
select SUPPORT_SPL
imply CMD_DM
@ -823,31 +847,29 @@ config ARCH_MX23
bool "NXP i.MX23 family"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
select MACH_IMX
select PL011_SERIAL
select SUPPORT_SPL
config ARCH_MX25
bool "NXP MX25"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
imply MXC_GPIO
config ARCH_MX28
bool "NXP i.MX28 family"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
select PL011_SERIAL
select MACH_IMX
select SUPPORT_SPL
config ARCH_MX31
bool "NXP i.MX31 family"
select CPU_ARM1136
select GPIO_EXTRA_HEADER
select MACH_IMX
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@ -860,6 +882,7 @@ config ARCH_MX7
select ARCH_MISC_INIT
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@ -871,6 +894,7 @@ config ARCH_MX6
bool "Freescale MX6"
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
@ -887,6 +911,7 @@ config ARCH_MX5
select BOARD_EARLY_INIT_F
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
imply MXC_GPIO
config ARCH_NEXELL
@ -895,6 +920,27 @@ config ARCH_NEXELL
select DM
select GPIO_EXTRA_HEADER
config ARCH_APPLE
bool "Apple SoCs"
select ARM64
select BLK
select CLK
select CMD_USB
select DM
select DM_KEYBOARD
select DM_SERIAL
select DM_USB
select DM_VIDEO
select IOMMU
select LINUX_KERNEL_IMAGE_HEADER
select OF_CONTROL
select OF_BOARD
select POSITION_INDEPENDENT
select USB
imply CMD_DM
imply CMD_GPT
imply DISTRO_DEFAULTS
config ARCH_OWL
bool "Actions Semi OWL SoCs"
select DM
@ -952,6 +998,7 @@ config ARCH_SOCFPGA
select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select DM
select DM_SERIAL
select GICV2
select GPIO_EXTRA_HEADER
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select OF_CONTROL
@ -962,7 +1009,7 @@ config ARCH_SOCFPGA
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
select SPL_SERIAL_SUPPORT
select SPL_SERIAL
select SPL_SYSRESET
select SPL_WATCHDOG
select SUPPORT_SPL
@ -982,11 +1029,11 @@ config ARCH_SOCFPGA
imply SPL_DM_SPI
imply SPL_DM_SPI_FLASH
imply SPL_LIBDISK_SUPPORT
imply SPL_MMC_SUPPORT
imply SPL_MMC
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
imply SPL_SPI_FLASH_SUPPORT
imply SPL_SPI_SUPPORT
imply SPL_SPI
imply L2X0_CACHE
config ARCH_SUNXI
@ -999,6 +1046,7 @@ config ARCH_SUNXI
select DM
select DM_ETH
select DM_GPIO
select DM_I2C if I2C
select DM_KEYBOARD
select DM_MMC if MMC
select DM_SCSI if SCSI
@ -1008,6 +1056,7 @@ config ARCH_SUNXI
select OF_CONTROL
select OF_SEPARATE
select SPECIFY_CONSOLE_INDEX
select SPL_SEPARATE_BSS if SPL
select SPL_STACK_R if SPL
select SPL_SYS_MALLOC_SIMPLE if SPL
select SPL_SYS_THUMB_BUILD if !ARM64
@ -1032,10 +1081,14 @@ config ARCH_SUNXI
imply SPL_GPIO
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_MMC_SUPPORT if MMC
imply SPL_MMC if MMC
imply SPL_POWER
imply SPL_SERIAL_SUPPORT
imply SPL_SERIAL
imply SYSRESET
imply SYSRESET_WATCHDOG
imply SYSRESET_WATCHDOG_AUTO
imply USB_GADGET
imply WDT
config ARCH_U8500
bool "ST-Ericsson U8500 Series"
@ -1044,14 +1097,22 @@ config ARCH_U8500
select DM_GPIO
select DM_MMC if MMC
select DM_SERIAL
select DM_USB_GADGET if DM_USB
select OF_CONTROL
select SYSRESET
select TIMER
imply AB8500_USB_PHY
imply ARM_PL180_MMCI
imply CLK
imply DM_PMIC
imply DM_RTC
imply NOMADIK_GPIO
imply NOMADIK_MTU_TIMER
imply PHY
imply PL01X_SERIAL
imply PMIC_AB8500
imply RTC_PL031
imply SYS_THUMB_BUILD
imply SYSRESET_SYSCON
config ARCH_VERSAL
@ -1062,6 +1123,7 @@ config ARCH_VERSAL
select DM_ETH if NET
select DM_MMC if MMC
select DM_SERIAL
select GICV3
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SOC_DEVICE
@ -1072,6 +1134,7 @@ config ARCH_VF610
bool "Freescale Vybrid"
select CPU_V7A
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
imply MTD_RAW_NAND
@ -1131,6 +1194,7 @@ config ARCH_ZYNQMP
select DM_SPI if SPI
select DM_SPI_FLASH if DM_SPI
select FIRMWARE
select GICV2
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SPL_BOARD_INIT if SPL
@ -1749,7 +1813,6 @@ config ARCH_STM32
select CPU_V7M
select DM
select DM_SERIAL
select GPIO_EXTRA_HEADER
imply CMD_DM
config ARCH_STI
@ -1775,7 +1838,6 @@ config ARCH_STM32MP
select DM_GPIO
select DM_RESET
select DM_SERIAL
select GPIO_EXTRA_HEADER
select MISC
select OF_CONTROL
select OF_LIBFDT
@ -1880,6 +1942,7 @@ config TARGET_DURIAN
config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
select GICV2
config TARGET_XENGUEST_ARM64
bool "Xen guest ARM64"
@ -1891,13 +1954,56 @@ config TARGET_XENGUEST_ARM64
select SSCANF
endchoice
config SUPPORT_PASSING_ATAGS
bool "Support pre-devicetree ATAG-based booting"
depends on !ARM64
imply SETUP_MEMORY_TAGS
help
Support for booting older Linux kernels, using ATAGs rather than
passing a devicetree. This is option is rarely used, and the
semantics are defined at
https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
config SETUP_MEMORY_TAGS
bool "Pass memory size information via ATAG"
depends on SUPPORT_PASSING_ATAGS
config CMDLINE_TAG
bool "Pass Linux kernel cmdline via ATAG"
depends on SUPPORT_PASSING_ATAGS
config INITRD_TAG
bool "Pass initrd starting point and size via ATAG"
depends on SUPPORT_PASSING_ATAGS
config REVISION_TAG
bool "Pass system revision via ATAG"
depends on SUPPORT_PASSING_ATAGS
config SERIAL_TAG
bool "Pass system serial number via ATAG"
depends on SUPPORT_PASSING_ATAGS
config STATIC_MACH_TYPE
bool "Statically define the Machine ID number"
help
When booting via ATAGs, enable this option if we know the correct
machine ID number to use at compile time. Some systems will be
passed the number dynamically by whatever loads U-Boot.
config MACH_TYPE
int "Machine ID number"
depends on STATIC_MACH_TYPE
help
When booting via ATAGs, the machine type must be passed as a number.
For the full list see https://www.arm.linux.org.uk/developer/machines
config ARCH_SUPPORT_TFABOOT
bool
config TFABOOT
bool "Support for booting from TF-A"
depends on ARCH_SUPPORT_TFABOOT
default n
help
Some platforms support the setup of secure registers (for instance
for CPU errata handling) or provide secure services like PSCI.
@ -1932,6 +2038,8 @@ config ISW_ENTRY_ADDR
image headers.
endif
source "arch/arm/mach-apple/Kconfig"
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"
@ -1966,8 +2074,6 @@ source "arch/arm/mach-octeontx2/Kconfig"
source "arch/arm/cpu/armv7/ls102xa/Kconfig"
source "arch/arm/mach-imx/mx2/Kconfig"
source "arch/arm/mach-imx/mx3/Kconfig"
source "arch/arm/mach-imx/mx5/Kconfig"
@ -2048,10 +2154,9 @@ source "board/armltd/total_compute/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/octeontx/Kconfig"
source "board/Marvell/octeontx2/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm963158/Kconfig"

View File

@ -18,7 +18,11 @@ arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
ifeq ($(CONFIG_ARM64_CRC32),y)
arch-$(CONFIG_ARM64) =-march=armv8-a+crc
else
arch-$(CONFIG_ARM64) =-march=armv8-a
endif
# On Tegra systems we must build SPL for the armv4 core on the device
# but otherwise we can use the value in CONFIG_SYS_ARM_ARCH
@ -51,6 +55,7 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_APPLE) += apple
machine-$(CONFIG_ARCH_ASPEED) += aspeed
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM283X) += bcm283x
@ -107,7 +112,7 @@ libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 imx8m imx8 imx8ulp imxrt))
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 imx8m imx8 imx8ulp imxrt))
libs-y += arch/arm/mach-imx/
endif
else

View File

@ -25,6 +25,7 @@ endif
PLATFORM_RELFLAGS += -fno-common -ffixed-r9
PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
$(call cc-option,-mgeneral-regs-only) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# LLVM support
@ -158,7 +159,8 @@ ifdef CONFIG_EFI_LOADER
OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
endif
ifneq ($(CONFIG_IMX_CONFIG),)
ifdef CONFIG_MACH_IMX
ifneq ($(CONFIG_IMX_CONFIG),"")
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
INPUTS-y += SPL
@ -174,6 +176,7 @@ ifneq ($(CONFIG_VF610),)
INPUTS-y += u-boot.vyb
endif
endif
endif
EFI_LDS := elf_arm_efi.lds
EFI_CRT0 := crt0_arm_efi.o

View File

@ -7,4 +7,3 @@ extra-y = start.o
obj-y += ../arm11/
obj-$(CONFIG_MX31) += mx31/
obj-$(CONFIG_MX35) += mx35/

View File

@ -1,11 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
obj-y += generic.o
obj-y += timer.o
obj-y += mx35_sdram.o
obj-y += relocate.o

View File

@ -1,530 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
*/
#include <common.h>
#include <clock_legacy.h>
#include <command.h>
#include <div64.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#ifdef CONFIG_FSL_ESDHC_IMX
#include <fsl_esdhc_imx.h>
#endif
#include <netdev.h>
#include <spl.h>
#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF)
#define CLK_CODE_AHB(c) (((c) >> 8) & 0xFF)
#define CLK_CODE_PATH(c) ((c) & 0xFF)
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
#ifdef CONFIG_FSL_ESDHC_IMX
DECLARE_GLOBAL_DATA_PTR;
#endif
static int g_clk_mux_auto[8] = {
CLK_CODE(1, 3, 0), CLK_CODE(1, 2, 1), CLK_CODE(2, 1, 1), -1,
CLK_CODE(1, 6, 0), CLK_CODE(1, 4, 1), CLK_CODE(2, 2, 1), -1,
};
static int g_clk_mux_consumer[16] = {
CLK_CODE(1, 4, 0), CLK_CODE(1, 3, 1), CLK_CODE(1, 3, 1), -1,
-1, -1, CLK_CODE(4, 1, 0), CLK_CODE(1, 5, 0),
CLK_CODE(1, 8, 1), CLK_CODE(1, 6, 1), CLK_CODE(2, 4, 0), -1,
-1, -1, CLK_CODE(4, 2, 0), -1,
};
static int hsp_div_table[3][16] = {
{4, 3, 2, -1, -1, -1, 1, 5, 4, 3, 2, -1, -1, -1, 1, -1},
{-1, -1, -1, -1, -1, -1, -1, -1, 8, 6, 4, -1, -1, -1, 2, -1},
{3, -1, -1, -1, -1, -1, -1, -1, 3, -1, -1, -1, -1, -1, -1, -1},
};
u32 get_cpu_rev(void)
{
int reg;
struct iim_regs *iim =
(struct iim_regs *)IIM_BASE_ADDR;
reg = readl(&iim->iim_srev);
if (!reg) {
reg = readw(ROMPATCH_REV);
reg <<= 4;
} else {
reg += CHIP_REV_1_0;
}
return 0x35000 + (reg & 0xFF);
}
static u32 get_arm_div(u32 pdr0, u32 *fi, u32 *fd)
{
int *pclk_mux;
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
pclk_mux = g_clk_mux_consumer +
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
} else {
pclk_mux = g_clk_mux_auto +
((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >>
MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET);
}
if ((*pclk_mux) == -1)
return -1;
if (fi && fd) {
if (!CLK_CODE_PATH(*pclk_mux)) {
*fi = *fd = 1;
return CLK_CODE_ARM(*pclk_mux);
}
if (pdr0 & MXC_CCM_PDR0_AUTO_CON) {
*fi = 3;
*fd = 4;
} else {
*fi = 2;
*fd = 3;
}
}
return CLK_CODE_ARM(*pclk_mux);
}
static int get_ahb_div(u32 pdr0)
{
int *pclk_mux;
pclk_mux = g_clk_mux_consumer +
((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >>
MXC_CCM_PDR0_CON_MUX_DIV_OFFSET);
if ((*pclk_mux) == -1)
return -1;
return CLK_CODE_AHB(*pclk_mux);
}
static u32 decode_pll(u32 reg, u32 infreq)
{
u32 mfi = (reg >> 10) & 0xf;
s32 mfn = reg & 0x3ff;
u32 mfd = (reg >> 16) & 0x3ff;
u32 pd = (reg >> 26) & 0xf;
mfi = mfi <= 5 ? 5 : mfi;
mfn = mfn >= 512 ? mfn - 1024 : mfn;
mfd += 1;
pd += 1;
return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
mfd * pd);
}
static u32 get_mcu_main_clk(void)
{
u32 arm_div = 0, fi = 0, fd = 0;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
arm_div = get_arm_div(readl(&ccm->pdr0), &fi, &fd);
fi *= decode_pll(readl(&ccm->mpctl), MXC_HCLK);
return fi / (arm_div * fd);
}
static u32 get_ipg_clk(void)
{
u32 freq = get_mcu_main_clk();
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 pdr0 = readl(&ccm->pdr0);
return freq / (get_ahb_div(pdr0) * 2);
}
static u32 get_ipg_per_clk(void)
{
u32 freq = get_mcu_main_clk();
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 pdr0 = readl(&ccm->pdr0);
u32 pdr4 = readl(&ccm->pdr4);
u32 div;
if (pdr0 & MXC_CCM_PDR0_PER_SEL) {
div = CCM_GET_DIVIDER(pdr4,
MXC_CCM_PDR4_PER0_PODF_MASK,
MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1;
} else {
div = CCM_GET_DIVIDER(pdr0,
MXC_CCM_PDR0_PER_PODF_MASK,
MXC_CCM_PDR0_PER_PODF_OFFSET) + 1;
div *= get_ahb_div(pdr0);
}
return freq / div;
}
u32 imx_get_uartclk(void)
{
u32 freq;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 pdr4 = readl(&ccm->pdr4);
if (readl(&ccm->pdr3) & MXC_CCM_PDR3_UART_M_U)
freq = get_mcu_main_clk();
else
freq = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
freq /= CCM_GET_DIVIDER(pdr4,
MXC_CCM_PDR4_UART_PODF_MASK,
MXC_CCM_PDR4_UART_PODF_OFFSET) + 1;
return freq;
}
unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
{
u32 nfc_pdf, hsp_podf;
u32 pll, ret_val = 0, usb_podf;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 reg = readl(&ccm->pdr0);
u32 reg4 = readl(&ccm->pdr4);
reg |= 0x1;
switch (clk) {
case CPU_CLK:
ret_val = get_mcu_main_clk();
break;
case AHB_CLK:
ret_val = get_mcu_main_clk();
break;
case HSP_CLK:
if (reg & CLKMODE_CONSUMER) {
hsp_podf = (reg >> 20) & 0x3;
pll = get_mcu_main_clk();
hsp_podf = hsp_div_table[hsp_podf][(reg>>16)&0xF];
if (hsp_podf > 0) {
ret_val = pll / hsp_podf;
} else {
puts("mismatch HSP with ARM clock setting\n");
ret_val = 0;
}
} else {
ret_val = get_mcu_main_clk();
}
break;
case IPG_CLK:
ret_val = get_ipg_clk();
break;
case IPG_PER_CLK:
ret_val = get_ipg_per_clk();
break;
case NFC_CLK:
nfc_pdf = (reg4 >> 28) & 0xF;
pll = get_mcu_main_clk();
/* AHB/nfc_pdf */
ret_val = pll / (nfc_pdf + 1);
break;
case USB_CLK:
usb_podf = (reg4 >> 22) & 0x3F;
if (reg4 & 0x200)
pll = get_mcu_main_clk();
else
pll = decode_pll(readl(&ccm->ppctl), MXC_HCLK);
ret_val = pll / (usb_podf + 1);
break;
default:
printf("Unknown clock: %d\n", clk);
break;
}
return ret_val;
}
unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
{
u32 ret_val = 0, pdf, pre_pdf, clk_sel;
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 mpdr2 = readl(&ccm->pdr2);
u32 mpdr3 = readl(&ccm->pdr3);
u32 mpdr4 = readl(&ccm->pdr4);
switch (clk) {
case UART1_BAUD:
case UART2_BAUD:
case UART3_BAUD:
clk_sel = mpdr3 & (1 << 14);
pdf = (mpdr4 >> 10) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case SSI1_BAUD:
pre_pdf = (mpdr2 >> 24) & 0x7;
pdf = mpdr2 & 0x3F;
clk_sel = mpdr2 & (1 << 6);
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
case SSI2_BAUD:
pre_pdf = (mpdr2 >> 27) & 0x7;
pdf = (mpdr2 >> 8) & 0x3F;
clk_sel = mpdr2 & (1 << 6);
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
case CSI_BAUD:
clk_sel = mpdr2 & (1 << 7);
pdf = (mpdr2 >> 16) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case MSHC_CLK:
pre_pdf = readl(&ccm->pdr1);
clk_sel = (pre_pdf & 0x80);
pdf = (pre_pdf >> 22) & 0x3F;
pre_pdf = (pre_pdf >> 28) & 0x7;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
case ESDHC1_CLK:
clk_sel = mpdr3 & 0x40;
pdf = mpdr3 & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case ESDHC2_CLK:
clk_sel = mpdr3 & 0x40;
pdf = (mpdr3 >> 8) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case ESDHC3_CLK:
clk_sel = mpdr3 & 0x40;
pdf = (mpdr3 >> 16) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1);
break;
case SPDIF_CLK:
clk_sel = mpdr3 & 0x400000;
pre_pdf = (mpdr3 >> 29) & 0x7;
pdf = (mpdr3 >> 23) & 0x3F;
ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
decode_pll(readl(&ccm->ppctl), MXC_HCLK)) /
((pre_pdf + 1) * (pdf + 1));
break;
default:
printf("%s(): This clock: %d not supported yet\n",
__func__, clk);
break;
}
return ret_val;
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
case MXC_ARM_CLK:
return get_mcu_main_clk();
case MXC_AHB_CLK:
break;
case MXC_IPG_CLK:
return get_ipg_clk();
case MXC_IPG_PERCLK:
case MXC_I2C_CLK:
return get_ipg_per_clk();
case MXC_UART_CLK:
return imx_get_uartclk();
case MXC_ESDHC1_CLK:
return mxc_get_peri_clock(ESDHC1_CLK);
case MXC_ESDHC2_CLK:
return mxc_get_peri_clock(ESDHC2_CLK);
case MXC_ESDHC3_CLK:
return mxc_get_peri_clock(ESDHC3_CLK);
case MXC_USB_CLK:
return mxc_get_main_clock(USB_CLK);
case MXC_FEC_CLK:
return get_ipg_clk();
case MXC_CSPI_CLK:
return get_ipg_clk();
}
return -1;
}
#ifdef CONFIG_FEC_MXC
/*
* The MX35 has no fuse for MAC, return a NULL MAC
*/
void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
{
memset(mac, 0, 6);
}
u32 imx_get_fecclk(void)
{
return mxc_get_clock(MXC_IPG_CLK);
}
#endif
int do_mx35_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
u32 cpufreq = get_mcu_main_clk();
printf("mx35 cpu clock: %dMHz\n", cpufreq / 1000000);
printf("ipg clock : %dHz\n", get_ipg_clk());
printf("ipg per clock : %dHz\n", get_ipg_per_clk());
printf("uart clock : %dHz\n", mxc_get_clock(MXC_UART_CLK));
return 0;
}
U_BOOT_CMD(
clocks, CONFIG_SYS_MAXARGS, 1, do_mx35_showclocks,
"display clocks",
""
);
#if defined(CONFIG_DISPLAY_CPUINFO)
static char *get_reset_cause(void)
{
/* read RCSR register from CCM module */
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 cause = readl(&ccm->rcsr) & 0x0F;
switch (cause) {
case 0x0000:
return "POR";
case 0x0002:
return "JTAG";
case 0x0004:
return "RST";
case 0x0008:
return "WDOG";
default:
return "unknown reset";
}
}
int print_cpuinfo(void)
{
u32 srev = get_cpu_rev();
printf("CPU: Freescale i.MX35 rev %d.%d at %d MHz.\n",
(srev & 0xF0) >> 4, (srev & 0x0F),
get_mcu_main_clk() / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(struct bd_info *bis)
{
int rc = -ENODEV;
#if defined(CONFIG_FEC_MXC)
rc = fecmxc_initialize(bis);
#endif
return rc;
}
#ifdef CONFIG_FSL_ESDHC_IMX
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC_IMX
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#else
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
}
#define RCSR_MEM_CTL_WEIM 0
#define RCSR_MEM_CTL_NAND 1
#define RCSR_MEM_CTL_ATA 2
#define RCSR_MEM_CTL_EXPANSION 3
#define RCSR_MEM_TYPE_NOR 0
#define RCSR_MEM_TYPE_ONENAND 2
#define RCSR_MEM_TYPE_SD 0
#define RCSR_MEM_TYPE_I2C 2
#define RCSR_MEM_TYPE_SPI 3
u32 spl_boot_device(void)
{
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 rcsr = readl(&ccm->rcsr);
u32 mem_type, mem_ctl;
/* In external mode, no boot device is returned */
if ((rcsr >> 10) & 0x03)
return BOOT_DEVICE_NONE;
mem_ctl = (rcsr >> 25) & 0x03;
mem_type = (rcsr >> 23) & 0x03;
switch (mem_ctl) {
case RCSR_MEM_CTL_WEIM:
switch (mem_type) {
case RCSR_MEM_TYPE_NOR:
return BOOT_DEVICE_NOR;
case RCSR_MEM_TYPE_ONENAND:
return BOOT_DEVICE_ONENAND;
default:
return BOOT_DEVICE_NONE;
}
case RCSR_MEM_CTL_NAND:
return BOOT_DEVICE_NAND;
case RCSR_MEM_CTL_EXPANSION:
switch (mem_type) {
case RCSR_MEM_TYPE_SD:
return BOOT_DEVICE_MMC1;
case RCSR_MEM_TYPE_I2C:
return BOOT_DEVICE_I2C;
case RCSR_MEM_TYPE_SPI:
return BOOT_DEVICE_SPI;
default:
return BOOT_DEVICE_NONE;
}
}
return BOOT_DEVICE_NONE;
}

View File

@ -1,120 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012, Stefano Babic <sbabic@denx.de>
*/
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <linux/types.h>
#include <asm/arch/sys_proto.h>
#define ESDCTL_DDR2_EMR2 0x04000000
#define ESDCTL_DDR2_EMR3 0x06000000
#define ESDCTL_PRECHARGE 0x00000400
#define ESDCTL_DDR2_EN_DLL 0x02000400
#define ESDCTL_DDR2_RESET_DLL 0x00000333
#define ESDCTL_DDR2_MR 0x00000233
#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780
enum {
SMODE_NORMAL = 0,
SMODE_PRECHARGE,
SMODE_AUTO_REFRESH,
SMODE_LOAD_REG,
SMODE_MANUAL_REFRESH
};
#define set_mode(x, en, m) (x | (en << 31) | (m << 28))
static inline void dram_wait(unsigned int count)
{
volatile unsigned int wait = count;
while (wait--)
;
}
void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,
u32 row, u32 col, u32 dsize, u32 refresh)
{
struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR;
u32 *cfg_reg, *ctl_reg;
u32 val;
u32 ctlval;
switch (start_address) {
case CSD0_BASE_ADDR:
cfg_reg = &esdc->esdcfg0;
ctl_reg = &esdc->esdctl0;
break;
case CSD1_BASE_ADDR:
cfg_reg = &esdc->esdcfg1;
ctl_reg = &esdc->esdctl1;
break;
default:
return;
}
/* The MX35 supports 11 up to 14 rows */
if (row < 11 || row > 14 || col < 8 || col > 10)
return;
ctlval = (row - 11) << 24 | (col - 8) << 20 | (dsize << 16);
/* Initialize MISC register for DDR2 */
val = ESDC_MISC_RST | ESDC_MISC_MDDR_EN | ESDC_MISC_MDDR_DL_RST |
ESDC_MISC_DDR_EN | ESDC_MISC_DDR2_EN;
writel(val, &esdc->esdmisc);
val &= ~(ESDC_MISC_RST | ESDC_MISC_MDDR_DL_RST);
writel(val, &esdc->esdmisc);
/*
* according to DDR2 specs, wait a while before
* the PRECHARGE_ALL command
*/
dram_wait(0x20000);
/* Load DDR2 config and timing */
writel(ddr2_config, cfg_reg);
/* Precharge ALL */
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
ctl_reg);
writel(0xda, start_address + ESDCTL_PRECHARGE);
/* Load mode */
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
ctl_reg);
writeb(0xda, start_address + ESDCTL_DDR2_EMR2); /* EMRS2 */
writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
writeb(0xda, start_address + ESDCTL_DDR2_RESET_DLL); /* Reset DLL */
/* Precharge ALL */
writel(set_mode(ctlval, 1, SMODE_PRECHARGE),
ctl_reg);
writel(0xda, start_address + ESDCTL_PRECHARGE);
/* Set mode auto refresh : at least two refresh are required */
writel(set_mode(ctlval, 1, SMODE_AUTO_REFRESH),
ctl_reg);
writel(0xda, start_address);
writel(0xda, start_address);
writel(set_mode(ctlval, 1, SMODE_LOAD_REG),
ctl_reg);
writeb(0xda, start_address + ESDCTL_DDR2_MR);
writeb(0xda, start_address + ESDCTL_DDR2_OCD_DEFAULT);
/* OCD mode exit */
writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */
/* Set normal mode */
writel(set_mode(ctlval, 1, SMODE_NORMAL) | refresh,
ctl_reg);
dram_wait(0x20000);
/* Do not set delay lines, only for MDDR */
}

View File

@ -1,22 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* relocate - i.MX35-specific vector relocation
*
* Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
*/
#include <linux/linkage.h>
/*
* The i.MX35 SoC is very specific with respect to exceptions: it
* does not provide RAM at the high vectors address (0xFFFF0000),
* thus only the low address (0x00000000) is useable; but that is
* in ROM, so let's avoid relocating the vectors.
*/
.section .text.relocate_vectors,"ax",%progbits
ENTRY(relocate_vectors)
bx lr
ENDPROC(relocate_vectors)

View File

@ -1,46 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*/
#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/ptrace.h>
/* General purpose timers bitfields */
#define GPTCR_SWR (1<<15) /* Software reset */
#define GPTCR_FRR (1<<9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
#define GPTCR_TEN (1) /* Timer enable */
/*
* nothing really to do with interrupts, just starts up a counter.
* The 32KHz 32-bit timer overruns in 134217 seconds
*/
int timer_init(void)
{
int i;
struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
/* setup GP Timer 1 */
writel(GPTCR_SWR, &gpt->ctrl);
writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
for (i = 0; i < 100; i++)
writel(0, &gpt->ctrl); /* We have no udelay by now */
writel(0, &gpt->pre); /* prescaler = 1 */
/* Freerun Mode, 32KHz input */
writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
&gpt->ctrl);
writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
return 0;
}

View File

@ -39,7 +39,7 @@ reset:
msr cpsr,r0
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@ -62,7 +62,7 @@ c_runtime_cpu_setup:
*
*************************************************************************
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@ -81,7 +81,7 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* Jump to board specific initialization... The Mask ROM will have already initialized
* basic memory. Go here to bump up clock rate and handle wake up conditions.
@ -91,4 +91,4 @@ cpu_init_crit:
mov lr, ip /* restore link */
#endif
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */

View File

@ -37,8 +37,8 @@ reset:
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
!defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
!CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
bl cpu_init_crit
#endif
@ -62,8 +62,8 @@ c_runtime_cpu_setup:
*************************************************************************
*/
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
!defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
!CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
cpu_init_crit:
mov ip, lr
@ -76,4 +76,4 @@ cpu_init_crit:
mov lr, ip
mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */

View File

@ -35,25 +35,11 @@ reset:
orr r0, r0, #0xd3
msr cpsr, r0
#if defined(CONFIG_AT91RM9200DK)
/*
* relocate exception table
*/
ldr r0, =_start
ldr r1, =0x0
mov r2, #16
copyex:
subs r2, r2, #1
ldr r3, [r0], #4
str r3, [r1], #4
bne copyex
#endif
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@ -78,7 +64,7 @@ c_runtime_cpu_setup:
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@ -97,7 +83,7 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
@ -109,4 +95,4 @@ cpu_init_crit:
mov lr, ip
#endif
mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */

View File

@ -12,8 +12,6 @@ extra-y :=
endif
endif
obj-$(CONFIG_ARMADA100) += armada100/
obj-$(CONFIG_MX25) += mx25/
obj-$(CONFIG_MX27) += mx27/
obj-$(if $(filter mxs,$(SOC)),y) += mxs/
obj-$(if $(filter spear,$(SOC)),y) += spear/

View File

@ -1,7 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2010
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
obj-y = cpu.o timer.o dram.o

View File

@ -1,93 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
* Contributor: Mahavir Jain <mjain@marvell.com>
*/
#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/arch/cpu.h>
#include <asm/arch/armada100.h>
#define UARTCLK14745KHZ (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1))
#define SET_MRVL_ID (1<<8)
#define L2C_RAM_SEL (1<<4)
int arch_cpu_init(void)
{
u32 val;
struct armd1cpu_registers *cpuregs =
(struct armd1cpu_registers *) ARMD1_CPU_BASE;
struct armd1apb1_registers *apb1clkres =
(struct armd1apb1_registers *) ARMD1_APBC1_BASE;
struct armd1mpmu_registers *mpmu =
(struct armd1mpmu_registers *) ARMD1_MPMU_BASE;
/* set SEL_MRVL_ID bit in ARMADA100_CPU_CONF register */
val = readl(&cpuregs->cpu_conf);
val = val | SET_MRVL_ID;
writel(val, &cpuregs->cpu_conf);
/* Enable Clocks for all hardware units */
writel(0xFFFFFFFF, &mpmu->acgr);
/* Turn on AIB and AIB-APB Functional clock */
writel(APBC_APBCLK | APBC_FNCLK, &apb1clkres->aib);
/* ensure L2 cache is not mapped as SRAM */
val = readl(&cpuregs->cpu_conf);
val = val & ~(L2C_RAM_SEL);
writel(val, &cpuregs->cpu_conf);
/* Enable GPIO clock */
writel(APBC_APBCLK, &apb1clkres->gpio);
#ifdef CONFIG_I2C_MV
/* Enable general I2C clock */
writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
/* Enable power I2C clock */
writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
#endif
/*
* Enable Functional and APB clock at 14.7456MHz
* for configured UART console
*/
#if (CONFIG_SYS_NS16550_COM1 == ARMD1_UART3_BASE)
writel(UARTCLK14745KHZ, &apb1clkres->uart3);
#elif (CONFIG_SYS_NS16550_COM1 == ARMD1_UART2_BASE)
writel(UARTCLK14745KHZ, &apb1clkres->uart2);
#else
writel(UARTCLK14745KHZ, &apb1clkres->uart1);
#endif
icache_enable();
return 0;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
u32 id;
struct armd1cpu_registers *cpuregs =
(struct armd1cpu_registers *) ARMD1_CPU_BASE;
id = readl(&cpuregs->chip_id);
printf("SoC: Armada 88AP%X-%X\n", (id & 0xFFF), (id >> 0x10));
return 0;
}
#endif
#ifdef CONFIG_I2C_MV
void i2c_clk_enable(void)
{
}
#endif

View File

@ -1,117 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>,
* Contributor: Mahavir Jain <mjain@marvell.com>
*/
#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/armada100.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* ARMADA100 DRAM controller supports upto 8 banks
* for chip select 0 and 1
*/
/*
* DDR Memory Control Registers
* Refer Datasheet Appendix A.17
*/
struct armd1ddr_map_registers {
u32 cs; /* Memory Address Map Register -CS */
u32 pad[3];
};
struct armd1ddr_registers {
u8 pad[0x100 - 0x000];
struct armd1ddr_map_registers mmap[2];
};
/*
* armd1_sdram_base - reads SDRAM Base Address Register
*/
u32 armd1_sdram_base(int chip_sel)
{
struct armd1ddr_registers *ddr_regs =
(struct armd1ddr_registers *)ARMD1_DRAM_BASE;
u32 result = 0;
u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
if (!CS_valid)
return 0;
result = readl(&ddr_regs->mmap[chip_sel].cs) & 0xFF800000;
return result;
}
/*
* armd1_sdram_size - reads SDRAM size
*/
u32 armd1_sdram_size(int chip_sel)
{
struct armd1ddr_registers *ddr_regs =
(struct armd1ddr_registers *)ARMD1_DRAM_BASE;
u32 result = 0;
u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
if (!CS_valid)
return 0;
result = readl(&ddr_regs->mmap[chip_sel].cs);
result = (result >> 16) & 0xF;
if (result < 0x7) {
printf("Unknown DRAM Size\n");
return -1;
} else {
return ((0x8 << (result - 0x7)) * 1024 * 1024);
}
}
int dram_init(void)
{
int i;
gd->ram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = armd1_sdram_base(i);
gd->bd->bi_dram[i].size = armd1_sdram_size(i);
/*
* It is assumed that all memory banks are consecutive
* and without gaps.
* If the gap is found, ram_size will be reported for
* consecutive memory only
*/
if (gd->bd->bi_dram[i].start != gd->ram_size)
break;
gd->ram_size += gd->bd->bi_dram[i].size;
}
for (; i < CONFIG_NR_DRAM_BANKS; i++) {
/* If above loop terminated prematurely, we need to set
* remaining banks' start address & size as 0. Otherwise other
* u-boot functions and Linux kernel gets wrong values which
* could result in crash */
gd->bd->bi_dram[i].start = 0;
gd->bd->bi_dram[i].size = 0;
}
return 0;
}
/*
* If this function is not defined here,
* board.c alters dram bank zero configuration defined above.
*/
int dram_init_banksize(void)
{
dram_init();
return 0;
}

View File

@ -1,198 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
* Contributor: Mahavir Jain <mjain@marvell.com>
*/
#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <time.h>
#include <asm/arch/cpu.h>
#include <asm/arch/armada100.h>
#include <asm/global_data.h>
#include <linux/delay.h>
/*
* Timer registers
* Refer Section A.6 in Datasheet
*/
struct armd1tmr_registers {
u32 clk_ctrl; /* Timer clk control reg */
u32 match[9]; /* Timer match registers */
u32 count[3]; /* Timer count registers */
u32 status[3];
u32 ie[3];
u32 preload[3]; /* Timer preload value */
u32 preload_ctrl[3];
u32 wdt_match_en;
u32 wdt_match_r;
u32 wdt_val;
u32 wdt_sts;
u32 icr[3];
u32 wdt_icr;
u32 cer; /* Timer count enable reg */
u32 cmr;
u32 ilr[3];
u32 wcr;
u32 wfar;
u32 wsar;
u32 cvwr;
};
#define TIMER 0 /* Use TIMER 0 */
/* Each timer has 3 match registers */
#define MATCH_CMP(x) ((3 * TIMER) + x)
#define TIMER_LOAD_VAL 0xffffffff
#define COUNT_RD_REQ 0x1
DECLARE_GLOBAL_DATA_PTR;
/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
/* For preventing risk of instability in reading counter value,
* first set read request to register cvwr and then read same
* register after it captures counter value.
*/
ulong read_timer(void)
{
struct armd1tmr_registers *armd1timers =
(struct armd1tmr_registers *) ARMD1_TIMER_BASE;
volatile int loop=100;
writel(COUNT_RD_REQ, &armd1timers->cvwr);
while (loop--);
return(readl(&armd1timers->cvwr));
}
static ulong get_timer_masked(void)
{
ulong now = read_timer();
if (now >= gd->arch.tbl) {
/* normal mode */
gd->arch.tbu += now - gd->arch.tbl;
} else {
/* we have an overflow ... */
gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
}
gd->arch.tbl = now;
return gd->arch.tbu;
}
ulong get_timer(ulong base)
{
return ((get_timer_masked() / (CONFIG_SYS_HZ_CLOCK / 1000)) -
base);
}
void __udelay(unsigned long usec)
{
ulong delayticks;
ulong endtime;
delayticks = (usec * (CONFIG_SYS_HZ_CLOCK / 1000000));
endtime = get_timer_masked() + delayticks;
while (get_timer_masked() < endtime);
}
/*
* init the Timer
*/
int timer_init(void)
{
struct armd1apb1_registers *apb1clkres =
(struct armd1apb1_registers *) ARMD1_APBC1_BASE;
struct armd1tmr_registers *armd1timers =
(struct armd1tmr_registers *) ARMD1_TIMER_BASE;
/* Enable Timer clock at 3.25 MHZ */
writel(APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3), &apb1clkres->timers);
/* load value into timer */
writel(0x0, &armd1timers->clk_ctrl);
/* Use Timer 0 Match Resiger 0 */
writel(TIMER_LOAD_VAL, &armd1timers->match[MATCH_CMP(0)]);
/* Preload value is 0 */
writel(0x0, &armd1timers->preload[TIMER]);
/* Enable match comparator 0 for Timer 0 */
writel(0x1, &armd1timers->preload_ctrl[TIMER]);
/* Enable timer 0 */
writel(0x1, &armd1timers->cer);
/* init the gd->arch.tbu and gd->arch.tbl value */
gd->arch.tbl = read_timer();
gd->arch.tbu = 0;
return 0;
}
#define MPMU_APRR_WDTR (1<<4)
#define TMR_WFAR 0xbaba /* WDT Register First key */
#define TMP_WSAR 0xeb10 /* WDT Register Second key */
/*
* This function uses internal Watchdog Timer
* based reset mechanism.
* Steps to write watchdog registers (protected access)
* 1. Write key value to TMR_WFAR reg.
* 2. Write key value to TMP_WSAR reg.
* 3. Perform write operation.
*/
void reset_cpu(void)
{
struct armd1mpmu_registers *mpmu =
(struct armd1mpmu_registers *) ARMD1_MPMU_BASE;
struct armd1tmr_registers *armd1timers =
(struct armd1tmr_registers *) ARMD1_TIMER_BASE;
u32 val;
/* negate hardware reset to the WDT after system reset */
val = readl(&mpmu->aprr);
val = val | MPMU_APRR_WDTR;
writel(val, &mpmu->aprr);
/* reset/enable WDT clock */
writel(APBC_APBCLK | APBC_FNCLK | APBC_RST, &mpmu->wdtpcr);
readl(&mpmu->wdtpcr);
writel(APBC_APBCLK | APBC_FNCLK, &mpmu->wdtpcr);
readl(&mpmu->wdtpcr);
/* clear previous WDT status */
writel(TMR_WFAR, &armd1timers->wfar);
writel(TMP_WSAR, &armd1timers->wsar);
writel(0, &armd1timers->wdt_sts);
/* set match counter */
writel(TMR_WFAR, &armd1timers->wfar);
writel(TMP_WSAR, &armd1timers->wsar);
writel(0xf, &armd1timers->wdt_match_r);
/* enable WDT reset */
writel(TMR_WFAR, &armd1timers->wfar);
writel(TMP_WSAR, &armd1timers->wsar);
writel(0x3, &armd1timers->wdt_match_en);
while(1);
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return (ulong)CONFIG_SYS_HZ;
}

View File

@ -89,4 +89,3 @@ void enable_caches(void)
dcache_enable();
#endif
}

View File

@ -1,274 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2009 DENX Software Engineering
* Author: John Rigby <jrigby@gmail.com>
*
* Based on mx27/generic.c:
* Copyright (c) 2008 Eric Jarrige <eric.jarrige@armadeus.org>
* Copyright (c) 2009 Ilya Yanok <yanok@emcraft.com>
*/
#include <common.h>
#include <clock_legacy.h>
#include <div64.h>
#include <init.h>
#include <net.h>
#include <netdev.h>
#include <vsprintf.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-imx/cpu.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#ifdef CONFIG_FSL_ESDHC_IMX
#include <fsl_esdhc_imx.h>
DECLARE_GLOBAL_DATA_PTR;
#endif
/*
* get the system pll clock in Hz
*
* mfi + mfn / (mfd +1)
* f = 2 * f_ref * --------------------
* pd + 1
*/
static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
{
unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
& CCM_PLL_MFI_MASK;
int mfn = (pll >> CCM_PLL_MFN_SHIFT)
& CCM_PLL_MFN_MASK;
unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT)
& CCM_PLL_MFD_MASK;
unsigned int pd = (pll >> CCM_PLL_PD_SHIFT)
& CCM_PLL_PD_MASK;
mfi = mfi <= 5 ? 5 : mfi;
mfn = mfn >= 512 ? mfn - 1024 : mfn;
mfd += 1;
pd += 1;
return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn),
mfd * pd);
}
static ulong imx_get_mpllclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = MXC_HCLK;
return imx_decode_pll(readl(&ccm->mpctl), fref);
}
static ulong imx_get_upllclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = MXC_HCLK;
return imx_decode_pll(readl(&ccm->upctl), fref);
}
static ulong imx_get_armclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl(&ccm->cctl);
ulong fref = imx_get_mpllclk();
ulong div;
if (cctl & CCM_CCTL_ARM_SRC)
fref = lldiv((u64) fref * 3, 4);
div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
& CCM_CCTL_ARM_DIV_MASK) + 1;
return fref / div;
}
static ulong imx_get_ahbclk(void)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl(&ccm->cctl);
ulong fref = imx_get_armclk();
ulong div;
div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
& CCM_CCTL_AHB_DIV_MASK) + 1;
return fref / div;
}
static ulong imx_get_ipgclk(void)
{
return imx_get_ahbclk() / 2;
}
static ulong imx_get_perclk(int clk)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = readl(&ccm->mcr) & (1 << clk) ? imx_get_upllclk() :
imx_get_ahbclk();
ulong div;
div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
return fref / div;
}
int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = from_upll ? imx_get_upllclk() : imx_get_ahbclk();
ulong div = (fref + freq - 1) / freq;
if (clk > MXC_UART_CLK || !div || --div > CCM_PERCLK_MASK)
return -EINVAL;
clrsetbits_le32(&ccm->pcdr[CCM_PERCLK_REG(clk)],
CCM_PERCLK_MASK << CCM_PERCLK_SHIFT(clk),
div << CCM_PERCLK_SHIFT(clk));
if (from_upll)
setbits_le32(&ccm->mcr, 1 << clk);
else
clrbits_le32(&ccm->mcr, 1 << clk);
return 0;
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
if (clk >= MXC_CLK_NUM)
return -1;
switch (clk) {
case MXC_ARM_CLK:
return imx_get_armclk();
case MXC_AHB_CLK:
return imx_get_ahbclk();
case MXC_IPG_CLK:
case MXC_CSPI_CLK:
case MXC_FEC_CLK:
return imx_get_ipgclk();
default:
return imx_get_perclk(clk);
}
}
u32 get_cpu_rev(void)
{
u32 srev;
u32 system_rev = 0x25000;
/* read SREV register from IIM module */
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
srev = readl(&iim->iim_srev);
switch (srev) {
case 0x00:
system_rev |= CHIP_REV_1_0;
break;
case 0x01:
system_rev |= CHIP_REV_1_1;
break;
case 0x02:
system_rev |= CHIP_REV_1_2;
break;
default:
system_rev |= 0x8000;
break;
}
return system_rev;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
static char *get_reset_cause(void)
{
/* read RCSR register from CCM module */
struct ccm_regs *ccm =
(struct ccm_regs *)IMX_CCM_BASE;
u32 cause = readl(&ccm->rcsr) & 0x0f;
if (cause == 0)
return "POR";
else if (cause == 1)
return "RST";
else if ((cause & 2) == 2)
return "WDOG";
else if ((cause & 4) == 4)
return "SW RESET";
else if ((cause & 8) == 8)
return "JTAG";
else
return "unknown reset";
}
int print_cpuinfo(void)
{
char buf[32];
u32 cpurev = get_cpu_rev();
printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n",
(cpurev & 0xF0) >> 4, (cpurev & 0x0F),
((cpurev & 0x8000) ? " unknown" : ""),
strmhz(buf, imx_get_armclk()));
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif
#if defined(CONFIG_FEC_MXC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(struct bd_info *bis)
{
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val;
val = readl(&ccm->cgr0);
val |= (1 << 23);
writel(val, &ccm->cgr0);
return fecmxc_initialize(bis);
}
#endif
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC_IMX
#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#else
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
}
#ifdef CONFIG_FSL_ESDHC_IMX
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
*/
int cpu_mmc_init(struct bd_info *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
#ifdef CONFIG_FEC_MXC
void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
{
int i;
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
struct fuse_bank *bank = &iim->bank[0];
struct fuse_bank0_regs *fuse =
(struct fuse_bank0_regs *)bank->fuse_regs;
for (i = 0; i < 6; i++)
mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
}
#endif /* CONFIG_FEC_MXC */

View File

@ -1,22 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* relocate - i.MX25-specific vector relocation
*
* Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
*/
#include <linux/linkage.h>
/*
* The i.MX25 SoC is very specific with respect to exceptions: it
* does not provide RAM at the high vectors address (0xFFFF0000),
* thus only the low address (0x00000000) is useable; but that is
* in ROM, so let's avoid relocating the vectors.
*/
.section .text.relocate_vectors,"ax",%progbits
ENTRY(relocate_vectors)
bx lr
ENDPROC(relocate_vectors)

View File

@ -1,40 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* (C) Copyright 2009
* Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
*/
#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
/*
* Reset the cpu by setting up the watchdog timer and let it time out
*/
void reset_cpu(void)
{
struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
/* Disable watchdog and set Time-Out field to 0 */
writew(0, &regs->wcr);
/* Write Service Sequence */
writew(WSR_UNLOCK1, &regs->wsr);
writew(WSR_UNLOCK2, &regs->wsr);
/* Enable watchdog */
writew(WCR_WDE, &regs->wcr);
while (1) ;
}

View File

@ -1,50 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* (C) Copyright 2009
* Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
*
* (C) Copyright 2009 DENX Software Engineering
* Author: John Rigby <jrigby@gmail.com>
* Add support for MX25
*/
#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/ptrace.h>
/* nothing really to do with interrupts, just starts up a counter. */
/* The 32KHz 32-bit timer overruns in 134217 seconds */
int timer_init(void)
{
int i;
struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
/* setup GP Timer 1 */
writel(GPT_CTRL_SWR, &gpt->ctrl);
writel(readl(&ccm->cgr1) | CCM_CGR1_GPT1, &ccm->cgr1);
for (i = 0; i < 100; i++)
writel(0, &gpt->ctrl); /* We have no udelay by now */
writel(0, &gpt->pre); /* prescaler = 1 */
/* Freerun Mode, 32KHz input */
writel(readl(&gpt->ctrl) | GPT_CTRL_CLKSOURCE_32 | GPT_CTRL_FRR,
&gpt->ctrl);
writel(readl(&gpt->ctrl) | GPT_CTRL_TEN, &gpt->ctrl);
return 0;
}

View File

@ -23,7 +23,7 @@
DECLARE_GLOBAL_DATA_PTR;
static gd_t gdata __section(".data");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
#ifdef CONFIG_SPL_SERIAL
static struct bd_info bdata __section(".data");
#endif
@ -108,7 +108,7 @@ static void mxs_spl_fixup_vectors(void)
static void mxs_spl_console_init(void)
{
#ifdef CONFIG_SPL_SERIAL_SUPPORT
#ifdef CONFIG_SPL_SERIAL
gd->bd = &bdata;
gd->baudrate = CONFIG_BAUDRATE;
serial_init();

View File

@ -46,7 +46,7 @@ reset:
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@ -69,7 +69,7 @@ c_runtime_cpu_setup:
*
*************************************************************************
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush D cache before disabling it
@ -100,7 +100,7 @@ flush_dcache:
#endif
mcr p15, 0, r0, c1, c0, 0
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* Go setup Memory and board specific bits prior to relocation.
*/
@ -109,4 +109,4 @@ flush_dcache:
mov lr, r4 /* restore link */
#endif
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */

View File

@ -45,7 +45,7 @@ reset:
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@ -70,7 +70,7 @@ c_runtime_cpu_setup:
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@ -89,7 +89,7 @@ cpu_init_crit:
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
mcr p15, 0, r0, c1, c0, 0
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* Go setup Memory and board specific bits prior to relocation.
*/

View File

@ -17,7 +17,7 @@ obj-$(CONFIG_EFI_LOADER) += sctlr.o
obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o
endif
ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
ifneq ($(CONFIG_$(SPL_)SKIP_LOWLEVEL_INIT),y)
obj-y += lowlevel_init.o
endif

View File

@ -20,6 +20,7 @@ config ARCH_LS1021A
select SYS_FSL_SEC_LE
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_I2C_MXC
imply CMD_PCI
imply SCSI
imply SCSI_AHCI

View File

@ -42,8 +42,8 @@ void get_sys_info(struct sys_info *sys_info)
unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
sys_info->freq_systembus = sysclk;
#ifdef CONFIG_DDR_CLK_FREQ
sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif

View File

@ -8,7 +8,7 @@
u32 spl_boot_device(void)
{
#ifdef CONFIG_SPL_MMC_SUPPORT
#ifdef CONFIG_SPL_MMC
return BOOT_DEVICE_MMC1;
#endif
return BOOT_DEVICE_NAND;

View File

@ -43,4 +43,3 @@ u32 __secure psci_get_context_id(int cpu)
{
return psci_context_id[cpu];
}

View File

@ -39,6 +39,42 @@ reset:
/* Allow the board to save important registers */
b save_boot_params
save_boot_params_ret:
#ifdef CONFIG_POSITION_INDEPENDENT
/*
* Fix .rela.dyn relocations. This allows U-Boot to loaded to and
* executed at a different address than it was linked at.
*/
pie_fixup:
adr r0, reset /* r0 <- Runtime value of reset label */
ldr r1, =reset /* r1 <- Linked value of reset label */
subs r4, r0, r1 /* r4 <- Runtime-vs-link offset */
beq pie_fixup_done
adr r0, pie_fixup
ldr r1, _rel_dyn_start_ofs
add r2, r0, r1 /* r2 <- Runtime &__rel_dyn_start */
ldr r1, _rel_dyn_end_ofs
add r3, r0, r1 /* r3 <- Runtime &__rel_dyn_end */
pie_fix_loop:
ldr r0, [r2] /* r0 <- Link location */
ldr r1, [r2, #4] /* r1 <- fixup */
cmp r1, #23 /* relative fixup? */
bne pie_skip_reloc
/* relative fix: increase location by offset */
add r0, r4
ldr r1, [r0]
add r1, r4
str r1, [r0]
str r0, [r2]
add r2, #8
pie_skip_reloc:
cmp r2, r3
blo pie_fix_loop
pie_fixup_done:
#endif
#ifdef CONFIG_ARMV7_LPAE
/*
* check for Hypervisor support
@ -80,11 +116,11 @@ switch_to_hypervisor_ret:
#endif
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
#ifdef CONFIG_CPU_V7A
bl cpu_init_cp15
#endif
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
bl cpu_init_crit
#endif
#endif
@ -320,8 +356,8 @@ skip_errata_801819:
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
!defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) && \
!CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*************************************************************************
*
* CPU_init_critical registers
@ -340,3 +376,10 @@ ENTRY(cpu_init_crit)
b lowlevel_init @ go setup pll,mux,memory
ENDPROC(cpu_init_crit)
#endif
#if CONFIG_POSITION_INDEPENDENT
_rel_dyn_start_ofs:
.word __rel_dyn_start - pie_fixup
_rel_dyn_end_ofs:
.word __rel_dyn_end - pie_fixup
#endif

View File

@ -18,7 +18,7 @@ static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
(struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
#define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
#define GPT_RESOLUTION (CONFIG_STV0991_HZ_CLOCK / CONFIG_STV0991_HZ)
#define GPT_RESOLUTION (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
DECLARE_GLOBAL_DATA_PTR;
@ -67,7 +67,7 @@ void __udelay(unsigned long usec)
{
ulong tmo;
ulong start = get_timer_masked();
ulong tenudelcnt = CONFIG_STV0991_HZ_CLOCK / (1000 * 100);
ulong tenudelcnt = CONFIG_SYS_HZ_CLOCK / (1000 * 100);
ulong rndoff;
rndoff = (usec % 10) ? 1 : 0;
@ -110,5 +110,5 @@ unsigned long long get_ticks(void)
*/
ulong get_tbclk(void)
{
return CONFIG_STV0991_HZ;
return CONFIG_SYS_HZ;
}

View File

@ -3,7 +3,6 @@ if ARM64
config ARMV8_SPL_EXCEPTION_VECTORS
bool "Install crash dump exception vectors"
depends on SPL
default n
help
The default exception vector table is only used for the crash
dump, but still takes quite a lot of space in the image size.
@ -128,7 +127,6 @@ config PSCI_RESET
config ARMV8_PSCI
bool "Enable PSCI support" if EXPERT
default n
help
PSCI is Power State Coordination Interface defined by ARM.
The PSCI in U-boot provides a general framework and each platform
@ -156,7 +154,6 @@ config ARMV8_PSCI_CPUS_PER_CLUSTER
config ARMV8_EA_EL3_FIRST
bool "External aborts and SError interrupt exception are taken in EL3"
default n
help
Exception handling at all exception levels for External Abort and
SError interrupt exception are taken in EL3.

View File

@ -27,13 +27,11 @@ ENTRY(__asm_dcache_level)
msr csselr_el1, x12 /* select cache level */
isb /* sync change of cssidr_el1 */
mrs x6, ccsidr_el1 /* read the new cssidr_el1 */
and x2, x6, #7 /* x2 <- log2(cache line size)-4 */
ubfx x2, x6, #0, #3 /* x2 <- log2(cache line size)-4 */
ubfx x3, x6, #3, #10 /* x3 <- number of cache ways - 1 */
ubfx x4, x6, #13, #15 /* x4 <- number of cache sets - 1 */
add x2, x2, #4 /* x2 <- log2(cache line size) */
mov x3, #0x3ff
and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */
clz w5, w3 /* bit position of #ways */
mov x4, #0x7fff
and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */
/* x12 <- cache level << 1 */
/* x2 <- line length offset */
/* x3 <- number of cache ways - 1 */
@ -72,8 +70,7 @@ ENTRY(__asm_dcache_all)
mov x1, x0
dsb sy
mrs x10, clidr_el1 /* read clidr_el1 */
lsr x11, x10, #24
and x11, x11, #0x7 /* x11 <- loc */
ubfx x11, x10, #24, #3 /* x11 <- loc */
cbz x11, finished /* if loc is 0, exit */
mov x15, lr
mov x0, #0 /* start flush at cache level 0 */
@ -83,8 +80,7 @@ ENTRY(__asm_dcache_all)
/* x15 <- return address */
loop_level:
lsl x12, x0, #1
add x12, x12, x0 /* x0 <- tripled cache level */
add x12, x0, x0, lsl #1 /* x12 <- tripled cache level */
lsr x12, x10, x12
and x12, x12, #7 /* x12 <- cache type */
cmp x12, #2
@ -131,8 +127,7 @@ ENDPROC(__asm_invalidate_dcache_all)
.pushsection .text.__asm_flush_dcache_range, "ax"
ENTRY(__asm_flush_dcache_range)
mrs x3, ctr_el0
lsr x3, x3, #16
and x3, x3, #0xf
ubfx x3, x3, #16, #4
mov x2, #4
lsl x2, x2, x3 /* cache line size */
@ -158,7 +153,7 @@ ENDPROC(__asm_flush_dcache_range)
.pushsection .text.__asm_invalidate_dcache_range, "ax"
ENTRY(__asm_invalidate_dcache_range)
mrs x3, ctr_el0
ubfm x3, x3, #16, #19
ubfx x3, x3, #16, #4
mov x2, #4
lsl x2, x2, x3 /* cache line size */

View File

@ -64,18 +64,18 @@ ENTRY(return_to_fel)
/* AArch32 code to restore the state from fel_stash and return back to FEL. */
back_in_32:
.word 0xe59f0028 // ldr r0, [pc, #40] ; load fel_stash address
.word 0xe5901008 // ldr r1, [r0, #8]
.word 0xe129f001 // msr CPSR_fc, r1
.word 0xe59f0028 // ldr r0, [pc, #40] ; load fel_stash address
.word 0xe5901008 // ldr r1, [r0, #8]
.word 0xe129f001 // msr CPSR_fc, r1
.word 0xf57ff06f // isb
.word 0xe590d000 // ldr sp, [r0]
.word 0xe590e004 // ldr lr, [r0, #4]
.word 0xe5901010 // ldr r1, [r0, #16]
.word 0xee0c1f10 // mcr 15, 0, r1, cr12, cr0, {0} ; VBAR
.word 0xe590100c // ldr r1, [r0, #12]
.word 0xee011f10 // mcr 15, 0, r1, cr1, cr0, {0} ; SCTLR
.word 0xe590d000 // ldr sp, [r0]
.word 0xe590e004 // ldr lr, [r0, #4]
.word 0xe5901010 // ldr r1, [r0, #16]
.word 0xee0c1f10 // mcr 15, 0, r1, cr12, cr0, {0} ; VBAR
.word 0xe590100c // ldr r1, [r0, #12]
.word 0xee011f10 // mcr 15, 0, r1, cr1, cr0, {0} ; SCTLR
.word 0xf57ff06f // isb
.word 0xe12fff1e // bx lr ; return to FEL
.word 0xe12fff1e // bx lr ; return to FEL
fel_stash_addr:
.word 0x00000000 // receives fel_stash addr, by AA64 code above
ENDPROC(return_to_fel)

View File

@ -4,11 +4,13 @@ config ARCH_LS1012A
select ARM_ERRATA_855873 if !TFABOOT
select FSL_LAYERSCAPE
select FSL_LSCH2
select GICV2
select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE
select SYS_FSL_MMDC
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010315 if PCIE_LAYERSCAPE
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
@ -25,6 +27,7 @@ config ARCH_LS1028A
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select NXP_LSCH3_2
select SYS_FSL_HAS_CCI400
select SYS_FSL_SRDS_1
@ -58,7 +61,9 @@ config ARCH_LS1043A
select ARM_ERRATA_855873 if !TFABOOT
select FSL_LAYERSCAPE
select FSL_LSCH2
select GICV2
select HAS_FSL_XHCI_USB if USB_HOST
select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@ -72,7 +77,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009942 if !TFABOOT
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010315 if PCIE_LAYERSCAPE
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
@ -84,13 +89,16 @@ config ARCH_LS1043A
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply CMD_PCI
imply ID_EEPROM
config ARCH_LS1046A
bool
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH2
select GICV2
select HAS_FSL_XHCI_USB if USB_HOST
select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@ -117,8 +125,10 @@ config ARCH_LS1046A
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply ID_EEPROM
imply SCSI
imply SCSI_AHCI
imply SPL_SYS_I2C_LEGACY
config ARCH_LS1088A
bool
@ -126,6 +136,8 @@ config ARCH_LS1088A
select ARM_ERRATA_855873 if !TFABOOT
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@ -158,7 +170,9 @@ config ARCH_LS1088A
select SYS_I2C_MXC_I2C3 if !TFABOOT
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
imply ID_EEPROM
imply SCSI
imply SPL_SYS_I2C_LEGACY
imply PANIC_HANG
config ARCH_LS2080A
@ -170,6 +184,8 @@ config ARCH_LS2080A
select ARM_ERRATA_833471
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select SKIP_LOWLEVEL_INIT
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
@ -210,12 +226,16 @@ config ARCH_LS2080A
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply ID_EEPROM
imply PANIC_HANG
imply SPL_SYS_I2C_LEGACY
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select NXP_LSCH3_2
select SYS_HAS_SERDES
select SYS_FSL_SRDS_1
@ -242,11 +262,14 @@ config ARCH_LX2162A
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI
imply SPL_SYS_I2C_LEGACY
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select HAS_FSL_XHCI_USB if USB_HOST
select NXP_LSCH3_2
select SYS_HAS_SERDES
@ -272,12 +295,15 @@ config ARCH_LX2160A
select SYS_I2C_MXC
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
imply ID_EEPROM
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI
imply SPL_SYS_I2C_LEGACY
config FSL_LSCH2
bool
select SKIP_LOWLEVEL_INIT
select SYS_FSL_HAS_CCI400
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5
@ -429,7 +455,6 @@ config QSPI_AHB_INIT
config FSPI_AHB_EN_4BYTE
bool "Enable 4-byte Fast Read command for AHB mode"
default n
help
The default setting for FlexSPI AHB bus just supports 3-byte addressing.
But some FlexSPI flash sizes are up to 64MBytes.

View File

@ -1147,7 +1147,7 @@ int arch_early_init_r(void)
#endif
#ifdef CONFIG_SYS_FSL_HAS_RGMII
/* some dpmacs in armv8a based freescale layerscape SOCs can be
* configured via both serdes(sgmii, xfi, xlaui etc) bits and via
* configured via both serdes(sgmii, 10gbase-r, xlaui etc) bits and via
* EC*_PMUX(rgmii) bits in RCW.
* e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
* serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits

View File

@ -42,22 +42,22 @@ Flash Layout
pre-silicon platforms (simulator and emulator):
-------------------------
| FIT Image |
| FIT Image |
| (linux + DTB + RFS) |
------------------------- ----> 0x0120_0000
| Debug Server FW |
| Debug Server FW |
------------------------- ----> 0x00C0_0000
| AIOP FW |
| AIOP FW |
------------------------- ----> 0x0070_0000
| MC FW |
| MC FW |
------------------------- ----> 0x006C_0000
| MC DPL Blob |
| MC DPL Blob |
------------------------- ----> 0x0020_0000
| BootLoader + Env|
| BootLoader + Env|
------------------------- ----> 0x0000_1000
| PBI |
| PBI |
------------------------- ----> 0x0000_0080
| RCW |
| RCW |
------------------------- ----> 0x0000_0000
32-MB NOR flash layout for pre-silicon platforms (simulator and emulator)
@ -70,45 +70,45 @@ Flash Layout
----------------------------------------- ----> 0x5_8790_0000 |
| FIT Image (linux + DTB + RFS) (40M) | |
----------------------------------------- ----> 0x5_8510_0000 |
| PHY firmware (2M) | |
| PHY firmware (2M) | |
----------------------------------------- ----> 0x5_84F0_0000 | 64K
| Debug Server FW (2M) | | Alt
----------------------------------------- ----> 0x5_84D0_0000 | Bank
| AIOP FW (4M) | |
----------------------------------------- ----> 0x5_8490_0000 (vbank4)
| MC DPC Blob (1M) | |
| MC DPC Blob (1M) | |
----------------------------------------- ----> 0x5_8480_0000 |
| MC DPL Blob (1M) | |
----------------------------------------- ----> 0x5_8470_0000 |
| MC FW (4M) | |
| MC FW (4M) | |
----------------------------------------- ----> 0x5_8430_0000 |
| BootLoader Environment (1M) | |
| BootLoader Environment (1M) | |
----------------------------------------- ----> 0x5_8420_0000 |
| BootLoader (1M) | |
----------------------------------------- ----> 0x5_8410_0000 |
| RCW and PBI (1M) | |
| RCW and PBI (1M) | |
----------------------------------------- ----> 0x5_8400_0000 ---
| .. Unused .. (7M) | |
----------------------------------------- ----> 0x5_8390_0000 |
| FIT Image (linux + DTB + RFS) (40M) | |
----------------------------------------- ----> 0x5_8110_0000 |
| PHY firmware (2M) | |
| PHY firmware (2M) | |
----------------------------------------- ----> 0x5_80F0_0000 | 64K
| Debug Server FW (2M) | | Bank
----------------------------------------- ----> 0x5_80D0_0000 |
| AIOP FW (4M) | |
----------------------------------------- ----> 0x5_8090_0000 (vbank0)
| MC DPC Blob (1M) | |
| MC DPC Blob (1M) | |
----------------------------------------- ----> 0x5_8080_0000 |
| MC DPL Blob (1M) | |
----------------------------------------- ----> 0x5_8070_0000 |
| MC FW (4M) | |
| MC FW (4M) | |
----------------------------------------- ----> 0x5_8030_0000 |
| BootLoader Environment (1M) | |
| BootLoader Environment (1M) | |
----------------------------------------- ----> 0x5_8020_0000 |
| BootLoader (1M) | |
----------------------------------------- ----> 0x5_8010_0000 |
| RCW and PBI (1M) | |
| RCW and PBI (1M) | |
----------------------------------------- ----> 0x5_8000_0000 ---
128-MB NOR flash layout for QDS and RDB boards

View File

@ -31,7 +31,7 @@ The LS1043A SoC includes the following function and features:
- Hardware buffer management for buffer allocation and de-allocation (BMan)
- Cryptography acceleration (SEC)
- Ethernet interfaces by FMan
- Up to 1 x XFI supporting 10G interface
- Up to 1 x 10GBase-R supporting 10G interface
- Up to 1 x QSGMII
- Up to 4 x SGMII supporting 1000Mbps
- Up to 2 x SGMII supporting 2500Mbps
@ -190,7 +190,7 @@ The LS1046A SoC includes the following function and features:
- Two PLLs per four-lane SerDes
- Support for 10G operation
- Ethernet interfaces by FMan
- Up to 2 x XFI supporting 10G interface (MAC 9, 10)
- Up to 2 x 10GBase-R supporting 10G interface (MAC 9, 10)
- Up to 1 x QSGMII (MAC 5, 6, 10, 1)
- Up to 4 x SGMII supporting 1000Mbps (MAC 5, 6, 9, 10)
- Up to 3 x SGMII supporting 2500Mbps (MAC 5, 9, 10)
@ -295,7 +295,7 @@ The LX2160A SoC includes the following function and features:
Single WRIOP tile supporting 130Gbps using 18 MACs
Support for 10G-SXGMII (aka USXGMII).
Support for SGMII (and 1000Base-KX)
Support for XFI (and 10GBase-KR)
Support for 10GBase-R (and 10GBase-KR)
Support for CAUI4 (100G); CAUI2 (50G) and 25G-AUI(25G).
Support for XLAUI (and 40GBase-KR4) for 40G.
Support for two RGMII parallel interfaces.
@ -400,7 +400,7 @@ The LX2162A SoC includes the following function and features:
Ethernet interfaces
Support for 10G-SXGMII (aka USXGMII).
Support for SGMII (and 1000Base-KX)
Support for XFI (and 10GBase-KR)
Support for 10GBase-R (and 10GBase-KR)
Support for CAUI2 (50G) and 25G-AUI(25G).
Support for XLAUI (and 40GBase-KR4) for 40G.
Support for two RGMII parallel interfaces.

View File

@ -427,7 +427,7 @@ static void fdt_disable_multimedia(void *blob, unsigned int svr)
fdt_status_disabled(blob, off);
/* Disable GPU node */
off = fdt_node_offset_by_compatible(blob, -1, "fsl,ls1028a-gpu");
off = fdt_node_offset_by_compatible(blob, -1, "vivante,gc");
if (off != -FDT_ERR_NOTFOUND)
fdt_status_disabled(blob, off);
}

View File

@ -61,8 +61,8 @@ void get_sys_info(struct sys_info *sys_info)
#endif
cluster_clk = CONFIG_CLUSTER_CLK_FREQ;
#ifdef CONFIG_DDR_CLK_FREQ
sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif

View File

@ -78,10 +78,10 @@ void get_sys_info(struct sys_info *sys_info)
void *offset;
sys_info->freq_systembus = sysclk;
#ifdef CONFIG_DDR_CLK_FREQ
sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
sys_info->freq_ddrbus = get_board_ddr_clk();
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
sys_info->freq_ddrbus2 = CONFIG_DDR_CLK_FREQ;
sys_info->freq_ddrbus2 = get_board_ddr_clk();
#endif
#else
sys_info->freq_ddrbus = sysclk;

View File

@ -250,7 +250,7 @@ ENTRY(lowlevel_init)
* b. We use only Region0 whose NSAID write/read is EN
*
* NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just
* placeholders.
* placeholders.
*/
.macro tzasc_prog, xreg
@ -259,7 +259,7 @@ ENTRY(lowlevel_init)
mov x16, #0x10000
mul x14, \xreg, x16
add x14, x14,x12
mov x1, #0x8
mov x1, #0x8
add x1, x1, x14
ldr w0, [x1] /* Filter 0 Gate Keeper Register */

View File

@ -18,7 +18,7 @@ struct icid_id_table icid_tbl[] = {
SET_SATA_ICID(1, "fsl,ls1028a-ahci", FSL_SATA1_STREAM_ID),
SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
SET_QDMA_ICID("fsl,ls1028a-qdma", FSL_DMA_STREAM_ID),
SET_GPU_ICID("fsl,ls1028a-gpu", FSL_GPU_STREAM_ID),
SET_GPU_ICID("vivante,gc", FSL_GPU_STREAM_ID),
SET_DISPLAY_ICID(FSL_DISPLAY_STREAM_ID),
#ifdef CONFIG_FSL_CAAM
SET_SEC_JR_ICID_ENTRY(0, FSL_SEC_JR1_STREAM_ID),

View File

@ -100,7 +100,7 @@ enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
return 0;
/*
* LS1044A/1048A support only one XFI port
* LS1044A/1048A support only one 10GBase-R port
* Disable MAC1 for LS1044A/1048A
*/
if (serdes == FSL_SRDS_1 && lane == 2) {

View File

@ -14,11 +14,12 @@
#include <asm/system.h>
#include <asm/arch/mp.h>
#include <asm/arch/soc.h>
#include <linux/compat.h>
#include <linux/delay.h>
#include <linux/psci.h>
#include <malloc.h>
#include "cpu.h"
#include <asm/arch-fsl-layerscape/soc.h>
#include <efi_loader.h>
DECLARE_GLOBAL_DATA_PTR;
@ -83,8 +84,7 @@ int fsl_layerscape_wake_seconday_cores(void)
int i, timeout = 10;
u64 *table;
#ifdef CONFIG_EFI_LOADER
u64 reloc_addr = U32_MAX;
efi_status_t ret;
void *reloc_addr;
#endif
#ifdef COUNTER_FREQUENCY_REAL
@ -102,27 +102,26 @@ int fsl_layerscape_wake_seconday_cores(void)
* Keep this after the __real_cntfrq update, so we have it when we
* copy the complete section here.
*/
ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS,
EFI_RESERVED_MEMORY_TYPE,
efi_size_in_pages(secondary_boot_code_size),
&reloc_addr);
if (ret == EFI_SUCCESS) {
debug("Relocating spin table from %llx to %llx (size %lx)\n",
(u64)secondary_boot_code_start, reloc_addr,
reloc_addr = memalign(PAGE_SIZE,
round_up(secondary_boot_code_size, PAGE_SIZE));
if (reloc_addr) {
debug("Relocating spin table from %p to %p (size %lx)\n",
secondary_boot_code_start, reloc_addr,
secondary_boot_code_size);
memcpy((void *)reloc_addr, secondary_boot_code_start,
memcpy(reloc_addr, secondary_boot_code_start,
secondary_boot_code_size);
flush_dcache_range(reloc_addr,
reloc_addr + secondary_boot_code_size);
flush_dcache_range((unsigned long)reloc_addr,
(unsigned long)reloc_addr +
secondary_boot_code_size);
/* set new entry point for secondary cores */
secondary_boot_addr += (void *)reloc_addr -
secondary_boot_addr += reloc_addr -
secondary_boot_code_start;
flush_dcache_range((unsigned long)&secondary_boot_addr,
(unsigned long)&secondary_boot_addr + 8);
/* this will be used to reserve the memory */
secondary_boot_code_start = (void *)reloc_addr;
secondary_boot_code_start = reloc_addr;
}
#endif

View File

@ -41,26 +41,36 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_GIC_V3_ITS
#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
PROPTABLE_MAX_SZ, SZ_1M)
static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
{
int err;
struct fdt_memory gic_rd_tables;
gic_rd_tables.start = base;
gic_rd_tables.end = base + size - 1;
err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
NULL, 0, NULL, 0);
if (err < 0)
debug("%s: failed to add reserved memory: %d\n", __func__, err);
return err;
}
int ls_gic_rd_tables_init(void *blob)
{
struct fdt_memory lpi_base;
fdt_addr_t addr;
fdt_size_t size;
int offset, ret;
u64 gic_lpi_base;
int ret;
offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000");
addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg",
0, &size, false);
lpi_base.start = addr;
lpi_base.end = addr + size - 1;
ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL, false);
if (ret) {
debug("%s: failed to add reserved memory\n", __func__);
gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
if (ret)
return ret;
}
ret = gic_lpi_tables_init();
ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
if (ret)
debug("%s: failed to init gic-lpi-tables\n", __func__);
@ -329,7 +339,7 @@ static void erratum_rcw_src(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void)
{
#ifdef CONFIG_SYS_I2C_LEGACY
#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
u8 __iomem *ptr;
#ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
@ -919,25 +929,23 @@ __weak int fsl_board_late_init(void)
#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \
<< DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
void enable_dwc3_snooping(void)
static void enable_dwc3_snooping(void)
{
int ret;
u32 val;
struct udevice *bus;
struct uclass *uc;
static const char * const compatibles[] = {
"fsl,layerscape-dwc3",
"fsl,ls1028a-dwc3",
};
fdt_addr_t dwc3_base;
ofnode node;
u32 val;
int i;
ret = uclass_get(UCLASS_USB, &uc);
if (ret)
return;
uclass_foreach_dev(bus, uc) {
if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
dwc3_base = devfdt_get_addr(bus);
if (dwc3_base == FDT_ADDR_T_NONE) {
dev_err(bus, "dwc3 regs missing\n");
for (i = 0; i < ARRAY_SIZE(compatibles); i++) {
ofnode_for_each_compatible_node(node, compatibles[i]) {
dwc3_base = ofnode_get_addr(node);
if (dwc3_base == FDT_ADDR_T_NONE)
continue;
}
val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);

View File

@ -93,7 +93,7 @@ __secondary_boot_func:
4:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
switch_el x7, _dead_loop, 0f, _dead_loop
0: armv8_switch_to_el1_m x4, x6, x7
0: armv8_switch_to_el1_m x4, x6, x7, x9
#else
switch_el x7, 0f, _dead_loop, _dead_loop
0: armv8_switch_to_el2_m x4, x6, x7

View File

@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
u32 spl_boot_device(void)
{
#ifdef CONFIG_SPL_MMC_SUPPORT
#ifdef CONFIG_SPL_MMC
return BOOT_DEVICE_MMC1;
#endif
#ifdef CONFIG_SPL_NAND_SUPPORT
@ -88,7 +88,7 @@ void board_init_f(ulong dummy)
preloader_console_init();
spl_set_bd();
#ifdef CONFIG_SYS_I2C_LEGACY
#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
#ifdef CONFIG_SPL_I2C
i2c_init_all();
#endif

View File

@ -181,5 +181,3 @@ int hi6220_pinmux_config(int peripheral)
return 0;
}

View File

@ -40,7 +40,7 @@ ENTRY(armv8_switch_to_el1)
* now, jump to the address saved in x4.
*/
br x4
1: armv8_switch_to_el1_m x4, x5, x6
1: armv8_switch_to_el1_m x4, x5, x6, x7
ENDPROC(armv8_switch_to_el1)
.popsection

View File

@ -76,4 +76,3 @@ HYPERCALL2(sched_op);
HYPERCALL2(event_channel_op);
HYPERCALL2(hvm_op);
HYPERCALL2(memory_op);

View File

@ -45,7 +45,7 @@ reset:
orr r0,r0,#0xd3
msr cpsr,r0
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@ -92,7 +92,7 @@ c_runtime_cpu_setup:
*
*************************************************************************
*/
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
cpu_init_crit:
/*
* flush v4 I/D caches
@ -111,7 +111,7 @@ cpu_init_crit:
mcr p15, 0, r0, c1, c0, 0
mov pc, lr /* back to my caller */
#endif /* !CONFIG_SKIP_LOWLEVEL_INIT || CONFIG_CPU_PXA25X */
#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || CONFIG_CPU_PXA25X */
/*
* Enable MMU to use DCache as DRAM.

View File

@ -39,7 +39,7 @@ reset:
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
bl cpu_init_crit
#endif
@ -95,7 +95,7 @@ cpu_init_crit:
ldr r1, cpuspeed
str r1, [r0, #PPCR]
#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will

View File

@ -28,6 +28,13 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5800-peach-pi.dtb \
exynos5422-odroidxu3.dtb
dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
dtb-$(CONFIG_TARGET_A5Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_TARGET_A3Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_TARGET_A7Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_ARCH_APPLE) += \
t8103-j274.dtb \
t8103-j293.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-evm.dtb \
@ -71,8 +78,9 @@ dtb-$(CONFIG_MACH_S700) += \
dtb-$(CONFIG_ROCKCHIP_PX30) += \
px30-evb.dtb \
px30-firefly.dtb \
px30-px30-core-ctouch2.dtb \
px30-px30-core-edimm2.2.dtb \
px30-engicam-px30-core-ctouch2.dtb \
px30-engicam-px30-core-ctouch2-of10.dtb \
px30-engicam-px30-core-edimm2.2.dtb \
rk3326-odroid-go2.dtb
dtb-$(CONFIG_ROCKCHIP_RK3036) += \
@ -158,30 +166,36 @@ dtb-$(CONFIG_ARCH_S5P4418) += \
s5p4418-nanopi2.dtb
dtb-$(CONFIG_ARCH_MESON) += \
meson-axg-s400.dtb \
meson-axg-jethome-jethub-j100.dtb \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-odroidc2.dtb \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-p200.dtb \
meson-gxbb-p201.dtb \
meson-gxl-s905x-p212.dtb \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905w-jethome-jethub-j80.dtb \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905x-libretech-cc.dtb \
meson-gxl-s905x-libretech-cc-v2.dtb \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905x-p212.dtb \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-gxm-wetek-core2.dtb \
meson-axg-s400.dtb \
meson-g12a-u200.dtb \
meson-g12a-radxa-zero.dtb \
meson-g12a-sei510.dtb \
meson-g12a-u200.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
meson-g12b-gtking.dtb \
meson-g12b-gtking-pro.dtb \
meson-g12b-gsking-x.dtb \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2-plus.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
meson-sm1-odroid-hc4.dtb \
meson-sm1-sei610.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
@ -306,6 +320,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
avnet-ultra96-rev1.dtb \
avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb \
zynqmp-a2197-revA.dtb \
zynqmp-dlc21-revA.dtb \
zynqmp-e-a2197-00-revA.dtb \
zynqmp-g-a2197-00-revA.dtb \
zynqmp-m-a2197-01-revA.dtb \
@ -467,6 +482,7 @@ dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \
dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
@ -632,6 +648,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-libretech-all-h5-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-nanopi-r1s-h5.dtb \
sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
@ -815,11 +832,14 @@ dtb-$(CONFIG_MX6UL) += \
imx6ul-liteboard.dtb \
imx6ul-phytec-segin-ff-rdk-nand.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-pico-pi.dtb
imx6ul-pico-pi.dtb \
imx6ul-kontron-n631x-s.dtb \
imx6ull-kontron-n641x-s.dtb
dtb-$(CONFIG_MX6ULL) += \
imx6ull-14x14-evk.dtb \
imx6ull-colibri.dtb \
imx6ull-colibri-emmc.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-seeed-npi-imx6ull-dev-board.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
@ -870,6 +890,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-evk.dtb \
imx8mm-icore-mx8mm-ctouch2.dtb \
imx8mm-icore-mx8mm-edimm2.2.dtb \
imx8mm-kontron-n801x-s.dtb \
imx8mm-kontron-n801x-s-lvds.dtb \
imx8mm-venice.dtb \
imx8mm-venice-gw71xx-0x.dtb \
imx8mm-venice-gw72xx-0x.dtb \
@ -929,7 +951,7 @@ endif
dtb-$(CONFIG_RZA1) += \
r7s72100-gr-peach-u-boot.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
keystone-k2e-evm.dtb \
keystone-k2g-evm.dtb \
@ -1090,7 +1112,14 @@ dtb-$(CONFIG_STM32MP15x) += \
stm32mp15xx-dhcom-picoitx.dtb \
stm32mp15xx-dhcor-avenger96.dtb
dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
dtb-$(CONFIG_SOC_K3_AM6) += \
k3-am654-base-board.dtb \
k3-am654-r5-base-board.dtb \
k3-am65-iot2050-spl.dtb \
k3-am6528-iot2050-basic.dtb \
k3-am6528-iot2050-basic-pg2.dtb \
k3-am6548-iot2050-advanced.dtb \
k3-am6548-iot2050-advanced-pg2.dtb
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
k3-j721e-r5-common-proc-board.dtb \
k3-j7200-common-proc-board.dtb \
@ -1120,6 +1149,8 @@ dtb-$(CONFIG_TARGET_GE_BX50V3) += \
dtb-$(CONFIG_TARGET_GE_B1X5V2) += imx6dl-b1x5v2.dtb
dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb
dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
@ -1128,6 +1159,8 @@ dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb
dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb
dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb
targets += $(dtb-y)

View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ or X11
/*
* Copyright (C) 2018 Grinn Sp. z o.o. -- http://www.grinn-global.com/
* Copyright (C) 2018-2021 Grinn Sp. z o.o. -- http://www.grinn-global.com/
* Author: Marcin Niestroj <m.niestroj@grinn-global.com>
*/
@ -9,5 +9,6 @@
/ {
chosen {
stdout-path = &uart0;
tick-timer = &timer2;
};
};

View File

@ -167,7 +167,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-core-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0490>, <0x045c>, <0x0468>;
reg = <0x0490>, <0x045c>, <0x0468>, <0x0460>, <0x0464>;
};
dpll_core_x2_ck: dpll_core_x2_ck {
@ -207,7 +207,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0488>, <0x0420>, <0x042c>;
reg = <0x0488>, <0x0420>, <0x042c>, <0x0424>, <0x0428>;
};
dpll_mpu_m2_ck: dpll_mpu_m2_ck@4a8 {
@ -223,7 +223,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0494>, <0x0434>, <0x0440>;
reg = <0x0494>, <0x0434>, <0x0440>, <0x0438>, <0x043c>;
};
dpll_ddr_m2_ck: dpll_ddr_m2_ck@4a0 {
@ -247,7 +247,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0498>, <0x0448>, <0x0454>;
reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
};
dpll_disp_m2_ck: dpll_disp_m2_ck@4a4 {
@ -264,7 +264,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-j-type-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x048c>, <0x0470>, <0x049c>;
reg = <0x048c>, <0x0470>, <0x049c>, <0x0474>, <0x0478>;
};
dpll_per_m2_ck: dpll_per_m2_ck@4ac {

View File

@ -199,7 +199,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-core-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x2d20>, <0x2d24>, <0x2d2c>;
reg = <0x2d20>, <0x2d24>, <0x2d2c>, <0x2d48>, <0x2d4c>;
};
dpll_core_x2_ck: dpll_core_x2_ck {
@ -245,7 +245,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x2d60>, <0x2d64>, <0x2d6c>;
reg = <0x2d60>, <0x2d64>, <0x2d6c>, <0x2d88>, <0x2d8c>;
};
dpll_mpu_m2_ck: dpll_mpu_m2_ck {
@ -263,7 +263,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x2da0>, <0x2da4>, <0x2dac>;
reg = <0x2da0>, <0x2da4>, <0x2dac>, <0x2dc8>, <0x2dcc>;
};
dpll_ddr_m2_ck: dpll_ddr_m2_ck {
@ -281,7 +281,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x2e20>, <0x2e24>, <0x2e2c>;
reg = <0x2e20>, <0x2e24>, <0x2e2c>, <0x2e48>, <0x2e4c>;
};
dpll_disp_m2_ck: dpll_disp_m2_ck {
@ -300,7 +300,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-j-type-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x2de0>, <0x2de4>, <0x2dec>;
reg = <0x2de0>, <0x2de4>, <0x2dec>, <0x2e08>, <0x2e0c>;
};
dpll_per_m2_ck: dpll_per_m2_ck {
@ -583,7 +583,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x2e60>, <0x2e64>, <0x2e6c>;
reg = <0x2e60>, <0x2e64>, <0x2e6c>, <0x2e88>, <0x2e8c>;
};
dpll_extdev_m2_ck: dpll_extdev_m2_ck {

View File

@ -335,14 +335,14 @@
/*
* The 128 MiB address range [0xe8000000-0xf0000000] is
* dedicated for PCIe and can be assigned to 8 windows
* with size a power of two. Use one 64 KiB window for
* with size a power of two. Use one 1 MiB window for
* IO at the end and the remaining seven windows
* (totaling 127 MiB) for MEM.
*/
ranges = <0x82000000 0 0xe8000000
0 0xe8000000 0 0x7f00000 /* Port 0 MEM */
0x81000000 0 0xefff0000
0 0xefff0000 0 0x10000>; /* Port 0 IO*/
0x81000000 0 0xeff00000
0 0xeff00000 0 0x100000>; /* Port 0 IO*/
};
};
};

View File

@ -243,6 +243,9 @@
&cp1_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp1_smi_pins>;
cp1_ge_phy0: ethernet-phy@3 {
reg = <1>;
};
@ -292,33 +295,24 @@
/*
* MPP Bus:
* [0-5] TDM
* [6,7] CP1_UART 0
* [8] CP1 10G SFP LOS
* [9] CP1 10G PHY RESET
* [10] CP1 10G SFP TX Disable
* [11] CP1 10G SFP Mode
* [12] SPI1 CS1n
* [13] SPI1 MISO (TDM and SPI ROM shared)
* [14] SPI1 CS0n
* [15] SPI1 MOSI (TDM and SPI ROM shared)
* [16] SPI1 CLK (TDM and SPI ROM shared)
* [24] CP1 2.5G SFP TX Disable
* [26] CP0 10G SFP TX Fault
* [27] CP0 10G SFP Mode
* [28] CP0 10G SFP LOS
* [29] CP0 10G SFP TX Disable
* [30] USB Over current indication
* [31] 10G Port 0 phy reset
* [27-28] SMI
* [29-30] CP1 MSS I2C
* [6-26, 31] GPIO
* [32-62] = 0xff: Keep default CP1_shared_pins:
*/
/* 0 1 2 3 4 5 6 7 8 9 */
pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x8 0x8 0x0 0x0
0x0 0x0 0x3 0x3 0x3 0x3 0x3 0xff 0xff 0xff
0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x0 0x0 0x0
0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x0 0x0 0x0
0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x8 0x8 0x8
0x8 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
0xff 0xff 0xff>;
cp1_smi_pins: cp1-smi-pins {
marvell,pins = < 27 28 >;
marvell,function = <8>;
};
};
&ap_spi0 {

View File

@ -474,21 +474,25 @@
wdt1: watchdog@1e785000 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785000 0x40>;
status = "disabled";
};
wdt2: watchdog@1e785040 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785040 0x40>;
status = "disabled";
};
wdt3: watchdog@1e785080 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785080 0x40>;
status = "disabled";
};
wdt4: watchdog@1e7850C0 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e7850C0 0x40>;
status = "disabled";
};
lpc: lpc@1e789000 {

View File

@ -68,7 +68,7 @@
};
ahb {
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 42 0>;
pinctrl-names = "default";
@ -76,7 +76,7 @@
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};

View File

@ -13,6 +13,30 @@
};
};
&pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc;
};
&pinctrl_qspi1_sck_cs_default {
u-boot,dm-pre-reloc;
};
&pinctrl_qspi1_dat_default {
u-boot,dm-pre-reloc;
};
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
};
&qspi1 {
u-boot,dm-pre-reloc;
flash@0 {
u-boot,dm-pre-reloc;
};
};
&sdmmc0 {
u-boot,dm-pre-reloc;
};
@ -21,10 +45,3 @@
u-boot,dm-pre-reloc;
};
&pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc;
};
&pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc;
};

View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* at91-sama5d2_icp.dts - Device Tree file for SAMA5D2 ICP board
* SAMA5D2 Industrial Connectivity Board
* SAMA5D2 Industrial Connectivity Platform
*
* Copyright (c) 2018, Microchip Technology Inc.
* 2018, Eugen Hristev <eugen.hristev@microchip.com>
@ -33,10 +33,19 @@
};
apb {
uart0: serial@f801c000 { /* mikrobus1 uart */
qspi1: spi@f0024000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_uart>;
pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <83000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
};
};
macb0: ethernet@f8008000 {
@ -46,6 +55,12 @@
status = "okay";
};
uart0: serial@f801c000 { /* mikrobus1 uart */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_uart>;
status = "okay";
};
i2c1: i2c@fc028000 {
dmas = <0>, <0>;
pinctrl-names = "default";
@ -70,6 +85,7 @@
pagesize = <16>;
};
};
pioA: gpio@fc038000 {
status = "okay";
pinctrl {
@ -109,6 +125,26 @@
bias-pull-up;
};
pinctrl_mikrobus1_uart: mikrobus1_uart {
pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>;
bias-disable;
};
pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
pinmux = <PIN_PA6__QSPI1_SCK>,
<PIN_PA11__QSPI1_CS>;
bias-disable;
};
pinctrl_qspi1_dat_default: qspi1_dat_default {
pinmux = <PIN_PA7__QSPI1_IO0>,
<PIN_PA8__QSPI1_IO1>,
<PIN_PA9__QSPI1_IO2>,
<PIN_PA10__QSPI1_IO3>;
bias-pull-up;
};
pinctrl_sdmmc0_default: sdmmc0_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
@ -119,12 +155,6 @@
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
pinctrl_mikrobus1_uart: mikrobus1_uart {
pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>;
bias-disable;
};
};
};
};

View File

@ -76,7 +76,7 @@
status = "okay";
};
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioA PIN_PB12 GPIO_ACTIVE_HIGH
@ -87,7 +87,7 @@
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};

View File

@ -12,6 +12,10 @@
stdout-path = &uart1;
};
memory {
reg = <0x20000000 0x20000000>;
};
onewire_tm: onewire {
gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@ -25,7 +29,7 @@
};
ahb {
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 42 0>;
pinctrl-names = "default";
@ -33,7 +37,7 @@
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};

View File

@ -197,6 +197,14 @@
compatible = "audio-graph-card";
label = "rcar-sound";
dais = <&rsnd_port0>, <&rsnd_port1>;
widgets = "Microphone", "Mic Jack",
"Line", "Line In Jack",
"Headphone", "Headphone Jack";
mic-det-gpio = <&gpio0 2 GPIO_ACTIVE_LOW>;
routing = "Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN3R", "MICBIAS",
"Mic Jack", "IN3R";
};
vccq_sdhi0: regulator-vccq-sdhi0 {
@ -271,12 +279,12 @@
&ehci0 {
dr_mode = "otg";
status = "okay";
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
};
&ehci1 {
status = "okay";
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
};
&hdmi0 {
@ -615,7 +623,7 @@
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
@ -639,7 +647,7 @@
bitclock-master = <&rsnd_endpoint0>;
frame-master = <&rsnd_endpoint0>;
playback = <&ssi1 &dvc1 &src1>;
playback = <&ssi1>, <&dvc1>, <&src1>;
capture = <&ssi0>;
};
};

View File

@ -7,19 +7,10 @@
#include <dt-bindings/clk/versaclock.h>
/ {
aliases {
spi0 = &rpc;
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0xc000000>;
};
memory@57000000 {
device_type = "memory";
reg = <0x0 0x57000000 0x0 0x29000000>;
reg = <0x0 0x48000000 0x0 0x78000000>;
};
osc_32k: osc_32k {
@ -59,12 +50,17 @@
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-rxid";
phy-handle = <&phy0>;
rx-internal-delay-ps = <1800>;
tx-internal-delay-ps = <2000>;
clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>;
clock-names = "fck", "refclk";
status = "okay";
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id004d.d074",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
@ -153,7 +149,7 @@
};
eeprom@50 {
compatible = "microchip,at24c64", "atmel,24c64";
compatible = "microchip,24c64", "atmel,24c64";
pagesize = <32>;
read-only; /* Manufacturing EEPROM programmed at factory */
reg = <0x50>;
@ -279,25 +275,6 @@
};
};
&rpc {
compatible = "renesas,rcar-gen3-rpc";
num-cs = <1>;
spi-max-frequency = <40000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash0: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "spi-flash", "jedec,spi-nor";
spi-max-frequency = <40000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};
&scif_clk {
clock-frequency = <14745600>;
};
@ -340,17 +317,17 @@
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
};
&usb2_clksel {
status = "okay";
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
<&versaclock5 3>, <&usb3s0_clk>;
clock-names = "ehci_ohci", "hs-usb-if",
"usb_extal", "usb_xtal";
<&versaclock5 3>, <&usb3s0_clk>;
status = "okay";
};
&usb3s0_clk {

View File

@ -0,0 +1,29 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Samsung Exynos78x0 SoC device tree source
*
* Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com)
*/
/dts-v1/;
#include "exynos78x0.dtsi"
/ {
compatible = "samsung,exynos78x0", "samsung,exynos7880", "samsung,exynos7870";
aliases {
console = &uart2;
};
chosen {
stdout-path = &uart2;
};
};
&gpioi2c0 {
status = "okay";
};
&fin_pll {
clock-frequency = <26000000>;
};

View File

@ -0,0 +1,204 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Samsung's Exynos7880 SoC pin-mux and pin-config device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
/* ALIVE */
gpio@139F0000 {
etc0: etc0 {
gpio-controller;
#gpio-cells = <2>;
};
etc1: etc1 {
gpio-controller;
#gpio-cells = <2>;
};
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
};
gpa1: gpa1 {
gpio-controller;
#gpio-cells = <2>;
};
gpa2: gpa2 {
gpio-controller;
#gpio-cells = <2>;
};
gpa3: gpa3 {
gpio-controller;
#gpio-cells = <2>;
};
gpq0: gpq0 {
gpio-controller;
#gpio-cells = <2>;
};
};
/* CCORE */
gpio@10630000 {
gpm0: gpm0 {
gpio-controller;
#gpio-cells = <2>;
};
};
/* DISP/AUD */
gpio@148C0000 {
gpz0: gpz0 {
gpio-controller;
#gpio-cells = <2>;
};
gpz1: gpz1 {
gpio-controller;
#gpio-cells = <2>;
};
gpz2: gpz2 {
gpio-controller;
#gpio-cells = <2>;
};
};
/* FSYS0 */
gpio@13750000 {
gpr0: gpr0 {
gpio-controller;
#gpio-cells = <2>;
};
gpr1: gpr1 {
gpio-controller;
#gpio-cells = <2>;
};
gpr2: gpr2 {
gpio-controller;
#gpio-cells = <2>;
};
gpr3: gpr3 {
gpio-controller;
#gpio-cells = <2>;
};
gpr4: gpr4 {
gpio-controller;
#gpio-cells = <2>;
};
};
/* TOP */
gpio@139B0000 {
gpb0: gpb0 {
gpio-controller;
#gpio-cells = <2>;
};
gpc0: gpc0 {
gpio-controller;
#gpio-cells = <2>;
};
gpc1: gpc1 {
gpio-controller;
#gpio-cells = <2>;
};
gpc4: gpc4 {
gpio-controller;
#gpio-cells = <2>;
};
gpc5: gpc5 {
gpio-controller;
#gpio-cells = <2>;
};
gpc6: gpc6 {
gpio-controller;
#gpio-cells = <2>;
};
gpc8: gpc8 {
gpio-controller;
#gpio-cells = <2>;
};
gpc9: gpc9 {
gpio-controller;
#gpio-cells = <2>;
};
gpd1: gpd1 {
gpio-controller;
#gpio-cells = <2>;
};
gpd2: gpd2 {
gpio-controller;
#gpio-cells = <2>;
};
gpd3: gpd3 {
gpio-controller;
#gpio-cells = <2>;
};
gpd4: gpd4 {
gpio-controller;
#gpio-cells = <2>;
};
gpd5: gpd5 {
gpio-controller;
#gpio-cells = <2>;
};
gpe0: gpe0 {
gpio-controller;
#gpio-cells = <2>;
};
gpf0: gpf0 {
gpio-controller;
#gpio-cells = <2>;
};
gpf1: gpf1 {
gpio-controller;
#gpio-cells = <2>;
};
gpf2: gpf2 {
gpio-controller;
#gpio-cells = <2>;
};
gpf3: gpf3 {
gpio-controller;
#gpio-cells = <2>;
};
gpf4: gpf4 {
gpio-controller;
#gpio-cells = <2>;
};
};
};

View File

@ -0,0 +1,280 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Samsung's Exynos7880 SoC pin-mux and pin-config device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com)
*
* Samsung's Exynos7880 SoC pin-mux and pin-config options are listed as device
* tree nodes are listed in this file.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
/* ALIVE */
pinctrl@139F0000 {
uart2_bus: uart2-bus {
samsung,pins = "gpa1-1", "gpa1-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
};
dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq {
samsung,pins = "gpa3-3";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <4>;
};
key_power: key-power {
samsung,pins = "gpa0-0";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
key_voldown: key-voldown {
samsung,pins = "gpa2-1";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
key_volup: key-volup {
samsung,pins = "gpa2-0";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
key_home: key-home {
samsung,pins = "gpa1-7";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
/* TOP */
pinctrl@139B0000 {
i2c0_bus: i2c0-bus {
samsung,pins = "gpc1-1", "gpc1-0";
samsung,pin-function = <2>;
};
sd0_rst: sd0_rst {
samsung,pins = "gpc0-2";
samsung,pin-function = <0>;
};
};
/* DISP/AUD */
pinctrl@148C0000 {
i2s_pmic_bus: i2s-pmic-bus {
samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3", "gpz1-4";
samsung,pin-function = <2>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
i2s_pmic_bus_idle: i2s-pmic-bus_idle {
samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3", "gpz1-4";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
/* FSYS0 */
pinctrl@13750000 {
sd0_clk: sd0-clk {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpr0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd0_rdqs: sd0-rdqs {
samsung,pins = "gpr0-2";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd0_clk_fast_slew_rate_1x: sd0-clk_fast_slew_rate_1x {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
sd0_clk_fast_slew_rate_2x: sd0-clk_fast_slew_rate_2x {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <1>;
};
sd0_clk_fast_slew_rate_3x: sd0-clk_fast_slew_rate_3x {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd0_clk_fast_slew_rate_4x: sd0-clk_fast_slew_rate_4x {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_clk_fast_slew_rate_5x: sd0-clk_fast_slew_rate_5x {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <4>;
};
sd0_clk_fast_slew_rate_6x: sd0-clk_fast_slew_rate_6x {
samsung,pins = "gpr0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <5>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpr1-0";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpr2-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpr2-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpr3-0";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
samsung,pin-con-pdn = <2>;
samsung,pin-pud-pdn = <3>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
samsung,pin-con-pdn = <2>;
samsung,pin-pud-pdn = <3>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpr4-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpr4-1";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpr4-2";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpr4-3", "gpr4-4", "gpr4-5";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <2>;
};
sd2_clk_output: sd2-clk-output {
samsung,pins = "gpr4-0";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd2_cmd_output: sd2-cmd-output {
samsung,pins = "gpr4-1";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd2_clk_fast_slew_rate_1x: sd2-clk_fast_slew_rate_1x {
samsung,pins = "gpr4-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
sd2_clk_fast_slew_rate_2x: sd2-clk_fast_slew_rate_2x {
samsung,pins = "gpr4-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <1>;
};
sd2_clk_fast_slew_rate_3x: sd2-clk_fast_slew_rate_3x {
samsung,pins = "gpr4-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <2>;
};
sd2_clk_fast_slew_rate_4x: sd2-clk_fast_slew_rate_4x {
samsung,pins = "gpr4-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
};
};

View File

@ -0,0 +1,98 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Samsung Exynos7880 SoC device tree source
*
* Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com)
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "exynos78x0-pinctrl.dtsi"
#include "exynos78x0-gpio.dtsi"
/ {
compatible = "samsung,exynos7880";
fin_pll: xxti {
compatible = "fixed-clock";
clock-output-names = "fin_pll";
u-boot,dm-pre-reloc;
#clock-cells = <0>;
};
/* Dummy clock for uart */
fin_uart: uart_dummy_fin {
compatible = "fixed-clock";
clock-output-names = "fin_uart";
clock-frequency = <132710400>;
u-boot,dm-pre-reloc;
#clock-cells = <0>;
};
uart2: serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
u-boot,dm-pre-reloc;
clocks = <&fin_uart>, <&fin_uart>; // driver uses 1st clock
clock-names = "uart", "clk_uart_baud0";
pinctrl-names = "default";
pinctrl-0 = <&uart2_bus>;
};
gpioi2c0: i2c-0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
gpios = <
&gpc1 0 0 /* sda */
&gpc1 1 0 /* scl */
>;
i2c-gpio,delay-us = <5>;
s2mu004@3d {
compatible = "samsung,s2mu004mfd";
};
};
/* ALIVE */
pinctrl_0: pinctrl@139F0000 {
compatible = "samsung,exynos78x0-pinctrl";
reg = <0x139F0000 0x1000>;
};
/* DISP/AUD */
pinctrl_2: pinctrl@148C0000 {
compatible = "samsung,exynos78x0-pinctrl";
reg = <0x148C0000 0x1000>;
};
/* FSYS0 */
pinctrl_4: pinctrl@13750000 {
compatible = "samsung,exynos78x0-pinctrl";
reg = <0x13750000 0x1000>;
};
/* ALIVE */
gpio_0: gpio@139F0000 {
compatible = "samsung,exynos78x0-gpio";
reg = <0x139F0000 0x1000>;
};
/* DISP/AUD */
gpio_2: gpio@148C0000 {
compatible = "samsung,exynos78x0-gpio";
reg = <0x148C0000 0x1000>;
};
/* FSYS0 */
gpio_4: gpio@13750000 {
compatible = "samsung,exynos78x0-gpio";
reg = <0x13750000 0x1000>;
};
/* TOP */
gpio_6: gpio@139B0000 {
compatible = "samsung,exynos78x0-gpio";
reg = <0x139B0000 0x1000>;
};
};

View File

@ -49,7 +49,7 @@
interrupts = <0 64 0x4>;
clock-names = "dspi";
clocks = <&clockgen 4 0>;
num-cs = <6>;
spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@ -157,7 +157,7 @@
compatible = "fsl,ls1012a-ahci";
reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
0x0 0x20140520 0x0 0x4>; /* ecc sata addr */
reg-names = "sata-base", "ecc-addr";
reg-names = "ahci", "sata-ecc";
interrupts = <0 69 4>;
clocks = <&clockgen 4 0>;
status = "disabled";

View File

@ -4,17 +4,20 @@
/ {
aliases {
mmc0 = &esdhc1;
mmc1 = &esdhc0;
i2c0 = &i2c0;
i2c1 = &i2c3;
i2c2 = &i2c4;
rtc0 = &rtc;
ethernet2 = &enetc2;
ethernet3 = &enetc6;
ethernet2 = &enetc_port2;
ethernet3 = &enetc_port3;
};
binman: binman {
multiple-images;
};
};
&binman {
u_boot_rom: u-boot-rom {
filename = "u-boot.rom";
pad-byte = <0xff>;
@ -133,6 +136,31 @@
};
};
&binman {
u-boot-update {
filename = "u-boot.update";
fit {
description = "FIT update image";
images {
u-boot-bin {
description = "U-Boot";
type = "firmware";
os = "u-boot";
arch = "arm";
compression = "none";
load = <0>; /* unused */
blob {
filename = "u-boot.rom";
};
};
};
};
};
};
#ifdef CONFIG_SL28_ENABLE_SER0_CONSOLE
/ {
chosen {
@ -142,7 +170,7 @@
#endif
#ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31
&binman {
&u_boot_rom {
fit {
images {
bl31 {
@ -191,7 +219,7 @@
#endif
#ifdef CONFIG_SL28_SPL_LOADS_OPTEE_BL32
&binman {
&u_boot_rom {
fit {
images {
bl32 {
@ -234,11 +262,6 @@
};
#endif
&i2c0 {
rtc: rtc@32 {
};
};
&fspi {
u-boot,dm-pre-reloc;
flash@0 {
@ -250,7 +273,7 @@
u-boot,dm-pre-reloc;
};
&esdhc0 {
&esdhc {
u-boot,dm-pre-reloc;
};
@ -262,7 +285,28 @@
u-boot,dm-pre-reloc;
};
&serial0 {
&duart0 {
u-boot,dm-pre-reloc;
};
/*
* u-boot will enable the device in the linux device tree in place. Because
* we are using the linux device tree, we have to enable the PCI controller
* ourselves.
*/
&pcie1 {
status = "okay";
};
&pcie2 {
status = "okay";
};
&sata {
status = "okay";
};
&soc {
u-boot,dm-pre-reloc;
};

View File

@ -3,6 +3,6 @@
/ {
aliases {
ethernet0 = &enetc1;
ethernet0 = &enetc_port1;
};
};

View File

@ -8,7 +8,7 @@
* None of the four SerDes lanes are used by the module, instead they are
* all led out to the carrier for customer use.
*
* Copyright (C) 2020 Michael Walle <michael@walle.cc>
* Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
@ -21,28 +21,17 @@
compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
};
&enetc0 {
status = "disabled";
/delete-property/ phy-handle;
};
&enetc_mdio_pf3 {
/* Delete unused phy node */
/delete-node/ ethernet-phy@5;
&enetc1 {
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
status = "okay";
};
/delete-node/ &phy0;
&mdio0 {
phy0: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
@ -56,3 +45,15 @@
};
};
};
&enetc_port0 {
status = "disabled";
/* Delete the phy-handle to the old phy0 label */
/delete-property/ phy-handle;
};
&enetc_port1 {
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -7,3 +7,11 @@
ethernet1 = &mscc_felix_port1;
};
};
&mscc_felix_port0 {
label = "gbe0";
};
&mscc_felix_port1 {
label = "gbe1";
};

View File

@ -2,10 +2,10 @@
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
* This is for the network variant 2 which has no ethernet support in the
* bootloader.
* This is for the network variant 2 which has two ethernet ports. These
* ports are connected to the internal switch.
*
* Copyright (C) 2020 Michael Walle <michael@walle.cc>
* Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
@ -17,12 +17,25 @@
compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a";
};
&enetc0 {
&enetc_mdio_pf3 {
phy1: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
};
};
&enetc_port0 {
status = "disabled";
/*
* In the base device tree the PHY at address 5 was assigned for
* this port. On this module this PHY is connected to a switch
* port instead. Therefore, delete the phy-handle property here.
*/
/delete-property/ phy-handle;
};
&enetc2 {
&enetc_port2 {
status = "okay";
};
@ -31,35 +44,22 @@
};
&mscc_felix_port0 {
label = "gbe0";
label = "swp0";
managed = "in-band-status";
phy-handle = <&phy0>;
phy-mode = "sgmii";
status = "okay";
};
&mscc_felix_port1 {
label = "gbe1";
label = "swp1";
managed = "in-band-status";
phy-handle = <&phy1>;
phy-mode = "sgmii";
status = "okay";
};
&mscc_felix_port4 {
ethernet = <&enetc2>;
ethernet = <&enetc_port2>;
status = "okay";
};
/delete-node/ &phy0;
&mdio0 {
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
phy1: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
};
};

View File

@ -3,6 +3,6 @@
/ {
aliases {
ethernet0 = &enetc0;
ethernet0 = &enetc_port0;
};
};

View File

@ -3,7 +3,7 @@
/ {
aliases {
ethernet0 = &enetc0;
ethernet1 = &enetc1;
ethernet0 = &enetc_port0;
ethernet1 = &enetc_port1;
};
};

View File

@ -5,7 +5,7 @@
* This is for the network variant 4 which has two ethernet ports. It
* extends the base and provides one more port connected via RGMII.
*
* Copyright (C) 2019 Michael Walle <michael@walle.cc>
* Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
@ -18,22 +18,14 @@
compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
};
&enetc1 {
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
status = "okay";
};
&mdio0 {
&enetc_mdio_pf3 {
phy1: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
vddio-supply = <&vddio>;
vddio: vddio-regulator {
@ -47,3 +39,9 @@
};
};
};
&enetc_port1 {
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -2,23 +2,61 @@
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
* Copyright (C) 2019 Michael Walle <michael@walle.cc>
* Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Kontron SMARC-sAL28";
compatible = "kontron,sl28", "fsl,ls1028a";
aliases {
serial0 = &serial0;
serial1 = &serial1;
crypto = &crypto;
serial0 = &duart0;
serial1 = &duart1;
serial2 = &lpuart1;
spi0 = &fspi;
spi1 = &dspi2;
mmc0 = &esdhc1;
mmc1 = &esdhc;
rtc0 = &rtc;
rtc1 = &ftm_alarm0;
};
buttons0 {
compatible = "gpio-keys";
power-button {
interrupts-extended = <&sl28cpld_intc
4 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_POWER>;
label = "Power";
};
sleep-button {
interrupts-extended = <&sl28cpld_intc
5 IRQ_TYPE_EDGE_BOTH>;
linux,code = <KEY_SLEEP>;
label = "Sleep";
};
};
buttons1 {
compatible = "gpio-keys-polled";
poll-interval = <200>;
lid-switch {
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>;
label = "Lid";
};
};
chosen {
@ -26,25 +64,38 @@
};
};
&can0 {
status = "okay";
};
&dspi2 {
status = "okay";
};
&enetc0 {
phy-handle = <&phy0>;
phy-mode = "sgmii";
&duart0 {
status = "okay";
};
&enetc2 {
status = "disabled";
&duart1 {
status = "okay";
};
&enetc6 {
status = "disabled";
&enetc_mdio_pf3 {
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
};
&esdhc0 {
&enetc_port0 {
phy-handle = <&phy0>;
phy-mode = "sgmii";
managed = "in-band-status";
status = "okay";
};
&esdhc {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
@ -63,8 +114,6 @@
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
m25p,fast-read;
spi-max-frequency = <133000000>;
@ -72,17 +121,167 @@
/* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */
spi-rx-bus-width = <2>; /* 2 SPI Rx lines */
spi-tx-bus-width = <1>; /* 1 SPI Tx line */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x000000 0x010000>;
label = "rcw";
read-only;
};
partition@10000 {
reg = <0x010000 0x1d0000>;
label = "failsafe bootloader";
read-only;
};
partition@200000 {
reg = <0x200000 0x010000>;
label = "configuration store";
};
partition@210000 {
reg = <0x210000 0x1d0000>;
label = "bootloader";
};
partition@3e0000 {
reg = <0x3e0000 0x020000>;
label = "bootloader environment";
};
};
};
};
&gpio1 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "TDO", "TCK",
"", "", "", "", "", "", "", "";
};
&gpio2 {
gpio-line-names =
"", "", "", "", "", "", "TMS", "TDI",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c0 {
status = "okay";
rtc@32 {
rtc: rtc@32 {
compatible = "microcrystal,rv8803";
reg = <0x32>;
};
sl28cpld@4a {
compatible = "kontron,sl28cpld";
reg = <0x4a>;
#address-cells = <1>;
#size-cells = <0>;
watchdog@4 {
compatible = "kontron,sl28cpld-wdt";
reg = <0x4>;
kontron,assert-wdt-timeout-pin;
};
hwmon@b {
compatible = "kontron,sl28cpld-fan";
reg = <0xb>;
};
sl28cpld_pwm0: pwm@c {
compatible = "kontron,sl28cpld-pwm";
reg = <0xc>;
#pwm-cells = <2>;
};
sl28cpld_pwm1: pwm@e {
compatible = "kontron,sl28cpld-pwm";
reg = <0xe>;
#pwm-cells = <2>;
};
sl28cpld_gpio0: gpio@10 {
compatible = "kontron,sl28cpld-gpio";
reg = <0x10>;
interrupts-extended = <&gpio2 6
IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N",
"GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N",
"GPIO4_HDA_RST_N", "GPIO5_PWM_OUT",
"GPIO6_TACHIN", "GPIO7";
interrupt-controller;
#interrupt-cells = <2>;
};
sl28cpld_gpio1: gpio@15 {
compatible = "kontron,sl28cpld-gpio";
reg = <0x15>;
interrupts-extended = <&gpio2 6
IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"GPIO8", "GPIO9", "GPIO10", "GPIO11",
"", "", "", "";
interrupt-controller;
#interrupt-cells = <2>;
};
sl28cpld_gpio2: gpio@1a {
compatible = "kontron,sl28cpld-gpo";
reg = <0x1a>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"LCD0 voltage enable",
"LCD0 backlight enable",
"eMMC reset", "LVDS bridge reset",
"LVDS bridge power-down",
"SDIO power enable",
"", "";
};
sl28cpld_gpio3: gpio@1b {
compatible = "kontron,sl28cpld-gpi";
reg = <0x1b>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"Power button", "Force recovery", "Sleep",
"Battery low", "Lid state", "Charging",
"Charger present", "";
};
sl28cpld_intc: interrupt-controller@1c {
compatible = "kontron,sl28cpld-intc";
reg = <0x1c>;
interrupts-extended = <&gpio2 6
IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
@ -107,32 +306,3 @@
&lpuart1 {
status = "okay";
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@5 {
reg = <0x5>;
eee-broken-1000t;
eee-broken-100tx;
};
};
&sata {
status = "okay";
};
&serial0 {
status = "okay";
};
&serial1 {
status = "okay";
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};

View File

@ -2,7 +2,7 @@
/*
* NXP LS1028A-QDS device tree fragment for RCW 1xxx
*
* Copyright 2019-2021 NXP Semiconductors
* Copyright 2019-2021 NXP
*/
/*
@ -13,8 +13,8 @@
#include "fsl-sch-30842.dtsi"
};
&enetc0 {
&enetc_port0 {
status = "okay";
phy-mode = "usxgmii";
phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
};

View File

@ -2,7 +2,7 @@
/*
* NXP LS1028A-QDS device tree fragment for RCW 6xxx
*
* Copyright 2019-2021 NXP Semiconductors
* Copyright 2019-2021 NXP
*/
/*
@ -12,8 +12,8 @@
#include "fsl-sch-30842.dtsi"
};
&enetc0 {
&enetc_port0 {
status = "okay";
phy-mode = "sgmii-2500";
phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
phy-mode = "2500base-x";
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
};

Some files were not shown because too many files have changed in this diff Show More