Two defconfigs were missed when transitioning the SYS_FMAN_FW_ADDR
symbol to Kconfig. CONFIG_SYS_FMAN_FW_ADDR is currently initialized to
0 by default on these builds, which prevents the firmware from loading.
Add the correct symbols to these defconfigs.
Fixes: a97a071d10 ("configs: fsl: migrate FMAN/QE specific defines to Kconfig")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Add support for the authentication of UEFI capsules containing FIT images.
The authentication code is moved out of the function handling raw images
into a new function efi_firmware_capsule_authenticate(). The special case
for the FMP header coming from edk2 tools is preserved. There is no
functional change for capsules containing raw images.
The python test for signed capsules with raw images is renamed with no
functional change and a new test is added for signed capsules containing
FIT images.
This can be tested with sandbox64_defconfig or sandbox_flattree_defconfig,
plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Repair the python tests for authenticated EFI capsules, which can be run
with sandbox_defconfig plus CONFIG_EFI_CAPSULE_AUTHENTICATE=y.
- Account for the reset changes done by commit 3e6f810006 ("efi_loader:
test/py: Reset system after capsule update on disk").
- Fix the capsule GUID typo introduced by commit 2e9c3c6965 ("test:
capsule: Modify the capsule tests to use GUID values for sandbox").
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
The OsIndications is a 64 bit variable, and the current code expects
the value of the variable to be 64 bit. Update the documentation to
reflect this fact.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The GetImageInfo function of the Firmware Mangement Protocol(FMP) gets
called initially to query the size of the image descriptor array that
would have to be allocated. During this call, the rest of the function
arguments, specifically pointers might be passed as NULL. Do not
populate the descriptor_count value before it is known that the call
to GetImageInfo has been made with the allocated buffer for the image
descriptors.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since the power domain driver default select CONFIG_CLK, so we will
meet lots failures without CLK_IMX8MQ, so default select it.
Fixes: commit 4eb82c2e56 ("imx: power-domain: Get rid of SMCCC dependency")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new device tree property "u-boot,version" in the chosen node to
pass the U-Boot version to the operating system.
This can be useful to implement a firmware upgrade procedure from the
operating system.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nicolas Bidron and Nicolas Guigo reported the two bugs below:
"
----------BUG 1----------
In compiled versions of U-Boot that define CONFIG_IP_DEFRAG, a value of
`ip->ip_len` (IP packet header's Total Length) higher than `IP_HDR_SIZE`
and strictly lower than `IP_HDR_SIZE+8` will lead to a value for `len`
comprised between `0` and `7`. This will ultimately result in a
truncated division by `8` resulting value of `0` forcing the hole
metadata and fragment to point to the same location. The subsequent
memcopy will overwrite the hole metadata with the fragment data. Through
a second fragment, this can be exploited to write to an arbitrary offset
controlled by that overwritten hole metadata value.
This bug is only exploitable locally as it requires crafting two packets
the first of which would most likely be dropped through routing due to
its unexpectedly low Total Length. However, this bug can potentially be
exploited to root linux based embedded devices locally.
```C
static struct ip_udp_hdr *__net_defragment(struct ip_udp_hdr *ip, int *lenp)
{
static uchar pkt_buff[IP_PKTSIZE] __aligned(PKTALIGN);
static u16 first_hole, total_len;
struct hole *payload, *thisfrag, *h, *newh;
struct ip_udp_hdr *localip = (struct ip_udp_hdr *)pkt_buff;
uchar *indata = (uchar *)ip;
int offset8, start, len, done = 0;
u16 ip_off = ntohs(ip->ip_off);
/* payload starts after IP header, this fragment is in there */
payload = (struct hole *)(pkt_buff + IP_HDR_SIZE);
offset8 = (ip_off & IP_OFFS);
thisfrag = payload + offset8;
start = offset8 * 8;
len = ntohs(ip->ip_len) - IP_HDR_SIZE;
```
The last line of the previous excerpt from `u-boot/net/net.c` shows how
the attacker can control the value of `len` to be strictly lower than
`8` by issuing a packet with `ip_len` between `21` and `27`
(`IP_HDR_SIZE` has a value of `20`).
Also note that `offset8` here is `0` which leads to `thisfrag = payload`.
```C
} else if (h >= thisfrag) {
/* overlaps with initial part of the hole: move this hole */
newh = thisfrag + (len / 8);
*newh = *h;
h = newh;
if (h->next_hole)
payload[h->next_hole].prev_hole = (h - payload);
if (h->prev_hole)
payload[h->prev_hole].next_hole = (h - payload);
else
first_hole = (h - payload);
} else {
```
Lower down the same function, execution reaches the above code path.
Here, `len / 8` evaluates to `0` leading to `newh = thisfrag`. Also note
that `first_hole` here is `0` since `h` and `payload` point to the same
location.
```C
/* finally copy this fragment and possibly return whole packet */
memcpy((uchar *)thisfrag, indata + IP_HDR_SIZE, len);
```
Finally, in the above excerpt the `memcpy` overwrites the hole metadata
since `thisfrag` and `h` both point to the same location. The hole
metadata is effectively overwritten with arbitrary data from the
fragmented IP packet data. If `len` was crafted to be `6`, `last_byte`,
`next_hole`, and `prev_hole` of the `first_hole` can be controlled by
the attacker.
Finally the arbitrary offset write occurs through a second fragment that
only needs to be crafted to write data in the hole pointed to by the
previously controlled hole metadata (`next_hole`) from the first packet.
### Recommendation
Handle cases where `len` is strictly lower than 8 by preventing the
overwrite of the hole metadata during the memcpy of the fragment. This
could be achieved by either:
* Moving the location where the hole metadata is stored when `len` is
lower than `8`.
* Or outright rejecting fragmented IP datagram with a Total Length
(`ip_len`) lower than 28 bytes which is the minimum valid fragmented IP
datagram size (as defined as the minimum fragment of 8 octets in the IP
Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791) page 25).
----------BUG 2----------
In compiled versions of U-Boot that define CONFIG_IP_DEFRAG, a value of
`ip->ip_len` (IP packet header's Total Length) lower than `IP_HDR_SIZE`
will lead to a negative value for `len` which will ultimately result in
a buffer overflow during the subsequent `memcpy` that uses `len` as it's
`count` parameter.
This bug is only exploitable on local ethernet as it requires crafting
an invalid packet to include an unexpected `ip_len` value in the IP UDP
header that's lower than the minimum accepted Total Length of a packet
(21 as defined in the IP Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791)). Such packet
would in all likelihood be dropped while being routed to its final
destination through most routing equipment and as such requires the
attacker to be in a local position in order to be exploited.
```C
static struct ip_udp_hdr *__net_defragment(struct ip_udp_hdr *ip, int *lenp)
{
static uchar pkt_buff[IP_PKTSIZE] __aligned(PKTALIGN);
static u16 first_hole, total_len;
struct hole *payload, *thisfrag, *h, *newh;
struct ip_udp_hdr *localip = (struct ip_udp_hdr *)pkt_buff;
uchar *indata = (uchar *)ip;
int offset8, start, len, done = 0;
u16 ip_off = ntohs(ip->ip_off);
/* payload starts after IP header, this fragment is in there */
payload = (struct hole *)(pkt_buff + IP_HDR_SIZE);
offset8 = (ip_off & IP_OFFS);
thisfrag = payload + offset8;
start = offset8 * 8;
len = ntohs(ip->ip_len) - IP_HDR_SIZE;
```
The last line of the previous excerpt from `u-boot/net/net.c` shows
where the underflow to a negative `len` value occurs if `ip_len` is set
to a value strictly lower than 20 (`IP_HDR_SIZE` being 20). Also note
that in the above excerpt the `pkt_buff` buffer has a size of
`CONFIG_NET_MAXDEFRAG` which defaults to 16 KB but can range from 1KB to
64 KB depending on configurations.
```C
/* finally copy this fragment and possibly return whole packet */
memcpy((uchar *)thisfrag, indata + IP_HDR_SIZE, len);
```
In the above excerpt the `memcpy` overflows the destination by
attempting to make a copy of nearly 4 gigabytes in a buffer that's
designed to hold `CONFIG_NET_MAXDEFRAG` bytes at most which leads to a DoS.
### Recommendation
Stop processing of the packet if `ip_len` is lower than 21 (as defined
by the minimum length of a data carrying datagram in the IP
Specification Document:
[RFC791](https://datatracker.ietf.org/doc/html/rfc791) page 34)."
Add a check for ip_len lesser than 28 and stop processing the packet
in this case.
Such a check covers the two reported bugs.
Reported-by: Nicolas Bidron <nicolas.bidron@nccgroup.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
The AArch64 TCR_ELx register is a 64-bit register, and many newer
architecture features use bits in the upper half. So far U-Boot was
igorant of those bits, trying to leave them alone.
However, in an effort to set bit 31 to 1, it failed doing so, because
the compiler sign-extended "1 << 31", so that all bits[63:31] got set.
Older ARMv8.0 cores don't define anything dangerous up there, but newer
architecture revisions do, and setting all those bits will end badly:
=================
$ qemu-system-aarch64 -cpu max ....
U-Boot 2022.07-rc1 (May 09 2022 - 15:21:00 +0100)
DRAM: 1.5 GiB
================= (hangs here)
Defining TCR_ELx_RSVD to "1U << 31" avoids the sign-extension, so all
upper bits stay at a safe 0 value. This means no more surprises when
U-Boot runs on a more capable CPU core.
Reported-by: Balaji Anandapadmanaban <Balaji.Anandapadmanaban@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Peter Collingbourne <pcc@google.com>
If the device fails to probe - for example, when there is no
ethaddr set - then the private data is automatically freed
but the mdiobus remains registered.
Fixes: 1e354cb393 ("drivers: net: fsl_enetc: register internal MDIO bus")
Signed-off-by: Michael Walle <michael@walle.cc>
Commit b1a14f8a1c ("UBIFS: Change ubifsload to not read beyond the
requested size") added optimization to do not read more bytes than it is
really needed. But this commit introduced incorrect handling of the hole at
the end of file. This logic cause U-Boot to crash or lockup when trying to
read from the ubifs filesystem.
When read_block() call returns -ENOENT error (not an error, but the hole)
then dn-> structure is not filled and contain garbage. So using of dn->size
for memcpy() argument cause that U-Boot tries to copy unspecified amount of
bytes from possible unmapped memory. Which randomly cause lockup of P2020
CPU.
Fix this issue by copying UBIFS_BLOCK_SIZE bytes from read buffer when
dn->size is not available. UBIFS_BLOCK_SIZE is the size of the buffer
itself and read_block() fills buffer by zeros when it returns -ENOENT.
This patch fixes ubifsload on P2020.
Fixes: b1a14f8a1c ("UBIFS: Change ubifsload to not read beyond the requested size")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pull request for efi-2022-07-rc4-3
UEFI:
* fix a problem in loading an image from a short-path
* fix building the bootmenu command for CONFIG_EFI_LOADER=n
* correct the bootefi command syntax
* add firmware management protocol to the documentation
Others:
* bootmenu: fix bootmenu title handling
Tested-by: Pali Rohár <pali@kernel.org> [n900, for bootmenu working as before]
The commit a3d0aa87ac ("bootmenu: update bootmenu_entry structure")
changes the bootmenu title type from char to u16(UTF16 string)
to support EFI based system. If EFI_LOADER is not enabled,
printf("%ls") is not supported, so bootmenu does not appear
correctly.
This commit changes the type of menu title from u16(UTF16) to
utf-8 string and EFI strings is conveted into utf-8.
Fixes: a3d0aa87ac ("bootmenu: update bootmenu_entry structure")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Tested-by: Pali Rohar <pali@kernel.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The firmware management protocol can be used to manage device firmware.
U-Boot can be configured to provide an implementation.
Document the related functions in the API section.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This fixes the following warnings:
./lib/efi_loader/efi_firmware.c:283: warning: Function parameter or member 'package_version' not described in 'efi_firmware_fit_get_image_info'
./lib/efi_loader/efi_firmware.c:283: warning: Function parameter or member 'package_version_name' not described in 'efi_firmware_fit_get_image_info'
./lib/efi_loader/efi_firmware.c:369: warning: bad line: firmware image
./lib/efi_loader/efi_firmware.c:395: warning: Function parameter or member 'package_version' not described in 'efi_firmware_raw_get_image_info'
./lib/efi_loader/efi_firmware.c:395: warning: Function parameter or member 'package_version_name' not described in 'efi_firmware_raw_get_image_info'
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This commit fixes the following compile warnings
for the documentation.
./include/charset.h:276: warning: Function parameter or member 'size' not described in 'u16_strlcat'
./include/charset.h:276: warning: Excess function parameter 'count' description in 'u16_strlcat'
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Booting from a short-form device path which starts with the first element
being a File Path Media Device Path failed because it doesn't contain
any valid device with simple file system protocol and efi_dp_find_obj()
in efi_load_image_from_path() will return NULL.
For instance,
/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Scsi(0,0)/\helloworld.efi
-> shortened version: /\helloworld.efi
With this patch applied, all the media devices with simple file system
protocol are enumerated and the boot manager attempts to boot temporarily
generated device paths one-by-one.
This new implementation is still a bit incompatible with the UEFI
specification in terms of:
* not creating real boot options
* not try
"If a device does not support the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, but
supports the EFI_BLOCK_IO_PROTOCOL protocol, then the EFI Boot Service
ConnectController must be called for this device with DriverImageHandle
and RemainingDevicePath set to NULL and the Recursive flag is set to TRUE."
(See section 3.1.2 "Load Option Processing".)
But it still gives us a closer and better solution than the current.
Fixes: commit 9cdf470274 ("efi_loader: support booting via short-form device-path")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This helper function will be used to determine if the device is
removable media, initially for handling a short-path loading.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For indicating the address and size of a memory region other commands use a
<addr>[:<size>] syntax. Do the same for bootefi.
Fixes: 2058983689 ("cmd: bootefi: restore ability to boot arbitrary blob")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Changing the console timeout to 500 ms without restoring the original value
leads to failures in other tests. As the console timeout change is not
necessary for the text input protocol tests remove it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The commit 2158b0da22 ("bootmenu: add Kconfig option
not to enter U-Boot console") disables to enter U-Boot
console from bootmenu as default, this change affects the
existing bootmenu users.
This commit reverts the default behavior, the bootmenu can
enter U-Boot console same as before.
CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is renamed
BOOTMENU_DISABLE_UBOOT_CONSOLE and depends on
AUTOBOOT_MENU_SHOW.
Fixes: 2158b0da22 ("bootmenu: add Kconfig option not to enter U-Boot console")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Tested-by: Pali Rohar <pali@kernel.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The following Python packages are used by U-Boot, too:
* python3-asteval
* python3-subunit
* python3-testtools
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Image created by LTO is not friendly to debugger, let's document this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Mention CONFIG_CC_OPTIMIZE_FOR_DEBUG and LLDB.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There are no defined instruction sequences in include/valgrind.h for
Risc-V, so CONFIG_VALGRIND will do nothing on this arch (and possibly won't
compile?). Update Kconfig accordingly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In the bootmenu unit test the console timeout is set to 500 ms.
Other tests rely on the original timeout. Ensure that the original value
is restored.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
alloc_read_gpt_entries() writes differentiated error messages.
The caller is_gpt_valid() should not write an extra possibly wrong message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Fixes for pytest timeout in CI, missing dependency on PCI for the
e1000 driver, fix for CVE-2022-30767 (NFS), TI K3 AM642 DTS bugfix,
MAINTAINERS updates, mksquashfs version check fix.
Testing with mksquasshfs 4.5.1 results in an error
ValueError: could not convert string to float: '4.5.1'
Version 4.10 would be considered to be lower than 4.4.
Fixes: 04c9813e95 ("test/py: rewrite common tools for SquashFS tests")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions
for ram and bank init") ddr_init() and dram_bank_init() have
switched to fdtdec for getting the memory configuration from
the am64xx dts files instead of using hardcoded values. This
requires an accessible memory node in SPL as we already have
in k3-am642-r5-evm.dts.
Make the memory node accessible in A53 SPL for both am642-sk
and am642-evm and in am642-sk R5 SPL.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add the rest of the ASPEED drivers that are in tree. Most are obvious,
except for ftgmac100 which matches the register layout used in the
ASPEED SoC.
I am the Linux maintainer for the ASPEED kernel port, and help maintain
the fork of u-boot used for OpenBMC, so add myself as a reviewer so I
can stay informed about u-boot changes.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This patch mitigates the vulnerability identified via CVE-2019-14196.
The previous patch was bypassed/ineffective, and now the vulnerability
is identified via CVE-2022-30767. The patch removes the sanity check
introduced to mitigate CVE-2019-14196 since it's ineffective.
filefh3_length is changed to unsigned type integer, preventing negative
numbers from being used during comparison with positive values during
size sanity checks.
Signed-off-by: Andrea zi0Black Cappa <zi0Black@protonmail.com>
Reset the console timeout value as some tests may change its default
value during the execution.
This fixes the random case timeout issue seen in the U-Boot CI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Set kernel_comp_addr_r and kernel_comp_size for compressed kernel.
Adjust existing addresses for ramdisk, so that kernel_comp_addr_r
comes before the ramdisk image, since the decompressed kernel size
is known to us. This way we can allow big ramdisk image to be loaded.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Set kernel_comp_addr_r and kernel_comp_size for compressed kernel.
Adjust existing addresses for ramdisk, so that kernel_comp_addr_r
comes before the ramdisk image, since the decompressed kernel size
is known to us. This way we can allow big ramdisk image to be loaded.
Update unleashed.rst to remove the manual environment configuration
for compressed kernel boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Move kernel_comp_addr_r to an address that comes before the ramdisk
image, since the decompressed kernel size is known to us. This way
we can allow big ramdisk image to be loaded.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Clean up asm/io.h by
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa, mem_pci)
This massively improves the readability of the file.
Suggested by commits:
7ab2e47d27 ("arm: Clean up asm/io.h")
909d0399a5 ("ARM: asm/io.h: kill off confusing #ifdef __mem_pci block")
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Commit ba1ed5b022 ("Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig") clearly
defined that this option is available for SANDBOX (was also for already
removed NDS32). That's why there is no way how this code can be enabled
with current Kconfig layout for riscv.
Based on this removing this code.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The sbi command displays the ID of the implementation of the RISC-V
Supervisor Binary Interface Specification. A new ID for Coffer has recently
been added.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Disable BINMAN_FDT for ae350 boards which don't actually use it.
Fixes: 836eac7c6f ("fdt: Make OF_BOARD a bool option")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Enable OF_HAS_PRIOR_STAGE for ae350 boards with OF_BOARD
Fixes: 239d22c795 ("fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARD")
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Xilinx changes for v2022.07-rc4
zynqmp:
- Fix DP PLL configuration for zcu102/zcu106 and SOM
- Fix split mode for starting R5s
- DT fixes
- Remove firmware node for mini configurations
- Wire TEE for multi DTB fit image
xilinx:
- Handle board_get_usable_ram_top(0) properly
phy:
- Extend psgtr timeout
mmc:
- Fix mini configuration which misses zynqmp_pm_is_function_supported()
The bulk of it is (finally!) some DT sync from the kernel. We refrained
from syncing one incompatible change, as this would spoil booting Linux
kernels before v5.13 with U-Boot's DT (via UEFI, for instance).
I test booted Linux v5.18 and v5.4 with that new DT on some boards, and
the headless peripherals (MMC, USB, Ethernet) seemed to work.
The rest are fixes:
- silencing missing clock warnings due to the new pinctrl driver
- fixing "UART0 on PortF", allowing UART access through the SD card pins
- add an F1C100s clock driver, to enable MMC support (SPI comes later)
- some cleanups for CONS_INDEX_n in Kconfig
Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and
OrangePi-Zero.
These were only ever implied by sunxi platforms, and that usage has
been removed. Current practice is to specify CONFIG_CONS_INDEX in each
board's defconfig.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
(usually used for the SD card) as UART0. Some SoCs use the mux value of
3 for this, while others use 4.
The combination of Kconfig symbols we currently use was not quite right:
we mis-configure the A31, A64, H6 and H616.
Going through the list in the pinctrl driver, there are only a few older
SoCs that use a value of 4, so revert the #ifdef clause, and name those
explicitly, instead of the other way around.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Some devices enumerate various clocks in their DT, and many drivers
just blanketly try to enable all of them. This creates problems
since we only model a few gate clocks, and the clock driver outputs
a warning when a clock is not described:
=========
sunxi_set_gate: (CLK#3) unhandled
=========
Some clocks don't have an enable bit, or are already enabled in a
different way, so we might want to just ignore them.
Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
a GATE_DUMMY macro that can be used in the clock description array.
Define a few clocks, used by some pinctrl devices, that way to suppress
the runtime warnings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
So far we didn't describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=========
sunxi_set_gate: (CLK#58) unhandled
=========
Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Now that the pinmux conflict is handled in the board code (by skipping
setup for the one conflicting MMC controller), the driver does not need
to be entirely disabled based on the UART pinmux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, selecting UART0_PORT_F entirely disables MMC support on sunxi
platforms. But this is a bigger hammer then needed. Muxing UART0 to the
pins on port F only causes a conflict with MMC0, so minimize the impact
by specifically skipping MMC0 init. We can continue to use MMC1/2 if
those are enabled.
Let's also remove the preprocessor check while refacting this function.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Use the de10-nano files as templates for the de10-standard board.
The files in qts directory are generated by quartus from the GHRD
design.
Signed-off-by: Humberto Naves <hsnaves@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
- Fix PowerPC NOR booting, important SPI uclass fixes/updates, gic_v2
fix when CPU is not in EL3, fsl_esdhc_spl fix, and squashfs fix for
linking on some architectures, and fix phy_string_for_interface
Add the tpm2_tis_i2c driver that should support any TPMv2 compliant
I2C chips, such as the NPCT75X chip.
[Ilias rename priv_auto_alloc_size to priv_auto]
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Commit 0980cbba7b ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy
support") changed number of sectors which are read but did not adjusted
error check.
Fix it and check for if correct number of sectors were read.
Fixes: 0980cbba7b ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This would prevent configuring non-secure regs in case gic security
extensions are not emulated in Qemu.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode
and logically calls spi_get_bus_and_cs(). In case spi mode and speed are
not read from DT, make usage of spi_flash_probe() instead.
To sum-up:
- Previous call tree was:
spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
- Current call tree is:
spi_flash_probe() -> _spi_get_bus_and_cs()
spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
This patch impacts the following :
- cmd/sf.c: if spi mode and/or speed is passed in argument of
do_spi_flash_probe(), call spi_flash_probe() otherwise call
spi_flash_probe_bus_cs().
- drivers/net/fm/fm.c: as by default spi speed and mode was set to
0 and a comment indicates that speed and mode are read from DT,
use spi_flash_probe_bus_cs().
- drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read
from DT by all platforms using this driver, so keep legacy and replace
spi_flash_probe_bus_cs() by spi_flash_probe();
- drivers/net/sni_netsec.c : spi speed and mode are not read from DT,
so replace spi_flash_probe_bus_cs() by spi_flash_probe().
- drivers/usb/gadget/max3420_udc.c: Can't find any platform which make
usage of this driver, nevertheless, keep legacy and replace
spi_get_bus_and_cs() by _spi_get_bus_and_cs().
- env/sf.c: a comment indicates that speed and mode are read
from DT. So use spi_flash_probe_bus_cs().
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
mpc85xx NOR binary contains also reset vector and therefore option
CONFIG_MPC85XX_HAVE_RESET_VECTOR must be defined.
When build system uses binman, it takes care of constructing final image
which consist of u-boot-without-reset-vector, DTB and reset-vector.
CONFIG_OF_EMBED does not use binman, there is no external DTB and Makefile
produce directly final u-boot.bin binary.
So in this case mpc85xx reset vector must not be stripped from the final
u-boot.bin binary. Fix it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Commit e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
fixed SD card booting on mpc85xx boards but broke NOR booting on these
boards. Reason is that U-Boot build system for NOR images uses binman and
this binman ignores alignment defined in linker script. Instead it has own
config file where is alignment defined.
Fix binman alignment for mpc85xx boards to match what is _now_ defined in
linker script.
This change fixes building of U-Boot for NOR booting on P2020 board.
Fixes: e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
Signed-off-by: Pali Rohár <pali@kernel.org>
When compling for x86:
ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read':
u-boot/fs/squashfs/sqfs.c:1443: undefined reference to `__udivmoddi4'
ld.bfd: u-boot/fs/squashfs/sqfs.c:1521: undefined reference to `__udivmoddi4'
Signed-off-by: Sean Nyekjaer <sean.nyekjaer.ext@siemensgamesa.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add support for reading GPIO pin value when function is output.
With this patch applied, gpio toggle command is working.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Convert the board to DM I2C and DM RTC. This leads to removal of board
side iomuxc configuration, which is now done using pin control driver,
and conversion of board side legacy I2C accessors to DM ones.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
The original Allwinner F1C100 .dtsi imported from the Linux kernel tree
used the wrong compatible string for the watchdog timer, so the Allwinner
DM reset driver was not working properly. We worked around this by
disabling the SYSRESET driver, so the hardcoded SPL reset driver took
over.
Now the issue was fixed in the DTs in mainline Linux, and we synced the
fixed .dtsi file into U-Boot, so drop the hack and use the normal U-Boot
proper reset infrastructure.
This reverts commit cfcf1952c1.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The initial U-Boot F1C100s port was based on the mainline kernel DT
files, which were quite basic and were missing the essential MMC and
SPI peripherals. While we could work around this in the SPL by
hardcoding the required information, this left U-Boot proper without SD
card or SPI flash support, so actual loading would require FEL boot.
Now the missing DT bits have been submitted and accepted in the kernel
tree, so lets sync back those files into U-Boot to enable MMC and
SPI, plus benefit from some fixes.
This is a verbatim copy of the .dts and .dtsi file from
linux-sunxi/dt-for-5.19[1], which have been part of linux-next for a
while as well.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/log/?h=sunxi/dt-for-5.19
Link: https://lore.kernel.org/linux-arm-kernel/20220317162349.739636-1-andre.przywara@arm.com/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Copy the devicetree source for the H6 SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
This commit also adds the following new board devicetrees:
- sun50i-h6-pine-h64-model-b.dts
- sun50i-h6-tanix-tx6-mini.dts
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A64 SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1
tag. None of the existing boards had any devicetree updates.
This commit adds the following new board devicetrees:
- sun8i-r40-oka40i-c.dts
- sun8i-t3-cqa3t-bv3.dts
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetrees:
- sun8i-s3-elimo-initium.dts
- sun8i-v3-sl631-imx179.dts
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing
boards from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
This commit also adds the following new board devicetree:
- sun8i-h3-nanopi-r1.dts
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A83T SoC and all existing boards
from the Linux v5.18-rc1 tag.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
As with the other SoCs, updates of note include adding detection GPIO
properties in the USB PHY nodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A80 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This update should not impact any existing U-Boot functionality.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.
These changes are combined into one commit due to interdependencies:
- The unit addresses were removed from bitbanged I2C buses, which
drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
and sun6i-a31-colombus.dts.
- The pinctrl nodes were renamed, including some used by the shared
header sunxi-reference-design-tablet.dtsi.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.
This commit also adds the following new board devicetrees:
- sun5i-a13-licheepi-one.dts
- sun5i-a13-pocketbook-touch-lux-3.dts
- sun5i-gr8-evb.dts
- sun8i-a23-ippo-q8h-v1.2.dts
- sun8i-a23-ippo-q8h-v5.dts
- sun8i-a33-et-q8-v1.6.dts
- sun8i-a33-ippo-q8h-v1.2.dts
- sun8i-r16-nintendo-super-nes-classic.dts
As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetree:
- sun4i-a10-topwise-a721.dts
While this update should not impact any existing U-Boot functionality,
the changes to the USB PHY detection GPIO properties are needed to
convert that driver to use the DM GPIO framework.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetrees:
- sun7i-a20-haoyu-marsboard.dts
- sun7i-a20-linutronix-testbox-v2.dts
- sun7i-a20-olinuxino-lime-emmc.dts
This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix Mele M5 U-Boot only DT]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Missing nodes may also be signaled via -ENODATA. We need to check for
that to prevent failing in non-usb3 setups.
Furthermore, dev.phy must be NULL'ed in case usb3-phy was not found.
Fixes: 142d50fbce ("usb: dwc3: Add support for usb3-phy PHY configuration")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Before this commit device tree selection could rely solely on
differentiating the iMX6 processor variant Q and DL. After adding two new
carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs
makes this approach infeasible.
It is now required to specify the carrier board (dhcom-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add a u-boot dtsi for configuring the FEC node of the DH DRC02.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add a u-boot dtsi for configuring the FEC node of the DH picoITX.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Firstly the FEC can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.
Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from
board header. This is required, because the DH picoITX and DRC02 boards
require different settings than PDK2. The corresponding 'phy-handle'
device tree properties are already there.
I tested this change on picoITX and DRC02, but on PDK2 it is untested.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
In the DH electronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.
The label has been newly created for all iMX6QDL DHCOM boards.
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The upstream DT regulators node subnodes are named BUCKn and LDOn,
the downstream DT regulators node subnodes are named buckn and ldon,
add the upstream match.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move the preloader_console_init() call after spl_early_init() to avoid
board hang in SPL.
While at it remove explicit in-code console/debug UART pinmuxing (uart1
and its pinmuxing are already marked as u-boot,dm-spl via device tree).
Fixes: 4551e18987 ("configs: verdin-imx8mm: verdin-imx8mp: enable dm serial")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
The device tree is copied from Linux, see [1]. The only difference
compared to the Linux DT is the removal of usbphynop properties. They are
defined in the Linux version of imx6qdl.dtsi, but not in the u-boot
version.
[1] Commit 6192cf8ac082 from
git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
Signed-off-by: Philip Oberfichtner <pro@denx.de>
If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.
Cc: Fabio Estevam <festevam@gmail.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.
The problematic part of old code was in this part:
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd->size >> chip->page_shift) {
free(page_buf);
return -ENOMEM;
}
}
Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm
Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0
Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Select the CMD_UNZIP option so that the 'gzwrite' command
can be used to flash wic.gz image into the eMMC.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.
This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,
The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
commit 61cf225053 ("board: gateworks: gw_ventana: use comomn GSC driver")
moved to the common GSC driver and moved remaining board-specific
functions to eeprom.c. The functions in gsc.c are no longer used and it
was removed from the Makefile but the file itself was not removed.
Remove it now.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The uart2 and its pinmux are already marked with u-boot,dm-spl but we
need to move the call to preloader_console_init() after spl_early_init()
to avoid a board hang as dm can't be used until after spl_early_init()
due to the uart driver not enabling the uart clock.
Remove the manual config of the UART pinmux now that it is no longer
needed.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.
Fixes: commit 2395625209 ("board: gateworks: venice: add imx8mp-venice-gw740x support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The IMX8M based Venice boards all have device-tree fec nodes that
use proper dt with a phy-handle pointing to a phy with reg assigned
to the proper phy address.
There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when
a proper dt is used - remove it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
To i.MX8, M core stack is pre-coded in source code, so need to get it
before kicking M core. The stack pointer is stored in the first word of
the first PT_LOAD section __isr_vector. So use a num to index the
section loading.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me
tmp = 0x00ffff00
tmp = 0x00070700
tmp = 0x00000000
tmp = 0x00101000
and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.
So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.
This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is
capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz
to guarantee this I2C device can work correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
When trying to boot via USB on i.MX8MN it is necessary to specify
the U-Boot environment location, otherwise the boot process simply
hangs.
Specify the environment location when booting from USB.
Tested on a imx8mn-evk.
Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The Avenger96 board comes in multiple regulator configurations.
- rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
boot and contains extra Enpirion EP53A8LQI DCDC converter which
supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
- rev.200L have Buck3 preconfigured to 1V8 operation and have no
Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.
Configure the Buck3 voltage on this board per PMIC NVM settings and
update buck3 voltage limits in DT passed to OS before booting OS to
prevent potential hardware damage.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
BTN_MISC looks like the most reasonable option for this button.
Button is used by firmware to indicate (after reset, power up) that user
wants to do firmware upgrade via firmware update utility.
For bootloader or OS is this just user button which is worth to have it
mapped.
Also button can be used as a wakeup source and pressing it for more time
can generate more chars that's why also adding wakeup-source and autorepeat
properties.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/7f6d627473632c3c3036ec9f6aaa36e00f4615e2.1652262769.git.michal.simek@amd.com
OPP table name now should start with "opp-table" and OPP entries
shouldn't contain commas and @ signs in accordance to the new schema
requirement.
The same change was done in Linux by commit c6d4a8977598 ("ARM: tegra:
Rename CPU and EMC OPP table device-tree nodes"), commit ffbe853a3f5a
("ARM: dts: sunxi: Fix OPPs node name") or commit b7072cc5704d ("arm64:
dts: qcom: qcs404: Rename CPU and CPR OPP tables").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a1176349448df35127dbac15c1eeb2229505bae7.1652262769.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations for the zynqmp-sm-k26-revA som.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
- DP system time clock PLL should use RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Register 0xFD1A007C configures the DP system time clock PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa7e9abc419c9d7648405d1c62367dbe701d09b8.1652709736.git.michal.simek@amd.com
In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due
to this the framework only issues 1-1-1 write commands to the GQSPI driver.
But the GQSPI controller is capable of handling 1-4-4 write commands, so
updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable
the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This
will increase the tx data transfer rate, as now the tx data will be
transferred on four lines instead on single line.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
This patch fixes two issues in the set_r5_reset function.
1. When in split mode, the lpd_amba_rst bit should only be set when
both r5 cpu cores are in reset. Otherwise, if one r5 core is still
running, setting the lpd_amba_rst bit will cause an error for the
running core. The set_r5_reset function has been modified to check
if the other r5 core is still running before setting the lpd_amba_rst
bit.
2. The cpu_disable function was always assuming that the r5 cores
are in split mode when resetting either core 4 or 5. This is
incorrect for lockstep functionality. This patch adds a function
check_r5_mode to handle the cpu_disable function correctly for
the r5 cores by checking the mode and handling the reset appropriately.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d99cbd7f2394ac055ef27457298f554ff0747ba7.1651648344.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations for the
zynqmp-zcu102-revA evaluation board.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b2eb87758e0cd4844e1754da8c58fce58d9cf683.1651740949.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations
for the zynqmp-zcu106-revA evaluation board.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/62538b4a04dee28a6fc8ac5b85f8c845a5a76aa4.1651740988.git.michal.simek@amd.com
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu106-rev1.0 evaluation board.
The Linux DP driver expects the DP to be using the following PLL config:
- DP video PLL should use the VPLL (0x0)
- DP audio PLL should use the RPLL (0x3)
Register 0xFD1A0070 configures the DP video PLL.
Register 0xFD1A0074 configures the DP audio PLL.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ae42ad6185418713a473660c8d15903299af7764.1652192319.git.michal.simek@amd.com
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED
uclass does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
uDPU relies on using fixed-phy for the SFP support, and since the
fixed-phy parsing was moved to the generic driver instead of mvneta
networking stopped working on uDPU with:
uDPU>> dhcp
dm_eth_phy_connect failed
This is due to the conversion commit not enabling fixed-phy support
in defconfig like it did for other boards.
Fixes: 77fcf3cf12 ("net: mvneta: Convert to use PHY_FIXED for fixed-link")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
UART base address is located in internal registers.
Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000
and in proper U-Boot at address 0xf1000000.
Fix DEBUG_UART_BASE option for all 32-bit mvebu boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Internal registers in SPL are at address 0xd0000000 and in proper U-Boot at
address 0xf1000000. UART base address is located in internal registers.
Fix DEBUG_UART_BASE option to correct value for both SPL and proper U-Boot.
This change fixes hangup of proper U-Boot when it is trying to print
something via debug UART.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so
proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE)
is used based on building target.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Stefan Roese <sr@denx.de>
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL.
In some cases base address of UART is different in SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Moving of internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE
needs to be done very early, prior calling any function which may touch
internal registers, like debug_uart_init().
So do it earlier in arch_very_early_init() instead of arch_cpu_init().
Movement is done in proper U-Boot, not in SPL. SPL may return to bootrom
and bootrom requires internal registers at (old) expected location.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Nothing selects ARMADA_64BIT. Instead the 64-bit SoCs just select ARM64
directly. Remove the unused config item.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CONFIG_MVEBU_NAND_BOOT, CONFIG_MVEBU_SPI_BOOT, CONFIG_MVEBU_MMC_BOOT and
CONFIG_MVEBU_UBOOT_DFLT_NAME are unused when CONFIG_CMD_MVEBU_BUBT is not
enabled. So hide them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
board_get_usable_ram_top() was designed for getting the top most location
for U-Boot allocation that's why function itself supports via total_size
parameter to find out where the right location for U-Boot is.
But function itself is also reused by different (EFI) which is passing
total_size as 0 to find out where the usable ram top is. For this case
doesn't make sense (a waste time) to call any lmb functions.
That's why simply return gd->ram_top.
And gd->ram_top is filled already based on previous call for U-Boot iself.
The same solution is also used by stm32mp by commit 92b611e8b0 ("stm32mp:
correctly handle board_get_usable_ram_top(0)") and commit c8510e397f
("stm32mp: Fix board_get_usable_ram_top()").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/44470619e74f3e480b70deac24578e3e0d5c907e.1651225945.git.michal.simek@amd.com
- Migrate CONFIG_MTD_CONCAT to Kconfig, use CONFIG_VAL/IS_ENABLED in
more places, rename SPL_LEGACY_IMAGE_SUPPORT to
SPL_LEGACY_IMAGE_FORMAT and update some related dependencies for TI
platforms.
Update the diagnostic message with revised location of document, which
changed in 3e9fddfc4f ("doc: Move devicetree control doc to rST")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use
IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the
initcall pointers.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if
and when that gets implemented, one would almost certainly want to use
a different address and/or size for the buffer (e.g., U-Boot proper
might specify an address in DRAM and a generous buffer, while SPL
would be much more constrained).
So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the
code use SPL_-specific values. No functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
TI secure devices chain-of-trust depends on FIT image processing,
enable it by default on these devices. This also reduces the delta
between the secure and non-secure defconfig files.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Non-FIT image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot checks.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Booting of non-FIT images bypass our chain-of-trust boot flow,
these options should not be allowed when high security is set.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This matches what this support is called in the non-SPL case. The postfix
_SUPPORT is redundant as enabling Kconfig options implies support.
With this we can use CONFIG_IS_ENABLED() as needed.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add new STM32 MCU boards and Documentation
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
We should only build support for misc if the appropriate SPL/TPL symbol
is defined. To ease the transition, make SPL/TPL_MISC default to MISC.
This is necessary because many drivers don't specify their dependencies
properly. These defaults can be removed once all drivers depend on the
appropriate config.
Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC]
Signed-off-by: Tom Rini <trini@konsulko.com>
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar
except their respective device tree file. These 3 boards uses the same
TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h
and same board file board/st/stm32f746-disco/stm32f746-disco.c)
To be able to compile these 3 boards, replace the hard-coded device-tree
name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE
which is set in each board defconfig file with the correct value.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Replace CONFIG_SUPPORT_SPL by CONFIG_SPL_BUILD to allow
dram_init() execution when using none SPL defconfig
(stm32f746-disco_defconfig).
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The current stm32f769-disco_defconfig file supports SPL, rename it to
stm32f769-disco_spl_defconfig to reflect the supported configuration.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The current stm32f746-disco_defconfig file supports SPL, rename it to
stm32f746-disco_spl_defconfig to reflect the supported configuration.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This allows to concatenate spl and u-boot binaries together.
Previously, both binaries has to be flashed separately at the correct
offset (spl at offset 0 and u-boot at offset 0x8000).
With this patch, only one binary is generated (u-boot-with-spl.bin)
and has to be copied in flash at offset 0 using openocd for example
or simply copied in exported mass storage.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support of phy-tuning properties for sm32-usbphyc's phy tuning
aligned with v5.15 kernel bindings.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
Commit dbf928dd26 ("gpio: stm32f7: Add gpio bank holes management")
proposed a first implementation by not counting GPIO "inside" hole. GPIO
are not displaying correctly using gpio or pinmux command when GPIO holes
are located at the beginning of GPIO bank.
To simplify, consider that all GPIO have 16 GPIO and use the gpio_ranges
struct to indicate if a GPIO is mapped or not. GPIO uclass offers several
GPIO functions ("input", "output", "unused", "unknown" and "func"), use
"unknown" GPIO function to indicate that a GPIO is not mapped.
stm32_offset_to_index() is no more needed and removed.
This must be reflected using the "gpio" command to indicate to user
that a particular GPIO is not mapped (marked as "unknown") as shown below:
Example for a 16 pins GPIO bank with the [2-7] mapping (only 6 pins
mapped):
GPIOI0 : unknown
GPIOI1 : unknown
GPIOI2 : analog
GPIOI3 : analog
GPIOI4 : alt function 0 push-pull pull-down
GPIOI5 : alt function 0 push-pull pull-down
GPIOI6 : alt function 0 push-pull pull-down
GPIOI7 : analog
GPIOI8 : unknown
GPIOI9 : unknown
GPIOI10 : unknown
GPIOI11 : unknown
GPIOI12 : unknown
GPIOI13 : unknown
GPIOI14 : unknown
GPIOI15 : unknown
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
pinmux_mode[] is linked to gpio_function[] defined in gpio-uclass.c
So reuse the same gpio_func_t enum value
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Long TFTP transfers lead to a wall of # characters on UART, which in
the end may slow down the transfer itself. Use CONFIG_TFTP_TSIZE to
print progress in fewer # characters.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3
in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant
which has extra Empirion DCDC converter in front of the 1V8 IO supply, or
outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter.
The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily
high input voltage to the Empirion DCDC converter, so move it into matching
DTSI to stop confusing users.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The DHCOM does ship with KS8851 with 1.5 kiB packet buffer. The DHSOM
may be extended with other MAC options connected to FMC2 bus, like the
DM9000, wih similar limitations. Use default CONFIG_TFTP_BLOCKSIZE of
1468 Bytes instead of 1536 Bytes, which always avoids overflowing the
packet buffers of such limited MACs, which leads to e.g. TFTP timeouts.
This also avoids receiving a short packet fragment at the end of each
TFTP block, which led to reduced performance.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable DRAM ASR, auto self-refresh, conditionally, based on DT PWRCTL
register bits. While ASR does save considerable amount of power at
runtime automatically, it also causes LTDC underruns on large panels.
Let user select whether or not ASR is required or not, generally ASR
should be enabled on portable and battery operated devices.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Device tree alignment with Linux kernel v5.18-rc2:
- ARM: dts: stm32: Add support for the emtrion emSBC-Argon
(only the pincontrol part)
- ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc node
- ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
- ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
- ARM: dts: stm32: use exti 19 as main interrupt to support RTC wakeup on
stm32mp157
- ARM: dts: stm32: add DMA configuration to UART nodes on stm32mp151
- ARM: dts: stm32: keep uart4 behavior on *
- ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Handle correctly the silicon revision = REV_ID[15:0] of Device Version
and the associated device marking, A to Z on STMicroelectronics STM32MP
SOCs.
This patch prepare the introduction of next STM32MP family,
with STM32MP13x Rev.Z for REV_ID = 1.1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The function ft_system_setup shouldn't return an error when the
/soc node is absent in the provided device tree but just skip the
updates.
This patch solves an issue when the U-Boot pytest is executed on board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
On STMicroelectronics boards, the UART can reliably go up to
2000000 bauds when connected to the on-board ST-LINK-V2 for STM32MP15
Unfortunately U-Boot will fall back to 115200 unless higher rates are
declared via CONFIG_SYS_BAUDRATE_TABLE.
This patch add the support of higher baudrates on STMicroelectronics
boards with ST-LINK.
Cc: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Set the environment variable "console", used in extlinux.conf file when it
is generated by YOCTO distribution with:
UBOOT_EXTLINUX_CONSOLE ??= "console=${console},${baudrate}"
With these 2 variables, U-Boot give dynamically the used console and
baudrate in the Linux kernel bootargs.
For the STMicroelectronics boards, the used console is ttySTM0.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Accept flashlayout without header in alternate 0, to simplify
the support of stm32prog command with dfu-util.
By default the flashlayout file size is the size of the received binary,
provided with the offset in the DFU alternate.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update the stm32prog command to allow the reception of U-Boot script in
the FlashLayout alternate during the first USB enumeration.
This patch is aligned with the last TF-A behavior: the Flashlayout
is now loaded by U-Boot; it is no more present at STM32_DDR_BASE when
the stm32prog is launched after a serial boot, on UART or on USB.
The received script must be a U-Boot legacy image, no more need to add
a stm32image header.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
When an interruption is received during the first USB enumeration
used to received the FlashLayout, with handle ctrl-c, the second
enumeration is not needed and the result for stm32prog_usb_loop
is false (reset is not needed).
This patch avoids the need of a second ctrl to interrupt the command
stm32prog.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of UUID for FIP parttion, required by Firmware update
support in TF-A:
- UUID TYPE for FIP partition: 19d5df83-11b0-457b-be2c-7559c13142a5
- "fip-a" partition UUID: 4fd84c93-54ef-463f-a7ef-ae25ff887087
- "fip-b" partition UUID: 09c54952-d5bf-45af-acee-335303766fb3
This check is done with a new partition type "FIP" associated
at the FIP UUID.
The A/B partition UUID is detected by the partition name:
"fip-a", "fip-b".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
When OP-TEE is used, the SMC for BSEC management are not
available and the PTA provisioning for OTP must be used.
U-Boot opens the session to this PTA and use it for OTP
access.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a configuration flag CONFIG_CMD_STM32PROG_OTP to enable the support of
OTP update in stm32prog command.
This new configuration allows to deactivate this feature for security reason
and it is a preliminary step for support of OPT update with the OP-TEE
provisioning TA.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
atsha204 chip is predecessor of atsha204a chip. Current U-Boot driver
atsha204a-i2c.c can use both atsha204 and atsha204a chips because it does
not call specific functions to just one of these chips.
So just add compatible string for atsha204.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC,
this adds the PMIC node with the required regulators voltages.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The E4 revision of the AM64 SKEVM embeds a TPS65219 PMIC,
this enables the necessary options to load and control the
PMIC regulators.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.
This adds the driver for the Buck converters & linear regulators.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.
This adds the PMIC driver, loading the regulator sub-nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
For CONFIG_DM_SERIAL it is required to increase CONFIG_SYS_MALLOC_F_LEN as
default value is not enough for memory hungry CONFIG_DM_SERIAL code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
This enable booting of Debian systems which use raw initrd image (instead
of uInitrd created by mkimage). This change increase size of u-boot.bin
binary by just 64 bytes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pull request for efi-2022-07-rc3-2
UEFI:
* Fix build errors due to
- using sed with non-standard extension for regular expression
- target architecture not recognized for CROSS_COMPILE=armv7a-*
- CONFIG_EVENT not selected
* add sha384/512 on certificate revocation
Others:
* factor out the user input handling in bootmenu command
The previous patch adds support for rejecting images when the sha384/512
of an x.509 certificate is present in dbx. Update the sandbox selftests
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently we don't support sha384/512 for the X.509 certificate
in dbx. Moreover if we come across such a hash we skip the check
and approve the image, although the image might needs to be rejected.
Rework the code a bit and fix it by adding an array of structs with the
supported GUIDs, len and literal used in the U-Boot crypto APIs instead
of hardcoding the GUID types.
It's worth noting here that efi_hash_regions() can now be reused from
efi_signature_lookup_digest() and add sha348/512 support there as well
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit moves the user input handling from cmd/bootmenu.c
to common/menu.c to reuse it from other modules.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes
WARNING: unmet direct dependencies detected for EVENT_DYNAMIC
Depends on [n]: EVENT [=n]
Selected by [y]:
- EFI_LOADER [=y] && OF_LIBFDT [=y] && ...
and the succeeding build breakage.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Building with OpenSSL 3.0 produces warnings like:
../tools/sunxi_toc0.c:846:17: warning: ‘RSA_get0_d’ is deprecated:
Since OpenSSL 3.0 [-Wdeprecated-declarations]
846 | if (root_key && RSA_get0_d(root_key)) {
| ^~
As OpenSSL 3.0 is not available in elder Linux distributions
just silence the warning.
Add missing #include <openssl/bn.h>.
Fixes: e9e87ec47c ("tools: mkimage: Add Allwinner TOC0 support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Over the years, several options have not made it into the help message.
Document them. Do the same for the man page.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Use [:space:] instead of \s and \S in regular expression that
determines the sandbox target architecture. Fixes the build
failure on OpenBSD introduced with commit 4e65ca00f3
("efi_loader: bootmgr: add booting from removable media").
Fixes: f7691a6d73 ("sandbox: allow cross-compiling sandbox")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This has been deprecated for over 10 years and everything now uses the
plain "phandle" property in preference. There's no need to set
linux,phandle when creating phandles for nodes that do not have one.
dtc changed the default to creating just phandle in version 1.4.5
released in September 2017 with the justification that the new style had
already been supported for 7 years by that point (see dtc commit 0016f8c
("dtc: change default phandles to ePAPR style instead of both")).
Signed-off-by: John Keeping <john@metanate.com>
Adds a sub-command repair to the command gpt
that allow to repair a corrupted gpt table. If
the both gpt table (primary and backup) are
valid, then the command does nothing.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
If a gpt table is corrupted (after a power cut
for example), then the gpt table should repaired.
The function gpt_repair_headers check if at least
one gpt table is valid, and then only write the
corrupted gpt table.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Since commit 16cc5ad0b4 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- Assorted minor code cleanups.
- Clean-up the reset uclass code slightly and fix some issues with a
lack of handlers for a case in the driver.
- Y2038 RTC fix
drivers/misc/fs_loader.c: In function ‘mount_ubifs’:
drivers/misc/fs_loader.c:46:12: warning: implicit declaration of function ‘ubi_part’ [-Wimplicit-function-declaration]
int ret = ubi_part(mtdpart, NULL);
^~~~~~~~
drivers/misc/fs_loader.c:53:9: warning: implicit declaration of function ‘cmd_ubifs_mount’ [-Wimplicit-function-declaration]
return cmd_ubifs_mount(ubivol);
^~~~~~~~~~~~~~~
drivers/misc/fs_loader.c: In function ‘umount_ubifs’:
drivers/misc/fs_loader.c:58:9: warning: implicit declaration of function ‘cmd_ubifs_umount’ [-Wimplicit-function-declaration]
return cmd_ubifs_umount();
^~~~~~~~~~~~~~~~
Signed-off-by: Pali Rohár <pali@kernel.org>
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each reset driver. Drop all those empty functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Local variable out.name lives on the stack and therefore cannot
be returned directly. Move the strdup() call into the function.
(Coverity 352460)
Fixes: 7c33f78983 ("clk: scmi: register scmi clocks with CCF")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
tm_mon has a range from 0..11, but the RTC expects 1..12. So we adapt
the month accordingly. This was determined when comparing the driver
with the corresponding linux kernel driver.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
If argc is not < 3, it must be >= 3.
If argc >= 3, argv[2] cannot be NULL.
Fixes: 9de612ae4d ("cmd: adc: Add support for storing ADC result in env variable")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We don't have an option -cq but two distinct options -c and -q.
Fixes: e9496ec374 ("fdt: Add -q option to fdt addr for distro_bootcmd")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
We currently overflow due to wrong types used internally in rtc_mktime,
on all platforms, and we return a too small type on 32-bit.
One consumer that directly benefits from this is mktime64. Many others
may still store the result in a wrong type.
While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by
714209832d).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
On some image types like i.MX8 and i.MX8M, the verify_header function
is not implemented.
Before this commit, no check on tparams->verify_header was done causing
a segfault if NULL. Now, a proper error message is printed.
Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@gmail.com>
Currently, in case of arm64 bootloader and U-Boot the stack pointer is
initialized at an offset of NON_SECURE_MSRAM_SIZE from arm64 SPL's text
base address. After jumping to arm64, execution is done out of DDR.
Therefore, having an offset corresponding to the size of MSRAM does not
have any significance.
Instead, initialize the stack pointer after an offset of 4MB from the SPL
text base address. This helps in allocating larger memory for stack.
┌────────────────────┐0x80080000
│ │
│ arm64 SPL │
├────────────────────┤
│ ▲ │
│ │ │
│ STACK │
├────────────────────┤0x80480000
│ Memory for Load │
│ Buffer Allocation │
├────────────────────┤0x80800000
│ │
│ U-Boot Image │
│ │
└────────────────────┘
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
There are many pins in an SoC, and register usage may vary by pins.
This patch introduces a concept of "io type" and "io type group"
to mediatek pinctrl drivers. This can provide different pinconf
handlers implementation (eg: "bias-pull-up/down", "driving" and
"input-enable") for IO pins that belong to different types.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Pinctrl design of some mediatek SoC need to access registers that
distribute in multiple memory base address. this patch introduce new
mechanism in mediatek pinctrl driver to support the chips which have
the new design.
This patch add a member 'base_calc' in pinctrl private data, and changed
original 'base' private data to an array of *iomem.
When 'base_calc' attribute is set, it will requests multiplue regs base
from the DT, if 'base_calc' attribute is not set, it only use legacy way
to request single reg resource from the DT.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
With sandbox, U-Boot can be run without a device tree (i.e. no -d or -T
parameter). In this case an empty device tree is created for convenience.
With a recent change this causes an error due to the missing '/binman'
node.
Add this node to avoid the problem, as well as a test that U-Boot can
be run without a device tree.
Fixes: 059df5624b ("arch: Kconfig: imply BINMAN for SANDBOX")
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/11
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful sometimes when running a specific test. Add support for it
in the existing restart_uboot_with_flags() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove Masami Hiramatsu from MAINTAINERS since he will leave
Linaro and his email will be not available anymore.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
SPL_SYS_MALLOC_F_LEN defaults to SYS_MALLOC_F_LEN. 0x10000 is 64 KiB, or
around half of the total OCRAM size. Revert to the default of 0x2000. This
fixes SPL boot.
Fixes: 545eceb520 ("imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Macro MVNETA_GMAC_FORCE_LINK_UP can be dropped from value assignment in
fixed link case, since it's value is written into the register later in
the function for link-down-to-link-up case. The value is written as
MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS, and so the
macro definition can also be dropped.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Guard the code handling the fixed PHY case by
CONFIG_IS_ENABLED(PHY_FIXED).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Since this member is checked only at two places drop it and inline it's
usage.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Write PHY address just before enabling HW polling of the PHY.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Stop parsing fixed-link in the MAC driver. Instead support only PHY mode
and let the fixed PHY driver handle the fixed-link case.
Enable CONFIG_PHY_FIXED for mvneta boards that need it: Turris Omnia and
ESPRESSObin.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The CONFIG_* macros are reserved for Kconfig. This was probably done
when this driver was being imported from Linux. Rename the macro.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop checking for CONFIG_PHYLIB in mvneta, this is already done in
Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the bool type instead of int for status_change variable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop one indentation level in the mvneta_adjust_link() function.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The `ret` variable in mvneta_probe() is unused if DM_GPIO is disabled.
Since the variable is used only once after assigning value, we can
inline the usage and drop the variable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This MDIO bus is now handled by a proper mvmdio DM driver. Remove it
from mvneta.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, start using the DM registered one in Turris MOX board
code.
This also allows us to drop the hack introduced in MOX' -u-boot.dtsi
file.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add helper to resolve PHY node from it's ofnode via DM MDIO subsystem.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, we need to stop using board_network_enable() and instead
use the DM registered MDIO device to configure switch in
last_stage_init().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
We don't need to remember PHY address anymore, because since using DM
MDIO for connecting PHY, the address is parsed by mdio-uclass from
the ofnode.
But the driver uses a special value of the address to signal fixed link
usage.
Drop phyaddr add fixed_link in driver private structure. This simplifies
code a little.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the modern DM MDIO API for connecting PHY in the mvneta driver.
This requires enabling MVMDIO driver in several config files.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In mvneta_adjust_link() we need to set MII_SPEED bit only if PHY reports
the speed at 100Mbps.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop .of_to_plat() from the mvneta driver and parse the two properties
in .probe().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch enables the Kconfig symbols needed for full ethernet support
on the NIC23. Additionally board specific setup is done, mostly GPIOs
related to SFP / GPIO configuration. With this, ethernet can be used on
this board. Here an example of a tftp load:
=> tftp ffffffff81000000 big
Using ethernet-mac-nexus@11800e2000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.247
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ################################################## 10 MiB
9.7 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the Kconfig symbols needed for full ethernet support
on the EBB7304. Also the PHY autonegotiation timeout is increased, as
the default 5 seconds are sometime a bit short. With this, ethernet can
be used on this board. Here an example of a tftp load:
=> tftp ffffffff81000000 big
ethernet-mac-nexus@11800e0000000 Waiting for PHY auto negotiation to complete....... done
Using ethernet-mac-nexus@11800e0000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.243
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ################################################## 10 MiB
13.2 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)
Signed-off-by: Stefan Roese <sr@denx.de>
This patchs adds the ethernet & MDIO driver for the MIPS Octeon II / III
SoC platform. Please note that these drivers are based on the 2013
U-Boot version from Marvell and make use of the platform supported
helper functions for the ethernet functionality, including stuff like
SFP handling.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Add the Octeon ethernet (BGX) and SFP DT nodes to the NIC23 dts file to
enable ethernet support on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
Add the Octeon ethernet (BGX), SMI and PHY DT nodes to the EBB7304 dts
file to enable ethernet support on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves CONFIG_SYS_INIT_SP_OFFSET to a higher address so that
it does not interfere with larger U-Boot images. This was noticed, while
adding network support to the EBB7304 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Call octeon_bootmem_init() earlier in the boot process, so that this
bootmemory infrastructure is already initialized when e.g. the
networking support gets probed.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch includes misc changes to already present Octeon MIPS C files
files, which are necessary for the upcoming ethernet support.
The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking of the code
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-range.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-qlm-tables.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko-internal-ports-range.c from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3-resources.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3-compat.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3-queue.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko3.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pki-resources.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pki.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ipd.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ilk.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-global-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fpa-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fpa.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fau-compat.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-cmd-queue.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-agl.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-xaui.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-sfp.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-sgmii.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-rgmii.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-pko3.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-pko.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-pki.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-npi.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-loop.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-ipd.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-ilk.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-fpa.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-board.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-bgx.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-agl.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch includes misc changes to already present Octeon MIPS header
files, which are necessary for the upcoming ethernet support.
The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking the headers
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-xcv-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcsxxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-npei-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-lbk-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-iob-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-igl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
To quote the author:
The virtio PCI drivers forgo a number of consistency checks,
particularly around pointer validation and bounds checking. This series
focuses on the modern driver to add those checks.
The start of the series adds and fixes some basic bounds checks. Later
patches ensure PCI addresses fall within the expected regions rather
than any arbitrary address. This is acheived by introducing range
parameters to a few of the dm_pci_* functions that allow the ranges to
be checked.
The series also adds a few new configs to allow parts of virtio and PCI
to be disabled where the features may be unused and the current
implementations don't have the needed consistencty checks.
The virtio PCI capabilities describe regions of memory that should be
mapped. Map those with dm_pci_map_bar() which will ensure they are valid
PCI regions.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Prepare for calls to `virtio_pci_map_capability()` failing by returning
NULL on error. If this happens, later accesses to the pointers would be
unsafe so cause the probe to fail if such an error occurs.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a mask parameter to control the lookup of the PCI region from which
the mapping can be made.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add mask parameter and reorder length parameter to match the other PCI
address conversion functions. Using PCI_REGION_TYPE as the mask gives
the old behaviour.
It's converted from a macro to an inline function as the length
parameter is now used twice, but should only be calculated once.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When converting addresses, apply a mask to the region flags during
lookup. This allows the caller to specify which flags are important and
which are not, for example to exclude system memory regions.
The behaviour of the function is changed such that they don't
preferentially search for a non-system memory region. However, system
memory regions are added after other regions in decode_regions() leading
to a similar outcome.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Evolve dm_pci_map_bar() to include an offset and length parameter. These
allow a portion of the memory to be mapped and range checks to be
applied.
Passing both the offset and length as zero results in the previous
behaviour and this is used to migrate the previous callers.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add tests for the functions dm_pci_bus_to_phys() and
dm_pci_phys_to_bus() which convert between PCI bus addresses and
physical addresses based on the ranges declared for the PCI controller.
The ranges of bus#1 are used for the tests, adding a translation to one
of the ranges to cover more cases.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When converting between PCI bus and physical addresses, include a length
parameter that can be used to check that the entire range fits within
one of the PCI regions. This prevents an address being returned that
might be only partially valid for the range it is going to be used for.
Where the range check is not wanted, passing a length of 0 will have the
same behaviour as before this change.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When parsing the `ranges` DT node, check that both extremes of the
regions are addressable without overflow. This assumption can then be
safely made when processing the regions.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The flags parameter of dm_pci_map_bar() is used for PCI region flags
rather than memory mapping flags. Fix the type to match that of the
region flags and stop using the regions flags as memory mapping flags.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Read the virtio PCI capability out of the device configuration space to
a struct rather than accessing fields directly from the configuration
space as they are needed. This both makes access to the fields easier
and avoids re-reading fields.
Re-reading fields could result in time-of-check to time-of-use problems,
should the value in the configuration space change. The range check of
the `bar` field and the later call to `dm_pci_read_bar32()` is an
example of where this could happen.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Ensure the virtio PCI capabilities are contained within the bounds of
the device's configuration space. The expected size of the capability is
passed when searching for the capability to enforce this check.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Check that the common config is at least as large as the struct it is
expected to contain. Only then is it safe to cast the pointer and be
safe from out-of-bounds accesses.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make sure virtio notifications are written within their allocated
buffer.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The device config is optional, so check it was present and mapped before
trying to use the pointer. Bounds violations are an error, not just a
warning, so bail if the checks fail.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The length of the device config was erroneously being taken from the
notify capability. Correct this by finding the length in the device
capability.
Fixes: 550435edf8 ("virtio: pci: Support non-legacy PCI transport device")
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new config to control whether the driver for legacy virtio PCI
devices is included in the build. VIRTIO_PCI_LEGACY is included by
default when VIRTIO_PCI is selected, but it can also be independently
toggled.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit adds the Kconfig option to disable to enter
the U-Boot console from bootmenu.
If CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is enabled, "U-Boot console"
entry is appeared as the last entry in the bootmenu, then user can
enter U-Boot console.
If CMD_BOOTMENU_ENTER_UBOOT_CONSOLE is disabled, "Quit" entry
is appeared as the last entry instead of "U-Boot console".
When user chooses "Quit" from bootmenu, the following default
commands are invoked.
- "bootefi bootmgr" (if efi bootmgr is enabled)
- "run bootcmd"
If the both commands are executed and returns to the bootmenu,
the bootmenu will appears again.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit adds the UEFI related menu entries
into the bootmenu.
User can select which UEFI "Boot####" option to execute
from bootmenu, then bootmenu sets the "BootNext" UEFI
variable and invoke efi bootmgr. The efi bootmgr
will handle the "BootNext" UEFI variable.
If the "BootNext" UEFI variable is preset and efi bootmgr is enabled,
bootmenu invokes efi bootmgr to handle "BootNext" as first priority.
The UEFI boot entry has the "UEFI BOOTXXXX" prefix as below.
*** U-Boot Boot Menu ***
UEFI BOOT0000 : debian
UEFI BOOT0001 : ubuntu
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This is a preparation for succeeding addition of uefi boot
and distro boot menu entries into bootmenu.
The bootmenu_entry title is updated to u16 string because
uefi use u16 string. This commit also factors out the function
to prepare the entries generated by "bootmenu_x" U-Boot environment
variable.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Under the current implementation, booting from removable media using
a architecture-specific default image name, say BOOTAA64.EFI, is
supported only in distro_bootcmd script. See the commit 74522c898b
("efi_loader: Add distro boot script for removable media").
This is, however, half-baked implementation because
1) UEFI specification requires this feature to be implemented as part
of Boot Manager's responsibility:
3 - Boot Manager
3.5.1 Boot via the Simple File Protocol
When booting via the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, the FilePath will
start with a device path that points to the device that implements the
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL or the EFI_BLOCK_IO_PROTOCOL. The next
part of the FilePath may point to the file name, including
subdirectories, which contain the bootable image. If the file name is
a null device path, the file name must be generated from the rules
defined below.
...
3.5.1.1 Removable Media Boot Behavior
To generate a file name when none is present in the FilePath, the
firmware must append a default file name in the form
\EFI\BOOT\BOOT{machine type short-name}.EFI ...
2) So (1) entails the hehavior that the user's preference of boot media
order should be determined by Boot#### and BootOrder variables.
With this patch, the semantics mentioned above is fully implemented.
For example, if you want to boot the system from USB and SCSI in this
order,
* define Boot0001 which contains only a device path to the USB device
(without any file path/name)
* define Boot0002 which contains only a device path to the SCSI device,
and
* set BootOrder to Boot0001:Boot0002
To avoid build error for sandbox, default file name "BOOTSANDBOX.efi"
is defined even if it is out of scope of UEFI specification.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
On sandbox use binary name corresponding to host architecture.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To make user aware of the menu entry selection, menu always
appears regardless of the number of entry.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Adjust test/py/tests/test_bootmenu.py
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
lib/charset.c is not optional for
EFI_APP || EFI_LOADER || UFS || UT_UNICODE.
These must select CONFIG_CHARSET.
Fixes: 726cd9836d ("efi: Make unicode printf available to the app")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The unit test has not been built since CPU_V7 was rename CPU_V7A.
Fixes: acf1500138 ("arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When resetting the text console the colors have to be set before clearing
the screen. Otherwise the background color may be wrong.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* correct output for timeout > 99 s
* don't use spaces to advance to the output column
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Based on reading https://www.msys2.org/docs/ci/ and "Other Systems"
rework how we update MSYS2 to the current version. We run it once, to
perform nothing other than being the first run, then we run pacman
twice.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI master
controller driver using SPI-MEM interface.
The FIU supports single, dual or quad communication interface.
The FIU controller driver provides flash access in UMA(User
Mode Access) mode by using an indirect address/data mechanism.
the dts node is followed upstream kernel dts name.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Jagan: fixed the Kconfig, Makefile order]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
To quote the author:
U-Boot provides a verified-boot feature based around FIT, but there is
no standard way of implementing it for a board. At present the various
required pieces must be built up separately, to produce a working
implementation. In particular, there is no built-in support for selecting
A/B boot or recovery mode.
This series introduces VPL, a verified program loader phase for U-Boot.
Its purpose is to run the verified-boot process and decide which SPL
binary should be run. It is critical that this decision happens before
SPL runs, since SPL sets up SDRAM and we need to be able to update the
SDRAM-init code in the field.
Adding VPL into the boot flow provides a standard place to implement
verified boot. This series includes the phase itself, some useful Kconfig
options and a sandbox_vpl build for sandbox. No verfied-boot support is
provided in this series.
Most of the patches in this series are fixes and improvements to docs and
various Kconfig conditions for SPL.
Add an initial VPL build for sandbox. This includes the flow:
TPL (with of-platdata) -> VPL -> SPL -> U-Boot
To run it:
./tpl/u-boot-tpl -D
The -D is needed to get the default device tree, which includes the serial
console info.
Add a Makefile check for OF_HOSTFILE which is the option that enables
devicetree control on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for VPL, a new phase of U-Boot. This runs after TPL. It is
responsible for selecting which SPL binary to run, based on a
verified-boot process.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current logic checks several options to decide whether SPL/TPL need
the U-Boot devicetree to be built. In fact we can check OF_CONTROL, which
is enabled in all cases that matter.
Signed-off-by: Simon Glass <sjg@chromium.org>
This feature is not available in SPL unless common/ and lib/ are built.
Update the Kconfig to avoid build errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
MPP55 is used as a reset connected to the L3 switch chip. This doesn't
matter for u-boot as it doesn't use the L3 switch but it is useful to
be able to toggle the switch in/out of reset for the OS.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
For most Kirkwood boards, the PHY page is already set to page 0
(in register 22) before phy_connect is invoked. But some board like
the Zyxel NSA310S (which uses the network chip MV88E1318S), the PHY page
is not set to page 0. There seems to be some bad data remained in
register 22 when the uclass MVGBE about to invoke phy_connect().
This patch enables the uclass MVGBE to always set the PHY page to 0
before phy_connect.
For reference, please see this discussion:
[RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe
and PHY driver for DM Ethernet.
https://lists.denx.de/pipermail/u-boot/2022-April/480946.html
This patch has been tested with the following Kirkwood boards:
NSA310S (88F6702, network chip MV88E1318S)
Sheevaplug (88F6281, network chip MV88E1318)
Pogo V4 (88F6192, network chip 88E1116R)
GF Home(88F6281, network chip 88E1116R)
Dreamplug (88F6281, network chip MV88E1318)
Dell Kace M300 (88F6282, network chip MV88E1318) - out of tree u-boot
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
U-Boot for Turris Omnia is always compiled with MMC, SCSI and USB support,
so always enable macros for booting from these devices.
Signed-off-by: Pali Rohár <pali@kernel.org>
CONFIG_ETHPRIME defines primary ethernet device and env variable $ethact
stores currently active ethernet device.
So there is no point to set ethact= in default environment. Instead set
CONFIG_ETHPRIME properly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
PCIe Mini CEM 2.1 spec added support for USB3.0 mode on MiniPCIe cards.
USB3.0 and PCIe share same pins and only one function can be active at the
same time. PCIe Mini CEM 2.1 spec says that determining function is
platform specific and spec does not define any dedicated pin which could
say if card is USB3.0-based or PCIe-based.
Implement this platform specific decision (USB3.0 vs PCIe) for WWAN
MiniPCIe slot on Turris Omnia via U-Boot env variable "omnia_wwan_slot",
similarly like is implemented forced mode for MiniPCIe/mSATA slot via
"omnia_msata_slot" env variable. Value "usb3" for "omnia_wwan_slot" would
mean to set USB3.0 mode and value "pcie" original PCIe mode.
A385 SoC on Turris Omnia has configurable fifth SerDes line (exported to
MiniPCIe WWAN slot with SIM card) either to USB3.0 or PCIe functionality,
so implementation of this new PCIe Mini CEM 2.1 feature is simple, by just
configuring SerDes to USB 3.0 mode.
Other twos MiniPCIe slots on Turris Omnia do not have this new
functionality as their SerDes lines cannot be switched to USB3.0
functionality.
Note that A385 SoC does not have too many USB3.0 blocks, so activating
USB3.0 in MiniPCIe cause that one external USB3.0 USB-A port would loose
USB3.0 functionality and would be downgraded just to USB2.0.
By default this MiniPCIe WWAN slot is in PCIe mode, like before.
To set this MiniPCIe WWAN slot to USB3.0 mode, call U-Boot commands:
=> setenv omnia_wwan_slot usb3
=> saveenv
=> reset
Signed-off-by: Pali Rohár <pali@kernel.org>
Show error message when DT file does not contain sata or pcie node which
should be explicitly disabled. This can happen when U-Boot code for finding
those nodes is incomplete or when those DT nodes are in different
unexpected location. In any case it is needed to know if DT not was not
explicitly disabled as it could mean that combo slots where setup
incorrectly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Move code for disabling sata and pcie DT nodes to own functions, so this
code can be called from other places in follow up patches.
Signed-off-by: Pali Rohár <pali@kernel.org>
Some PCIe-based MiniPCIe cards are broken and they do not ground PIN 43
which is required by PCIe mini CEM specs. Such broken cards are incorrectly
detected as mSATA cards because SATA specs requires that PIN 43 on mSATA
cards has to be disconnected.
PIN 43 on Turris Omnia is used only for MiniPCIe/mSATA card detection by
software in U-Boot SPL. Allow to override that U-Boot SPL detection by a
new "omnia_msata_slot" env variable (to value "pcie" or "sata") so broken
MiniPCIe cards can be used in combo mSATA/MiniPCIe slot too.
As configuration of PCIe vs SATA functionality is done in U-Boot SPL,
it is required to change env variable in permanent storage and reset the
board to take effect.
To force PCIe mode for broken MiniPCIe cards, call U-Boot commands:
=> setenv omnia_msata_slot pcie
=> saveenv
=> reset
Signed-off-by: Pali Rohár <pali@kernel.org>
By default use primary serdes map with PCIe function in combined
miniPCIe/mSATA slot. When SATA is detected change serdes map variable at
runtime.
Signed-off-by: Pali Rohár <pali@kernel.org>
BootROM maps SPI Flash to fixed address 0xD4000000 and this mapping is
active also when BootROM is executing binary kwbimage headers, which
includes also U-Boot SPL.
Therefore no initialization code is required to access SPI Flags from
U-Boot SPL. In proper U-Boot it is remapped to other location.
So in mvebu implementation of env_sf_get_env_addr() function returns
0xD4000000 when running in SPL and NULL when in proper U-Boot.
This change would allow to use U-Boot ENV in U-Boot SPL. Normally it is not
possible to read ENV because it is too big and U-Boot SPL does not have
such big malloc() pool to real all ENV variables.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
In some cases it makes sense to use env_sf_init_addr() also in SPL mode.
Allow it for boards by providing custom implementation of weak function
env_sf_get_env_addr(). When this function returns NULL it signals that
address is invalid, like config option CONFIG_ENV_ADDR.
There is no change in default behavior or in config options.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pull request for efi-2022-07-rc2
UEFI:
* fix UEFI booting after integration of UEFI sub-system with driver model
* avoid random return values from devpath_is_partition()
* minor code clean ups
To quote the author:
I've been experimenting with ASAN on sandbox and turned up a few issues
that are fixed in this series.
Basic ASAN was easy to turn on, but integrating with dlmalloc was
messier and fairly intrusive. Even when I had it working, there was only
a small redzone between allocations which limits the usefulness.
I saw another series on the list by Sean Anderson to enable valgrind
which was finding a different set of issues, though there was one
overlap that Sean is fixing with
"[PATCH] IOMUX: Fix access past end of console_devices".
With these issues fixed, I was able to run the dm tests without any ASAN
issues. There are a couple of leaks reported at the end, but that's for
another day.
Use-after-free shouldn't be used, even in tests. It's bad practice and
makes the test brittle.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This tests calls regmap_read() which takes a uint pointer as an output
parameter. The test was passing a pointer to a u16 which resulted in an
overflow when the output was written. Fix this by following the
regmap_read() API and passing a uint pointer instead.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Data is written for each channel but is only tracked as having one
channel written. This resulted in a buffer overflow and corruption of
the allocator's metadata which caused further problems when the buffer
was later freed. This could be observed with sandbox unit tests.
Resolve the overflow by tracking the writes for each channel.
Fixes: f987177db9 ("dm: sound: Use the correct number of channels for sound")
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The buffer is 512 bytes but read requests can be 800 bytes. Limit the
request to the size of the buffer.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When copying the string in copy_to_unicode(), check for the null
terminator in each position, not just at the start, to avoid reading
beyond the end of the string.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are expecte to be bars 0 through 5, but the last of these was
missing leading to an read beyond the buffer. Add the missing element
with zero values.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The '--args' parameter to gdb comes before the binary that the debugger
will be attached to rather than after the binary and before the
arguments. Fix that in the docs.
Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
efi_init_early() creates an event hook for block device probing.
It has to be called before any block device is probed.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
While GPT partition is mandated in UEFI specification, CONFIG_PARTITION is
seen optional under the current implementation.
So modify efi_disk_rw_blocks() to allow accepting UCLASS_BLK devices.
Fixes: commit d97e98c887 ("efi_loader: disk: use udevice instead of blk_desc")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
If the path consists only of an end node, it does not refer to a partition.
Avoid returning a random value from the stack in this case.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The log functions print file name, line number, and function name if
selected via the log command or customizing. Don't print the function
name twice.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The top level DT node of gpio-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This simplifies the probe() implementation
and fixes the bogus top-level not-an-LED in 'led list' command output:
```
=> led list
led Error -121 <--- This is removed/fixed by this patch
green:user0 off
```
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Calling device_probe() from uclass .post_bind() callback has all kinds
of odd side-effects, e.g. device instances not being available just yet.
Make use of the DM_FLAG_PROBE_AFTER_BIND instead, mark device instances
which need to be probe()d in order to configure the LED default state
with this flag and let the DM core do the device_probe() at the right
time instead.
Fixes: 72675b063b ("led: Configure LED default-state on boot")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Introduce DM_FLAG_PROBE_AFTER_BIND flag, which can be set by driver or
uclass in .bind(), to indicate such driver instance should be probe()d
once binding of all devices is complete.
This is useful in case the driver determines that hardware initialization
is mandatory on boot, and such initialization happens only in probe().
This also solves the inability to call device_probe() from .bind().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Second set of u-boot-at91 features for the 2022.07 cycle:
This feature set includes the new driver for the AT91 reset controller,
a new board called sam9x60 curiosity, and several other fixes and
clean-ups (sama7g5ek qspi clock, impedance; remove unused code,
introduce Kconfig symbols for SPL timers)
It looks quite weird that for non PPC platforms cpu driver for MPC83xx can
be selected. That's why define proper dependency.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Manish Tomar's email bounces. Remove it, and reassign the config he was
maintaining to the primary maintainer for the board.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Upstream Linux kernel uses for mpc8548-based PCIe controllers compatible
string "fsl,mpc8548-pcie". So change U-Boot fsl PCIe driver and all DTS
files to use "fsl,mpc8548-pcie" instead of "fsl,pcie-mpc8548" to be
compatible with Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linux P2020 USB kernel driver uses compatible string fsl-usb2-dr-v1.6 and
needs more DT properties. Copy P2020 usb@22000 properties from upstream
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
interrupts property for spi@7000 node is needed for compatibility with
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Device tree include file p2020-post.dtsi should be included after the board
device tree file and overrides settings of the board. So it should not
disable some node as board cannot enable it via normal way (it has to
enable it after inclusion of p2020-post.dtsi file).
Fix it by removal of explicit disable in p2020-post.dtsi file and then
remove explicit post-post enable in all P2020 board device tree files.
Currently no P2020 board has spi@7000 node disabled.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linux kernel eSDHC driver for P2020 requires additional compatible string
fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file
to make U-Boot board DTS files compatible for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux
kernel for P2020. This allows U-Boot to use P2020 device tree files from
upstream Linux kernel which reference ptp_clock@24e00 device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference gpio-controller@fc00 device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace hardcoded i2c hex values for NOR banks by named SW macros in
map_lowernorbank/map_uppernorbank env commands.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace hardcoded boot i2c bus num and address by existing macros when
generating env for CONFIG_EXTRA_ENV_SETTINGS.
Same macros are used in U-Boot board code when reading information from
boot i2c data.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Do not stringify env $vscfw_addr two times (once implicitly via string
operator "" and second time explicitly via __stringify() macro) and allow
to compile U-Boot without CONFIG_VSC7385_ENET (when __VSCFW_ADDR was not
defined and so macro name was stringified into CONFIG_EXTRA_ENV_SETTINGS).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Whole section about USB/eLBC configuration seems to be P1020 specific. So
add ifdefs to not compile it on other platforms (e.g. P2020).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded
attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and
also allow speculative loading (by not setting Guarded attribute).
Also enable Memory Coherency attribute for second 1G SDRAM map. In commit
316f0d0f8f ("powerpc: mpc85xx: Fix static TLB table for SDRAM") it was
enabled for all SDRAM maps on all other boards, just missed this one case.
As a last thing, first 1G SDRAM map has wrong comment, so adjust it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes
inserted SD card readonly if GPIO[9] is active.
In some design GPIO[9] pin does not have to be connected to SD card
write-protect pin and can be used as GPIO.
So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for
SDHC_WP functionality.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As written in comment, P2020 has two possible SD switch configurations.
Extend code to detect both of them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Like in all other checks in checkboard() function, do not hang on error.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is too confusing if sections are defined in non-ascending order.
Also linker has to go backward and then again forward when generating final
binary.
To make future changes easier, define all linker sections in ascending
order.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linker knows exact size of the image, so there is no need to use
CONFIG_SYS_MONITOR_LEN macro (which should be upper limit).
Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
.interp section is not available in output ELF binary and SIZEOF_HEADERS is
needed at all.
There is no change in generated u-boot.bin binary.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since
Jun 2014 commit 0234446fd1 ("nand_spl: remove MPC8536DS support").
Remove it.
Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some
mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED.
Otherwise it crashes during early init.
When debug console is enabled and all debug logging options are turned on
then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error:
No valid device tree binary found at 110dc300
initcall sequence 110d3560 failed at call 1109535c (err=-1)
### ERROR ### Please RESET the board ###
Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set
U-Boot binary image without DTB ends immediately after the .u_boot_list
section. At this position is defined _end symbol at which U-Boot expects
start of the appended DTB.
Problem is that after .u_boot_list section are in linker script defined
another sections with 256 byte long padding which are completely empty.
During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin,
objcopy removes trailing zero padding and therefore DTB is appended at
wrong position.
Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended
DTB is finally at he correct position. With this fix U-Boot on P2020 with
CONFIG_OF_SEPARATE option starts working again.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For compatibility with Linux kernel DTS files and also with other U-Boot
powerpc DTS files, rename esdhc@2e000 node to sdhc@2e000 in p1020-post.dtsi
and p2020-post.dtsi include files.
Linux kernel DTS files which include these dtsi files, expect that esdhc
node has name sdhc@2e000 and do not work with other node names.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This node is required for NAND and NOR support. Node is taken from the
upstream Linux kernel DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
QorIQ pre-PBL BootROM scans first 24 SD card sectors (each with fixed 512
bytes length) for boot signature. Implement same redundancy behavior in
fsl_esdhc_spl driver to allow loading proper U-Boot when boot sector is not
the first one.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
According to Linux kernel DT schema nand-controller.yaml, using DT property
nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Initialize ECC configuration after nand_scan_ident() call and only in case
nand_scan_ident() have not done it. nand_scan_ident() fills ECC
configuration from device tree.
Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This allows boards to specify NAND settings via standard DT properties.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-duart-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference serial0 or serial1 devices.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
P2020 DTS files in upstream Linux kernel use fsl/p2020si-pre.dtsi and
fsl/p2020si-post.dtsi include device tree files.
Add symlinks for these include device tree files into U-Boot powerpc
directory and points them to U-Boot inline device tree files p2020.dtsi and
p2020-post.dtsi.
This allows to use P2020 DTS files from upstream Linux kernel in U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When env support is disabled then usage of env_init() or env_relocate()
generates linker errors. So do not compile env_init() or env_relocate()
in SPL code when env support is disabled in SPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When env support is disabled then usage of env_get_f() generates linker
errors. So do not compile env_get_f() when env support is disabled (for
example when disabled only in SPL).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When env support is disabled then usage of env_get() generates linker
errors. So do not compile env_get() when env support is disabled (for
example when disabled only in SPL).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher then linker throws
error about undefined symbol mmc_mode_name(). So compile mmc_mode_name()
also when CONFIG_LOGLEVEL is set to LOGL_DEBUG or higher.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If env is stored on SD card then U-Boot SPL automatically calls mmc_init()
before it is going to load proper U-Boot from SD card.
If env is not stored on SD card then U-Boot SPL fails to read proper U-Boot
from SD card due to missing mmc_init() call.
So add missing mmc_init() call into fsl_esdhc_spl's mmc_boot() function.
It fixes booting from SD card on P2020 boards without env support in SPL.
mmc_init() returns early if card was already initialized, so there is no
issue with calling this function more times.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In pre-PBL header is stored size of code which BootROM copies from SD card
to L2/SRAM. This size has upper limit of L2 cache size. In most cases this
is size of U-Boot SPL or size of L2 cache.
Therefore this size in pre-PBL header cannot be used for determining size
of proper U-Boot.
So always use CONFIG_SYS_MMC_U_BOOT_SIZE for determining size of proper
U-Boot which stored on SD card.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Pre-PBL BootROMs (MPC8536E, MPC8569E, P2020, P1011, P1012, P1013, P1020,
P1021, P1022) require custom BOOT signature on sector 0 and MBR/DBR
signature is not required at all.
So add check for BOOT signature and remove check for MBR/DBR.
This allows U-Boot SPL to load proper U-Boot on pre-PBL BootROMs platforms
also from SD cards which do not have MBR/DBR signature on sector 0.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The real entry point is _start_e500. There is no _start symbol at all. So
rename _start_e500 to _start for convension that _start symbol is used as
entry point.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
_start symbol contains only 32-bit data number 0x27051956 despite it is
marked as text section. This magic number is IH_MAGIC which is used for
marking uboot image header.
mpc85xx start.S code does not define valid uboot image header, so IH_MAGIC
number in _start symbol is useless there.
Moreover this _start symbol is not used at all. Entry point is at symbol
_start_e500.
So because this _start symbol is not used for anything, completely remove
it with IH_MAGIC number. After _start symbol was _start_cont symbol, so
replace all relative address calculations by _start_cont.
Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES)
that can be configured for the application. Interfaces not used by the
application can be set to protocol 0 to turn them off and save power, but
U-Boot would emit a warning that 0 was invalid for a SERDES protocol on
boot. Replace the warning text with a notice that the SERDES is disabled.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For now, this only provides reset and poweroff functions.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the
same meaning but is just for the ls1043ardb board. As no in-tree config
uses this, drop it and replace it with something more sophiticated:
ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE
option which is used as the base to relocate the PSCI code (or any code
in the secure region, but that is only PSCI). A SoC (or board) can now
opt-in into having such a secure region by enabling
SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was
possible to relocate the PSCI code before as well as on the LS1028A SoC
where there will be PSCI support soon.
Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If we are running in EL2 skip PSCI implementation setup. This avoids an
exception if CONFIG_ARMV8_PSCI is set, but u-boot is started by TF-A.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There are two different implementations to do a secure monitor call:
smc_call() and arm_smccc_smc(). The former is defined in fwcall.c and
seems to be an ad-hoc implementation. The latter is imported from linux.
smc_call() is also only available if CONFIG_ARMV8_PSCI is not defined.
This makes it impossible to have both PSCI calls and PSCI implementation
in one u-boot build. The layerscape SoC code decide at runtime via
check_psci() if there is a PSCI support. Therefore, this is a
prerequisite patch to add PSCI implementation support for the layerscape
SoCs.
Note, for the TFA part, this is only compile time tested with
(ls1028ardb_tfa_defconfig).
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
psci_update_dt() is also required if CONFIG_ARMV8_PSCI is set, that is,
if u-boot is the PSCI provider.
Guard the check which is intended to call into the PSCI implementation
in the secure firmware, by the proper macro SEC_FIRMWARE_ARMV8_PSCI.
Mark the function as weak because - unfortunately - there is already
a stub of the same function in arch/arm/mach-rmobile/psci-r8a779a0.c
which does not the same as the common one.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms.
Align the output impedance of the QSPI0 HSIOs by setting a medium drive
strength which corresponds to an impedance of 56 Ohms when VDD is in the
3.0V - 3.6V range. The high drive strength setting corresponds to an
output impedance of 42 Ohms on the QSPI0 HSIOs.
This is just a fine tunning. The memory that we have populated on sama7g5ek
works fine even with high drive strength, but it's better to adjust it and
use medium instead, in case some other flashes with higher frequencies are
tested.
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
QSPI1 used the clock of QSPI0, fix it.
Fixes: 5eecc37bb1 ("ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Use the spi_mem_default_supports_op() core helper in order to take into
account the buswidth specified by the user in device tree.
Fixes: 24c8ff4684 ("spi: Add Atmel QuadSPI driver")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
With the commit that moves the BOOTCOMMAND to Kconfig:
970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
some stray ifdefs have been left in the header files which
are now useless.
Clean up the include files to remove these lines.
Fixes: 970bf8603b ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit allows the ATMEL_PIT_TIMER driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 0.3 KBytes.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit allows the ATMEL_TCB driver to be unselected in SPL and be
selected in u-boot proper. The SPL can use a different timer.
By having a separate Kconfig for ATMEL_TCB in SPL, the size of the SPL
decreases by 1 KByte.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit removes the default reset driver for armv7, since
it is no longer needed due to the presence of the SYSRESET driver.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
This commit adds a condition to the Makefile so that whenever the SYSRESET
option is chosen in the configuration, the default reset driver is ignored.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
To quote the author:
The bootflow feature provide a built-in way for U-Boot to automatically
boot an Operating System without custom scripting and other customisation.
This is called 'standard boot' since it provides a standard way for
U-Boot to boot a distro, without scripting.
It introduces the following concepts:
- bootdev - a device which can hold a distro
- bootmeth - a method to scan a bootdev to find bootflows (owned by
U-Boot)
- bootflow - a description of how to boot (owned by the distro)
This series provides an implementation of these, enabled to scan for
bootflows from MMC, USB and Ethernet. It supports the existing distro
boot as well as the EFI loader flow (bootefi/bootmgr). It works
similiarly to the existing script-based approach, but is native to
U-Boot.
With this we can boot on a Raspberry Pi 3 with just one command:
bootflow scan -lb
which means to scan, listing (-l) each bootflow and trying to boot each
one (-b). The final patch shows this.
With a standard way to identify boot devices, booting become easier. It
also should be possible to support U-Boot scripts, for backwards
compatibility only.
...
The design is described in these two documents:
https://drive.google.com/file/d/1ggW0KJpUOR__vBkj3l61L2dav4ZkNC12/view?usp=sharinghttps://drive.google.com/file/d/1kTrflO9vvGlKp-ZH_jlgb9TY3WYG6FF9/view?usp=sharing
'make tests' fails on Ubuntu 22.04 with:
binman: ./tools/binman/binman:12: DeprecationWarning:
The distutils package is deprecated and slated for removal in Python 3.12.
Use setuptools or check PEP 632 for potential alternatives
from distutils.sysconfig import get_python_lib
./tools/binman/binman:12: DeprecationWarning:
The distutils.sysconfig module is deprecated, use sysconfig instead
from distutils.sysconfig import get_python_lib
<unittest.result.TestResult run=428 errors=0 failures=4>
AssertionError: 0 != 468
As we don't use Ubuntu 16.04 for our CI anymore drop the import.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
I ended up learning most of binman internals while trying to add a few
features to it, and I recently started reviewing binman series that
would not affect me personally. I'll keep working on it and try to do
more reviews.
Add myself as a maintainer for binman.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Tom Rini <trini@konsulko.com>
Binman interfaces allow attempts to replace any entry in the image with
arbitrary data. When trying to replace sections, the changes in the
section entry's data are not propagated to its child entries. This,
combined with how sections rebuild their contents from its children,
eventually causes the replaced contents to be silently overwritten by
rebuilt contents equivalent to the original data.
Add a simple test for replacing a section that is currently failing due
to this behaviour, and mark it as an expected failure. Also, raise an
error when replacing a section instead of silently pretending it was
replaced.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A previous patch fixes binman to correctly extract FIT subentries. This
makes it easier to test replacing these entries as we can write tests
using an existing helper function that relies on extracting the replaced
entry.
Add tests that replace leaf entries in FIT subsections with data of
various sizes. Replacing the subsections or the whole FIT section does
not work yet due to the section contents being re-built from unreplaced
subentries' data.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When reading images from a file, each entry's data is read from its
parent section as specified in the Entry.Create() call that created it.
The FIT entry type has been creating its subentries under its parent
(their grandparent), as creating them under the FIT entry resulted in an
error until FIT was converted into a proper section.
FIT subentries have their offsets relative to the FIT section, and
reading those offsets in the parent section results in wrong data. The
subentries rightfully belong under the FIT entries, so create them
there. Add tests checking that we can extract the correct data for a FIT
entry and its subentries.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman FIT entry nodes describe their subentries in an 'images' subnode,
same as how they would be written for the mkimage executable. The entry
type initially manually managed its subentries keyed by their node paths
relative to its base node. It was later converted to a proper section
while still keeping the same keys for subentries.
These subentry keys of sections are used as path fragments, so they must
not contain the path separator character '/'. Otherwise, they won't be
addressable by binman extract/replace commands. Change these keys from
the '/images/foo' forms to the subentry node names. Extend the simple
FIT tests to check for this.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
When an image has the 'allow-repack' property, binman includes the
original offset and size properties from the image description in the
fdtmap. These are later used as the packing constraints when replacing
entries in an image, so other unconstrained entries can be freely
positioned.
Replacing an entry in an image without 'allow-repack' (and therefore the
original offsets) follows the same logic and results in entries being
merely concatenated. Instead, skip resetting the calculated offsets and
sizes to the missing originals for these images so that every entry is
constrained to its existing offset/size.
Add tests that replace an entry with smaller or equal-sized data, in an
image that doesn't allow repacking. Attempting to do so with bigger-size
data is already an error that is already being tested.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman entries can use other executables to compute their data, usually
in their ObtainContents() methods. Subclasses of Entry_section would use
bintools in their BuildSectionData() method instead, which is called
from several places including their Pack().
These binary tools are resolved correctly while building an image from a
device-tree description so that they can be used from these methods.
However, this is not being done when replacing entries in an image,
which can result in an error as the Pack() methods attempt to use them.
Collect and resolve entries' bintools also when replacing entries to fix
Pack() errors. Add a way to mock bintool usage in the testing entry type
and tests that check bintools are being resolved for such an entry.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman can embed a copy of the image description into the images it
builds as a fdtmap entry, but it omits the /binman/<image-name> prefix
from the node paths while doing so. When reading an already-built image
file, entries are reconstructed using this fdtmap and their associated
nodes still lack that prefix.
Some entries like fit and vblock create intermediate files whose names
are based on an entry unique name. This name is constructed from their
node's path by concatenating the parents with dots up to the binman
node, e.g. /binman/image/foo/bar becomes 'image.foo.bar'.
However, we don't have this /binman/image prefix when replacing entries
in such an image. The /foo/bar entry we read when doing so erroneously
has the unique name of '/.foo.bar', causing permission errors when the
entry attempts to create files based on that.
Fix the unique-name generation by stopping at the '/' node like how it
stops at the binman node. As the unique names are used as filenames, add
tests that check if they're safe to use as filenames.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We would like to use bootstd by default when EFI boot manager is not
enabled. But so far bootstd does not support all the of distro-boot
fetures. So for now, add an option to select this.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need to create a disk image with a partition table and a DOS-format
filesystem containing a few files. Provide a fallback binary for CI since
it does not seem able to detect the loopback partitions.
Add this to a dm_init test so that it happens when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a set of combined tests for the bootdev, bootflow and bootmeth
commands, along with associated functionality.
Expand the sandbox console-recording limit so that these can work.
These tests rely on a filesystem script which is not yet added to the
Python tests. It is included here as a shell script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootdev driver for USB host. It can use the distro boot mechanism to
locate a file, or any other available bootmeth.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles distro boot from a disk via a U-Boot
script, so we can boot a bootflow using this commonly used mechanism. This
is required by Armbian, for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to be able to try out bootstd on sandbox, using host files.
This is easier than using a block device, which must have a filesystem,
partition table, etc.
Add a new driver which provides this feature. For now it is not used in
tests, but it is likely to be useful.
Add notes in the devicetree also, but don't disturb the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles EFI boot manager, using EFI_LOADER.
In effect, this provides the same functionality as the 'bootefi bootmgr'
command and shares the same code. But the interface into it is via a
bootmeth, so it does not require any special scripts, etc.
For now this requires the 'bootefi' command be enabled. Future work may
tidy this up so that it can be used without CONFIG_CMDLINE being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some boot methods don't act on a single bootdev but instead do their own
thing. An example is EFI bootmgr which scan various devices using its own
logic. Add a bootdev to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles EFI boot, using EFI_LOADER.
In effect, this provides the same functionality as the 'bootefi' command
and shares the same code. But the interface into it is via a bootmeth,
so it does not require any special scripts, etc.
For now this requires the 'bootefi' command be enabled. Future work may
tidy this up so that it can be used without CONFIG_CMDLINE being enabled.
There was much discussion about whether this is needed, but it seems
that it is, at least for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles distro boot from a network device, so
we can boot a bootflow using this commonly used mechanism.
In effect, this provides the same functionality as the 'pxe' command
and shares the same code. But the interface into it is via a bootmeth.
For now this requires the 'pxe' command be enabled. Future work may tidy
this up so that it can be used without CONFIG_CMDLINE being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootdev driver for MMC. It mostly just calls the bootdev helper
function.
Add a function to obtain the block device for an MMC controller.
Fix up the comment for mmc_get_blk_desc() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootmeth driver which handles distro boot from a disk, so we can
boot a bootflow using this commonly used mechanism.
In effect, this provides the same functionality as the 'sysboot' command
and shares the same code. But the interface into it is via a bootmeth.
For now this requires the 'pxe' command be enabled. Future work may tidy
this up so that it can be used without CONFIG_CMDLINE being enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a 'bootdev' command to handle listing and selection of bootdevs.
Disable standard boot for a few boards which otherwise run out of space.
Signed-off-by: Simon Glass <sjg@chromium.org>
A bootmeth is a method of locating an operating system. For now, just
add the uclass itself. Drivers for particular bootmeths are added later.
If no bootmeths devices are included in the devicetree, create them
automatically. This avoids the need for boilerplate in the devicetree
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
A 'bootdev' is a device which can be used to boot an operating system.
It is a child of the media device (e.g. MMC) which handles reading files
from that device, such as a bootflow file.
Add a uclass for bootdev and the various helpers needed to make it
work. Also add a binding file, empty for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'bootstd' device provides the central information about U-Boot
standard boot.
Add a uclass for bootstd and the various helpers needed to make it
work. Also add a binding file.
Signed-off-by: Simon Glass <sjg@chromium.org>
A bootflow encapsulates the process used to boot an operating system.
It typically has a control file (such as extlinux.conf) and information
about which 'bootdev' it came from.
Add the header file for this first, since it is needed by all other
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
When sandbox is used with hostfs we won't have a block device, but still
must set up the filesystem type before any filesystem operation, such as
loading a file. Add a function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The bootflow tests need to use an MMC with an associated backing file
containing a filesystem. Update the fastboot tests to cope with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases two devices are related and the only way to tell is to
check that the names partially patch. Add a way to check this without
needing to create a new string for the comparison.
Fix the comment for device_find_child_by_namelen() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
It seems that namelen is more common in U-Boot. Rename this function to
fit in better. Also fix a bug where it breaks the operation of
uclass_get_by_name() and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reported-by: Tim Harvey <tharvey@gateworks.com>
At present it is not possible to find out which part of the string is the
number part and which is before it. Add a new variant which provides this
feature, so we can separate the two in the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this has a minor bug in that it reads the byte before the
start of the string, if it is empty. Also it doesn't handle a
non-numeric prefix which is only one character long.
Fix these bugs with a reworked implementation. Add a test for the second
case. The first one is hard to test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tweak a few comments to kep sphinx happy, in case we want to include this
file one day.
Also fix the 'exxamine' typo.
Patch-notes:
This uses:
sed -i 's/@param \(\S*\)\s*/@\1: /' include/vsprintf.h
to convert the @param to the new format.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is a Kconfig for this erratum, but it is ignored for armv8.
Respect it.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On Layerscape platforms, the DTB is loaded from boot filesystem,
per the fdt_addr description in doc/README.distro, it must be
removed.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This is a follow-up patch for my "disk: don't compile in partition
support for spl/tpl if not really necessary".
"part" command is useful only if, at least, one of partition table types
is selected. So it should have a dependency on PARTITIONS which is now
automatically selected if one of partition table types is enabled.
With this change, *_defconfig which explicitly selects CMD_PART but
has no partition table types enabled should also be fixed.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Pull request for efi-2022-07-rc1-3
Documentation:
* Document image size parameter of bootefi command
UEFI:
* avoid building partition support in SPL/TPL where not required
* improve integration of EFI subsystem and driver model
* restore ability to boot arbitrary blob
In most of all cases, we can avoid using blk_desc which is expected
to be private to udevice(UCLASS_BLK), that is, the data should not
be manipulated outside the device driver unless really needed.
Now efi_disk's internally use dev_read/write() interfaces
if CONFIG_PARTITIONS is enabled.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In include/blk.h, Simon suggested:
===>
/*
* These functions should take struct udevice instead of struct blk_desc,
* but this is convenient for migration to driver model. Add a 'd' prefix
* to the function operations, so that blk_read(), etc. can be reserved for
* functions with the correct arguments.
*/
unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt, void *buffer);
unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt, const void *buffer);
unsigned long blk_derase(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt);
<===
So new interfaces are provided with this patch.
They are expected to be used everywhere in U-Boot at the end.
The exceptions are block device drivers, partition drivers and efi_disk
which should know details of blk_desc structure.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
When we create an efi_disk device with an UEFI application using driver
binding protocol, the 'efi_driver' framework tries to create
a corresponding block device(UCLASS_BLK/IF_TYPE_EFI). This will lead to
calling a PROBE callback, efi_disk_probe().
In this case, however, we don't need to create another "efi_disk" device
as we already have this device instance.
So we should avoid recursively invoke further processing in the callback
function.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is expected to be called, in particular from dm's pre_remove
hook, when associated block devices no longer exist.
Add efi_disk_remove() function.
This function removes an efi_disk object for a raw disk device (UCLASS_BLK)
and related objects for its partitions (UCLASS_PARTITION).
So this function is expected to be called through driver model's "remove"
interface every time a raw disk device is to be disconnected.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we create an efi_disk device with an UEFI application using driver
binding protocol, the 'efi_driver' framework tries to create
a corresponding block device(UCLASS_BLK/IF_TYPE_EFI). This will lead to
calling a PROBE callback, efi_disk_probe().
In this case, however, we don't need to create another "efi_disk" device
as we already have this device instance.
So we should avoid recursively invoke further processing in the callback
function.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add efi_disk_probe() function.
This function creates an efi_disk object for a raw disk device (UCLASS_BLK)
and additional objects for related partitions (UCLASS_PARTITION).
So this function is expected to be called through driver model's "probe"
interface every time one raw disk device is detected and activated.
We assume that partition devices (UCLASS_PARTITION) have been created
when this function is invoked.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In the next commit, CONFIG_EFI_SETUP_EARLY will become mandated
in order to support dynamic enumeration of efi_disk objects.
This can, however, be problematic particularly in case of file-based
variable storage (efi_variable.c, default).
Non-volatile variables are to be restored from EFI system partition
by efi_init_variables() in efi_init_obj_list(). When efi_init_obj_list()
is called in board_init_r(), we don't know yet what disk devices
we have since none of device probing commands (say, scsi rescan) has not
been executed at that stage.
So in this commit, a preparatory change is made; efi_init_obj_list() is
broken into the two functions;
* efi_init_early(), and
* new efi_init_obj_list()
Only efi_init_early() will be called in board_init_r(), which allows
us to execute any of device probing commands, either though "preboot"
variable or normal command line, before calling efi_init_obj_list() which
is to be invoked at the first execution of an efi-related command
(or at efi_launch_capsules()) as used to be.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Now that all the block device drivers have enable a probe hook, we will
call part_create_block_devices() to enumerate all the partitions and
create associated udevices when a block device is detected.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
NOTE: probably we have to update config dependencies,
in particular, SPL/TPL_PRINTF?
With this new function, UCLASS_PARTITION devices will be created as
child nodes of UCLASS_BLK device.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Some basic stuff about tag support is explained under
doc/devlop/driver-model.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
U-Boot menu framework(common/menu.c) returns 1 if it is successful,
returns negative value if it fails.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Under the current Kconfigs, disk/part.c will be compiled in even if none of
partition table types are enabled. This will lead to the size growth of SPL
/TPL code.
With this patch, CONFIG_PARTITIONS is selected only if, at least, one of
CONFIG_*_PARTITION is enabled.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Now we can build efi_loader with block device support (CONFIG_BLK) and
without CONFIG_PARTITIONS.
So change Makefile.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In the current implementation, partition table support (either GPT or DOS)
is not mandatory. So CONFIG_PARTITION_UUIDS should not be enabled
(selected) unconditionally.
Fixes: commit 17f8cda505 ("efi_loader: set partition GUID in device path for SIG_TYPE_GUID")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since host_get_dev_errr() is defined in drivers/block/sandbox.c,
the associated function prototype should be in a more appropriate
header file.
Fixes: commit 4101f68792 ("dm: Drop the block_dev_desc_t typedef")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Some defconfig enables CMD_PART even if none of any partition table
types (CONFIG_*_PARTITION) are enabled.
This will lead to the size growth in SPL/TPL code since disk/part.c
will be compiled in any way.
We will change disk/Kconfig later so that CONFIG_PARTITIONS is only
enabled when, at least, one of CONFIG_*_PARTITION is enabled.
To make the build work (in particular, "part" command) correctly,
a few functions should be defined as void functions in case of
!CONFIG_PARTITIONS.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since CONFIG_[SPL|TPL]_PARTITIONS were introduced, part.h has not been
updated. Due to this, while the build won't fail, some functionality may
possibly break as some partition-related functions are nullified even
though some partition table types are enabled for SPL/TPL.
Fixes: commit 88ca8e2695 ("disk: Add an option for partitions in SPL")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Some errno numbers are used in defining inline functions.
So "errno.h" should be explicitly included to avoid possible build errors.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A image_size parameter has been added to the bootefi parameter.
Describe all parameters.
Correct how the description of how the device-path in the loaded
image protocol is determined.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Up until commit 5f59518a7b ("efi_loader: setting boot device"), we
could boot an arbitrary blob with bootefi. Indeed, efi_run_image() even
has a special case for missing device paths indicating a payload that
was directly loaded via JTAG, for example.
Restore the ability to inject a UEFI payload into memory and `bootefi`
it. If the address passed isn't the last PE-COFF loaded, then we'll
wipe out the pre-existing DP/Image information and let efi_run_image()
synthesize a memory device path.
An image size is required if we're booting an arbitrary payload, and
the FDT argument has been changed to accept `-`. The size could be
deduced from the image header, but it's required anyways as an explicit
acknowledgment that one's trying to boot an arbitrary payload rather
than accidentally using the wrong address in the single-addr form.
Fixes: 5f59518a7b ("efi_loader: setting boot device")
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- Add "-q" to fdt addr and use it in distro_bootcmd to make the user
experience less scary reading in normal try/fail cases.
- Let the adc update an environment variable like many other commands do
- Fix TPL SEPARATE_BSS check when locating DTB
- Allow ":" in PXE file names again
- Two Apple M1 fixes
Unless you have a spare Apple Silicon machine, getting access to
the serial port on Apple Silicon machines requires special
hardware. Given that most machines come with a built-in screen
the framebuffer is likely to be the most convenient output device
for most users. While U-Boot will output to both serial and
framebuffer, OSes might not. Therefore set stdout-path to point
at /chosen/framebuffer when a keyboard is connected to the machine.
This behaviour can be overridden by setting the "stdout" variable
in the U-Boot environment. I addition to that keep the serial
console as the default when running under the m1n1 hypervisor.
The m1n1 hypervisor virtualizes the serial port such that it
can be easily accessed from any other machine with a USB port.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Janne Grunau <j@jannau.net>
Tested-by: Janne Grunau <j@jannau.net>
Enable CONFIG_NO_FB_CLEAR to preserve the Asahi logo. Since that
logo is drawn on a black background also enable
CONFIG_SYS_WHITE_ON_BLACK such that text printed by U-Boot is still
visible.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
- U-boot's PXE flow supports prefixing your bootfile name with an
IP address to fetch from a server other than the DHCP server,
e.g. `hostIPaddr:bootfilename`:
a93907c43f
- However, this breaks bootfile paths which contain a colon, e.g.
`f0:ad:4e:10:1b:87/7/pxelinux.cfg/default`
- This patch checks whether the `hostIPaddr` prefix is a valid
IP address before overriding the serverIP otherwise the whole
bootfile path is preserved
Signed-off-by: Lyle Franklin <lylejfranklin@gmail.com>
distro_bootcmd uses this construct a few times to test $fdt_addr_r,
and fall back on $fdtcontroladdr if not set/invalid:
if fdt addr ${fdt_addr_r}; then
...
else
...
fi
If the `fdt addr` test fails, it prints the following message on the
console, suggesting there is an error when there is not:
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
To remove this potentially confusing error message, this patch adds -q
as a 'quiet' option for fdt addr, and uses this flag in
config_distro_bootcmd.h
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Commit 690af71850 changed this condition
from an explicit
IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)
to
CONFIG_IS_ENABLED(SEPARATE_BSS)
The documentation for CONFIG_IS_ENABLED() in include/linux/kconfig.h
implies that we will get the correct behaviour, but the actual behaviour
differs such that this condition is now always false.
This stopped TPL being able to load the device tree blob at least on the
ROCKPro64 board (RK3399 SoC), since the wrong device tree location was
chosen.
The issues causing this behaviour with CONFIG_IS_ENABLED() are:
1. The documentation implies that CONFIG_SPL_BUILD =>
CONFIG_SPL_<option> is considered before the TPL equivalent.
Actually, the TPL options have higher priority - see definition of
_CONFIG_PREFIX.
2. The documentation implies a fallthrough, eg. if CONFIG_SPL_BUILD is
defined but the CONFIG_SPL_<option> is not, then it will proceed to
check if CONFIG_TPL_BUILD
Actually, if CONFIG_TPL_BUILD is defined, then it stops there
and CONFIG_SPL_BUILD is not considered - see definition of
_CONFIG_PREFIX.
During TPL build, at least for the ROCKPro64, both CONFIG_TPL_BUILD
and CONFIG_SPL_BUILD are defined, but because of the above, only TPL
options are considered. Since there is no CONFIG_TPL_SEPARATE_BSS,
this fails.
Fixes: 690af71850 ("fdt: Correct condition for SEPARATE_BSS")
Signed-off-by: Andrew Abbott <andrew@mirx.dev>
If dev_count_phandle_with_args returns 0 or another error, then pd will never
have been initialized by power_domain_get_by_index. Avoid comparing against
pd.dev in this situation.
Fixes: 3e4fcfa4bc ("power-domain: fix hang in endless loop on i.MX8")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
When usb3-phy label is found, PHY driver is called and serdes line is
initialized. This is preparation for serdes/psgtr driver to configure GT
lines based on description in DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Allow to disable PHY driver in SPL because it checks the CONFIG_SPL_PHY
variable for SPL builds.
The same change was done for usb by commit fd09c205fc ("usb:
s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add watchdog controller driver for NPCM7xx/npcm8xx
the wdt design of npcm750 and npcm845 is the same.
so the driver can work on npcm750 and npcm845.
about npcm845 wdt dtsi i will followed kernel dts name
to use nuvoton,npcm750-wdt.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds simple documentation about common properties for watchdog
in the device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Fix SPL_SYS_MALLOC_SIMPLE and non-SPL_FRAMEWORK boards (a large number
of PowerPC platforms)
- Remove duplication of crc16 functionality
- Migrate COUNTER_FREQUENCY to CONFIG_COUNTER_FREQUENCY and have it in
Kconfig
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enough space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In arch/arm/mach-imx/imx8m/soc.c there's an implementation of
board_fix_fdt() introduced by commit 35bb60787b. Remove the
redundant one to avoid failed to build from source when enabling
CONFIG_OF_BOARD_FIXUP.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if
CONFIG_COUNTER_FREQUENCY is valid
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in
config header file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: Re-run migration]
Set default COUNTER_FREQUENCY according to config header file
under include/configs/
i.MX6UL/ULL/7D/8QM/8QXP all has system counter frequency run at 8MHz,
so set default value for them.
SUNXI/EXYNOS/ROCKCHIP_RK3128/ROCKCHIP_RK3288/ROCKCHIP_RK322X/ROCKCHIP_RK3036
at 24MHz. ARCH_LX2160A at 25MHz
ARCH_ZYNQMP at 100MHz
Since versal has CONFIG_COUNTER_FREQUENCY, so use it. And
COUNTER_FREQUENCY will be dropped.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
ATSHA204A uses bit-reversed checksum of standard CRC-16 with polynomial
x^16 + x^15 + x^2 + 1.
This ATSHA204A specific checksum can be calculated just by using common
U-Boot functions bitrev16() and crc16().
So replace custom driver CRC-16 implementation by common U-Boot functions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Implementation in linux/crc16.h provides standard CRC-16 algorithm with
polynomial x^16 + x^15 + x^2 + 1. Use it and remove duplicate ext4 CRC-16
specific code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
File fs/ubifs/crc16.h is standard linux's crc16.h include file. So move it
from fs/ubifs to include/linux where are also other linux include files.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot CRC-16 implementation uses polynomial x^16 + x^12 + x^5 + 1 which is
not standard CRC-16 algorithm, but it is known as CRC-16-CCITT. Rename file
crc16.c to crc16-ccitt.c to reduce confusion.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
On P2020 board is SPL malloc simple always failing with error and loops:
SD boot...
alloc space exhausted
Bad trap at PC: f8f8b5f0, SR: 21200, vector=d00
NIP: 00000000 XER: 00000000 LR: 00000000 REGS: f8f8b5f0 TRAP: 20000000 DAR: 00000000
MSR: 00021200 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR08: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR24: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Call backtrace:
Exception in kernel pc f8f8b5f0 signal 0
Inspection showed that gd->malloc_limit is zero. And it is because
generally SPL_FRAMEWORK initialize SPL's gd->malloc_limit. But when
SPL_FRAMEWORK is not enabled then in most cases nobody initialize
gd->malloc_limit and so SPL malloc simple does not work.
So disable SPL_SYS_MALLOC_SIMPLE by default when SPL_FRAMEWORK is not
enabled. SPL_SYS_MALLOC_SIMPLE can be disabled only by setting
SPL_SYS_MALLOC_F_LEN to zero. So do it.
This change fixes SPL error "alloc space exhausted" on P2020 board.
Signed-off-by: Pali Rohár <pali@kernel.org>
- For the environment, add a arch_env_get_location hook and make use of
it on some NXP platforms (so that boards can override SoCs).
- Remove some unused squashfs code from SPL
- Resync am335x beaglebone related DTS files
- Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used
Fix wrong environment.h and remove DECLARE_GLOBAL_DATA_PTR
Fixes: 30e39ac7c9 (imx: imx7 Support for Manufacturing Protection)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Update the Kconfig and Makefile to allow build for iMX8M and
restrict the build only in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
The imx8mn_evk target have been converted to use binman.
With the binman approach the ATF load address is described via
devicetree, so remove the now unneeded instruction of exporting
ATF_LOAD_ADDR.
Signed-off-by: Fabio Estevam <festevam@denx.de>
There is no reason for disabling I-cache and D-cache
in SPL.
Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Enable DM_SERIAL for both U_Boot and the SPL. The uart4 and its pinmux
are already marked with u-boot,dm-spl but we need to move the call to
preloader_console_init() after spl_init() to avoid a board hang
as dm can't be used until after spl_init().
Remove the manual config of the UART pinmux now that it is no longer
needed.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
move the preloader_console_init() call after spl_init() to
avoid board hang
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
move the preloader_console_init() call after spl_early_init() to
avoid board hang
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.
Script as below
"
for i in `ls include/configs/*.h`
do
mmcroot=`sed -n '/define.*MMCROOT/ p' $i | awk -F\" '{ print $2;}'`
if [ ! -n "$mmcroot" ]; then
continue
fi
sed -i '/define.*MMCROOT/ d' $i
sed -i 's,\" CONFIG_MMCROOT \",'$mmcroot',g' $i
done
"
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The Sancloud BeagleBone Enhanced Extended WiFi (BBE Extended WiFi) has
its own devicetree file and the board can be identified by the 2nd
letter of the config string within the common EEPROM.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
The Sancloud BeagleBone Enhanced Lite (BBE Lite) has its own devicetree
file and the board can be identified by the 2nd letter of the config
string within the common EEPROM.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Sync BeagleBone dts files & TPS dtsi files with Linux v5.17 and include
the SanCloud BBE Extended WiFi dts added in v5.18-rc1. Also pull in
changes to am33xx-l4.dtsi needed to support the BeagleBone Blue.
The change to use the cpsw switch driver (commit c477358e66a3 in Linux)
is excluded from the sync as u-boot does not recognise the new
compatible string.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Currently there is only one way to override desired environment location,
by implementing env_get_location(). This is increasingly being conflated
both on board level and architecture level, which leads to a problem on
boards where this function is already implemented on architecture level,
since those boards have no way to override this environment location on
board level anymore.
Implement arch_env_get_location() function which is architecture specific
and should only ever be implemented in architecture code. This function
has lower priority than env_get_location(), which should only ever be
implemented in board code, and which overrides the arch_env_get_location()
architecture environment selection.
This way, architecture can define its default environment chooser, while
board can now override it as needed at all times.
There is no functional change, since env_get_location() simply returns
arch_env_get_location(), and arch_env_get_location() implements the
current env_get_location() default content.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-By: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The 4 GiB boundary is at 0xffffffff+1 , not at 0x80000000, fix this.
The PHYS_SDRAM of i.MX8M is at 0x40000000 , so to restrict ram_top
below 4 GiB, the ram_top has to be set to 0xffffffff as it is not
an offset from the start of PHYS_SDRAM, but rather a physical address
marking the topmost allowed DRAM address.
Fixes: e27bddff4b ("imx8m: Restrict usable memory to space below 4G boundary")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
This GPIO is actually an input "Q7_3V3_PCIE_WAKE#_IN" not an output, so
remove the misleaading and incorrect definition.
Cc: Tim Harvey <tharvey@gateworks.com> (re: pci: imx: use vpcie-supply if defined by device-tree)
Signed-off-by: Ian Ray <ian.ray@ge.com>
There are no users of the imx6_pcie_toggle_power and imx6_pcie_toggle_reset
weak overrides and as these functions are able to be handled now via dt
properties lets remove these.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
If vpcie-supply is defined by device-tree use that if
CONFIG_PCIE_IMX_POWER_GPIO is not defined.
Note that after this the following boards which define
CONFIG_PCIE_IMX_POWER_GPIO in their board header file as well as their
device-tree should be able to remove CONFIG_PCIE_IMX_PERST_GPIO without
consequence:
- mx6sabresd
- mx6sxsabresd
- novena
Note that the ge_bx50v3 board uses CONFIG_PCIE_IMX_POWER_GPIO and does
not have vpcie-supply defined in it's pcie node in the dt thus removing
CONFIG_PCIE_IMX_POWER_GPIO globally can't be done until that board adds
vpcie-supply.
Cc: Ian Ray <ian.ray@ge.com> (maintainer:GE BX50V3 BOARD)
Cc: Sebastian Reichel <sebastian.reichel@collabora.com> (maintainer:GE BX50V3 BOARD)
Cc: Fabio Estevam <festevam@gmail.com> (maintainer:MX6SABRESD BOARD)
Cc: Marek Vasut <marex@denx.de> (maintainer:NOVENA BOARD)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The Globalscale Technologies Sheevaplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.
- Remove CONFIG_RESET_PHY_R symbol from all board files
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup
comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
The Colibri PXA270 has been end-of-life since quite a while and would
require more and more maintenance (e.g. DM conversions).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)
Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Gateworks produces many products from a single PCB with subloaded
components. Add an additional two levels of dtb name matching so that
for example a GW7400-A matches the dtb name of gw74xx.dtb
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use the common GSC driver.
This allows us to do some additional cleanup:
- use the GSC driver functions
- move waiting for the EEPROM to the SPL int (it will always be ready
after this)
- move eeprom functions into eeprom file and elimate GSC_I2C_BUS
- eliminate some redundant EEPROM reads (the EEPROM must be read in
SPL before relocation, in SPL after relocation, and in U-Boot init.
All subsequent uses can use the global structure)
- remove unnecessary header files and alphabatize includes
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
- increase post-reset time to 300ms per datasheet
- add tx-delay/rx-delay config
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add gpio hog support for board-specific gpio lines:
- put hogs in u-boot.dtsi so as to keep the regular dts files
in sync with the kernel. The hogs will not be put in the kernel
as that makes them un-usable by userspace as well as
re-initializes them to dt defaults overriding changes which may
have been done by bootloader commands.
- specify gpio names and initial config
- enable GPIO_HOG
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Use the common GSC driver.
This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Enable USB support for host controller and various USB ethernet
devices.
Example usage of USB Mass Storage (UMS) support:
u-boot=> mmc list
FSL_SDHC: 0
FSL_SDHC: 1
FSL_SDHC: 2 (eMMC)
u-boot=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe30000
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use PREBOOT as well. This allows a customer to just set fdt_board as
on any other module to customize the device tree for his carrier
board.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Drop optional support for the ancient Apalis iMX6 V1.0 hardware which
had the UART wired as DCE rather than DTE.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This fixes the following crash when run on a Colibri iMX7S aka solo:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000:
The i.MX 7Solo has only one single USB OTG1 but no USB host port. Trying
to initialize the nonexisting port just crashes.
While at it also drop board_usb_phy_mode() which is also no longer used
in the driver model age.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
In case a customer wants to set fdtfile currently preboot overrides it
always with preboot just before the bootdelay. Use test -n to check
if fdtfile is already set and only set it if nothing got touched manually
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
As video support is very specific depending on the exact display
customisation we decided to disable video support for all out modules
by default.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
HSIOMIX PD controller and missing USB PD properties. This is required
to bring up the DWC3 USB controller up.
This is based on linux next and patches which are still pending
review, but which are likely going to be part of Linux 5.19:
b2d67d7bdf74 ("arm64: dts: imx8mp: disable usb3_phy1")
290918c72a29 ("arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes")
https://www.spinics.net/lists/arm-kernel/msg958501.html
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible
for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe
in the correct order. Currently supported is the USB 3.0 part which
can be tested, PCIe support should be easy to add.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Implement power_domain_get_by_name() convenience function which parses
DT property 'power-domain-names' and looks up power domain by matching
name.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework
the driver based on Linux GPCv2 driver to directly control the GPCv2
block instead of using SMCCC calls. This way, U-Boot can operate the
i.MX8M power domains without depending on anything else.
This is losely based on Linux GPCv2 driver. The GPU, VPU, MIPI power
domains are not supported to save space, since they are not useful in
the bootloader. The only domains kept are ones for HSIO, PCIe, USB.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The arch/arm/include/asm/arch-imx8m/power-domain.h is not included
anywhere except in drivers/power/domain/imx8m-power-domain.c, just
inline the content and drop the header. No functional change.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
In case the power domain node structure is gpc@303a0000/pgc/power-domain@N,
do not bind power domain driver to the 'pgc' node, but rather descend into
it and only bind power domain drivers to power-domain@N subnodes. This way
we do not waste one useless driver instance associated with 'pgc' node.
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each power domain driver. Drop all those empty functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.
Fixes: 829e06bf41 ("imx8ulp: clock: Add MIPI DSI clock and DCNano clock")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
DT node name should be generic, therefore rename atsha204a@64 to crypto@64.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Turris Omnia uses first MAC address from OTP for second ethernet interface.
Second MAC address for third interface and third MAC address for first
interface.
Other Turris routers do not have this rotate by one mapping. So add
function parameter for specifying id of the first ethernet interface.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Atsha device is used prior relocation and at this early stage BSS does not
have to be ready yet. So do not cache Atsha device in BSS.
Fixes support for other Turris routers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
OTP code is not Atsha generic but also it is not Omnia specific. It is
common for all Turris routers which use Atsha cryptochip for storing OTP.
So move this common Turris specific Atsha OTP code from Turris Omnia into
separate file. It will be used also by other Turris routers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Implement write support for Security OTP values via mailbox API commands
MBOX_CMD_OTP_WRITE_32B and MBOX_CMD_OTP_WRITE.
Write support for North and South Bridge OTPs are not implemented as these
OTPs are already burned in factory with some data.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
U-Boot SPL is on 32-bit mvebu executed by the BootROM. And BootROM expects
that U-Boot SPL returns execution back to the BootROM. Vectors during
execution of U-Boot SPL should not be changed as BootROM does not expect it
and uses its own vectors. So do not overwrite vectors in SPL build.
Signed-off-by: Pali Rohár <pali@kernel.org>
fstat()'s st_size works only for regular files. lseek() with SEEK_END works
also for block or MTD devices. This replacement allows kwboot to load
kwbimage from /dev/mtd0 for booting another device over /dev/ttyS0.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
is used for secure boot and each line is 64 bits long + 1 lock bit. LD
eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for
Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot
already contains HD eFuse reading and programming support.
This patch implements LD eFuse reading support. LD 0 line is mapped to
U-Boot fuse bank 64 and LD 1 line to fuse bank 65.
LD 0 Marvell Internal Use line seems that was burned in factory with some
data and can be read by U-Boot fuse command:
=> fuse read 64 0 9
LD 1 General Purpose Data line is by default empty and can be read by
U-Boot fuse command:
=> fuse read 65 0 9
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Update the current uDPU defconfig with following changes:
* Disable CONFIG_SPI_BOOT, its not needed for booting and the device boots
from eMMC anyway.
* Disable CONFIG_SYS_CONSOLE_INFO_QUIET, there is no need to diverge from
other boards by not priting the console device
* Enable CONFIG_CMD_MTD in order to allow use of the MTD tool
* Disable CONFIG_CMD_MTDPARTS, with MTD now being able to parse partitions
from DTS there is no need for it, the default MTDPARTS were incorrect
anyway
* Enable CONFIG_MMC_HS200_SUPPORT, the eMMC used support both HS200 and
HS400 modes, so enable at least HS200 because Xenon driver does not
support HS400 currently
* Replace CONFIG_SPI_FLASH_BAR with CONFIG_SPI_FLASH_SFDP_SUPPORT
Utilize SFDP parsing instead of relying on the extended address registers
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
uDPU is a bit of a specific device in that it does not have any copper
ports nor any ethernet PHY-s but 2 SFP ports.
This is an issue since MVNETA requires a PHY phandle or a fixed-link to
be defined under its node.
Since U-boot has no SFP support this is reasonable in order to know how
to configure the MAC.
However this also means that networking does not work on uDPU at all
currently, and fails with:
uDPU>> dhcp
Could not get PHY for neta@30000: addr 0
phy_connect failed
Could not get PHY for neta@40000: addr 1
phy_connect failed
So, to provide working networking using only SFP-s let add the fixed-link
at 1G which is much more common than 2.5G SFP-s as well as disable the
TX_DISABLE pins like done on Armada 7040 and 8040 platforms.
Since uDPU is not using any of the GPIO-s on the SB controller for any
purpose other than GPIO, a call to the pinctrl must be made in order for
it to get probed and thus register the SB GPIO bank, otherwise SB GPIO-s
are not registered at all.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for handling SFP TX disable for MVNETA in the same fashion as
to what MVPP2 is doing in order to enable using SFP-s.
This allows using ethernet on SFP only boards.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
It is not possible for the A53 core (on which U-Boot is running) to read it
directly. For this purpose Marvell defined mbox API for sending OTP
commands between CM3 and A53 cores.
Implement these Marvell fuse reading mbox commands via U-Boot fuse API.
Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44
banks and words 0-2).
Note that of the 67 bits, the 3 upper bits are: 1 lock bit and 2
auxiliary bits (meant for testing during the manufacture of the SOC, as
I understand it).
Also note that the lock bit and the auxiliary bits are not readable
via Marvell commands.
With CZ.NIC's commands the lock bit is readable.
Write support is not implemented yet.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Allow to specify input parameters, define all available mbox commands
supported by CZ.NIC's secure firmware and also Marvell's fuse.bin firmware
and fix parsing response from Marvell OTP commands.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Generic A3720 mbox code is currently in Turris Mox specific board file
board/CZ.NIC/turris_mox/mox_sp.c. Move it to board independent arch file
arch/arm/mach-mvebu/armada3700/mbox.c.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Allow to read OTP bits via U-Boot fuse command on all Armada 3720 boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Implement reading NB and SB fuses of Armada 37xx SOC via U-Boot fuse API.
Banks 0-43 are reserved for accessing Security OTP (not implemented yet).
Bank 44 is used for accessing North Bridge OTP (69 bits via words 0-2).
Bank 45 is used for accessing South Bridge OTP (97 bits via words 0-3).
Write support is not implemented yet because it looks like that both North
and South Bridge OTPs are already burned in factory with some data. The
meaning of some bits of North Bridge is documented in WTMI source code.
The meaning of bits in South Bridge is unknown.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When storing the UBoot Environment in for example EXT4,
the U-Boot build is broken for several reasons:
1. armada-385-turris-omnia-u-boot.dtsi will not allow
CONFIG_ENV_OFFSET and CONFIG_ENV_SIZE to be undefined
2. armada-37xx/board.c ft_board_setup function does not
exist if CONFIG_ENV_IS_IN_SPI_FLASH is not defined
This commit changes these files so that selecting a
different location for the environment is possible.
Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
There are two tools for sending images over UART to Marvell SoCs: kwboot
and mrvl_uart.sh. kwboot received lot of new features and improvements in
last few months. There is no need to maintain two tools in U-Boot, so
remove old mrvl_uart.sh tool.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and
move TI am33xx to use that as well, fix DT relocation with multiple
DRAM banks, and add a gpio read sub-command.
As explained in commit 4af2a33ee5 ("cmd: gpio: Make `gpio input`
return pin value again") the `gpio input` is used in scripts to obtain
the value of a pin, despite the fact that CMD_RET_FAILURE is
indistinguishable from a valid pin value.
To be able to detect failures and properly use the value of a GPIO in
scripts we introduce the `gpio read` command that sets the variable
`name` to the value of the pin. Return code of the `gpio read` command
can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE.
CONFIG_CMD_GPIO_READ is used to enable the `gpio read` command.
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR
frequency that is set for lpddr4 before initialization of the
controller. Make this optional and continue to use PLL bypass frequency
as is done currently if ti,ddr-freq0 is not provided.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The current implementation of boot_relocate_fdt() places DT at the
highest usable DRAM address, which is calculated as:
env_get_bootm_low() + env_get_bootm_mapsize()
which by default becomes gd->ram_base + gd->ram_size.
Systems like i.MX53 can have multiple DRAM banks with gap between them,
e.g. have DRAM at 0x70000000-0x8fffffff and 0xb0000000-0xcfffffff , so
for them the calculated highest DRAM address is 0xafffffff, which is
exactly in the gap and thus not usable.
Fix this by iterating over all DRAM banks and tracking the remaining
amount of the total mapping size obtained from env_get_bootm_mapsize().
Limit the maximum LMB area size to each bank, to avoid using nonexistent
DRAM.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect
the maximum possible SDRAM of 2 GB for AM64x (instead of the register's
default that says 8 GB, which the AM64x DDR controller wouldn't support).
The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG
was that of the next register at offset 0x24.
Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS
bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix,
image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on
DeveloperBox.
- populate u-boot,bootconf under /chosen, see
https://github.com/devicetree-org/dt-schema/pull/71 for corresponding
change
Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is
defined also when building SPL. When both FS_BTRFS and SPL are enabled
then build process throw compile error.
Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in
proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fix following two compile errors on big endian systems:
CC fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
from ./arch/powerpc/include/asm/byteorder.h:82,
from ./arch/powerpc/include/asm/bitops.h:8,
from include/linux/bitops.h:152,
from include/uuid.h:9,
from fs/btrfs/btrfs.c:10:
fs/btrfs/conv-funcs.h: In function ‘btrfs_key_to_disk’:
include/linux/byteorder/generic.h:90:21: error: ‘__cpu_to_le16’ undeclared (first use in this function); did you mean ‘__cpu_to_le16p’?
#define cpu_to_le16 __cpu_to_le16
^~~~~~~~~~~~~
fs/btrfs/conv-funcs.h:79:10: note: in expansion of macro ‘cpu_to_le16’
__u16: cpu_to_le16, \
^~~~~~~~~~~
CC fs/btrfs/compression.o
In file included from ./arch/powerpc/include/asm/unaligned.h:9,
from fs/btrfs/compression.c:16:
include/linux/unaligned/access_ok.h:6:19: error: redefinition of ‘get_unaligned_le16’
static inline u16 get_unaligned_le16(const void *p)
^~~~~~~~~~~~~~~~~~
In file included from fs/btrfs/ctree.h:16,
from fs/btrfs/btrfs.h:12,
from fs/btrfs/compression.c:8:
include/linux/unaligned/le_byteshift.h:40:19: note: previous definition of ‘get_unaligned_le16’ was here
static inline u16 get_unaligned_le16(const void *p)
^~~~~~~~~~~~~~~~~~
Include file asm/unaligned.h contains arch specific macros and functions
for unaligned access as opposite to linux/unaligned le_byteshift.h which
contains macros and functions specific to little endian systems only.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
We should only access console_devices[file][i] once we have checked that i
< cd_count[file]. Otherwise, we will access uninitialized memory at the end
of the loop. console_devices[file][i] should not be NULL, but putting the
assignment in the loop condition allows us to ensure that i is checked
beforehand. This isn't a bug, but it does make valgrind stop complaining.
Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Andrew Scull <ascull@google.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* free() checks if its argument is NULL. Remove duplicate checks.
* Remove duplicate free(ovcopy).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The offset of the current read back register is the value of the gpio pin,
not the value written for the gpio output.
This patch fix it to avoid the other gpio output value controlled by the
same register being set incorrectly.
Fixes: 7ad889b0f3 ("gpio: Add Aspeed GPIO driver")
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Since this box is SystemReady compliant enable ISO_PARTITION which is
needed to start some installers (e.g Fedora). While at it enable EXT4
as well which is a common filesystem for targets
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb994 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
It can be useful for the OS (Linux) to know which configuration has
been chosen by U-Boot when launching a FIT image.
Store the name of the FIT configuration node used in a new string
property called 'u-boot,bootconf' in the '/chosen' node in device tree.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
When every member of a linker list is aligned by the compiler, we can no
longer rely on the sizeof of the struct to determine the number of
entries.
For example, if the struct size is 0x90 but every entry is aligned to 0xa0
by the compiler, the linker list entries takes more space in memory and
the calculation of the number of entries is incorrect. For example, we may
see 0x12 entries when there are only 0x11.
This is a real problem. There may be a general solution, although I cannot
currently think of one. So far it only bites with OF_PLATDATA_RT which
creates a pointer to each entry of the 'struct udevice' linker_list. This
does not happen without that option, so it only affects SPL.
Work around it by manually calculating the aligned size of struct udevice,
then using that for the n_ent calculation.
Note: the alignment fix to linker list was here:
0b2fa98aa5 linker_lists: Fix alignment issue
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if devres is enabled in U-Boot proper it is enabled in SPL.
We don't normally want it there, so disable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Angus Ainslie <angus@akkea.ca>
Use this larger boundary to ensure that linker lists at least start on the
maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN
setting, but that is host-arch-specific, so it seems better to use the
largest value for every host architecture.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present fputc() is used before the console is available, then write()
is used. These are not compatible. Since fputc() buffers internally it is
better to use the write(), so that a partial line is immediately
displayed.
This has a slight effect on performance, but we are already using write()
for the vast majority of the output with no obvious impacts.
Signed-off-by: Simon Glass <sjg@chromium.org>
The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A number of rk3229/rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Google Veyron rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With more text coming to the rockchip.rst document,
give it a restyle first.
Changed:
sort build examples alphabetically
add git clone example
fix bash examples
fix phrases (grammer)
fix typos
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit adds the default configuration file and
relevant description for a MK808 board.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the include for rk3xxx-u-boot.dtsi to rk3188-u-boot.dtsi
to stay in line with U-boot dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the clock driver for the rk3066 platform.
Derived from the rk3288 and rk3188 driver it
supports only a bare minimum to bring up the system
to reduce the TPL size for:
SDRAM clock configuration.
The boot devices NAND, EMMC, SDMMC, SPI.
A UART for the debug messages (fixed) at 115200n8.
A SARADC for the recovery button.
A TIMER for the delays (fixed).
There's support for two possible frequencies,
the safe 600MHz which will work with default pmic settings and
will be set to get away from the 24MHz default and
the maximum of 1.416Ghz, which boards can set if they
were able to get pmic support for it.
After the clock tree is set during the TPL probe
there's no parent update support.
In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c
obtain the (fixed) clk_get_rate from the clock driver
instead of platdata.
The rk3066 cru node has a number of assigned-clocks properties
that call the .set_rate() function. Add them to the list so that
they return a 0 instead of -ENOENT.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The serial_rockchip.c driver converts platdata to the data structure
used in the ns16550.c file and then calls the function
ns16550_serial_probe().
When compiled with OF_REAL the serial_rockchip.c driver returns
now -ENODEV when probed and does no harm.
The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA.
Allow serial port use for both SPL and TPL by removing this
dependency and SPL_BUILD restriction.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip serial driver depends on an enabled NS16550 driver,
so add select SYS_NS16550 to config ROCKCHIP_SERIAL.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When a defconfig for rk3288 is compiled it gives the warning:
rockchip_rk3288_uart: Missing .compatible in
./drivers/serial/serial_rockchip.c
: WARNING: the driver rockchip_rk3288_uart
was not found in the driver list
Fix by renaming U_BOOT_DRIVER name of serial_rockchip.c
to rockchip_uart. Add rk3288 serial support with
a DM_DRIVER_ALIAS define.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip uart DT nodes have "snps,dw-apb-uart" as
fall back string. The driver ns16550.c has CONFIG_IS_ENABLED(OF_REAL)
as condition to of_match and does not copy dtplat data.
For TPL/SPL the driver serial_rockchip.c
is used. Move driver alias to correct driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The ns16550.c driver has the following conditions for .of_match:
CONFIG_IS_ENABLED(OF_REAL)
For Rockchip SoCs with TPL/SPL and platform data that need serial
support the serial_rockchip.c driver was made. It copies this data
and then calls ns16550_serial_probe(). With the addition of yet an other
SoC type this driver is in need for a little restyle.
Simplify struct rockchip_uart_plat and add extra SoCs with
DM_DRIVER_ALIAS(). Return -ENODEV when the ns16550.c driver
probe function is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have MMC DT nodes
with as compatible string "rockchip,rk2928-dw-mshc".
Add OF_PLATDATA support to the existing driver with
help of a DM_DRIVER_ALIAS.
This type needs a permanent enabled fifo.
The other Rockchip SoCs always have the property
"u-boot,spl-fifo-mode" in the MMC DT nodes,
because MMC to SRAM can't do DMA.
Make this property a requirement for MMC OF_PLATDATA
structures. The property "fifo-mode" must be added
for all other compile modes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks.
In the rockchip_dw_mmc driver the clock name in use was "fixed"
to "ciu" with index 1, but later reverted back to index 0.
The clock drivers can handle both, but the calling driver
should submit correct data as a standard practice.
Fix the "ciu" clock index by setting it back to 1.
clock-names:
minItems: 2
items:
- const: biu
- const: ciu
- const: ciu-drive
- const: ciu-sample
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The line with .of_to_plat in the U_BOOT_DRIVER structure
of dw-apb-timer.c is not aligned with the rest.
Add an extra TAB to fix the whitespace.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
U-boot is compiled with OF_PLATDATA TPL/SPL options,
so add OF_PLATDATA support for the dw-apb-timer.
Also change driver name to be able to compile with
U-boot scripts. No reset OF_PLATDATA support was added,
because the rk3066 nodes don't need/have them.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Not all Rockchip SoC models use the ARM arch timer.
Call the function timer_init() only when
CONFIG_SYS_ARCH_TIMER is available.
Use the call condition IS_ENABLED to increase
build coverage and make the code easier to read.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Include SCSI in the list of boot targets if CONFIG_CMD_SCSI is
enabled.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the HCLK_OTG, HCLK_SFC, and SCLK_SFC clocks to px30_clk_enable.
Without this change U-Boot reports an error of "Enable
clock-controller@ff2b0000 failed" on boot when using the SFC or USB in
U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing include for dm/device_compat.h. Without this include the
SFC driver fails to compile because dev_err and dev_dbg are not
defined.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Pull request for efi-2022-07-rc1-2
Documentation:
* Describe env command
UEFI
* simplify Unicode string functions
* clean up the usage of GUIDs for capsule updates
- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.
[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
To make addressing the problem of migrated symbols being present in
board config header files, update the CI test to them print what symbols
are causing it to fail. Also report all failures in the tree, rather
than stopping at the first failing file.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Apple M1 Ultra support, TI power domain fix, atsha204a big endian
support, LED cleanups and support for default-state, increase malloc
pool on sandbox, ubifs bugfix, further serial cleanup / semihost
support, fix a few cases around enabling/disabling FS support in SPL,
clean up duplication of table_compute_checksum()
Update the capsule update functionality related documentation to
refect the additional definitions that need to be made per platform
for supporting the capsule update feature.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
While building a capsule, the GUID value of that specific image is to
be passed through the --guid command option to the mkeficapsule
tool instead of using one of --raw or --fit options, where the GUID
value passed through the command line option is the image GUID.
This renders the EFI_FIRMWARE_IMAGE_TYPE_UBOOT_FIT_GUID and
EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID values superfluous. Remove the
--raw and --fit command line options as well. Also modify the
mkeficapsule man page to reflect this change.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The capsule update code has been modified for getting the image GUID
values from the platform code. With this, each image now has a unique
GUID value. With this change, there is no longer a need for defining
GUIDs for FIT and raw images. Remove these GUID values.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The current UEFI capsule updation code uses two GUID values, one for
FIT images, and one for raw images across platforms. This logic is
being changed to have GUID values per image, per platform. Change the
tests for the capsule update code to reflect this change. The GUID
values now used are the ones specific to the sandbox platform -- one
for the u-boot image, and another for the u-boot environment image.
Install the FMP instance for raw images on the sandbox variant for
testing the capsule update code. Install the FMP instance for the FIT
images on the sandbox64 and sandbox_flattree variant for testing
capsule update for FIT images. This is being done by splitting the
capsule update script for FIT and raw images.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Currently, there are a bunch of boards which enable the UEFI capsule
update feature. The actual update of the firmware images is done
through the dfu framework which uses the dfu_alt_info environment
variable for getting information on the update, like device, partition
number/address etc. The dfu framework allows the variable to be set
through the set_dfu_alt_info function defined by the platform, or if
the function is not defined, it gets the variable from the
environment. Using the value set in the environment is not very
robust, since the variable can be modified from the u-boot command
line and this can cause an incorrect update.
To prevent this from happening, define the set_dfu_alt_info function
when the capsule update feature is enabled. A weak function is defined
which sets the dfu_alt_info environment variable by getting the string
for the variable from the platform.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
The current capsule update code compares the image GUID value in the
capsule header with the image GUID value obtained from the
GetImageInfo function of the Firmware Management Protocol(FMP). This
comparison is done to ascertain if the FMP's SetImage function can be
called for the update. Make this checking more robust by comparing the
image_index value passed through the capsule with that returned by the
FMP's GetImageInfo function. This protects against the scenario of the
firmware being updated in a wrong partition/location on the storage
device if an incorrect value has been passed through the capsule,
since the image_index is used to determine the location of the update
on the storage device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Currently, the image descriptor array that has been passed to the
GetImageInfo function of the Firmware Management Protocol(FMP) gets
populated through the data stored with the dfu framework. The
dfu data is not restricted to contain information only of the images
updatable through the capsule update mechanism, but it also contains
information on other images. The image descriptor array is also parsed
by the ESRT generation code, and thus the ESRT table contains entries
for other images that are not being handled by the FMP for the capsule
updates. Fix this by populating the image descriptor array from the
structure initialised in the board file.
The other issue fixed is assignment of a separate GUID for all images
in the image descriptor array. The UEFI specification mandates that
all entries in the ESRT table should have a unique GUID value as part
of the FwClass member of the EFI_SYSTEM_RESOURCE_ENTRY. Currently, all
images are assigned a single GUID value, either an FIT GUID or a raw
image GUID. This is fixed by obtaining the GUID values from the
efi_fw_images array defined per platform.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initialise this structure in the board
file, and use the information for the capsule updates.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Currently there is no UBIFS support in SPL. But macro CONFIG_CMD_UBIFS is
defined also when building SPL. when both CMD_UBIFS and SPL are enabled
then build process throw compile error.
Fix check for ubifs code in fstypes[] to allow compiling CMD_UBIFS only in
proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
It seems like there was some merge error when first cleaning up and
sharing this function. We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).
Fixes: 1befb38b86 ("x86: Move table csum into separate file")
Fixes: 2b445e4d31 ("x86: Move table csum into separate header")
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds an implementation of puts for DM. The implementation is not as
clean as for the non-DM puts because we have to handle non-nul-terminated
string. We also handle short writes (though these are probably very
unusual).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a test to ensure that puts is equivalent to putc called in a
loop. We don't verify the contents of the message to avoid having to
record console output a second time (though that could be added in the
future). The globals are initialized to non-zero values to avoid a
warning; in particular, the character count is off-by-one (but we always
make relative measurements).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This implements puts for sandbox. It is fairly straightforward, except
that we break out the shared color printing functionality into its own
function.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A string like "test\n" would be broken up into the following sequence of
prints by _serial_puts:
puts("test\n")
putc('\r')
Although functionally this is the same as \r\n, it is not the standard
sequence and caused tests to fail. Fix this by excluding the '\n' from
the initial print. The above string will now be broken up like
puts("test")
puts("\r\n")
Since we may now need to call ops->puts twice (with the associated retry
logic), break that part of the function off into a helper.
Fixes: 7a76347189 ("serial: dm: Add support for puts")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Attaching a UBI partition may take a while, since scanning the memory is
required.
It thus makes sense to avoid a detach/scan/attach cycle when the right
partition is already attached, and let the calling process call 'detach'
beforehand if it needs it.
This commit checks for the currently attached UBI partition, and skips
reattaching if not needed, showing an information.
Signed-off-by: Alexandre Besnard <alexandre.besnard@softathome.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
Callers of function atsha204a_crc16() expect to return value in host cpu
endianity. So remove cpu_to_le16() conversion.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
It is possible for power domain IDs to be great than 31. If this
happens, the PTCMD and PTSTAT registers must overflow into adjacent
corresponding PTCMD_H and PTSTAT_H registers for each. Update the driver
to account for this.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The M1 Ultra consists of two M1 Max dies. The second die's I/O is at
a consistent offset of 0x2000000000.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Increase the malloc pool on sandbox in order to avoid spurious errors
such as:
___________________ test_ut[ut_dm_dm_test_video_comp_bmp32] ____________________
test/py/tests/test_ut.py:43: in test_ut
assert output.endswith('Failures: 0')
E AssertionError: assert False
E + where False = <built-in method endswith of str object at 0x7f5de85efb20>('Failures: 0')
E + where <built-in method endswith of str object at 0x7f5de85efb20> = 'Test: dm_test_video_comp_bmp32: video.c\r\r\nSDL renderer does not exist\r\r\ntest/dm/video.c:86, compress_frame_buff..._test_video_comp_bmp32(): 2024 == compress_frame_buffer(uts, dev): Expected 0x7e8 (2024), got 0x1 (1)\r\r\nFailures: 2'.endswith
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of reading out the entire FIFO and possibly overwriting U-Boot
memory, read out one packet per recv call, pass it to U-Boot network
stack, and repeat.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Pass private data into IO accessors and use the base addresses of
IO and DATA window from the private data instead of using the hard
coded macros DM9000_IO/DM9000_DATA. Currently both the DM9000_IO
and DM9000_DATA are assigned to the respecive private data fields
for the non-DM case backward compatibility.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Dispose of dm9000.h because none of the function prototypes declared in
it are called anywhere in the codebase. Staticize dm9000_read_srom_word()
because it is now called only from within the dm9000 driver. Drop
dm9000_write_srom_word() because it is no longer used.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Allocate driver private data dynamically in its init function and drop
the static driver private data variable. Pass the dynamic private data
throughout the driver. This is done in preparation for DM conversion.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Rename board_info structure to dm9000_priv to make it clear what this
structure really contains, the driver private data. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Remove volatile keyword usage from arrays, they are not really volatile
in any way, so this keyword is misused here. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Change type of private struct member mdio_base from void * to
phys_addr_t. This allows us to drop 2 casts.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The GW7903 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD socket with voltage select support
- Gateworks System Controller
- M.2 A-E Socket with USB2.0 and PCIe
- MiniPCIe Socket with PCIe, USB2.0, and SIM
- IMX8M FEC
- RS232/RS485/RS422 serial transceiver
- LIS2DE12 3-axis accelerometer
- front panel LED's
- off-board isolated digital I/O
- Wide range DC power input
- 802.3at PoE
- PMIC
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fix registration of 24M and 32k clock, those got applied or rebased
incorrectly, so fill in the correct code.
Fixes: 7a2c3be95a ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
This is the only place where i.MX8M code does SMCCC call, remove it.
The output has little value as it prints some part of commit ID, and
worse, if there is no SMC handler installed, the code outright hangs
or crashes the system.
By removing this one instance of SMCCC call, U-Boot no longer depends
on SMC handlers and can boot without hanging in any case. If there is
a need to dump this commit ID, use CMD_SMC instead and do 'smc' call
from U-Boot shell or scripts instead of hard-coding SMCCC dependency
into architecture code. This particular code can be replaced by:
=> smc 0xc2000003 0 0 0 0 0 0
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Some globals where not properly initialized causing timeouts
as data packets where not immediately acknowledged.
Fixes: cc6b87ecaa ("net: tftp: Add client support for RFC 7440")
Signed-off-by: Arjan Minzinga Zijlstra <arjan.minzingazijlstra@fox-it.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree
This patch move it in U-Boot as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
In Linux IMX and IMXRT use the device tree to hold the anatop address.
The anatop is used in clock drivers as it controls the internal PLLs
This will move the macro from asm/arch-imxrt to the device tree.
This presumably should also be done with the other IMX boards as well.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
The FlexSPI NOR boot offset does not require any special handling,
the image_offset is correct in either case (0x1000 for FlexSPI NOR
and 0x8000 for SD/eMMC) and the offset of u-boot.itb from the start
of flash.bin is always 0x58000 on MX8MN/MX8MP, which matches the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000 in case
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300, which is always the
case on MX8MN/MX8MP.
The CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is really overloaded in
case of the MX8MN/MX8MP, but fixing that needs additional plumbing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one
another, however the linux kernel DT uses separate compatible string
for each SoC. Add the missing i.MX8MP compatible into this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due
to part availability.
Add support for it by adding LED config and dt-prop based internal delay
config tx-delay/rx-delay per PHY ID.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
The GW7902-C revision adds an ADC for the VDD_5P0 voltage rail.
Add register definitions for it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Update the 'boot_net' script to load the fdt with the kernel.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
rcar3_salvator-x u-boot.img is very close to the 0x100000 size limit.
Enable linked time optimization (LTO).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Add redundand environment support as it is required
by SWUpdate.
While at it, also adjust the CONFIG_ENV_OFFSET to a more appropriate
larger offset as done on other i.MX8M defconfigs.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The serial number is located at offset 0x14 of the EEPROM
under i2c0 bus at address 0x54.
To print the serial number in Linux:
SERNUM=$(cat /proc/device-tree/serial-number)
echo $SERNUM
Signed-off-by: Fabio Estevam <festevam@denx.de>
Currently, the DDR type is retrieved by iteracting inside an array
of possible DDR types.
This may take saveral attempts, which slows the overall U-Boot process
and does not provide a good user experience:
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 1/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x5000010 ]
resetting ...
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 2/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x1061010 ]
resetting ...
U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 3/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0xff000010 ]
Normal Boot
WDT: Not starting
Trying to boot from MMC2
NOTICE: BL31: v2.5(release):v2.5
NOTICE: BL31: Built : 07:12:44, Jan 24 2022
Improve the boot time by retrieving the correct DDR information from
the EEPROM:
U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300)
DDRINFO(D): Kingston 4096G
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(E): mr5-8 [ 0xff000010 ]
Normal Boot
WDT: Started watchdog@30280000 with servicing (60s timeout)
Trying to boot from MMC2
NOTICE: BL31: v2.5(release):v2.5
NOTICE: BL31: Built : 22:28:11, Mar 15 2022
Based on the original code from Compulab's U-Boot.
Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM.
Signed-off-by: Fabio Estevam <festevam@denx.de>
imx8mm-cl-iot-gate supports multiple DDR sizes and models.
The DDR type can be retrieved from the EEPROM, so add SPL code
that can be used to get the DDR information.
Based on the original code from Compulab's U-Boot.
Signed-off-by: Fabio Estevam <festevam@denx.de>
This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
This driver supports NXP C45 TJA11XX PHYs, but there're also other NXP
TJA11XX PHYs. Let's rename functions in this driver to be c45 variant
specific, so further drivers can be introduced adding support for NXP
TJA11XX PHYs.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Add init_nand_clk to enable gpmi nand clock. Since i.MX8M not use CCF,
so we still use legacy mode to configure the clock.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Separe dm implementation from non dm implementation of pwm-imx
driver using CONFIG_DM_PWM
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c
and drop off pwm-imx-util.c
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Set the BYPASS ID SWAP bit (GPR10 bit 1).
The ID SWAP function randomly make TZASC grant non-secure access to
secure memory. TZASC ID SWAP should be bypassed by setting the bit
TZASC_ID_SWAP_BYPASS(bit 1) in IOMUX_GPR10 register.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Turns out on certain carrier boards (e.g. Iris V2) and under certain
circumstances (e.g. after a software reset) the SD card may have been
left in a strange state which later failed as follows:
Colibri iMX6ULL # mmc dev 0
Card did not respond to voltage select! : -110
Fix this as follows:
- Re-name the signaling voltage rail regulator from vmmc to vqmmc.
- Fix the name of the GPIO property to gpios.
- Specify 4-bit bus width, no write-protect capability and no 1.8
volt signaling voltage capability.
- Fix the clock vs. command pull-up vs. push-pull configuration.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Now that it is possible to use regulator-fixed-clock make use
of it. This makes U-Boot detect the PHY on first cold-boot.
This commit also adjusts the code in setup_fec and follows
how it is done in mx6ullevk.c
This commit also slows down the boot-process by about 150ms
as it now waits for the regulator-fixed-clock voltage that
drives the PHY to go up.
If you rely on very fast boot-speeds and don't need ethernet
for your boot-process you can safely revert the changes on
imx6ull-colibri.dtsi
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit adds the possibility to choose the compatible
"regulator-fixed-clock" in devicetree.
This is a special case of regulator-fixed where a clock has to
be used to switch the regulator on and off.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Toradex uses the variable variant to distinguish between modules with
eMMC, NAND with wifi and NAND without wifi.
This variable is set on every boot. Set this variable also if we have a
NAND module without wifi to prevent issues.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
U-Boot should never save the environment unasked.
This also avoids storing broken fdt_module to flash.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
U-Boot should never save the environment unasked.
This also avoids storing broken ftd_file to eMMC.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Since we envision using overlays for display interfaces, the video=
settings within vidargs are obsolete. Remove these settings from the
U-Boot.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
All the other NAND-based boards have tdxargs specified for setting
manual kernel command-line arguments.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Explicitly use the atf-bl31 type for the bl31.bin atf-blob. This uses
the path from the BL31 environment variable, if defined.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Rename board_early_init_f() to board_early_init(), since this function
has nothing to do with actual board_early_init_f() as used throughout
U-Boot. The board_early_init() is function local to this board used to
configure UART and WDT pinmux. Wrap init_uart_clk() into this function
so that early UART init would be all in one place. Turn the function
into __weak one, so it could be overridden in case custom carrier board
uses different UART or needs custom IOMUX settings.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The EFI memory init uses gd->ram_top for conventional memory. In
current implementation, the ram_top is below optee address. This cause
grub failed to allocation memory for initrd.
The change updates DDR bank setup functions to place the u-boot at top
DDR in 4GB space.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Need to drop phy-reset-gpios before booting linux, this property
is legacy property and replaced with reset-gpios.
If provide both, kernel would failed to request the same gpio twice
and cause fec not work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The extcon is an decrepted property and not used by upstream Linux and
NXP 5.10 kernel, so we remove it before kicking linux in case it is in
dts. Otherwise distro kernel will not able to have usb function.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Beside the fused modules on iMX8MP Lite, this part has also fused
GPU3D/2D, LVDS and MIPI DSI.
So we have to disable them for kernel and also disable MIPI DSI
in u-boot DTS for splash screen at runtime.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Wait 1ms before issuing the first MRS command to write DDR3 Mode
registers.
There is a requirement to wait a minimum time before issuing command to
the DDR3 device, according to the JEDEC standard this time is 500us
(after RESET_n is de-asserted until CKE becomes active) + tXPR (Reset
CKE Exit time, maximum value 360ns).
It seems that for some reason this is not enforced by the MMDC
controller.
Without this change we experienced random memory initialization failures
with about 2% boot failure rate on specific problematic boards, after
this change we were able to do more than 10.000 power-cycle without a
single failure.
Fixes: fe0f7f7842 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The current DDR write level calibration routine always overwrite
the ralat/walat fields to their maximum value, just save
the existing values at the beginning of the calibration routine
and restore it at the end.
In case the delay is estimated by the user to be more than one cycle the
walat should be configured according to that, this is not
automatically done. From the i.MX6 RM:
The user should read the results of the associated delay-line at
MPWLDECTRL#[WL_DL_ABS_OFFSET#] and in case the user estimates that the
reasonable delay may be above 1 cycle then the user should indicate it at
MPWLDECTRL#[WL_CYC_DEL#]. Moreover the user should indicate it in
MDMISC[WALAT] field. For example, if the result of the write leveling calibration
is 100/256 parts of a cycle, but the user estimates that the delay is above 2 cycles
then MPWLDECTRL#[WL_CYC_DEL#] should be configured to 2, so the total
delay will be 2 and 100/256 parts of a cycle
Probably it would just possible to not overwrite the mdmisc register in
the first place, since this is not present in the write_level_calib() example
in NXP AN4467 nor in the i.MX6 RM (44.11.6.1 Hardware Write Leveling
Calibration).
Fixes: d339f16911 ("arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
- According to S400 API, the fuse bank 25 (Testconfig2) is able to
access. Add it into driver's mapping table.
- According to FSB words list, the reserved 48 words are ahead of
the bank 5 and bank 6. Fix the wrong position.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable multiple storages for u-boot env:
MMC or SPI flash or NOWHERE for usb
so u-boot can runtime select the storage flash according to boot device.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The TEE memory should be reserved when TEE is present, so need
to runtime update dram bank and memory information according to
tee present or not.
Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable wdog_ad interrupt being triggered by CMC1 to CM33 to let CM33
know A35 reset and reinitialize rpmsg.
Clear wdog_ad and AD_PERIPH reset interrupt after A35 up, otherwise
M33 will always receive interrupt.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If M33 handshake is successful, TPM and DSI panel MUX setting is
done by M33, no need to set them.
If handshake is failed or M33 is not booted, continue the TPM
and DSI panel MUX setting
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update DDR PHY settings to support LPDDR4 mode only by adjusting
DQ VREF ctrl, ODT and pads drive strength.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Found the lposc fuse loading having impact to cpu idle in kernel.
Without the loading in dual boot mode, kernel will hang after idle
for a while.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
to APD. So except the masters and peripherals, other resources
(like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.
No needs to initialize DDR again after reboot.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since latest S400 firmware has supported to read OEM SRK Hash, add
it to the driver's table
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable MU0_B clk by default. When M33 image is loaded by Jlink,
the previous method not enable MU0_B clk and not able to communicate
with M33, so let's enable it by default.
And we not put it under kernel dts, because it conflicts with i.MX8QM
suspend/resume logic which requires large change.
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When reset with dual boot mode, the LPAV domain won't power down
due to its master is not assigned to APD. So the NICLPAV keeps the
last setting to use PLL4PFD1. So before SPL initialize the PLL4,
we need to switch NICLPAV to FRO192, otherwise system will hang.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset
during APD reset. So no need to init DDR again after reboot, but need to
reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may
change or disable some of them.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new ddr script, defconfig for ND
Configure the clock for ND mode
changing A35 to 960MHz for OD mode
Update NIC CLK for the various modes
Introduce clock_init_early/late, late is used after pmic voltage
setting, early is used in the very early stage for upower mu, lpuart and
etc.
Note: NIC runs at 324MHz, 442MHz has some random kernel hang issue with
cpuidle enabled now.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This workaround is not needed on i.MX8ULP proto-1B EVK as board has
fixed the problem. Because we don't support proto-1A any longer,
remove the PMIC settings.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add functions to check if M33 image is booted and handshake with M33
image via MU. A core notifies M33 to start init by FCR F0, then wait
M33 init done signal by checking FSR F0.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The COUNTER_FREQUENCY is missed in 8ulp configs, it will cause SPL
and u-boot not set the cntfrq_el0. For u-boot, this is ok, because
ATF has set it. But for SPL, it will lead delay and get_timer
not working.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to
the i.MX8MQ, except for clock and power domain design customization.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Some printf() have strings that doesn't terminate with end of line
and make the output hard to read.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Re-factor the imx8m[nmpq] rate tables into the common pll1416x clock
driver.
43cdaa1567ad3 ("clk: imx8mm: Move 1443X/1416X PLL clock structure to common place")
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
This is a DM clock driver based off the imx8mm u-boot driver and the linux
kernel driver.
All of the PLLs and clocks are initialized so the subsystems below are
functional and tested.
1) USB host and peripheral
2) ECSPI
3) UART
4) I2C all busses
5) USDHC for eMMC support
6) USB storage
7) GPIO
8) DRAM
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Acked-by: Sean Anderson <seanga2@gmail.com>
The mxs_nand_spl driver can support to read from page unaligned offset,
so don't need to set bl_len to ask spl_load_simple_fit to handle
the page unaligned access.
Actually spl_load_simple_fit has two parts of reading:
spl_simple_fit_read and spl_load_fit_image.
The spl_load_fit_image can handle the page unaligned offset,
but the spl_simple_fit_read can't do it. spl_simple_fit_read requires
the FIT location at page aligned offset.
Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl
to use page unaligned read by driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
Introduce pwm_dm_imx_get_parms, dm version of pwm_imx_get_parms.
This function get clock rate using clk dm api
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat
and imx_pwm_probe driver function
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables.
This is necessary to correctly identify env is in SPI NOR when the system
boots from SPI NOR attached to ECSPI.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because the Beacon imx8mn board uses device tree
for MMC/SD and Ethernet, there is no need to have some of the
config options. It's handled by the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because the Beacon imx8mm board uses device tree
for MMC/SD and Ethernet, there is no need to have some of the
config options. It's handled by the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Disable SPL exception vector which causes issue to ROM patch execution
when SPL calling ROM API.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Conversion to DM_SERIAL is mandatory.
Select DM_SERIAL and add a imx6q-tbs2910-u-boot.dtsi file
that describes the nodes that require dm-pre-reloc, which allows
the DM model to configure the UART pinctrl early.
Remove the now unneeded board UART initialization.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
With DM_SERIAL selected, it is no longer needed board code to
initialize the UART.
Describe the nodes that require dm-pre-reloc, which allows
the DM model to configure the UART pinctrl early.
Remove the now unneeded board UART initialization.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add a driver for the Gateworks System Controller used on Gateworks boards
which provides a boot watchdog, power control, temperature monitor,
and voltage ADCs.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
DM is not used for the SPL and a generic DT is used in the SPL
which requires no fixups. Remove the call in the SPL and move the function
into the U-Boot code.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Since DM_SERIAL is used for U-Boot we no longer need legacy UART code in
common.c shared by the SPL and U-Boot. Move the legacy UART config to
the non-DM SPL.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
convert to DM_I2C for U-Boot while leaving SPL legacy I2C:
- Move I2C config from common to SPL
- Move PMIC config from common to SPL (no need to re-configure pmic)
- add DM_I2C support to eeprom/gsc functions shared by SPL and U-Boot
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Configure binman ATF blob entry type to use the path from the BL31
environment variable, if defined.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
U-Boot complains that CONFIG_SERIAL is not converted to CONFIG_DM_SERIAL
and gives a deadline before possibly removing the board. Migrate to
DM_SERIAL to fulfill the request.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add settings for operating PLL at 933 MHz. This setting is useful in
case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add DT compatible string for PCA9450C PMIC. This is a variant of the
PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator,
and is software-wise compatible with the PCA9450B. This variant of the
PCA9450 is designed for use as companion PMIC for i.MX8MP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The Ethernet controller and PHY use the device tree info to
configure themselves, so it's not necessary to manually do it
in the board file. This permits the removal of a bunch of headers
as well.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
To be in sync with the linux devicetree add the disable-smarteee
property.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
To be in sync with the linux devicetree change the 'phy-reset-gpios' in
the fec node to 'reset-gpios' in the phy node. The PHY reset will be
done by the eth-phy-uclass driver while probing the PHY. This is ok
since it is done before probing the fec.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.
The PHY latency settings are derived from the phy-mode property and the
voltage seetings are done via the regulator.
Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int
counter to a size_t parameter. Correct the type of the counter. This
exists in upstream as b4c80629c5c9 ("include/linux/byteorder/generic.h:
fix index variables").
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
device tree imported from linux kernel.
c500bee1c5b2 (tag: v5.14-rc4) Linux 5.14-rc4
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162
platforms are enabled with JR driver model.
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
i.MX8(QM/QXP) - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
i.MX8(QM/QXP) - updated device tree for supporting DM in SPL.
disabled use of JR1 in SPL and uboot, as JR1 is reserved
for SECO FW.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
added crypto node in device tree.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
i.MX7D - added support for JR driver model.
removed sec_init() call, sec is initialized based on
job ring information processed from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
i.MX6,i.MX6SX,i.MX6UL - added support for JR driver model.
removed sec_init() call, sec is initialized based on
job ring information processed from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Because we don't use SPL_DM on mx6sabresd and mx6sabreauto, so it is
unnecessary to have SPL DTB related configs and SPL_OF_CONTROL enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
added device tree support for job ring driver.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If enable SPL_DM without SPL_OF_CONTROL,
build errors "undefined reference to fdt_get_resource",
is coming in function `caam_jr_probe'.
Added SPL_OF_CONTROL to remove the error.
Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
We need to know where the typedef of 'ofnode' comes from.
Fixes: c86a4de8df ("mtd: Add flash_node in struct mtd_info")
Signed-off-by: Tom Rini <trini@konsulko.com>
Backport commit 1cb51a15b576 ("ubifs: Fix journal replay wrt. xattr
nodes") from the Linux Kernel, which has the following Signed-off-by
line:
Signed-off-by: Richard Weinberger <richard@nod.at>
For U-Boot, after comapring with the upstream commit:
Signed-off-by: Tom Rini <trini@konsulko.com>
Hardware-accelerated hash functions require that the input and output
buffers be aligned to the minimum DMA alignment. memalign.h helpfully
provides a macro just for this purpose. It doesn't exist on the host,
but we don't need to be aligned there either.
Fixes: 5dfb521386 ("[new uImage] New uImage low-level API")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the commit bfaa51dd4a ("cmd: add serial console support
for the cls command") the cls command is not enough to clear the
video display when ANSI console is activated.
This patch clears the video device with the video_clear() API
before to display the bitmap used for the PXE background.
This patch avoids to display the LOGO, activated by default with
commit 7a8555d871 ("video: Show the U-Boot logo by default").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently, add_mtd_partitions_of() can be used only if dev field of
mtd_info struct is populated. It's the case, for example, for a spi nor
flash, which has a DT compatible "jedec,spi-nor" and an associated
device. mtd->dev is populated in spi_nor_scan().
But in case of a raw nand node, mtd_info's dev field can't be populated
as flash node has no compatible, so no associated device.
add_mtd_partitions_of() can't be used to parse "partitions" subnode.
To remove this constraint, add an ofnode field in mtd_info struct
which reference the DT flash node. This new field is populated by
nand_scan_tail(). This new field will be used by add_mtd_partitions_of()
to parse the flash node for "partitions" defined in DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Farhan Ali <farhan.ali@broadcom.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
When probing the LEDs, a default brightness is set based on settings
from the U-Boot device tree, i.e. the 'default-brightness' property
of the LED nodes. If that property is not present, the default
maximum brightness is set.
This should make sure the LED controller's registers affecting the
brightness are correctly initialized and should give a consistent
behaviour.
Signed-off-by: Paul HENRYS <paul.henrys_ext@softathome.com>
This was implemented in order to get dual-slot bootloader
partitions on the BeagleBone Black, whose MLO boots from
the first bootable partition: MLO chainloads u-boot in the
same way.
Signed-off-by: Jérôme Carretero <cJ-uboot@zougloub.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
Set digest_size SHA384 and SHA512 algorithms in pkcs7 and x509,
(not set by ported linux code, but needed by __UBOOT__ part).
EFI_CAPSULE_AUTHENTICATE doesn't select these algos but required for
correctness if certificates contain sha384WithRSAEncryption or
sha512WithRSAEncryption OIDs.
Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add a driver which allows to use of LEDs connected
to PWM (Linux compatible).
MAINTAINERS: add i.vozvakhov as a maintainer of leds-pwm
C(required during new functionality adding).
Signed-off-by: Ivan Vozvakhov <i.vozvakhov@corp.mail.ru>
Modify function to support any salt length instead of max
length only. Function now detects salt length by parsing
the content of db buffer. Note that it works with (but is
not limited to) zero-length, digest-length and max-length
Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Prior to introduction of modifications in rsassa_pss functions
related to padding verification, doing a pass to reduce memory
consumption of function by replacing memory copies of parts of
const buffer by pointers to the original buffer (masked_db and
h are subparts of msg buffer which is declared const, salt is a
subpart of db which is a working buffer, unmodified after being
filled). New pointers scope is limited to the function where
they are declared (not returned to caller by any mean), zeroing
risk of memory fault related to the change.
Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Prior to introduction of modifications in rsassa_pss functions
related to padding verification, doing a pass to update
const-correctness in targeted functions to comply with
coding-rules and avoid const-cast
Signed-off-by: SESA644425 <gioja.hermann@non.se.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.
Without this delays in R5 SPL are 10x off.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
When the RNG device is secured with OP-TEE, it is only accessible with
the HWRNG TA, the CONFIG_RNG_OPTEE is needed for STM32MP15 targets
with OP-TEE support.
The probe of this RNG driver fails when the TA is not available in OP-TEE
and the previous driver can be used, as CONFIG_RNG_STM32MP1 is activated
and when the associated node is activated in the device tree with:
&rng1 {
status = "okay";
};
When the RNG is used in OP-TEE, this node should be deactivated in
the Linux and U-Boot device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In U-Boot, the discovery of TA based on its UUID on the TEE bus is
not supported.
This patch only binds the driver associated to the new supported
OP-TEE TA = TA_HWRNG when this driver is enable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add driver for OP-TEE based Random Number Generator on ARM SoCs
where hardware entropy sources are not accessible to normal world
and the RNG service is provided by a HWRNG Trusted Application (TA).
This driver is based on the linux driver: char/hw_random/optee-rng.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
To quote the author:
This series adds support for running valgrind against U-Boot's internal
malloc. This allows for much more useful reports to be generated.
Some example output of valgrind run against u-boot/master with this
branch applied may be found at [1]. Note that valgrind gives up around
acpi. This feature still needs a lot of work on suppressions/hints to
filter out the noise properly.
[1] 2a2f99108e/gistfile1.txt
This documents how to get more detailed results from valgrind made possible
by the last two commits.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This annotates malloc and friends so that valgrind can track the heap. To
do this, we need to follow a few rules:
* Call VALGRIND_MALLOCLIKE_BLOCK whenever we malloc something
* Call VALGRIND_FREELIKE_BLOCK whenever we free something (generally after
we have done our bookkeeping)
* Call VALGRIND_RESIZEINPLACE_BLOCK whenever we change the size of an
allocation. We don't record the original request size of a block, and
neither does valgrind. For this reason, we pretend that the old size of
the allocation was for 0 bytes. This marks the whole allocaton as
undefined, so in order to mark all bits correctly, we must make the whole
new allocation defined with VALGRIND_MAKE_MEM_DEFINED. This may cause us
to miss some invalid reads, but there is no way to detect these without
recording the original size of the allocation.
In addition to the above, dlmalloc itself tends to make a lot of accesses
which we know are safe, but which would be unsafe outside of dlmalloc. For
this reason, we provide a suppression file which ignores errors ocurring in
dlmalloc.c
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Valgrind uses magic code sequences to define an ABI that the client may use
to request behavior from the host. In particular, this may be used to
inform valgrind about custom allocators, such as the one used in U-Boot.
This adds headers defining these sequences to U-Boot. It also adds a config
option to disable emission of these sequences entirely, in the (likely)
event that the user does not wish to use valgrind. Note that this option is
called NVALGRIND upstream, but was renamed (and inverted) to
CONFIG_VALGRIND. Aside from this and the conversion of a few instances of
VALGRIND_DO_CLIENT_REQUEST_EXPR to STMT, these headers are unmodified.
These headers were copied from valgrind 3.16.1-4 as distributed in Arch
Linux. They are licensed with the bzip2 1.16 license. This appears to be a
BSD license with some clauses from Zlib.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
i.MX8MQ use SYS_MALLOC_F_LEN 0x2000, not 0x10000. The OCRAM_S only has
32KB memory, use 0x10000 will make SPL not bootable.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Pull request for efi-2022-07-rc1
Documentation:
* Describe how enable DM_SERIAL for a board
UEFI
* Preparatory patches for better integration of DM and UEFI
* Use sysreset after capsule updates instead of do_reset
* Allow to disable persisting non-volatile variables
This reverts commit 8d61237edb.
This commit broke environment on literally every board I have access
to, with this revert in place, environment works as it should again.
The problem I observe with this patch is that saved environment in
either SPI NOR or eMMC is never used, the system always falls back
to default environment. The 'saveenv' command does succeed, but then
after reset, the default env is again used.
Furthermore, the commit introduced duplicate code in env_init(), this:
"
if (!prio) {
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = ENV_INVALID;
return 0;
}
if (ret == -ENOENT) {
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = ENV_INVALID;
return 0;
}
"
Furthermore, the commit is missing DCO SoB line.
Also note that upstream does not support UltraZed EG board, so
this might have been a patch pulled from downstream which did
depend on some other downstream behavior.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Felix.Vietmeyer@jila.colorado.edu <felix.vietmeyer@jila.colorado.edu>
Cc: Tom Rini <trini@konsulko.com>
When gpio_request_by_name allocates a gpio output it by default will
de-assert the gpio which for phy-reset will take the PHY out of reset.
As this occurs before eth_phy_reset is called to assert the reset
line it can cause undesired affects if reset timings are not properly
met.
Configure the gpio with GPIOD_IS_OUT_ACTIVE so that reset is kept active
(reset asserted) to avoid this.
Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
When gpio_request_by_name allocates a gpio output it by default will
de-assert the gpio which for phy-reset will take the PHY out of reset.
As this occurs before fec_gpio_reset is called to assert the reset
line it can cause undesired affects if reset timings are not properly
met.
Configure the gpio with GPIOD_IS_OUT_ACTIVE so that reset is kept active
(reset asserted) to avoid this.
Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently we require PHY interface mode to be known when
finding/creating the PHY - the functions
* phy_connect_phy_id()
* phy_device_create()
* create_phy_by_mask()
* search_for_existing_phy()
* get_phy_device_by_mask()
* phy_find_by_mask()
all require the interface parameter, but the only thing done with it is
that it is assigned to phydev->interface.
This makes it impossible to find a PHY device without overwriting the
set mode.
Since the interface mode is not used during .probe() and should be used
at first in .config(), drop the interface parameter from these
functions. Make the default value of phydev->interface (in
phy_device_create()) to be PHY_INTERFACE_MODE_NA. Move the interface
parameter to phy_connect_dev(), where it should be.
Change all occurrences treewide. In occurrences where we don't call
phy_connect_dev() for some reason (they only configure the PHY without
connecting it to an ethernet controller), set
phydev->interface = value from phy_find_by_mask call.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The bcmgenet and sun8i_emac drivers call phy_connect(), which finds /
creates the PHY and also connects it to the eth device via
phy_connect_dev(), then set some phydev members (bcmgenet only), and
then call phy_connect_dev() explicitly again.
Drop the second phy_connect_dev(), since it is unnecesary.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Use phydev->is_c45 instead of is_10g_interface(phydev->interface) to
determine whether clause 45 protocol should be used.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
We want to be able to have phydev->interface uninitialized during
->probe(). We should assume that phydev->interface is initialized only
before ->config().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition to
make it have zero value. This makes it possible (although not
encouraged) to test for invalid/nonexistent interface mode with !val
instead of val == PHY_INTERFACE_MODE_NA.
The comment near the definition says "Must be last", because when the
constant was introduced in commit 5f184715ec ("Create PHY Lib for
U-Boot"), it was used as the maximum value when interating over the
constants. But this is no longer true - we use PHY_INTERFACE_MODE_MAX
for that now, and so we can move it.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make
it compatible with Linux' naming.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Rename constant PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX to
make it compatible with Linux' naming.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Add helpers ofnode_read_phy_mode() and dev_read_phy_mode() to parse the
"phy-mode" / "phy-connection-type" property. Add corresponding UT test.
Use them treewide.
This allows us to inline the phy_get_interface_by_name() into
ofnode_read_phy_mode(), since the former is not used anymore.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Use the new dm_mdio_read/write/reset() wrappers treewide, instead of
always getting and dereferencing MDIO operations structure pointer.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Add wrappers dm_mdio_read(), dm_mdio_write() and dm_mdio_reset() for
DM MDIO's .read(), .write() and .reset() operations.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Add helpers ofnode_get_phy_node() and dev_get_phy_node() and use it in
net/mdio-uclass.c function dm_eth_connect_phy_handle(). Also add
corresponding UT test.
This is useful because other part's of U-Boot may want to get PHY ofnode
without connecting a PHY.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the ARRAY_SIZE() macro instead of hardcoding sizes of arrays in
macros.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The type of the return value of phy_read() and phy_read_mmd() is int.
Change the variable to not be unsigned so that we not get into an
unsigned compared against 0.
Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:
pfe_eth_probe
-> pfe_phy_configure
-> phy_connect
When this happens, the PHY will have an invalid OF node.
When ar803x_config() runs, it silently fails at ar803x_of_init(), and
therefore, fails to run the rest of the initialization.
This makes MII_BMCR contain what it had after BMCR_RESET (0x8000) has
been written into it by phy_reset(). Since BMCR_RESET is volatile and
self-clearing, the MII_BMCR ends up having a value of 0x0. The further
configuration of this register, which is supposed to be handled by
genphy_config_aneg() lower in ar803x_config(), never gets a chance to
run due to this early error from ar803x_of_init().
As a result of having MII_BMCR as 0, the following symptom appears:
=> setenv ethact pfe_eth0
=> setenv ipaddr 10.0.0.1
=> ping 10.0.0.2
pfe_eth0 Waiting for PHY auto negotiation to complete......... TIMEOUT !
Could not initialize PHY pfe_eth0
Manually writing 0x1140 into register 0 of the PHY makes the connection
work, but it is rather desirable that the port works without any manual
intervention.
Fixes: fe6293a809 ("phy: atheros: add device tree bindings and config")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:
pfe_eth_probe
-> pfe_phy_configure
-> phy_connect
When this happens, the PHY will have an invalid OF node.
The dp83867_config() method has extra initialization steps which are
bypassed when the PHY lacks an OF node, which is undesirable because it
will lead to broken networking. Allow the rest of the code to run.
Fixes: 085445ca41 ("net: phy: ti: Allow the driver to be more configurable")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
With dm-tag feature, any U-Boot subsystem is allowed to associate
arbitrary number of data with a particular udevice. This can been
see as expanding "struct udevice" without modifying the definition.
As a first user, UEFI subsystem makes use of tags to associate
an efi_disk object with a block device.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
virtio_init() enumerates all the peripherals that are to be materialised
with udevices(UCLASS_VIRIO) and creates particular device instances
(UCLASS_BlK or whatever else) as children.
On the other hand, device_probe() won't be invoked against those resultant
udevices unlike other ordinary device drivers do in the driver model.
This is particularly inconvenient when we want to add "event notification"
callback so that we will be able to automatically create all efi_disk
objects in a later patch.
With this patch applied, "virtio scan" will work in a similar way
to "scsi rescan", "usb start" or others in term of 'probe' semantics.
I didn't add this change to virtio_init() itself because this function
may be called in board_init_r() (indirectly in board_late_init())
before UEFI subsustem is initialized.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time an ide bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a sata bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a nvme bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a mmc bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Every time a usb bus/port is scanned and a new device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Every time a scsi bus/port is scanned and a new block device is detected,
we want to call device_probe() as it will give us a chance to run
additional post-processings for some purposes.
In particular, support for creating partitions on a device will be added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use sysreset_walk_halt() directly from reset-after-capsule-on-disk
feature to reboot (cold reset) machine instead of using reset command
interface, since this is not a command.
Note that this will make CONFIG_EFI_CAPSULE_ON_DISK depending on
the CONFIG_SYSRESET.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make efi_load_capsule_drivers() available even if EFI_CAPSULE_ON_DISK
is disabled because the caller (efi_init_obj_list()) expects it only
relays on EFI_HAVE_CAPSULE_SUPPORT.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Disable 'capsule disk-update' option for the efidebug command
when CONFIC_EFI_CAPSULE_ON_DISK is disabled, because this option
is available only when the EFI capsule update on disk is enabled.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since be66b89da3 ("efi_loader: configuration of variables store")
the choice of EFI_VARIABLE_FILE_STORE or EFI_MM_COMM_TEE
is mutually-exclusive, however efi_var_to_file also allows
for "neither". Provide an additional Kconfig option.
Signed-off-by: Tom Saeger <tom.saeger@oracle.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide settings for enabling the debug UART of the virt machine on
RISC-V QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* add link to booti man-page
* correct link description for efidebug command
* correct punctuation
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This is an attempt to cover the common cases found when enabling driver
model for serial on a new board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Take as reference Linux kernel code:
drivers/gpio/gpio-pca953x.c
Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the CONFIG macros to conditionally build the GPIO hogging support in
either the SPL or U-Boot, or both, depending on the configuration. Also
call the GPIO hog probe function in the common SPL board initialization
as an equivalent to adding it to the U-Boot init sequence functions.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for the upstream gpio-line-names property already described
in the common GPIO binding document[1]. The ability to search for a line
name allows boards to lift the implementation of common GPIO behaviours
away from specific line indexes on a GPIO controller.
[1] 3c35bfee83/dtschema/schemas/gpio/gpio.yaml (L17)
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
This platform has CONFIG_ETH_DESIGNWARE set already, which is the
correct value for the driver in question. Remove this incorrect line.
Signed-off-by: Tom Rini <trini@konsulko.com>
We use 'DEBUG' and not 'CONFIG_DEBUG' tree-wide for debug code that is
left in, and not wrapped by some other regular debugging type print
macro.
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This symbol is only possibly useful on some mvebu platforms, so move the
symbol there and select it for the only current user.
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This is a little tricky since SoCFPGA has code to determine this as
runtime. Introduce a guard variable for platforms to select if they
have a static value to use. Then for ARCH_SOCFPGA, call
cm_get_qspi_controller_clk_hz() and otherwise continue the previous
behavior.
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CONS_SCIF0
CONFIG_CONS_SCIF1
CONFIG_CONS_SCIF2
CONFIG_CONS_SCIF4
CONFIG_CONS_SCIFA0
Signed-off-by: Tom Rini <trini@konsulko.com>
This code is only used on the corvus platform, so migrate the LED on/off
code to this platform and remove it from the CONFIG namespace. In
theory, this should likely be moved to the modern GPIO LED driver as a
further cleanup.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
A number of CONFIG options are used on these platforms as part of the
default environment. Set some of these more directly and in other
cases, just reference them directly.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CM_INIT
CONFIG_CM_REMAP
CONFIG_CM_SPD_DETECT
CONFIG_CM_MULTIPLE_SSRAM
CONFIG_CM_TCRAM
We make the first three of these options be always enabled, as that
matches usage. We select the last two based on how they were defined in
armcoremodule.h. This also allows us to remove some unused code in
board/armltd/integrator/lowlevel_init.S
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This option is only enabled for CI_UDC and !TEGRA20, so implement it as
such in Kconfig directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
This register is referenced in one location and does not seem
configurable, so remove it from CONFIG namespace.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This converts the following to Kconfig:
CONFIG_BOARD_SIZE_LIMIT
To do this, introduce CONFIG_HAS_BOARD_SIZE_LIMIT.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Assorted env tooling updates
- Bug fix around multiple possible env locations and ENV_IS_NOWHERE
- Add 'indirect' sub-command to env
- Allow for FAT env to have the location overridden by the board code.
At present the tests assume that gawk is being used. Adjust the tests so
that the names are inserted in alphabetical order, so that awk is happy.
Also use PROCINFO to make gawk output in alphabetical order. This is not
ideal, since it changes the env-car ordering from what the user provided,
but it may be acceptable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/10
Drop this text at the end since it already mentions bootp and dhcp.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This doesn't really make much sense in the documentation. Add a code
comment instead.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
This will sort the default environment file generated by
"make u-boot-initial-env", but won't sort the default
environment in the compiled u-boot binary. The file
u-boot-initial-env is considered to use for the userpace
environment access tools [1] in case of that the
environments is written the first time into its location.
This is done on the one hand for a better overview and
comparison of the generated environment file. On the other
hand it is to synchronize the output with the script
get_default_env.sh, which generated a sorted default
environment file. The sorting preserves the order of equal
variable names by sorting only the variable name, and
disable the last-resort comparison. After sorting,
unnoticed blank lines at the end move to the top. Avoid
that by removing it before sorting.
[1] https://github.com/sbabic/libubootenv
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Behún <marek.behun@nic.cz>
To: u-boot@lists.denx.de
Reviewed-by: Simon Glass <sjg@chromium.org>
For platform which can boot on different device, this allows
to override interface, device and partition from board code
Signed-off-by: He Yong <hyyoxhk@163.com>
This allows an ergonomic-enough approximation of ${!variable} expansion.
This could be used the following way:
```
for target in ${boot_targets}; do
env indirect target_name target_name_${target}
# ...
done
```
Assuming `target_name_mmc0` and similar are set appropriately.
A default value can be optionally provided.
Note: this acts on environment variables, not hush variables.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Marek Behún" <marek.behun@nic.cz>
[trini: Don't enable by default]
This patch prevent u-boot from hanging on a UltraZed EG board (zynqmp).
Without the patch,
(drv = env_driver_lookup(ENVOP_INIT, prio))
evaluates to 0, causing prio = 0
Then, (!prio) is hit, returning -ENODEV causing a stall.
With the patch,
instead of returning -ENODEV and causing a stall, we
set gd->env_addr (is this really needed?)
and then
mark gd->env_valid = ENV_INVALID to use the default env.
When adding new features to imx8m boards, such as DM clock support,
the malloc area can be exhausted.
To avoid such issue, provide a reasonable default for the
SYS_MALLOC_F_LEN size.
Quoting Tom Rini:
"This seems to be an area where everyone is either:
- Kicking the value up a bit for themselves
- Having hard to figure out problems booting the platform because it's
too small a value until they see someone else picked a larger value.
So lets raise these a bit and get some acks, please."
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon, imx8mn-beacon
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
To quote the author:
This series collects together various misc patches that were needed when
building mainline U-Boot against Chromium OS verified boot. Most of them
fix minor bugs.
This file uses struct driver, so declare it at the top in case the
header-inclusion order is not as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is normally defined in stdint.h but is not used in U-Boot. When
libraries (such as Chromium OS vboot) are built against U-Boot they may
expect this value to be available. Add it to avoid build errors in this
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
These filesystems may have different settings for SPL and TPL. Use the
correct Makefile variable to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When SPI flash is used in SPL there is no console, so ctrlc() cannot be
called. Add a condition to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't use an appended tree for sandbox and the required symbols are
not present. Add a condition to avoid a build error.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the buffer is empty and not allocated, then abuf_realloc() tries to
copy invalid data. This happens because an incorrect change to use
memdup() was added after the original code was written.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the header file defines this function in SPL but the file may
not actually be built. This causes a build error if the option is enabled.
Fix the condition in the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
The conversion to bintools broke the invocation of the utility, since
the arguments are not correct. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Add DM_PMIC support to TPS65217 and migrate some platforms to it.
- mkimage verification fixes
- DM rST fix, add missing flag when linking u-boot-elf.o
If image backend provides verify_header callback then call it after writing
image to disk. This ensures that written image is correct.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
fix compile error when using a little-endian to build with configs:
sfr_nb4-ser_ram_defconfig
comtrend_wap5813n_ram_defconfig
comtrend_ar5387un_ram_defconfig
comtrend_ct5361_ram_defconfig
comtrend_vr3032u_ram_defconfig
comtrend_ar5315u_ram_defconfig
huawei_hg556a_ram_defconfig
netgear_dgnd3700v2_ram_defconfig
Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
When trying to run qemu-riscv64_smode_defconfig with 32 harts booting
fails. The debug UART shows a message
alloc space exhausted
32 is the current maximum number of harts for machine virt in QEMU 7.0.
Raise the default for SYS_MALLOC_F_LEN to 16 KiB.
Move the setting to /Kconfig where we define SYS_MALLOC_F_LEN for
other architectures too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Let CONFIG_TARGET_QEMU_VIRT imply CONFIG_CMD_SBI.
The sbi command provides detailed information about the SBI.
It is useful to test the discovery of extensions.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Let the sbi command display:
* machine vendor ID
* machine architecture ID
* machine implementation ID
With this patch the output for the HiFive Unmatched looks like
=> sbi
SBI 0.3
OpenSBI 0.9
Machine:
Vendor ID 489
Architecture ID 8000000000000007
Implementation ID 20181004
Extensions:
sbi_set_timer
sbi_console_putchar
sbi_console_getchar
sbi_clear_ipi
sbi_send_ipi
sbi_remote_fence_i
sbi_remote_sfence_vma
sbi_remote_sfence_vma_asid
sbi_shutdown
SBI Base Functionality
Timer Extension
IPI Extension
RFENCE Extension
Hart State Management Extension
System Reset Extension
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Provide library functions to read:
* machine vendor ID
* machine architecture ID
* machine implementation ID
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Version 1.0-rc3 of the RISC-V Supervisor Binary Interface Specification
has added the Performance Monitoring Unit Extension.
The sbi command should be able to detect it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The tps65217 PMIC driver is used with am335x SoC based designs.
It is used in the SPL (MLO) as well, so the DM conversion only is
for u-boot proper.
This driver only allows simple reading/writing/dumping of the content
of its registers and requires the DM_I2C for proper operation.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Up till now the CONFIG_POWER_TPS65217 has been defined in several header
files for am335x SoC.
This patch renames it to CONFIG_PMIC_TPS65217, which better reflects the
role of this IC circuit.
Moreover, new CONFIG_PMIC_TPS65217 has been introduced in Kconfig
to be used with boards, which both support DM_PMIC and DM_I2C.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Migrate all other platforms as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
Xilinx changes for v2022.07-rc1 v2
xilinx:
- Allow booting bigger kernels till 100MB
zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device
serial_zynq:
- Change fifo behavior in DEBUG mode
zynq_sdhci:
- Fix BASECLK setting calculation
clk_zynqmp:
- Add support for showing video clock
gpio:
- Update slg driver to handle DT flags
net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver
pwm:
- Add driver for cadence PWM
versal:
- Add support for reserved memory
firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations
include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
While creating a phy device using phy_device_create(), we need to
provide a valid phyaddr instead of 0 causing phy address being
registered as 0 with mdio bus and shows mdio phy list as below
ZynqMP> mdio list
eth0:
0 - TI DP83867 <--> ethernet@ff0b0000
eth1:
0 - TI DP83867 <--> ethernet@ff0c0000
Also PHY soft reset is being requested on 0 instead of valid
address causing "PHY reset timed out" error.
So add phyaddr argument to phy_connect_phy_id() and to its prototype
to create phy device with valid phyaddress.
Fixes: a744a284e3 ("net: phy: Add support for ethernet-phy-id with gpio reset")
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Link: https://lore.kernel.org/r/fe35fddb9faa5af577ffdfabaec6879c935a30f8.1648562755.git.michal.simek@xilinx.com
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.
The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
Now that the SPL can safely detect whether it was loaded from an eMMC
boot partition or the normal user data partition, let's enable this
feature on some boards that feature eMMC storage.
That covers the boards where I could test this on, and allows the same
build to be written to an SD card, eMMC user partition, eMMC boot
partition, or into SPI NOR flash.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the Allwinner BROM loads the SPL from an eMMC boot partition, it
sets the boot source byte to the same value as when booting from the
user data partition. This prevents us from determining the boot source
to load U-Boot proper from the proper partition for sure.
The generic SPL MMC code already looks at the enabled boot partition
number, to load U-Boot proper from the same partition, but this fails
if there is nothing bootable in this partition, as the BROM then
silently falls back to the user data partition, which the SPL misses.
To learn about the actual boot source anyway, we repeat the algorithm
the BROM used to select the boot partition in the first place:
- Test EXT_CSD[179] to check if an eMMC boot partition is enabled.
- Test EXT_CSD[177] to check for valid MMC interface settings.
- Check if BOOT_ACK is enabled.
- Check the beginning of the first sector for a valid eGON signature.
- Load the whole SPL.
- Recalculate the checksum to verify the SPL is valid.
If one of those steps fails, we bail out and continue loading from the
user data partition. Otherwise we load from the selected boot partition.
Since the boot source is needed twice in the boot process, we cache the
result of this test to avoid doing this costly test multiple times.
This allows the very same image file to be put onto an SD card, into the
eMMC user data partition or into the eMMC boot partition, and safely
loads the whole of U-Boot from there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add CONFIG_NR_DRAM_BANKS from am64x_evm_a53_defconfig as this is needed
to calculate the size of DDR that is available.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Call into k3-ddrss driver to fixup device tree and resize the available
amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup as done from
R5 SPL and apply it to DT passed to A53 U-boot, which in turn passes
this to the OS.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce ECC Functionality for full memory space as implemented in the
DDRSS. The following is done to accomplish this:
* Introduce a memory region "ss" to allow dt to provide DDRSS region,
which is not the same as "ctl" which is the controller region.
* Introduce a "ti,ecc-enable" flag which allows a memorycontroller
instance to enable ecc.
* Introduce functionality to properly program the DDRSS registers to
enable ECC for the full DDR memory space if enabled with above flag.
* Expose a k3_ddrss_ddr_fdt_fixup call to allow fixup of fdt blob to
account from DDR memory that must be reserved for ECC operation.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The current address being read from dt actually represents the ddrss_ctl
memory region, while ddrss_ss region is something else. Introduce
ddrss_ctl_regs and use it to free up ddrss_ss_regs for its proper
purpose later so that we can avoid confusion.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Use the appropriate fdtdec_setup_mem_size_base and
fdtdec_setup_bank_size calls in dram_init and dram_bank_init to pull
these values from DT, where they are already available, instead of
hardcoding them.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Timer0 runs at 200MHz,and the clock-frequency defined in DT is
incorrect. Fix it.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
On arm64 systems, recommendation is to use per-cpu timer for time
keeping. Currently AM64 ends up using DM timer as tick timer as driver
is enabled in the config. Drop OMAP DM Timer related configs, this will
switch to using armv8 per-cpu timer as tick timer for A53 SPL/U-Boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
On AM64x devices, it is possible to route Main ESM0 error events to MCU
ESM. MCU ESM high error output can trigger the reset logic to reset the
device. So, for these devices we expect two ESM device nodes in the
device tree, one for Main ESM and the another MCU ESM in the device tree.
When these ESM device nodes are properly configired it is possible to
route the Main RTI0 WWDT output to the MCU ESM high output through Main
ESM and trigger a device reset when
CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.
On K3 AM64x devices, the R5 SPL u-boot handles the ESM device node
configurations.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Enable access to ESM0 configuration space and add Main ESM0 and MCU ESM
nodes to the AM64 device tree.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Add functionality to enable, set priority to the input events and to
route to MCU ESM. On AM64x/AM62x devices, it is possible to route Main
ESM0 error events to MCU ESM. When these error events are routed to MCU
ESM high output, it can trigger the reset logic to reset the device,
when CTRLMMR_MCU_RST_CTRL:MCU_ESM_ERROR_RESET_EN_Z is set to '0'.
K3 based J7 devices (ex: J721e) also have ESM modules, and the changes
to the driver does not impact those devices.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
U-boot is intended to replace linux kernel in android boot image(ABL), and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `prevbl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `prevbl_initrd_start_addr`
In this way, u-boot bootcmd relies on `prevbl_initrd_start_addr` env
variable, and boils down to `bootm $prevbl_initrd_start_addr`.
If more control on boot process is desired, pack a boot script in
FIT image, and put it to default configuration
What done:
- Rearrange defconfig option order
- Add CONFIG_SAVE_PREV_BL_* options
- Doc updates:
- remove wrong SBOOT memory corruption note, because
memory is changed during u-boot bringup process,
not by SBOOT
- put payload on ramdisk place in abl boot image
creation step
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Platforms can overwrite the weak definition of spl_mmc_boot_mode() to
determine where to load U-Boot proper from.
For most of them this is a trivial decision based on Kconfig variables,
but it might be desirable the probe the actual device to answer this
question.
Pass the pointer to the mmc struct to that function, so implementations
can make use of that.
Compile-tested for all users changed.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Ley Foon Tan <ley.foon.tan@inte.com> (for SoCFPGA)
Acked-by: Lokesh Vutla <lokeshvutla@ti.com> (for OMAP and K3)
Reviewed-by: Simon Glass <sjg@chromium.org>
BSP boot0 executes resistor calibration before clocks are initialized.
Let's do that.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H6 and H616 SPL code has a few writes to unknown PRCM registers. Now
that we know what they are, let's replace magic offsets with proper
register names.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.
Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
[Andre: remove H2+, rearrange pin setup order]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This syncs the sun8i-h3-nanopi-neo.dts from the Linux tree, from tag
v5.18-rc1.
The alias is required to enable automatic MAC address generation.
Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.
This also has the added benefit of picking the right clock/reset
bits for H6 and new SoCs that have a rearranged PRCM MMIO space.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Chips attached to the RSB bus require an initialization command before
they can be used. (Specifically, this command programs the chip's
runtime address.) The driver does this in its .probe_chip hook, under
the assumption that .probe_chip is called during child probe. This is
not the case; .probe_chip is only called by dm_i2c_probe, which is
intended for use by board-level code, not for chips with OF nodes.
Since this initialization command must be run before a child chip can be
used, do it before probing each child.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Chips attached to the P2WI bus require an initialization command before
they can be used. (Specifically, this switches the chip from I2C mode
to P2WI mode.) The driver does this in its .probe_chip hook, under the
assumption that .probe_chip is called during child probe. This is not
the case; .probe_chip is only called by dm_i2c_probe, which is intended
for use by board-level code, not for chips with OF nodes.
Since this initialization command must be run before a child chip can be
used, do it before probing each child.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that mkimage can generate TOC0 images, and the SPL can interpret
them, hook up the build infrastructure so the user can choose which
image type to build. Since the absolute load address is stored in the
TOC0 header, that information must be passed to mkimage.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
SPL uses the image header to detect the boot device and to find the
offset of the next U-Boot stage. Since this information is stored
differently in the eGON and TOC0 image headers, add code to find the
correct value based on the image type currently in use.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
existing sunxi_egon image type. The secure boot ROM (SBROM) uses a
completely different image type, known as TOC0.
A TOC0 image is composed of a header and two or more items. One item
is the firmware binary. The others form a chain linking the firmware
signature to the root-of-trust public key (ROTPK), which has its hash
burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256.
The pseudo-ASN.1 structure is manually assembled; this is done to work
around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
implementation has been verified to work with the A50, A64, H5, H6,
and H616 SBROMs, and it may work with other SoCs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As mkimage -T sunxi_egon now gains support for -A parameter, specify the
architecture when generating SPL boot image for sunxi.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There's now a sun20i family in sunxi, which uses RISC-V CPU.
Add support for making eGON.BT0 image for RISC-V.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Refactor some functions in mkimage sunxi_egon type, in order to prepare
for adding support for more CPU architectures (e.g. RISC-V). In
addition, compatibility for operation w/o specified architecture is
kept, in this case the architecture is assumed as ARM.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sunxi_egon type used to take no -A argument (because we assume sunxi
targets are all ARM). However, as Allwinner D1 appears as the first
RISC-V sunxi target, we need to support -A; in addition, as external
projects rely on U-Boot mkimage to generate sunxi eGON.BT0 header, we
need to keep compatibility with command line without -A.
As the default value of arch in mkimage is not proper (IH_ARCH_PPC
instead of IH_ARCH_INVALID), to keep more compatibility, add an Aflag
field to image parameters to describe whether an architecture is
explicitly specified.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.
Clean up the code in the process: remove #ifdefs and recognize that the
pin configuration is the same for all sun8i/sun50i SoCs, not just those
which select CONFIG_MACH_SUN8I.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
These options are not currently enabled anywhere. Any new users should
use DM clocks and pinctrl.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Where multiple options were available, the one matching board.c and the
device trees was chosen.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixup H5 I2C1 pinmux]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sunxi pinctrl hardware has bias and drive control. Add driver
support for configuring those options.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pinmux command uses this function to display pinmux status.
Since the driver cannot map pin numbers to a list of supported
functions, only functions which are common across all pins can be
reported by name.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.
We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.
This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.
[1]: See commit dda9fa734f ("sunxi: Simplify MMC pinmux selection")
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: add comment summarising the commit message]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Create a do-nothing driver for each sunxi pin controller variant.
Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
U-boot is intended to replace linux kernel in android boot image(ABL), and
it's FIT payload to replace initramfs file. The boot process is similar to
boot image with linux:
- android bootloader (ABL) unpacks android boot image
- ABL sets `linux,initrd-start property` in chosen node in unpacked FDT
- ABL sets x0 register to FDT address, and passes control to u-boot
- u-boot reads x0 register, and stores it in `prevbl_fdt_addr` env variable
- u-boot reads `linux,initrd-start` property,
and stores it in `prevbl_initrd_start_addr`
In this way, u-boot bootcmd relies on `prevbl_initrd_start_addr` env
variable, and boils down to `bootm $prevbl_initrd_start_addr`.
If more control on boot process is desired, pack a boot script in
FIT image, and put it to default configuration
What done:
- strip unneeded config options
- add FIT image support
- add framebuffer node, u-boot logo and video console
- increase LMB_MAX_REGIONS, to store all linux dtb reserved memory regions
- add linux kernel image header
Uart driver causes hang, when u-boot is used in android boot image instead
of linux. Temporary disable console driver, until investigated and fixed.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
When u-boot is used as a chain-loaded bootloader (replacing OS kernel),
previous bootloader leaves data in RAM, that can be reused.
For example, on recent arm linux system, when chainloading u-boot,
there are initramfs and fdt in RAM prepared for OS booting. Initramfs
may be modified to store u-boot's payload, thus providing the ability to
use chainloaded u-boot to boot OS without any storage support.
Two config options added:
- SAVE_PREV_BL_INITRAMFS_START_ADDR
saves initramfs start address to 'prevbl_initrd_start_addr' environment
variable
- SAVE_PREV_BL_FDT_ADDR
saves fdt address to 'prevbl_fdt_addr' environment variable
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
We already support the NVMe commands and PCIe backend in the QEMU target,
so let's make it easy for anyone to consume them and enable NVMe distro
boot along the way!
With this patch, I can put an NVMe backed disk image into my QEMU VM and
have it automatically load a UEFI target blob.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
First set of u-boot-at91 features for the 2022.07 cycle:
This feature set includes the new driver for the Atmel TCB timer,
alignment in DT for sama7g5 and sama7g5ek board, one Kconfig conversion
for external reset, and the usage of Galois tables from ROM for sama5d2
device.
If include/generated/env.in does not exist, which is a typical case for
clean build, quiet_cmd_gen_envp command tries to delete this file
unconditionally.
This produces following warning during the build:
ENVP include/generated/env.in
rm: cannot remove 'include/generated/env.in': No such file or directory
Add '-f' option to the `rm` command to not complain if file does not
exist.
Fixes: f432eb6d8a ("env: Avoid using a leftover text-environment file")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Unfortunately, we require additional logic to buildman to support this
removal and still use SYS_SOC, etc, for build targets.
This reverts commit eeec00072d.
Signed-off-by: Tom Rini <trini@konsulko.com>
This brings in two related series. The first from Andre:
This series is the continuation of last year's effort to support the new
Armv8-R64 application profile. This led to a significant rework of the
existing fastmodel (FVP) support, to both upgrade it to newest U-Boot
standards (OF_CONTROL and distro_boot support), but also to generalise
the code, so that plugging in the v8-R64 support in the last patch gets
much easier. This is because apart from the twisted memory map between
the two profiles there is actually little difference, when it comes to
U-Boot relevant parts of the hardware.
I kept the legacy semihosting support (which picks up magic files from
the current directory), but if that fails, we go and try virtio-blk
(.iso installer images work), then virtio-net.
Please have a look, and give it a try, if possible. Both the v8-R and
v8-A FVP models are available for free on the Arm website[1].
Patch 01/11 fixes a regression introduced in December, it should be
applied now. The rest of the patches are for the next merge window.
[1]
https://developer.arm.com/tools-and-software/simulation-models/fast-models
And the second from Sean (where we exclude 27, 28 and 29 for now):
This cleans up the semihosting code and adds the following new features:
- hostfs support (like sandbox)
- support for being used as a SPL boot device
- serial device support
- falling back to normal drivers if semihosting is disabled
The main device affected by these changes is vexpress64, so I'd
appreciate
if Andre (or anyone else) could try booting.
These changes are motivated by bringup for ls1046a. When forcing JTAG
boot, this device disables most communication peripherals, including
serial and ethernet devices. This appears to be fixed in later
generation devices, but we are stuck with it for now. Semihosting
provides an easy way to run a few console commands.
The patches in this series are organized as follows:
0-4: rST conversions and other documentation updates
5-9: Semihosting cleanups
10-14: Filesystem support (including SPL boot device)
15-16: Serial support
16: Documentation update
17: JTAG boot support for LS1046A
19-25: Semihosting fallback
26-29: DM puts support
The last two groups of patches are "bonus;" the first 17 patches stand
on their own. The last two groups could be broken out as separate
series, but I have kept them in this one to help with my sanity (and not
have to deal with too many outstanding series).
Patch 14 depends on [1] to apply cleanly. Patch 17 depends on [2] for
correctness. This series should be applied to u-boot/next (in
particular, the EROFS series must have been applied).
[1]
https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
[2]
https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/
Some serial drivers can be vastly more efficient when printing multiple
characters at once. Non-DM serial has had a puts option for these sorts
of drivers; implement it for DM serial as well.
Because we have to add carriage returns, we can't just pass the whole
string directly to the serial driver. Instead, we print up to the
newline, then print a carriage return, and then continue on. This is
less efficient, but it is better than printing each character
individually. It also avoids having to allocate memory just to add a few
characters.
Drivers may perform short writes (such as filling a FIFO) and return the
number of characters written in len. We loop over them in the same way
that _serial_putc loops over putc.
This results in around sizeof(void *) growth for all boards with
DM_SERIAL. The full implementation takes around 140 bytes.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
If semihosting is disabled, then the user has no debugger attached, and
will not see any messages. Don't create a serial device in this
instance, to (hopefully) fall back on another working serial device.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)
We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.
A future enhancement could try to determine semihosting capability by
inspecting the processor state. There's an example of this at [1] for
RISC-V. The equivalent for ARM would inspect the monitor modei
enable/select bits of the DSCR. However, as the article notes, an
exception handler is still helpful in order to catch disconnected
debuggers.
[1] https://tomverbeure.github.io/2021/12/30/Semihosting-on-RISCV.html#avoiding-hangs-when-a-debugger-is-not-connected
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.
Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.
This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This imports some defines for esr and spsr from Linux v5.16. I have
modified the includes and fixed some indentation nits but otherwise it
is the same. There are a lot more defines than we need, but it doesn't
hurt.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).
These steps require LS1046A support in OpenOCD, which was added in [1].
[1] 5b70c1f679/
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
This documents how to use semihosting, the new semihosting features, and
how to migrate from smhload.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a serial driver which uses semihosting calls to read and write
to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled,
we will instantiate a serial driver. This allows users to enable this
driver (which has no physical device) without modifying their device
trees or board files. We also implement a non-DM driver for SPL, or for
much faster output in U-Boot proper.
There are three ways to print to the console:
Method Baud
================== =====
smh_putc in a loop 170
smh_puts 1600
smh_write with :tt 20000
================== =====
These speeds were measured using a 175 character message with a J-Link
adapter. For reference, U-Boot typically prints around 2700 characters
during boot on this board. There are two major factors affecting the
speed of these functions. First, each breakpoint incurs a delay. Second,
each debugger memory transaction incurs a delay. smh_putc has a
breakpoint and memory transaction for every character. smh_puts has one
breakpoint, but still has to use a transaction for every character. This
is because we don't know the length up front, so OpenOCD has to check if
each character is nul. smh_write has only one breakpoint and one memory
transfer.
DM serial drivers can only implement a putc interface, so we are stuck
with the slowest API. Non-DM drivers can implement puts, which is vastly
more efficient. When the driver starts up, we try to open :tt. Since
this is an extension, this may fail. If it does, we fall back to
smh_puts. We don't check :semihosting-features, since there are
nonconforming implementations (OpenOCD) which don't implement it (but
*do* implement :tt).
Some semihosting implementations (QEMU) don't handle READC properly. To
work around this, we try to use open/read (much like for stdin) if
possible.
There is no non-blocking I/O available, so we don't implement pending.
This will cause __serial_tstc to always return true. If
CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read
characters forever. To avoid this, we depend on this config being
disabled.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a filesystem which is backed by the host's filesystem. It is
modeled off of sandboxfs, which has very similar aims. Semihosting
doesn't support listing directories (except with SYS_SYSTEM), so neither
do we. it's possible to optimize a bit for the common case of reading a
whole file by omitting a call to smh_seek, but this is left as a future
optimization.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.
To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.
I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:
- Implementing DDR initialization through JTAG (typically with dozens of
lines of TCL) and then loading U-Boot. The DDR initialization
typically uses hard-coded register writes, and is not easily adapted
to different boards. BOOT_DEVICE_SMH allows booting with SPL,
leveraging U-Boot's existing DDR initialization code. This is the
method used by NXP's CodeWarrior IDE on Layerscape processors (see
AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
then loading U-Boot. This is tricky, because the debugger must stop the
boot after the bootloader has completed its work. Trying to load
U-Boot too early can cause failure to boot. This is the method used by
Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
image to load U-Boot at the appropriate place. This can be a bit
tricky, because the load address is dependent on the header size. An
elf with symbols must also be used in order to stop at the appropriate
point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
where SPL automatically stops and tells the host where to place the
image.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
In order to add filesystem support, we will need to be able to seek and
write files. Add the appropriate helper functions.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
There's no point in using string constants for smh_open if we are just
going to have to parse them. Instead, use numeric modes. The user needs
to be a bit careful with these, since they are much closer semantically
to string modes used by fopen(3) than the numeric modes used with
open(2).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This exports semihosting functions for use in other files. The header is
in include/ and not arm/include/asm because I anticipate that RISC-V may
want to add their own implementation at some point.
smh_len_fd has been renamed to smh_flen to more closely match the
semihosting spec.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
These files are spread all over the tree, so just use a regex. Orphaned
for now, since this is more of a "one-off" series. Though I'll be happy
to review patches.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds some instructions for enabling the debug uart, including the
correct address and clock rate.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This adds some additional info about booting from different sources,
including the correct switch positions.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This converts the readme for this board to rST. I have tried not to
change any semantics from the original (though I did convert MB to M).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This converts the semihosting readme to rST. I have tried to make only
cosmetic changes, but I did fix up the first link (which was broken).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
support in the EL1/0 translation regime, which makes that part mostly
compatible to ARMv8-A.
Add a new board variant to describe the "BASE-R64" FVP model, which
inherits a lot from the existing v8-A FVP support. One major difference
is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
2GB [1].
* Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
exising configuration.
* Implement inverted memory map in vexpress_aemv8.h
* Create vexpress_aemv8r defconfig
* Provide an MMU memory map for the BASER_FVP
* Update vexpress64 documentation
At the moment the boot-wrapper is the only supported secure firmware. As
there is no official DT for the board yet, we rely on it being supplied
by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
a dummy DT for now.
[1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[Andre: rebase and add Linux kernel header]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[trini: Add MAINTAINERS entry for Peter]
So far the DRAM size for both the Juno and the FVP model were hardcoded
in our config header file. For the Juno this is fine, as all models have
8 GiB of DRAM, but the DRAM size can be configured on the model command
line.
Drop the fixed DRAM size setup, instead look up the size in the device
tree, that we now have for every board. This allows a user to inject
a DT with the proper size, and be able to use the full amount of DRAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In preparation for the ARMv8-R64 FVP support, which has DRAM mapped at
0x0, generalise the page table generation, by using symbolic names for
the address ranges instead of fixed numbers.
We already define the base of the DRAM and MMIO regions, so just use
those symbols in the page table description. Rename V2M_BASE to the more
speaking V2M_DRAM_BASE on the way.
On the VExpress memory map, the address space right after 4GB is of no
particular interest to software, as the whole of DRAM is mapped at 32GB
instead. The first 2 GB alias to the lower 2GB of DRAM mapped below 4GB,
so we skip this part and map some more of the high DRAM, should anyone
need it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Right now the defconfig the Arm VExpress64 boards disables quite some
standard commands, for apparently no good reasons (as image size is
hardly a concern here).
Remove the lines explicitly disabling those features, leaving it to
the U-Boot default settings to set them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far the FVP model just supports booting through semihosting, so by
loading files from the host the model is running on. This allows for
quick booting of new kernels (or replacing DTBs), but prevents more
featureful boots like using UEFI.
Enable the distro_boot feature, and provide a list of possible boot
sources that U-Boot should check:
- For backwards compatibility we start with semihosting, which gets its
commands migrated from CONFIG_BOOTCOMMAND into the distro_boot
infrastructure. This is also slightly tweaked to fail graceful in case
the required files could not be found.
- Next we try to use a user provided script, that could be easily
placed into memory using the model command line.
- Since we gained virtio support with the enablement of OF_CONTROL,
let's check virtio block devices next. This is where UEFI boot can
be easily used, for instance by providing a distro installer .iso
file through virtio-blk.
- Networking is now provided by virtio as well, so enable the default
PXE and DHCP boot flows, mostly because we can.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The defconfigs for the Arm Juno board and the FVP model are quite large,
setting a lot of platform-fixed variables like SYS_TEXT_BASE.
As those values are not really a user choice, let's provide default
values for them in our Kconfig file, so a lot of cruft can be removed
from the defconfig files.
This also moves the driver selection out of there, since this is again
not something a user should really decide on. Instead we allow users to
enable or disable subsystems, and select the appropriate drivers based
on that in the Kconfig file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The definition of the standard environment variables (kernel_addr_r and
friends) has been improved lately for the FVP model, but the Juno board
is still using some custom scheme.
Since we need to extend this to a third board soon, let's unify the
definition:
- Define the Juno addresses in the same generic way we do for the FVP
model, and move the actual variable setting out of the board #ifdef's.
- Add the missing addresses for a PXE file and a boot script.
- Cleanup some stale comments on the way.
As the FVP model doesn't have support for distro_boot quite yet, add
a dummy definition for now, to be replaced with the real thing later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The FVP base model is relying on a DT for Linux operation, so there is
no reason we would need to rely on hardcoded information for U-Boot.
Letting U-Boot use a DT will open up the usage of actual peripherals,
beyond the support for semihosting only.
Enable OF_CONTROL in the Kconfig, and use the latest dts files from
Linux. Depending on whether we use the boot-wrapper or TF-A, there is
already a DTB provided or not, respectively.
To cover the boot-wrapper, we add an arm64 Linux kernel header, which
allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will
find the pointer to the DTB in x0, and will use it.
Even though TF-A carries a DT, at the moment this is not made available
to non-secure world, so to not break users, we use the U-Boot provided
DTB copy in that case. For some reason TF-A puts some DT like structure
at the address x0 is pointing at, but that is very small and doesn't
carry any hardware information. Make the code to ignore those small DTBs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Arm Fixed Virtual Platform (FVP) is a software model for an
artificial ARM platform, it is available for free on the Arm website[1].
Add the devicetree files for the latest RevC version, as we will need
them to enable OF_CONTROL for the vexpress_aemv8a_semi board.
This is a verbatim copy of the respective files from Linux v5.17-rc6,
which is unchanged from the v5.16 release.
[1] https://developer.arm.com/tools-and-software/simulation-models/fast-models
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
At the moment we define three "VExpress64" boards in arch/arm/Kconfig,
plus have a second Kconfig file in board/armltd/Kconfig.
One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A),
that stanza looks like being forgotten in a previous cleanup.
To remove the clutter from the generic Kconfig file, just define some
ARCH_VEXPRESS64 symbol there, enable some common options, and do the
board/model specific configuration in the board/armltd Kconfig file.
That allows to streamline and fine tune the configuration later, and
to also pull a lot of "non user choices" out of the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This converts the following to Kconfig:
CONFIG_SYS_MONITOR_BASE
Note that for how this is re-used on some PowePC platforms, we introduce
CONFIG_SPL_SYS_MONITOR_BASE and CONFIG_TPL_SYS_MONITOR_BASE and use the
CONFIG_VAL macro to get the correct value at build time, in the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_NORFLASH_PS32BIT
Note that we also attempt to correct the behavior of the code here,
which had been testing for "NORFLASH_PS32BIT" which would never be set,
instead check for the now set "CONFIG_NORFLASH_PS32BIT", which results
in some behavior change.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The values CONFIG_SYS_USE_NANDFLASH and CONFIG_SYS_USE_MMC serve the
same purpose as CONFIG_SD_BOOT / CONFIG_NAND_BOOT so migrate to using
these switches instead as they're already in Kconfig.
Cc: Stelian Pop <stelian@popies.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of M5373EVB we always had NANDFLASH_SIZE=16, so just use it
directly. In the case of M5329EVB we had not removed the rest of NAND
support when saying we didn't have NAND, so instead use that to key off
of rather than NANDFLASH_SIZE.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The value CONFIG_DB_784MP_GP is only used in the DDR code to refer to
CONFIG_TARGET_DB_MV784MP_GP so just use that second value directly.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
There are a handful of variants around CONFIG_SYS_USE_DATAFLASH and none
of them now control anything further within their board config.h files,
so remove these from CONFIG_SYS_EXTRA_OPTIONS and then remove the empty
blocks in the board config.h files. In a few places further clean up
related logic.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_LPUART
CONFIG_LPUART_32B_REG
And note that CONFIG_LPUART_32B_REG is unused in code.
Signed-off-by: Tom Rini <trini@konsulko.com>
This CONFIG option is used in one place, so pick a more direct name and
migrate to Kconfig. Rework the code slightly.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
This converts the following to Kconfig:
CONFIG_EMMC_BOOT
CONFIG_MAC_ADDR_IN_SPIFLASH
CONFIG_NAND_BOOT
CONFIG_SPL_FSL_PBL
CONFIG_SYS_FSL_DDR4
In this case we re-sync options that had been set in
CONFIG_SYS_EXTRA_OPTIONS but should not have been as they have proper
entries.
Signed-off-by: Tom Rini <trini@konsulko.com>
This was only setting values not referenced in the code so remove it.
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform is the only one to set these options, so define them in
the board Kconfig file.
Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_MCFRTC
CONFIG_SYS_MCFRTC_BASE
While at it, remove '#undef RTC_DEBUG' from these config files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Both of these variables are used in a few hard-coded ways to set some
string values or print something to the user. In almost all cases, it's
just as useful to hard-code the value used. The exception here is
printing something closer to correct board name for p1_p2_rdb machines.
This can be done using something from the device tree, but for now
hard-code a non-CONFIG based value instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_BOOTM_NETBSD
CONFIG_BOOTM_RTEMS
CONFIG_DESIGNWARE_WATCHDOG
CONFIG_DISPLAY_CPUINFO
CONFIG_DM_ETH
CONFIG_DM_MMC
CONFIG_DM_REGULATOR
CONFIG_DM_SPI
CONFIG_DM_SPI_FLASH
CONFIG_ISO_PARTITION
CONFIG_OF_SEPARATE
CONFIG_SPI_FLASH_WINBOND
CONFIG_SPL_ETH
CONFIG_TIMER
CONFIG_USB_DWC3
CONFIG_USB_DWC3_GADGET
CONFIG_USB_DWC3_OMAP
CONFIG_USB_DWC3_PHY_OMAP
CONFIG_USB_EHCI_TEGRA
CONFIG_USB_GADGET_DOWNLOAD
CONFIG_USB_GADGET_DUALSPEED
CONFIG_USB_GADGET_MANUFACTURER
CONFIG_USB_GADGET_PRODUCT_NUM
CONFIG_USB_GADGET_VBUS_DRAW
CONFIG_USB_GADGET_VENDOR_NUM
This catches a number of cases where board config files were #undef
various CONFIG options when building SPL, and that doesn't work. Clean
up the related comments as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point DM and OF_CONTROL are used to configure how the USB ports
are enabled, with the exception of in SPL and no SPL_OF_CONTROL. Remove
a bunch of now unused logic to simplify the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
colibri-imx6ull ethernet device is fec2, while the optional secondary
ethernet is fec1, update the ethernet aliases in the .dts file so that
ethaddr is set to fec2 and eth1addr to fec1.
Without this change the ethernet interfaces have a different
mac address between Linux and U-Boot.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
This will allow using the TCB timer instead of the PIT one when running
under OP-TEE.
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
In order to use the TCB early in boot and in the SPL, add
u-boot,dm-pre-reloc property for the TCB and the clock that is used by
the driver (tcb0_clk).
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
When using interrupts property, a global interrupt controller needs to
be added to avoid warnings when compiling device-tree:
arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
/ahb/apb/timer@f800c000: Missing interrupt-parent
Add AIC node as the sama5d2 global interrupt controller.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 & 2 are configured to
be chained together which allows to have a 64bits counter.
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Align the DT for sama7g5 SoC and sama7g5 EK board with Linux devicetree
in version 5.18.
Some things remain still different, due to some things yet unimplemented in
certain drivers. These include in PMC, pinctrl, and others.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Set blue led on at boot time in order to highlight that u-boot is loaded.
This is done for all sama5d2 based boards which contain an RGB led.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
sama7g5 and other SoCs (sama5d3, sam9x60) define in the Reset Controller
a RSTC_CR.EXTRST bit that asserts the nrst_out pin which resets external
devices.
This is particular useful for external devices that are configured in
stateful modes which can not be undone without reconfiguring the device
or without resetting the device. An example is an SPI NOR flash that is
configured in octal mode. The do_reset u-boot cmd does not call any
driver's remove method, but merely resets the CPU. As the code was, this
left the flash in octal mode, being impossible for the first stage boot
loaders to recover/identify the flash after a "software reset".
RSTC_CR.EXTRST comes in handy here, as it can be set at "software reset"
to assert low the nrst_out pin during a time defined by the RSTC_MR.ERSTL
field and reset the external devices (including the SPI NOR flash in the
example).
nrst_out is always asserted at "user reset" and it resets the external
devices correctly. Asserting nrst_out at "software reset" should behave
in a similar way. The only difference that I could find between the two
types of resets in regards to the nrst_out signal, is that at "user reset"
timing diagram the "Processor and Peripherals Reset Line" rises after six
MD_SLCK cycles after the nrst_out line rose, while at the "software reset"
timing diagram the "Processor and Peripherals Reset Line" is active for
3 MD_SLCK cycles + 2 MCK cycles. In other words, in the "software reset"
case the nrst_out signal can be active for a longer period of time than the
"Processor and Peripherals Reset Line" active time, depending on the
RSTC_MR.ERSTL value.
Using the default value (zero) for RSTC_MR.ERSTL, worked just fine for the
sama7g5 case. Tested QSPI0 and GMAC0/GMAC1 on sama7g5ek rev 4 after a
software reset with RSTC_CR.EXTRST=1 and RSTC_MR.ERSTL=0.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Convert AT91RESET_EXTRST to Kconfig for easier integration. The symbol is
not configurable from menuconfig, it will be automatically selected by SoCs
that select it explicitly via the "select" directive.
AT91RESET_EXTRST sets the Reset Controller's RSTC_CR.EXTRST bit which
asserts the nrst_out pin that resets external devices.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
sama5d2 contains in its ROM memory BCH code tables for NAND Flash ECC
correction. Enable the use of the GF tables defined in ROM. This should
speed up the boot process, as the tables are no longer constructed at
runtime. Tested with sama5d2-ptc-ek.
Reported-by: David Mosberger-Tang <davidm@egauge.net>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Pull request for efi-2022-04-rc6
Documentation:
* Move VxWorks and Plan 9 to HTML documentation
* Move all command man-pages to a separate directory
Test:
* Fix pylint errors
UEFI
* Fix build flags for initrddump.efi
QEMU
* Remove unused function to get RNG device
If include/generated/environment.h exists (perhaps leftover from a build
of another board) it is used, even if the board currently being built does
not have a text environment.
This causes a build error. Fix it by emptying the file if it should not be
there.
Fixes: https://source.denx.de/u-boot/u-boot/-/issues/9
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
To quote the author:
This series adds a stage pre-load before launching an image. This stage
is used to read a header before the image and this header contains the
signature of the full image. So u-boot may check the full image before
using any data of the image.
The support of this header is added to binman, and a command verify
checks the signature of a blob and set the u-boot env variable
"loadaddr_verified" to the beginning of the "real" image.
The support of this header is only added to binman, but it may also be
added to mkimage.
Add a subcommand preload to bootm that execute the preload
stage on the image. Right now, it checks the signature
of the image with the pre-load header. If the check
succeed, the u-boot env variable 'loadaddr_verified'
is set to the address of the image (without the header).
It allows to run such commands:
tftp script.img && bootm preload $loadaddr && source $loadaddr_verified
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Enable the support of stage pre-load in bootm.
For the moment, this stage allow to verify the
signature of the full image with a header.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Set the variable pre-load-key-path with the shell variable
PRE_LOAD_KEY_PATH that contain the keys path (used for signature).
This variable pre-load-key-path is provided to binman.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit enhances mkimage to update the node
/image/pre-load/sig with the public key.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add the support of image pre load in spl or tpl
when loading an image from ram.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a stage pre-load to the command bootm.
Right now, this stage may be used to read a
header and check the signature of the full
image.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a stage pre-load that could
check or modify an image.
For the moment, only a header with a signature is
supported. This header has the following format:
- magic : 4 bytes
- version : 4 bytes
- header size : 4 bytes
- image size : 4 bytes
- offset image signature : 4 bytes
- flags : 4 bytes
- reserved0 : 4 bytes
- reserved1 : 4 bytes
- sha256 of the image signature : 32 bytes
- signature of the first 64 bytes : n bytes
- image signature : n bytes
- padding : up to header size
The stage uses a node /image/pre-load/sig to
get some informations:
- algo-name (mandatory) : name of the algo used to sign
- padding-name : name of padding used to sign
- signature-size : size of the signature (in the header)
- mandatory : set to yes if this sig is mandatory
- public-key (madatory) : value of the public key
Before running the image, the stage pre-load checks
the signature provided in the header.
This is an initial support, later we could add the
support of:
- ciphering
- uncompressing
- ...
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit adds the options:
- SPL_ASYMMETRIC_KEY_TYPE
- SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE
- SPL_RSA_PUBLIC_KEY_PARSER
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
To be able to use the tool binman on sandbox,
the config SANDBOX should imply BINMAN.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
It seems a copy'n'paste typo when tool had been introduced.
It has never had the 'exit' suffix in the file name. Hence,
the custom CFLAGS never been applied and, for example, BFD
linker complains:
LD lib/efi_loader/initrddump_efi.so
ld.bfd: lib/efi_loader/initrddump.o: warning: relocation in read-only section `.text.efi_main'
ld.bfd: warning: creating DT_TEXTREL in a shared object
Remove wrong 'exit' suffix from the custom CFLAGS variable.
Fixes: 65ab48d69d ("efi_selftest: provide initrddump test tool")
Fixes: 9c045a49a9 ("efi_loader: move dtbdump.c, initrddump.c to lib/efi_loader")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Use f'' strings instead of .format().
* Correct sequence of imports.
* Remove a superfluous import.
* Add missing documentation.
* Replace yield by return.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This converts the existing README.plan9 to reST, and puts it under
the doc/usage/os directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present the doc only mentions Arm, PowerPC and x86. RISC-V support
has been added since VxWorks SR0650 support for a while, and U-Boot
supports loading a RISC-V VxWorks kernel too. Let's document it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This converts the existing README.vxworks to reST, and puts it under
the doc/usage/os directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently all shell command docs are put in the doc/usage root.
Let's group them into cmd/ sub-directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide human readable descriptions of the speed nodes instead of the name
of constants from the code as it is already done for 'mmc rescan'
command in commit 212f078496 ("doc: mmc rescan speed mode").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The QEMU platform has a function defined to get the random number
generator(RNG) device. However, the RNG device can be obtained simply
by searching for a device belonging to the RNG uclass. Remove the
superfluous platform function defined for the QEMU platform for
getting the RNG device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fixes for 2 gateworks platforms, Edison platform, incorrectly showing
2 logos on LCD screens, not cleaning a generated environment file and
correct the CONFIG_SYS_IMMR Kconfig migration on a number of MPC85xx
platforms.
The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
When migrating SYS_IMMR, I didn't allow for boards to provide
non-default values here. This lead to an incorrect migration on the
platforms where CONFIG_SYS_IMMR is set to CONFIG_SYS_CCSRBAR and
CONFIG_SYS_CSSRBAR is NOT the same as CONFIG_SYS_CCSRBAR_DEFAULT. Add
text to the prompt so that non-default values can be used and re-migrate
the platforms that have CONFIG_SYS_IMMR=CONFIG_SYS_CSSRBAR where
CONFIG_SYS_CSSRBAR != CONFIG_SYS_CCSRBAR_DEFAULT.
Fixes: be7dbb60c5 ("Convert CONFIG_SYS_IMMR to Kconfig")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pali Rohár <pali@kernel.org>
'make sifive_unamtched_defconfig; make clean; make' fails if file
include/generated/env.in exists. 'make clean' should remove all files that
stop building.
Add file include/generated/env.in to the clean target.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Currently, on imx6sabresd and gwventana boards, the company logo
and U-Boot logo are shown.
The correct behavior is to show only the company logo, if available,
and not both logos.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
commit 7c84319af9c7 ("dm: gpio: Correct use of -ENODEV in drivers")
changed the return code for an I2C NAK from -ENODEV to -EREMOTEIO.
Update the gsc_i2c_read and gsc_i2c_write functions for this change
to properly retry the transaction on a NAK meaning the GSC is busy.
Fixes: 7c84319af9 ("dm: gpio: Correct use of -ENODEV in drivers")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Clock patches for u-boot/next
This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.
I had to fix up the last commit since I missed an include for at91.
CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
Most callers of this function do not check the return value, and it is
unclear what action they should take if it fails. If a function is freeing
multiple clocks, it should not stop just because the first one failed.
Since the callbacks can no longer fail, just convert the return type to
void.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-8-seanga2@gmail.com
When freeing a clock there is not much we can do if there is an error, and
most callers do not actually check the return value. Even e.g. checking to
make sure that clk->id is valid should have been done in request() in the
first place (unless someone is messing with the driver behind our back).
Just return void and don't bother returning an error.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20220115222504.617013-2-seanga2@gmail.com
TTC has three modes of operations. Timer, PWM and input counters.
There is already driver for timer under CADENCE_TTC_TIMER which is used for
ZynqMP R5 configuration.
This driver is targeting PWM which is for example configuration which can
be used for fan control.
The driver has been tested on Xilinx Kria SOM platform where fan is
connected to one PL pin. When TTC output is connected via EMIO to PL pin
TTC pwm can be configured and tested for example like this:
pwm config 0 0 10000 1200
pwm enable 0 0
pwm config 0 0 10000 1400
pwm config 0 0 10000 1600
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com
Serial IP has output buffer which status is indicated by two bits. If fifo
if empty or full. Default configuration is that chars are pushed to fifo
till it is full. Time to time it is visible that chars are scambled and
logs are not visible. Not sure what it is exactly happening but all the
time it helps to change driver behavior to write only one char at a time.
That's why enable this mode when debug uart is enabled not to see scrambled
chars in debug by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/332b2106d7a8190dd1001b5387f8bd1fba2e061b.1648205405.git.michal.simek@xilinx.com
This is not defined by any board. Even sandbox doesn't actually use
it since it has migrated to DM_VIDEO.
Drop this option. Remove the dead code also, for completeness, even
though the whole lcd.c file will be dropped soon.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This converts the following to Kconfig:
CONFIG_VIDEO_BCM2835
This is the final ad-hoc CONFIG_VIDEO_... to convert.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Enable ONFI detection to fix NAND chip configuration. Without this
the NAND oobsize will be wrong which leads to invalid ECC strength and
incompatibility with the previous configuration.
Fixes: 777f333c37 ("imx: ventana: enable dm for MTD and NAND")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This does not use driver model and is more than two years past the
migration date. Drop it.
It can be added back later if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not use driver model and is more than two years past the
migration date. Drop it.
It can be added back later if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop the Kconfigs which are not used and all references to them. In
particular, this drops CONFIG_VIDEO to avoid confusion and allow us to
eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO.
Also drop the prototype for video_get_info_str() which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Unfortunately this driver uses the old video structure to store things.
This is not supported with driver model.
Drop the old code and comment out the other pieces, so the maintainer can
take a look.
Signed-off-by: Simon Glass <sjg@chromium.org>
The non-driver model video support was removed two years ago. Drop this
driver, which is only used by nokia_rx51.
Signed-off-by: Simon Glass <sjg@chromium.org>
Previous u-boot code changed the default bch setting behavior and caused
backward compatible issue. This fix choose the legacy bch geometry back
again as the default option. If the minimum ecc strength that NAND chips
required need to be chosen, it can be enabled by either adding DT flag
"fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The
unused flag "fsl,legacy-bch-geometry" get removed.
Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry)
Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND)
Tested-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
The code was mistakenly initializing the input buffer twice.
Tested to be working on BeagleBone by adjusting CONFIG_SYS_BOOTM_LEN to
64MiB (probably works with less) and preparing uImage with:
cat arch/arm/boot/Image \
| zstd --ultra -22 --zstd=windowLog=22 \
> linux.bin.zst
mkimage -A arm -T kernel uImage -C zstd -d linux.bin.zst \
-a 0x80008000 -e 0x80008000
Without the windowLog restriction, bootm fails with a zstd decompression
error 7 (window too large), which I haven't troubleshooted.
There should be a bit more documentation on the feature...
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixes: 458b30af66 image: Update image_decomp() to avoid ifdefs
make sandbox_defconfig
make mrproper
make tests
fails with
../drivers/video/u_boot_logo.S: Assembler messages:
../drivers/video/u_boot_logo.S:5: Error: file not found: drivers/video/u_boot_logo.bmp
We have to delete the generated file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The current approach for setting the environment variables that
describe the memory layout runs the risk of overlapping with
reserved memory regions. Use the lmb code to derive the addresses
for these variables instead.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The firmware on larger NVMe drives needs more than 100ms to come up.
Change the timeout to 1s.
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a unit test for
* efidebug boot add
* efidebug boot order
* bootefi bootmgr
* initrd via EFI_LOAD_FILE2_PROTOCOL
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Up to now the initrddump.efi application has drained the input after
showing the prompt. This works for humans but leads to problems when
automating testing. If the input is drained, this should be done before
showing the prompt.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
initrddump.efi uses colored output and clear the screen. This is not
helpful for integration into Python tests. Allow specifying 'nocolor' in
the load option data to suppress color output and clearing the screen.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Commit f11513d997 ("net: phy: realtek: Add tx/rx delay config for
8211e") made the Realtek PHY driver honour the phy-mode DT property,
to set up the proper delay scheme for the RX and TX lines. A similar
change in the kernel revealed that those properties were mostly wrong.
The kernel DTs got updated over the last few months, but we were missing
out on the U-Boot version.
Just sync in the phy-mode properties from the mainline kernel,
v5.17-rc7, to avoid the breaking DT sync that late in the cycle.
This fixes Ethernet operation on the affected boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Commit 5bc4cd05d7 ("sunxi: move non-essential code out of s_init()")
moved the call to eth_init_board() from s_init() into board_init_f().
This means it's now only called from the SPL, which makes sense for
most of the other moved low-level functions. However the GMAC pinmux and
clock setup in eth_init_board() was not happy about that, so it broke
the sun7i GMAC.
Since Ethernet is of no use in the SPL anyway, just move the call into
board_init(), which is only run in U-Boot proper.
This fixes Ethernet operation for the A20 SoCs, which broke in
v2022.04-rc1, with the above mentioned commit.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Petr Štetiar <ynezz@true.cz> [a20-olinuxino-lime2]
Use the MEMA - MEMD registers on the PFUZE100 as bootcount
registers.
Based on work from Heiko Schocher <hs@denx.de>.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Add missing MEMA - MEMD register definitions for PFUZE100.
Based on work from Heiko Schocher <hs@denx.de>.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-function device "pwm-tach controller".
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Macros PCI_CLASS_CODE_* and PCI_CLASS_SUB_CODE_* are unused and are
duplication of PCI_CLASS_* macros defined in pci_ids.h header file.
So remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace old macros PCI_CLASS_CODE_COMM and PCI_CLASS_SUB_CODE_COMM_SERIAL
by new macros defined in pci_ids.h. Old macros would be deleted in followup
commit.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add following two new PCI class codes defines into pci_ids.h include file:
PCI_CLASS_BRIDGE_PCI_NORMAL
PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
And use these defines in all U-Boot code for describing PCI class codes for
normal and subtractive PCI bridges.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This adds support for using -Og when building U-Boot. According to the
gcc man page:
> -Og should be the optimization level of choice for the standard
> edit-compile-debug cycle, offering a reasonable level of optimization
> while maintaining fast compilation and a good debugging experience.
This optimization level is roughly -O1 minus a few additional
optimizations. It provides a noticably better debugging experience, with
many fewer variables <optimized out>.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a separate CONFIG_CC_OPTIMIZE_FOR_SPEED option in a choice,
in preparation for adding another optimization option. Also convert SH's
makefile to use this new option.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For consistency in runs, we need to always use the same pylint version.
Pin to 2.12.2 as this is what we have been using so far.
Signed-off-by: Tom Rini <trini@konsulko.com>
This is a legacy driver and the value is set in board config headers
without a CONFIG prefix. Remove the code.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_LCD_INFO
CONFIG_LCD_LOGO
CONFIG_LCD_INFO_BELOW_LOGO
CONFIG_LCD_IN_PSRAM
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
CONFIG_GURNARD_SPLASH
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit 0934dddc64 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke SPI support on some Espressobin boards and results in
following U-Boot error:
Loading Environment from SPIFlash... jedec_spi_nor flash@0: unrecognized JEDEC id bytes: f7, 30, 0b
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
Before that commit DT node for SPI was called 'spi-flash@0' and after
that commit it is called 'flash@0'. Before that commit 'spi-max-frequency'
was set to 50000000 and after it is 104000000.
Rename DT node 'spi-flash@0 in armada-3720-espressobin-u-boot.dtsi to
'flash@0' and set custom U-Boot 'spi-max-frequency' back to 50000000.
With this change SPI is working on Espressobin again and it is detected
with JEDEC ids ef, 60, 16 on our tested unit.
Loading Environment from SPIFlash... SF: Detected w25q32dw with page size 256 Bytes, erase size 4 KiB, total 4 MiB
OK
Note that it is unknown why spi-max-frequency with value 104000000 does not
work in U-Boot as it works fine with Linux kernel. Also note that in
defconfig file configs/mvebu_espressobin-88f3720_defconfig is set option
CONFIG_SF_DEFAULT_SPEED=40000000 which is different value than in DT.
Fixes: 0934dddc64 ("arm: a37xx: Update DTS files to version from upstream Linux kernel")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
i2c changes for fixes-for-2022.04
- atsha204a-i2c.c
DTS and I2C fixes for Atmel ATSHA204 from Adrian
- i2c: fix always-true condition in i2c_probe_chip()
from Nikita
- eeprom: Do not rewrite EEPROM I2C bus with DM I2C enabled
from Marek
- clarify bootcount documentation fix from Michael
Commit 0934dddc64 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke USB port on Turris MOX, because in Linux' DTS the bus
voltage supply is described as a `phy-supply` property of connector
node, a mechanism that is not supported in U-Boot yet.
For now, fix this by adding `vbus-supply` to usb3 node.
Fixes: 0934dddc64 ("arm: a37xx: Update DTS files to version from upstream Linux kernel")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
With DM I2C, the EEPROM bus has been correctly configured in
eeprom_execute_command() already. Do not reconfigure it here
with hard-coded bus number again.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This patch replaces use fdtdec_get_addr with simpler dev_read_addr().
fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although
not confirmed, it could be related to the fact, that quoting the documentation,
"This variant hard-codes the number of cells used to represent the address and
size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)".
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Once request is sent, and before receiving a response, the delay is required.
This patch fixes missing delay for before first response try.
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Pull request for efi-2022-04-rc5
Documentation:
* Fix documentation of FIP creation for Amlogic boards
* Update Nokia RX-51 QEMU documentation
* Add Raspberry Pi documentation
UEFI:
* Fix booting via short form device paths
* Support short form device paths in 'efidebug boot add'
* Fix ESP detection for capsule updates
* Allow ACPI table usage even if device-tree exists - ignore DT
* OP-TEE based GetVariable(): return attributes when buffer too small
The tools dtbdump.efi and initrddump.efi are useful for Python testing even
if CONFIG_EFI_SELFTEST=n.
Don't clear the screen as it is incompatible with Python testing.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The block IO protocol may be installed on any handle. We should make
no assumption about the structure the handle points to.
efi_disk_is_system_part() makes an illegal widening cast from a handle
to a struct efi_disk_obj. Remove the function.
Fixes: Fixes: 41fd506842 ("efi_loader: disk: add efi_disk_is_system_part()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The GUID of partitions is sufficient for identification and will stay
constant in the lifetime of a boot option. The preceding path of the
device-path may change due to changes in the enumeration of devices.
Therefore it is preferable to use the short-form of device-paths in load
options. Adjust the 'efidebug boot add' command accordingly.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The boot manager must support loading from boot options using a short-form
device-path, e.g. one where the first element is a hard drive media path.
See '3.1.2 Load Options Processing' in UEFI specification version 2.9.
Fixes: 0e074d1239 ("efi_loader: carve out efi_load_image_from_file()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Let function efi_dp_find_obj() additionally check if a given protocol is
installed on the handle relating to the device-path.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
efi_dp_find_obj() should not return any handle with a partially matching
device path but the handle with the maximum matching device path.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Starting UEFI Spec 2.8 we must fill in the variable attributes when
GetVariable() returns EFI_BUFFER_TOO_SMALL and Attributes is non-NULL.
This code was written with 2.7 in mind so let's move the code around a
bit and fill in the attributes EFI_BUFFER_TOO_SMALL is returned
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
For targets that enable ACPI, we should not pass Device Trees into
the payload. However, our distro boot logic always passes the builtin
DT as an argument.
To make it easy to use ACPI with distro boot, let's just ignore the DT
argument to bootefi when ACPI is enabled. That way, we can successfully
distro boot payloads on ACPI enabled targets.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
It add documentation on licencing & provides links to the amlogic-boot-fip
pre-built files collections.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Fix documentation path in deprecated warning message about device
driver.
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fix documentation path in warning message about deprecated device driver.
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Some boards need to load an ELF file using the 'loadables' property, but
the file has segments at different memory addresses. This means that it
cannot be supplied as a flat binary.
Allow generating a separate node in the FIT for each segment in the ELF,
with a different load address for each.
Also add checks that the fit,xxx directives are valid.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The current implementation sets up the FIT entries but then deletes the
'generator' ones so they don't appear in the final image.
This is a bit clumsy. We cannot build the image more than once, since the
generator entries are lost during the first build. Binman requires that
calling BuildSectionData() multiple times returns a valid result each
time.
Keep a separate, private list which includes the generator nodes and use
that where needed, to correct this problem. Ensure that the missing list
includes removed generator entries too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
It doesn't make sense to use 'subnode' as a function parameter since it
is just a 'node' so far as the function is concerned. Update two functions
to use 'node' instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Add a new function to handling reporting errors within a particular
subnode of the FIT description. This can be used to make the format of
these errors consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Some warnings have crept in, so fix those that are easy to fix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present the entries are read twice, once by the entry_Section class
and once by the FIT implementation. This is harmless but can be confusing
when debugging. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Unfortunately mkimage gets upset with zero-sized files. Update the
ObtainContents() method to support specifying the size, if a fake blob is
created.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
On x86 devices having even a small amount of data can cause an overlap
between regions. For example, bayleybay complains when the intel-vga
region overlaps with u-boot-ucode:
ImagePos Offset Size Name
<none> 00000000 00800000 main-section
<none> ff800000 00000080 intel-descriptor
<none> ff800400 00000080 intel-me
<none> fff00000 00098f24 u-boot-with-ucode-ptr
<none> fff98f24 00001aa0 u-boot-dtb-with-ucode
<none> fff9a9d0 0002a000 u-boot-ucode
<none> fffb0000 00000080 intel-vga
...
It is safer to use an empty file in most cases. Add an option to set the
size for those uses that need it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present fake blobs are created but internally an empty blob is used.
Change it to use the contents of the faked file. Also return whether the
blob was faked, in case the caller needs to know that.
Add a TODO to put fake blobs in their own directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This shadows the patman.tools library so rename it to avoid a pylint
warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present the fit implementation creates the output tree while
scanning the FIT description. Then it updates the tree later when the
data is known.
This works, but is a bit confusing, since it requires mixing the scanning
code with the generation code, with a fix-up step at the end.
It is actually possible to do this in two phases, one to scan everything
and the other to generate the FIT. Thus the FIT is generated in one pass,
when everything is known.
Update the code accordingly. The only functional change is that the 'data'
property for each node are now last instead of first, which is really a
more natural position. Update the affected test to deal with this.
One wrinkle is that the calculated properties (image-pos, size and offset)
are now added before the FIT is generated. so we must filter these out
when copying properties from the binman description to the FIT.
Most of the change here is splitting out some of the code from the
ReadEntries() implementation into _BuildInput(). So despite the large
diff, most of the code is the same. It is not feasible to split this patch
up, so far as I can tell.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Leave the 'expand' term for use by entry types which have an expanded
version of themselves. Rename this method to indicate that it generates
subentries.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The word 'expand' is used for entries which generate subentries. It is
also used for entries that can have an '_expanded' version which is used
to break out its contents.
Rather than talking about expanding an entry's size, use the term
'extending'. It is slightly more precise and avoids the above conflicts.
This change renders the old 'expand-size' property invalid, so add an
error check for that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Update the return value of this function, fix the 'create' typo and
update the documentation for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Rename this function to make it clear that it only reads loadable
segments. Also update the error for missing module to better match the
message emitted by Python.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This is not necessary if simpler code is used. Use the split function and
drop the unnecessary []
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
At present it is not possible to have arguments which include spaces.
Update the function to only split the args if the property is a single
string. This is a bit inconsistent, but might still be useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
It is good practice to init all variables in the constructor and pylint
sometimes checks this. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
There is seldom a need to refresh at 100Hz and it uses a lot of CPU.
Reduce the rate to 10Hz which seems to be adequate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some files cannot be written but read-only access is still useful for
tests. Add a fallback to read-only access when needed.
This is useful in CI when opening a large data file provided by docker,
where read/write access would result in copying the file, thus needing
a lot of extra disk space.
Signed-off-by: Simon Glass <sjg@chromium.org>
If state is not being written, but RAM is, we should still show a message,
so it is clear that this is happening.
Signed-off-by: Simon Glass <sjg@chromium.org>
This allows to prefill fdt and config nodes with hash and signature
subnodes. It's just important to place the child nodes last so that
hashes do not come before the data - would be disliked by mkimage.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds build-sandbox in sys.path to look for libfdt,
otherwise py_test can't use binman.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is good practice to init all variables in the constructor and pylint
sometimes checks this. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
This variable is used once and is noted as board-specific. Use the
value directly with a comment.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91SAM9G10EK
CONFIG_AT91SAM9261EK
CONFIG_AT91SAM9G10
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91SAM9G20EK
CONFIG_AT91SAM9260EK
CONFIG_AT91SAM9G20EK_2MMC
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AT91SAM9260
CONFIG_AT91SAM9G20
CONFIG_AT91SAM9XE
CONFIG_AT91SAM9261
CONFIG_AT91SAM9263
CONFIG_AT91SAM9G45
CONFIG_AT91SAM9M10G45
CONFIG_AT91SAM9N12
CONFIG_AT91SAM9RL
CONFIG_AT91SAM9X5
CONFIG_SAM9X60
CONFIG_SAMA7G5
CONFIG_SAMA5D2
CONFIG_SAMA5D3
CONFIG_SAMA5D4
These options are already select'd as needed, so we're just cleaning up
files here.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AM335X_USB0
CONFIG_AM335X_USB0_MODE
CONFIG_AM335X_USB1
CONFIG_AM335X_USB1_MODE
We do this by introducing specific options for static configuration of
USB0/USB1 in SPL rather than defining CONFIG_AM335X_USBx_MODE to the
enum value being used. Furthermore, with how the code is used now we do
not need to have OTG mode exposed as an option here, so remove that.
Signed-off-by: Tom Rini <trini@konsulko.com>
With all boards now using DM_ETH we determine the value for
CONFIG_FEC_XCV_TYPE at run time, except in the case of the default
fall-back. Set the fallback directly now.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ETHPRIME
This is also done by adding a gating Kconfig option, CONFIG_USE_ETHPRIME
similar to other options that are not always set and control environment
variables.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts removes the following symbols:
CONFIG_HAS_ETH0
CONFIG_HAS_ETH1
CONFIG_HAS_ETH2
CONFIG_HAS_ETH3
This is because at this point, only the ids8313 platform was using the
code which was controlled by these symbols. In turn, this code already
performs error checking on being able to perform the device tree fixup.
Rather than convert these to Kconfig for a single platform, update the
code to not need these checks and remove them from all the platforms
they were unused on.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_BOOT_RETRY_TIME
CONFIG_BOOT_RETRY_MIN
CONFIG_RESET_TO_RETRY
We also introduce CONFIG_BOOT_RETRY to gate these options, and clean up
the associated Makefile entry and C code for picking default values of
CONFIG_BOOT_RETRY_MIN.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ARMV7_SECURE_BASE
CONFIG_ARMV7_SECURE_MAX_SIZE
CONFIG_ARMV7_SECURE_RESERVE_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
As the CI test for stopping platforms from being merged that were
defining symbols that had Kconfig entries, a small number of symbols
needed to be migrated again. Do so, and catch two cases the README
should also have been updated but was not.
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit re-introduced a migrated CONFIG symbol to the board header
file. These changes should likely be handled via documentation instead,
as well.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We cannot define a CONFIG value here to ensure that the Kconfig value
isn't set wrong.
Fixes: 2c699fe0d3 ("configs: sunxi: Add common SUNIV header")
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
When calling comm to compare the CONFIG symbols a defconfig uses with
the symbols that have been migrated, we need to suppress all output as
the summary line will have everything we need. Failure to do this leads
to the test blowing up, but in non-fatal ways.
Signed-off-by: Tom Rini <trini@konsulko.com>
A comma at the end of a line gives sometimes strange
effects in combination with some code formatters,
so replace a comma by a semicolon in the sdram_rk3188.c
and sdram_rk3288.c files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
U-Boot can be chainloaded from vendor firmware on ARM64 chromebooks from
a GPT partition (roughly the same as in doc/chromium/chainload.rst), but
an appropriate image header must be built-in to the U-Boot binary by
enabling LINUX_KERNEL_IMAGE_HEADER.
This header has a field for an image load offset from 2MiB alignment
which must also be customized through LNX_KRNL_IMG_TEXT_OFFSET_BASE.
Set it equal to SYS_TEXT_BASE by default for Rockchip boards, which
happens to make this offset zero and works fine on chromebook_kevin
both for chainloading and bare-metal use.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove double semi-colon that has been forgotten while adding the
driver. This is only a style fix since it doesn't change the
functionality of the driver.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is very useful to access the LibreComputer eMMC as removable
storage from a PC (e.g. like so `ums 0 mmc 0`). It has been tested as
working on my Renegade board.
Signed-off-by: Leonidas P. Papadakos <papadakospan at gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The current files and directories with wildcard patterns for
Rockchip patches in MAINTAINERS is not always complete.
Add the regex for DT related files and a generic regex for
catching some other forgotten cases, so that the maintainers
receive all Rockchip related patches.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add support for Kevin, an RK3399-based convertible chromebook that is
very similar to Bob. This patch is mostly based on existing support for
Bob, with only minor changes for Kevin-specific things.
Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV,
so adjust it here in the dts as well. The rk3399-gru-kevin devicetree
has an unknown event code reference which has to be defined, set it
to the Linux counterpart. The new defconfig is copied from Bob with the
diffconfig:
DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin"
DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb"
VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400
VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600
+TARGET_CHROMEBOOK_KEVIN y
With this Kevin can boot from SPI flash to a usable U-Boot prompt on the
display with the keyboard working, but cannot boot into Linux for
unknown reasons.
eMMC starts in a working state but fails to re-init, microSD card works
but at a lower-than-expected speed, USB works but causes a hang on
de-init. There are known workarounds to solve eMMC and USB issues.
Cc: Marty E. Plummer <hanetzer@startmail.com>
Cc: Simon Glass <sjg@chromium.org>
[Alper: commit message, resync config with Bob, update MAINTAINERS,
add to Rockchip doc, add Kconfig help message, set regulator]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This patch enables some configs that should be working on the Bob board,
based on what is observed to work on the Kevin board.
The Bob board uses an Embedded DisplayPort panel compatible with the
simple panel and Rockchip eDP drivers. Its backlight is controlled by
the Chromium OS Embedded Controller Pulse Width Modulator. Enable these
for the board.
Also set VIDEO_ROCKCHIP_MAX_{XRES,YRES} to 1280x800, the resolution of
its panel. This had to be done for the Kevin board, but it's untested if
this is actually necessary for Bob.
The Rockchip video driver needs to assert/deassert some resets, so also
enable the reset controller. RESET_ROCKCHIP defaults to y for this board
when DM_RESET=y, so it's enough to set that.
The Bob board has two USB 3.0 Type-C ports and one USB 2.0 Type-A port
on its right side. Enable the configs relevant to USB devices so these
can be used. This is despite a known issue with RK3399 boards where USB
de-init causes a hang, as there is a known workaround.
Some other rk3399-based devices enable support for the SoC's random
number generator in commit a475bef534 ("configs: rk3399: enable rng on
firefly/rock960/rockpro64"), as it can provide a KASLR seed when booting
using UEFI. Enable it for Bob as well.
The default misc_init_r() for Rockchip boards sets cpuid and ethernet
MAC address based on e-fuse block. A previous patch extends this on Gru
boards to set registers related to SoC IO domains as is necessary on
these boards. Enable this function and configs for it on Bob.
The microSD card slot on this board (and others based on Gru) is
connected to a GPIO controlled regulator (ppvar-sd-card-io), which must
be operable by U-Boot. Enable the relevant config option to allow this.
Bob boards also use the Winbond W25Q64DW SPI flash chip, enable support
for Winbond SPI flash chips in the board config so U-Boot can boot with
this chip.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This adds some devicetree settings for the Gru-based boards, based on
what works on a Kevin board.
Gru-based boards usually have an 8MiB SPI flash chip and boot from it.
Make the u-boot.rom file intended to be flashed on it match its size.
Add properties for booting from SPI, and only try to boot from SPI as
MMC and SD card don't seem to work in SPL yet.
The Chromium OS EC needs a delay between transactions so it can get
itself ready. Also it currently uses a non-standard way of specifying
the interrupt. Add these so that the EC works reliably.
The Rockchip Embedded DisplayPort driver is looking for a rockchip,panel
property to find the panel it should work on. Add the property for the
Gru-based boards.
The U-Boot GPIO controlled regulator driver only considers the
"enable-gpios" devicetree property, not the singular "enable-gpio" one.
Some devicetree source files have the singular form as they were added
to Linux kernel when it used that form, and imported to U-Boot as is.
Fix one instance of this in the Gru boards' devicetree to the form that
works in U-Boot.
The PWM controlled regulator driver complains that there is no init
voltage set for a regulator it drives, though it's not clear which one.
Set them all to the voltage levels coreboot sets them: 900 mV.
The RK3399 SoC needs to know the voltage level that some supplies
provides, including one fixed 1.8V audio-related regulator. Although
this synchronization is currently statically done in the board init
functions, a not-so-hypothetical driver that does this dynamically would
query the regulator only to get -ENODATA and be confused. Make sure
U-Boot knows this supply is at 1.8V by setting its limits to that.
Most of this is a reapplication of commit 08c85b57a5 ("rockchip: gru:
Add extra device-tree settings") whose changes were removed during a
sync with Linux at commit 167efc2c7a ("arm64: dts: rk3399: Sync
v5.7-rc1 from Linux"). Apply things to rk3399-gru-u-boot.dtsi instead so
they don't get lost again.
Signed-off-by: Simon Glass <sjg@chromium.org>
[Alper: move to -u-boot.dtsi, rewrite commit message, add more nodes]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The RK3399 SoC needs to know the voltage value provided by some
regulators, which is done by setting relevant register bits. Configure
these the way other RK3399 boards do, but with the same values as are
set in the equivalent code in coreboot.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Xilinx changes for v2022.07-rc1
microblaze:
- Add support for reserved memory
xilinx:
- Update FRU code with MAC reading
zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0
zynq:
- Update nand binding
nand:
- Aligned zynq_nand to upstream DT binding
net:
- Add support for ethernet-phy-id
mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs
gpio:
- Add driver for slg7xl45106
firmware:
- Add support for dynamic SD config
power-domain:
- Update zynqmp driver with the latest firmware
video:
- Add skeleton driver for DP and DPDMA
i2c:
- Fix i2c to work with QEMU
pinctrl:
- Add driver for zynqmp pinctrl driver
On RK3568, a register bit must be set to enable Enhanced Strobe.
However, it appears that the address of this register may differ from
vendor to vendor and should be read from the underlying MMC IP. Let the
Rockchip SDHCI driver read this address and set the relevant bit when
Enhanced Strobe configuration is requested.
The IP uses a custom mode select value (0x7) for HS400, use that instead
of the common but non-standard SDHCI_CTRL_HS400 value (0x5). Also add
some necessary DLL_STRBIN and DLL_TXCLK configuration for HS400.
Additionally, a bit signifying that the connected hardware is an eMMC
chip must be set to enable Data Strobe for HS400 and HS400ES modes. Also
make the driver set this bit as appropriate.
This is partly ported from Linux's Synopsys DWC MSHC driver which
happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in
Linux tree).
Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On RK3399, a register bit must be set to enable Enhanced Strobe.
Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration
is requested. However, having it set makes the lower-speed modes stop
working and makes reinitialization fail, so let it be unset as needed in
set_control_reg().
This is mostly ported from Linux's Arasan SDHCI driver which happens
to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux
tree).
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Generic SDHCI driver received support for checking the busy status by
polling the DAT[0] level instead of waiting for the worst MMC switch time.
Unfortunately, it appears that this does not work for Xenon controllers
despite being a part of the standard SDHCI registers and the Armada 3720
datasheet itself telling that BIT(20) is useful for detecting the DAT[0]
busy signal.
I have tried increasing the timeout value, but I have newer managed to
catch DAT_LEVEL bits change from 0 at all.
This issue appears to hit most if not all SoC-s supported by Xenon driver,
at least A3720, A8040 and CN9130 have non working eMMC currently.
So, until a better solution is found drop the wait_dat0 OP for Xenon.
I was able to only test it on A3720, but it should work for others as well.
Fixes: 40e6f52454 ("drivers: mmc: Add wait_dat0 support for sdhci driver")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Stefan Roese <sr@denx.de>
e-MMC and SD standards differ for some CID fields:
- 6 Byte Name - assigned by Manufacturer (SD 5 Byte)
- 1 Byte OEM - assigned by Jedec (SD 2 Byte)
See e-MMC standard (JEDEC Standard No. 84-B51), 7.2.3 (OID) and 7.2.4 (PNM)
Signed-off-by: Max Merchel <Max.Merchel@tq-group.com>
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
After commit f132aab403 ("Revert "mmc: fsl_esdhc_imx: use
VENDORSPEC_FRC_SDCLK_ON to control card clock output""), it
involve issue in mmc_switch_voltage(), because of the special
design of usdhc.
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN,
these are reserved bits(Though RM contain the definition of these bits,
but actually internal IC logic do not implement, already confirm with
IC team). Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card
clock output. Here is the definition of this bit in RM:
[8] FRC_SDCLK_ON
Force CLK output active
Do not set this bit to 1 unless it is necessary. Also, make sure that
this bit is cleared when uSDHC’s clock is about to be changed (frequency
change, clock source change, or delay chain tuning).
0b - CLK active or inactive is fully controlled by the hardware.
1b - Force CLK active
In default, the FRC_SDCLK_ON is 0. This means, when there is no command
or data transfer on bus, hardware will gate off the card clock. But in
some case, we need the card clock keep on. Take IO voltage 1.8v switch
as example, after IO voltage change to 1.8v, spec require gate off the
card clock for 5ms, and gate on the clock back, once detect the card
clock on, then the card will draw the dat0 to high immediately. If there
is not clock gate off/on behavior, some card will keep the dat0 to low
level. This is the reason we fail in mmc_switch_voltage().
To fix this issue, and concern that this is only the fsl usdhc hardware
design limitation, set the bit FRC_SDCLK_ON in the beginning of the
wait_dat0() and clear it in the end. To make sure the 1.8v IO voltage
switch process align with SD specification.
For standard tuning process, usdhc specification also require the card
clock keep on, so also add these behavior in fsl_esdhc_execute_tuning().
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Commit 0934dddc64 ("arm: a37xx: Update DTS files to version from
upstream Linux kernel") ported Linux's device-tree files for Armada 3720
SOCs. This broke network on Turris MOX, because the SOC's MDIO bus in
U-Boot currently isn't probed via DM as it's own device, but is
registered as part of mvneta's driver, which means that pinctrl
definitions are not parsed for the MDIO bus node. Also mvneta driver
does not consider "phy-handle" property, only "phy".
For now, fix this by adding armada-3720-turris-mox-u-boot.dtsi file
returning the MDIO to how it was defined previously.
A better solution (using proper mvmdio DM driver) is being work on, but
will need testing on various boards, and we need the bug fixed now for
the upcoming release.
Fixes: 0934dddc64 ("arm: a37xx: Update DTS files to version from upstream Linux kernel")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Update the LZ4 compression module based on LZ4 v1.8.3 in order to
use the newest LZ4_decompress_safe_partial() which can now decode
exactly the nb of bytes requested.
Signed-off-by: Huang Jianan <jnhuang95@gmail.com>
mtd: add NAND write protect support to stm32_fmc2_nand
stm32mp1 bsec: Add permanent lock write support
stm32mp1 bsec: Add dev in function description
cmd_stboard: Update test on misc_read() result
video: fix the check of return value of clk_set_rate in stm32_ltdc
DT: Alignment with kernel v5.17 for stm32mp15
DT: Add USB OTG pinctrl and regulator in SPL for DHCOR
DT: Move vdd_io extras into Avenger96 extras
DT: Add DFU support for DHCOM recovery
ram: stm32mp1: Unconditionally enable ASR
psci: Implement PSCI system suspend and DRAM SSR for stm32mp
The designware spi driver unconditionally uses polling.
The comment to spi_hw_init() also states that the function should disable
interrupts.
According to the DesignWare DW_apb_ssi Databook, value 0xff in IMR enables
all interrupts. Since we want to mask all interrupts write 0x0 instead.
On the canaan k210 board, pressing the reset button twice to reset the
board will run u-boot. If u-boot boots Linux without having SPI interrupts
masked, Linux will hang as soon as interrupts are enabled, because of an
interrupt storm.
Properly masking the SPI interrupts in u-boot allows us to successfully
boot Linux, even after resetting the board.
Fixes: 5bef6fd79f ("spi: Add designware master SPI DM driver used on SoCFPGA")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
[Niklas: rewrite commit message]
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is documented
to have a 32 word deep TX and RX FIFO, which spi_hw_init() detects.
However, when the RX FIFO is filled up to 32 entries (RXFLR = 32), an
RX FIFO overrun error occurs. Avoid this problem by force setting
fifo_len to 31.
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Linux kernel fpioa pinctrl driver expects the sysctl phandle and the
power bit offset of the fpioa device to be specified as a single
property "canaan,k210-sysctl-power".
Replace the "canaan,k210-sysctl" and "canaan,k210-power-offset"
properties with "canaan,k210-sysctl-power" to satisfy the Linux kernel
requirements. This new property is parsed using the existing function
dev_read_phandle_with_args().
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Linux drivers for many of the K210 peripherals depend on the power bus
clock to be specified. Add the missing clocks and their names to avoid
problems when booting Linux using u-boot DT.
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch configures U-Boot SPL for DHCOM SoM to permit DFU upload of
SPL and subsequent u-boot.itb for recovery or commissioning purposes.
The DFU usage procedure is identical to STM32MP1 DHCOR SoM, see commit
3919aa1722 ("ARM: dts: stm32: Add DFU support for DHCOR recovery") ,
except for switching the SoM into DFU mode. By default, the DHCOM SoM
has no dedicated mechanism for setting BOOTn straps into UART/USB mode,
therefore to enter DFU mode, the SoC must fail to boot from boot media
which can be selected by the BOOTn strap override mechanism first and
then fall back to DFU mode.
In case of a SoM with pre-populated BOOTn strap override button, power
the system off, remove microSD card (if applicable), hold down the BOOTn
strap override button located between eMMC and SoM edge connector, power
on the SoM. The SoC will fail to boot from SD card and fall back into
DFU mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Fix the following warning in SPL and make sure that even DTs which
enforce Vbus detection using u-boot,force-vbus-detection;, the DFU
in SPL will work.
dwc2-udc-otg usb-otg@49000000: prop pinctrl-0 index 0 invalid phandle
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Device tree alignment with Linux kernel v5.17-rc1
- ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins
on STM32MP15 DKx boards
- ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15
- ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx
- ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1
- ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The clk_set_rate() function returns rate as an 'ulong' not
an 'int' and rate > 0 by default.
This patch avoids to display the associated warning when
the set rate function returns the new frequency.
Fixes: aeaf330649 ("video: stm32: stm32_ltdc: add bridge to display controller")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update management of misc_read/misc_write, which now returns length of
data after the commit 8729b1ae2c ("misc: Update read() and write()
methods to return bytes xfered"): raise a error when the result is not
the expected length.
Fixes: 658fde8a36 ("board: stm32mp1: stboard: lock the OTP after programming")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of the permanent lock support in U-Boot proper
when BSEC is not managed by secure monitor (TF-A SP_MIN or OP-TEE).
This patch avoid issue with stm32key command and fuse command
on basic boot for this missing feature of U-Boot BSEC driver.
Reported-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch adds the support of the WP# signal. WP will be disabled
before the first access to the NAND flash.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This saves about 12 kBytes image size and helps to stay within the
size limit.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Soeren Moch <smoch@web.de>
Commit 90f262a695 ("vexpress64: Clean up BASE_FVP boot configuration")
cleaned up the usage of default address variables, but missed to update
the address for the kernel in the FVP's bootcmd definition.
Change ${kernel_addr} to read ${kernel_addr_r} to bring back the
automated boot for the fastmodel.
Also use "setenv" instead of the potentially ambiguous "set" on the way.
Fixes: 90f262a695 ("vexpress64: Clean up BASE_FVP boot configuration")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Initialization and power on operations of links have been moved under the
link device in the Sierra SerDes driver. Also, the UCLASS of
sierra_phy_provider has been changed to UCLASS_MISC.
Therefore, fix the probing of SerDes0 instance accordingly.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
In commit 6f46c7441a ("phy: cadence: Sierra: Add a UCLASS_PHY device for
links"), a separate udevice of type UCLASS_PHY was created for each link.
Therefore, move the corresponding link operations under the link device.
Also, change the uclass of sierra phy to UCLASS_MISC as it is no longer the
phy device.
Fixes: 6f46c7441a ("phy: cadence: Sierra: Add a UCLASS_PHY device for links")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its
clock speed to some higher speeds. This is dependent on the desired
SDHCI clock speed, and it looks like the PHY should be powered off while
setting the SDHCI clock in these cases.
Commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock config for
rk3399") attempts to do this in the set_ios_post() hook by setting the
SDHCI clock once more while the PHY is turned off/on as necessary, as
the SDHCI framework does not provide a way to override how it sets its
clock. However, the commit breaks reinitializing the eMMC on a few
boards including chromebook_kevin and reportedly ROCKPro64.
This patch reworks the power cycling to utilize the SDHCI framework
slightly better (using the set_control_reg() hook to power off the PHY
and set_ios_post() hook to power it back on) which happens to fix the
issue, at least on a chromebook_kevin.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After double checking some i2c addresses are not correct. It is visible
from i2c dump
ZynqMP> i2c bus
Bus 3: i2c@ff020000
74: i2c-mux@74, offset len 1, flags 0
Bus 5: i2c@ff020000->i2c-mux@74->i2c@0
Bus 6: i2c@ff020000->i2c-mux@74->i2c@2
Bus 7: i2c@ff020000->i2c-mux@74->i2c@1
Bus 8: i2c@ff020000->i2c-mux@74->i2c@3
Bus 4: i2c@ff030000 (active 4)
74: i2c-mux@74, offset len 1, flags 0
Bus 9: i2c@ff030000->i2c-mux@74->i2c@0
Bus 10: i2c@ff030000->i2c-mux@74->i2c@3
Bus 11: i2c@ff030000->i2c-mux@74->i2c@4
Bus 12: i2c@ff030000->i2c-mux@74->i2c@5 (active 12)
51: generic_51, offset len 1, flags 0
60: generic_60, offset len 1, flags 0
74: generic_74, offset len 1, flags 0
Bus 13: i2c@ff030000->i2c-mux@74->i2c@6 (active 13)
51: generic_51, offset len 1, flags 0
5d: generic_5d, offset len 1, flags 0
74: generic_74, offset len 1, flags 0
ZynqMP> i2c dev 4
Setting bus to 4
ZynqMP> i2c mw 74 0 18
ZynqMP> i2c probe
Valid chip addresses: 18 36 37 50 51 60 74
ZynqMP> i2c mw 74 0 20
ZynqMP> i2c probe
Valid chip addresses: 51 60 74
where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is
also at address 0x60 based on log above.
i2c address 0x74 is i2c mux and 0x51 is eeprom.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0a198e9d993411e41473d130d5a5c20b6dc83458.1646639616.git.michal.simek@xilinx.com
Remap PCI I/O space to the bus address 0x0 in the Armada 37xx device-tree
in order to support legacy I/O port based cards which have hardcoded I/O
ports in low address space.
Some legacy PCI I/O based cards do not support 32-bit I/O addressing.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 9e6d71d2b5 ("tools: kwboot: Allow to use -b without image path as
the last getopt() option") broke usage of kwboot with following arguments:
kwboot -t -B 115200 /dev/ttyUSB0 -b u-boot-spl.kwb
Fix parsing of option -b with optional argument again.
Fixes: 9e6d71d2b5 ("tools: kwboot: Allow to use -b without image path as the last getopt() option")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi at gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Call kwboot_open_tty() which baudrate value which was specified at the
command line by option -B. This function returns error if baudrate is not
supported by selected tty device.
Initial baudrate for image transfer is always 115200, so call
kwboot_tty_change_baudrate() with value 115200 immediately after
kwboot_open_tty() if baudrate specified by option -B is different than
115200.
This makes kwboot fail immediately, informing that baudrate is unsupported,
instead of failing only after the first part of image is already sent.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Custom baudrate different than 115200 may be specified only when kwboot is
not going to send boot/debug message pattern or when it is going to send
boot message pattern with image file (in which case baudrate change happens
after sending kwbimage header). BootROM detects boot/debug message pattern
only at baudrate 115200.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
dev_read_size() returns -EINVAL (-22) if the property "g-tx-fifo-size"
does not exist. If that's the case, we now keep the default value of 0.
Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
This enum is currently anonymous. Add a name so it can be used in the
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pull request for efi-2022-04-rc3-2
Documentation:
* Fix description for SiFive Unmatched
* Add libgnutls28-dev to build dependencies
UEFI
* Avoid possibly invalid GUID pointers for protocol interfaces
Other
* Serial console support for cls command
InstallProtocolInterface() is called with a pointer to the protocol GUID.
There is not guarantee that the memory used by the caller for the protocol
GUID stays allocated. To play it safe the GUID should be copied to U-Boot's
internal structures.
Reported-by: Joerie de Gram <j.de.gram@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently the cls command does not support the serial console
The screen can be cleared in the video uclass, the colored frame buffer
console, and the serial console by sending the same escape sequence.
This reduces the cls command to a single printf() statement on most
boards.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds platform code and the device tree for the Phytium Pomelo Board.
The initial support comprises the UART and the PCIE.
Signed-off-by: weichangzheng <nicholas_zheng@outlook.com>
get_osc_clk_speed and get_sys_clkin_sel are only used in
one file. Make them static.
Tested on OMAP3530, DM3730, AM3517.
Signed-off-by: Adam Ford <aford173@gmail.com>
With updated device trees now supporting pinmuxing for USB,
ethernet, MMC, and other peripherals necessary to start MLO
and U-Boot, the hard-coded pinmux options can be removed since
they are now handed by DM and only muxed when the respective
peripheral needs it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Sync the am3517-evm device tree files with those from Linux
5.17-rc5 with some additional fixes for pinmuxing Ethernet and
moving the pinmux references to the respective peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
With recent fixes to USB pinmuxing in the device trees, there
is no need to hard-code the pinmuxing in this table. It is
all handled in DM now.
Signed-off-by: Adam Ford <aford173@gmail.com>
Resync the DTS files for the Logic PD SOM-LV with Linux 5.17-rc5
with some additional pending changes to address issues with
wrong pin-muxing on the OMAP35.
Signed-off-by: Adam Ford <aford173@gmail.com>
The ethernet controller is DM compliant, and the device tree
defines it. There is no need to manually handle pulling
the ethernet out of reset.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
QSGMII PHY present on the j721e common processor board requires
to be initialized before the core boots up. Therefore, run the
corresponding command during boot to do the same.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add the command "boot_rprocs" that is required for booting remote
processors in U-Boot.
Fixes: 5980925e2a ("include: configs: j721e_evm: Add support to boot ethfw core in j721e")
Reported-by: Jesse Villarreal <jesse.villarreal@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
QSGMII PHY initialization should only be done for J721E EVMs and not for
J721E-SK boards. Therefore, fix the environment variables accordingly.
Also, by default remote processors should not be booted in U-Boot but
rather be left to the users to enable this by setting dorprocboot.
Therefore, remove dorprocboot that is being set by default.
Fixes: 5980925e2a ("include: configs: j721e_evm: Add support to boot ethfw core in j721e")
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Ensure the ASPEED related options are grouped together under the RAM
option when enabling support.
This also makes some minor grammar corrections and renames options so
they present cleanly in menuconfig.
There should be no functional change to the configuration or binary.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Dylan Hung <dylan_hung@aspeedtech.com>
Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.
Based on commit [1][2].
[1] a40d3cc845
[2] 2448e42d73
Signed-off-by: Romain Naour <romain.naour@gmail.com>
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.
Based on commit: 57dbf754e3
Signed-off-by: Romain Naour <romain.naour@gmail.com>
The PMIC enables power to the MMC card by default, but depending
on the state it was left when restarted, it's possible the MMC
may be powered down.
This patch patch explicitly tells the twl4030 to power the MMC.
Based on commits [1][2].
[1] 64fd2d2614
[2] 27b6534491
Signed-off-by: Romain Naour <romain.naour@gmail.com>
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.
Based on omap3_logic: 42140dd096.
Signed-off-by: Romain Naour <romain.naour@gmail.com>
To quote the author:
It is a common need in U-Boot to have one subsystem notify another
when something happens. An example is reading a partition table when a
new block device is set up.
It is also common to add weak functions and 'hook' functions to modify
how U-Boot works. See for example ft_board_setup() and the like.
U-Boot would benefit from a generic mechanism to handle these cases,
with the ability to hook into various 'events' in a
subsystem-independent and transparent way.
This series provides a way to create and dispatch events, with a way of
registering a 'spy' which watches for events of different types. This
allows 'hook' functions to be created in a generic way.
It also includes a script to list the hooks in an image, which is a bit
easier to debug than weak functions, as well as an 'event' command to
do the same from within U-Boot.
These 'static' events can be used to replace hooks like misc_init_f(),
for example. Also included is basic support for 'dynamic' events, where
a spy can be registered at runtime. The need for this is still being
figured out.
For debugging and dicoverability it is useful to be able to see a list of
each event spy in a U-Boot ELF file. Add a script which shows this, along
with the event type and the source location. This makes events a little
easier to use than weak functions, for example.
Add a basic sandbox test as well. We could provide a test for other
boards, but for now, few use events.
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This hook can be implmented using events, for the three boards that
actually use it.
Add the event type and event handlers. Drop CONFIG_MISC_INIT_F since we
can just use CONFIG_EVENT to control this. Since sandbox always enables
CONFIG_EVENT, we can drop the defconfig lines there too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Generate events when devices are probed or removed, allowing hooks
to be added for these situations.
This is controlled by the DM_EVENT config option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a way to create and dispatch events without needing to allocate
memory. Also add a way to 'spy' on events, thus allowing 'hooks' to be
created.
Use a linker list for static events, which we can use to replace functions
like arch_cpu_init_f(). Allow an EVENT_DEBUG option which makes it
easier to see what is going on at runtime, but uses more code space.
Dynamic events allow the creation of a spy at runtime. This is not always
necessary, but can be enabled with EVENT_DYNAMIC if needed.
A 'test' event is the only option for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow finding a symbol by its address. Also export the function to get
the file offset of a particular address, so it can be used by a script to
be added.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some sunxi boards ship with SPI flash, which allows booting through the
BootROM. We cover this functionality by a separate SPL "mini" driver.
Separately we have a proper DM_SPI driver for U-Boot proper, which
provides access to the SPI flash through the "sf" command. That allows
to update the firmware on the SPI flash, also to store the environment
there.
However only very few boards actually enable support for U-Boot proper,
even though that would work and the SPL part is configured.
Use the cleaned up configuration scheme to enable SPI flash on those
boards which mention a SPI flash in their .dts, or which use the SPL SPI
support.
Out of the box this would enable storing the environment on the SPI
flash, and allows people to read or write the flash from U-Boot, for
instance to update the SPI flash when booted via an SD card.
For this to actually work there must be a "spi0" alias in the DT, which
most boards are missing. But this should be addressed separately.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Now that sunxi uses CONFIG_SPI more sanely, and can also now properly
load the environment from SPI flash, let's enable the symbol that
actually considers the SPI flash when accessing the environment.
As this symbol depends on CONFIG_SPI, which we now only enable if the
board has a SPI flash, we can make if "default y" for all Allwinner
boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Currently we only support to load the environment from raw MMC or FAT
locations on Allwinner boards. With the advent of SPI flash we probably
also want to support using the environment there, so we need to become
a bit more flexible.
Change the environment priority function to take the boot source into
account. When booted from eMMC or SD card, we use FAT or MMC, if
configured, as before.
If we are booted from SPI flash, we try to use the environment from
there, if possible. The same is true for NAND flash booting, although
this is somewhat theoretical right now (as untested).
This way we can use the same image for SD and SPI flash booting, which
allows us to simply copy a booted image from SD card to the SPI flash,
for instance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To allow loading and storing the environment from SPI flash, adjust the
raw offset variables for Allwinner boards to make sense there.
U-Boot (including SPL and other blobs) is loaded from the beginning of
SPI flash, so move the environment location as far back as possible, to
not create unnecessary limits. As those offsets are shared with (now
mostly unused) raw MMC environment, we should respect the common one
megabyte limit, which also makes sense on SPI flash.
So limit the environment for those raw locations to 64KB, and place it
just below 1MB (@960KB).
Those values are currently unused, unless someone forcibly enables the
raw MMC environment. In this case it would break as of now, as the
current offset of 544KB is far too low for the current (arm64) U-Boot
proper.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit 7945caf22c ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
selected CONFIG_SPI by default on all Allwinner A64 boards, even though
only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs
had to manually select DM_SPI and friends, even though they are a
platform property (the sunxi SPI driver is DM_SPI only).
Clean this up to allow easy selection of SPI flash support in U-Boot
proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is
selected, for *all* Allwinner SoCs. This simplifies the defconfig for
two Libretech boards already.
Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the
four boards which allow SPI booting select this explicitly.
Any board wishing to support SPI flash in U-Boot proper now just defines
CONFIG_SPI and CONFIG_SPI_FLASH_<vendor> in its defconfig, Kconfig takes
care of the rest.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Mechanically convert video_hw_init() function to UCLASS_VIDEO probe
callback and replace CONFIG_CFB_CONSOLE by CONFIG_DM_VIDEO.
As framebuffer base address is setup by the bootloader which loads U-Boot,
set plat->base to that fixed framebuffer address.
This change was tested in qemu n900 machine and is working fine.
What does not work is CONFIG_VIDEO_LOGO, seems to be buggy.
Signed-off-by: Pali Rohár <pali@kernel.org>
Ethernet phy like dp83867 is using strapping resistors to setup PHY
address. On Xilinx boards strapping is setup on wires which are connected
to SOC where internal pull ups/downs influnce phy address. That's why there
is a need to setup pins properly (via pinctrl driver for example) and then
perform phy reset. I can be workarounded by reset gpio done for mdio bus
but this is not working properly when multiply phys sitting on the same
bus. That's why it needs to be done via ethernet-phy-id driver where dt
binding has gpio reset per phy.
DT binding is available here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml
The driver is are reading the vendor and device id from valid phy node
using ofnode_read_eth_phy_id() and creating a phy device.
Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio
support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
Add support for dynamic configuration which will takes care of
configuring the SD secure space configuration registers using firmware
APIs, performing SD reset assert and deassert.
High level sequence:
- Check for the PM dynamic configuration support, if no error proceed
with SD dynamic configurations(next steps) otherwise skip the dynamic
configuration.
- Put the SD Controller in reset.
- Configure SD Fixed configurations.
- Configure the SD Slot Type.
- Configure the BASE_CLOCK.
- Configure the 8-bit support.
- Bring the SD Controller out of reset.
In the above steps, apart from the Fixed configurations, remaining all
configurations are dynamic and they will be read from devicetree.
And also remove hardcoded secure register writes, as dynamic sd config
support is added.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
Most of the frequencies are not rounded up to a proper number.
When we need to devide these frequencies to get a number for example
frequency in Mhz, we see it as one less than the actual intended value.
Ex: If we want to get Mhz from frequency 199999994hz, we will calculate
it using div64_u64(199999994, 1000000) and we will get 199Mhz in place
of 200Mhz.
Add a macro DIV64_U64_ROUND_UP for rounding up div64_u64. This is taken
from linux 'commit 68600f623d69("mm: don't miss the last page because of
round-off error")'.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f9fdcba76cd692ae436b1d7883b490e3dc207231.1645626962.git.michal.simek@xilinx.com
Since commit 5d94cbd1dc ("scripts: Makefile.lib: generate
dsdt_generated.c instead of dsdt.c"), the file generated
is named dsdt_generated.c instead of dsdt.c.
So all files .gitignore referencing dsdt.c should be
upated with dsdt_generated.c.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The stdout-path property in the device tree does not necessarily
point at a serial device. On machines such as the Apple M1 laptops
where the serial port isn't easy to access and users expect to see
console output on the integrated display stdout-path may point at
the device tree node for the framebuffer for example.
If stdout-path does not point at a node for a serial device, the
serial_check_stdout() will not find a bound device and will drop
down into code that attempts to use lists_bind_fdt() to bind a
device anyway. However, that fallback code does not check that
the uclass of the device is UCLASS_SERIAL. So if stdout-path points
at the framebuffer instead of the serial device it will return a
UCLASS_VIDEO device. Since the code that calls this function
expects the returned device to be a UCLASS_SERIAL device, U-Boot
will crash as soon as it attempts to send output to the console.
Add a check here to verify that the uclass of the bound device
really is UCLASS_SERIAL. If it isn't, serial_check_stdout() will
return an error and serial_find_console_or_panic() will use the
serial device with sequence number 0 as the console and all is fine.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When running against RC_OSC_32k, the watchdog may suffer from running
faster than expected, expiring earlier. The Linux kernel adds a 10%
margin to the timeout calculation by slowing down the read clock rate
accordingly. Do the same here, also to have comparable preset values
for both drivers.
Along this, fix the name of the local var holding to frequency - in Hz,
not kHz.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit
is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot
is unable to use or kick this watchdog.
Do not check for CNTR_CTRL_ACTIVE bit and always initialize watchdog. Same
behavior is implemented in Linux kernel driver.
This change allows to activate watchdog in firmware which loads U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Since commit 492ee6b8d0 ("watchdog: wdt-uclass.c: handle all DM
watchdogs in watchdog_reset()"), all the watchdog are started when
the config WATCHDOG_AUTOSTART.
To avoid a binary choice none/all, a property u-boot,noautostart
may be added in the watchdog node of the u-boot device tree to not
autostart this watchdog.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
I've been handling "inofficially" the watchdog related patches for a few
years now. Let's make this official and add a tree for it and also add
myself here in the MAINTAINERS file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Harald Seiler <hws@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The Aspeed GPIO driver supports the GPIO controllers found in the
AST2400, AST2500 and AST2600 BMC SoCs. The implementation is a cut-down
copy of the upstream Linux kernel driver, adapted for u-boot.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi
file to allow correct usage of MMC2 controller in U-Boot.
This IP block is a bit specific as it is connected to L3 interconnect bus,
whereas mmc[01] are connected to L4.
Proper configuration of this block (including providing clock) is handled
in ti-sysc.c driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change provides similar aliases definitions as now present in
Linux kernel v5.16.9 for am33xx.dtsi file.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
In the Linux kernel (v5.16) for this SoC there are two separate drivers
- namely sdhci-omap.c and omap_hsmmc.c which have separate set of
compatibles.
The U-Boot's drivers/mmc/omap_hsmmc.c driver supports both eMMC and
SD devices - hence the compatible for SDHCI can be added.
After this change the am335x DTS description can be easier ported
from Linux kernel.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Enable the led in the device tree of the refboard bcm96753ref.
It also defines two leds (led_red ad led_green).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add the support of the LED IP for bcm6357. This
LED IP supports blinking, fading and pulsating,
but for the moment, only blinking is supported.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This add the initial support of the broadcom reference
board bcm96753ref with a bcm6753 SoC.
This board has 1 GB of RAM, 256 MB of flash (nand),
2 USB port, 1 UART, and 4 ethernet ports.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable
access to DP. Overlay is sent when cls command is called and for that IP
has to be enabled in carrier cards.
And IP needs to be also enabled in SOM dt because with DTB reselection new
DT is not parsed in pre reloc U-Boot instance. It is called from board_f
via embedded_dtb_select(). That's why bind function is not able to allocate
memory and it ends up with error:
"Video device 'display@fd4a0000' cannot allocate frame buffer memory
-ensure the device is set up before relocation"
To avoid this situation DP is placed also to SOM where bind function is
called and frame buffer memory is allocated and just reused after DTB
reselection. Result is the same. There could be a problem in Linux with
different DP configurations but that's need to be solved there because
console should be on from u-boot already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
Since OpenSSL 1.1.0, EVP_MD_CTX_create() is EVP_MD_CTX_new()
EVP_MD_CTX_destroy() is EVP_MD_CTX_free()
EVP_MD_CTX_init() is EVP_MD_CTX_reset()
As there's no need to reset a newly created EVP_MD_CTX, moreover
EVP_DigestSignInit() does the reset, thus call to EVP_MD_CTX_init()
can be dropped.
As there's no need to reset an EVP_MD_CTX before it's destroyed,
as it will be reset by EVP_MD_CTX_free(), call to EVP_MD_CTX_reset()
is not needed and can be dropped.
Signed-off-by: Yann Droneaud <ydroneaud@opteya.com>
Based on looking at top contributors it was seen that top statistics from
top contributors don't include all contributions from different email
addresses. That's why I checked all top contributors are checked it.
git shortlog -n $START..$END -e -s
The patch is adding mapping for Bin Meng, Marek Vasut, Masahiro Yamada,
Michal Simek, Tom Rini, Wolfgang Denk.
And also use mapping for Stefan Roese and Wolfgang Denk to be properly
counted.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
If parameter -F is given but FIT support is missing, a NULL pointer might
dereferenced (Coverity CID 350249).
If incorrect parameters are given, provide a message and show usage.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Recent unrelated fixes (9876ae7db6) revealed that we were missing bits
from 2af181b53e in the IOT2050 dt. Add them, but only for main U-Boot.
SPL loads from QSPI only, thus cannot use DMA.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
is set. Same as done for am64.
This makes it possible to add a custom am65 based board design to
U-Boot that does not use this board detection mechanism.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Public documents about BootROM of some Marvell SoCs are available in the
public Web Archive. Put this information into source code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Testes proved that current kwboot version supports also Avanta SoCs.
It looks like that Avanta SoCs are using same kwbimage format as Armada.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Document -D, -b, -d, -q and -s options.
Add common examples how to use kwboot.
Add information about Armada 38x BootROM bug for debug console mode and how
to workaround it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Add all supported Armada SoCs and document -b and -d options in usage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Marvell BootROM recognize only '\b' byte as backspace. Use terminfo
for retrieving current backspace sequence and replace any occurrence of
backspace sequence by the '\b' byte.
Reading terminfo database is possible via tigetstr() function from system
library libtinfo.so.*. So link kwboot with -ltinfo.
Normally terminfo functions are in <term.h> system header file. But this
header file conflicts with U-Boot "termios_linux.h" header file. So declare
terminfo functions manually.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
-d option is currently broken. In most cases BootROM does not detect this
message pattern. For sending debug message pattern it is needed to do same
steps as for boot message pattern.
Implement sending debug message pattern via same separate thread like it is
for boot message pattern.
Checking if BootROM entered into UART debug mode is different than
detecting UART boot mode. When in boot mode, BootROM sends xmodem NAK
bytes. When in debug mode, BootROM activates console echo and reply back
every written byte (extept \r\n which is interpreted as executing command
and \b which is interpreting as removing the last sent byte).
So in kwboot, check that BootROM send back at least 4 debug message
patterns as a echo reply for debug message patterns which kwboot is sending
in the loop.
Then there is another observation, if host writes too many bytes (as
command) then BootROM command line buffer may overflow after trying to
execute such long command. To workaround this overflow, it is enough to
remove bytes from the input line buffer by sending 3 \b bytes for every
sent character. So do it.
With this change, it is possbile to enter into the UART debug mode with
kwboot -d option.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
After BootROM successfully detects boot message pattern on UART it waits
until host stop sending data on UART. For example Armada 385 BootROM
requires that host does not send anything on UART at least 24 ms. If host
is still sending something then BootROM waits (possibly infinitely).
BootROM successfully detects boot message pattern if it receives it in
small period of time after power on.
So to ensure that host put BootROM into UART boot mode, host must send
continuous stream of boot message pattern with a small gap (for A385 at
least 24 ms) after series of pattern. But this gap cannot be too often or
too long to ensure that it does not cover whole BootROM time window when it
is detecting for boot message pattern.
Therefore it is needed to do following steps in cycle without any delay:
1. send series of boot message pattern over UART
2. wait until kernel transmit all data
3. sleep small period of time
At the same time, host needs to monitor input queue, data received on the
UART and checking if it contains NAK byte by which BootROM informs that
xmodem transfer is ready.
But it is not possible to wait until kernel transmit all data on UART and
at the same time in the one process to also wait for input data. This is
limitation of POSIX tty API and also by linux kernel that it does not
provide asynchronous function for waiting until all data are transmitted.
There is only synchronous variant tcdrain().
So to correctly implement this handshake on systems with linux kernel, it
is needed to use tcdrain() in separate thread.
Implement sending of boot message pattern in one thread and reading of
reply in the main thread. Use pthread library for threads.
This change makes UART booting on Armada 385 more reliable. It is possible
to start kwboot and power on board after minute and kwboot correctly put
board into UART boot mode.
Old implementation without separate thread has an issue that it read just
one byte from UART input queue and then it send 128 message pattern to the
output queue. If some noise was on UART then kwboot was not able to read
BootROM response as its input queue was just overflowed and kwboot was
sending more data than receiving.
This change basically fixed above issue too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Function kwboot_debugmsg() is always called with kwboot_msg_debug as msg
and function kwboot_bootmsg() with kwboot_msg_debug as msg. Function
kwboot_bootmsg() is never called with NULL msg.
Simplify, cleanup and remove dead code.
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Variable msg_req_delay is set but never used. So completely remove it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Failure of kwboot_tty_send() and tcflush() functions is fatal, it does not
make sense to continue. So return error back to the caller like in other
places where are called these functions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Commit 369e532691 ("ddr: marvell: a38x: allow board specific ODT
configuration") added the odt_config member to struct
mv_ddr_topology_map ahead of the clk_enable and ck_delay members. This
means that any boards that configured either of clk_enable or ck_delay
needed to have their board topology updated. This affects the x530 and
clearfog boards. Other A38x boards don't touch any of the trailing
members of mv_ddr_topology_map so don't need updating.
Fixes: 369e532691 ("ddr: marvell: a38x: allow board specific ODT configuration")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace null pointer by pointer to device registers when calling
armada38x_rtc_write.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
The a3700_fdt_fix_pcie_regions() function still computes nonsense.
It computes the fixup offset from the PCI address taken from the first
row of the "ranges" array, which means that:
- PCI address must equal CPU address (otherwise the computed fix offset
will be wrong),
- the first row must contain the lowest address.
This is the case for the default device-tree, which is why we didn't
notice it.
It also adds the fixup offset to all PCI and CPU addresses, which is
wrong.
Instead:
1) The fixup offset must be computed from the CPU address, not PCI
address.
2) The fixup offset must be computed from the row containing the lowest
CPU address, which is not necessarily contained in the first row.
3) The PCI address - the address to which the PCIe controller remaps the
address space as seen from the point of view of the PCIe device -
must be fixed by the fix offset in the same way as the CPU address
only in the special case when the CPU adn PCI addresses are the same.
Same addresses means that remapping is disabled, and thus if we
change the CPU address, we need also to change the PCI address so
that the remapping is still disabled afterwards.
Consider an example:
The ranges entries contain:
PCI address CPU address
70000000 EA000000
E9000000 E9000000
EB000000 EB000000
By default CPU PCIe window is at: E8000000 - F0000000
Consider the case when TF-A moves it to: F2000000 - FA000000
Until now the function would take the PCI address of the first entry:
70000000, and the new base, F2000000, to compute the fix offset:
F2000000 - 70000000 = 82000000, and then add 8200000 to all addresses,
resulting in
PCI address CPU address
F2000000 6C000000
6B000000 6B000000
6D000000 6D000000
which is complete nonsense - none of the CPU addresses is in the
requested window.
Now it will take the lowest CPU address, which is in second row,
E9000000, and compute the fix offset F2000000 - E9000000 = 09000000,
and then add it to all CPU addresses and those PCI addresses which
equal to their corresponding CPU addresses, resulting in
PCI address CPU address
70000000 F3000000
F2000000 F2000000
F4000000 F4000000
where all of the CPU addresses are in the needed window.
Fixes: 4a82fca8e3 ("arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable ext4 write support in Turris Omnia's defconfig. Some users find
it useful.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c
specific macros. Define offset macros for Root Port registers and use
standard register macros from pci.h when accessing Root Port registers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused
too. Remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Sometimes kwboot after quitting terminal prints error message:
terminal: Bad address
This is caused by trying to call write() syscall with count of (size_t)-1
bytes.
When quit sequence is split into more read() calls then number of input
bytes (nin) at the end of cycle can underflow and be negative. Fix it.
Fixes: de7514046e ("tools: kwboot: Fix detection of quit esc sequence")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This option is not in use anywhere and the documentation implies it's
for some very old and unlikely to be seen currently issues. Rather than
update the code so the CONFIG symbol could be easily in Kconfig, remove
the code.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
This converts the following to Kconfig:
CONFIG_BOOTP_MAY_FAIL
CONFIG_BOOTP_VENDOREX
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_TIMEOFFSET
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove some code, primarily CPM2 related, that is now unused since the
removal of MPC8540/60ADS.
Fixes 3913191c8a ("powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADS")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
First set of u-boot-atmel fixes for the 2022.04 cycle:
This fixes set includes only a single fix for the Ethernet on sama7g5ek
board which is broken at the moment.
The F1C100s DT contains the wrong compatible string for the watchdog,
which breaks reset functionality.
Updating the DT goes via the Linux tree, but to allow reset
functionality meanwhile (useful for development!), disable SYSRESET for
now, to let the old-fashioned watchdog driver kick in and provide the
reset_cpu() implementation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit 88998f7775 ("arm: arm926ej-s: Add sunxi code") introduced
the ARM926 version of the code to save and restore some FEL state, to
be able to return to the BROM FEL code after the SPL has run.
However during review a change was made, that happened to mess up the
register restore part, so SCTLR and CPSR ended up with the wrong values,
breaking return to FEL.
Use the same offset that we actually save those registers to, to make
FEL booting actually work on the Lichee Pi Nano.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The SUNIV SoCs come with a sun6i-style SPI controller at the base address
of sun4i SPI controller. The module clock of the SPI controller is
missing which leaves us running directly from the AHB clock, which is
set to 200MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Icenowy: Original implementation]
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: adaptation to Upstream U-Boot]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In contrast to other Allwinner SoCs the F1C100s BROM does not store a
boot source indicator in the eGON header in SRAM. This leaves the SPL
guessing where we were exactly booted from, and for instance trying
the SD card first, even though we booted from SPI flash.
By inspecting the BROM code and by experimentation, Samuel found that the
top of the BROM stack contains unique pointers for each of the boot
sources, which we can use as a boot source indicator.
This patch removes the existing board_boot_order bodge and replace it
with a proper boot source indication function.
The only caveat is that this only works in the SPL, as the SPL header
gets overwritten with the exception vectors, once U-Boot proper takes
over. Always return MMC0 as the boot source, when called from U-Boot
proper, as a placeholder for now, until we find another way.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Suggested-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Updates sandbox SCMI clock driver and tests since enabling CCF will
mandate clock discovery that is all exposed SCMI clocks shall be
discovered at initialization. For this reason, sandbox SCMI clock
driver must emulate all clocks exposed by SCMI server, not only those
effectively consumed by some other U-Boot devices.
Therefore the sandbox SCMI test driver exposes 3 clocks (IDs 0, 1 and 2)
and sandbox SCMI clock consumer driver gets 2 of them.
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Changes devm_scmi_process_msg() first argument from target parent device
to current SCMI device and lookup the SCMI agent device among SCMI device
parents for find the SCMI agent operator needed for communication with
the firmware.
This change is needed in order to support CCF in clk_scmi driver unless
what CCF will fail to find the right udevice related to exposed SCMI
clocks.
This patch allows to simplify the caller sequence, using SCMI device
reference as parameter instead of knowing SCMI uclass topology. This
change also adds some protection in case devm_scmi_process_msg() API
function is called for an invalid device type.
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
As per DT bindings since Linux kernel v5.14, the device tree can define
only 1 SCMI agent node that is named scmi [1]. As a consequence, change
implementation of the SCMI driver test through sandbox architecture to
reflect that.
This change updates sandbox test DT and sandbox SCMI driver accordingly
since all these are impacted.
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Changes SCMI bindings documentation to relate to Linux kernel
source tree that recently changed the bindings description to YAML
format.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
To quote the author:
I was looking into the arm64 boot code lately and stumbled upon some
issues. Also Nishanth brought back memories of a lengthy debug session,
which was caused due to U-Boot keeping SErrors masked. As the resulting
patches are all somewhat related, I gathered this series here to address
those problems.
Patches 1 to 3 address exception handling issues, with the SError
enablement being the most prominent fix here.
Patch 4 cleans up asm/io.h. This was on the list before[1], but was
somehow lost when it was intercepted by a shorter version of itself.
Patches 5 and 6 clean up some unnecessarily complicated AArch64 assembly
code.
The branch_if_master macro jumps to a label if the CPU is the "master"
core, which we define as having all affinity levels set to 0. To check
for this condition, we need to mask off some bits from the MPIDR
register, then compare the remaining register value against zero.
The implementation of this was slighly broken (it preserved the upper
RES0 bits), overly complicated and hard to understand, especially since
it lacked comments. The same was true for the very similar
branch_if_slave macro.
Use a much shorter assembly sequence for those checks, use the same
masking for both macros (just negate the final branch), and put some
comments on them, to make it clear what the code does.
This allows to drop the second temporary register for branch_if_master,
so we adjust all call sites as well.
Also use the opportunity to remove a misleading comment: the macro
works fine on SoCs with multiple clusters. Judging by the commit
message, the original problem with the Juno SoC stems from the fact that
the master CPU *can* be configured to be from cluster 1, so the
assumption that the master CPU has all affinity values set to 0 does not
hold there. But this is already mentioned above in a comment, so remove
the extra comment.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The switch_el macro is a neat contraption to handle cases where we need
different code depending on the current exception level, but its
implementation was longer than needed.
Simplify it by doing just one comparison, then using the different
condition codes to branch to the desired target. PState.CurrentEL just
holds two bits, and since we don't care about EL0, we can use >, =, < to
select EL3, EL2 and EL1, respectively.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
asm/io.h is the header file containing the central MMIO accessor macros.
Judging by the header and the comments, it was apparently once copied
from the Linux kernel, but has deviated since then *heavily*. There is
absolutely no point in staying close to the original Linux code anymore,
so just remove the old cruft, by:
- removing pointless Linux history
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa)
This massively improves the readability of the file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In ARMv8 we have the choice between two stack pointers to use: SP_EL0 or
SP_ELx, which is banked per exception level. This choice is stored in
the SP field of PState, and can be read and set via the SPSel special
register. When the CPU takes an exception, it automatically switches to
the SP_ELx stack pointer.
Trusted Firmware enters U-Boot typically with SPSel set to 1, so we use
SP_ELx all along as our sole stack pointer, both for normal operation and
for exceptions.
But if we now for some reason enter U-Boot with SPSel cleared, we will
setup and use SP_EL0, which is fine, but leaves SP_ELx uninitialised.
When we now take an exception, we try to save the GPRs to some undefined
location, which will usually end badly.
To make sure we always have SP_ELx pointing to some memory, set SPSel
to 1 in the early boot code, to ensure safe operation at all times.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The ARMv8 architecture describes the "SError interrupt" as the fourth
kind of exception, next to synchronous exceptions, IRQs, and FIQs.
Those SErrors signal exceptional conditions from which the system might
not easily recover, and are normally generated by the interconnect as a
response to some bus error. A typical situation is access to a
non-existing memory address or device, but it might be deliberately
triggered by a device as well.
The SError interrupt replaces the Armv7 asynchronous abort.
Trusted Firmware enters U-Boot (BL33) typically with SErrors masked,
and we never enable them. However any SError condition still triggers
the SError interrupt, and this condition stays pending, it just won't be
handled. If now later on the Linux kernel unmasks the "A" bit in PState,
it will immediately take the exception, leading to a kernel crash.
This leaves many people scratching their head about the reason for
this, and leads to long debug sessions, possibly looking at the wrong
places (the kernel, but not U-Boot).
To avoid the situation, just unmask SErrors early in the ARMv8 boot
process, so that the U-Boot exception handlers reports them in a timely
manner. As SErrors are typically asynchronous, the register dump does
not need to point at the actual culprit, but it should happen very
shortly after the condition.
For those exceptions to be taken, we also need to route them to EL2,
if U-Boot is running in this exception level.
This removes the respective code snippet from the Freescale lowlevel
routine, as this is now handled in generic ARMv8 code.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The arm64 version of the exception command was just defining the
undefined exception, but actually copied the AArch32 instruction.
Replace that with an encoding that is guaranteed to be and stay
undefined. Also add instructions to trigger unaligned access faults and
a breakpoint.
This brings ARM64 on par with ARM(32) for the exception command.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
To quote the author:
This series adds a new errors-only pylint check and adds it to the CI
systems.
It also fixes the current errors in the U-Boot Python code, disabling
errors where it seems necessary.
A small patch to buildman allows it to build sandbox without any changes
to the default config file
At present the default .buildman file written by buildman does not specify
a default toolchain. Add an 'other' line so this works correctly and
sandbox builds run as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix pylint errors in all test.
This requires adding a get_spawn() method to the ConsoleBase base, so that
its subclass is happy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix two pylint errors in this file.
Note ACTION_SPL_NOT_EXIST is not defined so the dead code can be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix pylint errors that can be fixed and mask those that seem to be
incorrect.
A complication with binman is that it tries to avoid importing libfdt
(or anything that imports it) unless needed, so that things like help
still work if it is missing.
Note that two tests are duplicated in binman and two others have
duplicate names, so both of these issues are fixed also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Ensure there is a valid reset-gpio defined before using it.
Fixes: f9852acdce ("phy: nop-phy: Fix enabling reset")
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This patch scans the cmdline from the Samsung SBL (second stage
bootloader) and stores the parameters board_id=N and lcdtype=N
in order to augment the DTB for different board and LCD types.
We then add a custom ft_board_setup() callback that will inspect
the DTB and patch it using the stored LCD type. At this point
we know which product we are dealing with, so using the passed
board_id we can also print the board variant for diagnostics.
We patch the Codina, Skomer and Kyle DTBs to use the right
LCD type as passed in lcdtype from the SBL.
This also creates an infrastructure for handling any other
Samsung U8500 board variants that may need a slightly augmented
DTB.
Cc: Markuss Broks <markuss.broks@gmail.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Support for Apple M1 Pro and Max will allow using a single binary for
all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM
start address is 0x100_0000_0000 instead of 0x8_0000_0000.
Replace the hardcoded memory layout with dynamic initialized
environment variables in board_late_init().
Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021).
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
To make sure we get a working console as soon as possible in the SPL the
UART pins require to be configured earlier. This is especially
true for the pins of UART3, since the PDU001 board uses this UART for
the console by default.
Signed-off-by: Felix Brack <fb@ltec.ch>
The changes from commit 0dba45864b ("arm: Init the debug UART")
prevent the early debug UART from being initialized correctly.
To fix this we not just configure the pin multiplexer but add setting up
early clocks.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently -l option for mkimage and dumpimage ignores option -T and always
tries to autodetect image type.
With this change it is possible to tell mkimage and dumpimage to parse
image file as specific type (and not random autodetected type). This allows
to use mkimage -l or dumpimage -l as tool for validating image.
params.type for -l option is now by default initialized to zero
(IH_TYPE_INVALID) instead of IH_TYPE_KERNEL. imagetool_get_type() for
IH_TYPE_INVALID returns NULL, which is assigned to tparams. mkimage and
dumpimage code is extended to handle tparams with NULL for -l option. And
imagetool_verify_print_header() is extended to do validation via tparams if
is not NULL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The BOOT_TARGET_DEVICES list for distro_bootcmd was hard-coded to assume
that all boot devices are available/enabled in the configuration,
thus ignoring the actual config settings. The config_distro_bootcmd.h
header file specifically has compile-time checks to detect such problems.
To allow disabling USB, SCSI, etc. in custom lx2160a board configs,
make it depend on the config settings and use only the enabled features.
Signed-off-by: Daniel Klauer <daniel.klauer@gin.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Simplify the binman config and fdt nodes by using the "@..-SEQ"
substitutions and CONFIG_OF_LIST.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Nowadays, u-boot (when CONFIG_NET_RANDOM_ETHADDR is set) will set
enetaddr to a random value if not set and then pass the randomly
generated MAC address to linux.
This is bad for the following reasons:
(1) it makes it impossible for linux to detect this error
(2) linux won't trigger any fallback mechanism for the case where
it didn't find any valid MAC address
(3) a saveenv will store this randomly generated MAC address in the
environment
Probably, the user will also be unaware that something is wrong. He will
just get different MAC addresses on each reboot, asking himself why this
is the case.
As this board usually have a serial port, the user can just fix this by
setting the MAC address manually in the environment. Also disable the
netconsole just in case, because it cannot be guaranteed that it will
work in any case. After all, this was just a convenience option, because
the bootloader - right now - doesn't have the ability to read the MAC
address, which is stored in the OTP. But it is far more important to
have a clear view of whats wrong with a board and that means we can no
longer use this Kconfig option.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
They are no longer needed, because we now have proper driver support for
the sl28cpld management controller.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has an internal watchdog which supervises the board startup.
Although, the initial state of the watchdog is configurable, it is
enabled by default. In board_late_init(), which means almost everything
worked as expected, disable the watchdog.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The SoC provides two additional watchdogs integrated in the SoC. Enable
support for these.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the GPIO and watchdog driver. Don't start the watchdog
automatically, though.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Most of the time it is very useful to have the version of the board
management controller. Now that we have a driver, print it during
startup.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The current console output is:
DRAM: 4 GiB
DDR 4 GiB (DDR3, 32-bit, CL=11, ECC on)
The size is printed twice and we can save one line of console output if
we join both lines. The new output is as follows:
DRAM: 4 GiB (DDR3, 32-bit, CL=11, ECC on)
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The gpio block is part of the sl28cpld sl28cpld management controller.
There are three different flavors: the usual input and output where the
direction is configurable, but also input only and output only variants.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The watchdog timer is part of the sl28cpld management controller. The
watchdog timer usually supervises the bootloader boot-up and if it bites
the failsafe bootloader will be activated. Apart from that it supports
the usual board level reset and one SMARC speciality: driving the
WDT_TIMEOUT# signal.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add a multi-function device driver which will probe its children and
provides methods to access the device.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Pull request for efi-2022-04-rc3
Documentation:
* add man-page for fatload
* add SMBIOS table page
UEFI:
* partial fix for UEFI secure boot with intermediate certs
* disable watchdog when returning to command line
* reset system after capsule update
UEFI specification requires that 5 minutes watchdog timer is
armed before the firmware's boot manager invokes an EFI boot option.
This watchdog timer is updated as follows, according to the
UEFI specification.
1) The EFI Image may reset or disable the watchdog timer as needed.
2) If control is returned to the firmware's boot manager,
the watchdog timer must be disabled.
3) On successful completion of EFI_BOOT_SERVICES.ExitBootServices()
the watchdog timer is disabled.
1) is up to the EFI image, and 3) is already implemented in U-Boot.
This patch implements 2), the watchdog is disabled when control is
returned to U-Boot.
In addition, current implementation arms the EFI watchdog at only
the first "bootefi" invocation. The EFI watchdog must be armed
in every EFI boot option invocation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add a cold reset soon after processing capsule update on disk.
This is required in UEFI specification 2.9 Section 8.5.5
"Delivery of Capsules via file on Mass Storage device" as;
In all cases that a capsule is identified for processing the system is
restarted after capsule processing is completed.
This also reports the result of each capsule update so that the user can
notice that the capsule update has been succeeded or not from console log.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add expected_reset optional argument to ConsoleBase::ensure_spawned(),
ConsoleBase::restart_uboot() and ConsoleSandbox::restart_uboot_with_flags()
so that it can handle a reset while the 1st boot process after main
boot logo before prompt correctly.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add wait_for_reboot optional argument to ConsoleBase::run_command()
so that it can handle an expected reset by command execution.
This is useful if a command will reset the sandbox while testing
such commands, e.g. run_command("reset", wait_for_reboot = True)
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since the efi_update_capsule() represents the UpdateCapsule() runtime
service, it has to handle the capsule flags and update ESRT. However
the capsule-on-disk doesn't need to care about such things.
Thus, the capsule-on-disk should use the efi_capsule_update_firmware()
directly instead of calling efi_update_capsule().
This means the roles of the efi_update_capsule() and capsule-on-disk
are different. We have to keep the efi_update_capsule() for providing
runtime service API at boot time.
Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The general rule of accepting or rejecting an image is
1. Is the sha256 of the image in dbx
2. Is the image signed with a certificate that's found in db and
not in dbx
3. The image carries a cert which is signed by a cert in db (and
not in dbx) and the image can be verified against the former
4. Is the sha256 of the image in db
For example SHIM is signed by "CN=Microsoft Windows UEFI Driver Publisher",
which is issued by "CN=Microsoft Corporation UEFI CA 2011", which in it's
turn is issued by "CN=Microsoft Corporation Third Party Marketplace Root".
The latter is a self-signed CA certificate and with our current implementation
allows shim to execute if we insert it in db.
However it's the CA cert in the middle of the chain which usually ends up
in the system's db. pkcs7_verify_one() might or might not return the root
certificate for a given chain. But when verifying executables in UEFI, the
trust anchor can be in the middle of the chain, as long as that certificate
is present in db. Currently we only allow this check on self-signed
certificates, so let's remove that check and allow all certs to try a
match an entry in db.
Open questions:
- Does this break any aspect of variable authentication since
efi_signature_verify() is used on those as well?
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
SMBIOS is not x86 specific. So we should have an architecture independent
page describing it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The wrong phy was being enabled, because it worked and the proper
PHY did not. After the Renesas maintainer made some adjustments
to the device tree, Linux was able to use the proper driver, and
when that device tree was ported to Linux, the ethernet stopped
working due to the lack of rgmii-rxid support. Now that
rgmii-rxid is supported, enable the proper driver to restore
ethernet function.
Fixes: 1eaf61c84d ("arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3")
Signed-off-by: Adam Ford <aford173@gmail.com>
Some boards like the Beacon RZ/G2 SOM use either flags for
tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid.
In Linux the APSR_RDM flag is set when either rx-internal-delay-ps
is set or the mode is rgmii-rxid, and the APSR_TDM is set when
tx-internal-delay-ps is found or rgmii-txid is set, and both
are set if rgmii-id is set.
The ravb driver in U-Boot driver was missing rgmii-rxid support,
so add that support in a similar fashion to what is done in Linux.
Signed-off-by: Adam Ford <aford173@gmail.com>
There is a conflict between the static file
lib/acpi/dsdt.c and the file dsdt.c generated
dynamicaly by scripts/Makefile.lib. When a
mrproper is done, the static file dsdt.c is
removed. If a build with acpi enabled is
launched after, the following error is raised:
CC lib/acpi/acpi_table.o
make[2]: *** No rule to make target 'lib/acpi/dsdt.asl', needed by 'lib/acpi/dsdt.c'. Stop.
scripts/Makefile.build:394: recipe for target 'lib/acpi' failed
To avoid such error, the generated file is named
dsdt_generated.c instead of dstdt.c.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
The function clk_lookup can be replaced by a direct call
to uclass_get_device_by_name for UCLASS_CLK.
This patch removes duplicated codes by the generic DM API and avoids
issue in clk_lookup because result of uclass_get_device wasn't tested;
when ret < 0, dev = NULL and dev->name is invalid, the next function
call strcmp(name, dev->name) causes a crash.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20220131172131.2.I7bc7762eff1e31ab7ff5b34c416ee03b8fe52200@changeid
Test the number of argument in setfreq command to avoid a crash when
the command setfreq is called without argument:
STM32MP> clk setfreq
data abort
pc : [<ddba3f18>] lr : [<ddba3f89>]
reloc pc : [<c018ff18>] lr : [<c018ff89>]
sp : dbaf45b8 ip : ddb1d859 fp : 00000002
r10: dbb3fd80 r9 : dbb11e90 r8 : ddbf38cc
r7 : ddb39725 r6 : 00000000 r5 : 00000000 r4 : dbb3fd84
r3 : dbb3fd84 r2 : 0000000a r1 : dbaf45bc r0 : 00000011
Flags: nzCv IRQs off FIQs off Mode SVC_32 (T)
Code: 4dd3 1062 85a3 ddbd (7803) 2b30
Resetting CPU ...
Fixes: 7ab418fbe6 ("clk: add support for setting clk rate from cmdline")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220131172131.1.I32a8f213d330dccd922f7aafc60d3d63fcbe8615@changeid
It is safe to check if the uclass id on the device is UCLASS_CLK
before to call the clk_ functions, but today this comparison is
not done on the device used in API: clkp->dev->parent
but on the device himself: clkp->dev.
This patch corrects this behavior and tests if the parent device
is a clock device before to call the clock API, clk_enable or
clk_disable, on this device.
Fixes: 0520be0f67 ("clk: prograte clk enable/disable to parent")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The optional varients of clk_get_* functions are just simple wrappers.
Reduce code size a bit by inlining them. On platforms where it is not used
(most of them), it will not be compiled in any more. On platforms where
they are used, the inlined branch should not cause any significant growth.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20211222171114.3091780-3-seanga2@gmail.com
The driver is currently using sizeof(op->cmd.opcode) in the op_len
calculation. Commit d15de62301 ("spi: spi-mem: allow specifying a
command's extension") changed op->cmd.opcode from one byte to two.
Instead, a new struct member op->cmd.nbytes is supposed to be used.
For regular commands op->cmd.nbytes will be one.
Commit d15de62301 ("spi: spi-mem: allow specifying a command's
extension") did update some drivers that overload the generic mem_ops()
implementation, but forgot to update dw_spi_mem_ops().
Calculating op_len incorrectly causes dw_spi_mem_ops() to misbehave, since
op_len is used to determine how many bytes that should be read/written.
On the canaan k210 board, this causes the probe of the SPI flash to fail.
Fix the op_len calculation in dw_spi_mem_ops(). Doing so results in
working SPI flash on the canaan k210 board.
Fixes: d15de62301 ("spi: spi-mem: allow specifying a command's extension")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In the TI am65 device tree files there is no reset defined. Also
the Linux kernel driver uses devm_reset_control_get_optional_exclusive(..)
to get the reset.
Lets do the same as the kernel does and make thr reset optinal.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
With the Kconfig options being deleted, the references to
OMAP_EHCI_PHY are useless. Remove them from the various
defconfigs.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the omap-ehci driver now using the phy subsystem to enable
and disable reset, the driver no longer needs to know which
GPIO's are used, and they can be removed from Kconfig.
Signed-off-by: Adam Ford <aford173@gmail.com>
There are a few boards that use hard-coded GPIO definitions in
their respective defconfig files. If the GPIO's are listed
in their device trees, the nop-phy can toggle the GPIO's,
so the EHCI driver does not need to know anything about the
GPIO's. Add functions for getting the phys and remove the GPIO
toggles since the phy will now do that.
Signed-off-by: Adam Ford <aford173@gmail.com>
The USB_EHCI_OMAP driver currently has a series of Kconfig options
which let users specify a GPIO for the reset pin. Some devices
may have only one reset, while others might have more.
Since there is a nop phy driver, let's selct enable the PHY
system, and imply the nop phy driver. The nop phy driver can now
toggle the reset pins when putting the phy in and out of reset.
If the gpio is listed under the phy, it will get toggled and
the hard-coded config options specifying the GPIO numbers can
eventually go away.
Signed-off-by: Adam Ford <aford173@gmail.com>
The reset function should place the phy into reset, while the
init function should take the phy out of reset. Currently the
reset function takes it out of reset, and the init calls the
reset.
Signed-off-by: Adam Ford <aford173@gmail.com>
The OMAP3 hierarchy has the ehci node as a sub-node of the
usbhshost. The usbhshost node contains an ohci and an ehci
subnode. The configuration of the ehci belongs in the
EHCI node and not its parent. Move it to the proper probe.
usb start
starting USB...
Bus ehci@48064800: USB EHCI 1.00
Bus usb_otg_hs@480ab000: Port not available.
scanning bus ehci@48064800 for devices... 3 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
Signed-off-by: Adam Ford <aford173@gmail.com>
omap_ehci_hcd_stop appears to be dead code, and omap_ehci_hcd_init
is only called by the probe function, so it can be static to that
function. Remove both from the header along with some additional
checking for DM_USB.
Signed-off-by: Adam Ford <aford173@gmail.com>
On some configs (like stm32mp15_dhcom_basic_defconfig), if configs
SPL_LOAD_FIT_FULL and SPL_FIT_FULL_CHECK are enabled. Then the compilatio
fails with the following error:
arm-linux-gnueabi-ld.bfd: boot/image-fit.o: in function `fit_check_format':
<PATH>/uboot/u-boot-stm/boot/image-fit.c:1641: undefined reference to `fdt_check_full'
scripts/Makefile.spl:509: recipe for target 'spl/u-boot-spl' failed
This issue happens because the function fdt_check_full is only defined if
"!defined(FDT_ASSUME_MASK) || FDT_ASSUME_MASK != 0xff". But this function
may be called even if this condition are not verified. To avoid this issue,
the function fdt_check_full is always defined.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The port/hub leaf nodes don't contain the phy definitions in some dts
files so check the parents.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we only support expanding out FDT nodes. Make the operation
into an @operation property, so that others can be supported.
Re-arrange and tidy up the documentation so that it has separate
headings for each topic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Split subnode and property processing into separate functions to make
the _AddNode() function a little smaller. Tweak a few comments.
This does not change any functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Collecting the data from a list of entries and putting it in a file is
a useful operation that will be needed by other entry types. Put this into
a method in the Entry class.
Add some documentation about how to collect data for an entry type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a file that has two text sections at different addresses, so we can
test this behaviour in binman, once added.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the 'args' property of the mkimage entry type is a string. This
makes it difficult to include CONFIG options in that property. In
particular, this does not work:
args = "-n CONFIG_SYS_SOC -E"
since the preprocessor does not operate within strings, nor does this:
args = "-n" CONFIG_SYS_SOC" "-E"
since the device tree compiler does not understand string concatenation.
With this new feature, we can do:
args = "-n", CONFIG_SYS_SOC, "-E";
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an entry for OP-TEE Trusted OS 'BL32' payload.
This is required by platforms using Cortex-A cores with TrustZone
technology.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add missing-blob-help, renumber the test file, update entry-docs:
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which reads the segments and the entry address.
Also fix a comment nit in the tests while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to support a string or stringlist containing a list of
space-separated arguments, for example:
args = "-n fred", "-a", "123";
This resolves to the list:
-n fred -a 123
which can be passed to a program as arguments.
Add a helper to do the required processing.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not work at present, since the current algorithm assumes that
either there are no nodes or all nodes have an offset. If a node is new,
but an old node is still in the tree, then syncing fails due to this
assumption.
Fix it and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
When CONFIG_SPL_FIT is enabled we do not access U-Boot directly in
the image, since it is embedded in a FIT which is parsed at runtime.
Provide a CONFIG option to drop the symbols in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
These symbols are incorrect, meaning that binman cannot find the
associated entry. This leads to errors like:
binman: Section '/binman/simple-bin': Symbol '_binman_spl_prop_size'
in entry '/binman/simple-bin/u-boot-spl/u-boot-spl-nodtb':
Entry 'spl' not found in list (mkimage,u-boot-spl-nodtb,
u-boot-spl-bss-pad,u-boot-spl-dtb,u-boot-spl,u-boot-img,main-section)
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to search for CONFIG options that match a regex,
such as this, which lists boards which define SPL_FIT_GENERATOR and
anything not starting with ROCKCHIP:
./tools/moveconfig.py -f SPL_FIT_GENERATOR ~ROCKCHIP.*
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This shows an internal type at present, rather than the algorithm name.
Fix it and update the test to catch this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Binman keeps track of positions of each entry in the final image, but
currently this data is wrong for things included in FIT entries,
especially since a previous patch makes FIT a subclass of Section and
inherit its implementation.
There are three ways to put data into a FIT image. It can be directly
included as a "data" property, or it can be external to the FIT image
represented by an offset-size pair of properties. This external offset
is either "data-position" from the start of the FIT or "data-offset"
from the end of the FIT, and the size is "data-size" for both. However,
binman doesn't use the "data-offset" method while building FIT entries.
According to the Section docstring, its subclasses should calculate and
set the correct offsets and sizes in SetImagePos() method. Do this for
FIT subentries for the three ways mentioned above, and add tests for the
two ways binman can pack them in.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman's FIT entry type can have image subentries with "hash" subnodes
intended to be processed by mkimage, but not binman. However, the Entry
class and any subclass that reuses its implementation tries to process
these unconditionally. This can lead to an error when boards specify
hash algorithms that binman doesn't support, but mkimage supports.
Let entries skip processing these "hash" subnodes based on an instance
variable, and set this instance variable for FIT subsections. Also
re-enable processing of calculated and missing properties of FIT entries
which was disabled to mitigate this issue.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check interrupt status to see if RSA engine is completed. After completion
of the task, write-clear the status to finish operation.
Add missing register base for completion.
Fixes: 89c36cca0b ("crypto: aspeed: Add AST2600 ACRY support")
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
The default U-Boot environment variables and design are all set up for
the MAIN R5FSS cluster to be in Split-mode. This is the setting used
when the dts nodes were originally added in v2021.01 U-Boot and the
dt nodes are synched with the kernel binding property names in
commit 468ec2f3ef ("remoteproc: k3_r5: Sync to upstreamed kernel DT
property names") merged in v2021.04-rc2.
The modes for the MAIN R5FSS cluster got switched back to LockStep mode
by mistake in commit fa09b12dc5 ("arm: ti: k3: Resync dts files and
bindings with Linux Kernel v5.14") in v2022.01-rc1. This throws the
following warning messages when early-booting the cores using default
env variables,
k3_r5f_rproc r5f@5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode
Load Remote Processor 3 with data@addr=0x82000000 83148 bytes: Failed!
Fix this by switching back both the clusters to the expected Split-mode.
Make this mode change in the u-boot specific dtsi file to avoid such
sync overrides in the future until the kernel dts is also switched to
Split-mode by default.
Fixes: fa09b12dc5 ("arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14")
Signed-off-by: Suman Anna <s-anna@ti.com>
There are a few memory functions for both the emif4 (AM3517)
and sdrc (OMAP35/DM37) code that can be defined as static,
because those functions are not used externally. Make them
static and clean up some of the corresponding headers.
Signed-off-by: Adam Ford <aford173@gmail.com>
With LTO enabled, some functions appear to be optimized in a
way that causes hanging on some OMAP3 boards after some
unrelated patches were applied. The solution appears to make
several functions __used. There also appears be to be some
dead code, so remove it while cleaning this up.
This has been tested on a general purpose OMAP3530, DM3730,
and AM3517.
Signed-off-by: Adam Ford <aford173@gmail.com>
Correct the min/max voltages of VDD_CPU. As per data sheet the VDD_CPU
minimum voltage is .6V & maximum voltage is .9V.
Correct the same. While at it fix the comment to reflect VDD_CPU
instead of VDD_MPU.
Data Sheet Link: https://www.ti.com/lit/gpn/dra829v
Signed-off-by: Keerthy <j-keerthy@ti.com>
For the purpose of this driver (activating bypass mode) t6000-dart
and t8103-dart are fully compatible.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
U-Boot now supports NVMe storage and on the laptop models, the
SPI keyboard. Since we now disable the debug console by default
provide instructions on how the enable the debug console including
a table listing the appropriate UART base address for each of the
supported SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
The address of the debug UART varies differs between the M1 and
the M1 Pro/Max SoCs. So we have to disable it to make a single
U-Boot binary that works on all SoC generations. Leave the
settings for the base address and clock rate of the M1 in place
to make it easier to re-enable the debug UART when needed.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Choose the memory map based on the compatible property from the
device tree passed to us by m1n1. Since DRAM on the M1 Pro/Max
starts at a different address avoid hardcoding the top of usable
memory. Also make sure that the addresses entered into the memory
map are page aligned such that we don't crash in dcache_enable().
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tested on: Macbook M1 Max
Tested-by: Janne Grunau <j@jannau.net>
The function wrongly will return the card detection status of the SD card
(USDHC2) for the eMMC (USDHC1). Thus booting from eMMC without an inserted
SD card will fail.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.
The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".
The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module to
have a working environment even if 3 blocks are bad.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
After this change it would be possible to use 'mtd' command to get access
to XEA's SPI-NOR partitions by name (e.g. SPL), not by offsets.
To enable this feature the CONFIG_SPI_FLASH_MTD needs to be defined in the
Kconfig, not in xea.h.
=> mtd list
=> mtd read spl-boot-data1 ${loadaddr} 0x0 4
=> md.l ${loadaddr} 1
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- LTE CAT M1 modem
- USB 2.0 HUB
- M.2 Socket with USB2.0, PCIe, and dual-SIM
- IMX8M FEC
- PCIe based GbE
- RS232/RS485/RS422 serial transceiver
- GPS
- CAN bus
- WiFi / Bluetooth
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- PMIC
To add support for the i.MX8M Nano GW7902:
- Add imx8mn-venice dts/defconfig/include
- Add imx8mn-gw7902 dts
- Add imx8mn-2gb lpddr4 dram configs
- Add misc support for IMX8M Nano SoC
- rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
- update README with differences for IMX8MN vs IMX8MM
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The original code logic can not show the correct card clock, and also
has one risk when the div is 0. Because there is div -=1 before.
So move the operation before div -=1, and also involve ddr_pre_div
to get the correct value.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Now original fsl_esdhc.c are split as fsl_esdhc.c and fsl_esdhc_imx.c.
fsl_esdhc_imx.c only cover i.MX SoC. So ARCH_MXC is redundant.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
With binman generating flash.bin, it's not longer necessary to
specify either the location of ATF nor is it necessary to
specify building flash.bin, so let's update the build instructions
to remove those. While in here, update the revision of ATF and
DDR firmware so both Mini and Nano reference the same revision.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The Linux driver automatically can detect and enable UHS, HS200, HS400
and HS400_ES automatically without extra flags being placed into the
device tree.
Right now, for U-Boot to use UHS, HS200 or HS400, the extra flags are
needed in the device tree. Instead, go through the esdhc_soc_data
flags and enable the host caps where applicable to automatically
enable higher speeds.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Use IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) to make the code
more readable and fix checkpatch.pl warning
Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com>
Make O4-iMX6ULL-NANO-based board compatible with Yocto layer meta-out4 and
fix device flashing by UUU (aka MFG Tools).
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
The interface for NOR/OneNAND is called "EIM" not "EMI". Fix this.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
With the fuse values in memory we can use some of the other u-boot shell
conditonal operators to do tests.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
- a37xx: pci: Cleanup and minor fix for root port check (Pali)
- pci: mvebu: Ensure that root port is always on root zero bus (Pali)
- kwbimage: Fix dumping DATA registers for v0 images (Pali)
- kwbimage: Support for parsing extended v0 format (Pali)
- a37xx: Fix code and update DTS files to upstream version (Pali)
- a37xx: Fix and extend building memory map (Pali)
- ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision (Marek)
- mvebu: Optionally reset board on DDR training failure (Marek)
The state of the current DDR training code for Armada 38x is such that
we cannot be sure it will always train successfully - although after the
last change we were yet unable to find a board that failed DDR training,
from experience in the last 2 years we know that it is possible.
The experience also tells us that in many cases the board fails training
only sometimes, and after a reset the training is successful.
Enable the new option that makes the board reset itself on DDR training
failure immediately. Until now we called hang() in such a case, which
meant that the board was reset by the MCU after 120 seconds.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Some boards may occacionally fail DDR training. Currently we hang() in
this case. Add an option that makes the board do an immediate reset in
such a case, so that a new training is tried as soon as possible,
instead of hanging and possibly waiting for watchdog to reset the board.
(If the DDR training fails while booting the image via UART, we will
still hang - it doesn't make sense to reset in such a case, because
after reset the board will try booting from another medium, and the
UART booting utility does not expect that.)
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
First binary executable header is extracted by '-p 1' argument.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
These two commands are currently not processed when generating v0 images.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When pflag is set then kwbimage was invoked by dumpimage and not mkimage.
So do not show mkimage error message in this case.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
dumpimage is now able to successfully parse and dump content of the Dove
bootloader image.
Note that support for generating these extended parts of v0 images is not
included yet.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Extended and binary headers are optional and are part of the image header.
Fixes kwboot to determinate correct length of Dove images.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
They are used by Marvell Dove 88AP510 BootROM.
After the main header is a list of optional extended headers and after that
is a list of optional binary executable headers. Between each two extended
headers is additional 0x20 byte long padding.
Original Kirkwood SoCs support only one extended header and no binary
executable header.
Extension of struct ext_hdr_v0 is backward compatible with the old
definition. Only reserved[] fields are changed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In commit 3fc92a215b ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
decision") I ported a cleaned up and changed version of patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
because:
- the fix seemed to work without it
- the bit was checked for only at one place out of two, while the second
bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
- without the removal it didn't work on Allied Telesis' x530 board
We recently had a chance to test on more boards, and it seems that the
change needs to be opposite: instead of removing the check for
BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
needs to be added also to the second one - it needs to be at both
places.
With this change all the Turris Omnia boards I have had available to
test seem to work, I didn't encounter not even one failed DDR training.
As last time, I am noting that I do not understand what this code is
actually doing, I haven't studied the DDR training algorithm and
I suspect that no one will be able to explain it to U-Boot contributors,
so we are left with this blind poking in the code with testing whether
it works on several boards and hoping it doesn't break anything for
anyone :-(.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Function is named build_mem_map, not a3700_build_mem_map.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
In function build_mem_map() prepare also mapping for CCI-400 and
BootROM windows.
BootROM window is 1 MB long and by default starts at address 0xfff00000.
A53 AP BootROM is 16 kB long and repeats in this BootROM window 64 times.
RVBAR_EL3 register is set to value 0xffff0000, so by default A53 AP BootROM
is accessed via range 0xffff0000-0xffff3fff.
CCI-400 window when new TF-A version is used, starts at address 0xfe000000
and when old TF-A version is used, starts at address 0xd8000000.
Physical addresses are read directly from mvebu registers, so if TF-A
remaps it in future (again) then it would not cause any issue for U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Function build_mem_map() modifies global variable mem_map. This variable is
used by the get_page_table_size() function which is called by function
arm_reserve_mmu() (as aliased macro PGTABLE_SIZE). Function
arm_reserve_mmu() is called earlier than enable_caches() which calls
build_mem_map(). So arm_reserve_mmu() does not calculate reserved memory
correctly.
Fix this issue by calling build_mem_map() from a3700_dram_init() which is
called before arm_reserve_mmu().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Writing to the PCI_PRIMARY_BUS register of the root port should not change
bus number on which is root port present.
Same change and exactly same fix as was done in commit for pci-aardvark.c.
Fixes: a7b61ab58d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Allow access to config space of PCIe Root Port (which is always present on
the root bus) even when PCIe link is down or no card is connected.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
If a PIO request is executed while link-down, the whole controller gets
stuck in a non-functional state, and even after link comes up again, PIO
requests won't work anymore, and a reset of the whole PCIe controller is
needed. Therefore we need to prevent sending PIO requests while the link
is down.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This change updates all Armada 37xx DTS files to version which is used by
Linux kernel v5.18.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Official DT bindings for Espressobin have disabled eMMC node.
As U-Boot requires to have this node enabled by default, do it in
armada-3720-espressobin-u-boot.dtsi DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot specific changes should be in armada-3720-espressobin-u-boot.dtsi DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
In Linux kernel version of armada-37xx.dtsi file sdhci1 pointer refers to
sdhci@d0000 node and sdhci0 pointer to sdhci@d8000 node.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Armada 3720 DTS files in upstream kernel use ethernet nodes named
'ethernet@30000' and 'ethernet@40000'. U-Boot have them named 'neta@30000'
and 'neta@40000'. To have Turris Mox U-Boot board code independent of
ethernet node names, find ethernet node via alias.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Official DT bindings have only one reg property: watchdog address space.
Convert armada-37xx-wdt.c driver to offical DT bindings and access sel_reg
register via MVEBU_REGISTER() macro, as its value (required by U-Boot
driver) is not in DT yet. In later stage can be driver cleaned to not use
it.
This change would allow U-Boot to use A3720 watchdog DTS structure from
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Official DT bindings use compatible string marvell,armada-3700-ehci.
Update drivers and DTS files.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
In commit d368e10705 ("phy: marvell: a3700: Convert to official DT
bindings in COMPHY driver") was done update to official DT bindings but
compatible string of official DT bindings was not updated.
Fix it now.
Fixes: d368e10705 ("phy: marvell: a3700: Convert to official DT bindings in COMPHY driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Compatible string microchip,mcp7940x is used by Turris Mox DTS file in
Linux kernel and U-Boot ds1307.c driver works fine with it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
End of DATA register section is indicated by zero value in both raddr and
rdata.
So do not stop dumping registers with non-zero address and zero value.
And also print end of DATA registers section.
Fixes: 1a8e6b63e2 ("tools: kwbimage: Dump kwbimage config file on '-p -1' option")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Writing to the PCI_PRIMARY_BUS register of the root port should not change
bus number on which is root port present.
This PCI_PRIMARY_BUS register is used only for correct configuration of
legacy PCI stuff, like forwarding of PCI special cycles between buses.
Aardvark HW does not support PCI special cycles, so it does not have HW
register for PCI_PRIMARY_BUS and therefore it does not matter what is
stored in this register.
So fix this issue and do not use PCI_PRIMARY_BUS register in pci-aardvark.c
driver for moving root bus of the root port.
After this change there is no reason for storing bus number (zero) into
first_busno variable, so remove this variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Reviewed-by: Stefan Roese <sr@denx.de>
There is only one base address, so use dev_read_addr() instead of dev_read_addr_index().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Remove "PCI_" prefix from all macros which are aardvark specific to not
conflict with macros defined in global include file pci.h. Instead add
"ADVK_" prefix for them so it is visible that they are aardvark specific.
After "ADVK_" prefix append keyword which describes register group, so it
would be clear to which register each macro value belongs.
Rename some macros for consistency with other macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
PCI config space of the aardvark PCIe Root Port is available only in
internal aardvark memory space starting at offset 0x0. PCI Express
registers (PCI_EXP_*) start at offset 0xc0. And Advanced Error Reporting
registers (PCI_ERR_*) start at offset 0x100.
Replace custom aardvark register macros by standard PCI macros from
include/pci.h file with fixed offset.
Some DEVCTL and AER macros are not defined in include/pci.h file, so define
them in the same way as in linux uapi header file pci_regs.h.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
A new lpddr4 configuration is introduced for J7 SK with 4266 MTs data
rate. Therefore, update the R5 DTS file to point to the new DDR config
file.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
EMIF tool for J721E SK is now updated to 0.6.1 that includes
* Updated write DQ training pattern to enable user pattern and clock
pattern (from 0x7 to 0x6).
* Updated IO drive strength to 40-80-80 Ohms.
J721E SK uses the lpddr4 configuration of 4266 MTs data rate which is
the same as J721E EVM but facing random failures. As the tool update is
specific to the SK board, add a new lpddr4 config of 4266 MTs.
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Now that single defconfig can be used for booting J721E EVM and
SK, default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
S28HS512T on TI SK has sector size of 256KB, so update OSPI partition
to align on 256KB sector size. Since the sector size for MT35XU512ABA
on EVM is 128KB, partitions will remain aligned for EVM.
Also, now since the sector size is 256KB ospi.env.backup will collide
with ospi.sysfw, so move ospi.env.backup to the padding space (0x7C0000)
before ospi.rootfs partition.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both J721E EVM and SK boards.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
J721E Starter Kit (SK)[1] is a low cost, small form factor board designed
for TI’s J721E SoC. TI’s J721E SoC comprises of dual core A72, high
performance vision accelerators, video codec accelerators, latest C71x
and C66x DSP, high bandwidth real-time IPs for capture and display, GPU,
dedicated safety island and security accelerators. The SoC is power
optimized to provide best in class performance for industrial and
automotive applications.
J721E SK supports the following interfaces:
* 4 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.0 Type-C port
* x3 USB 3.0 Type-A ports
* x1 PCIe M.2 E Key
* x1 PCIe M.2 M Key
* 512 Mbit OSPI flash
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi GPIO header
Add A72 specific dts for J721E-SK.
[1] https://www.ti.com/tool/SK-TDA4VM
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Board ID I2C EEPROM will be probed before SYSFW is available.
So drop the power-domains property for wakup_i2c0 on which
board ID EEPROM is connected.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Enable support for selecting DTB from FIT within SPL based on the
board name read from EEPROM. This will help to use single defconfig
for both EVM and SK.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.
Also restrict multpile EEPROM reads by verifying if EEPROM is already
read.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
j721e-sk doesn't have any daughter cards, so disable daughter
card probing inside board_late_init() and spl_board_init() for
j721e-sk.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
J721E EVM has EEPROM populated at 0x50. J721E SK has EEPROM populated
at next address 0x51 in order to be compatible with RPi. So start
looking for TI specific EEPROM at 0x50, if not found look for EEPROM at
0x51.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
board_late_init(), setup_board_eeprom_env() and setup_serial() is
called only under CONFIG_BOARD_LATE_INIT, so guard these functions
with the same. Also, reorder these functions to place it under
single #ifdef
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Buck regulator 1, 2 and 3 of TPS6594132 on j721e-sk is in 3 Phase
confguration, in-order to support this, add configuring 3 Phase buck
in tps65941 while driver probing.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Since TPS659412 and TPS659413 are both software compatible,
add a compatible string for the same inside tps65941.c.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
This function has not been conditionally compiled for some time, so
remove the incorrect guards around the declaration.
Signed-off-by: Tom Rini <trini@konsulko.com>
There are devices which cause a USB stall when trying to read strings.
Specifically Arduino Mega R3 stalls when trying to read the product
string.
The stall currently remains unhandled, and subsequent retries submit new
transfers on a stopped endpoint which ultimately cause a crash in
abort_td():
WARN halted endpoint, queueing URB anyway.
XHCI control transfer timed out, aborting...
Unexpected XHCI event TRB, skipping... (3affe040 00000000 13000000 02008401)
BUG at drivers/usb/host/xhci-ring.c:505/abort_td()!
BUG!
resetting ...
Linux seems to be able to recover from the stall by issuing a
TRB_RESET_EP command.
Introduce reset_ep() which issues a TRB_RESET_EP followed by setting the
transfer ring dequeue pointer via TRB_SET_DEQ. This allows to properly
recover from a USB stall error and continue communicating with the USB
device.
Signed-off-by: Stefan Agner <stefan@agner.ch>
The kernel devicetree has definitions for port and hub nodes as subnodes
to the USB devices. These subnodes don't contain all of the data required
to properly configure the dwc3. Check the parent nodes if the data is not
in the port/hub node.
Here's an example from the librem5 kernel dts file
&usb_dwc3_0 {
#address-cells = <1>;
#size-cells = <0>;
dr_mode = "otg";
snps,dis_u3_susphy_quirk;
status = "okay";
port@0 {
reg = <0>;
typec_hs: endpoint {
remote-endpoint = <&usb_con_hs>;
};
};
port@1 {
reg = <1>;
typec_ss: endpoint {
remote-endpoint = <&usb_con_ss>;
};
};
};
&usb_dwc3_1 {
dr_mode = "host";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* Microchip USB2642 */
hub@1 {
compatible = "usb424,2640";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mass-storage@1 {
compatible = "usb424,4041";
reg = <1>;
};
};
};
Signed-off-by: Angus Ainslie <angus@akkea.ca>
The correct mask for getting the source/destination register from ESR in
the case of an unaligned access exception is 0x3E0. With this change, a
dummy unaligned store produces the expected info:
"""
>> swi r5, r0, 0x111
...
Hardware exception at 0x111 address
Unaligned data access exception
Unaligned word access
Unaligned store access
Register R5
Return address from exception 0x7f99dfc
### ERROR ### Please RESET the board ###
"""
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-6-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
According to the MicroBlaze reference manual (xilinx2021.2/ug984/page-37):
"""
If an exception is caused by an instruction in a delay slot (that is,
ESR[DS]=1), the exception handler should return execution to
the address stored in BTR instead of the normal exception return
address stored in R17.
"""
Adjust the code to print the proper return address for delay slot
exceptions.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-4-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The switch statement in _hw_exception_handler() only covers the
rightmost 5 bits that encode the exception cause:
switch (state & 0x1f)
{
...
}
For this reason, the "0x1000" case will never be reached, because the 13th
bit was zeroed out. To fix this, move delay slot exception handling before
the switch statement (delay slot (DS) bit in Exception Status Register is
independent of the exception cause (EC)).
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-3-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.
Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
The changes introduced with commit 6337d53fdf ("arm: dts: sync am33xx
with Linux 5.9-rc7") prevent the PDU001 from operating correctly.
This patch fixes the configuration of the pin multiplexer and uart3.
Signed-off-by: Felix Brack <fb@ltec.ch>
After replacing of include/config/auto.conf sourcing with
extraction of CONFIG_LOCALVERSION, resulting version string
contains quotes around localversion part which are always
present in auto.conf (even if localversion is empty).
This patch fixes this script to remove quotes.
Signed-off-by: Nikita Maslov <wkernelteam@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pstore command tries to create a reserved-memory node but fails if
it is already present with:
Add 'reserved-memory' node failed: FDT_ERR_EXISTS
This patch creates the node only if it does not exist and adapts the reg
values sizes depending on already present #address-cells and #size-cells
values.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Pull request for efi-2022-04-rc2-4
Documentation:
* mkeficapsule man-page
UEFI changes:
* add support for signing images to mkeficapsule
* add support for user define capsule GUID
* adjust unit tests for capsules
* fix UEFI image signature validation in case of multiple signatures
The previous patch is changing U-Boot's behavior wrt certificate based
binary authentication. Specifically an image who's digest of a
certificate is found in dbx is now rejected. Fix the test accordingly
and add another one testing signatures in reverse order
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The EFI spec allows for images to carry multiple signatures. Currently
we don't adhere to the verification process for such images.
The spec says:
"Multiple signatures are allowed to exist in the binary's certificate
table (as per PE/COFF Section "Attribute Certificate Table"). Only one
hash or signature is required to be present in db in order to pass
validation, so long as neither the SHA-256 hash of the binary nor any
present signature is reflected in dbx."
With our current implementation signing the image with two certificates
and inserting both of them in db and one of them dbx doesn't always reject
the image. The rejection depends on the order that the image was signed
and the order the certificates are read (and checked) in db.
While at it move the sha256 hash verification outside the signature
checking loop, since it only needs to run once per image and get simplify
the logic for authenticating an unsigned imahe using sha256 hashes.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Before the capsule authentication is supported, this test script works
correctly, but with the feature enabled, most tests will fail due to
unsigned capsules.
So check the results depending on CAPSULE_AUTHENTICATE or not.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This test scenario tests a new feature of mkeficapsule, "--guid" option,
which allows us to specify FMP driver's guid explicitly at the command
line.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since the syntax of mkeficapsule was changed in the previous commit,
we need to modify command line arguments in a pytest script.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The existing options, "--fit" and "--raw," are only used to put a proper
GUID in a capsule header, where GUID identifies a particular FMP (Firmware
Management Protocol) driver which then would handle the firmware binary in
a capsule. In fact, mkeficapsule does the exact same job in creating
a capsule file whatever the firmware binary type is.
To prepare for the future extension, the command syntax will be a bit
modified to allow users to specify arbitrary GUID for their own FMP driver.
OLD:
[--fit <image> | --raw <image>] <capsule file>
NEW:
[--fit | --raw | --guid <guid-string>] <image> <capsule file>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a couple of test cases against capsule image authentication
for capsule-on-disk, where only a signed capsule file with the verified
signature will be applied to the system.
Due to the difficulty of embedding a public key (esl file) in U-Boot
binary during pytest setup time, all the keys/certificates are pre-created.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Now we can use mkeficapsule command instead of EDK-II's script
to create a signed capsule file. So update the instruction for
capsule authentication.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With this enhancement, mkeficapsule will be able to sign a capsule
file when it is created. A signature added will be used later
in the verification at FMP's SetImage() call.
To do that, we need specify additional command parameters:
-monotonic-cout <count> : monotonic count
-private-key <private key file> : private key file
-certificate <certificate file> : certificate file
Only when all of those parameters are given, a signature will be added
to a capsule file.
Users are expected to maintain and increment the monotonic count at
every time of the update for each firmware image.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add CONFIG_TOOLS_MKEFICAPSULE. Then we want to always build mkeficapsule
if tools-only_defconfig is used.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
We need to install libgnutls-devel package to build the host tool,
mkeficapsule, and as of now, there seems to be a depencency conflict
in the current msys2 installer;
:: installing libp11-kit (0.24.1-1) breaks dependency \
'libp11-kit=0.23.22' required by p11-kit
To resolve this conflict, however, the initial "pacman -Syyuu" in
'tools_only_windows' job is not enough. Another "pacman -Su" will
enforce all the out-of-date packages being upgraded.
(Probably the first "-Syyuu" can be changed to "-Syu".)
See the installation steps in
https://www.msys2.org/
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A partial list:
- fw_env updates, a new testcase for mkimage -o ..., nop-phy reset-gpios
support, DFU updates, kaslr-seed support in extlinux.conf, modern
"partitions" support in mtd device tree
The output size for snprint() should not only be respected for whole fields
but also with fields. Add more tests.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Some usb-nop-xceiv devices use a gpio take them out
of reset. Add a reset function to put them into that
state. This is similar to how Linux handles the
usb-nop-xceiv driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
Environment variables can be stored in two formats:
1. Single entry with header containing CRC32
2. Two entries with extra flags field in each entry header
For that reason fw_env_open() has two main code paths and there are
pointers for CRC32/flags/data.
Previous implementation was a bit hard to follow:
1. It was checking for used format twice (in reversed order each time)
2. It was setting "environment" global struct fields to some temporary
values that required extra comments explaining it
This change simplifies that code:
1. It introduces two clear code paths
2. It sets "environment" global struct fields values only once it really
knows them
To be fair there are *two* crc32() calls now and an extra pointer
variable but that should be cheap enough and worth it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
It's usually easier to understand code & follow it if all arguments are
passed explicitly. Many coding styles also discourage using global
variables.
Behaviour of flash_io() was a bit unintuitive as it was writing to a
buffer referenced in a global struct. That required developers to
remember how it works and sometimes required hacking "environment"
global struct variable to read data into a proper buffer.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Since dfu is not only used for USB, and some platform only
supports DFU_OVER_TFTP or EFI capsule update, dfu_alt_info
is defined on such platforms too.
For such platform, 'dfu list' command is useful to check
how the current dfu_alt_info setting is parsed.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Fix some typo and wrong information about dfu_alt_info.
- Add the parameter format, decimal only or hexadecimal.
- Use same parameter name for the same kind of parameters.
(e.g. dev -> dev_id)
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
When parsing the dfu_alt_info, check the number of arguments
and argument string strictly. If there is any garbage data
(which is not able to be parsed correctly) in dfu_alt_info,
that means something wrong and user may make a typo or mis-
understanding about the syntax. Since the dfu_alt_info is
used for updating the firmware, this mistake may lead to
brick the hardware.
Thus it should be checked strictly for making sure there
is no mistake.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
If dfu_alt_info has repeated spaces or tab (for indentation or
readability), the dfu fails to parse it. For example, if
dfu_alt_info="mtd nor1=image raw 100000 200000" (double spaces
after "raw"), the image entity start address is '0' and the size
'0x100000'. This is because the repeated space is not skipped.
Use space and tab as a separater and apply skip_spaces() to
skip redundant spaces and tabs.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Use strlcpy() instead of strcpy() to prevent copying the
entity name over the name buffer size.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Addresses the feedback provided on 5902a397d0 ("mkimage: Allow to
specify the signature algorithm on the command line") which raced with
the merge.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
echo -n does not give the intended effect when invoked in macOS through
/bin/sh, which is the shell make uses by default, see
"https://stackoverflow.com/questions/11675070/makefile-echo-n-not-working"
for a detailed explanation. In this case, it resulted in "-n" being
written to env.txt and env.in even though they should be empty, which
caused compilation to fail with "Your board uses a text-file
environment, so must not define CONFIG_EXTRA_ENV_SETTINGS".
This patch prevents the error by replacing echo -n's with touch, as they
are used to create empty files in these cases.
strlen() returns size_t. So we should use %zu to print it.
This avoids incorrect output on 32bit systems.
Fixes: 2fc62f2991 ("stackprot: Make our test a bit more complex")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Stress the '-o algo_name' argument of mkimage by expanding the vboot
test.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Update scripts/pylint.base]
Replace %zx by %lx and cast size_t to ulong.
U-Boot currently prints garbage debug output:
size=x, ptr=18, limit=18: 4002a000
With this change it prints correct debug data:
size=18, ptr=18, limit=2000: 4002a000
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Listing MTD partitions directly in the flash mode has been deprecated
for a while for kernel Device Trees. Look for a node "partitions" in the
found flash nodes and use it instead of the flash node itself for the
partition list when it exists, so Device Trees following the current
best practices can be fixed up.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the Linux implementation of adc-keys
(drivers/input/keyboard/adc-keys.c), `press-threshold-microvolt` is not
really interpreted as a threshold, but rather as the "nominal voltage"
of the button. When the voltage read from the ADC is closest to a
button's `press-threshold-microvolt`, the button is considered pressed.
This patch reconciles the behavior of button-adc with Linux's adc-keys
such that device trees can be synchronized with minimal modifications.
Signed-off-by: Peter Cai <peter@typeblog.net>
this will add kaslrseed keyword to sysboot lable,
when it set, it will request to genarate random number
from hwrng as kaslr-seed.
with this patch exlinux.conf label looks like
label l0
menu testing
linux /boot/vmlinuz-5.15.16-arm
initrd /boot/initramfs-5.15.16-arm.img
fdtdir /boot/dtbs/5.15.16-arm/
kaslrseed
append root=UUID=92ae1e50-eeeb-4c5b-8939-7e1cd6cfb059 ro
Tested on Khadas VIM with kernel 5.16.0-rc5-arm64, Debian 11.
Signed-off-by: Zhang Ning <zhangn1985@qq.com>
The ci_req->hw_buf can be NULL, test whether it is and if so,
avoid accessing it. Else, the system may crash.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peter Chen <peter.chen@nxp.com>
Cc: Li Jun <jun.li@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Using the XHCI driver, the function `usb_kbd_poll_for_event` takes
30-40ms to run. The exact time is dependent on the polling interval the
keyboard requests in its descriptor, and likely cannot be significantly
reduced without major rework to the XHCI driver.
The U-Boot EFI console service sets a timer to poll the keyboard every 5
microseconds, and this timer is checked every time a block is read off
disk. The net effect is that, on my system, loading a ~40MiB kernel and
initrd takes about 62 seconds with a slower keyboard and 53 seconds
with a faster one, with the vast majority of the time spent polling the
keyboard.
To solve this problem, this patch adds a 20ms delay between consecutive
calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the
total loading time to under half a second for both keyboards, and does
not impact the perceived keystroke latency.
Signed-off-by: Thomas Watson <twatson52@icloud.com>
The imx8mm and imx8mn appear compatible with imx7d-usb
flags in the OTG driver. If the dr_mode is defined as
host or peripheral, the device appears to operate correctly,
however the auto host/peripheral detection results in an error.
The solution isn't just adding checks for imx8mm and imx8mn to
the check for imx7, because the USB clock needs to be running
to read from the USBNC_PHY_STATUS_OFFSET register or it will hang.
Marek requested that I not enable the clocks in ehci_usb_of_to_plat,
so I modified that function to return an unknown state if the
device tree does not explicitly state whether it is a host
or a peripheral.
When the driver probes, it looks to see if it's in the unknown
state, and only then will it read the register to auto-detect.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
EMIF tool for AM64 SK is now updated to 0.8.0 that includes
* disabled Write DQ training
* improve CA ODT to 60 ohms
The lpddr4 enabled with periodic WDQ training is causing periodic 26us
stall. This makes the SoC stall without doing anything which leads to
R5 interrupt latency in TCM memory. Due to this periodic training there
are some outstanding CPU transactions waiting for the lpddr4 to complete.
Hence, disable the periodic write DQ training during the
non-initialization stage of lpddr4 which results in an approximate 1us
stall. Also, update the lpddr4 config to improve CA ODT by 60 ohms
The rationales are as follows:
- PI_WDQLVL_EN: 2 Bits register field to support write DQ leveling,
disable bit 1 that supports Write DQ during non-initialization to
avoid ~26us stall during code execution.
- MR11_DATA_F1/F2_x register fields value changed to 0x66 that changes
the CA ODT from 48ohm to 60ohm to improve the eye margin on CA bus by
increasing the signal swing.
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
There are no boards that define CONFIG_SYS_RESET_ADDR, so drop the
remaining comments referencing it and also the config_whitelist.txt entry.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: thomas@wytron.com.tw
There are no boards that define CONFIG_SYS_RESET_ADDRESS, so drop the
associated mpc8xx code that checks for it.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu>
This driver adds support for the keyboard on Apple Silicon laptops.
The controller for this keyboard sits on an SPI bus and uses an
Apple-specific HID over SPI protocol. The packets sent by this
controller for key presses and key releases are fairly simple and
are decoded directly by the code in this driver and converted into
standard Linux keycodes. The same controller handles the touchpad
found on these laptops. Packets for touchpad events are simply
ignored.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Add a driver for the SPI controller integrated on Apple SoCs.
This is necessary to support the keyboard on Apple Silicon laopts
since their keyboard uses an Apple-specific HID over SPI protocol.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Add a driver for the NVMe storage controller integrated on
Apple SoCs. This NVMe controller isn't PCI based and deviates
from the NVMe standard in its implementation of the command
submission queue and the integration of an NVMMU that needs
to be managed. This commit tweaks the core NVMe code to
support the linear command submission queue implemented by
this controller. But setting up the submission queue and
managing the NVMMU controller is handled by implementing
the driver ops that were added in an earlier commit.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Tested-on: firefly-rk3399
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
The power management controller found on Apple SoCs als provides
a way to reset all devices within a power domain. This is needed
to cleanly shutdown the NVMe controller before we hand over
control to the OS.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add a function to disable the NVMe controller. This will be used
to let the driver for the NVMe storage integrated on Apple SoCs
shutdown the NVMe controller such we can shutdown the NVMe
IOP controller in a clean way afterwards before handing control
to the OS.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
The NVMe storage controller integrated on Apple SoCs deviates
from the NVMe standard in two aspects. It uses a "linear"
submission queue and it integrates an NVMMU that needs to be
programmed for each NVMe command. Introduce driver ops such
that we can set up the linear submission queue and program the
NVMMU in the driver for this strange beast.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Most Apple IOPs run a firmware that is based on what Apple calls
RTKit. RTKit implements a common mailbox protocol. This code
provides an implementation of the AP side of this protocol,
providing a function to initialize RTKit-based firmwares as well
as a function to do a clean shutdown of this firmware.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
U-Boot is expected to support multiple generations of Apple SoCs
in a single binary with a single defconfig. Therefore it makes
more sense to set SYS_SOC to "apple".
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This mailbox driver provides a communication channel with the
Apple IOP controllers found on Apple SoCs. These IOP controllers
are used to implement various functions such as the System
Manegement Controller (SMC) and NVMe storage. It allows sending
and receiving a 96-bit message over a single channel.
The header file with the struct used for mailbox messages is taken
straight from Linux.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
Apple SoCs have an integrated NVMe controller that isn't connected
over a PCIe bus. In preparation for adding support for this NVMe
controller, split out the PCI support into its own file. This file
is selected through a new CONFIG_NVME_PCI Kconfig option, so do
a wholesale replacement of CONFIG_NVME with CONFIG_NVME_PCI.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
patman snake-case conversion
binman fit improvements
ACPI fixes and making MCFG available to ARM
[trini: Update scripts/pylint.base]
Signed-off-by: Tom Rini <trini@konsulko.com>
The Pogoplug E02 board has the network chip Marvell 88E1116R. Convert
to Driver Model and use uclass mvgbe and the compatible driver M88E1118R
to bring up Ethernet.
- Add board_eth_init(), CONFIG_DM_ETH, and CONFIG_PHY_MARVELL
to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- As the result of the migration to Driver Model, this u-boot image has
grown substantially (about 100K, give or take). The old envs location
at 0x60000 (384k) is no longer possible. Move it to 0xC0000 (768K).
- Miscellaneous changes: Move constants to .c file and remove header file
board/cloudengines/pogo_e02/pogo_e02.h, use CONFIG_SYS_THUMB_BUILD to
keep u-boot image under 512K, use BIT macro, and cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently it is possible to call "kwboot -b -t /dev/ttyUSB0" but not to
call "kwboot -b /dev/ttyUSB0".
Fix it by not trying to process the last argv[], which is non-getopt()
option (tty path) as the image path for -b.
Fixes: c513fe47dc ("tools: kwboot: Allow to use option -b without image path")
Reported-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
The Dockstar board has the network chip Marvell 88E1116R. Convert to
Ethernet driver model, and use uclass mvgbe and the compatible driver
M88E1118R to bring up Ethernet.
- Add CONFIG_DM_ETH and associated configs.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Add CONFIG_PHY_MARVELL to properly configure the network.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Miscellaneous changes: Move constants to .c file and remove
header file board/Seagate/dockstar/dockstar.h, use
CONFIG_SYS_THUMB_BUILD to keep u-boot image
under 512K, add CONFIG_HUSH_PARSER, use BIT macro, and cleanup comments.
- Note: This patch is a RESEND for a previous patch:
https://patchwork.ozlabs.org/project/uboot/patch/20210812051854.1340-2-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Quit esc sequence may be also in the middle of the read buffer.
Fix the detection for that case.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init(), CONFIG_DM_ETH, and CONFIG_PHY_MARVELL
to bring up Ethernet.
- Miscellaneous changes: Move constants to .c file and remove header file
board/iomega/iconnect/iconnect.h. Add CONFIG_HUSH_PARSER, use BIT macro,
and cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The Globalscale Technologies Dreamplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up both network
port 0 and 1. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add myself as maintainer (this board seems to be orphaned,
could not contact Jason Cooper using current email).
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/dreamplug/dreamplug.h, cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
We can now use same U-Boot images on both QEMU virt machine and QEMU
spike machine so let's update the QEMU RISC-V documentation.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Currently, if MTD NOR is enabled then U-Boot tries to issue flash
commands even when CFI flash DT node is not present. This causes
access fault on RISC-V emulators or ISS which do not emulate CFI
flash. To handle this issue, we implement is_flash_available() for
qemu-riscv board which will return 1 only if CFI flash DT node is
present.
Fixes: d248627f9d ("riscv: qemu: Enable MTD NOR flash support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Quite a few RISC-V emulators and ISS (including Spike) have host
transfer interface (HTIF) based console. This patch adds HTIF
based console driver for RISC-V platforms which depends totally
on DT node for HTIF register base address.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The binman FIT entry type shares some code with the Section entry type.
This shared code is bound to grow, since FIT entries are conceptually a
variation of Section entries.
Make FIT entry type a subclass of Section entry type, simplifying it a
bit and providing us the features that Section implements. Also fix the
subentry alignment test which now attempts to write symbols to a
nonexistent SPL ELF test file by creating it first.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid AddMissingProperties() and SetCalculatedProperties() with FIT:
Signed-off-by: Simon Glass <sjg@chromium.org>
Binman can check for missing binary tools and prints warnings if
anything required for an image is missing. The implementation of this
for the Section entry only checks the subentries, presumably because
Section does not use any binary tools itself. However, this means the
check is also skipped for subclasses of Section which might need binary
tools.
Make sure missing binary tools are checked for subclasses of the Section
entry type as well, by calling the parent class' implementation in
the relevant Section method.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman keeps track of binary tools each entry wants to use. The
implementation of this for the FIT entry only adds "mkimage", but not
the tools that would be used by its subentries.
Register the binary tools that FIT subentries will use in addition to
the one FIT itself uses, and check their existence by copying the
appropriate method from Section entry type. Also add tests that check if
these subentries can use and warn about binary tools.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Binman tries to expand some entries into parts that make it up, e.g.
'u-boot' into a 'u-boot-expanded' section that contains 'u-boot-nodtb'
and 'u-boot-dtb'. Entries with child entries must call ExpandEntries()
on them to build a correct image, as it's possible that unexpanded child
entries have no data of their own. The FIT entry type doesn't currently
do this, which means putting a "u-boot" entry inside it doesn't work as
expected.
Implement ExpandEntries() for FIT and add a copy of a simple FIT image
test that checks subentry expansion in FIT entries.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
MCFG tables are used on multiple arches. Move to common ACPI lib.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use sizeof(*mcfg) instead of sizeof(*header)
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit d953137526 ("x86: Move SSDT table to a writer function")
introduced a bug where the actual MCFG entries are no longer generated.
Cc: Simon Glass <sjg@chromium.org>
Fixes: d953137526 ("x86: Move SSDT table to a writer function")
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
if CONFIG_DM_STDIO is defined but SERIAL_PRESENT not,
gcc drops warnings for serial_stub_* functions
that they are defined but not used.
Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
nulldev_serial_input is static and not used in this file,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This method has the same name as its class which is confusing. It is also
annoying when searching the code.
It builds a string with a colour, so rename it to build().
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename this function so that when we convert it to snake case it will not
conflict with the built-in print() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use parenthesis for the device_get_ops macro argument. This prevents
errors when using an expression for the parameter.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
sdl.c is compiled against the SDL library.
Trying to redefine wchar_t with -fshort-wchar is not necessary
and leads to build failures when compiling against musl.
Cc: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building for a custom board, it is quite common to maintain a
private branch which include some defconfig and .dts files. But to
hook up those .dts files requires modifying a file "belonging" to
upstream U-Boot, the arch/*/dts/Makefile. Forward-porting that branch
to a newer upstream then often results in a conflict which, while it
is trivial to resolve by hand, makes it harder to have a CI do "try to
build our board against latest upstream".
The .config usually includes information on precisely what .dtb(s) are
needed, so to avoid having to modify the Makefile, simply add the
files in (SPL_)OF_LIST to dtb-y.
A technicality is that (SPL_)OF_LIST is not always defined, so rework
the Kconfig symbols so that (SPL_)OF_LIST is always defined (when
(SPL_)OF_CONTROL), but only prompted for in the cases which used to be
their "depends on".
nios2 and microblaze already have something like this in their
dts/Makefile, and the rationale in commit 41f59f6853 is similar to
the above. So this simply generalizes existing practice. Followup
patches could remove the logic in those two makefiles, just as there's
potential for moving some common boilerplate from all the
arch/*/dts/Makefile files to the new scripts/Makefile.dts.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Assorted general code cleanups to make sure we use the right macros
and use them correctly and buildman updates around kconfig.h itself.
- Convert some IDE and SCSI symbols to Kconfig.
- Convert CONFIG_REMAKE_ELF
- Introduce conversion deadline for DM_SCSI.
Very few boards remain to be migrated:
am57xx_hs_evm_usb
controlcenterdc
highbank
ls1021atsn_qspi
ls1021atsn_sdcard
ls1021atwr_sdcard_ifc_SECURE_BOOT
ls1046ardb_sdcard_SECURE_BOOT
ls1088ardb_sdcard_qspi_SECURE_BOOT
omap5_uevm
pg_wcom_expu1
pg_wcom_seli8
sandbox
sandbox64
sandbox_flattree
sandbox_noinst
sandbox_spl
tools-only
Addd a migration deadline for a year out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This converts the following to Kconfig:
CONFIG_SCSI_AHCI_PLAT
CONFIG_SYS_SCSI_MAX_SCSI_ID
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SATA_MAX_DEVICE
Drop CONFIG_SCSI for everything except the sandbox build. We only need
one build for tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This is defined based on two other CONFIGs for all boards except sandbox
and durian.
For sandbox the value does not matter. For durian the value seems
excessive.
Drop the option completely, to simplify configuration and reduce the
number of things we need to convert to Kconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
At present all ahci drivers depend on AHCI except for DWC_AHCI. But no
boards enable that without also enabling AHCI:
/tools/moveconfig.py -f ~AHCI DWC_AHCI
0 matches
Group them together and sort them in order by Kconfig name (except for
AHCI_MVEBU which uses a different naming convention).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
No boards use this driver without CONFIG_BLK, so clean up the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Move the SATA options inside an 'if SATA' part, so they are grouped.
Fix the 'Complient' typo while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
No boards currently use SATA without BLK:
./tools/moveconfig.py -f SATA ~BLK
0 matches
Make SATA depend on BLK to avoid any future confusion. Drop the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This is not used in U-Boot and has not been converted to driver model.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This converts the following to Kconfig:
CONFIG_SYS_IDE_MAXBUS
CONFIG_SYS_IDE_MAXDEVICE
CONFIG_SYS_ATA_BASE_ADDR
CONFIG_SYS_ATA_STRIDE
CONFIG_SYS_ATA_DATA_OFFSET
CONFIG_SYS_ATA_REG_OFFSET
CONFIG_SYS_ATA_ALT_OFFSET
CONFIG_SYS_ATA_IDE0_OFFSET
CONFIG_SYS_ATA_IDE1_OFFSET
CONFIG_ATAPI
CONFIG_IDE_RESET
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add a -a option to specify changes to the config before the build
commences. For example
buildman -a ~CONFIG_CMDLINE
disables CONFIG_CMDLINE before doing the build.
This makes it easier to try things out as well as to write tests without
creating a new board or manually manging the .config file.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a thread crashes it is helpful to try the operation again with
threading disabled. Add a hint about that.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the only straightforward way to write tests that need a
slightly different configuration is to create a new board with its own
configuration. This is cumbersome.
It would be useful if buildman could adjust the configuration of a build
on the fly. In preparation for this, add a utility library which can
modify a .config file according to various parameters passed to it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the full horror of the Python traceback is shown by default. It
is normally only useful for debugging. Turn it off by default and add a
--debug flag to enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function does not run the doctests. Allow the caller to
pass these modules in as strings.
Update patman to use this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new IF_ENABLED_INT() feature to avoid needing our own inline
function to handle this case. Tidy up the logic to ensure that the value
is only used when present. Update the 'expected' comment also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if an optional Kconfig value needs to be used it must be
bracketed by #ifdef. For example, with this Kconfig setup:
config WIBBLE
bool "Support wibbles, the world needs more wibbles"
config WIBBLE_ADDR
hex "Address of the wibble"
depends on WIBBLE
then the following code must be used:
#ifdef CONFIG_WIBBLE
static void handle_wibble(void)
{
int val = CONFIG_WIBBLE_ADDR;
...
}
#endif
static void init_machine()
{
...
#ifdef CONFIG_WIBBLE
handle_wibble();
#endif
}
Add a new IF_ENABLED_INT() to help with this. So now it is possible to
write, without #ifdefs:
static void handle_wibble(void)
{
int val = IF_ENABLED_INT(CONFIG_WIBBLE, CONFIG_WIBBLE_ADDR);
...
}
static void init_machine()
{
...
if (IS_ENABLED(CONFIG_WIBBLE))
handle_wibble();
}
The value will be CONFIG_WIBBLE_ADDR if CONFIG_WIBBLE is defined and will
produce a build error if not.. This allows us to reduce the use of #ifdef
in the code, ensuring that the compiler still checks the code even if it
is not ultimately used for a particular build.
Add a CONFIG_IF_ENABLED_INT() version as well.
If an attempt is made to use a value that does not exist (i.e. when the
conditional is not enabled), an error about a non-existing function is
generated, e.g.:
common/bloblist.c:447: undefined reference to `invalid_use_of_IF_ENABLED_INT'
Signed-off-by: Simon Glass <sjg@chromium.org>
The config_enabled() macro currently uses 0 as the default value. Update
it to allow any value, so we can pass it something else, such as a
non-existent function, to produce a build error if it is not defined.
Also tidy up the code style for IS_ENABLED() and drop the unnecessary
brackets (the value is a simple 0 or 1).
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the IS_ENABLED() macro has extra brackets, making it possible
to write:
if IS_ENABLED(CONFIG_XXX)
but it is a bit confusing. Add the missing brackets.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This is supposed to be a build-system flag. Move it there so we can
define it before linux/kconfig.h is included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Seems that we need the waterlevel setting not only for PIO mode as
without this at least the i.MX 8M Mini won't boot anymore when being
written by such a U-Boot. Corruption has also been observed both on
the i.MX 6 as well as i.MX 8M Mini when using ums on the eMMC. Fix
this by setting the watermark level again regardless of whether in
DMA or PIO mode.
Fixes: 41c6a22fc2 ("mmc: fsl_esdhc_imx: simplify esdhc_setup_data()")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
In case the eMMC contains any GP partitions or user sets up new GP
partitions, the size of these GP partitions reduce the size of the
USER partition. Subtract the size of those GP partitions from the
calculated size of USER partition when using `user enh start -`.
The following test used to fail before:
```
u-boot=> mmc hwpartition gp1 524288 enh user enh 0 - wrrel on check
Partition configuration:
User Enhanced Start: 0 Bytes
User Enhanced Size: 1.8 GiB
User partition write reliability: on
GP1 Capacity: 256 MiB ENH
No GP2 partition
No GP3 partition
No GP4 partition
Total enhanced size exceeds maximum (261 > 229)
Failed!
```
The test now passes:
```
u-boot=> mmc hwpartition gp1 524288 enh user enh 0 - wrrel on check
Partition configuration:
User Enhanced Start: 0 Bytes
User Enhanced Size: 1.5 GiB
User partition write reliability: on
GP1 Capacity: 256 MiB ENH
No GP2 partition
No GP3 partition
No GP4 partition
```
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
In some cases, a single SerDes instance can be shared between two different
processors, each using a separate link. In these cases, the SerDes
configuration is done in an earlier boot stage. Therefore, add support to
skip reconfiguring, if it is was already configured beforehand.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add support for multilink configuration of Sierra PHY. Currently,
maximum two links are supported.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
PIPE phy status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Check if PMA cmn_ready is set indicating the startup process is complete.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add PHY PCS common register configuration sequences for single link.
Update single link PCIe register sequence accordingly.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
No functional change. Rename some regmap variables as mentioned in Sierra
register description documentation.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Sierra driver currently supports single link configurations only. Prepare
driver to support multilink multiprotocol configurations along with
different SSC modes.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The PLL_CMNLC clocks are modelled as a child clock device of seirra. In the
function device_probe, the corresponding clocks are probed before calling
the device's probe. The PLL_CMNLC mux clock can only be created after the
device's probe. Therefore, move assigned-clocks and assigned-clock-parents
to the link nodes in U-Boot device tree file.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has
two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from
pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as a clock so that it's
possible to select one of these two inputs from device tree.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add missing clk_disable_unprepare() in cdns_sierra_phy_remove().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Instead of having separate structure members for each input clock, add
an array for the input clocks within "struct cdns_sierra_phy". This is
in preparation for adding more input clocks required for supporting
additional clock combination.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
No functional change. Group devm_reset_control_get() and
devm_reset_control_get_optional() to a separate function.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
No functional change. Group all devm_clk_get_optional() to a
separate function.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Cadence Sierra PHY driver registers PHY using devm_phy_create()
for all sub-nodes of Sierra device tree node. However Sierra device
tree node can have sub-nodes for the various clocks in addtion to the
PHY. Use devm_phy_create() only for nodes with name "phy" (or "link"
for old device tree) which represent the actual PHY.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Commit 39b823381d ("phy: cadence: Add driver for Sierra PHY")
de-asserts PHY_RESET even before the configurations are loaded in
phy_init(). However PHY_RESET should be de-asserted only after
all the configurations has been initialized, instead of de-asserting
in probe. Fix it here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The driver enables IPU support. Basically enables the clocks,
timers, watchdog timers and bare minimal MMU and supports
loading the firmware from mmc.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: fix compile warnings]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Add remoteproc resource handling helpers. These functions
are primarily to parse the resource table and to handle
different types of resources. Carveout, devmem, trace &
vring resources are handled.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: fix redefinition of "struct resource_table" and compile warnings ]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Add find_next_zero_area to fetch the next zero area in the map.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
First check the presence of the ipu firmware in the boot partition.
If present enable the ipu and the related clocks & then move
on to load the firmware and eventually start remoteproc IPU1/IPU2.
do_enable_clocks by default puts the clock domains into auto
which does not work well with reset. Hence adding do_enable_ipu_clocks
function.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: fix IPU1_LOAD_ADDR and compile warnings]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Add a reset driver to bring IPs out of reset.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: reset_ops structure member "free" has been renamed to "rfree",
use the latter instead]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
There is a 4 bit VARIANT number inside the JTAGID register that TI
increments any time a new variant for a chip is produced. Each
family of TI's SoCs uses a different versioning scheme based off
that VARIANT number.
CC: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
J721S2 can support two instances for DDR. Therefore, add the device support
for the same and use 4266MT/s as DDR frequency.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The EVM architecture for J721S2 is similar to that of J721E and J7200. It
is as follows,
+------------------------------------------------------+
| +-------------------------------------------+ |
| | | |
| | Add-on Card 1 Options | |
| | | |
| +-------------------------------------------+ |
| |
| |
| +-------------------+ |
| | | |
| | SOM | |
| +--------------+ | | |
| | | | | |
| | Add-on | +-------------------+ |
| | Card 2 | | Power Supply
| | Options | | |
| | | | |
| +--------------+ | <---
+------------------------------------------------------+
Common Processor Board
Common Processor board is the baseboard that contains most of the actual
connectors, power supply etc. The System on Module (SoM) is plugged on to
the common processor baord. Therefore, add support for peripherals brought
out in the common processor board.
Link to Common Processor Board: https://www.ti.com/lit/zip/sprr439
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
A System on Module (SoM) contains the SoC, PMIC, DDR and basic high speed
components necessary for functionality. Therefore, add support for the
components present on the SoM.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The J721S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive ADAS applications and
industrial applications requiring AI at the network edge. This SoC extends
the Jacinto 7 family of SoCs with focus on lowering system costs and power
while providing interfaces, memory architecture and compute performance for
single and multi-sensor applications.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep capable
dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x
floating point Vector DSP.
* 3D GPU: Automotive grade IMG BXS-4-64
* Vision Processing Accelerator (VPAC) with image signal processor and
Depth and Motion Processing Accelerator (DMPAC)
* Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface.
* Two Ethernet ports with RGMII support.
* Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems,
* Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller,
QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL
management.
See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021)
for further details: http://www.ti.com/lit/pdf/spruj28
Introduce basic support for the J721S2 SoC.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
In Multi DDR subystems with interleaving support, the following needs to
configured,
- interleaving granular size and region
- EMIFs to be enabled
- EMIFs with ecc to be enabled
- EMIF separated or interleaved
- number of cycles of unsuccessful EMIF arbitration to wait before
arbitrating for a different EMIF port, by default set to 3
Add support for configuring all the above by using a MSMC device
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The current driver only supports single instance of DRR subsystem. Add
support for probing multiple instances of DDR subsystem.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add a pointer to ddr instance int the lpddr4_privatedata_s structure for
supporting mutliple instances of DDR in the drivers.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This adds initial support for the Toradex Verdin iMX8M Plus Quad 4GB WB
IT V1.0B module. They are strapped to boot from eFuses which are factory
fused to properly boot from their on-module eMMC. U-Boot supports
booting from the on-module eMMC only, SDP support is disabled for now
due to missing i.MX 8M Plus USB support.
Functionality wise the following is known to be working:
- eMMC, 8-bit and 4-bit MMC/SD card slots
- Ethernet both on-module eQoS and FEC (requires PHY on carrier board)
- GPIOs
- I2C
Boot sequence is:
SPL ---> ATF (TF-A) ---> U-boot proper
ATF, U-boot proper and u-boot.dtb images are packed into a FIT image,
loaded by SPL.
Boot:
U-Boot SPL 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100)
Quad die, dual rank failed, attempting dual die, single rank configuration.
Normal Boot
WDT: Started watchdog@30280000 with servicing (60s timeout)
Trying to boot from BOOTROM
Find img info 0x&48025a00, size 872
Need continue download 1024
Download 779264, Total size 780424
NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b
NOTICE: BL31: Built : 16:52:37, Aug 26 2021
U-Boot 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100)
CPU: Freescale i.MX8MP[8] rev1.1 at 1200 MHz
Reset cause: POR
DRAM: 8 GiB
Core: 78 devices, 18 uclasses, devicetree: separate
WDT: Started watchdog@30280000 with servicing (60s timeout)
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Model: Toradex Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT V1.0B, Serial# 06817281
Carrier: Toradex Verdin Development Board V1.1A, Serial# 10807609
Setting variant to wifi
Net: Hard-coding pdata->enetaddr
eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME]
Hit any key to stop autoboot: 0
Verdin iMX8MP #
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Pull request for efi-2022-04-rc2-2
UEFI
* add unit test for RISCV_EFI_BOOT_PROTOCOL
* disable UEFI for Colibri VF610
* add handle for UART
* fix printing of Unicode strings
* simplify enumeration of block devices
malloc() functions are declared via stdlib.h. Including malloc.h can lead
to build errors e.g. on OS-X.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When we have the block descriptor we can simply access the device. Drop
the unnecessary function call.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use this function rather than following the pointers, since it is there
for this purpose.
Add the uclass name to the debug call at the end of dp_fill() since it is
quite useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The operation of this function can be confusing. Add some debugging so
we can see what it is doing and when it is called.
Also drop the preprocessor usage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: heinrich Schuchardt <xypron.glpk@gmx.de>
When loading an EFI binary via the UART we assign a UART device path to it.
But we lack a handle with that device path.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The UEFI specification concerning Uart() device path nodes has been
clarified:
Parity and stop bits can either both use keywords or both use
numbers but numbers and keywords should not be mixed.
Let's go for keywords as this is what EDK II does. For illegal
values fall back to numbers.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The printing of a file path node must properly handle:
* odd length of the device path node
* UTF-16 character only partially contained in device path node
* buffer overflow due to very long file path
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Check that snprintf() returns the correct required buffer length and prints
the correct string for UTF-16 strings.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The test for the RISCV_EFI_BOOT_PROTOCOL retrieves the boot hart id via the
protocol and compares it to the value of the boot hart id in the device
tree. The boot hart id is already retrieved from the device tree in the FDT
test.
Merge the two tests to avoid code duplication.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The size of the board file is limited to 520192 bytes. This conflicts with
the size requirement for the UEFI code.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Update to the 5.16 imx8mq dts files and dt bindings
Changes since v1:
Dropped rfkill.h that is not in linux mainline yet.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The previous code wrote the contents of the fuse as is in the
REFTOP_VBGADJ[2:0], but this was wrong if you consider the contents of
the table in the code comment. This table is also different from the
table in the commit description. But then, which of the two is correct?
If it is assumed that an unprogrammed fuse has a value of 0 then for
backward compatibility of the code REFTOP_VBGADJ[2:0] must be set to
6 (b'110). Therefore, the table in the code comment can be considered
correct as well as this patch.
Fixes: 97c16dc8bf ("imx: mx6ull: update the REFTOP_VBGADJ setting")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing. Remove
the superfluous one.
Signed-off-by: Adam Ford <aford173@gmail.com>
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing. Remove
the superfluous one.
Signed-off-by: Adam Ford <aford173@gmail.com>
The Linux Kernel Image size for arm64 is still growing.
A Kernel with 54 MB at load address 0x80280000 overlaps
with fdt_addr at 0x83000000. So let's increase it to 0x84000000
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
The i.MX8M Nano can boot over USB using the boot ROM instead of
adding extra code to SPL to support USB drivers, etc. However,
when booting from USB, the environment doesnt' know where to load
and causes a hang. Fix this hang by supporting CONFIG_ENV_IS_NOWHERE=y.
It only falls back to this condition when booting from USB, so it
does not impact MMC booting.
Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Fix address of the pad control register
(IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2. This seems
to be a typo but it leads to an exception when pinctrl is applied due to
wrong memory address access.
Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Fixes: 748f908cc882 ("arm64: add basic DTS for i.MX8MQ")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Picked from Linux 5cfad4f45806f ("arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0")
Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options for iMX8M SoCs
in case they should be operated faster, e.g. to improve boot time.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Linux uses slightly different divider settings for the 1.2 GHz PLL
configuration, adjust the coefficients to match Linux.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
When regulator consumer attempts to set enabled DVS regulator voltage,
the driver aborts with "Only DVS bucks can be changed when enabled".
In case the regulator is already set to specified voltage, do nothing
instead of failing outright.
When regulator consumer attempts to set enables regulator which cannot
be controlled because it is already always enabled, the driver aborts
with -EINVAL. Again, do nothing in such case and return 0, because the
request is really fulfilled, the regulator is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock
bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in
order to avoid AXI bus errors when GPU is enabled on the platform.
TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable
derivatives, but is missing a lock settings to be applied.
Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have
it implemented.
Since we're here, provide also names to bits from TRM instead of using
BIT() macro in the code.
Fixes: deca6cfbf5 ("imx8mn: set BYPASS ID SWAP to avoid AXI bus errors")
Fixes: a07c718129 ("imx8mp: set BYPASS ID SWAP to avoid AXI bus errors")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
With the updated device tree's having USB support, enable in
U-Boot. This also requires the addition of the imx8m power
domain, since the USB is gated by the power domain controller.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Resync the SOM and baseboar files with the device trees that will
be included in 5.17-RC1 when it's cut. This will improve pinmuxing
for USDHC1 and add USB functionality.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Sync with the latest DDR initialization from Phytec, which
uses version 1.2 of NXP's i.MX7D DRAM Register Programming Aid
spreadsheet.
This updated DDR initialization fixes occasional system freeze.
Signed-off-by: Fabio Estevam <festevam@denx.de>
As suggested in commit 028abfd9b1 ("imx8mm-evk: Generate a single
bootable flash.bin again") for imx8mm_evk, it is possible to produce
single bootable image via binman. This restores the original behavior in
distros, where only one boot container is used to create target image.
Perform similar adaptions in order to provide single bootable image for
imx8mn-ddr4-evk derivate.
Update documentation to drop additional step of copying u-boot.itb
Fixes: 353dfe4b43 ("imx8mn-ddr4-evk: switch to use binman")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Commit 72d81360aa ("global: Convert CONFIG_LOADADDR to
CONFIG_SYS_LOADADDR") dropped the usage of LOADADDR and replaced it with
SYS_LOADADDR.
Use the correct macro in environment by replacing CONFIG_LOADADDR with
CONFIG_SYS_LOADADDR.
Fixes: d75ebf3482 ("imx: ventana: fix splash logo drawing")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Add fdt_addr_r fdtfile which used by distro boot, and cleanup legacy
environment variables.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Some of the nodes were named using a underscore, so rectify this and
consistenly use dashes.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.
Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.
Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.
Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
When using a board variant that selects the lvds specific dtb the
*.u-boot.dtsi file will not be included. To have a lvds dtb specific
u-boot.dtsi file move this part to a common board u-boot.dtsi file and
include this in the board base u-boot.dtsi and create an additional one
for the lvds variant.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Without this patch the bcb struct could be located at an odd address
which resulted in data not being copied to the buffer.
Here was the repro steps (from Mattijs):
=> mmc dev 1
=> bcb load 1 misc
=> bcb dump command
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> part start mmc 1 misc misc_start
=> mmc read ${loadaddr} ${misc_start} 4
=> bcb load 1 misc
=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 62 6f 6f 74 6c 6f 61
00000010: 64 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00
This behavior was observed on an Amlogic A311D (ARM64) platform with a
recent GCC toolchain (11.2.0) but is most likely affecting other
platforms.
To avoid issues the structure is aligned on DMA minimum alignment value
as it is passed directly to the read function.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3
We changed to single flash.bin now. So dfu_alt_info should be modified
to reflect this change.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add support of secondary boot address for imx8mn. The secondary
boot address is hardcoded in the fuse. The value is calculated
from there according to the following description:
The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows:
- Secondary boot is disabled if fuse value is bigger than 10, n = fuse
value bigger than 10.
- n == 0: Offset = 4MB
- n == 2: Offset = 1MB
- Others & n <= 10 : Offset = 1MB*2^n
- For FlexSPI boot, the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Similar to what has been done before with c5437e5b for u-boot proper, we
enable the SMP bit for SPL as well. This is necessary when SDP booting
straight into Linux, i.e. falcon boot. When SDP boot mode is active, the
ROM code does not set this bit which makes the caches not work once
activated in Linux.
On an i.MX6ULL (528MHz), this reduces a minimal kernel's boot time into
an initramfs shell from ~6.1s down to ~1.2s.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Skip running arch/arm/mach-imx flash.bin generation in case BINMAN is
enabled, otherwise the target in arch/arm/mach-imx/Makefile regenerates
the flash.bin again and produces corrupted result.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Synchronize DH DHCOM DTs with Linux commit 25960cafa06e ("Linux 5.15.12").
There is no functional change to the resulting DTs. The imx6qdl-dhcom-pdk2.dtsi
had to be adjusted with additional headers, gpio.h, pwm.h, input.h, else
the DT cannot be compiled, the same change is likely necessary in Linux.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add labels to remaining anatop regulators, so their supplies can be
assigned in board DTs. This is similar to Linux kernel commit
93385546ba369 ("ARM: dts: imx6qdl-sabresd: Assign corresponding power supply for LDOs")
except it does not contain the unrelated sabresd changes.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The new configs/imx28_xea_sb_defconfig is introduced to facilitate
building the single binary u-boot.sb fox XEA board.
The biggest distinction from "normal" XEA imx28_xea_sb_defconfig is
support for USB mass storage devices (pen drives).
To achieve that, the CONFIG_DM_USB is enabled and supported.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Now the dts information corresponds to the one available in the kernel.
With this patch applied the 'mtd list' shows proper names and
offsets for MTD partitions.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change provides the possibility to build XEA (imx287 based) board
U-Boot as a single binary (without support for CONFIG_SPL_FRAMEWORK).
The generated u-boot.sb can be used in the factory environment to for
example perform initial setup or HW testing.
It can be used with 'uuu' utility
(SDPS: boot -f /srv/tftp/xea/u-boot.sb)
In the configs/imx28_xea_defconfig one needs to disable following configs:
# CONFIG_SPL_BLK is not set
# CONFIG_SPL_FRAMEWORK is not set
The board_init_ll() is used in arch/arm/cpu/arm926ejs/mxs/start.S, which
is utilized when CONFIG_SPL_FRAMEWORK is disabled.
However, when it is enabled - the arch/arm/cpu/arm926ejs/start.S is used,
which requires the lowlevel_init() function.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
With the current configuration provided in mxsimage{-spl}.mx28.cfg the
size of SPL binary has been constrained to 32 KiB, due to "LOAD IVT"
command with 0x8000 offset.
The problem was that, the imx28 ROM takes the u-boot.sb and then
extracts from it the IVT header and places it on the 0x8000 OCRAM offset
overwriting any valid (i.e. loaded from eMMC or SPI-NOR) SPL code. This
bug was unnoticed as the overwrite size was just 32 bytes, so the
probability that some important code is altered was low.
However, in the XEA board (where the SPL size is ~39KiB), the overwritten
data was `(struct dm_spi_ops *) 0x800c <mxs_spi_ops>`, which is used
during the boot process.
As a result the SPL execution code hanged with "undefined instruction"
abort as callbacks (with wrong addresses) from it were called.
The fix is to change the OCRAM's offset where IVT is loaded to 0xE000,
so the SPL can grow up to ~57KiB (the maximal size of OCRAM memory
available is 0xE3FC).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may
have the ESAI_TX0 functionality, not ESAI_T0.
Also, NXP's i.MX Config Tools 10.0 generates dtsi with the
MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly.
There are no devicetree users in mainline that use the old name,
so just remove the old entry.
Fixes: f8ca22b8de ("arm: dts: imx6ull: add pinctrl defines")
Reported-by: George Makarov <georgemakarov1@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Use imx6_src_get_boot_mode() instead of manually reading SBMR1. The
existing function has proper handling for software overrides of the
bootdevice which can happen, for example, when booting from an alternate
source using `bmode`.
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The PDK2 board is capable of running both 100M and 1G ethernet. However,
the i.MX6 has only one ethernet MAC, so it is possible to configure
either 100M or 1G Ethernet. In case of 100M option, the PHY is on the
SoM and the signals are routed to a RJ45 port. For 1G the PHY is on
the PDK2 board with another RJ45 port. 100M and 1G ethernet use
different signal pins from the i.MX6, but share the MDIO bus.
This SoM board combination is used to demonstrate how to enable 1G
ethernet configuration.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
If `sb_load_cmdfile()` fails to open the configuration file it will jump
to error handling where the code will try to `fclose()` the FILE pointer
which is NULL causing `mkimage` to segfault.
This patch removes the label for error handling and instead returns
immediately which skips the `fclose()` and prevents the segfault. The
errno is also described in the error message to guide users.
Signed-off-by: Mattias Hansson <hansson.mattias@gmail.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
The FXL6408 GPIO expander manages critical devices,
including on-module USB hub. Configure the expander to
switch the USB hub into bypass mode, allowing to use
on-carrier-board USB hub.
Signed-off-by: Oleksandr Suvorov <cryosay@gmail.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Previously these two options are called CONFIG_SPL_MMC_SUPPORT
and CONFIG_SPL_SERIAL_SUPPORT. During the transition they are
removed by accident. Thus adding them back.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Extension boards can be added to Compulab's iot-gate-imx8mm.
We implement extension board manager for detecting the extension
boards.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
After acking the requested frequency, should wait the ack bit clear
by DDR controller and check the DFS interrupt for next request polling.
Otherwise, the next polling of request bit will get previous value
that DDR controller have not cleared it, so a wrong request frequency
is used.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On i.MX8ULP, The dram config timing need to be saved into sram for
ddr retention when APD enter PD mode, so add this support on i.MX8ULP.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The DDRLOCKED bit in CGC2 DDRCLK will auto lock up and down by HW
according to DDR DIV updating or DDR CLK halt status change. So DDR
PCC disable/enable will trigger the lock up/down flow. We
need wait until unlock to ensure clock is ready.
And before configuring the DDRCLK DIV, we need polling the DDRLOCKED
until it is unlocked. Otherwise writing ti DIV bits will not set.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This patch implements enable_adc1_clk() to enable or disable the ADC1
clock on i.MX8ULP.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Get the MAC address from fuse bank5 word 3 and 4. It has
MSB first at lowest address, so have a reverse order with other
iMX used in mac.c
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When LPAV is allocated to RTD, the LPAV won't be reset. So we have to
reset DCNano and MIPI DSI in u-boot before enabling the drivers
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The LPAV is not allocated to APD when dual boot, so LPAV won't
reset when APD is reset. We have to explicitly reset the DDR,
otherwise its initialization will fail.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0
LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision.
A0.2 will fix the issue in ROM. But A0.1 we have to workaround
it in SPL by setting LPOSCCTRL BIASCURRENT again.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Remove the freescale vendor name from CPU revision print to align
with other i.MX platforms
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The setting does not have effect because we should set it after
power on the PS16 for NIC AV.
So move it after upower_init which has powered on all PS
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To avoid DCNANO underrun issue on high loading test, set its
read Qos on NIC_LPAV to highest
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The board use IO9 of PCA6416 on LPI2C0 and TPM0 for MIPI DSI MUX and
backlight. However the LPI2C0 and TPM0 are M33 resources, in this
patch we simply access them, but this is a temporary solution.
We will modify it when M33 FW changes to set MIPI DSI panel as default
path and enable backlight after reset.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the DSI clock enable and disable with PCC reset used.
Add the LCD pixel clock calculation and configuration for DCNano
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Assign the PXP/HIFI4/EPDC to APD domain, otherwise APD not
able to receive interrupts from the modules.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When single boot, assign AP domain as the master domain of the LPAV.
Allocates LPAV master and slave resources like GPU, DCNano, MIPI-DSI
eDMA channel and eDMA request to APD
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
S400 enables RDC only when the DBD_EN is fused. Otherwise, the RDC
is allowed by all masters.
Current S400 has issue if the XRDC has released to A35, then A35 reset
will fail in ROM due to S400 fails to get XRDC.
So temp work around is checking the DBD_EN, if it is not fused, we
don't need to call release XRDC or TRDC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change boot device logic to also allow environment stored in fat and in
ext4 when booting from SD or from eMMC.
As the boot device check for SD and for eMMC was depending on
ENV_IS_IN_MMC being defined, change the ifdef blocks at env_get_location
to use IS_ENABLED instead for all modes, returning NOWHERE when no valid
mode is found.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Correct printf format for unsigned long long is %llx and not %llxx.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The imx28 uses following voltage supplies hierarchy:
VDD_5V (VDD_BAT) -> VDDIO -> VDDA -> VDDMEM
\-----> VDDD
One shall first enable DCDC on the parent source (VDDIO) and then
follow with its children.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Return the root clock values for MXC_CSPI_CLK, MXC_I2C_CLK,
MXC_UART_CLK and MXC_QSPI_CLK.
At least for the I2C clock the missing support leads to a wrong
configured I2C frequency. The expected value is 100kHz but the resulting
value is about 1MHz.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module
to have a working environment even if 3 blocks are bad.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
This is the promised second part of the sunxi PR for 2022.04, albeit
technially outside of the merge window. We were working on this full
steam since the beginning of the year, and it deserves to be merged,
I think.
The main attraction is support for the F1C100s SoC, which sports a
venerable ARM926 core. Support for this SoC and the LicheePi Nano board
has been in Linux for years, and U-Boot patches were posted mid last
year already.
The new SoC using ARMv5 also means that the bulk of the new code should
not touch any existing boards, although we did some refactorings first,
of course, which actually cleans up some existing sunxi code.
Compile tested for all 160 sunxi boards, and briefly tested on BananaPi M1,
OrangePi Zero, Pine64 and Pine-H64. Tested by others on their boards,
including F1C100s and F1C200s devices.
Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.
dt-bindings/dts are synced with 5.16.0
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add support for the suniv architecture, which is newer ARM9 SoCs by
Allwinner. The design of it seems to be a mixture of sun3i, sun4i and
sun6i.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The ARMv7 start code has support for saving some boot params at the
entry point, which is used by some SoCs to return to BROM.
Port this to ARM926EJ-S start code.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Remove some pointless #ifdefs from this file, as there are quite too
many of them already.
Some definitions don't really hurt to have in any case, so remove the
pointless CONFIG_MMC guard around CONFIG_MMC_SUNXI_SLOT.
The BOARD_SIZE_LIMIT applies regardless of ARM64 or not (now), so remove
that guard as well. The maximum number of MMC devices does not depend on
CONFIG_ENV_IS_IN_MMC, so move that out to simplify the file.
Last but not least CONFIG_SPL_BOARD_LOAD_IMAGE serves no real purpose
anymore: it's unconditionally defined for all sunxi boards, and protects
nothing applicable outside of sunxi code anymore. Just remove it.
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When we added Allwinner SoC support to ARMv8, we needed to pull in an
implementation of lowlevel_init() calling the C function s_init(), as
sunxi required it as this time.
The last few patches got rid of this bogus requirement, and as sunxi was
still the only user, we can now remove this lowlevel_init.S from ARMv8
altogether.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied
from the original BSP U-Boot. The comment speaks of this being required
before DRAM access gets enabled, but there is no indication that this
would actually be required that early.
Move this out of s_init(), into board_init_f(). Since this actually only
affects a very few older SoCs, the actual code goes into the cpu/armv7
directory, to move it out of the way for all other SoCs.
This also uses the opportunity to convert some #ifdefs over to the fancy
IS_ENABLED() macros used in actual C code.
We keep the s_init() stub around for now, since armv8's lowlevel_init
still relies on it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
According to their TRMs, Cortex ARMv7 CPUs with SMP support require the
ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB
maintenance operations are done. As we do those things still in start.S,
we need to move the SMPEN bit setting there, too.
This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR
very early in start.S, and moves sunxi boards over to use that instead
of the custom code we had in our board.c file (where it was called
technically too late).
In practice we got away with this so far, because at this point all the
other cores were still in reset, so any broadcasting would have been
ignored anyway. But it is architecturally cleaner to do it early, and
we move a core specific piece of code out of board.c.
This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few
years back, and moves the respective logic into the new Kconfig entry.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far all Allwinner based boards were doing some not-so-lowlevel-setup
in lowlevel's s_init() routine.
This includes the initial clock, timer and pinmux setup, among other
things. This is clearly out of the "absolute bare minimum to get started"
scope that lowlevel_init.S suggests for this function.
Since we have an SPL, which is called right after s_init(), move those
calls to our board_init_f() function. As we overwrite this only for
the SPL, this has the added benefit of not doing this setup *again*
shortly afterwards, when running U-Boot proper.
This makes gpio_init() to be called from the SPL only, so pull this code
into a CONFIG_SPL_BUILD protected part to avoid build warnings.
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
At present we use wide characters for Unicode but this is not necessary.
Change the code to use the 'u' literal instead. This helps to fix build
warnings for sandbox on the Raspberry Pi.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present we use wide characters for unicode but this is not necessary.
Change the code to use the 'u' literal instead. This helps to fix build
warnings for sandbox on rpi.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This resyncs us with the version found in v5.16 of the Linux kernel with
the following exceptions:
- Keep our u-boot specific tests / code area.
- Change the location of checkpatch.rst
- Drop the "use strscpy" test as we don't have that, but do have strlcpy
and want that used now.
- Keep debug/printf in the list for $logFunctions
This also syncs the spdxcheck.py tool and all the associated
documentation.
S
Signed-off-by: Simon Glass <sjg@chromium.org>
There is some code that tries to "reset" the SCTLR_ELx register early in
the boot process. The idea seems to be to guarantee some sane settings
that U-Boot actually relies on, for instance running in little-endian
mode, with the MMU off initially.
However the current code has multiple problems:
- For a start, no platform or config defines the symbol that would
enable that code.
- The code itself really only works if the bits that it tries to clear
are already cleared:
- If we run in big-endian mode initially, any previous loads would have
been wrong already. That applies to the (optional) relocation code,
but more prominently to the mask that it uses to clear those bits:
"ldr x1, =0xfdfffffa" looks innocent, but actually involves a memory
access to the literal pool, using the current endianness.
- If we run with the MMU enabled, we are probably doomed already. We
*could* hope that we are running with an identity mapping, but would
need to do some cache maintenance to avoid losing dirty cache lines.
- The idea of doing a read-modify-write of SCTLR is somewhat
questionable to begin with, because as the owner of the current
exception level we should initialise all bits of this register with a
certain fixed value.
- The code is unnecessarily complicated, and the function name is
misspelled.
While those problems *could* admittedly be fixed, the point that is does
not seem to be used at all at the moment tells me we should just remove
this code, and be it to not give a bad example.
If people care, I could introduce some proper SCTLR initialisation code.
We are about to work this out for the boot-wrapper[1] as we speak, but
apparently we got away without doing this in U-Boot ever since, so it
might not be worth the potential trouble.
[1] https://lore.kernel.org/linux-arm-kernel/20220114105653.3003399-7-mark.rutland@arm.com/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Since commit 93b1965322 ("Makefile: Only build dtc if needed"),
the sub directory scripts/dtc is never cleaned.
Adds the directory dtc to subdir to always clean it.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless
DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA
resources are not released thus leading to failures in kernel.
Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port
driver.
Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add the PDU001 board specific DT files to MAINTAINERS. This should
help for better tracking of changes to these files.
Signed-off-by: Felix Brack <fb@ltec.ch>
Setting LINUX_KERNEL_IMAGE_HEADER=y attempts to include an ARM64 Linux
kernel image header at the start of both U-Boot proper and SPL binaries.
However, some definitions that the image header uses are not included by
the SPL linker script, resulting in a build error. Include them the way
they are included in U-Boot proper's linker script to fix the error.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
ymodem_read_fit() driver will end copying up to BUF_SIZE boundary even
when requested size of copy operation is less than that.
For example, if offset = 0, size = 1440B, ymodem_read_fit() ends up
copying 2KB from offset = 0, to destination buffer addr
This causes data corruption when malloc'd buffer is passed during UART
boot since commit 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer
for loading images")
With this, UART boot works again on K3 (AM654, J7, AM64) family of
devices.
Fixes: 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer for loading images")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
For adding signing feature for capsule authentication to the host tool,
mkeficapsule, we will link gnutls library for crypto operation.
Since we need this command to complete the capsule authentication test
on sandbox in CI loop, necessary packages must be installed on the host.
See my patch, "tools: mkeficapsule: add firmware image signing."
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
If we just use fdtdec_get_addr_size_fixed to get "reg" it will use
64bit address cell to get the base address.
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible ="SiFive,FU500-soc", "fu500-soc", "sifive-soc", "simple-bus";
ranges;
L28: axidma@30010000 {
#dma-cells = <1>;
compatible = "xlnx,axi-dma-1.00.a";
axistream-connected = <&L27>;
axistream-control-connected = <&L27>;
clocks = <&L1>;
interrupt-parent = <&L6>;
interrupts = <32 33>;
reg = <0x30010000 0x4000>;
fdtdec_get_addr_size_fixed: reg: addr=3001000000004000
We should get the base address through its parent's address-cells and
size-cells settings. So we should use fdtdec_get_addr_size_auto_parent()
to get correct base address.
After applying this patch, we can get the correct base address of dma by
replacing fdtdec_get_addr_size_fixed() with
fdtdec_get_addr_size_auto_parent().
fdtdec_get_addr_size_auto_parent:
na=1, ns=1, fdtdec_get_addr_size_fixed: reg: addr=30010000
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Link: https://lore.kernel.org/r/20220120084128.1892101-1-andy.chiu@sifive.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The available ram can be limited by ram_top as that depends on the
reserved memory nodes provided by the device-tree (via
board_get_usable_ram_top), so make sure to respect ram_top when setting
up bootm_size to avoid overlapping reserved memory regions (e.g. memory
used by OP-TEE).
The same logic is available in env_get_bootm_size when bootm_size is
not defined by the default environment.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Populate mtd->dev with flash_info->dev which allows to get
full mtd information using the "mtd list" command.
Before, "mtd list" command returns :
List of MTD devices:
* nor0
- type: NOR flash
- block size: 0x40000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "nor0"
After this patch we get for example:
List of MTD devices:
* nor0
- device: flash@0
- parent: spi@40430000
- driver: cfi_flash
- path: /soc/spi@40430000/flash@0
- type: NOR flash
- block size: 0x40000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "nor0"
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 045ecf8992 ("configs: enable DM_ETH support for LS1046ARDB")
resulted in the PCI bus no longer being implicitly enumerated.
However, this is necessary for the fdt pcie fixups to work.
Therefore, similar to commit 8b6558bd41 ("board: ls1088ardb:
transition to DM_ETH"), pci_init() is now called in the board_init()
routine when CONFIG_DM_ETH is active.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
CC: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
IFC-NOR and QSPI are muxed on SoC.
So disable IFC node in dts if QSPI is enabled or disable QSPI node in dts
in case QSPI is not enabled.
"ifc/nor" will be changed to "memory-controller/nor" in linux. So need to
modify "ifc/nor" to "memory-controller/nor" in fdt_path_offset().
Signed-off-by: Jianpeng Bu <jianpeng.bu@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The initial patch had typos that caused four defconfigs to miss the
symbol transition to Kconfig. CONFIG_SYS_QE_FW_ADDR and
CONFIG_SYS_FMAN_FW_ADDR are currently initialized to 0 by default
on these builds, which prevents the firmware from loading.
Add the correct symbols to these defconfigs.
Fixes: a97a071d10 ("configs: fsl: migrate FMAN/QE specific defines to Kconfig")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The commit in the Fixes: tag below broke traffic through switch ports
where the SERDES protocol requires in-band autoneg and this requirement
isn't described in the device tree: SGMII, QSGMII, USXGMII (with
2500Base-X, in-band autoneg isn't supported).
The LS1028A-QDS boards are not yet ready for syncing their device trees
with Linux, since Ethernet is missing there (but has been submitted):
https://lore.kernel.org/lkml/20211112223457.10599-11-leoyang.li@nxp.com/
When agreement is reached for the Ethernet support in Linux, there will
be a sync for these boards as well. For now, just enable in-band autoneg
to fix the breakage.
Fixes: e3789a7262 ("net: dsa: felix: configure the in-band autoneg property based on OF node info")
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Allow device trees to be reused between Linux and U-Boot.
The source for these device trees is linux-next as of commit
bd8a9cd624c6 ("arm64: dts: ls1028a-rdb: update copyright"), which was
chosen because some changes needed to be done to the Linux DTs too,
before they could be shared:
https://lore.kernel.org/linux-arm-kernel/20211202141528.2450169-5-vladimir.oltean@nxp.com/T/#m6f63c92e75fa79a01144b2c2c6dc4776e7971395
There are two more commits on the RDB device tree which haven't been
picked up yet, because they have dependencies on the SoC device tree:
dd3d936a1b17 ("arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source")
b2e2d3e02fb6 ("arm64: dts: ls1028a-rdb: enable pwm0")
These will be picked up on the next resync.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reuse the scheme implemented by the Kontron SL28 boards in
commit d08011d7f9
("arm: dts: ls1028a: disable the PCIe controller by default")
and move the 'status = "okay"' lines for the PCIe controllers
inside a separate U-Boot dtsi for the LS1028A-RDB board. This way, the
existing Linux device tree can simply be dropped in.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no I2C peripheral on these buses on the reference design board,
and the Linux device tree does not enable them either.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no SPI peripheral on the LS1028A-RDB, therefore no reason to
enable these nodes in the U-Boot device tree (and Linux does not enable
them either).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In a bit of a blunder, the blamed commit in the Fixes: tag below made
the mscc_felix switch driver look at the 'managed = "in-band-status"'
device tree property, forgetting that the U-Boot device tree had not
been updated to include that property, whereas the Linux one does.
The switch is therefore described in the device tree as not requiring
in-band autoneg, but the PHY driver for VSC8514 (drivers/net/phy/mscc.c)
still enables that feature. This results in a mismatch => no traffic.
This patch is a copy-paste of the Ethernet device tree nodes from Linux,
which resolves that issue. The device tree update also renames the
Ethernet PHY labels.
Fixes: e3789a7262 ("net: dsa: felix: configure the in-band autoneg property based on OF node info")
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The nodes in the NXP LS1028A-RDB device tree are out of order, regroup
them alphabetically to have a simple delta when the Linux device tree is
brought in.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that all in-tree boards have been converted to the compatible
strings from Linux, delete the support for the ad-hoc "pcf2127-rtc" one.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LX2160A-RDB to use the compatible string that was established in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
During this board's sync with Linux device trees, it was observed that
it doesn't use the same compatible string for the RTC node as in U-Boot.
This change makes the RTC compatible strings match, for a smoother sync.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The LS1028A-QDS board won't be synced with the Linux device trees right
now, since those are currently still in progress (Ethernet is missing).
However, while we're at converting the RDB, it can be observed that the
same RTC is present on the two boards, and the wrong compatible string
is used in both places. This change updates the RTC from the QDS to use
the compatible string that was established in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LX2160A-QDS to use the compatible string that was established in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LS1088A-RDB to use the compatible string that was established in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
During the LS1028A-RDB sync with Linux device trees, it was observed
that the same RTC is present on the two boards, and the wrong compatible
string is used in both places. This change updates the RTC from the
LS1088A-QDS to use the compatible string that was established in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Allow this driver to be used by boards which inherit their device trees
from Linux. Compatibility is temporarily retained with the old
compatible string which is U-Boot specific, and will be removed after a
few changes.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This seems to be very similar to the already existing PCA9547, save for
the fact that it supports 0.8V and doesn't support 5V. In fact, it is so
similar to the PCA9547 that the NXP LS1028A-RDB board has been driving
this chip using a "nxp,pca9547" compatible string.
Create a new compatible for the PCA9847 (which is the same as in Linux)
and define the same operating parameters for it as for PCA9547.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
The current fixup of LX2160A PCIe nodes is based on non-production
rev1 silicon, and in Linux the nodes have been updated for rev2
silicon, so update the searching compatible string to match the
kernel changes. And for compatibility with the rev1 nodes, move
forward the board specific fixup.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Commit eb1986804d ("configs: enable DM_ETH support for LS1043ARDB")
resulted in the PCI bus no longer being implicitly enumerated.
However, this is necessary for the fdt pcie fixups to work.
Therefore, similar to commit 8b6558bd41 ("board: ls1088ardb:
transition to DM_ETH"), pci_init() is now called in the board_init()
routine when CONFIG_DM_ETH is active.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Camelia Groza <camelia.groza@nxp.com>
Acked-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The SCRATCHRW4 is only used in secure boot scenario that is unsupported by
our design, so this address can be stolen for storing POST status.
The SCRATCHRW4 is initialized to zero at core rest.
Using a DDR address was unfortunate choice, the DDR at boot time has a
random contend and it happens that sometimes is matching POST magic number.
This behavior can lead to undefined POST behavior and u-boot ending in
failbootcmd command.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Make it in a same way as on the other FOXMC products, this also helps to
avoid unwanted stop caused by some terminal servers that are sending junk
on the serial line.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Even not used by u-boot, this has to be inline with the hw and kernel dts.
U-boot partition table is defined by MTDPARTS_DEFAULT Kconfig.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch adds default defconfig for u-boot update version, the u-boot
update defconfig is a copy of the default (factory) defconfig with:
- adapted text base and environment addresses
- explicit flag that this is a field updated u-boot version
At the time of implementation this version is only used to verify the
update procedure, in future depend on the needs this defconfig can be
extended with additional options.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Field fail-safe u-boot update for pg-wcom-ls102x designs is introduced
with patch: 81fb05e.
This patch enables already added support by:
- Defining default u-boot build as bootpackage (factory) image.
- Defining u-boot update image location according to the EXPU1 NOR layout.
- Extending mtd partitions according defined EXPU1 NOR layout.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This was probably broken when mainlining, CONFIG_FSL_DEVICE_DISABLE is
not Kconfig but whitelisted.
It's fine to be without flag as this is always enabled for abec1020
(pg-wcom-ls102xa.h)
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch adds default defconfig for u-boot update version, the u-boot
update defconfig is a copy of the default (factory) defconfig with:
- adapted text base and environment addresses
- explicit flag that this is a field updated u-boot version
At the time of implementation this version is only used to verify the
update procedure, in future depend on the needs this defconfig can be
extended with additional options.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Field fail-safe u-boot update for pg-wcom-ls102x designs is introduced
with patch 81fb05e.
This patch enables already added support by:
- Defining default u-boot build as bootpackage (factory) image.
- Defining u-boot update image location according to the SELI8 NOR layout.
- Extending mtd partitions according defined SELI8 NOR layout.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Field fail-safe u-boot update procedure for pg-wcom boards is defined and
implemented by patch: 59b3403.
This patch invokes the update procedure for pg-wcom-ls102x designs during
early misc_init_f execution.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch provides possibility for field fail-safe u-boot updates.
The implementation can be used on all pg-wcom boards that are booting from
parallel NOR flash.
When used in a board design, provided check_for_uboot_update function will
start new u-boot at defined location if updateduboot envvar is set to yes.
With this implementation it is expected that factory programmed u-boot
will always stay as it is, and optionally new u-boot can be safely
programmed by embedded software when the unit is rolled out on the field.
It is expected check_for_uboot_update to be called early in execution
before relocation (*_f) once SoC is basically initialized and environment
can be read, with this possibilities to not be able to fix a u-boot bug by
a u-boot update are reduced to minimum.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The EBOOTCNT is a reserved persistent static memory area in QRIO,
and similar to BOOTCNT is intended to be used as boot counter location.
Comparable to BOOTCNT that is reserved for u-boot main bootcount
infrastructure, EBOOTCNT is intended to be used for pg-wcom board
specific purposes (e.g implementing early boot counter for fail-safe
u-boot update).
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The PHY for the debug interface was placed on the board for the
pg_wcom_ls102x. Hence only when a piggy is plugged, a RJ45 jack
including magnetics is connected to the MDI of the PHY. Without a
piggy the MDI lines are left floating and it does not make sense to
have an active debug PHY.
In case of expu1 an active PHY without a piggy even led to increased
jitter for syncE.
This patch only deactivates the prst line of the debug PHY when a piggy
is detected persent.
Signed-off-by: Rainer Boschung <rainer.boschung@hitachienergy.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is a request from HW designers to use this QRIO pin for detecting
DIC26_SELFTEST status instead of a GPIO pin.
This pin is typically used during production for executing POST tests and
starting test ESW bank.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Beside that mounted rgmii debug phy is 1000Mbps capable, the debug link
between the piggy board and the phy is 100Mbps only.
This leads to longer link establishment time when working in debug mode,
as phy tries to autoneg 1000Mbps.
This patch fixes the speed to 100Mbps and allows smother link establishment
time for the debug interface.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The Ten64 is a networking-oriented MiniITX board
using the NXP LS1088A SoC.
This patch provides the bare minimum to support
Ten64 boards under U-Boot for distroboot.
Some related drivers have not yet been submitted
and this basic support lacks some of the
opinionated defaults provided by our firmware
distribution.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Traverse Technologies Ten64 family boards use a microcontroller
to control low level board functions like startup and reset,
as well as holding details such as the board MAC address.
Communication between the CPU and microcontroller is via
I2C.
To keep the driver structure clean between the Ten64 board
file, DM_I2C, and a future utility command, this driver
has been implemented as a misc uclass device.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
mkimage segfaults due to the ASLR mechanism on MacOS arm64
It is required to use _dyld_get_image_vmaddr_slide()
to prevent segfault on MacOS arm64
This patch is based on the discussion
3b142045e8
Thanks to Jessica Clarke, Ronny Kotzschmar and ptpt52 github user
Reviewed-by: Jessica Clarke <jrtc27@jrtc27.com>
Signed-off-by: Sergey V. Lobanov <sergey@lobanov.in>
The current Makefile rule requires there to be a 'Module' line in the
pylint output, like this:
************* Module binman.fip_util
This line only appears if pylint has some comments about the module. We
cannot rely on it for naming.
Update the code to instead use the filename as the identifier for each
score, so rather than:
multiplexed_log 7.49
we output:
test_multiplexed_log.py 7.20
It is still easy to see which file the score relates to. In fact the new
naming is nicer since the full subdirectories are shown.
The avoids the problem where a module name is not produced, and the output
gets out of sync.
Regenerate pylint.base so we can start from the current baseline.
Signed-off-by: Simon Glass <sjg@chromium.org>
- kirkwood: Add Pogoplug-V4 support (Tony)
- kirkwood: GoFlex Home : Use Marvell PHY driver (Tony)
- Another set of kwboot improvements (Pali)
- Minor misc stuff
The GoFlex Home board has the network chip Marvell 88E1116R.
Use uclass mvgbe and the compatible driver M88E1118R to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: use CONFIG_SYS_THUMB_BUILD to keep u-boot image
under 512K, use BIT macro, and cleanup comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This should enable BootROM output on UART.
(At least on A385 BootROM this is broken, BootROM ignores this debug
flag and does not enable its output on UART if some valid image is
available in SPI-NOR.)
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When -D is specified then both bootmsg and debugmsg are not set, but
imgpath is set. Fix this check for valid and required parameters.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The select() and read() syscalls may be interrupted. Handle EINTR and
retry them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The write() syscall may be interrupted. Handle EINTR and retry it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This delay is not needed anymore since kwboot already handles retrying
logic for incomplete xmodem packets and also forces BootROM to flush its
input queue. Removing it decreases total transfer time.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Force the BootROM to flush its input queue after sending boot pattern.
This ensures that after function kwboot_bootmsg() finishes, BootROM is
able to start receiving xmodem packets without any specific delay or
setup.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Allow option -b without image path parameter, to send boot pattern and
wait for response but not send any image. This allows to use kwboot just
for processing boot pattern and user can use any other xmodem tool for
transferring the image itself (e.g. sx). Useful for debugging purposes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When kwboot is unable to resend current xmodem packet, show an 'E' in the
progress output instead of a '+'. This allows to distinguish between the
state when kwboot is retrying sending the packet and when retry is not
possible.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Unfortunately during some stages of xmodem transfer, A385 BootROM is not
able to handle repeated xmodem packets. So if an error occurs during that
stage, stop the transfer and return failure.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marvell BootROM expects retransmission of previous xmodem packet only in
the case when it sends NAK response to the host.
Do not change non-xmodem response (possibly UART transfer error) to NAK
in kwboot_xm_recv_reply() function. Allow caller to receive original
response from device.
Change argument 'nak_on_non_xm' to 'stop_on_non_xm'. Instead of changing
non-xmodem character to NAK, stop processing on invalid character and
return it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
It is unknown why handling of CAN byte was added into kwboot tool as
Marvell BootROM does not support CAN byte. It never sends CAN byte to host
and if host sends CAN byte BootROM handles it as an unknown byte.
Remove code for handling and sending CAN bytes from the kwboot tool.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Sometimes if the first byte of xmodem packet (SOH) is incorrectly
transmitted, BootROM sends NAK for every non-SOH received byte, which
makes BootROM and the host kwboot tool out of sync. BootROM automatically
re-synchronizes after 2s pause by dropping its input queue. So when
attempting retransmit for 9th time or later, ignore NAK reply from BootROM
and either wait for valid ACK or let kwboot timeout, which implies
re-synchronization.
This fixes retransmission of xmodem packets and allows kwboot to work also
without "Waiting ... and flushing tty" code which is at the beginning of
kwboot xmodem transfer.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the blk_rsp_timeo variable when sleeping before flushing tty.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Fix xmodem retry mechanism if some bytes from xmodem packet were lost and
BootROM is still waiting for completing previous xmodem packet.
It is required to wait at least 1.312s on A385, otherwise BootROM does not
accept next xmodem packet if previous one was not completely transferred.
2s should be enough timeout cause that BootROM will drop incomplete xmodem
packet and expects new packet.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Use versioned URLs for line numbers as branches are moving in the time and
use master branch for mv-ddr-marvell where is up-to-date code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We can and should run the node generator only when creating a new image.
When we read it back, there is no need to generate nodes - they already
exits, and binman does not dive that deep into the image - and there is
no way to provide the required fdt-list. So store the mode in the image
object so that Entry_fit can simply skip generator nodes when reading
them from an fdtmap.
This unbreaks all read-backs of images that contain generator nodes in
their fdtmap. To confirm this, add a corresponding test case.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Add SPDX to dts file:
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit 37f815cad0 ("moveconfig: Use a function to read files") adds a
helper function that can read a file as lines, but strips the newline
characters. This change broke parts of moveconfig code that relied on
their existence, resulting in a few issues:
Configs that are defined as empty aren't removed from header files (e.g.
"#define CONFIG_REMAKE_ELF"). Make regex patterns use '\b' to match word
boundaries instead of '\W' (which matched the newlines) so these lines
still match and get removed.
All changes in defconfig are considered removed by savedefconfig even
if they weren't, and line continuations in the headers aren't recognized
and removed properly, because their checks explicitly look for a newline
character. Remove the character from both comparisons.
The printed diff of header files is wrongly formatted and raises an
IndexError if a blank line was removed. Let print() print the new lines,
and use size-independent ways to check strings to fix the diff output.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
a bit delayed, the first batch of the sunxi pull request for this cycle.
This is mostly collecting some patches that were lying around for a
while, plus some recent fixes. Nothing too exciting at this point, but
of course they should be merged nevertheless.
There is the much bigger F1C100s SoC support coming up, which I hope to
be able to send in the next few days, along with the removal of sunxi's
lowlevel_init usage.
Compile tested for all 159 sunxi boards, plus briefly tested on BananaPi
M1, OrangePi Zero, Pine64 and Pine-H64.
Due to a bug in the H3 SoC, where the CPU 0 hotplug flag cannot be
written, resuming CPU 0 requires using the "Super Standby" code path in
the BROM instead of the hotplug path. This path requires jumping to an
eGON image in SRAM.
This resume image, whose single purpose is to jump back to the secure
monitor, only needs to contain a single instruction. Padding the image
to 8 KiB would be wasteful of SRAM. Hook up the -B (block size) option
so users can set the block/padding size.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Although it isn't known what bit 0 in PHY reg 8 does, it's obvious that
it has to be set before read calibration and cleared afterwards. This is
already done for first rank, but not for second (copy & paste error.)
Fix it.
Fixes: f4317dbd06 ("sunxi: Add H616 DRAM support")
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Kconfig symbol is missing CONFIG_ prefix, so compiler will always
skip ODT configuration.
Fix symbol name.
Fixes: f4317dbd06 ("sunxi: Add H616 DRAM support")
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For sunxi boards with the AXP209, AXP221, AXP809, and AXP818 PMICs
(plus possibly others, I only confirmed the datasheets for these),
it is sometimes desirable to not boot whenever the device is
plugged in. An example would be when using the NTC CHIP inside a
PocketCHIP.
This provides a configurable option to check if bit 0 of
register 0 of the PMIC says it was powered because of a power button
press (0) or a plug-in event (1). If the value is 1 and this option
is selected, the device shuts down shortly after printing a message
to console stating the reason why it's shutting down. Powering up the
board with the power button is not affected.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
[Andre: reword to speak of boot, remove #ifdefs]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Most AXP PMICs feature a "startup source" register, which keeps
information about how the PMIC started operation. Bit 0 in there means
it has been started by "plugging in the power cable".
Define a symbol in each PMIC's header file to be able to use that
register and bit later on.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The calls for flipping bits in the Allwinner pin controller registers
were using unnecessarily complex pointer arithmetic.
Improve readability by simplifying the expression.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that the sunxi_gpio driver handles pull-up/down via the driver
model, pin configuration does not need a platform-specific function.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This, along with gpio_flags_xlate(), allows the GPIO driver to handle
pull-up/down flags provided by consumer drivers or in the device tree.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The GPIO and pinctrl drivers need these setters for pin configuration.
Since they are DM drivers, they should not be using hardcoded base
addresses. Factor out variants of the setter functions which take a
pointer to the GPIO bank's MMIO registers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The return values of these functions are always zero, and they are
never checked. Since they are not needed, remove them.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This adds a compatible string for the Allwinner Sun4i-A10 I2C
controller. Without this, boards based on the R8 and A13 (at a
minimum) fail to boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Akash Gajjar <gajjar04akash@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Sometimes some ethernet aliases do not exist in U-Boot DT but they
exist in the DT used to boot the system (for example, modified via DT
overlays). In this situation setup_environment is called again in
ft_board_setup() to generate macaddr environment variable for them.
However now the call to fdt_fixup_ethernet() is moved before the call
of ft_board_setup().
Call fdt_fixup_ethernet() again to add MAC addresses for the extra
ethernet aliases.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[updated commit message]
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The driver for SPI0 on Allwinner H6 SoCs did not use the correct define
SUN50I_GPC_SPI0 for the pin function, but one for a different Allwinner
SoC series.
Fix the conditionals to use the correct define for H6 SoCs. This matches
the conditional logic in the SPL spi driver.
Tested by probing the spi-flash on a pine64_h64-model-b board with
adapted device-tree (disable mmc2, enable spi0).
Signed-off-by: Daniel Wagenknecht <dwagenk@mailbox.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Pull request for efi-2022-04-rc1-3
Documentation:
* update Nokia RX-51 documentation and move it to rst
* describe boot switch settings for HiFive Unmatched board
UEFI:
* fix the checking of images hashes and signatures
* provide the RISCV_EFI_BOOT_PROTOCOL
- Extend the pci command to support a few more features.
- Add support for custom SPL boot device names (so it's easier for users
to understand)
- Updates for am64x to address some review comments.
- Migration deadline notice for DM_SERIAL
- coreboot payload test
- Support rsa3072 signatures.
- DFU should skip writing empty UBI pages, bootcount printf format char
correction.
A mix of signatures and hashes in db doesn't always work as intended.
Currently if the digest algorithm is not explicitly set to sha256 we
stop walking the security database and reject the image.
That's problematic in case we find and try to check a signature before
inspecting the sha256 hash. If the image is unsigned we will reject it
even if the digest matches.
Since we no longer reject the image on unknown algorithms add an explicit
check and reject the image if any other hash algorithm apart from sha256
is detected on dbx.
Suggested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
On RISC-V a new UEFI protocol has been introduced. Support printing
its GUID using %pUs.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Abstract common routines to make the code easily understandable.
No functional change.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
unmatched.rst describes booting from SD card or from SPI. But only for
booting from SPI the boot selection settings are described.
Add the missing information.
Fix a typo 'uSD'.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This change contains update for doc/README.nokia_rx51 documentation file
with information how to load U-Boot image to device RAM without need to
flash it and also how to flash it into OneNAND via 0xFFFF flasher.
Signed-off-by: Pali Rohár <pali@kernel.org>
Since commit 25c5b65178 ("Nokia RX-51: Do not try calling both ext2load
and ext4load") command ext4load is used for all ext2/3/4 fs variants.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This probably should have been done a while back since it is a core
system. Very few boards remain to be migrated.
Addd a migration deadline for a year out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Coreboot supports U-Boot as a payload and this recently got a bit of a
facelist. Add a test for this.
For now this uses a binary build of coreboot (v4.15). Future work could
potentially build it from source, but we need to figure out the
toolchain problems first, since coreboot uses its own toolchain. It
turns out that this is tricky, because coreboot fails to build with a
vanilla gcc.
This needs some changes to the hooks scripts as well. An example build
is at https://source.denx.de/u-boot/custodians/u-boot-dm/-/jobs/359687
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With Ethboot support in SPL, network stack requires more BSS area, so
increase BSS max size to 16K
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
ROM supports cpsw_port2 for Ethernet boot and SPL stages continue to
download images on the same port, therefore there is no need to enable
cpsw_port1. Disable the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add to support rsa 3072 bits algorithm in tools
for image sign at host side and adds rsa 3072 bits
verification in the image binary.
Add test case in vboot for sha384 with rsa3072 algorithm testing.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For printing phys_addr_t we should use %pa to avoid warning like:
drivers/bootcount/bootcount_syscon.c:110:17: note: in expansion of macro ‘dev_err’
110 | dev_err(dev, "%s: Unsupported register size: %d\n", __func__,
| ^~~~~~~
seen for sandbox_defconfig with CONFIG_PHYS_64BIT=y.
Cf. commit 1eebd14b79 ("vsprintf: Add modifier for phys_addr_t")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the DFU MTD backend for the UBI partitions with the mtd command write
behavior when the option .dontskipff is not used: don't write the empty
pages (full of 0xFF); it is not required for UBI, see [1] for details.
This patch avoids the "free space fixup" procedure in the kernel [2]
and allows to program a UBIFS volume generated by mkfs.ubifs without the
option -F, --space-fixup.
The MTD DFU backend implements this behavior introduced on DFU NAND
backend by the commit 13cb7cc9e8 ("dfu: Add option to skip empty pages
when flashing UBI images to NAND") and also supported by the command nand
by CONFIG_CMD_NAND_TRIMFFS and by commit c9494866df ("cmd_nand: add nand
write.trimffs command").
[1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo
[2] http://www.linux-mtd.infradead.org/faq/ubifs.html#L_free_space_fixup
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Allow to call 'pci' and 'pci regions' commands with bus option '*' which
cause pci to process all buses.
PCIe is point-to-point HW and so on each bus is maximally one physical
device. Therefore for PCIe it is common to have multiple buses.
This change allows to easily print all available PCIe devices in system.
Make '*' as default option when no bus argument is specified.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently pci command ignores invalid cmdline arguments and do something.
Add checks that all passed arguments were processed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
'pci regions' currently prints only region information from bus 0 which
belongs to controller 0. Parser for 'pci regions' cmdline currently ignores
any additional arguments and so U-Boot always uses bus 0.
Regions are stored in controller (not on the bus) and therefore to retrieve
controller from the bus, it is needed to call pci_get_controller() which
returns root bus. Because bus 0 is root bus, current code worked fine for
controller 0.
Extend cmdline parser for 'pci regions' to allows specifying bus number,
extend pci_show_regions() code to accept also non-zero bus number and
print bus ranges for which is regions configuration assigned.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Initially it is set to dev_seq but update to the last bus number is
missing. Fix it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently the names MMC1, MMC2 and MMC2_2 are output in the SPL. To
achieve more userbility here the name of the boot source can be returned.
E.g. for "MMC1" -> "eMMC" or "MMC2" -> "SD card".
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Having U-Boot look up the passed partition name even though an alias
exists is unexpected, leading to warning messages (when the alias name
doesn't exist as a real partition name) or the use of the wrong
partition.
Change part_get_info_by_name_or_alias() to consider real partitions
names only if no alias of the same name exists, allowing to use aliases
to override the configuration for existing partition names.
Also change one use of strcpy() to strlcpy().
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
In DFU v1.1 specification [1] the DFU_UPLOAD (Short Frame)
is handled only in dfuUPLOADIDLE state:
- Figure A.1 Interface state transition diagram
- the state description in chapter A.2
A.2.3 State 2 dfuIDLE
on Receipt of the DFU_UPLOAD request,and bitCanUpload = 1
the Next State is dfuUPLOADIDLE
A.2.10 State 9 dfuUPLOAD-IDLE
When the length of the data transferred by the device in response
to a DFU_UPLOAD request is less than wLength. (Short frame)
the Next State is dfuIDLE
In current code, when an UPLOAD is completely performed after the first
request (for example with wLength=200 and data read = 9), the DFU state
stay at dfuUPLOADIDLE until receiving a DFU_UPLOAD or a DFU_ABORT request
even it is unnecessary as the previous DFU_UPLOAD request already reached
the EOF.
This patch proposes to finish the DFU uploading (don't go to dfuUPLOADIDLE)
and completes the control-read operation (go to DFU_STATE_dfuIDLE) when
the first UPLOAD response has a short frame as an end of file (EOF)
indicator even if it is not explicitly allowed in the DFU specification
but this seems logical.
[1] https://www.usb.org/sites/default/files/DFU_1.1.pdf
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case CONFIG_FASTBOOT_FLASH_MMC_DEV == 0, compile-time condition
is not met and fastboot_set_reboot_flag() fails.
Fixes: a362ce214f ("fastboot: Implement generic fastboot_set_reboot_flag")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
acpi refactoring to allow non-x86 use
binman support for bintools (binary tools)
minor tools improvements in preparation for FDT signing
various minor fixes and improvements
Add support for CDC ACM using the new UDC and gadget API. This protocol
can be used for serial over USB data transfer and is widely supported
by various OS (GNU/Linux, MS-Windows, OSX...). The usual purpose of
such link is to access device debug console and can be useful for
products not exposing regular UART to the user.
A default stdio device named 'usbacm' is created, and can be used
to redirect console to USB link over CDC ACM:
> setenv stdin usbacm; setenv stdout usbacm
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
It is currenly only used from usbtty driver but make it properly
selectable via Kconfig symbol, for future usage.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
This commit converts i.MX28's EHCI USB host driver to driver model
(DM_USB). It is a straightforward conversion (to reuse as much code
as possible), based on ehci-mx5.c code.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Those functions will be re-used when the ehci MXS driver (for imx28)
will be converted to also support CONFIG_DM_USB.
No functional changes introduced - only cosmetic changes (u32 type)
and alignment to pass checkpatch.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This function is going to be reused with the CONFIG_DM_USB enabled in
the imx28 mxs USB ehci driver.
No functional changes introduced.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
At present mkimage displays the node information but it is not clear what
signing action was taken. Add a message that shows it. For now it only
supports showing a single signing action, since that is the common case.
Sample:
Signature written to 'sha1-basic/test.fit',
node '/configurations/conf-1/signature'
Public key written to 'sha1-basic/sandbox-u-boot.dtb',
node '/signature/key-dev'
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the two functions that call add_verify_data() so that the caller
can see the node that was written to.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we rely on the key blob being in the global_data fdt_blob
pointer. This is true in U-Boot but not with tools. For clarity, pass the
parameter around.
Signed-off-by: Simon Glass <sjg@chromium.org>
Put the parent node first in the parameters as this is more natural. Also
add a comment to explain what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should be consistent in using the term 'signature' to describe a value
added to sign something and 'key' to describe the key that can be used to
verify the signature.
Tidy up the code to stick to this.
Add some comments to fit_config_verify_key() and its callers while we are
here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The copyfile() implementation has strange behaviour if the destination
file already exists. Update it to ensure that any existing data in the
destination file is dropped.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some more debugging to make it easier to see what is being tried and
what fails. Fix a few comment styles while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The definition of struct udphdr in include netinet/udp.h in the
musl library differs from the definition in the glibc library.
To use the same definition with musl the symbol _GNU_SOURCE has
to be defined.
Reported-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
When building sandbox_defconfig with CONFIG_DM_VIDEO=n a link time error
occurs:
in function `sandbox_serial_pending':
drivers/serial/sandbox.c:101: undefined reference to `video_sync_all'
video_sync_all() is only defined if we have CONFIG_DM_VIDEO=y.
Calling this function in a serial driver looks quite hackish
but at least let's add the missing build constraint.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Each bintool has some documentation which can be useful for the user.
Add a new command that collects this and writes it into a .rst file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drop the unused gzip code, update comments and add a test for an
invalid algorithm. The temporary file is not needed now, so drop that
also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bintools can be missing, in which case binman continues operation but
reports an invalid image. Plumb in support for this and add tests for
entry types which use bintools.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the code to use this bintool, instead of running lzma_alone
directly. This simplifies the code and provides more consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to compress and decompress data.
It supports the features needed by binman as well as installing via the
lzma-alone package.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the code to use this bintool, instead of running lz4 directly. This
simplifies the code and provides more consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to compress and decompress data.
It supports the features needed by binman as well as installing via the
lz4 package.
Signed-off-by: Simon Glass <sjg@chromium.org>
The compression functions are not actually used by patman, so we don't
need then in the tools module. Also we want to change them to use
bintools, which patman will not support.
Move these into a new comp_util module, within binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the fit and mkimage entry types to use this bintool, instead of
running mkimage directly. This simplifies the code and provides more
consistency as well as supporting missing bintools.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the ifwi entry type to use this bintool, instead of running
ifwitool directly. This simplifies the code and provides more
consistency as well as supporting missing bintools.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the GBB and vblock entry types to use this bintool, instead of
running futility directly. This simplifies the code and provides more
consistency as well as supporting missing bintools.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the FIP tests to use this bintool, instead of running fiptool
directly. This simplifies the code and provides more consistency as well
as supporting missing bintools.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CBFS tests to use this bintool, instead of running cbfstool
directly. This simplifies the overall code and provides more consistency,
as well as supporting missing bintools.
Signed-off-by: Simon Glass <sjg@chromium.org>
The tests rely on having at least 5 bintool implementions. Now that we
have this, enable them. Add tests for the binman 'tool' subcommand.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to build images for use by U-Boot.
It supports the features needed by binman as well as installing via the
u-boot-tools packages. Although this is built in the U-Boot tree, it is
still useful to install a binary on the system.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to build Intel IFWI images. It
supports the features needed by the tests as well as downloading a binary
from Google Drive. Although this is built in the U-Boot tree, it is not
currently included with u-boot-tools, so it may be useful to install a
binary on the system.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to sign Chrome OS images and
build the Google Binary Block (GBB). It supports the features needed by
binman as well as fetching a binary from Google Drive. Building it from
source is possible but is left for another time, as it requires at least
one other library.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to run FIP tests. It supports
the features needed by the tests as well as building a binary from
the git tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Bintool for this, which is used to run CBFS tests. It supports
the features needed by the tests as well as fetching a binary from
Google Drive. Building it from source is very slow since it is not
separately supported by the coreboot build system and it builds an
entire gcc toolchain before starting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Support collecting the available bintools needed by an image, by
scanning the entries in the image.
Also add a command-line interface to access the basic bintool features,
such as listing the bintools and fetching them if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Binman requires various tools to actually work, such as 'lz4' to compress
data and 'futility' to sign Chrome OS firmware. At present these are
handled in an ad-hoc manner and there is no easy way to find out what
tools are needd to build an image, nor where to obtain them.
Add an implementation of 'bintool', a base class which implements this
functionality. When a bintool is required, it can be requested from this
module, then executed. When the tool is missing, it can provide a way to
obtain it.
Note that this uses Command directly, not the tools.Run() function. This
allows proper handling of missing tools and avoids needing to catch and
re-raise exceptions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since this is a list of blobs, each blob should have the ability to be
faked, as with blob-ext. Update the Entry base class to set allow_fake
and use the base class in the section code also, so that this propagagtes
to blob-ext-list, which is not a section.
Signed-off-by: Simon Glass <sjg@chromium.org>
The Run() function automatically uses the PATH variable to locate a tool
when running it. Add a function that does this manually, so we don't have
to run a tool to find out if it is present.
This is needed by the new Bintool class, which wants to check which tools
are present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reverse the order of the return tuple, so that the filename is first.
This seems more obvious than putting the temporary directory first.
Correct a bug that leaves a space on the final line.
Allow the caller to control the name of the temporary directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new function which returns the entire result from running a tool,
not just stdout. Update Run() to use this and to return stdout on error,
if stderr is empty, since some unfortunate tools write their error
output to stdout rather than stderr.
Move building of the PATH to a separate function.
Make the exception catching more specific, to catch just ValueError, since
broad exceptions are a pain to debug.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this does not check that the external data is in the expected
place. Use a non-zero offset for the external data and check it.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is a debug message at present, which is not very helpful. Print out
the error so that action can be taken.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some newer toolchains do not create a symbol for the .ucode section that
this test relies on. Update the test to use the symbol that is explicitly
created, instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This behaviour is necessary with boards where the binman description
requires processing external blobs, since these may be missing.
Enable it by default, so that CI is happy. Warnings indicate that a valid
image is not produced, as with the --allow-missing option.
Signed-off-by: Simon Glass <sjg@chromium.org>
When OF_LIVE flag is enabled on a 64 bits platform, there is an
issue when dev_read_addr() is called and need to perform an address
translation using __of_translate_address().
In case of error, __of_translate_address() return's value is OF_BAD_ADDR
(wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff).
The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE
which is defined as (-1U) = 0xffffffff.
In this case the comparison is always false.
To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of
AARCH64. Update accordingly related tests.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The build system already automatically looks for and includes an
in-tree *-u-boot.dtsi when building the control .dtb. However, there
are some things that are awkward to maintain in such an in-tree file,
most notably the metadata associated to public keys used for verified
boot.
The only "official" API to get that metadata into the .dtb is via
mkimage, as a side effect of building an actual signed image. But
there are multiple problems with that. First of all, the final U-Boot
(be it U-Boot proper or an SPL) image is built based on a binary
image, the .dtb, and possibly some other binary artifacts. So
modifying the .dtb after the build requires the meta-buildsystem
(Yocto, buildroot, whatnot) to know about and repeat some of the steps
that are already known to and handled by U-Boot's build system,
resulting in needless duplication of code. It's also somewhat annoying
and inconsistent to have a .dtb file in the build folder which is not
generated by the command listed in the corresponding .cmd file (that
of course applies to any generated file).
So the contents of the /signature node really needs to be baked into
the .dtb file when it is first created, which means providing the
relevant data in the form of a .dtsi file. One could in theory put
that data into the *-u-boot.dtsi file, but it's more convenient to be
able to provide it externally: For example, when developing for a
customer, it's common to use a set of dummy keys for development,
while the consultants do not (and should not) have access to the
actual keys used in production. For such a setup, it's easier if the
keys used are chosen via the meta-buildsystem and the path(s) patched
in during the configure step. And of course, nothing prevents anybody
from having DEVICE_TREE_INCLUDES point at files maintained in git, or
for that matter from including the public key metadata in the
*-u-boot.dtsi directly and ignore this feature.
There are other uses for this, e.g. in combination with ENV_IMPORT_FDT
it can be used for providing the contents of the /config/environment
node, so I don't want to tie this exclusively to use for verified
boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Fix doc formatting error (make htmldocs)
Signed-off-by: Simon Glass <sjg@chromium.org>
For whatever reason, usb_setup_ehci_gadget removes and probes USB device
0. However, not all systems have a device 0. Use the first device
instead.
The device probed should probably have something to do with the
controller (as specified by e.g. ums <controller> or fastboot
<controller>). In fact, I find it odd that we probe the USB device in
the first place, because this is just to set up the gadget itself.
Presumably, the controller should be probed by usb_gadget_initialize
somehow.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add some tables needed for ARM devices, including more MADT subtables,
a CSRT descriptor, GTDT and PPTT.
WIP: This needs comments added.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this list is used to collect items within the DSDT and SSDT
tables. It is useful for it to collect the whole tables as well, so there
is a list of what was created and which write created each one.
Refactor the code accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this over to use a writer file, moving the code from the x86
implementation.
There is no need to store a separate variable since we can simply access
the ACPI context.
With this, the original monolithic x86 function for writing ACPI tables
is gone.
Note that QEMU has its own implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this function to the newer style, so we can avoid passing and
returning an address through this function.
Also move this function out of the x86 code so it can be used by other
archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Move this table over to use a writer function, moving the code from the
x86 implementation.
Add a pointer to the DSDT in struct acpi_ctx so we can reference it later.
Disable this table for sandbox since we don't actually compile real ASL
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this table over to use a writer function, moving the code from the
x86 implementation.
Add a pointer to the DSDT in struct acpi_ctx so we can reference it later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new ACPI writer to write the base tables at the start of the area,
moving this code from the x86 implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new ACPI writer to write the ACPI tables. At present this is all
done in one monolithic function. Future work will split this out.
Unfortunately the QFW write_acpi_tables() function conflicts with the
'writer' version, so disable that for sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present acpi_setup_base_tables() both sets up the ACPI context and
writes out the base tables.
We want to use an ACPI writer to write the base tables, so split this
function into two, with acpi_setup_ctx() doing the context set, and
acpi_setup_base_tables() just doing the base tables.
Disable the writer's write_acpi_tables() function for now, to avoid
build errors. It is enabled in a following patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we call lots of functions to generate the required ACPI tables.
It would be better to standardise these functions and allow them to be
automatically collected and used when needed.
Add a linker list to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to record the start of an ACPI table so that offsets from
that point can be easily calculated.
Add this to the context and set it before calling the writer method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some .asl files include others using the iasl 'include' directive. This
needs to be able to find the files referenced.
For an out-of-tree build the source directory is not the current
directory. Moreover, U-Boot preprocesses the input file and puts the
result in the output directory. So iasl does not know where the real
source file came from.
Add a -I option to produce the correct behaviour. We could add an option
to not preprocess the .asl source, but for now that seems unnecessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than keying everything off ACPIGEN, use the main
GENERATE_ACPI_TABLE option to determine whether the core ACPI code
is included. Make sure these option are not enabled in SPL/TPL since we
never generate tables there.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current EFI implementation confuses pointers and addresses. Normally
we can get away with this but in the case of sandbox it causes failures.
Despite the fact that efi_allocate_pages() returns a u64, it is actually
a pointer, not an address. Add special handling to avoid a crash when
running 'bootefi hello'.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this option is missing a header file, a function prototype and
the qfw driver needs a header included.
Fix these problems so we can enable this option on sandbox. This will
increase the build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is enabled for quite a few boards which don't create ACPI tables.
Tidy this up by dropping the option for some boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some ARM boards are using ACPI now. It seems that U-Boot should support
this method. Add ARM to the list of archs which can generate ACPI tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow this to be used on any arch. Also convert to using macros so that
we can check the CONFIG option in C code.
Signed-off-by: Simon Glass <sjg@chromium.org>
These have sadly found their way to ARM now. Allow any arch to support
generating ACPI tables.
Disable this for the tools build.
Signed-off-by: Simon Glass <sjg@chromium.org>
- A number of cleanups to Python code based on running pylint
- Integrate changes so that we can run "make pylint" and compare the
results to a current baseline. Keep this as a manual check for now.
- Improve functionality of moveconfig.py
- pci: iproc: Set all 24 bits of PCI class code
There are over 200 errors in this file. Fix some of them, starting at the
beginning of the file. Future work can continue this effort.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is quite a bit of ad-hoc code reading from files. The
most common case is to read the file as lines. Put it in a function and
set the unicode encoding correctly.
Avoid writing back to a file when there are obviously no changes as this
speeds things up slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is quite a bit of ad-hoc code writing to files. The
treatment of newlines is different in some of them. Put it in a function
and set the unicode encoding correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Python 2 is not supported anymore and Python 3 has had subprocess.DEVNULL
since version 3.3 which was released in 2012. Drop the unnecessary check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This is a newer library and is now preferred for Python scripts. Update
the code to use it instead of optparse
Use 'args' instead of 'options' throughout, since this is the term used
in that module. Also it helps to avoid confusion with CONFIG options, a
term that is used in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Quite a few places use double quotes. Fix this to be consistent with
other Python code in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It is useful to be able to find out which boards define a particular
option, or combination of options. This is not as easy as grepping the
defconfig files since many options are implied by others.
Add a -f option to the moveconfig tool to permit this. Update the
documentation to cover this, including a better title for the doc page.
Signed-off-by: Simon Glass <sjg@chromium.org>
This doesn't work anymore, since the Kconfig update. The script has no
tests so we did not notice. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
* assert does not need parentheses
* add module docstring
* fix misspelled constant True
* limit lines to 100 characters
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present the Python code in U-Boot is somewhat inconsistent, with some
files passing pylint quite cleanly and others not.
Add a way to track progress on this clean-up, by checking that no module
has got any worse as a result of changes.
This can be used with 'make pylint'.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Re-generate pylint.base]
Add some empty __init__ files for binman, buildman and dtoc so that
pylint is able to recognise these as Python modules and produce more
useful pylint output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Register 0x43c in its low 24 bits contains PCI class code.
Update code to set all 24 bits of PCI class code and not only upper 16 bits
of PCI class code.
Use standard U-Boot macro (PCI_CLASS_BRIDGE_PCI << 8) for constructing all
24-bits of PCI class for PCI bridge Normal decode.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Roman Bacik <roman.bacik@broadcom.com>
- Assorted dumpimage/mkimage fixes, allow setting the signature
algorithm on the command line with mkimage
- Bugfix to the misc uclass, CONFIG_MP / CMD_MP Kconfig logic improved,
updated Xen platform MAINTAINERS entry and fixed vexpress_aemv8a_semi
booting.
Add Kconfig option(CONFIG_CMD_MP) to enable or disable multiprocessor
commands. Compile cmd/mp.c based on CONFIG_CMD_MP.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The component st_size of struct stat is of type off_t. Depending on the
system printing it using %ld leads to a warning:
tools/mkimage.c:438:54: warning: format '%ld' expects argument of type
'long int', but argument 5 has type
'off_t' {aka 'long long int'} [-Wformat=]
438 | "%s: Bad size: \"%s\" is not valid image: size %ld < %u\n",
| ~~^
| |
| long int
| %lld
When comparing an off_t value to a 32bit integer we should not convert to
uint32_t but to off_t which may be wider.
Reported-by: Milan P. Stanić <mps@arvanta.net>
Fixes: 331f0800f1 ("mkimage: allow -l to work on block devices on Linux")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
This permits to prepare FIT image description that do not hard-code the
final choice of the signature algorithm, possibly requiring the user to
patch the sources.
When -o <algo> is specified, this information is used in favor of the
'algo' property in the signature node. Furthermore, that property is set
accordingly when writing the image.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The actual opt string is inlined - and different. Seems this was a
left-over from older versions of 603e26f763.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The write operation in misc_ops already takes a "const void *" buffer,
but misc_write() takes a mutable "void *". There's no reason for this,
so make misc_write() consistent with the standard write() prototype.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
fit_verify_header fails if it detects unit addresses "@". However, this
will break tools like dumpimage on fit images which worked with previous
versions of the tool (e.g. 2020.04 vs 2021.07). As an example the output
of:
dumpimage -l <fit image>
is:
FIT description: U-Boot fitImage for Linux Distribution
Created: Thu Jan 1 01:00:00 1970
Image 0 (kernel@1)
Description: Linux kernel
Created: Thu Jan 1 01:00:00 1970
Type: Kernel Image
Compression: gzip compressed
Data Size: 6442456 Bytes = 6291.46 KiB = 6.14 MiB
Architecture: AArch64
OS: Linux
Load Address: 0x80080000
Entry Point: 0x80080000
Hash algo: sha256
Hash value: ...
Image 1 (fdt@freescale_fsl-s32g274a-evb.dtb)
Description: Flattened Device Tree blob
Created: Thu Jan 1 01:00:00 1970
Type: Flat Device Tree
Compression: uncompressed
Data Size: 39661 Bytes = 38.73 KiB = 0.04 MiB
Architecture: AArch64
Hash algo: sha256
Hash value: ...
Default Configuration: 'conf@freescale_fsl-s32g274a-evb.dtb'
Configuration 0 (conf@freescale_fsl-s32g274a-evb.dtb)
Description: 1 Linux kernel, FDT blob
Kernel: kernel@1
FDT: fdt@freescale_fsl-s32g274a-evb.dtb
Hash algo: sha256
Hash value: unavailable
But with newer version it shows:
dumpimage -l <fit image>
GP Header: Size d00dfeed LoadAddr 62f0a4
This commit will output a warning that unit addresses were detected but
will not fail:
dumpimage -l <fit image>
Image contains unit addresses @, this will break signing
...
Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
fit_extract_contents does a fit_check_format even thought it was already
checked during imagetool_verify_print_header.
Therefore, this check is not necessary. This commit removes the
redundancy.
Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 270f8710f9 ("crc32: Add crc32 implementation using
__builtin_aarch64_crc32b") enabled the usage of ARMv8 CRC instructions
by default, for all arm64 builds. And indeed all Arm Ltd. v8 Cortex-A
cores support the instructions, and they are mandatory starting with
architecture revision v8.1, so realistically every known hardware
implementation should support them.
The Arm Fastmodel however defaults to the bare minimum ARMv8 feature set
by default, which means v8.0 without the CRC instructions, so U-Boot
hangs very early at the moment, without any output (the boot-wrapper or
TF-A printing the last visible lines).
Support for those instructions can be enabled on the model command line
by either:
-C cluster0.cpu0.enable_crc32=1 (for each core)
or by using a higher architecture revision by default:
-C cluster0.has_arm_v8-1=1 (for each cluster)
Of course any arch revision higher than v8.1 would work as well.
But for the sake of a smooth out-of-the-box experience, let's just
disable the usage of those instructions in the defconfig, to avoid
random hangs without any clues.
Reported-by: Ross Burton <ross.burton@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Marek Vasut <marex@denx.de>
Since commit 9855034397 ("fdt: Don't call board_fdt_blob_setup()
without OF_BOARD") board_fdt_blob_setup() is no more called on
STM32MP platforms in trusted boot which hangs during boot process.
Enable OF_BOARD flag to fix this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add the partition name and remove the line number in error messages
of treat_partition_list() to provide correct information to user of
STM32CubeProgrammer.
The "line number" value was confusing because it is incorrect here;
the index in part_array[] is not aligned with the line number in
the parsed Layout file, because the empty lines and the lines beginning
by '#' are skipped during the first parsing in parse_flash_layout().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Solve compilation issue on undefined CONFIG_SYS_MMC_ENV_DEV when
CONFIG_ENV_IS_IN_MMC is deactivated on STMicroelectronics boards
defconfig
Fixes: 9f97193616 ("board: stm32mp1: use CONFIG_SYS_MMC_ENV_DEV when available")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Synchronize DH DHCOM DTs with Linux commit 25960cafa06e ("Linux 5.15.12").
There is no functional change to the resulting DTs. The eeprom0 alias and
PHY reset GPIO are now reinstated in SoM u-boot dtsi.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Synchronize DH DHCOR DTs with Linux commit 25960cafa06e ("Linux 5.15.12").
There is no functional change to the resulting DTs. The eeprom0 alias is
now reinstated in SoM u-boot dtsi, the PHY reset GPIO is reinstated in AV96
u-boot dtsi.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Device tree alignment with Linux kernel v5.16-rc5
- ARM: dts: stm32: set otg-rev on stm32mp151
- ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151
- ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
- ARM: dts: stm32: fix SAI sub nodes register range
- ARM: dts: stm32: fix STUSB1600 Type-C irq level on stm32mp15xx-dkx
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Default value for CONFIG_SYS_BOOTCOUNT_SINGLEWORD and
CONFIG_SYS_BOOTCOUNT_ADDR are only needed when
CONFIG_BOOTCOUNT_GENERIC is used.
This patch avoids to define these configs when an other bootcount backend
is activated, for example for CONFIG_BOOTCOUNT_ENV.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Today the bootcount is not managed by the Linux kernel for STM32MP15 as
we don't have driver to update the used backup register in TAMP and the
recovery command still executes the normal bootcmd with
'altbootcmd=run bootcmd'.
So the bootcount feature is never used, the config CONFIG_BOOTCOUNT_LIMIT
and the associated environment variable 'altbootcmd' can be removed to
reduce the U-Boot size.
Each boards can re-enable this feature later in their defconfig, if it is
needed, with the expected backend, for example CONFIG_BOOTCOUNT_GENERIC
or CONFIG_BOOTCOUNT_ENV.
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch configures U-Boot SPL for DHCOR SoM to permit DFU upload of
SPL and subsequent u-boot.itb for recovery or commissioning purposes.
To start U-Boot on DHCOR based board, e.g. Avenger96, proceed as follows:
- Install dfu-util on the host PC (in debian this is package 'dfu-util')
- Power off the Avenger96 board.
- Connect both USB-serial console and USB-OTG microB ports to host PC.
- Switch Avenger96 to USB boot mode -- BOOT0..2 switches all set to 0.
- Power on the Avenger96 board.
- Verify using '$ dmesg' that a new device has been detected as follows:
New USB device found, idVendor=0483, idProduct=df11, bcdDevice= 2.00
New USB device strings: Mfr=1, Product=2, SerialNumber=3
Product: DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000
Manufacturer: STMicroelectronics
- Upload U-Boot SPL:
$ dfu-util -a 1 -D u-boot-spl.stm32
- Upload U-Boot proper:
$ dfu-util -a 0 -D u-boot.itb
- At this point, SPL will wait for user to press "Ctrl-C" on serial
console. When ready to interact with U-Boot, press Ctrl-C to start
the bootloader.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case the SoC reports the boot device type is USB, it means the SPL was
loaded via BootROM DFU mode. Currently the spl_boot_device() returns boot
device as USB host, change it to DFU instead, so the SPL can continue the
DFU boot and load U-Boot via DFU.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When booting from QSPI, the boot ROM appears to mux the QSPI
pins, but it's not guaranteed to be setup when booting from
eMMC. Fix this by explicitly configuring the pinmux.
Signed-off-by: Adam Ford <aford173@gmail.com>
Pull request for efi-2022-04-rc1-2
Documentation:
* describe printf() format codes
UEFI
* enable more algorithms for UEFI image verification, e.g. SHA256-RSA2048
General
* simplify printing short texts for GUIDs
* provide a unit test for printing GUIDs
Use moveconfig.py script to convert define CONFIG_SYS_MAX_FLASH_BANKS
and CONFIG_SYS_MAX_FLASH_BANKS_DETECT to Kconfig and move these entries
to defconfigs.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Re-switch to IS_ENABLED check in spi-nor-core.c, re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
Prepare migration to Kconfig.
CONFIG_SYS_MAX_FLASH_BANKS_DETECT becomes boolean and
CONFIG_SYS_MAX_FLASH_BANKS define the MAX size, also used
for detection when CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
(CFI_MAX_FLASH_BANKS = CONFIG_SYS_MAX_FLASH_BANKS).
CONFIG_SYS_MAX_FLASH_BANKS become mandatory when
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace CONFIG_SYS_MAX_FLASH_BANKS by CFI_FLASH_BANKS to prepare
Kconfig migration and avoid to redefine CONFIG_SYS_MAX_FLASH_BANKS
in cfi_flash.h.
After this patch CONFIG_SYS_MAX_FLASH_BANKS should be never used in
the cfi code: use CFI_MAX_FLASH_BANKS for struct size or CFI_FLASH_BANKS
for number of CFI banks which can be dynamic.
This patch modify all the files which include mtd/cfi_flash.h.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tidy up the warnings reported by checkpatch.pl to prepare next patches
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Falcon mode is very useful in improving boot speed. A question that
Falcon mode asks is "Where do I look for the kernel". With MMC boot
media, the correct answer is CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR.
The scope of this patch is to move this to Kconfig.
It is possible for a system to support Falcon mode from NOR but not
MMC. In that case, mmc_load_image_raw_os() would not be used. To
address this, conditionally compile mmc_load_image_raw_os() when
SPL_FALCON_BOOT_MMCSD, instead of SPL_OS_BOOT.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move spl_start_uboot to its own guard in spl_mmc.c, rerun migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
Use IS_ENABLED() instead, to reduce the number of build paths.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
- fdt_support: Add fdt_for_each_node_by_compatible() helper macro
(Marek)
- turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali)
- pci_mvebu: Add support for Kirkwood PCIe controllers (Pali)
- SPL: More verifications for kwbimage in SPL (Pali)
- mvebu: Remove comphy_update_map() (Pali)
- Minor misc stuff
- Disable CONFIG_NET_RANDOM_ETHADDR for android configs
- meson64_android: define raw parts for bootloader to permit flashing with fastboot
- vim3: configure serial# from ethaddr to permit using fastboot like sei510/610
After next branch was merged to v2022.01 release, U-Boot on A3720 started
printing "<debug_uart>" line on UART during booting. There is no need to
print this debug line by default, so disable it via config option
CONFIG_DEBUG_UART_ANNOUNCE in all config files for Armada 3720 boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This weak function is not used anymore, so completely remove it.
Private struct comphy_map is not used by any board code anymore, so move it
into private driver header file comphy_core.h.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Code in board_fix_fdt() already detects connected MOX modules so there is
no need to have custom comphy_update_map() function for setting serdes
speeds.
This change sets phy-mode for MOX SFP module (when present) to sgmii.
Comphy driver then sets sgmii serdes speed for this module to 1.25G.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Placing Unicode control codes <U+0080><U+0093> in the middle of a comment
does not make much sense. Let's get rid of all Unicode in
drivers/ram/octeon/octeon3_lmc.c.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Use the preferred
if (IS_ENABLED(X))
instead of
#ifdef X
where possible.
There are still places where this is not possible or is more complicated
to convert in this file. Leave those be for now.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Checkpatch warns about using uint32/16/8_t instead of u32/16/8.
Use the preferred types.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Print the wrong srcaddr (spl_image->offset) in error message also for
SATA case.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Last 4 bytes of kwbimage boot image is checksum. Verify it via the new
spl_check_board_image() function which is called by U-Boot SPL after
loading kwbimage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 9baab60b80 ("SPL: Add support for parsing board / BootROM specific
image types") added support for loading board specific image types.
This commit adds support for a new weak function spl_parse_board_header()
which is called after loading boot image. Board may implement this function
for checking if loaded board specific image is valid.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Each boot mode has its own kwbimage specified by blockid. So check that
kwbimage is valid by blockid.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add parameter spl_boot_device to spl_parse_board_header(), which allows
the implementations to see from which device we are booting and do
boot-device-specific checks of the image header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
There are certain restrictions for kwbimage offset and blocksize.
Validate them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Kirkwood uses macros KW_DEFADR_PCI_MEM and KW_DEFADR_PCI_IO for base
address of PCIe mappings. Size of PCIe windows is not defined in any macro
yet, so export them in new KW_DEFADR_PCI_MEM_SIZE and KW_DEFADR_PCI_IO_SIZE
macros.
Kirkwood arch code already maps mbus windows for io and mem, so avoid
calling mvebu_mbus_add_window_by_id() function which would try to do
duplicate window mapping.
Kirkwood PCIe controllers already use "marvell,kirkwood-pcie" DT compatible
string, so mark pci_mvebu.c driver as compatible for it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
On of the MiniPCIe ports on Turris Omnia is also a mSATA port. Whether
it works in SATA or PCIe mode is determined by a strapping pin, which
value is read from the MCU.
We already determine which type of card is connected when configuring
SerDeses.
But until now we left both SATA and PCIe port 0 nodes in device tree
enabled, and so the SATA driver is probed in U-Boot / Linux even if we
know there is no mSATA card, and similarly PCIe driver tries to link on
port 0 even if we know there is mSATA card, not a PCIe card.
Fixup device tree blob to disable SATA node if mSATA card is not
present, and to disable PCIe port 0 node if mSATA card is present.
Do this for U-Boot's DT blob before relocation and also for kernel DT
blob before booting.
This ensures that software does not try to use SATA or PCIe HW when
corresponding PHY is not configured.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored and fixed some issues ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add macro fdt_for_each_node_by_compatible() to allow iterating over
fdt nodes by compatible string.
Convert various usages of
off = fdt_node_offset_by_compatible(fdt, start, compat);
while (off > 0) {
code();
off = fdt_node_offset_by_compatible(fdt, off, compat);
}
and similar, to
fdt_for_each_node_by_compatible(off, fdt, start, compat)
code();
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Khadas vim3 and vim3l defconfigs introduced with:
* f89b90d2d9 ("configs: add khadas-vim3{l}_android for AOSP support")
* 425f06f86e ("configs: prepare khadas-vim3{l}_ab_android for AOSP support")
were based on an outdated defconfig prior to the ede1f4f297 ("configs:
amlogic: Disable CONFIG_NET_RANDOM_ETHADDR when unnecessary") cleanup.
Disable CONFIG_NET_RANDOM_ETHADDR for the android configs as well to
stay consistent.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20220112084023.2858375-1-mkorpershoek@baylibre.com
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Xilinx changes for v2022.04-rc1
gpio:
- Add modepin driver
net:
- Save random mac addresses to eth variable
zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses
zynqmp clk:
- Fix clock handling for gem and usb
phy:
- Add zynqmp phy/serdes driver
serial:
- Add one missing compatible string
microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups
zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver
versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
Right now the code explicitly limits us to sha1,256 hashes with RSA2048
encryption. But the limitation is artificial since U-Boot supports
a wider range of algorithms.
The internal image_get_[checksum|crypto]_algo() functions expect an
argument in the format of <checksum>,<crypto>. So let's remove the size
checking and create the needed string on the fly in order to support
more hash/signing combinations.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The ESRT test may try to print a GUID if an error occurs.
Implement the %pU print code.
Correct the ESRT test to use %pU instead of %pUl to avoid the output
of character 'l'.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
For printing GUIDs with macro EFI_ENTRY use %pUs instead of %pUl to provide
readable debug output.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add a unit test for the %pUs printf code.
Use ut_asserteq_str() for checking string results.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
CONFIG_PARTITION_TYPE_GUID=y is needed for testing some GPT related
functionality.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Use printf code %pUs to print the text representation of the partition type
GUID.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
In different places text representations are used for GUIDs, e.g.
* command efidebug
* command part list for GPT partitions
To allow reducing code duplication introduce a new printf code %pUs.
It will call uuid_guid_get_str() to get a text representation. If none is
found it will fallback to %pUl and print a hexadecimal representation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently uuid_guid_get_str() is only built if
CONFIG_PARTITION_TYPE_GUID=y.
To make it usable for other GUIDs compile it if CONFIG_LIB_UUID=y.
The linker will take care of removing it if it is unused.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Power domain driver sends PM fragment to PMUFW. It is sent for every node
which is listed in DT. But some nodes could be already enabled but driver
is not capable to find it out. That's why it blinly sents request for every
listed IP. When PMUFW response by XST_PM_ALREADY_CONFIGURED error code
there is no need to show any error message because node is already enabled.
That's why cover this case with message when DEBUG is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c15ef0b68cf191f693d3d010f70ac24cfd8171f.1642163135.git.michal.simek@xilinx.com
Function prototypes must not be guarded with ifdef tests. Doing so
prevents us from doing:
if (CONFIG_IS_ENABLED(FOO))
func();
as that results in a warning when CONFIG_FOO is not enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
The clock delay of the RMII/RGMII interface is controlled by SCU340~35C.
These values are obtained by measurement and experiments so we simply
use macro to define them.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
There are 4 MDIO bus controllers in AST2600 SOC. Each of them can
connect to one or more PHY chips and is flexible to work with the 4 MAC
devices in AST2600. On AST2600 EVB, MDIO 0,1,2,3 connect to the PHY
chips used by MAC 0,1,2,3 respectively.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support of the MAC controller of Aspeed AST2600 SOC. The MAC
controller is the same with AST2500, except it has stand-alone MDIO
hardware block.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for DM_MDIO to connect to PHY. For the systems that have a
stand-alone MDIO hardware block, enable CONFIG_DM_MDIO to use driver
model for MDIO devices.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This patch adds node for mmc/sd controller found on Action Semi OWL
S700 SoC.
Since, upstream Linux binding has not been merged for S700 MMC/SD
controller, Changes are put in u-boot specific dtsi file.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This Synchronizes the Actions Semi S700 SoC DT changes from
commit "g58e1100fdc59" ("Linux v5.16-rc3").
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This commit adds SD/MMC clocks, and provides .set/get_rate callbacks
for SD/MMC device present on Actions OWL S700 SoCs.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This commit introduces get/set_rate callbacks, these are dummy at
the moment, and can be used to get/set clock for various devices
based on the clk id.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Changes to the am33xx device (33e9021a) trees have been merged in from
the upstream linux kernel which now means the device tree uses the new
pins format (as of 5.10) where the confinguration can be stores as a
separate configuration value and pin mux mode which are then OR'd
together.
This patch adds support for the new format to u-boot so that
pinctrl-cells is now respected when reading in pinctrl-single,pins
Signed-off-by: Anthony Bagwell <anthony.bagwell@hivehome.com>
[BUG]
When passing a btrfs with NO_HOLE feature to U-boot, and if one file
contains holes, then the hash of the file is not correct in U-boot:
# mkfs.btrfs -f test.img # Since v5.15, mkfs defaults to NO_HOLES
# mount test.img /mnt/btrfs
# xfs_io -f -c "pwrite 0 4k" -c "pwrite 8k 4k" /mnt/btrfs/file
# md5sum /mnt/btrfs/file
277f3840b275c74d01e979ea9d75ac19 /mnt/btrfs/file
# umount /mnt/btrfs
# ./u-boot
=> host bind 0 /home/adam/test.img
=> ls host 0
< > 12288 Mon Dec 27 05:35:23 2021 file
=> load host 0 0x1000000 file
12288 bytes read in 0 ms
=> md5sum 0x1000000 0x3000
md5 for 01000000 ... 01002fff ==> 855ffdbe4d0ccc5acab92e1b5330e4c1
The md5sum doesn't match at all.
[CAUSE]
In U-boot btrfs implementation, the function btrfs_read_file() has the
following iteration for file extent iteration:
/* Read the aligned part */
while (cur < aligned_end) {
ret = lookup_data_extent(root, &path, ino, cur, &next_offset);
if (ret < 0)
goto out;
if (ret > 0) {
/* No next, direct exit */
if (!next_offset) {
ret = 0;
goto out;
}
}
/* Read file extent */
But for NO_HOLES features, hole extents will not have any extent item
for it.
Thus if @cur is at a hole, lookup_data_extent() will just return >0, and
update @next_offset.
But we still believe there is some data to read for @cur for ret > 0
case, causing we read extent data from the next file extent.
This means, what we do for above NO_HOLES btrfs is:
- Read 4K data from disk to file offset [0, 4K)
So far the data is still correct
- Read 4K data from disk to file offset [4K, 8K)
We didn't skip the 4K hole, but read the data at file offset [8K, 12K)
into file offset [4K, 8K).
This causes the checksum mismatch.
[FIX]
Add extra check to skip to the next non-hole range after
lookup_data_extent().
Signed-off-by: Qu Wenruo <wqu@suse.com>
The code is cross-ported from BLAKE2 reference implementation
(https://github.com/BLAKE2/BLAKE2).
With minimal change to remove unused macros/features.
Currently there is only one user inside U-boot (btrfs), and since it
only utilize BLAKE2B, all other favors are all removed.
Signed-off-by: Qu Wenruo <wqu@suse.com>
[trini: Rename ROUND to R to avoid clash with <linux/bitops.h>
Signed-off-by: Tom Rini <trini@konsulko.com>
Drop the remaining ifdefs around header includes, to fix an old TODO.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Not all architectures define <asm/gpio.h> and even on those that do, the
header cannot be included for all boards without causing various build
failures.
Since common/board_r.c only needs gpio_hog_probe_all() declaration, include
<asm-generic/gpio.h> and drop the associated ifdef.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
asm/mmu.h include is currently guarded by CONFIG_ADDR_MAP ifdef because
the header is only present on arm and powerpc. In order to remove the
dependency on this header and the associated ifdef, move init_addr_map()
declaration to init.h, since it is only called during the common init
sequence.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Add a return value to init_addr_map and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Add a return value to kgdb_init and use it directly in the post-relocation
init sequence, rather than using a wrapper stub. Also, move the "KGDB"
print message inside kgdb_init().
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Commit 98f705c9ce ("powerpc: remove 4xx support") removed (in 2017) the
last code that made use of bedbug debugger support. Since there aren't
any boards left that define either CONFIG_CMD_BEDBUG or a real
bedbug_init(), drop this feature from u-boot.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Factor out armv7m fragment to spl_perform_fixups(), which is an arch/board
specific function designed for this purpose.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Fix fastboot flash bug.
If the downloading file size is equal to the partition size, "fastboot
flash" can't work, at least in sunxi platform, because used an
uninitalized point: ep->desc.
This patch also fixed 'data abort' bug in am335x platform.
Reproduce: fastboot flash loader1 spl/sunxi-spl.bin.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.
So simply set the mtd->dev to the driver udevice.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
- Let am335x_evm use the CPSW or PRUSS ethernet.
- Implement timer_get_boot_us in the omap timer driver
- gpmc bitflip, QSPI clock calculation on am437x, da8xx_gpio bugfixes
- Assorted K3 updates
Second set of u-boot-at91 features for the 2022.04 cycle:
This small feature set includes few changes for sama7g5 and sama7g5ek:
turn blue led on at boot, changes required for the Rev4 of the board,
better sync with the Linux DT with regards to the new DT nodes.
CONFIG_PHANDLE_CHECK_SEQ will allow different sequence number for nodes
that have the same name, but they are different.
In sama7g5ek case, there are multiple 'i2c@600' nodes which are child
nodes of different parent 'flexcom' nodes.
These are different i2c busses even if the node is the same, and have to be
differentiated.
Without this config, the sequence number 0 is reused for two i2c busses, and
this is something that we have to avoid:
Looking for 'i2c' at 4704, name i2c@600
- serial0, /ahb/apb/serial@e1824200
- i2c0, /ahb/apb/flexcom@e181c000/i2c@600
Found seq 0
i2c_post_bind: i2c@600, seq=0
Looking for 'i2c' at 6236, name i2c@600
- serial0, /ahb/apb/serial@e1824200
- i2c0, /ahb/apb/flexcom@e181c000/i2c@600
Found seq 0
i2c_post_bind: i2c@600, seq=0
After this patch:
Looking for 'i2c' at 4704, name i2c@600
- serial0, /ahb/apb/serial@e1824200
- i2c0, /ahb/apb/flexcom@e181c000/i2c@600
- i2c1, /ahb/apb/flexcom@e2818000/i2c@600
Found seq 1
Before the patch:
=> i2c bus
Bus 0: i2c@600
Bus 0: i2c@600 (active 0)
52: eeprom@52, offset len 1, flags 0
53: eeprom@53, offset len 1, flags 0
=>
After the patch:
=> i2c bus
Bus 0: i2c@600
Bus 1: i2c@600 (active 1)
52: eeprom@52, offset len 1, flags 0
53: eeprom@53, offset len 1, flags 0
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The rev4 of the board sama7g5ek has the eeproms on flexcom8 instead of
flexcom1.
Initialize flexcom8 with required pincontrol and move the eeproms accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add Flexcom8 node with required referenced nodes as phandles.
Since Flexcom8 is present in Linux, take the node exactly as-is from Linux.
Some nodes are referenced in Linux as phandles, the dma and the gic.
Add them as well to the file, even if they are unused by Uboot.
This is a step towards having the U-boot DT equivalent with the DT in Linux.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
For configurations with gmii2rgmii and external phy the DT nodes link
should be gem->gmii2rgmii->phy. But due to limitation in Linux driver
the DT is mentioned as gem->phy and gmii2rgmii->phy as shown in below DT.
ethernet@ff0c0000 {
compatible = "cdns,zynqmp-gem\0cdns,gem";
status = "okay";
interrupt-parent = <0x04>;
interrupts = <0x00 0x3b 0x04 0x00 0x3b 0x04>;
reg = <0x00 0xff0c0000 0x00 0x1000>;
clock-names = "pclk\0hclk\0tx_clk\0rx_clk\0tsu_clk";
#address-cells = <0x01>;
#size-cells = <0x00>;
#stream-id-cells = <0x01>;
iommus = <0x0d 0x875>;
power-domains = <0x0c 0x1e>;
clocks = <0x03 0x1f 0x03 0x69 0x03 0x2e 0x03 0x32 0x03 0x2c>;
phy-handle = <0x0e>;
phy-mode = "gmii";
xlnx,ptp-enet-clock = <0x00>;
local-mac-address = [ff ff ff ff ff ff];
phandle = <0x4d>;
mdio {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x4e>;
ethernet-phy@1 {
reg = <0x01>;
rxc-skew-ps = <0x708>;
txc-skew-ps = <0x708>;
phandle = <0x0e>;
};
gmii_to_rgmii_0@8 {
compatible = "xlnx,gmii-to-rgmii-1.0";
phy-handle = <0x0e>;
reg = <0x08>;
phandle = <0x4f>;
};
};
};
Since same DT is used in Linux and U-Boot we need to workaround this
issue by using the gmii2rgmii node which points to phy and we should
ignore the gem pointing to phy directly.
Do this workaround by updating priv->phydev->node value with
priv->phy_of_node only if it is not valid node.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/641eb13425ffe80e0743f60cf90d0f940577b9e9.1642162085.git.michal.simek@xilinx.com
This driver supports power domains for the power management
controller found on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These are necessary to make sure the power domains needed for the
serial console are availble in the pre-relocation phase.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This synchronizes the device trees with those that are in the
process of being upstreamed into Linux. This is mostly the
current state of the device trees on the asahilinux branch
with a few extra bits used by OpenBSD. This includes device
trees for machines that were still missing.
There are still some differences that will hopefully be resolved
soon.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The am335x-ice-v2 board's Ethernet ports can be configured
in 'MII' or 'RMII' mode to be connected to 'PRUSS' or 'CPSW'
Ethernet subsystems.
This patch sets the environment variable 'ice_mii' to
'mii' or 'rmii' accordingly. Based on that we choose the
appropriate board devicetree i.e. 'am335x-ice-v2.dtb' or
'am335x-ice-v2-prueth.dtb'.
Since there are 2 Ethernet ports with 2 modes, there can be 4
configurations but for now we consider both ports in different modes
to be an invalid configuration and prevent boot in that case.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[Amjad: use overlay instead of using new am335x-ice-v2-prueth.dtb]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Make prueth_is_mii be marked __maybe_unused]
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of an erased (sub)page both the data and ECC are all 0xFF
bytes. This fails the normal ECC verification, as the computed ECC of
all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect
erased pages by checking that the ECC bytes are all-0xFF, but this had
two problems:
1) bitflips in the data were not corrected, so the data looked not-erased
2) bitflips in the ECC bytes were reported as uncorrectable ECC errors
The equivalent Linux driver [1] correctly handles this by counting the
number of 0-bits in the combination of data and ECC bytes. If the number
of 0-bits is less than the amount of bits correctable by the selected
ECC algorithm, then it is treated as an erased page with correctable
bitflips.
Implement similar, though simplified, logic in omap_correct_data_bch().
[1] see omap_elm_correct_data() in omap2.c
Signed-off-by: David Rivshin <drivshin@allworx.com>
On AM4372 the SPI_GCLK input gets its clock from the PRCM module which
divides the PER_CLKOUTM2 frequency (192MHz) by a fixed factor of 4.
See AM437x Reference Manual in section 27 QSPI >> 27.2 Integration.
The QSPI_FCLK therefore needs to take this factor into account and
becomes (192000000 / 4).
Signed-off-by: Stefan Mätje <stefan.maetje@esd.eu>
To make the OMAP DM timer driver useful for the timing of
bootstages, we need to implement timer_get_boot_us(..).
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The GPIO bank numbers do not appear in the device tree,
so make the gpio name based on the address
(ie gpio@42110000_25 vs 25)
Signed-off-by: chao zeng <chao.zeng@siemens.com>
The fastboot protocol uses per default the UDP port 5554. In some cases
it might be needed to change the used port. The fastboot utility provides
a way to specifiy an other port number to use already.
fastboot -s udp:192.168.1.76:1234 boot fastboot.img
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG/STAT
register to wait until a transaction has finished, not bit 31 in the
data register.
In the Linux kernel, this has already been fixed in commit 26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").
This patch changes the register in the fman_mdio and fsl_ls_mdio
drivers.
As the MDIO_DATA_BSY define is no longer in use, this patch also removes
its definition from the fsl_memac header.
Signed-off-by: Markus Koch <markus@notsyncing.net>
Reviewed-by: Camelia Groza <camelia.groza@nxp.com>
Reduce the missing phy-handle log message to debug message. It is
possible for ethernet DT node to have no phy-handle e.g. in case
of a fixed-link connection. Furthermore, drop the FEC: prefix,
which is a copy-paste error and rather print the ethernet device
name.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This driver is based on an older downstream TI kernel, with
changes and cleanups to work with mainline device-tree bindings.
Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The sja1105_check_device_id() function contains logic to work without
changing the device tree on reworked boards, one of which I have (the
NXP LS1021A-TSN normally has a SJA1105T, but I have a version with a
resoldered SJA1105Q which is pin compatible). This logic is taken from
the Linux driver.
However this logic gets shortcircuited in U-Boot by an earlier check for
the exact device ID specified in the device tree. So the reworked board
does not probe the SJA1105Q switch. Remove this duplicated logic and let
the automatic device ID detection do its job.
Fixes: f24b666b22 ("net: dsa: add driver for NXP SJA1105 L2 switch")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If the DSA API is going to allow drivers to do things such as:
- phy_config in dsa_ops :: port_probe
- phy_startup in dsa_ops :: port_enable
then it would actually be good if the ->port_probe() method would
actually be called in all cases before the ->port_enable() is.
Currently this is true for user ports, but not true for the CPU port,
because the CPU port does not have a udevice registered for it (this is
all part of DSA's design). So the current issue is that after
phy_startup has finished for the CPU port, its phydev->speed is an
uninitialized value, because phy_config() was never called for the
priv->cpu_port_fixed_phy, and it is precisely phy_config() who copies
the speed into the phydev in the case of the fixed PHY driver.
So we need to simulate a probing event for the CPU port by manually
calling the driver's ->port_probe() method for the CPU port.
Fixes: 8a2982574854 ("net: dsa: introduce a .port_probe() method in struct dsa_ops")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This will allow consumers to choose a pxe label at runtime instead of
having to prompt the user. One good use-case for this, is choosing
whether or not to apply a dtbo depending on the hardware configuration.
e.g: for TI's AM335x EVM, it would be convenient to apply a particular
dtbo only when the J9 jumper is on PRUSS mode. To achieve this, the
pxe menu should have 2 labels, one with the dtbo and the other without,
then the "pxe_label_override" env variable should point to the label with
the dtbo at runtime only when the jumper is on PRUSS mode.
This change can be used for different use-cases and bring more
flexibilty to consumers who use sysboot/pxe_utils.
if "pxe_label_override" is set but does not exist in the pxe menu,
the code should fallback to the default label if given, and no failure
is returned but rather a warning message.
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Call dram_init_banksize() from spl_board_init() otherwise TFTP download
fails due to lmb_get_free_size() not able to find unreserved region due
to lack of DRAM size info. Required to support Ethernet boot on AM64x.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
On certain TI SoC, like AM64x there is a CPSW3G which supports 2
external independent MAC ports for single CPSW instance.
It is not possible for Ethernet driver to register more than one port
for given instance.
This patch modifies top level CPSW NUSS as UCLASS_MISC and binds
UCLASS_ETH to individual ports so as to support bring up more than one
Ethernet interface in U-Boot.
Note that there is no isolation in the since, CPSW NUSS is in promisc
mode and forwards all packets to host.
Since top level driver is now UCLASS_MISC, board files would need to
instantiate this driver explicitly.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Probe toplevel AM65 CPSW NUSS driver from misc_init_r() when driver
is enabled. Since driver is modeled as UCLASS_MISC, we need to
explicitly probe the driver. Use common misc_init_r() that entire
K3 family of SoCs.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Driver has a bug in that it uses rflow_in_use bitmap when setting up free rflow range
from TISCI but use rflow_map for reservation in __udma_reserve_rflow()
Fix this by dropping rflow_in_use bitmap array and use rflow_map for
PKTDMA. BCDMA does not need rflow_in_use either.
This fixes CPSW3g not able to get DMA channels at R5 SPL on AM64x
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
In case of xSPI bootmode OSPI flash is in DDR mode and needs to be accessed
in multiple of 16bit accesses Hence we cannot parse sysfw.itb FIT image
directly on OSPI flash via MMIO window. So, copy the image to internal
on-chip RAM before parsing the image.
Moreover, board cfg data maybe modified by ROM/TIFS in case of HS platform
and thus cannot reside in OSPI/xSPI and needs to be copied over to
internal OCRAM.
This unblocks OSPI/xSPI boot on HS platforms
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Dave Gerlach <d-gerlach@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Currently only the PADCFG registers of the main domain are unlocked.
Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured by u-boot or Linux.
Signed-off-by: Michael Liebert <liebert@ibv-augsburg.de>
Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
Pull request for efi-2022-04-rc1
Documentation:
* Fix building HTML documentation of readthedocs.io
* Add ARM Juno board documentation
* Build requirements for Alpine Linux
* Include DM headers in API documentation
UEFI:
* Fix section alignment of EFI binaries
* Fix header length of RISC-V EFI binaries allowing to run them on EDK II
* Remove kaslr-seed from device tree if the EFI_RNG_PROTOCOL is provided
Other:
* Let 'part list' show all 128 GPT partitions
- A number of fixes in various subsystems. This includes having the phy
uclass track power-on and init counts as this should resolve some
tricky functional problems on a number of platforms.
Document the return value in efi_init(). Fix up @sizep in efi_info_get().
Use Return: instead of @return
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present some 32-bit settings are used with the 64-bit app. Fix this by
separating out the two cases.
Be careful not to break the 64-bit payload, which needs to build a 64-bit
EFI stub with a 32-bit U-Boot.
Signed-off-by: Christian Melki <christian.melki@t2data.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
That script is not intended for use with EFI, so update the logic to avoid
using it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christian Melki <christian.melki@t2data.com>
Add an empty CPU init function to avoid fiddling with low-level CPU
features in the app. Set up the C runtime correctly for 64-bit use
and avoid clearing BSS, since this is done by EFI when U-Boot is loaded.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the 'efi' command only works in the EFI payload. Update it to
work in the app too, so the memory map can be examined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present this function requires a pointer to struct efi_entry_memmap
but the only field used in there is the desc_size. We want to be able
to use it from the app, so update it to use desc_size directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this code is inline in the app and stub. But they do the same
thing. The difference is that the stub does it immediately and the app
doesn't want to do it until the end (when it boots a kernel) or not at
all, if returning to UEFI.
Move it into a function so it can be called as needed.
Add a comment showing how to store the memory map so that it can be
accessed within the app if needed, for debugging purposes only. The map
can change without notice.
Signed-off-by: Simon Glass <sjg@chromium.org>
If variable dfu_alt_info is not defined duplicate messages are displayed.
=> efidebug boot dump
Scanning disk mmc2.blk...
Scanning disk mmc1.blk...
Scanning disk mmc0.blk...
Found 3 disks
No EFI system partition
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
Remove the 'Probably dfu_alt_info not defined' message.
Instead write a warning if the variable contains no entities.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
U-Boot, in some occasions, injects a 'kaslr-seed' property on the /chosen
node. That would be problematic in case we want to measure the DTB we
install in the configuration table, since it would change across reboots.
The Linux kernel EFI-stub completely ignores it and only relies on
EFI_RNG_PROTOCOL for it's own randomness needs (i.e the randomization
of the physical placement of the kernel). In fact it (blindly) overwrites
the existing seed if the protocol is installed. However it still uses it
for randomizing it's virtual placement.
So let's get rid of it in the presence of the RNG protocol.
It's worth noting that TPMs also provide an RNG. So if we tweak our
EFI_RNG_PROTOCOL slightly and install the protocol when a TPM device
is present the 'kaslr-seed' property will always be removed, allowing
us to reliably measure our DTB.
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
A GPT partition table typically has 128 entries. If a partition table
contains a partition 128 'part list' should be able to list it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
For GPT partition tables the 'part list' command stops at the first invalid
partition number. But Ubuntu has images with partitions number
1, 12, 13, 14, 15
In this case only partition 1 was listed by 'part list'.
Fixes: 38a3021edc ("disk: part_efi: remove indent level from loop")
Reported-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
The alignment of sections in the EFI binaries generated by U-Boot is
incorrect.
According to the PE-COFF specification [1] the minimum value for
FileAlignment is 512. If the value of SectionAlignment is
less then the page size, it must equal FileAlignment.
Let's set both values to 512 for the ARM and RISC-V architectures.
[1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
EDK II refuses to load the EFI binaries created by U-Boot.
The reason is an incorrect PE-COFF header. The number of
data directories does not match NumberOfRvaAndSizes.
This leads to a failed consistency check in
PeCoffLoaderGetPeHeader():
SizeOfOptionalHeader - HeaderWithoutDataDir) !=
NumberOfRvaAndSizes * sizeof(DATA_DIRECTORY))
Fixes: 9afaeec6ef ("riscv: Complete efi header for RV32/64")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/fdtaddr.h
and add the devfdt API to the HTML documentation;
these functions are NOT compatible with live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/ofnode.h
and add the device tree node API to the HTML documentation;
the ofnode functions are compatible with Live tree or with flat
device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/read.h
and add the device read from device tree API to the HTML
documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/devres.h
and add the driver model device resource API, devres_*(),
to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/device.h
and add the driver model device API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/devres.h
and add the associated driver model API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct Sphinx style comments in include/dm/uclass.h
and add the driver model UCLASS API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The Juno Arm development board is an open, vendor-neutral, Armv8-A
development platform.
Add documentation that briefly outlines the hardware, and describes
building and installation of U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_PHANDLE_CHECK_SEQ is outside of the menu 'Library routines'
thus it's invisible in menuconfig and cannot be selected.
Fix this by moving the 'endmenu' after the PHANDLE_CHECK_SEQ definition
Fixes: c589132a1d ("fdt: Use phandle to distinguish DT nodes with same name")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add some new line feeds at the end of print messages to make things
easier to read on the console. The other env options do this so
this is just an omission for FAT env.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share
the same PHY device instance. While these controllers are being stopped
they both attempt to power-off and deinitialize it, but trying to
power-off the deinitialized PHY device results in a hang. This usually
happens just before booting an OS, and can be explicitly triggered by
running "usb start; usb stop" in the U-Boot shell.
Implement a uclass-wide counting mechanism for PHY initialization and
power state change requests, so that we don't power-off/deinitialize a
PHY instance until all of its users want it done. The Allwinner A10 USB
PHY driver does this counting in-driver, remove those parts in favour of
this in-uclass implementation.
The sandbox PHY operations test needs some changes since the uclass will
no longer call into the drivers for actions matching its tracked state
(e.g. powering-off a powered-off PHY). Update that test, and add a new
one which simulates multiple users of a single PHY.
The major complication here is that PHY handles aren't deduplicated per
instance, so the obvious idea of putting the counts in the PHY handles
don't immediately work. It seems possible to bind a child udevice per
PHY instance to the PHY provider and deduplicate the handles in each
child's uclass-private areas, like in the CLK framework. An alternative
approach could be to use those bound child udevices themselves as the
PHY handles. Instead, to avoid the architectural changes those would
require, this patch solves things by dynamically allocating a list of
structs (one per instance) in the provider's uclass-private area.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com> - Rock960
BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
command is enabled otherwise the build will fail.
Signed-off-by: Piotr Kubik <piotr_kubik@vp.pl>
Apple's ARMv8 cores don't implement EL3 and therefore don't
provide a PSCI implementation. So don't attempt to use
PSCI to reset on machines using Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Previously, a subpage with an uncorrectable error followed by a subpage
with a correctable error would return an erroneous correctable status.
Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reporting the return value should always be done on error conditions,
this way the developer can start debugging issues with more knowledge
in-hand.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
The function was missing from exports, even though it loooks like the
intent of the implementation in sscanf.c was to have it exported.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Calling 'nvme scan' followed by 'nvme detail' crashes U-Boot on Turris
Omnia with the following error:
undefined instruction
pc : [<0a000000>] lr : [<7ff80bfc>]
reloc pc : [<8a8c0000>] lr : [<00840bfc>]
sp : 7fb2b908 ip : 0000002a fp : 02000000
r10: 04000000 r9 : 7fb2fed0 r8 : e1000000
r7 : 0c000000 r6 : 03000000 r5 : 06000000 r4 : 01000000
r3 : 7fb30928 r2 : 7fb30928 r1 : 00000000 r0 : 00000000
Flags: nZCv IRQs off FIQs off Mode SVC_32
Code: 0f0fb4f0 0f0fb4f0 0f0fb4f0 0f0fb4f0 (f0f04b0f)
Resetting CPU ...
This happens when nvme_print_info() tries to return to the caller. It
looks like this error is caused by trying to allocate 8 KiB of memory
on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER().
Use malloc_cache_aligned() to allocate this memory dynamically instead.
This fixes 'nvme detail' on Turris Omnia.
Note that similar change was applied to file drivers/nvme/nvme.c in past by
commit 2f83481dff ("nvme: use page-aligned buffer for identify command").
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
This test checks for output specific to the sandbox blk device
"sandbox_host_blk", mark it as sandbox specific.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Attempt to handle cases with a downstream port of a PCIe switch where
link training never completes and the link continues switching between
speeds indefinitely with the data link layer never reaching the active
state.
It has been observed with a downstream port of the ASMedia ASM2824 Gen 3
switch wired to the upstream port of the Pericom PI7C9X2G304 Gen 2
switch, using a Delock Riser Card PCI Express x1 > 2 x PCIe x1 device,
P/N 41433, wired to a SiFive HiFive Unmatched board. In this setup the
switches are supposed to negotiate the link speed of preferably 5.0GT/s,
falling back to 2.5GT/s.
However the link continues oscillating between the two speeds, at the
rate of 34-35 times per second, with link training reported repeatedly
active ~84% of the time, e.g.:
02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
Bus: primary=02, secondary=05, subordinate=05, sec-latency=0
[...]
Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
LnkSta: Speed 5GT/s (downgraded), Width x1 (ok)
TrErr- Train+ SlotClk+ DLActive- BWMgmt+ ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
Forcibly limiting the target link speed to 2.5GT/s with the upstream
ASM2824 device makes the two switches communicate correctly however:
02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
Bus: primary=02, secondary=05, subordinate=09, sec-latency=0
[...]
Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
and then:
05:00.0 PCI bridge [0604]: Pericom Semiconductor PI7C9X2G304 EL/SL PCIe2 3-Port/4-Lane Packet Switch [12d8:2304] (rev 05) (prog-if 00 [Normal decode])
[...]
Bus: primary=05, secondary=06, subordinate=09, sec-latency=0
[...]
Capabilities: [c0] Express (v2) Upstream Port, MSI 00
[...]
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (downgraded)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
Make use of this observation then and attempt to detect the inability to
negotiate the link speed automatically, and then handle it by hand. Use
the Data Link Layer Link Active status flag as the primary indicator of
successful link speed negotiation, but given that the flag is optional
by hardware to implement (the ASM2824 does have it though), resort to
checking for the mandatory Link Bandwidth Management Status flag showing
that the link speed or width has been changed in an attempt to correct
unreliable link operation (the ASM2824 does set it too).
If these checks indicate that link may not operate correctly, then poll
the Data Link Layer Link Active status flag along with the Link Training
flag for the duration of 200ms to see if the link has stabilised, that
is either that the Data Link Layer Link Active status flag has been set
or that Link Training has been inactive during at least the second half
of the interval.
If that has indicated failure, restrict the target speed to 2.5GT/s,
request a link retrain and check again if the link has stabilised. If
that does not work either, then restore the original speed setting and
claim defeat, otherwise we are done.
NB interestingly enough with the ASM2824 vs PI7C9X2G304 configuration
referred above asking the ASM2824 to retrain with a higher target link
speed once the 2.5GT/s speed has been negotiated makes the two devices
successfully negotiate 5.0GT/s. Lifting the 2.5GT/s speed restriction
would however prevent our workaround from working with an OS that issues
a reset and that is unaware of the problem. This is because the devices
would then try to negotiate a higher link speed from scratch and fail,
while the sticky property of the Target Link Speed setting will keep the
2.5GT/s speed restriction across a reset.
Keep the 2.5GT/s speed restriction then, conservatively, if functional
once applied.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Misaligned operation at range [84000028, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]
Fix it
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
These hardcoded values were calculated from CONFIG_SPL_TEXT_BASE macro. Now
this macro is configurable via Kconfig, so calculate values 0x0030/0x4030
at compile time via CONFIG_SPL_TEXT_BASE option. Values 0x0030/0x4030
represents offset of CONFIG_SPL_TEXT_BASE from address 0x40000000.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Memory layout in the comment is from Armada XP platform which uses load
address 0x40004030. DB-88f6720 is Armada 375 platform which uses same load
address as Armada 38x which is 0x40000030.
Currently SPL support for Armada 375 is unfinished and does not work. There
is missing Serdes initialization and DDR3 training code. So nobody noticed
that CONFIG_SPL_* options are not correct.
Fix at least CONFIG_SPL_TEXT_BASE constant and remove incorrect comments
about memory layout. So it is not misleading.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Do not check for kwbimage configuration file when just showing information
about existing kwbimage file.
The check for kwbimage configuration file is required only when creating
kwbimage, not when showing information about image or when extracting data
from image.
With this change, it is possible to call mkimage -l and dumpimage -l also
for existing kwbimage file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When there is no -p argument for dumpimage tool specified, extract the main
data image from kwbimage file. This makes dumpimage consistent with other
image formats.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Despite the official specification, BootROM does not look at the lowest bit
of ext field but rather checks if ext field is non-zero.
Moreover original Marvell doimage tool puts into the mhdr->ext field the
number of extended headers, so basically it sets ext filed to non-zero
value if some extended header is present.
Fix U-Boot dumpimage and kwboot tools to parse correctly also kwbimage
files created by Marvell doimage tool, in the same way as the BootROM is
doing it when booting these images.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
To regenerate kwbimage from existing image, it is needed to have kwbimage
config file. Add a new option to generate kwbimage config file from
existing kwbimage when '-p 1' option is given.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
For debugging purposes it is good to know where the binary image would be
loaded and also it is needed to know if printed size is image size or the
size of header together with image.
Make it unambiguous by showing that printed size is not the size of the
whole header, but only the size of executable code, and print also the
executable offset of this binary image. Load/execute address is the offset
relative to the base address (either 0x40004000 or 0x40000000).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Data delay is stored as 8-bit number in kwbimage structure. Ensure the
given value is at most 255.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
BootROMs on pre-A38x SoCs enabled its output on UART by default, but A38x'
BootROM has its output on UART disabled by default.
To enable BootROM output on A38x SoC, it is required to set DEBUG flag
(which only enables BootROM output and nothing more) in kwbimage. For UART
images this DEBUG flag is ignored by BootROM.
Enable kwbimage DEBUG flag for all A38x boards.
With this change BootROM prints the following (success) information on UART
before booting U-Boot kwbimage:
BootROM - 1.73
Booting from SPI flash
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This alignment is required only for platforms based on Sheeva CPU core
which are A370 and AXP. Now when U-Boot build system correctly propagates
LOAD_ADDRESS there is no need to have enabled 128-bit boundary alignment on
platforms which do not need it. Previously it was required because load
address was implicitly rounded to 128-bit boundary and U-Boot build system
expected it and misused it. Now with explicit setting of LOAD_ADDRESS there
is no guessing for load address anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot SPL for mvebu platform is not compiled as position independent.
Therefore it is required to instruct BootROM to load U-Boot SPL at the
correct address. Loading of kwbimage binary code at specific address can be
now achieved by the new LOAD_ADDRESS token as part of BINARY command in
kwbimage config file.
Update mvebu Makefile to put value of $(CONFIG_SPL_TEXT_BASE) into
LOAD_ADDRESS token when generating kwbimage.cfg from kwbimage.cfg.in.
It is required to update regex for sed to find replacement tokens at any
position on a line in kwbimage config file and not only at the beginning of
the line. This is because LOAD_ADDRESS is specified at the end of line
containing the BINARY command.
It looks like all Armada boards set CONFIG_SPL_TEXT_BASE to value
0x40004030 or 0x40000030. Why this value? It is because main kwbimage
header is at address 0x40004030 or 0x40000000 and it is 32 bytes long.
After the main header there is the binary header, which consist of 1 byte
for type, 3 bytes for size, 1 byte for number of arguments, 3 reserved
bytes and then 4 bytes for each argument. After these arguments comes the
executable code.
So arguments start at address 0x40004028 or 0x40000028. Before commit
e6571f38c9 ("arm: mvebu: Remove dummy BIN header arguments for SPL
binary") there were two (dummy) arguments, which resulted in load address
of 0x40004030 or 0x40000030, always. After that commit (which removed dummy
arguments), load address stayed same due to the 128-bit alignment done by
mkimage.
This patch now reflects the dependency between $(CONFIG_SPL_TEXT_BASE),
load address and dummy kwbimage arguments, and allows the user to adjust
$(CONFIG_SPL_TEXT_BASE) config option to some other value.
For unsupported values, when mkimage/kwbimage cannot set chosen load address
as specified by $(CONFIG_SPL_TEXT_BASE), the build process now fails,
instead of silently generating non-working kwbimage.
Removal of this alignment between $(CONFIG_SPL_TEXT_BASE) and LOAD_ADDRESS
can only be done by compiling U-Boot SPL as position independent. But this
currently is not possible for 32-bit ARM version of U-Boot SPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
BootROM loads kwbimage header to L2-SRAM and BootROM reserve only 192 kB for it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Function image_headersz_v1() may return zero on fatal errors.
In this case the function already printed an error message.
Check the return value of image_headersz_v1() in kwbimage_generate(),
and exit on zero value with EXIT_FAILURE.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
ARM executable code included in kwbimage binary header, which is not
position independent, needs to be loaded and executed by BootROM at the
correct fixed address.
Armada BootROMs load kwbimage header (in which the executable code is also
stored) at fixed address 0x40004000 or 0x40000000 which is mapped to
L2-SRAM (L2 Cache as SRAM). Address 0x40004000 is used on Armada platforms
with Sheeva CPU core (A370 and AXP) where BootROM uses MMU with 0x4000
bytes for MMU translation table. Address 0x40000000 is used on all other
platforms.
Thus the only way to specify load and execute address of this executable
code in binary kwbimage header is by filling dummy arguments into the
binary header, using the same mechanism we already have for achieving
128-bit boundary alignment on A370 and AXP SoCs.
Extend kwbimage config file parser to allow to specify load address as
part of BINARY command with syntax:
BINARY path_to_binary arg1 arg2 ... argN LOAD_ADDRESS address
If the specified load address is invalid or cannot be used, mkimage will
throw fatal error and exit. This will prevent generating kwbimage with
invalid load address for non-position independent binary code.
If no load address is specified, kwbimage will not fill any the dummy
arguments, thus it will behave the same as before this change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
For other changes it is required to know if CPU core is Sheeva or not.
Therefore add a new command CPU for specifying CPU.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Usage of $(call cmd,...) is standard way to call other commands which
generate things.
It also has the advantage of printing build information in the form
KWBCFG arch/arm/mach-mvebu/kwbimage.cfg
if verbosity is disabled, and printing the build command otherwise.
Note that the '#' character needs to be escaped in Makefile when used as
value for make variable assignment.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Preserve the order of BINARY, DATA and DATA_DELAY commands as they appear
in the input file. They may depend on each other.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Register set header consists of sequence of DATA commands followed by
exactly one DATA_DELAY command. Thus if we are generating image with
multiple DATA_DELAY commands, we need to create more register set headers.
Fix calculation of image size with multiple DATA_DELAY commands and
correctly set pointer to struct register_set_hdr_v1 when initializing new
register set header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Deduplicate code that finishes OPT_HDR_V1_REGISTER_TYPE header by
extracing it into separate function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This is a cleaned up and fixed version of a patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
in each pattern cycle the bus state can be changed
in order to avoide it, need to back to the same bus state on each
pattern cycle
by
Moti Boskula <motib@marvell.com>
The original patch is not in Marvell's mv-ddr-marvell repository. It was
gives to us by Marvell to fix an issues with DDR training on some
boards, but it cannot be applied as is to mv-ddr-marvell, because it is
a very dirty draft patch that would certainly break other things, mainly
DDR4 training code in mv-ddr-marvell, since it changes common functions.
I have cleaned up the patch and removed stuff that seemed unnecessary
(when removed, it still fixed things). Note that I don't understand
completely what the code does exactly, since I haven't studied the DDR
training code extensively (and I suspect that no one besides some few
people in Marvell understand the code completely).
Anyway after the cleanup the patch still fixes isssues with DDR training
on the failing boards.
There was also a problem with the original patch on some of the Allied
Telesis' x530 boards, reported by Chris Packham. I have asked Chris to
send me some logs, and managed to fix it:
- if you look at the change, you'll notice that it introduces
subtraction of cur_start_win[] and cur_end_win[] members, depending on
a bit set in the current_byte_status variable
- the original patch subtracted cur_start_win[] if either
BYTE_SPLIT_OUT_MIX or BYTE_HOMOGENEOUS_SPLIT_OUT bits were set, but
subtracted cur_end_win[] only if the first one (BYTE_SPLIT_OUT_MIX)
was set
- from Chris Packham logs I discovered that the x530 board where the
original patch introduced DDR training failure, only the
BYTE_HOMOGENEOUS_SPLIT_OUT bit was set, and on our boards where the
patch is needed only the BYTE_SPLIT_OUT_MIX is set in the
current_byte_status variable
- this led me to the hypothesis that both cur_start_win[] and
cur_end_win[] should be subtracted only if BYTE_SPLIT_OUT_MIX bit is
set, the BYTE_HOMOGENEOUS_SPLIT_OUT bit shouldn't be considered at all
- this hypothesis also gains credibility when considering the commit
title ("fix SPLIT_OUT_MIX state decision")
Hopefully this will fix things without breaking anything else.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Chris Packham <judge.packham@gmail.com>
I got an
<dirk.eibach@gdsys.cc>: host mxlb.ispgateway.de[80.67.18.126] said:
554 Sorry, no mailbox here by that name. (in reply to RCPT TO command)
when sending e-mail to dirk.eibach@gdsys.cc.
Drop Dirk Eibach from MAINTAINERS of board/gdsys/a38x and
board/gdsys/mpc8308. The latter would be left maintainerless, add
Mario Six <mario.six@gdsys.cc> (he is also maintainer of the former
board).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
2 GHz and DDR at 933 MHz.
Then commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode") added support for Asynchornous Modes with frequencies other than
933 MHz (but at least 467 MHz), but the code it added to check for
whether Asynchornous Mode should be used is wrong: it checks whether the
frequency setting in board DDR topology map is set to value other than
MV_DDR_FREQ_SAR.
Thus boards which define a specific value, greater than 400 MHz, for DDR
frequency in their board topology (e.g. Turris Omnia defines
MV_DDR_FREQ_800), are incorrectly put into Asynchornous Mode after that
commit.
The A38x Functional Specification, section 10.12 DRAM Clocking, says:
In Synchornous mode, the DRAM and CPU clocks are edge aligned and run
in 1:2 or 1:3 CPU to DRAM frequency ratios.
Change the check for whether Asynchornous Mode should be used according
to this explanation in Functional Specification.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Add MVEBU PCIe configs
- Also add SYS_THUMB_BUILD to keep u-boot image size within 512K
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The DT properties for the "enable-arbiter" and "keep-config" config
knobs were previously named inconsistently:
- The u-boot driver used "nand-enable-arbiter" and "nand-keep-config"
names, without Marvell prefixes.
- The Linux driver uses "marvell,nand-keep-config" ("enable-arbiter"
does not exist anymore in recent kernels, but it also used to be
"marvell,nand-enable-arbiter").
- The device trees almost all use "marvell," prefixed names, except for
one single instance of "nand-enable-arbiter" without vendor prefix.
This commit standardizes on the vendor prefixed version, making the
u-boot driver read from DT props "marvell,nand-enable-arbiter" and
"marvell,nand-keep-config". The one device tree using the unprefixed
version is also changed to use the new naming.
This has the side effect of making the previously no-op "marvell,"
config knobs already present in some DTs actually do something. This was
likely the original intention of the DT authors, but note that this
commit was not tested on every single impacted board.
Signed-off-by: Pierre Bourdon <delroth@gmail.com>
As explained in commit 3bedbcc3aa ("arm: mvebu: a38x: serdes: Don't
overwrite read-only SAR PCIe registers") it is required to set Maximum Link
Width bits of PCIe Root Port Link Capabilities Register depending of number
of used serdes lanes. As this register is part of PCIe address space and
not serdes address space, move it into pci_mvebu.c driver.
Read number of PCIe lanes from DT property "num-lanes" which is used also
by other PCIe controller drivers in Linux kernel. If this property is
absent then it defaults to 1. This property needs to be set to 4 for every
mvebu board which use PEX_ROOT_COMPLEX_X4 or PEX_BUS_MODE_X4.
Enabling of PCIe port needs to be done afer all registers in PCIe address
space are properly configure. For this purpose use new mvebu-reset driver
(part of system-controller) and remove this code from serdes code.
Because some PCIe ports cannot be enabled individually, it is required to
first setup all PCIe ports and then enable them.
This change contains also all required "num-lanes" and "resets" DTS
properties, to make pci_mvebu.c driver work correctly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Enabling and disabling PCIe ports is done via address space of system
controller. All 32-bit Armada SoCs use low 4 bits in SoC Control 1 Register
for enabling and disabling some or more PCIe ports. Correct mapping needs
to be set in particular DTS files.
DT API for mvebu-reset is prepared for implementing resets also for other
HW blocks, but currently only PCIe is implemented via index 0.
Currently this driver is not used as PCIe ports are automatically enabled
by SerDes code executed by U-Boot SPL. But this will change in followup
patches.
Signed-off-by: Pali Rohár <pali@kernel.org>
After function mvebu_pcie_probe() returns U-Boot DM expects that PCIe link
is already up. In followup patches link initialization will be moved from
SPL to proper and therefore explicitly link up delay is required.
Delay mvebu_pcie_probe() for 100ms to ensure that PCIe link is up after
function finish. In the case when no card is connected to the PCIe slot,
this will delay probe time by 100ms, which should not be problematic.
This change fixes detection and initialization of some QCA98xx cards on
the first serdes when configured in x1 mode. Default configuration of
the first serdes on A385 is x4 mode, so it looks as if some delay is
required when x4 is changed to x1 and card correctly links with A385.
Other PCIe serdes ports on A385 are x1-only, and so they don't have this
problem.
Signed-off-by: Pali Rohár <pali@kernel.org>
In first phase just parse DT properties and fill struct mvebu_pcie. In
second phase setup all PCIe links (without enabling them). And in the last
third phase enable all PCIe links and create UCLASS_PCI device for each
one.
Because parsing of DT is done before UCLASS_PCI is created, we cannot use
DM for this action anymore. So remove .of_to_plat callback and replace it
by ad-hoc function for parsing DT properties and filling struct mvebu_pcie.
Signed-off-by: Pali Rohár <pali@kernel.org>
SoC specific macro SOC_REGS_PHY_BASE is used for two things:
* calculation of base PCIe port address
* filling PCIe register with address of internal registers
For calculating base PCIe port address use function
ofnode_translate_address() which translates DT "assigned-addresses" to
final PCIe port address.
And for calculating address of internal registers use untranslated and
translated DT "assigned-addresses".
Basically this change reads SOC_REGS_PHY_BASE address indirectly from DT.
Signed-off-by: Pali Rohár <pali@kernel.org>
Function mvebu_pcie_port_parse_dt() is called only from
mvebu_pcie_of_to_plat() function. Both these function parse DT properties
required to setup mvebu pcie. So inline mvebu_pcie_port_parse_dt() function
into mvebu_pcie_of_to_plat() to have all code related to parsing DT
properties at one place.
Signed-off-by: Pali Rohár <pali@kernel.org>
Do not call pci_set_region() for resources which were not properly mapped.
This prevents U-Boot to access unmapped memory space.
Update MBUS_PCI_MEM_SIZE and MBUS_PCI_IO_SIZE macros to cover all PCIe MEM
and IO ranges. Previously these macros covered only address ranges for the
first PCIe port. Between MBUS_PCI_IO_BASE and MBUS_PCI_MEM_BASE there is
space for six 128 MB long address ranges. So set MBUS_PCI_MEM_SIZE to value
of 6*128 MB. Similarly set MBUS_PCI_IO_SIZE to 6*64 KB.
Function resource_size() returns zero when start address is 0 and end
address is -1. So set invalid resources to these values to indicate that
resource has no mapping.
Split global PCIe MEM and IO resources (defined by MBUS_PCI_*_* macros)
into PCIe ports in mvebu_pcie_bind() function which allocates per-port
based struct mvebu_pcie, instead of using global state variables
mvebu_pcie_membase and mvebu_pcie_iobase. This makes pci_mvebu.c driver
independent of global static variables (which store the state of
allocation) and allows to bind and unbind the driver more times.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
A385 controlcenterdc board does not use PCI DM properly and touches some
PCIe devices directly in its board code.
This controlcenterdc spl_board_init() function expects that PCIe link is
already initialized. Link itself is initialized in a38x serdes code but
this will change in future and link initialization will be postponed from
U-Boot SPL to proper U-Boot.
So explicitly enable PCIe link 2 in spl_board_init() function via
SoC Control Register 1 to not break this code by future changes. This board
has PCIe link 2 just x1, so no additional initialization (except enabling
PCIe port) is needed.
Signed-off-by: Pali Rohár <pali@kernel.org>
The only user of board_pex_config() weak function is A385 controlcenterdc
board. It looks like that code in its board_pex_config() function needs to
be executed after PCIe link is up. Therefore put this code into
spl_board_init() function which is called after a38x serdes initialization,
and therefore it is after the serdes hws_pex_config() function finishes
(which is the state before this change).
With this change completely remove board_pex_config() function as it is not
used anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
This implementation is intended to be copied to other projects and
modified, to as to foster a standard means of communcating runtime
information between firmware projects.
The GPL-2 license is too restrictive for some projects, e.g. those
intended as reference implementations rather than designed for
collaborative open-source development.
Update the license to make this easier to share.
Signed-off-by: Simon Glass <sjg@chromium.org>
FIx up various minor errors and add the API documentation to the bloblist
docs, since it is quite useful to see it in the same place.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we do support allocating the bloblist but the Kconfig is a bit
strange, since we still have to specify an address in that case. Partly
this is because it is a pain to have CONFIG options that disappears when
its dependency is enabled. It means that we must have #ifdefs in the code,
either in the C code or header file.
Make use of IF_ENABLED_INT() and its friend to solve that problem, so we
can separate out the location of bloblist into a choice. Put the address
and size into variables so we can log the result.
Add the options for SPL as well, so we can use CONFIG_IS_ENABLED().
Signed-off-by: Simon Glass <sjg@chromium.org>
We typically refer to the different U-Boot builds that a board runs
through as phases. This avoids confusion with the word 'stage' which is
used with bootstage, for example. Fix up some bloblist Kconfig help
which uses the wrong term.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if someone adds a tag in the middle of the list it works well
enough within a U-Boot build. But if these tags are used in another
project, or with an older version of SPL, the numbers make become
inconsistent.
Use explicit tag numbers that never change, to resolve this problem.
Allocate areas for existing U-Boot tags and set up an area for use by
projects and vendors, as well as for private use. Keep tags above
0x10000 unallocated for now.
Update bloblist_tag_name() and the tests to work with this new setup.
Signed-off-by: Simon Glass <sjg@chromium.org>
The EC event log tag is no-longer used. The vboot handoff is now handled
by the vboot context instead.
Drop these unused tags.
Signed-off-by: Simon Glass <sjg@chromium.org>
It seems best to put the magic number right at the start of the bloblist
header, so it is easier to check. This is how devicetree works.
Make this change now, before other projects make use of bloblist. Other
changes may be needed / discussed, but that is TBD.
Add a checker function as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some bright sparks have decided that a cast on a constant cannot be a
constant, so offsetof() produces this warning on clang-10:
include/intel_gnvs.h:113:1: error: static_assert expression is not an
integral constant expression
check_member(acpi_global_nvs, unused2, GNVS_CHROMEOS_ACPI_OFFSET);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/kernel.h:284:2: note: expanded from macro 'check_member'
offsetof(struct structure, member) == (offset), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/stddef.h:20:32: note: expanded from macro 'offsetof'
^
include/intel_gnvs.h:113:1: note: cast that performs the conversions of
a reinterpret_cast is ot allowed in a constant expression
include/linux/stddef.h:20:33: note: expanded from macro 'offsetof'
Fix it by using the compiler built-in version, if available. This syncs
the function to the same implementation as Linux v5.16 in this header
file.
Signed-off-by: Simon Glass <sjg@chromium.org>
When genboardscfg.py is run on machines with 255 or more cores, the
process will consume more than 1024 file descriptors, which is a common
standard ulimit for user processes. As a consequence it will fail with a
lenghty Python trace, with the almost hidden message:
OSError: [Errno 24] Too many open files
It's somewhat questionable whether that level of parallelity is actually
useful for genboardscfg, so we limit the *default* number of jobs to the
safe number of 240, to avoid the problem.
If a user persists, she can still force a higher number via the -j
parameter - hopefully having raised the ulimit accordingly beforehand.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
U-Boot define loff_t as long long. But the header
/usr/include/linux/types.h may not define it.
This has lead to a build error on Alpine Linux.
So let's use long long instead of loff_t for
the size parameter of function os_get_filesize().
Reported-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Python doesn't naturally support tilde (~) as a user-home marker in
paths, but git-config does. So we need to resolve it before continuing.
We also shouldn't blindly join the top-level tree with the aliasesfile
path, because it might be an absolute path.
This resolves warnings like the following:
Warning: Cannot find alias file '/path/to/source/tree/~/.git-email'
Seen when git-config is like:
$ git config sendemail.aliasesfile
~/.git-email
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
The commit 3ad3077848 ("dm: core: device: enable power domain in probe")
introduced enabling power domain when device is probed.
By checking this sequence in Linux kernel was found that power domain is
handled first followed by pinctrl setting.
This patch is switching this order to follow Linux kernel that power
domains are handled first follow by pinctrl setting.
The issue was found on Xilinx Kria SOM where firmware is blocking setting
up pin configuration/muxes without enabling power domain for the specific
IP first.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Somewhere along the way, someone misspelt "invalid" and it got copied
everywhere. Fix it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fix binman fake blob support to write outside source directory
- Azure now has stages in the pipeline
- Update to latest focal tag for containers in CI.
- Finish dropping LynxOS
- Add migration message for timer code
Add compatible and data platform struct for sam9x60 SoC.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Rely on the new watchdog timer driver and the sysreset uclass to
reset the system. This gets rid of hard-coded addresses and
should work on systems based on the new M1 Pro and M1 Max SoCs
as well.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
Add a node for the watchdog timer based on the proposed Linux
device tree bindings.
Remove the old reboot node which was a watchdog timert node in
disguise using a preliminary device tree binding.
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
This driver supports the watchdog timer found on Apple's M1 SoC.
On systems that use these SoC, the watchdog timer is the primary
way to reboot the system.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
Model names are SM-A{3,5,7}20, just SM-{3,5,7}20 could also refer to
SM-J{3,5,7}20 or SM-T{3,5,7}20.
Fixes: 3e2095e960 ("board: samsung: add support for Galaxy A series
of 2017 (a5y17lte)")
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Reviewed-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
a7y17lte is called SM-A720F, and a3y17lte SM-A320F. a3y17lte also
should select PINCTRL_EXYNOS78x0, not the (non-existent)
PINCTRL_EXYNOS7880, and it has an Exynos 7870 SoC and not 7880.
Fixes: 3e2095e960 ("board: samsung: add support for Galaxy A series
of 2017 (a5y17lte)")
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Some boards still use the old timer mechanism. Set a deadline for them to
update to driver model. Point to some examples as well.
This needs a bit of a strange rule to avoid an error on some boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
LynxOS needed the do_bootm_lynxkdi() function that got removed in
7e713067ee ("Remove LYNX KDI remainders") - and that function needed
a lynxkdi_boot() function, where the last implementation had been
removed in 98f705c9ce ("powerpc: remove 4xx support") already. Looks
like this OS is definitely not supported anymore, so remove it from
the corresponding lists.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
At present binman writes fake blobs to the current directory. This is not
very helpful, since the files serve no useful purpose once binman has
finished. They clutter up the source directory and affect future runs,
since the files in the current directory are often used in preference to
those in the board directory.
To avoid these problems, write them to the output directory instead.
Move the file-creation code to the Entry base class, so it can be used by
any entry type that needs it. This is required since some entry types,
such as Entry_blob_ext_list, are not subclasses of Entry_blob.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use a unique number instead of the current 203, which is used by 203_fip
as well. Reformat the code to avoid a long line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Follow what we do in GitLab CI where we break the jobs up in to stages
such that if earlier and often quicker sanity tests fail we don't run
everything else.
Signed-off-by: Tom Rini <trini@konsulko.com>
When building for i.mx8m boards with binman, a few more additional
files are created which should be removed when running 'make clean'
Signed-off-by: Adam Ford <aford173@gmail.com>
sh7751 platform uses standard format of Config Address for PCI
Configuration Mechanism #1.
Commit 72c2f4acd7 ("pci: sh7751: Convert to DM and DT probing") which did
conversion of PCI sh7751 driver to DM, broke access to config space as that
commit somehow swapped device and function bits in config address.
Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which
calculates Config Address correctly.
Also remove nonsense function sh7751_pci_addr_valid() which was introduced
in commit 72c2f4acd7 ("pci: sh7751: Convert to DM and DT probing")
probably due to workarounded issues with mixing/swapping device and
function bits of config address which probably resulted in non-working
access to some devices. With correct composing of config address there
should not be such issue anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 72c2f4acd7 ("pci: sh7751: Convert to DM and DT probing")
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mcf5445x platform uses standard format of Config Address for PCI
Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
x86 platform uses standard format of Config Address for PCI Configuration
Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI sh7780 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI mediatek driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI fsl driver uses extended format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI tegra driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI mvebu driver uses extended format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom
driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI mpc85xx driver uses extended format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lot of PCI and PCIe controllers are using standard Config Address for PCI
Configuration Mechanism #1 or its extended version.
So add PCI_CONF1_ADDRESS() and PCI_CONF1_EXT_ADDRESS() macros into U-Boot's
pci.h header file which can be suitable for most PCI and PCIe controller
drivers. Drivers do not have to invent their own macros and can use these
new U-Boot macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is common to set all base address bits to one and all limit address bits
to zero for disabling address forwarding. Forwarding is disabled when base
address is higher than limit address, so this change should not have any
effect.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
If U-Boot does not have any I/O resource for assignment then disable I/O
forwarding in PCI bridge autoconfiguration code. Default initial state of
PCI bridge IO registers is unspecified, therefore they can be in enabled if
U-Boot does not touch them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Function dm_pciauto_prescan_setup_bridge() configures base address
registers, therefore it should read type of IO from base address registers
(and not from limit address registers).
Note that base and limit address registers should have same type, so this
change is just usage correction and has no functional change on correctly
working hardware.
Fixes: 8e85f36a8f ("pci: Fix configuring io/memory base and limit registers of PCI bridges")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Macro XR3PCI_ECAM_OFFSET is unused and in case it would be needed in future
it can be replaced by standard PCIE_ECAM_OFFSET macro from pci.h file.
Signed-off-by: Pali Rohár <pali@kernel.org>
We want to replace '#ifdef' by 'if (IS_ENABLED(CONFIG_...))' in our code.
Therefore functions should be defined unconditionally even if they are not
implemented.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
When failing to send a command because the hardware is busy, return
EBUSY to indicate the cause instead of just -1.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[ fsl_esdhc commit 263ddfc345 ]
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This builds on the previous patch by converting yet more preprocessor
macros to C ifs. This is split off so that the changes adapted from
Micheal's patch may be clearly distinguished from the ones I have
authored myself.
MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO
needs some -ENOSYS stubs when it isn't defined.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[ fsl_esdhc commit 52faec3182 ]
Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[ fsl_esdhc commit 7e48a028a4 ]
First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
setup code is identical for both directions, except for the data pointer.
Thus, unify them.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[ fsl_esdhc commit b1ba1460a4 ]
Use the dma_{map,unmap}_single() calls. These will take care of the
flushing and invalidation of caches.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[ fsl_esdhc commit da86e8cfcb ]
SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove unnecessary CONFIG_FSL_LAYERSCAPE.
Also make the error message more concise.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[ fsl_esdhc commit commit 08197cb8df ]
Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[ fsl_esdhc commit 07bae1de38 ]
This patch is to clean up bus width setting code.
- For DM_MMC, remove getting "bus-width" from device tree.
This has been done in mmc_of_parse().
- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
to fsl_esdhc_initialize() which is non-DM_MMC specific.
And fix up bus width configuration to support only 1-bit, 4-bit,
or 8-bit. Keep using 8-bit if it's not set because many platforms
use driver without providing max bus width.
- Remove bus_width member from fsl_esdhc_priv structure.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[ converted if statement to switch ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[ fsl_esdhc commit 5b05fc0310 ]
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.
- Drop non-BLK support for DM_MMC introduced by below patch.
66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).
- Use DM_MMC instead of BLK for conditional compile.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
The return type of EVP_PKEY_get0_RSA() is const struct rsa_st *.
Our code drops the const qualifier leading to
In file included from tools/lib/rsa/rsa-sign.c:1:
./tools/../lib/rsa/rsa-sign.c: In function ‘rsa_add_verify_data’:
./tools/../lib/rsa/rsa-sign.c:631:13: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
631 | rsa = EVP_PKEY_get0_RSA(pkey);
| ^
Add a type conversion.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
- add changes to support VIM3/L android boot by using meson64_android.h config
All i.MX8MQ boards have been converted to binman, which makes it
necessary to flash both flash.bin and u-boot.itb to get a bootable
system. Prior to the conversion, only flash.bin was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).
Also update imx8mq_evk.rst to remove the u-boot.itb copy step.
This is a cherry-pick of 028abfd9b1 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Since commit f7ac30b042, the pin muxing for mmc was removed from the
board file to be managed by DM_MMC which requires PINCTRL to work. It
made the change for sabrelite but nitrogen configs were forgotten.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Fastboot support has been broken on platforms using dwc2 controller
since the gadget gets its max packet size from it.
This patch is the equivalent of 723fd5668f which fixed the same issue
but for the chipidea controller.
Fixes: 27c9141b11 ("usb: gadget: fastboot: use correct max packet size")
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
CMD_DM is useful for showing the whole DM tree.
Enable it via "imply CMD_DM".
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Increase CONFIG_ENV_OFFSET to avoid the environment region to
overlap with U-Boot proper.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
After the conversion to DM the SD card shows up as 'mmc 2'
device.
Adjust the 'mmcdev' and the distro command 'func' accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Currently, imx6q udoo board fails to boot like this:
U-Boot SPL 2022.01-rc3-00061-g95ca715adad3 (Dec 18 2021 - 18:04:40 -0300)
Trying to boot from MMC1
The reason is that the eSDHC controller is not initialized in SPL.
Initialize the eSDHC controller in SPL via C code as DM is not
used in SPL.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
- A large number of updates for i.MX8 platforms. We update buildman /
binman to be able to fake binaries if needed, for CI, and tell the user
the binary won't work. Update platforms to build again with these
changes.
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in imx8mm-kontron-n801x-s-u-boot.dtsi and causes
a build error. Remove the duplicate.
Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in phycore-imx8mm-u-boot.dtsi and causes a build
error. Remove the duplicate.
Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Use binman to pack images.
Note that imx8mm_venice supports several boards via multiple DTB's thus
in the fit node we must use:
- fit,fdt-list = "of-list"
- fdt-SEQ
- config-SEQ
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
After all these board switch to binman, we could use common imximage.cfg
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
The standard 1GB Nano was converted to binman, but the 2G version
was neglected. Convert it to binman as well.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Somewhere along the line, the board stopped being able to boot.
Rather than just fixing the issue, let's fix the issue and migrate
to binman to eliminate a warning when using custom imx tools for
generating the binary.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
To eliminate a warning when using custom imx tools for generating
a binary, use binman to generate flash.bin.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
(--fake-ext-blobs) is introduced that can be switched on via the u-boot
makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files are
created.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Revert a clk change, to enable some platforms to work again
- Updates to the udoo NEO family of boards to work correctly
- Fix SiFive Unleashes/Unmatched boards booting
- Update rockchip maintainer entry
This reverts commit 92f1e9a4b3.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default the Model information from DT is printed:
CPU: Freescale i.MX6SX rev1.2 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 63C
Reset cause: POR
Model: UDOO Neo Basic
Board: UDOO Neo FULL
I2C: ready
As the udoo basic DT is used, such output may be confusing.
Improve it by only printing the Board model instead, which is
read from the board identification GPIOs.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Tommaso Merciai <tomm.merciai@gmail.com>
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Currently, the board model is not printed correctly:
Board: UDOO Neo UNDEFINED
Read the model type in SPL and store it the internal OCRAM, so that
U-Boot proper can retrieve it correctly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Enable support for USB and USB storage on the UDOO Neo.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The ethernet has a RMII not RGMII, also needs DM_MDIO and finally
initialise it later in the process as it's not needed that early on
and not everything is ready so it locks up the device.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.
This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().
[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot
Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes: d6f8ab30a2 ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In AOSP, both VIM3 and VIM3L have 2 bootloader flavors,
depending on A/B enablement.
For example, for vim3l, the naming is:
- u-boot_kvim3l_noab.bin : legacy support
- u-boot_kvim3l_ab.bin : A/B support
Prepare a defconfig to support u-boot_kvim3_ab.bin and
u-boot_kvim3l_ab.bin.
This is identical to khadas-vim3{l}_ab_android but will be updated in
the next commit.
Also update partitioning tables for A/B support.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122152207.219023-4-mkorpershoek@baylibre.com
On Meson GXL, GXM, AXG, G12A, G12B & SM1 SoCs, we can generate an unique
MAC address if none valid found in the eFuses storage.
Only the GXBB based boards doesn't have a fallback way to generate an
unique MAC address, so we rely on CONFIG_NET_RANDOM_ETHADDR to have
a valid one.
An exception is the Radxa Zero board who doesn't have Ethernet on board
so depends on an (or multiple) eventual USB adapters, so leaving the
CONFIG_NET_RANDOM_ETHADDR configs seems safer.
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211122110710.1038893-1-narmstrong@baylibre.com
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.
Fixes: 2b0980c240 ("tools: kwbimage: Fill the real header size into the main header")
Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Perform reset before core initialization.
Standard flow which close to 99% users are using getting all IPs out of
reset that there is no need to reset IP again. This is because of all low
level initialization is done in previous bootloader stage.
In SOM case these IPs are not touched by previous bootloader stage that's
why reset needs to be called before IP is accessed to make sure that it is
in correct state.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/5ae1c85b282d632bb62030f1f24a0065661b9153.1638804318.git.michal.simek@xilinx.com
Xilinx DTS files are using two way how to describe ethernet phy.
The first (already supported) has phy as subnode of gem node.
eth {
phy-handle = <&phy0>;
phy0: ethernet-phy@21 {
...
};
};
The second has mdio subnode (with mdio name) which has phy subnode. This
structure allow hadling MDIO reset signal (based on Linux mdio.yaml)
eth {
phy-handle = <&phy0>;
mdio {
phy0: ethernet-phy@21 {
...
};
};
};
This patch adds support for the second case where mdio subnode
is found driver will look at its parent to find out which gem is handling
MDIO bus.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com
Current code assumes that the vector base address is always at 0x0.
However, this value is configurable for MicroBlaze, so update the
__setup_exceptions routine to work with any vector base address.
The r4 register is reserved for the vector base address inside
__setup_exceptions and the function prologe/epilogue are also updated to
save and restore r4.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-9-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Microblaze is one the last two users of the CONFIG_SYS_RESET_ADDRESS
macro (the other is arch/powerpc/cpu/mpc8xx/cpu.c, but the macro is not
defined anywhere in powerpc code, so it should be removed there too).
Replace CONFIG_SYS_RESET_ADDRESS usage in start.S with
CONFIG_SYS_TEXT_BASE. If the reset address should really be
user-configurable, a new Kconfig option could be added.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-6-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable SPL_LIBCOMMON_SUPPORT and SPL_LIBGENERIC_SUPPORT if CONFIG_SPL=y, in
order to fix the following link failures:
common/spl/spl.o: in function `board_init_r':
common/spl/spl.c:755: undefined reference to `puts'
...
common/spl/spl.o: in function `board_init_r':
common/spl/spl.c:756: undefined reference to `hang'
common/spl/spl.c:740: undefined reference to `memset'
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-4-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board_fdt_blob_setup() uses the _end symbol to find the dtb in the non-spl
case. In order to allow microblaze builds to compile successfully with
CONFIG_OF_SEPARATE, the _end symbol must be defined. Align microblaze with
the other architectures and use _end symbol rather than __end to mark the
end of the u-boot binary.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DTBs are explicitly listed in the image source file for this board, and
this list already became outdated.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The memory layout is taken from the device tree passed to us by
m1n1, so there is no need to define this.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
The SMSC driver is using the old driver model.
Init the virtio system in vexpress64.c so that the network device is
discovered.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Capture x0 in lowlevel_init.S as potential fdt address. Modify
board_fdt_blob_setup to use fdt address from either vexpress_aemv8.h
or lowlevel_init.S.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Move env var address values to #defines so they can be reused elsewhere.
Rename env var names to those recommended in the README and modify
addresses to allow more space for the kernel.
Fix issue where fdt is called with invalid arguments when booting
without a ramdisk.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Rename from vexpress_aemv8a.h -> vepxress_aemv8.h as new FVPs may not be
v8-A. No change in behavior.
This is towards future work to enable support for the FVP_BaseR.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Create a new documentation section for Arm Ltd boards with a sub-page
for the VExpress64 boards (FVP-A and Juno).
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
When using a recent kernel with a bunch of compiled-in
stuff the kernel image easily becomes bigger than 8 MB
yielding this error:
Loading Kernel Image
Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
Fix this by bumping to SZ_64MB.
Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Since EFI does not relocate and uses the same global_data pointer
throughout the board-init process, drop this unnecessary setup, to avoid
a hang.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Show the revision of this table as it can be important.
Also update the 'efi table' entry to show the actual address of the EFI
table rather than our table that points to it. This saves a step and the
intermediate table has nothing else in it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This provides access to EFI tables after U-Boot has exited boot services.
It is not needed in the app since boot services remain alive and we can
just call them whenever needed.
Add a comment to explain this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The stub checks for failure with efi_init(). Add this for the app as well.
It is unlikely that anything can be done, but we may as well stop.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present each of these has its own static variable and helper functions.
Move them into a shared file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This should return false when the EFI app is running, since UEFI has done
the required low-level init. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present only 4KB of spare space is left in the DTB when building the
EFI app. Increase this to 32KB so there is plenty of space to insert the
binman definition. This cannot be expanded later (as with OF_SEPARATE)
because the ELF image has already been built.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviwed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If the 'bootm' command is not enabled then this code is not available and
this causes a link error. Fix it.
Note that for the EFI app, there is no indication of missing code. It just
hangs!
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
At present this is disabled, but it should work so long as the kernel does
not need EFI services. Enable it and add a note about remaining work.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only the backspace key is supported in U-Boot, when running as
an EFI app. Add support for arrows, home and end as well, to make the CLI
more friendly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When starting the app, locate all block devices and make them available
to U-Boot. This allows listing partitions and accessing files in
filesystems.
EFI also has the concept of 'disks', meaning boot media. For now, this
is not obviously useful in U-Boot, but add code to at least locate these.
This can be expanded later as needed.
We cannot use printf() in the early stub or app since it is not compiled
in
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add some long overdue instructions for building and installing U-Boot on
Allwinner SoC based boards.
This describes the building process, including TF-A and crust, plus
installation to SD card, eMMC and SPI flash, both from Linux and U-Boot
itself. Also describe FEL booting.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Currently we allow and explicitly check a single shared page with
StandAloneMM. This is dictated by OP-TEE which runs the application.
However there's no way for us dynamically discover the number of pages we
are allowed to use. Since writing big EFI signature list variable
requires more than a page, OP-TEE has bumped the number of shared pages to
four.
Let's remove our explicit check and allow the request to reach OP-TEE even
if it's bigger than what it supports. There's no need to sanitize the
number of pages internally. OP-TEE will fail if we try to write more
than it's allowed. The error will just trigger later on, during the
StMM access.
While at it add an error message to help users figure out what failed.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Ilias Apalodimas <apalos@gmail.com>
- various fixes to the sandbox display support
- support for showing a logo without splash screen config
- support for BMP drawing to depths other than 16bpp
- tests for the different types of supported BMP images
- support showing a logo when running coreboot via qemu
Pull request for efi-2022-01-rc4-4
UEFI:
* allow for more than 16 KiB UEFI variable size when using StMM
Others:
* make watchdog sysreset compatible with separate poweroff driver
* avoid OpenSSL deprecation warnings
- Merge a large number of CONFIG migration patches. Most of these are
taking existing migrations and re-running them. A few of these needed
additional minor conversions done first, so that more complex
dependencies could be expressed. In the end we now have CI jobs to
ensure that no migrated symbols are used in board config header files.
This converts the following to Kconfig:
CONFIG_JFFS2_DEV
CONFIG_JFFS2_LZO
CONFIG_JFFS2_NAND
CONFIG_JFFS2_PART_OFFSET
CONFIG_JFFS2_PART_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_88F5182
CONFIG_BOARD_IS_OPENRD_BASE
CONFIG_BOARD_IS_OPENRD_CLIENT
CONFIG_BOARD_IS_OPENRD_ULTIMATE
CONFIG_D2NET_V2
CONFIG_FEROCEON
CONFIG_FEROCEON_88FR131
CONFIG_INETSPACE_V2
CONFIG_KW88F6192
CONFIG_KW88F6281
CONFIG_KW88F6702
CONFIG_NET2BIG_V2
CONFIG_NETSPACE_LITE_V2
CONFIG_NETSPACE_MAX_V2
CONFIG_NETSPACE_MINI_V2
CONFIG_NETSPACE_V2
CONFIG_SHEEVA_88SV131
At this point mv-plug-common.h is now only an include of mv-common.h so
remove that indirection.
Signed-off-by: Tom Rini <trini@konsulko.com>
There are a number of symbols that are never defined, only referenced in
code imported from the Linux kernel or similar. Drop them from the list.
Signed-off-by: Tom Rini <trini@konsulko.com>
The only place we use CONFIG_CPU_ARMV8 was in the arm_dcc serial driver.
Switch this to CONFIG_ARM64 today, and if in the future we need finer
granularity tuning here, a new CONFIG_SERIAL option needs to be
introduced.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that all symbols that exist in Kconfig no longer also have boards
setting them in the board config.h file, add a CI test to catch new
instances of this, and fail.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to finish moving this symbol to Kconfig for all platforms, we
need to do a few more things. First, for all platforms that define this
to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to
CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails
also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk()
and updating a few preprocessor tests.
With that done, all platforms that define a value here can be converted
to Kconfig, and a fall-back of zero is sufficiently safe to use (and
what is used today in cases where code may or may not have this
available). Make sure that code which calls this function includes
<clock_legacy.h> to get the prototype.
Signed-off-by: Tom Rini <trini@konsulko.com>
This CONFIG option is used in one of two ways. The first way is that it
is defined to a static value, of an unsigned long size. The second way
is that it is defined to something, typically a function, to determine
this value at run time.
However, in a few cases that function returns a static value. Change
that to using the static value directly.
In the case of using something at run time, convert everything to using
a function of the same name and prototype. This will allow for further
cleanups.
Finally, we have a few cases where the function is just not used, so
drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
When we have CONFIG_DYNAMIC_DDR_CLK_FREQ set is the only time we should
have this function, so guard it so that we can include <clock_legacy.h>
in this file later on.
Signed-off-by: Tom Rini <trini@konsulko.com>
When we have CONFIG_DYNAMIC_DDR_CLK_FREQ set is the only time we should
have this function, so guard it so that we can include <clock_legacy.h>
in this file later on.
Signed-off-by: Tom Rini <trini@konsulko.com>
The values CONFIG_SYS_CLK_FREQ_C100 and CONFIG_SYS_CLK_FREQ_C110 are
only used in one place and not changed by the board config file. Move
these out of the CONFIG namespace and in to the CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to finish this conversion we need to add a symbols for
SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases
there where we need to, or need to not, use that framework as things
stand.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CLK
We move the exiting option to common/Kconfig near the other options to
control the contents of board_init_f() and note that this is a legacy
option. We further restrict this to where the call is going to be
non-empty, for the SoCs that had only been using this for some
MMC-related clocks.
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of CONFIG_SYS_FDT_ADDR this was being used to modify the
default value of fdt_addr / fdt_addr_r, which is not something to expose
in this manner and is not otherwise done. The case of SYS_ENV_ADDR is
similar but only done on the pic32mzdask platform, for scriptaddr.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_VID
CONFIG_VOL_MONITOR_INA220
CONFIG_VOL_MONITOR_IR36021_READ
CONFIG_VOL_MONITOR_IR36021_SET
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET
To finish this migration, we first need to introduce CONFIG_SPL_VID as
some platforms only use this code in full U-Boot while others use it in
SPL as well. To make the Kconfig logic clearer, guard all of the
sub-options with a if VID || SPL_VID check. Finally, add Kconfig
options for the remaining related options that did not previously have
one.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_IMMR
We do this by consolidating the SYS_IMMR options we have and providing
defaults.
We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEMTEST_END
This is removing unused defines and correcting the default value to be
0x0 as we are a hex symbol.
Signed-off-by: Tom Rini <trini@konsulko.com>
Because of how these symbols work, and the remaining board config.h file
uses, we need to do these at the same time. In some cases we just get
to move rather directly to the defconfigs. A few cases require manual
intervention.
For the case of the eb_cpu5282 we need to select HW_WATCHDOG for the
target, given how it's implemented.
For the cases of m53menlo, dh_imx6, display5, and display5_factory we
disable SPL watchdog support as the particular combination of options
they want would require either more symbols or enabling SPL_DM.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
In order to do this conversion, expose this option to the user and
use "save" not "safe" in the text.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SUPPORT_EMMC_RPMB
This fixes a few platforms where the option was not taking effect as
intended.
Signed-off-by: Tom Rini <trini@konsulko.com>
This option is used as part of configuring the default environment for a
number of platforms. However, it is always set to 1 and the only time
it is part of Kconfig, it is used in a hard-coded manner. Hard-code the
value in the environment instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_FSL_IFC
This is done via select statements to match previous logic.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ENV_SPI_BUS
CONFIG_ENV_SPI_CS
CONFIG_ENV_SPI_MAX_HZ
CONFIG_ENV_SPI_MODE
As part of this, we use Kconfig to provide the defaults now that were
done in include/spi_flash.h. We also in some cases change from using
CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in
use anyhow as ENV was not enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
This is a "hex" prompt but the default value was given as an int.
Switch the default to hex (0x0) and remove the defconfigs that were
using the default, but as hex before.
Signed-off-by: Tom Rini <trini@konsulko.com>
If clk_get_by_name() returns 0 it means it executed successfully while now
we consider it as an error. So let's check if return value is negative to
be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
It is useful to boot coreboot (with U-Boot as a payload) from qemu. Add
a sample script to show how to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable this for boards with a display, unless they are using the SPLASH
feature.
This shows a U-Boot logo on boards with a display, which seems like a
useful thing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Show the U-Boot logo by default. This is only 7KB in size so seems like
a useful default for boards that enable a display.
If SPLASH_SCREEN is enabled, it is not enabled by default, so as not to
conflict with that feature.
Also disable it for tests, since we don't want to complicate the output.
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver is obsolete and only used by nokia_rx51. It should be deleted.
For now, drop the VIDEO_LOGO code to avoid confusion with the new
implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_VIDEO_LOGO
Note that this option depends on CONFIG_DM_VIDEO now, since cfb_console is
deprecated. The only relevant code is now in splash.c
Drop the check for DM_VIDEO in that file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this uses RGB555 format for blitting to a display. Sandbox uses
565 and that seems to be more normal for BMP as well. Update the code
accordingly and add a test.
Note that this likely breaks the theadorable board so we may need to
discuss supporting both formats.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this code to use write_pix8() rather than writing the pixels only
for a single supported display depth. This allows us to support any
depth.
Add some more tests too.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the code that writes to a pixel is quite convoluted. It uses a
colour map which is in the uclass and the same code is repeated in
different places within video_bmp_display().
As a first step, create a function which can write a pixel from the
bitmap, no matter what the display depth. Use any provided palette
directly, rather than using the uclass version.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not work with sandbox at present. Fix it up to use map_sysmem()
to convert an address to a pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a few more tests for BMP rendering. Use a back door into the sandbox
SDL driver to adjust the resolution at runtime.
The truetype code does not support 8bpp. Add this so that the display is
not blank when running in this mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
The intention is for the copy base to start halfway through the
frame-buffer area. At present is it actually below the frame buffer,
which could have anything in it (probably it is malloc space). Fix
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
If U-Boot starts with the frame buffer set to 16bpp but then runs a test
that uses 32bpp, there is not enough space. Update the driver to use the
maximum possible frame-buffer size, to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The video driver uses this for debugging, but if used before relocation it
crashes at present. Avoid trying to output debugging before the console is
ready.
Signed-off-by: Simon Glass <sjg@chromium.org>
When unit tests are run they currently create a new window. Update the
code so that the old one is removed first. This avoids the confusion as to
which one is active.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox only supports 16 and 32bpp depths, since those are the
easy ones with SDL.
We can support other depths by manually converting the pixel formats. Add
support for this, to enable an 8ppp (monochrome) format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Our Gitlab CI buildsystem is set up to treat warnings as errors.
With OpenSSL 3.0 a lot of deprecation warnings occur.
With the patch compatibility with OpenSSL 1.1.1 is declared.
In the long run we should upgrade our code to use the current API.
A -Wdiscarded-qualifiers warning is muted by casting.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The watchdog system reset driver can reboot the device but it cannot power
it off. If power off is requested, the driver should not reset the system
but leave powering off to one of the other system reset drivers.
As power cycling is typically not a feature of a watchdog driver the reset
types SYSRESET_POWER and SYSRESET_POWER_OFF shall both be excluded.
Fixes: 17a0c14164 ("dm: sysreset: add watchdog-reboot driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently we allow and explicitly check a single shared page with
StandAloneMM. This is dictated by OP-TEE which runs the application.
However there's no way for us dynamically discover the number of pages we
are allowed to use. Since writing big EFI signature list variable
requires more than a page, OP-TEE has bumped the number of shared pages to
four.
Let's remove our explicit check and allow the request to reach OP-TEE even
if it's bigger than what it supports. There's no need to sanitize the
number of pages internally. OP-TEE will fail if we try to write more
than it's allowed. The error will just trigger later on, during the
StMM access.
While at it add an error message to help users figure out what failed.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Ilias Apalodimas <apalos@gmail.com>
Merge v8 of Simon's series to make CONFIG_OF_BOARD a boolean option.
Quoting him:
With Ilias' efforts we have dropped OF_PRIOR_STAGE and OF_HOSTFILE so
there are only three ways to obtain a devicetree:
- OF_SEPARATE - the normal way, where the devicetree is built and
appended to U-Boot
- OF_EMBED - for development purposes, the devicetree is embedded in
the ELF file (also used for EFI)
- OF_BOARD - the board figures it out on its own
The last one is currently set up so that no devicetree is needed at all
in the U-Boot tree. Most boards do provide one, but some don't. Some
don't even provide instructions on how to boot on the board.
The problems with this approach were covered in another patch[1], since
removed from this series.
In practice, OF_BOARD is not really distinct from OF_SEPARATE. Any board
can obtain its devicetree at runtime, even it is has a devicetree built
in U-Boot. This is because U-Boot may be a second-stage bootloader and its
caller may have a better idea about the hardware available in the machine.
This is the case with a few QEMU boards, for example.
So it makes no sense to have OF_BOARD as a 'choice'. It should be an
option, available with either OF_SEPARATE or OF_EMBED. This would allow
rpi3, for example, to run with the devicetree provided by the prior
bootloader.
This series makes this change, adding various missing devicetree files
(and placeholders) to make the build work.
To make the 'prior stage' side of things more deterministic, a new
OF_HAS_PRIOR_STAGE is added, which cannot be disabled by updated a board's
defconfig. This should help to prevent mistakes.
It also adds a run-time message showing where the devicetree came from,
as well as warnings if the board's expected flow is not being used. This
comes originally from the 'standard passage' series, which depends on
this series.
It also provides a few qemu clean-ups discovered along the way. The
qemu-riscv64_spl problem is fixed.
Please see [2] for discussion on the v6 series.
I put Heinrich's Tested-by tag[3] for the series onto the three devicetree
patches (ARM and RISC-V) that I think it most affects. It isn't possible
to apply a tag to a whole series at present and in any case there are
changes in v7.
This series is available at u-boot-dm/ofb-working
[1] https://patchwork.ozlabs.org/project/uboot/patch/20211207001209.3467163-2-sjg@chromium.org/
[2] https://lore.kernel.org/u-boot/20211205133207.GW1220664@bill-the-cat/T/#mcd8c0258827fbc1bb3000b7ff9ba0929df1ddcb2
[3] https://lore.kernel.org/u-boot/93913911-4d20-d28f-ee04-739985184c5e@canonical.com/raw
Rockchip BootRom supports new idb header v2 instead of legacy version.
Add support for it so that we can generate image for new SoCs.
Signed-off-by: Yi Liu <liuyi@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable efuse support for reading the cpuid#, serial# and generate a
board unique mac address
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The USB controller index must be separated from the type argument,
otherwise the preboot command fails with the error:
Error: Wrong USB controller index format
Add the missing space to fix fastboot mode here.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync the px30 devicetree files from linux-next tree.
commit <14ce8069f48b> ("lib/stackdepot: allow optional init and
stack_table allocation by kvmalloc() - fixup3")
Note, this path even sync rk3326 files as it depends on px30.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
dmc node is specific to U-Boot, it is always better practice
to maintain U-Boot specific nodes into -u-boot.dtsi files
in order to maintain Linux dts file sync compatibility.
Move the dmc into px30-u-boot.dtsi, also add dmc node
explicitly in rk3326-odroid-go2-u-boot.dtsi since it is
using px30.dts.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Long gone is the time a custom TF-A was needed for Puma, upstream TF-A
works just fine now.
The flashing instructions are updated to match how newer rkdeveloptool
and rkbin work.
Finally, rkbin provides a way to flash SPI via USB OTG interface so
let's document that.
Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Odroid Go Advance has a hardware random number generator present.
The device does not have an upstream Linux driver, but does have a
U-Boot driver. Add the appropriate node so that the hardware RNG can be
used in U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Allow the kaslr-seed value in the chosen node to be set from a hardware
rng source.
Tested on a Rockchip PX30 (Odroid Go Advance), you must have loaded
the devicetree first and prepared it for editing. On my device the
workflow goes as follows:
setenv dtb_loadaddr "0x01f00000"
load mmc 0:1 ${dtb_loadaddr} rk3326-odroid-go2.dtb
fdt addr ${dtb_loadaddr}
fdt resize
kaslrseed
and the output can be seen here:
fdt print /chosen
chosen {
kaslr-seed = <0x6f61df74 0x6f7b996c>;
stdout-path = "serial2:115200n8";
};
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When running, if the devicetree failed to come from the expected source,
show a warning, e.g:
U-Boot ...
DRAM: 128 MiB
Core: 42 devices, 11 uclasses, devicetree: separate
Warning: Unexpected devicetree source (not from a prior stage)
Warning: U-Boot may not function properly
Flash: 64 MiB
...
These warnings should only appear if the board config has been changed, or
the prior stage is broken.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot always needs some sort of a device tree in the build. Some boards
never actually use this, at least in production systems, since a prior
firmware stage sets one up and passes it to U-Boot. At present the only
mechanism to do that is with custom function (OF_BOARD), but future work
will include a standard way of doing this ('standard passage').
It can be confusing to see a device tree emitted from the U-Boot build in
this situation. Add an option to drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Boards which define OF_HAS_PRIOR_STAGE must define OF_BOARD at present,
since a custom function is the only way to obtain the devicetree at
runtime.
Add a build error when this requirement is not met, to avoid accepting
any patches which break this requirement.
Add an allowlist for boards which use it, currently none. This allowlist
can be updated for local development, if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: change of_whitelist to of_allowlist]
Signed-off-by: Tom Rini <trini@konsulko.com>
Use this new Kconfig instead of OF_BOARD, so we know for sure which boards
obtain their devicetree from a prior stage. Leave sandbox alone since it
does not. Also don't touch xilinx_versal_virt since it does not have a
specific TARGET Kconfig.
This option implies OF_BOARD for now, but with future work standard
passage may be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add rpi_4_32b and rpi_arm64 to the list of boards converted]
Signed-off-by: Tom Rini <trini@konsulko.com>
When U-Boot is started from another firmware program, not just a prior
phase of U-Boot, special behaviour is typically used. In particular, the
device tree may come from that prior stage.
At present this is sort-of indicated by OF_BOARD, although the
correlation is not 1:1, since that option simply means that the board has
a custom mechanism for obtaining the device tree. For example, sandbox
defines OF_BOARD. Also the board_fdt_blob_setup() function can in fact
make use of the devicetree in U-Boot if it wishes, as used by
dragonboard410c until very recently.
Add an explicit Kconfig for this situation. Update the OF_BOARD option to
more-accurately reflect what it is doing, e.g. for sandbox.
Drop the docs in the README as it is out of date.
Signed-off-by: Simon Glass <sjg@chromium.org>
It can be confusing to figure out where the devicetree came from. It seems
important enough to warrant a message during boot. Add information about
the number of devices and uclasses too since it is helpful to have some
idea what is going on with driver model.
Report the devicetree source in bdinfo too.
This looks something like this, with > marking the new line.
U-Boot 2021.10-00190 (Oct 30 2021 - 09:01:29 -0600)
DRAM: 128 MiB
> Core: 42 devices, 11 uclasses, devicetree: passage
Flash: 64 MiB
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this override function is called even when OF_BOARD is not
enabled. This makes it impossible to disable this feature and in fact
makes the OF_BOARD option useless.
Reinstate its intended purpose, so that it is possible to switch between
the appended devicetree and one provided by the board's custom function.
A follower patch adds warnings for this scenario, but for now we don't
have a Kconfig that definitively tells us that OF_BOARD should be used.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function should only be called when OF_CONTROL is enabled. It
fails in fdtdec_prepare_fdt() anyway, since gd->fdt_blob stays as NULL
if OF_CONTROL is not enabled.
Drop this useless check.
Signed-off-by: Simon Glass <sjg@chromium.org>
This logic is a bit convoluted for one function. Move the mulit-FIT part
into its own function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
At present one must hack the Makefile to see what is going on with these
files. Also it doesn't quite work correctly.
Fix this by using an environment variable for debugging. Update the docs
also.
Signed-off-by: Simon Glass <sjg@chromium.org>
This was added as a hack to work around not having an in-tree devicetree.
Now that this is fixed it is not needed.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
This should not be a separate option from OF_SEPARATE. It is a run-time
option to override the devicetree, even if present.
Move the option out of the choice.
Disable BINMAN_FDT for a few boards which don't actually use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses QEMU virt which creates its own devicetree.
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an empty devicetree file for these boards. It seems to be possible to
obtain a real one from another bootloader called 'bolt' but I will leave
this to the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an empty file to prevent build errors when building with
CONFIG_OF_SEPARATE enabled.
Unfortunately there are no build instructions in the U-Boot tree to enable
a real file to be created.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
The real devicetree is created by the Xen project on-the-fly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sync these file, obtained from Linux v5.15.
Add a note for the maintainer, and SPDX lines where they are missing.
The added lines are:
SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
Note, this matches the text in those files, but is not the same as the
GPL-2.0 of some files.
[1] https://releases.linaro.org/android/reference-lcr/juno/7.1-17.05/
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Sync these files, obtained from Linux v5.15.
This adds a devicetree file for rpi_4 which was not there before.
Testing shows no change so far as I can see:
- boots to U-Boot prompt on rpi0, rpi2
- boots to distro on rpi3
- boots to distro on rpi4
I am assuming that syncing with Linux is safe, but the maintainer should
know for sure.
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses QEMU virt which creates its own devicetree.
Copy the existing empty version of this file, so splitting the existing
qemu-virt into two, since anyone actually trying to use this will need a
different devicetree for 32- and 64-bit machines.
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses QEMU virt which creates its own devicetree.
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses QEMU virt which creates its own devicetree.
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
QEMU currently generates a devicetree for use with U-Boot. Explain how to
obtain it.
Also explain how to merge it to produce a devicetree with the U-Boot
features included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Without this option QEMU appears to hang. Add it to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
doc/usage/index.rst in branch origin/next includes usage/environment twice.
Remove the duplicate entry.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The global data pointer is not used in this driver, remove it's
declaration.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Use more appropriate resource_size() function when working with data in
struct resource.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Function mvebu_pcie_setup_wins() sets up all other BARs, so move setup of
BAR[0] to this function to have common code at one place.
In the past, commit 193a1e9f19 ("pci: pci_mvebu: set BAR0 after memory
space is set") moved setup of BAR[0] to another location, due to ath10k
not working in kernel, but the reason why was unknown, but it seems to
work now, and we think the issue then was cause by the PCIe Root Port
presenting itself as a Memory Controller and therefore U-Boot's code
have overwritten the BAR. Since the driver now ignores any write
operations to PCIe Root Port BARs, this should not be an issue anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.
Fixes: 8a726b852502 ("fw_setenv: lock the flash only if it was locked before")
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Testing on Armada XP with an EEPROM using register address with size
of 2 has shown, that the register address bytes are sent to the I2C
EEPROM in the incorrect order. This patch swabs the address bytes so
that the correct address is transferred to the I2C device.
BTW: This worked without any issues before migrating Armada XP to
DM I2C.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Holland <samuel@sholland.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Pali Rohár <pali@kernel.org>
Cc: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
There is no point to hide/disable fatal errors via debug() macro.
Print fatal errors loudly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Include file debug_uart.h already contains documentation how to use it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
There is no maintainer entry for serial_mvebu_a3700.c. Add entry with Pali
and Stefan as maintainers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
There is no maintainer entry for pci-aardvark.c. Add entry for
pci-aardvark.c and pci_mvebu.c with Pali and Stefan as maintainers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
This is a backport from Marvell U-Boot:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell
commit 381d029e7a ("fix: serdes: a38x, a39x: Improve USB3 electrical
configuration")
Improves electrical USB3 receiver jitter tolerance test:
- De-Emphasize force, in functional mode the transmitter should always
have 3.5db de-emphasize, so we are forcing it.
- After forcing De-Emphasize, choose 3.5db (After forcing, default is
6dB so need to change it to 3.5dB).
- Align90 set to 0x58 - this is the sample point in the receiver, after
the clock is recovered this sampler samples at the chosen value, usually
it is supposed to be 0x60(which is the center of the eye), but sometimes
after adding jitter and ISI the center of the eye can move slightly and
the sample point is not necessarily the exact center, and after
optimization (searching the middle of the eye manually) it was seen that
the center of the eye is actually 0x58 and not 0x60.
- FFE Res and FFE Cap set to 0xE & 0xF respectively: improves this
settings is adequate according to how the USB3 spec defines the
interconnect, thus improves USB3 jitter tolerance settings.
- Change the resolution of the DFE to 0x3 which is 6mV(highest
resolution) , this avoids the DFE to saturate and cease to work.
- HPF set to 0x3 which is 5Khz high pass filter, the function of the HPF
is to filter the low frequency patterns(below 5Khz) to make sure that
the signal is not a noise, the setting before was 0x1(205Khz), and the
change came since the USB3 CP0 pattern, that is used in the USB3 jitter
tolerance testing, is similar to PRBS15, which has 2^15=32768bits which
is 32768*200ps (200ps is one Unit interval in USB3(5Gbps)) = 6.5us,
which is in frequency terms: 152Khz. since the PRBS15 is a random
pattern and can theoretically have once in a while a pattern that will
be at frequency of 152Khz, hence the previous setting (205khz HPF) can
possibly filter this pattern which can cause to an error in the
receiver, thus this change to avoid such scenarios.
Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
Signed-off-by: René Straub <rene.straub@netmodule.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The electrical serdes configuration for USB3 expects an array as data
argument. For USB3 the second value is used (see data_arr_idx = USB3 =
1). However, because only one value is inside the array mv_seq_exec is
accessing an invalid element and the serdes is configured wrongly.
This wrong initialization is leading to an unreliable detection
mechanism for some USB3 devices. We were able to reproduce the issue
regularly with an LTE modem from Sierra Wireless (SM7455) where it was
not detected as USB3 device in 1/3 of all tests.
This commit fixes the issue by setting data_arr_idx to 0. This is the
same value as the original U-Boot from Marvell is using. There it is
called FIRST_CELL which is a define for 0.
See: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell
commit 56f963ce4c ("fix: serdes: a38x, a39x: Fix USB3 serdes DB
initialization")
Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
Signed-off-by: René Straub <rene.straub@netmodule.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Move Turris MOX specific remove_disabled_nodes() to fdt_support with
name fdt_delete_disabled_nodes(), so that others can potentially use it.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The pre-relocation board topology reading in board_fix_fdt() is
unstable: sometimes wrong data are read from the SPI bus.
This is due to wrong order of SPI bus configuration instructions: we
first need to set the pins to SPI mode, and only after that configure
the bus.
Also add a 1ms delay before enabling chip-select, so that the clock pin
is high for some time before reading the bus.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable eth1 node in U-Boot's device-tree if a network module (SFP, Topaz
or Peridot) is detected.
This is required for proper detection of eth1 comphy in a3700 comphy
driver by the following patches.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
It is better to find DT nodes by compatible strings or aliases instead
of path.
There were issues with Linux some DTBs having different names of some
nodes, e.g.
internal-regs
instead of
internal-regs@d0000000
This should be a generic fix for such issues.
Also since fdt_support now contains needed functions, we can drop our
own implementations.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add functions
fdt_node_offset_by_pathf(),
fdt_create_phandle_by_pathf(),
fdt_set_status_by_pathf()
to get node offset, get/create node phandle and set status for node
given by path/alias formatted with sprintf.
Add functions
fdt_create_phandle_by_compatible(),
fdt_set_status_by_compatible()
to get/create node phandle and set status for first node given by
compatible.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This function does not necessarily create a new phandle. If a phandle
exists, no new phandle is created.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The macro __constant_cpu_to_be32() uses ___constant_swab32(), which for
some reason is not defined and causes the following error during
compilation:
include/linux/byteorder/little_endian.h:28:52: warning:
implicit declaration of function ‘___constant_swab32’;
did you mean ‘__builtin_bswap32’? [-Wimplicit-function-declaration]
#define __constant_cpu_to_be32(x) ((__force __be32)___constant_swab32((x)))
Declare all ___constant_swabXX() macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
No functional change intended. This patch switches from the legacy I2C
API to the DM I2C API, so that this code can be used with DM I2C
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
After all Armada XP boards have been switched over from legacy I2C
support to DM I2C, let's now also convert this serdes code to use
the DM I2C API.
Signed-off-by: Stefan Roese <sr@denx.de>
No functional change intended. This patch switches from the legacy I2C
API to the DM I2C API, so that this code can be used with DM I2C
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Move to the DM I2C version, so that this board will not get dropped from
mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
Pull request for efi-2022-01-rc4-3
Documentation:
* add Calxeda Highbank/Midway board documentation
Bug fixes:
* call part_init() in blk_get_device_by_str() only for MMC
* fix an 'undefined' error in some driver model macros
Due to a non-existing parameter name in macro's, use of those macro's will
cause a compiler error of "undefined reference".
Unfortunately, dm test doesn't fail because a wrong name ("&dev", hence it
is accidentally a valid name in the context of a caller site) is passed on.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f262d4ca4b ("dm: core: Add a way to read platdata for all
child devices")
Fixes: 903e83ee84 ("dm: core: Add a way to iterate through children,
probing each")
Reviewed-by: Simon Glass <sjg@chromium.org>
In blk_get_device_by_str(), the comment says: "Updates the partition table
for the specified hw partition."
Since hw partition is supported only on MMC, it makes no sense to do so
for other devices.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Calxeda servers are using U-Boot as the primary bootloader, which
was shipped as part of a firmware upgrade package.
Even though the machines are considered legacy at this point, the port
still works, so deserves some documentation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In strange cases it is possible for fdtgrep to find nothing to output.
Typically this means that the resulting SPL device tree is not going to
allow anything to boot, but at present the tree is actually invalid,
since it only has an END tag in the struct region.
The FDT spec requires at least a root node. So add a special case to
include at least this, if the FDT_REG_SUPERNODES flag is set.
This ensures that grepping an empty tree still produces a valid tree.
Also add comments to the enum since it is not completely obvious from
the names now.
The typical symptom of this problem is a message from binman:
pylibfdt error -11: FDT_ERR_BADSTRUCTURE
Signed-off-by: Simon Glass <sjg@chromium.org>
When outputting a devicetree we should not align the struct section to a
16-byte boundary. The normal position is fine, which is 8-byte aligned.
This avoids leaving adding 8 extra zero bytes in the output tree in the
case where the reserved section is empty (i.e has 16 zero bytes).
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the 'missing-msg' for blobs for more detailed output on missing system
firmware and SEBoot blobs.
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix minor typos:
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of joining hard coded '..' to the run-time path of the executable,
take just a dirname out of it. Besides that, use $(srctree) where it makes
sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Importing libraries in Python caches the bytecode by default.
Since we run scripts in source tree it ignores the current directory
settings, which is $(srctree), and creates cache just in the middle
of the source tree. Move cache to the current directory.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This format is used in firmware binaries so we may as well supported it.
With this patch binman supports creating, listing and updating FIPs, as
well as extracting files from one, provided that an FDTMAP is also present
somewhere in the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for this format which is used by ARM Trusted Firmware to find
firmware binaries to load.
FIP is like a simpler version of FMAP but uses a UUID instead of a name,
for each entry.
It supports reading a FIP, writing a FIP and parsing the ATF source code
to get a list of supported UUIDs.
Signed-off-by: Simon Glass <sjg@chromium.org>
First set of u-boot-at91 features for the 2022.04 cycle:
This feature set includes : support for the new QSPI hardware on
sama7g5, small fixes on sam9x60 and sama7g5, some additions of commands
and PIO controller on sam9x60/sam9x60ek.
Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
This patch triggers warm reset to recover the MPFE NoC from corruption
due to high frequency transient clock output from HPS EMIF IOPLL at
VCO startup after peripheral RBF is programmed.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID
value if the current FSBL image is found valid, otherwise BootROM will
look for next subsequent valid FSBL image when warm reset is triggered.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
New SoC's of AT91 family with ARM-9 core includes a regular timer and a 64-bit
timer.This patch adds a compile time option to the Makefile such that the old
timer driver is chosen and compiled as default if none of timer configuration
options are explicitly defined in the board configs.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.
This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reorder include files in the U-Boot expected order:
the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.
It is a preliminary step for next patch.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.
In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.
Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.
In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.
Fixes: a7b61ab58d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.
This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The alternate function of PD20 is 4 as per the datasheet of
sama7g5 and not 5 as defined earlier.
Fixes: 558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.
Signed-off-by: Adam Ford <aford173@gmail.com>
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com>
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other. Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
The device trees for the Beacon RZ/G2[MNH] boards have undergone
some changes over time, so resync them now.
Signed-off-by: Adam Ford <aford173@gmail.com>
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.
Signed-off-by: Adam Ford <aford173@gmail.com>
Pull request efi-2022-01-rc4-2
UEFI:
* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app
# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Add a block driver which handles read/write for EFI block devices. This
driver actually already exists ('efi_block') but is not really suitable
for use as a real U-Boot driver:
- The operations do not provide a udevice
- The code is designed for running as part of EFI loader, so uses
EFI_PRINT() and EFI_CALL().
- The bind method probes the device, which is not permitted
- It uses 'EFI' as its parent device
The new driver is more 'normal', just requiring its platform data be set
up in advance.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.
This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.
If the two uclasses can be unified, is left to future redesign.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
These names are better used for access to devices provided by an EFI
layer. Use EFI_LOADER instead here, since these are only available in
U-Boot's EFI_LOADER layer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
When the TCG2 protocol is installed in efi_tcg2_register(),
TPM2 device must be present.
tcg2_measure_pe_image() expects that TCP2 protocol is installed
and TPM device is available. If TCG2 Protocol is installed but
TPM device is not found, tcg2_measure_pe_image() returns
EFI_SECURITY_VIOLATION and efi_load_image() ends with failure.
The same error handling is applied to
efi_tcg2_measure_efi_app_invocation().
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There are functions that calls tcg2_agile_log_append() outside
of the TCG protocol invocation (e.g tcg2_measure_pe_image).
These functions must to check that TCG2 protocol is installed.
If not, measurement shall be skipped.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit modify efi_tcg2_register() to return the
appropriate error.
With this fix, sandbox will not boot because efi_tcg2_register()
fails due to some missing feature in GetCapabilities.
So disable sandbox if EFI_TCG2_PROTOCOL is enabled.
UEFI secure boot variable measurement is not directly related
to TCG2 protocol installation, tcg2_measure_secure_boot_variable()
is moved to the separate function.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Literally adhering to the docs gave this wrong output:
U-Boot> setenv fdtaddr 0x87f00000
U-Boot> fdtaddr $fdtaddr
Unknown command 'fdtaddr' - try 'help'
Fixes: d80162cfc5 ("doc: Document how to apply fdt overlays")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This fixes two regressions: eMMC operation on boards with WiFi (so using
three MMC devices), and a repeated wrong error message in USB gadget
mode (fastboot, ums).
The sunxi MUSB glue driver has some code to check for external VBUS
presence when it's going to use the MUSB host mode, and it warns if
there is VBUS provided through the cable (in sunxi_musb_enable()).
This code was apparently copied to the USB gadget detection code
(g_dnl_board_usb_cable_connected()), but here we actually *expect*
external VBUS power, so a warning is wrong and confusing.
So far this message rarely triggered, but a recent patch (6fa41cdd19)
changed this:
===========================
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe90000
A charger is plugged into the OTG
/A charger is plugged into the OTG
\A charger is plugged into the OTG
|A charger is plugged into the OTG
-A charger is plugged into the OTG
....
===========================
Remove the message for the gadget cable detection call, and just return
the status of the VBUS detection, as this is what the callers are after.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit 03510bf621 ("sunxi: only include alias for eMMC when mmc2
used") protected the eMMC alias in U-Boot's DT stub the with the
associated Kconfig symbol, but was actually using the wrong name.
Fix the name of the symbol to match what's defined in Kconfig and what
the defconfig files actually use.
Fixes: 03510bf621 ("sunxi: only include alias for eMMC when mmc2 used")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: 5kft@5kft.org
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
QSPI0 has a MX66LM1G45G SPI NOR flash connected.
Enable the controller and describe the flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
sama7g5 embedds an OSPI and a QSPI controller:
1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash
and OctaFlash Protocols Supported.
2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
sama7g5 QSPI has:
1/ One Octal Serial Peripheral Interfaces (QSPI0) Supporting Up to
200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported
2/ One Quad Serial Peripheral Interfaces (QSPI1) Supporting Up to
90 MHz DDR/133 MHz SDR
The QSPI controller of SAMA7G5 uses different clock domains, hence extra
synchronization operations must be performed before accessing some
registers. Differentiate between the versions of the IP using has_gclk.
Differentiate between QSPI0 and QSPI1 with has_octal.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
binman refactoring to improve section handling
bloblist - allow it to be allocated
sandbox config-header cleanup
# gpg: Signature made Sun 05 Dec 2021 10:14:24 PM EST
# gpg: using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg: issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655 B627 7F17 3A3E 9008 ADE6
This is not needed anymore. Drop it to simplify the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_SYS_ATA_PORT_ADDR is not used in the code anymore. Drop it and use
ATA_PORT_ADDR() locally instead.
Drop CONFIG_IDE_RESET_ROUTINE and CONFIG_IDE_SWAP_IO which are also
unused.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not used by sandbox since it uses driver model for the timer.
Drop it.
Also update the tools_only build to avoid build errors, since it does
actually build U-Boot too. Enable DM so we can use CONFIG_TIMER,
disable EFI_LOADER to avoid an error about board_quiesce_devices() and
disable NET to avoid having to define CONFIG_AVB_BUF_ADDR
Signed-off-by: Simon Glass <sjg@chromium.org>
This can go in the related header file. Drop the CONFIG option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present there are Kconfig options for tracing, but sandbox uses
plain #defines to set them. Correct this and make the tracing command
default to enabled so that this is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes it is useful to have a list of related external blobs in a
single entry. An example is the DDR binaries used by meson. There are
9 files in total. Add support for this, so we don't have to have a
separate entry for each.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases entries encapsulate other data and it is useful to access
the data within. An example is the fdtmap which consists of a 16-byte
header, followed by a devicetree.
Provide an option to specify an alternative format when extracting files.
In the case of fdtmap, this is 'fdt', which produces an FDT file which can
be viewed with fdtdump.
Signed-off-by: Simon Glass <sjg@chromium.org>
If an older version of binman is used to list images created by a newer
one, it is possible that it will contain entry types that are not
supported. At present this produces an error.
Adjust binman to use a plain 'blob' entry type to cope with this, so the
image can at least be listed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is necessary to symlink files containing external blobs into
the U-Boot tree in order for binman to find them. This is not very
convenient.
Add two new environment/Makefile variables to help with this. Add
documentation as well, fixing a related nit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Typically the bloblist is positioned at a fixed address in memory until
relocation. This is convenient when it is set up in SPL or before
relocation.
But for EFI we want to set it up only when U-Boot proper is running. Add
a way to allocate it using malloc() and update the documentation to cover
this aspect of bloblist.
Note there are no tests of this feature at present, nor any direct testing
of bloblist_init().
This can be added, e.g. by making this option controllable at runtime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the constructor to work in the recommended way, where the node
properties are read in a separate function. This makes it more similar to
entry_Section.
Signed-off-by: Simon Glass <sjg@chromium.org>
This currently uses _cbfs_entries[] to store entries. Since the entries
are in fact valid etypes, we may as well use the same name as
entry_Section uses, which is _entries. This allows reusing more of the
code there (in a future patch).
Signed-off-by: Simon Glass <sjg@chromium.org>
It is easier to understand this file if reading the entries comes before
obtaining the contents, since that is the order in which Binman proceeds.
Move the function down a bit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Expand this to explain subclassing better and also to tidy up formatting
for rST.
Fix a few pylint warnings to avoid dropping the score.
Signed-off-by: Simon Glass <sjg@chromium.org>
The ObtainContents() and GetEntryContents() methods in this file read
every single entry in the section. This is the common case.
However when one of the entries has had its data updated (e.g. with
'binman replace') we don't want to read it again from the file. Allow
the entry to be skipped, for this purpose. This is currently done in the
CBFS implementation, so adding it here will allow that to use more of
the entry_Section code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This method is currently marked private. However it is useful to be able
to subclass it, since much of the entry_Section code can be reused. Rename
it.
Also document one confusing part of this code, so people can understand
how to add a test for this case.
Fix up a few pylint warnings to avoid regressing the score.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a -V option which shows the version number of binman. For now this
just uses a local 'version' file. Once the tool is packaged in some way
we can figure out an approach that suits.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this file to improve the pylint score a little. The remaining item
is:
Function name "ParseArgs" doesn't conform to snake_case naming style
which needs some binman-wide renaming.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the same technique as with binman to load this module from the U-Boot
tree if available. This allows running tests without having to specify
the PYTHONPATH variable.
Signed-off-by: Simon Glass <sjg@chromium.org>
When compiled with -Og for better debugability u-boot ends up in a stack
overflow using
gcc (Ubuntu 11.2.0-7ubuntu2) 11.2.0
GNU Binutils for Ubuntu 2.37
putchar(ch) is defined as a macro which ends up calling U-Boot's putc()
implementation instead of the glibc one, which calls os_putc() ...
Let's use fputc(ch, stdout) instead as fputc() does not exist in U-Boot.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
* fixes the bug in function bind_drivers_pass that for
CONFIG_CC_OPTIMIZE_FOR_SIZE=n and no entries in the driver_info list,
i.e. n_ents == 0, the processor steps into the first loop iteration
despite the loop condition being false.
* the Xilinx Zynq-7000 device would eventually hang due to an attempted
access to an invalid memory address
* the bug is fixed by changing the type of idx from uint to int
Board: zynq-zybo
Target: ARM
Compiler: arm-none-eabi-gcc 9.2.1
Signed-off-by: Alexander Preissner <fpga-garage@preissner-muc.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Enable saving environment to SPI flash memory on SiFive
Unmatched.
Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Configure SPI flash devices into SPL. Add SPI boot option to spl.c.
Document how to format flash for booting.
Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addresses and default build for SBI_V02.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The device tree split into .dtsi and .dts files, common
device node for eMMC/SD, enable I2C1, UART1 for console
instead of UART0, enable the DDR 2GB memory and in
that 288MB memory is reserved for fabric buffer.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Remove the microchip compatible string and default compatible "cdns,macb"
support both 32-bit and 64-bit DMA access.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add boot command "bootcmd_ram" to support autoboot from RAM.
This feature could be useful at the very initial state of chip design
when there is only a minimal set of peripheral. (e.g. without mmc and mac ..etc)
The kernel image is default to be loaded at 0x2000000 via debug port,
and the following script serves as an example:
spl()
{
cmd="riscv64-linux-gdb -q \
-ex \"target remote $host:$port\" \
-ex \"load\" \
-ex \"thread apply all set \\\$pc=&_start\" \
-ex \"thread apply all set \\\$a0=\\\$mhartid\" \
-ex \"thread apply all set \\\$a1=<dtb address>\" \
-ex \"restore u-boot.itb binary 0x200000\" \
-ex \"restore Image binary 0x2000000\" \
-ex \"c\" \
spl/u-boot-spl
"
echo $cmd
eval $cmd
}
The address where the kernel is loaded can be altered by
changing the value of KERNEL_IMAGE_ADDR.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The gpio_request_by_name() returns zero in case of success, however the
conditional return value check in gpio_request_by_name() checks only for
(ret != -ENOENT) and if the condition is true, returns ret outright.
This leads to a situation where successful gpio_request_by_name() return
leads to immediate successful eth_phy_of_to_plat() return as well, and
to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the
PHY driver operates with valid reset GPIO, but with assert/deassert times
set to default, which is 0, instead of the values from DT. This breaks
PHY reset.
Fix this by checking if return value is non-zero and then for this one
single allowed non-zero return value, -ENOENT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
It turns out that in custom designs if the system is reset
multiple times in conjunction with a slight increase in external
temperature, the felix switch starts to behave in a strange way:
packets are no longer received on the ENECT interface connected
to the L2switch internal port (the TX side of internal port stops working
or the packets do not reach there. It is not very clear where
the packets remain blocked. None of the counters points to a disruption
in the L2switch)
The issue is not reproducible on NXP reference designs.
It was observed that by adding the switch core reset, the problem
goes aways, even if intensive testing in temperature chambers
is applied.
The current patch performs soft reset on the switch core to ensure proper
operation of the L2switch.
Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
socat is a very powerful tool to work with socets (and not only)
in UNIX systems. Let's add support for it in netconsole.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Ferry Toth <fntoth@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This symbol is not used anywhere in the code. Just enable in couple of
defconfigs but it does nothing that's why remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Wait for the read/write transfer finish bit get actually cleared,
this does not happen immediately on at least SoCFPGA Gen5.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
When, for various reasons, a bad FIT image is used where a loadable
image is marked as 0 length, attempt is made for a 0 length allocation and
read of 0 byte read operation.
Instead provide warning in log and skip attempting to do such a load.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Add a message on probe in driver model core when the default
pinctrl selection failed.
This message is displayed only when the pinctrl API is
implemented, i.e. when result is not ENOSYS.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the return value ENOSYS for unsupported API
- pinctrl_generic_set_state
- pinctrl_select_state
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The helper macro CONFIG_IS_ENABLED and CONFIG_VAL are not real
configurations and they are no more present in u-boot.cfg so they can
be removed in config_whitelist.txt.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
The two helpers macros CONFIG_IS_ENABLED and CONFIG_VAL are defined in
include/linux/kconfig.h but they are not real configurations; they can
be safely removed in the generated configuration file "u-boot.cfg".
This patch simplifies the comparison of this U-Boot configuration file.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
- Finish converting CONFIG_USE_BOOTCOMMAND, CONFIG_BOOTCOMMAND,
CONFIG_RAMBOOTCOMMAND, CONFIG_NFSBOOTCOMMAND, all of
CONFIG_SYS_[BO]R[0-7]_PRELIM, CONFIG_FSL_DDR_BIST and
CONFIG_FSL_DDR_INTERACTIVE.
This converts the following to Kconfig:
CONFIG_SYS_BR0_PRELIM
CONFIG_SYS_OR1_PRELIM
CONFIG_SYS_BR1_PRELIM
CONFIG_SYS_OR2_PRELIM
CONFIG_SYS_BR2_PRELIM
CONFIG_SYS_OR2_PRELIM
CONFIG_SYS_BR3_PRELIM
CONFIG_SYS_OR3_PRELIM
CONFIG_SYS_BR4_PRELIM
CONFIG_SYS_OR4_PRELIM
CONFIG_SYS_BR5_PRELIM
CONFIG_SYS_OR5_PRELIM
CONFIG_SYS_BR6_PRELIM
CONFIG_SYS_OR6_PRELIM
CONFIG_SYS_BR7_PRELIM
CONFIG_SYS_OR7_PRELIM
This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms
that can set these values do so. Add the relevant SYS_BRx_PRELIM_BOOL
to platforms that had not been previously migrated.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_USE_BOOTCOMMAND
CONFIG_BOOTCOMMAND
CONFIG_RAMBOOTCOMMAND
CONFIG_NFSBOOTCOMMAND
Signed-off-by: Tom Rini <trini@konsulko.com>
- add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
- enable simple framebuffer node for splashscreen for stm32mp1
- use lower-case hex for address for stm32 MCU and MPU's device tree
- define LOG_CATEGORY for stmfx pinctrl driver
- add support for probing bus voltage level translator
- add custom PHY reset bindings on AV96
- enable KSZ90x1 PHY driver on DHCOR
- stm32mp1 DDR update:
- add DDR read data eye training
- remove DDR calibration result
- remove DDR tuning support
- compute DDR size from DDRCTL registers
- DHSOM boards:
- increase USB power-good delay
- add update_sf script to install U-Boot into SF
- increase PHY auto-negotiation timeout to 20 seconds
- fix SoM and board coding strap GPIO handling
- auto-detect uSD level translator
Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit b7f060565e ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Since the commit f42045b2e7 ("stm32mp15: replace CONFIG_TFABOOT when
it is possible") the function stm32mp1_ddr_setup is always called so the
__maybe_unused can be removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.
This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.
So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.
These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.
See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Align the framebuffer size on MMU_SECTION_SIZE in kernel, = max 2MB for
LPAE for armV7, to avoid issue with the simple frame buffer activation,
when U-Boot add a reserved memory in the kernel device tree to preserve
the splash screen until Linux driver initialization.
See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a new function to activate an existing simple frame buffer node
and add the associated reserved memory, with no-map properties.
This device tree update is only done when the video device is active
and the video buffer is used.
This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because
gd->video_bottom and gd->video_top are only defined when CONFIG_DM_VIDEO
is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the helper function video_is_active() to test if one video device
is active.
This function can be used in board code to execute operation
only when the display is probed / really used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned
with the associated file name fdt_simplefb.h/fdt_simplefb.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Rename the file lcd_simplefb.c to fdt_simplefb.c to be aligned
with the configuration name and with the associated include file
./include/fdt_simplefb.h
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This converts the following to Kconfig:
CONFIG_LCD_DT_SIMPLEFB
This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in
common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.
Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.
The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.
This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
the optional parameter "st,phy-cal"
After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.
This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The uSD level translator on DHSOM and Avenger96 are optional, however it
is possible to auto-detect it. This is done by setting SD CMD line high,
and then testing whether signal level on CK line matches the signal level
on CKIN line. If so, the uSD level translator is present, otherwise it is
not populated.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.
The translator test sets CMD high to avoid interfering with a card, and
then verifies whether signal set on CK is detected on CKIN. If the signal
is detected, translator is present, otherwise the CKIN feedback clock are
disabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.
This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Using mmc.dtbo from rpi-firmware to switch the controller for the SD
card slot from sdhci to sdhost causes the numbering to change; the
SD card is then not recognized at boot. Add to the range checked.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspberry Pi Foundation released the new Zero 2 W which we
want to detect, so we can detect the correct device tree file name.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspberry Pi Foundation has updated their documentation so update
the URL to the latest place to find the HW device revision codes.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Pull request for efi-2022-01-rc4
Documentation:
* describe how to enable Virtio RNG on QEMU ARM
UEFI:
* enable testing the TCG2 protocol
* support TPM event log passed from firmware
tpm_tis_remove() leads to calling tpm_tis_ready() with the IO region
unmapped and chip->locality == -1 (locality released). This leads to a
crash in mmio_write_bytes().
The patch implements these changes:
tpm_tis_remove(): Unmap the IO region after calling tpm_tis_cleanup().
tpm_tis_cleanup(): Request locality before IO output and releasing
locality.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Firmwares before U-Boot may be capable of doing tpm measurements
and passing them to U-Boot in the form of eventlog. However there
may be scenarios where the firmwares don't have TPM driver and
are not capable of extending the measurements in the PCRs.
Based on TCG spec, if previous firnware has extended PCR's, PCR0
would not be 0. So, read the PCR0 to determine if the PCR's need
to be extended as eventlog is parsed or not.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The current tpm2_pcr_read is hardcoded using SHA256. Make the
actual command to TPM configurable to use wider range of algorithms.
The current command line is kept as is i.e limited to SHA-256 only.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Platforms may have support to measure their initial firmware components
and pass the event log to u-boot. The event log address can be passed
in property tpm_event_log_addr and tpm_event_log_size of the tpm node.
Platforms may choose their own specific mechanism to do so. A weak
function is added to check if even log has been passed to u-boot
from earlier firmware components. If available, the eventlog is parsed
to check for its correctness and further event logs are appended to the
passed log.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With TPM emulation enabled in u-boot-test-hooks we should also provide the
tpm2 command used for the test/py/tests/test_tpm2.py test.
One of the Python TPMv2 tests expects sandbox specific values. So disable
it on other platforms.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sometimes UART stops transmitting characters after UART clock is changed
back to XTAL. In this state UART fifo is always full. Kernel during early
boot wants to print output on UART and is waiting for non-empty UART fifo.
Which leads to CPU hangup without any (debug) output on UART.
Marvell Armada 3700 Functional Specifications says that for programming
fractional divisor registers it is required to disable UART, enable
loopback mode, reset fifos, program registers, disable loopback mode,
release reset of fifos and enable UART.
But these steps do not fix above mentioned issue that UART hangup. Also
gating UART clock does not help. And even resetting UART state machines do
not help.
Experiments showed that UART fifo is unblocked after board is being reset
(during board reset UART HW transmit UART fifo even CPU is not executing
kernel/bootloader anymore).
And another experiments showed that same workaround can be achieved also
by external reset of UART HW (without need to reset board).
So do not implement any of "Marvell recommended" steps from Functional
Specifications as they do not work. And rather prior changing parent clock
back to XTAL, do external reset of UART HW. This operation also resets all
UART registers, so basically it also sets UART clock to default, which is
XTAL. It is unknown why UART hangups and enters such broken state.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit aeb0ca64db ("arm: mvebu: turris_omnia: disable MCU watchdog in
SPL when booting over UART") disabled MCU watchdog when booting over
UART to ensure that watchdog does not reboot the board before UART
transfer finishes.
But if UART transfer fails for some reason, or if U-Boot binary crashes,
then board hangs forever as there is no watchdog running which could
reset it.
To fix this issue, enable A385 watchdog with very high timeout before
disabling MCU watchdog to ensure that even slow transfer can finish
successfully before watchdog timer expires and also to ensure that if
board hangs for some reason, watchdog will reset it.
Omnia's MCU watchdog has fixed 120 seconds timer and it cannot be
changed (without updating MCU firmware). A385 watchdog by default uses
25 MHz input clock and so the largest timeout value (2^32-1) can be
just 171 seconds. But A385 watchdog can be switched to use NBCLK (L2) as
input clock (on Turris Omnia it is 800 MHz clock) and in this case final
watchdog clock frequency is calculated as:
freq = NBCLK / 2 / (2 ^ R)
So A385 watchdog on Turris Omnia can be configured to at most 1374
seconds (about 22 minutes). We set it to 10 minutes, which should be
enough even for bigger U-Boot binaries or slower UART transfers.
Both U-Boot and Linux kernel, when initializing A385 watchdog, switch
watchdog timer to 25 MHz input clock, so usage of NBCLK input clock in
U-Boot SPL does not cause any issues.
Fixes: aeb0ca64db ("arm: mvebu: turris_omnia: disable MCU watchdog in SPL when booting over UART")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
The common emulation Makefile has a dependency on a non-existent
qemu_capsule.o when building with support for capsule update enabled
(CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y).
The code which was in qemu_capsule.c has been completely moved to
lib/efi_loader/efi_capsule.c by commit 7a6fb28c8e ("efi_loader: capsule:
add back efi_get_public_key_data()").
Remove the false dependency.
This fixes the following build error:
make[1]: *** No rule to make target 'board/emulation/common/qemu_capsule.o', needed by 'board/emulation/common/built-in.o'. Stop.
Fixes: commit 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to .rodata"")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Simon Glass <sjg@chromium.org>
Add an entry in maintainers for fastboot. It is starting off orphaned, but
hopefully someone can pick it up.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Lukasz has not been very responsive in reviewing clock patches. Add
myself as a maintainer.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
At present an Exception is raised if a command fails. This is a very broad
class and makes it difficult for callers to catch the error without also
catching other things, like programming bugs.
Change it to ValueError to make this easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the collection function used by pytest is quite strict on the
naming of the functions it detects. In particular it requires the name of
the test to be repeated in the function name.
This is not enforced anywhere else, but instead the tests are silently
omitted from the pytest run. This affects a few dozen tests.
The rule does not seem to have any particular purpose. Relax it, so that
all tests that use the UNIT_TEST() macro will run, regardless of the name
of the test function.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the hexdump tests are disabled in sandbox_flattree. This is
good, because they do not pass. Enable the required Kconfig so that they
will, when enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function that returns the number of devices in a uclass. This can be
helpful in sizing an array that needs to hold a list of them.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is useful to search just by a partial name, such as
when looking for a sibling device that has a common name substring. Add
helper functions to handle these requirements.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we support reading a string list a string at a time. Apart
from being inefficient, this makes it impossible to separate reading of
the devicetree into the of_to_plat() method where it belongs, since any
code which needs access to the string must read it from the devicetree.
Add a function which returns the string property as an array of pointers
to the strings, which is easily used by clients.
Signed-off-by: Simon Glass <sjg@chromium.org>
The details for of_property_read_string_helper() and
ofnode_read_string_index() are a little inaccurate. Fix up the comments to
avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
This method is currently called after the platform data has been freed.
But the pre_unbind() method may wish to access this, e.g. to free some
data structures stored there.
Split the unbinding of devices into two pieces, as is done with removal.
This corrects the problem.
Also tidy a code-style issue in device_remove() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
These functions currently lack tests so add some. The error handling
differs betwee livetree and flattree at present, so only check the error
codes with livetree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Before relocation there is generally not as much available memory and not
that much console output. At present the console-output buffer is the same
side before and after relocation. Add a separate Kconfig option to remove
this limitation.
Signed-off-by: Simon Glass <sjg@chromium.org>
When ext is NULL we cannot dereference it. Update the code flow to avoid
this, so that layout_mbr_partitions() can be used with partition tables
that do not include an extended partition.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this command considers the partitions to be identical if the
start and size are smaller than expected. It should check that they are
the same. Fix this and tidy up the code style a little.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
At present the MMC uclass assumes that the only child it can have is a
block device. Update this so we can add a bootmethod too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a way for sandbox MMC to present data from a backing file. This
allows a filesystem to be created on the host and easily served via an
emulated mmc device.
Signed-off-by: Simon Glass <sjg@chromium.org>
When running a program on the host, allow input to be passed in as stdin.
This is needed for running sfdisk, for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Otherwise the updated image will end up in the temporary folder that is
purged after completion.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This command is fairly complicated so documentation is useful.
Unfortunately I an not sure how the MTD side of things works and cannot
find information about that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This text should never change during execution, so it makes sense to
use a const char * so that it can be declared as const in the code.
Update struct cmd_tbl with a const char * pointer for 'help'.
We cannot make usage const because of the bmode command, used on mx53ppd
for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
GNU has a very useful third argument to match() but this is not supported
in the POSIX awk.
Update the code to cope, so that the script is POSIX-compliant.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Pull request for efi-2022-01-rc3-2
Test:
* fix pylint warnings
UEFI:
* disable interrupts before removing devices in ExitBootServices()
* implement poweroff in efi_system_reset() on sandbox
* allow booting via EFI even if some block device fails
* there is no os.path.unlink() method
* don't inherit from object
* add module docstring
* move imports to the top
* avoid unused variable
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
* don't inherit from object
* imports should be on the top level
* avoid unused variable names
* avoid unnecessary else after raise
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
UEFI code is always little-endian. Remove a superfluous test.
Remove a superfluous type conversion.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If we call efi_clear_os_indications() before initializing the memory store
for UEFI variables a NULL pointer dereference occurs.
The error was observed on the sandbox with:
usb start
host bind 0 sandbox.img
load host 0:1 $kernel_addr_r helloworld.efi
bootefi $kernel_addr_r
Here efi_resister_disk() failed due to an error in the BTRFS implementation.
Move the logic to clear EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED
to the rest of the capsule code.
If CONFIG_EFI_IGNORE_OSINDICATIONS=y, we should still clear the flag.
If OsIndications does not exist, we should not create it as it is owned by
the operating system.
Fixes: 149108a3eb ("efi_loader: clear OsIndications")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Our algorithm for creating USB device paths may lead to duplicate device
paths which result in efi_disk_register() failing. Instead we should just
skip devices that cannot be registered as EFI block devices.
Fix a memory leak in efi_disk_add_dev() caused by the duplicate device
path.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
If we look at the path that bootm/booti take when preparing to boot the
OS, we see that as part of (or prior to calling do_bootm_states,
explicitly) the process, bootm_disable_interrupts() is called prior to
announce_and_cleanup() which is where udc_disconnect() /
board_quiesce_devices() / dm_remove_devices_flags() are called from. In
the EFI path, these are called afterwards. In efi_exit_boot_services()
however we have been calling bootm_disable_interrupts() after the above
functions, as part of ensuring that we disable interrupts as required
by the spec. However, bootm_disable_interrupts() is also where we go
and call usb_stop(). While this has been fine before, on the TI J721E
platform this leads us to an exception. This exception seems likely to
be the case that we're trying to stop devices that we have already
disabled clocks for. The most direct way to handle this particular
problem is to make EFI behave like the do_bootm_states() process and
ensure we call bootm_disable_interrupts() prior to ending up in
usb_stop().
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This change implements an SCMI transport for agent interfacing the
OP-TEE SCMI service. OP-TEE provides an SCMI PTA (Pseudo-TA) for
non-secure world to send SCMI messages over an identified channel.
The driver implemented here uses a SMT shared memory for passing
messages between client and server.
The implementation opens and releases channel resources for each
passed SCMI message so that resources allocated (sessions) or
registered (shared memory areas) in OP-TEE firmware are released for
example before relocation as the driver will likely allocate/register
them back when probed after relocation.
The integration of the driver using dedicated config switch
CONFIG_SCMI_AGENT_OPTEE is designed on the model posted to the
U-Boot ML by Patrick Delaunay [1].
Link: [1] https://lore.kernel.org/all/20211028191222.v3.4.Ib2e58ee67f4d023823d8b5404332dc4d7e847277@changeid/
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Introduce compatible "linaro,scmi-optee" for SCMI transport channel
based on an OP-TEE service invocation.
Define "linaro,optee-channel-id" property to identify the OP-TEE SCMI
channel used by the protocol(s). OP-TEE SCMI transport can either use
shared memory or a static shared memory buffer identified by the DT.
These bindings were posted to the Linux kernel DT bindings mailing list
and acked by maintainer [1].
Link: [1] https://lore.kernel.org/linux-arm-kernel/20211029102118.GG6526@e120937-lin/T/
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Add two configs CONFIG_SCMI_AGENT_MAILBOX and CONFIG_SCMI_AGENT_SMCCC
to select the supported agents as all the agents are not supported.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Some boards need to change the tx/rx delay config in order for
gigabit Ethernet to work.
In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), Realtek documented the bits for overriding the delays
from the hardware straps.
Copy the logic from linux, so the delay config is set from the PHY's
interface type (the phy-mode property in the device tree).
This removes the need for a one-off workaround for the Pine A64+ board.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
priv->promisc is used as the parameter of the set_promisc() call
which accepts a bool type instead of char.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
set_promisc() call accepts the parameter of a bool type. Make it
clear by using true instead of 1.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If using OF_CONTROL, fdtcontroladdr is set to the fdt used to configure
U-Boot. When using PXE, if no fdt is defined in the menu file, and
there is no fdt at fdt_addr, add fall back on fdtcontroladdr too.
We are developing board support for the Armv8r64 FVP using
config_distro_bootcmd. We are also using OF_BOARD and would like the
PXE boot option to default to the fdt provided by board_fdt_blob_setup.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
The VCI string sent during bootp of U-Boot-SPL is corrupt. This is
because the byte counter is not adjusted within the bootp_extended()
function when the VCI string is added. We fix this.
Signed-off-by: Walter Stoll <walter.stoll@duagon.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The sja1105 is a 5-port switch that uses a DM_DSA driver. Its 5th (CPU)
port is connected internally to the eth2 port of the LS1021A SoC.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The eth aliases are for correct probing order, so that each Ethernet
port will get a predictable MAC address from the environment.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The list of ports which support SGMII depending on switch generation is
available here:
https://www.kernel.org/doc/html/latest/networking/dsa/sja1105.html#port-compatibility-matrix
SGMII can either be used to connect to an external PHY or to the host
port. In the first case, the use of in-band autoneg is expected, in the
last, in-band autoneg is expected to be turned off (fixed-link). So the
driver supports both cases.
SGMII support means configuring the PCS and PMA. The PCS is a Synopsys
Designware XPCS, in Linux this has a separate driver but here it is
embedded within the sja1105 driver. If needed it can be taken out later,
although we would need a UCLASS_PCS for it, which we don't have atm.
Nonetheless, I did go all the way to export an internal MDIO bus for PCS
access, because it is nice to be able to debug the PCS through commands
such as:
=> mdio read ethernet-switch@1-pcs 4 1f.0
Reading from bus ethernet-switch@1-pcs
PHY at address 4:
31.0 - 0x1140
The internal MDIO bus is not registered with DM because there is no
udevice on it, as mentioned. But the XPCS code can still be ripped out,
as needed.
I did not add support for 2500base-x because I do not expect this
interface type to be used as a boot source for anybody, it would just
add unnecessary bloat.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The SJA1105 driver is largely reused from Linux. Its programming model
is that it is blank out of reset, and it waits for a static
configuration stream over SPI, which contains all runtime parameters (it
has no notion of "default values").
Keeping a binary array for the configuration stream would have meant
that aspects such as the CPU port and the MAC speeds could have not been
configured easily, and would have been static and board-dependent.
Live-patching the binary array means recalculating the static config
table CRCs, which is not a fun process.
So we create an abstraction over the static config tables, using the
packing API, same as in Linux. The tables are kept as C structures, and
the binary configuration stream is constructed on-the-go, with CRC and
all.
All static config tables instantiated in this driver are mandatory.
The hardware reference manual can be found at:
https://www.nxp.com/docs/en/user-guide/UM10944.pdf
For tagging, a simplified version of tag_8021q from Linux is used. The
VLAN EtherType is the same (0xdadb) but since we don't want switching in
U-Boot, there is no reason to have a TX VLAN and an RX VLAN for each
port. We just need the RX VLANs to act as the unique pvid of each
front-panel port, to decode the switch port number. The RX VLAN is used
for both RX and TX.
The device tree bindings are the same as in Linux.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Instead of trying to guess which operating modes need in-band
negotiation to be active and which ones don't, parse the available
information from the device tree. That will be correct in the cases we
can already guess, and more.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Certain serial SERDES protocols like 1000base-x, 2500base-x, SGMII,
USXGMII can operate either in a mode where the PHY (be it on-board or
inside an SFP module) passes the link parameters (speed, duplex, pause)
to the MAC through in-band through control words standardized by IEEE
802.3 clause 37, or in a mode where the MAC must configure (force) its
link parameters based on information obtained out-of-band (MDIO reads,
guesswork etc).
In Linux, the OF node property named "managed" is parsed by the phylink
framework, and the convention is that if a driver uses phylink, then the
presence of this property means that in-band autoneg should be enabled,
otherwise it shouldn't.
To be compatible with the OF node bindings of drivers that use phylink
in Linux, introduce parsing support for this property in U-Boot too.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
In the current DSA switch driver API, only the udevice of the switch
(belonging to UCLASS_DSA) is exposed, as well as an "int port" argument.
So drivers do not have access to the udevice of individual ports
(belonging to UCLASS_ETH), one of the reasons being that not all ports
have an associated UCLASS_ETH udevice.
However, all DSA ports have an OF node, and in some cases the driver
needs a handle to it, for all ports including the CPU port. Example: the
following Linux per-port device tree property:
managed = "in-band-status";
states whether a port should operate with clause 37 in-band autoneg
enabled or not.
This patch exposes a function which can be called by individual drivers
as needed.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The Freescale TSEC can be a DSA master, and the ports of the attached
DSA switch can have different MAC addresses compared to the TSEC.
Nonetheless, the TSEC must receive the packets on behalf of those switch
ports. Therefore, implement the promiscuous mode method to allow DSA to
set this.
Note that the init_registers() function called from eth_ops :: start
overwrites this setting. There is no reason why the RCTRL register
should be zero-initialized, so just stop clearing it so that the setting
we applied in eth_ops :: set_promisc sticks.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The VSC8502 is a Microchip (formerly Microsemi, formerly Vitesse)
dual port, gigabit Ethernet copper PHY which supports the MII, GMII and
RGMII MAC-side interfaces.
Of these, I could only test RGMII, and my board needed RGMII delays to
be applied by software, so I am able to confirm that this patch handles
that properly.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
It was wrongly set to "MR", fix it.
Fixes: 52e2565bfb ("spi: atmel-quadspi: Add verbose debug facilities to monitor register accesses")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add dm command for driver model low level access and
gpio command for query and control gpio pins.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Scripts:
* Update spelling.txt
LMB:
* remove extern keyword in lmb.h
* drop unused lmb_size_bytes()
Test:
* test truncation in snprintf()
Documentation:
* add include/lmb.h to HTML documentation
UEFI:
* reduce non-debug logging output for measured boot
* fix use after free in measured boot
* startup the tpm device when installing the protocol
* implement EFI_EVENT_GROUP_BEFORE_EXIT_BOOT_SERVICES
* record capsule result only if capsule is read
Due to U-Boot's lazy binding mentality the TPM is probed but not properly
initialized. The user can startup the device from the command line
e.g 'tpm2 startup TPM2_SU_CLEAR'. However we can initialize the TPM during
the TCG protocol installation, which is easier to use overall.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
As described in the TCG spec [1] in sections 7.1.1 and 7.1.2 the FinalEvent
table should include events after GetEventLog has been called. This
currently works for us as long as the kernel is the only EFI application
calling that. Specifically we only implement what's described in 7.1.1.
So refactor the code a bit and support EFI application(s) calling
GetEventLog. Events will now be logged in both the EventLog and FinalEvent
table as long as ExitBootServices haven't been invoked.
[1] https://trustedcomputinggroup.org/wp-content/uploads/EFI-Protocol-Specification-rev13-160330final.pdf
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
We have implemented all what is new in UEFI specification 2.9 and relevant
for U-Boot.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Implement the EFI_EVENT_GROUP_BEFORE_EXIT_BOOT_SERVICES event group
handling.
Add the definition of EFI_EVENT_GROUP_AFTER_READY_TO_BOOT.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Record capsule update result only if the capsule file is
successfully read, because the capsule GUID is not sure when
the file can not be read or the file is not a capsule.
Without this fix, if user puts a dummy (non-capsule) file
under (ESP)EFI/UpdateCapsule, U-Boot causes a synchronous
abort.
This also fixes use-after-free bug of the 'capsule' variable.
Fixes: c74cd8bd08 ("efi_loader: capsule: add capsule_on_disk support")
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
log_info() is used for the debug level logging statement
which should use log_debug() instead. Convert it to reduce the
log output.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This commit adds the comment for efi_system_table and
efi_configuration_table structure.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This list is used by checkpatch.pl. The Linux v5.15 version has several
words that where mispelled in U-Boot too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The extern keyword is not needed in include/lmb.h to declare functions.
Remove it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Correct Sphinx style comments in include/lmb.h
Add the logical memory block API to the HTML documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Defining static functions in includes should be avoided.
Function lmb_is_nomap() is only used in the unit test.
So move it to the unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
If bootloader was updated without running oem format, reboot will cause
boot loop because the SYSTEM stage fails.
Add a final PANIC stage running fastboot to permit recovery.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This can lead to GPT and BCB errors even if fastboot was selected early
by usb rom boot and the eMMC is blank/invalid.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
This should use the provided U_BOOT_DRIVER() macro so that the driver gets
added to the appropriate linker list. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7c9dcfed50 ("pinctrl: meson: rework gx pmx function")
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
- An assortment of fixes related to GD, GD_FLG_SKIP_RELOC, and the lmb
- Environment fix on synquacer developmentbox
- Fix for get_info is not valid in partition code
In case U-Boot enters relocation with GD_FLG_SKIP_RELOC, skip the
relocation. The code still has to set up new_gd pointer and new
stack pointer.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
In case U-Boot starts with GD_FLG_SKIP_RELOC, the U-Boot code is
not relocated, however the stack and heap is at the end of DRAM
after relocation. Reserve a LMB area for the non-relocated U-Boot
code so it won't be overwritten.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Even if U-Boot has relocation disabled via GD_FLG_SKIP_RELOC , the
relocated stage of U-Boot still picks GD from new_gd location. The
U-Boot itself is not relocated, but GD might be, so copy the GD to
new GD location even if relocation is disabled.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
In some case, get_info() interface can be NULL, add this check to stop
from crash.
Signed-off-by: schspa <schspa@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without default setting of gd->env_addr, U-Boot will cause
a synchronous abort if the env-variables on the SPI flash is
broken or not saved corectly. Set gd->env_addr correctly.
This reverts commit 535870f3b0.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
- NVMe updates
- TI AM64x related USB updates
- Update PCIe CAM support macros, add PCI CAM support as well
- AST2600, Apple (ARM64) pinctrl drivers
- ARM-specific DEBUG uart inconsistencies fixed
- MediaTek MMC improvement
- aspeed: Support secure boot chain with FIT image verification
Add and Enable USB SuperSpeed Host Port in SPL.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Consulting to "NVM Express® Base Specification, revision 2.0".
If more PRP List pages are required, then the last entry of
the PRP List contains the Page Base Address of the next PRP
List page. The next PRP List page shall be memory page aligned.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Most NVME devcies maintain data in internal cache for an uncertain
times, and u-boot has no method to force NVME to flush cache.
So this patch adds FUA to avoid data loss caused by power off after data
programming.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
When booting U-Boot in crosvm, the virtual machine emulates a PCI cam
device, not the PCI-E 'ecam' device normally seen on e.g. QEMU. This
PCI device can be supported with only trivial changes to the ecam
driver.
Instead of adding a completely new driver which is identical besides the
initialization step, add support for the PCI version to the existing
driver.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: Ram Muthiah <rammuthiah@google.com>
AST2600 leverages the FIT hash/signature verification to fulfill
secure boot trust chain. To improve the performance and save SW
code size for those crypto operations, the two HW crypto engine,
HACE and ACRY, are enabled.
However, both of the engines can only access to data stored in
DRAM space. Therefore, we need to move the FIT image into DRAM
before the booting.
This patch update the CONFIG_BOOTCOMMAND to execute the pre-defined
ENV variable which consists of FIT image copy to memory and booting.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Enable SPL FIT image load and verification support.
The HW accelerated SHA is also available with the
newly added support of the HACE HW hash engine.
The SPL thumb build is also enabled to keep the binary
less than 64KB to fit into the Aspeed secure boot design.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Return CONFIG_SYS_LOAD_ADDR pointing to DRAM space for
spl_get_load_buffer() to allow generic SPL image loading
code (e.g. FIT and Ymodem) to store data in DRAM.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Hash and Crypto Engine (HACE) is designed to accelerate the
throughput of hash data digest, and symmetric-key encryption.
Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
The AST2600 SRAM has been extended to 88KB since A1
chip revision. This patch updates the SRAM size to
offer more space for early stack/heap use.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Fix inconsistent function parameter name of the hash algorithm.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Fixes: 92055e138f ("image: Drop if/elseif hash selection in calculate_hash()")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the recent changes on mmc driver, we saw that the boot is ~5 secs
longer compared to v2021.07 on mediatek platforms.
This regression is seen during mmc_init and caused by the following
patch [1].
Indeed since we did not support poll dat0, we fulfilled the condition
of [1] and a delay of 500 ms was added for every __mmc_switch call.
By adding the support of wait_dat0(), we now don't need to mdelay
during mmc_init anymore.
[1]: https://patchwork.ozlabs.org/project/uboot/patch/1629192034-64056-1-git-send-email-ye.li@nxp.com/
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Some boards do not enable SPL_SERIAL so cannot use the debug UART. Add
this condition to the code and drop use of the preprocessor while we are
here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Enable this to permit early debugging. Due to the way qmeu works, the
input clock can be zero and things still work.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we don't init the debug UART in the generic ARM code, but
instead leave it to individual machines to handle. This is not the
way it is supposed to work.
Add the required init to the crt files. This ensures that the UART
is available as early as possible and that the announcement appears
when it should, if enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few boards enable CONFIG_DEBUG_UART_BOARD_INIT but do not define the
required init function. Fix this by disabling the debug UART.
With snow the debug UART is enabled but the driver CONFIG is not. Fix this
too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Lot of PCIe controllers are using ECAM addressing. So add common ECAM
macros into U-Boot's pci.h header file which can be suitable for most
PCI controller drivers.
Replace custom ECAM address macros in every PCI controller driver by new
ECAM macros from U-Boot's pci.h header file.
Similar macros are defined also in Linux kernel. There is a small
difference between Linux and these new U-Boot macros.
U-Boot's PCIE_ECAM_OFFSET() takes device and function numbers in separate
arguments. Linux's PCIE_ECAM_OFFSET() takes device and function numbers
encoded in one argument. The reason is that U-Boot's PCI_DEVFN() macro is
different than Linux's PCI_SLOT() macro. So having device and function
numbers in separate arguments makes code more straightforward.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This driver supports both pin muxing and GPIO support for the
pin control logic found on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Without get_desc, the tpm command will not provide a
description of the device in 'tpm device' or 'tpm info'.
Due to the characteristics of the Atmel TPM it isn't
possible to determine certain attributes (e.g open/close
status) without using the TPM stack (compare Infineon
and ST TPM drivers), so just print out the chip model
and udevice name as the identifier.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This driver was broken due to an empty offset byte being prepended
at the start of every transmission.
The hardware does not mimic an EEPROM device with registers so
an offset byte is not required.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This command is not compiled by default and has not been updated alongside
changes to the tpmv1 API, such as passing the TPM udevice to the relevant
functions.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
To quote Simon:
One barrier to completing the 7-year-long Kconfig migration is that
the default environment is implemented using ad-hoc CONFIG options.
At present U-Boot environment variables, and thus scripts, are defined
by CONFIG_EXTRA_ENV_SETTINGS.
It is not really feasible to move the environment to Kconfig as it is
hundreds of lines of text in some cases.
Even considering the current situation, it is painful to add large
amounts of text to the config-header file and dealing with quoting and
newlines is harder than it should be. It would be better if we could just
type the script into a text file and have it included by U-Boot.
This is already supported by the CONFIG_USE_DEFAULT_ENV_FILE feature. But
that does not support use of CONFIG options or comments, so is best suited
for use by other build systems wanting to define the U-Boot environment.
Add a feature that brings in a .env file associated with the board
config, if present. To use it, create a file board/<vendor>/<board>.env or
use CONFIG_ENV_SOURCE_FILE to set a filename.
The environment variables should be of the form "var=value". Values can
extend to multiple lines. This series converts the existing environment
documentation to rST and updates it to explain how to use this.
This has different semantics in different places. Go with the bootm method
and put it in a common function so that the behaviour is consistent in
U-Boot. Update the docs.
To be clear, this changes the way that 'bootelf' and standalone boot
work. Before, if autostart was set to "fred" or "YES", for example, they
would consider that a "yes". This may change behaviour for some boards,
but the only in-tree boards which mention autostart use "no" to disable
it, which will still work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Wolfgang Denk <wd@denx.de>
These conflict with real-word addresses. Use locally administered
MAC addresses and a suitable IPv4 address from 192.0.2.0/24
(TEST-NET-1).
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Alexander Dahl <ada@thorsis.com>
Make various other updates suggested during review of the rST conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Make various updates suggested during review of the rST conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Suggested-by: Wolfgang Denk <wd@denx.de>
Use a text file for the environment instead of the #define settings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
At present U-Boot environment variables, and thus scripts, are defined
by CONFIG_EXTRA_ENV_SETTINGS. It is painful to add large amounts of text
to this file and dealing with quoting and newlines is harder than it
should be. It would be better if we could just type the script into a
text file and have it included by U-Boot.
Add a feature that brings in a .env file associated with the board
config, if present. To use it, create a file in a board/<vendor>
directory, typically called <board>.env and controlled by the
CONFIG_ENV_SOURCE_FILE option.
The environment variables should be of the form "var=value". Values can
extend to multiple lines. See the README under 'Environment Variables:'
for more information and an example.
In many cases environment variables need access to the U-Boot CONFIG
variables to select different options. Enable this so that the environment
scripts can be as useful as the ones currently in the board config files.
This uses the C preprocessor, means that comments can be included in the
environment using /* ... */
Also support += to allow variables to be appended to. This is needed when
using the preprocessor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
Move this from the README to rST format.
Drop i2cfast since it is obviously obsolete and breaks the formatting.
Other changes and improvements are in a following patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Behún <marek.behun@nic.cz>
This is a complicated set of #defines and it is painful to convert to a
text file. We can (once pending patches are applied) provide the same
functionality with bootmethod. Drop this for sandbox to allow conversion
to a text-file environment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Xilinx changes for v2022.01-rc3
sdhci:
- Fix emmc mini case with missing firmware interface
zynqmp:
- Restore JTAG interface if required
- Allow overriding board name
- Add support for DLC21
- Fix one fallthrought statement description
- Use config macro instead of name duplication
- Save multiboot to variable
firmware:
- Handle ipi_req errors better
- Use local buffer in case user doesn't need it instead of NULL/0 location
spi:
- gqsi: Fix write issue at low frequencies
net:
- gem: Disable broadcasts
Compiler is not happy:
common/image-board.c: In function ‘boot_get_kbd’:
common/image-board.c:902:17: warning: implicit declaration of function ‘do_bdinfo’ [-Wimplicit-function-declaration]
902 | do_bdinfo(NULL, 0, 0, NULL);
| ^~~~~~~~~
Move the forward declaration to a header.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove the extra (empty) argument passed to str8w, causing the following
error:
<instantiation>:40:47: error: too many positional arguments
str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
^
u-boot/arch/arm/lib/memcpy.S:240:5: note: while in macro instantiation
17: forward_copy_shift pull=16 push=16
^
Note: no functional change intended.
Fixes: d8834a1323 ("arm: Use optimized memcpy and memset from linux")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Fix dfu_alt_info to use nor1 instead of the device name.
This reverts a part of commit 59bd18d4c4 ("configs: synquacer:
Remove mtdparts settings and update DFU setting") because the
commit a4f2d83414 ("mtd: spi: nor: force mtd name to "nor%d"")
changed the mtd device naming scheme to nor%d.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The subdivision name "TQ Components" hasn't been in use for a long time.
Rename the vendor directory to "tq", which also matches our Device Tree
vendor prefix.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Cap end of relocations by the binary size.
Linkers like to insert some auxiliary sections between .rela.dyn and
.bss_start. These sections don't make their way to the final binary, but
reloc_rela still tries to relocate them, resulting in attempted read
past the end of file.
When linking U-Boot with ld.lld, the STATIC_RELA feature (enabled by
default on arm64) breaks the build. After this patch, U-Boot can be
linked successfully with and without CONFIG_STATIC_RELA.
Originally-from: Elena Petrova <lenaptr@google.com>
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: David Brazdil <dbrazdil@google.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Tom Rini <trini@konsulko.com>
This ensures the USB_MUSB_PIO_ONLY config is set to an apppropriate
value from the changes enabling USB_MUSB_GADGET does.
Namely, USB_MUSB_PIO_ONLY default to =y on USB_MUSB_SUNXI being y.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
For testing the TPM drivers and the EFI_TCG2_PROTOCOL we need the tool
swtpm.
Once we move to Ubuntu Impish we can take libtpms from package libtpms-dev.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Both U-Boot proper and SPL entries were using the same description.
Fixes: b55881dd ("bootstage: Add SPL support")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With CONFIG_SYSRESET_WATCHDOG=y the sandbox can use a watchdog based system
reset.
To make this work calling sandbox_wdt_expire_now() must lead to a reset.
With this change we can test the development suggested in
[PATCH 0/4] Improved sysreset/watchdog uclass integration
https://lists.denx.de/pipermail/u-boot/2021-August/458656.html
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For successful execution of the watchdog test we need both the GPIO as well
as the SANDBOX watchdog.
Avoid a build failure for CONFIG_WDT_GPIO=n.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Correct an error in the tpl-dtb parameter to binman. At present the TPL
rule follows SPL but this is not correct, if TPL uses of-platdata, for
example.
Fixes: f99cbe4e86 ("fdt: Update Makefile rules with the new OF_REAL Kconfig")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of pretending that we don't have environment to force searching
default environment in env_get_default(), get the data from the
default_environment[] buffer directly.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
The env_get_f() function returns -1 on failure. Returning 0 means that
the variable exists, and is empty string.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Do not set GD_FLG_ENV_READY nor GD_FLG_ENV_DEFAULT if failed importing
in env_set_default().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
WIth EFI we must embed the devicetree in an ELF image so that it is loaded
as part of the executable file. We want it to include the binman
definition in there also, which in some cases cannot be created until the
ELF (u-boot) is built. Add an option to binman to support writing the
updated dtb to the ELF file u-boot.out
This is useful with the EFI app, which is always packaged as an ELF file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Binman needs to be able to update the contents of an ELF file after it has
been build. To support this, add a function to locate the position of a
symbol's contents within the file.
Fix the comments on bss_data.c and Symbol while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present any error from the 'make' command is silently swallowed by the
test system. Fix this by showing it when detected.
Signed-off-by: Simon Glass <sjg@chromium.org>
The Exception base class is a very vague and could be confusing to the
test system. Use the more specific ValueError exception instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This symbol has been functionally dead for a long time. Remove the last
and recent re-introductions of setting it, and update the whitelist so
it will not be re-introduced again.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_TRACE
CONFIG_TRACE_BUFFER_SIZE
CONFIG_TRACE_EARLY
CONFIG_TRACE_EARLY_ADDR
CONFIG_TRACE_EARLY_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_SPI_FLASH
CONFIG_ENV_IS_NOWHERE
CONFIG_ENV_OFFSET
CONFIG_ENV_OVERWRITE
CONFIG_ENV_SECT_SIZE
CONFIG_SYS_MMC_ENV_DEV
CONFIG_SYS_MMC_ENV_PART
Signed-off-by: Tom Rini <trini@konsulko.com>
- A number of pxe related cleanups and related re-organization.
- A few related pxe/sysboot/extlinux improvements
- Remove some dead code.
- Update Azure to use a newer Windows build environment
- Add a .get_maintainer.conf file
- A few minor TI SoC platform updates
The driver supports the ds1339 as well, which was probably intended by
the author but prevented by a typo. Fix the typo.
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
We need to filter out NET_ETH_START errors because we have to enable
networking in order to propagate the MAC addresses to the DT while there
is no network driver for the prueth in U-Boot yet.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This got lost while fixing up the condition in
board/siemens/iot2050/board.c
Fixes: b55881dd ("bootstage: Add SPL support")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 4b2be78ab6 ("time: Fix get_ticks being non-monotonic") has
broken boot on chiliboard platform, as it requires '/chosen/tick-timer'
in device-tree. This resulted in following panic message:
Could not initialize timer (err -19)
Provide missing chosen property in device-tree to fix chiliboard
support.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Since commit e57c7c5c42 ("get_maintainer.pl: update from Linux kernel
v5.13-rc6") only the top level MAINTAINERS file is used. This is because
this commit (accidentally) disabled the search of MAINTAINERS files
(find_maintainer_files is set to 0 again). Before that, commit
b79372ae94 ("scripts/get_maintainer.pl: enable find_maintainer_files")
explicitly enabled that feature. Nowadays, we also have to set
maintainer_path to a directory.
To fix it and enable recursive search of MAINTAINERS, create a
configuration file to set these two variables.
Signed-off-by: Michael Walle <michael@walle.cc>
The last board that used to set CONFIG_LYNXKDI has been removed in
commit 242836a893 ("powerpc: ppc4xx: remove pcs440ep support"),
doc/README.lynxkdi only talks about a MPC8260 board being supported,
and the mpc8260 support has been removed four years ago in commit
2eb48ff7a2 ("powerpc, 8260: remove support for mpc8260") already,
and common/lynxkdi.c only consists of an "#error" statement these
days, so it seems like the LYNX KDI code is dead code nowadays.
Let's remove it now.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Refactor this code so that we can call the 'pxe get' command without going
through the command-line interpreter. This makes it easier to get the
information we need, without going through environment variables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The only difference between the three helpers is the filesystem type.
Factor this out and call the filesystem functions directly, instead of
through the command-line interpreter. This allows the file size to be
obtained directly, instead of via an environment variable.
We cannot do the same thing with PXE's tftpboot since there is no API
at present to obtain information about the file that was read. So there
is no point in changing pxe_getfile_func to use a ulong for the address,
for example.
This is as far as the refactoring can go for the present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
It is pretty strange that the pxe code uses the 'filesize' environment
variable find the size of a file it has just read.
Partly this is because it uses the command-line interpreter to parse its
request to load the file.
As a first step towards unwinding this, return it directly from the
getfile() function. This makes the code a bit longer, for now, but will be
cleaned up in future patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This function no longer makes sense, since it is pretty easy to prepend
the boot directory to the filename. Drop it and update its only caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The 'bootfile' environment variable is read in the bowels of pxe_util to
provide a directory to which all loaded files are relative.
This is not obvious from the API to PXE and it is strange to make the
caller set an environment variable rather than pass this as a parameter.
The code is also convoluted, which this feature implemented by
get_bootfile_path().
Update the API to improve this. Unfortunately this means that
pxe_setup_ctx() can fail, so add error checking.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Both the syslinux and pxe commands use essentially the same code to parse
and run extlinux.conf files. Move this into a common function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
There are a few more blank lines than makes sense for readability. Also
free() handles a NULL pointer so drop the pointless checks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Move the header file into the main include/ directory so we can use it
from the bootmethod code. Move the C file into boot/ since it relates to
booting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Move this into the context to avoid a global variable. Also rename it
since the current name does not explain what it actually affects.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
At present the PXE functions pass around a pointer to command-table entry
which is very strange. It is only needed in a few places and it is odd to
pass around a data structure from another module in this way.
For bootmethod we will need to provide some context information when
reading files.
Create a PXE context struct to hold the command-table-entry pointer and
pass that around instead. We can then add more things to the context as
needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Put the function comments in the header file so that the full API can we
examined in one place.
Expand the comments to cover parameters and return values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Quite a lot of the code in common/relates to booting and images. Before
adding more it seems like a good time to move the code into its own
directory.
Most files with 'boot' or 'image' in them are moved, except:
- autoboot.c which relates to U-Boot automatically running a script
- bootstage.c which relates to U-Boot timing
Drop the removal of boot* files from the output directory, since this
interfers with the symlinks created by tools and there does not appear
to be any such file from my brief testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Tested-by: Artem Lapkin <email2tema@gmail.com>
- device-tree sync-up with Linux for ls1028a
- fixes/update in fsl-ddr driver, fsl-validate, lx2162a, fsl-mc,
spintable code, configs, qspi node, pci
- enable EFI_SET_TIME support in sl28
- powerpc: Drop -mstring
TPM drivers have currently no maintainers. Add myself since I contributed
the TIS implementation.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A previous patch added support for an mmio based TPM.
Add an example in QEMU on it's usage
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A previous commit is adding an MMIO TPMv2 driver. Include in the default
qemu arm configs, since we plan on using them on EFI testing
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add support for devices that expose a TPMv2 though MMIO.
Apart from those devices, we can use the driver in our QEMU setups and
test TPM related code which is difficult to achieve using the sandbox
driver (e.g test the EFI TCG2 protocol).
It's worth noting that a previous patch added TPMv2 TIS core functions,
which the current driver is consuming.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There's a lot of code duplication in U-Boot right now. All the TPM TIS
compatible drivers we have at the moment have their own copy of a TIS
implementation.
So let's create a common layer which implements the core TIS functions.
Any driver added from now own, which is compatible with the TIS spec, will
only have to provide the underlying bus communication mechanisms.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With the upcoming TPM2 API, some of the functions name are part of the new
header file. So switch conflicting internal function names and defines.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With the upcoming TPM2 API, some of the functions name are part of the new
header file. So switch conflicting internal function names and defines.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
UEFI specification does not require that BootOrder is defined.
In current implementation, boot variable measurement fails and
returns EFI_NOT_FOUND if BootOrder is not defined.
This commit correcly handles this case, skip the boot variable
measurement if BootOrder is not defined.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
- DHSOM update:
- Remove nWP GPIO hog
- Increase SF bus frequency to 50Mhz and enable SFDP
- Disable video output for DHSOM
- Disable EFI
- Enable DFU_MTD support
- Create include file for STM32 gpio driver private data
- Split board and SOC STM32MP15 configuration
- Device tree alignement with v5.15-rc6 for STM32MP15
- Add binman support for STM32MP15x
- Normalise newlines for stm32prog
- Update OTP shadow registers in SPL
We should avoid #ifdef in C modules and the unused functions
are eliminated by the linker.
Use the more readable IS_ENABLE() instead.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced
by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.
This patch also simplifies the code in cpu.c, stm32mp1_ram.c and
clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and
without TFA) is not supported: the associated initialization code is
present only in SPL.
This cleanup patch is a preliminary step to support SPL load of OP-TEE
in secure world, with SPL in secure world and U-Boot in no-secure world.
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig
- always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI
and CONFIG_CPU_V7_HAS_NONSEC
- CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig
- the correct sysreset driver is activated in each defconfig:
CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Currently the upper OTP (after 57) are shadowed in U-Boot proper,
when TFABOOT is not used.
This choice cause an issue when U-Boot is not executed after SPL,
so this BSEC initialization is moved in SPL and no more executed in U-Boot,
so it is still executed only one time.
After this patch this BSEC initialization is done in FSBL: SPL or TF-A.
To force this initialization in all the case, the probe of the BSEC
driver is forced in SPL in the arch st32mp function: spl_board_init().
Even if today BSEC driver is already probed in STM32MP15x clock driver
clk_stm32mp1.c because get_cpu_type() is called in
stm32mp1_get_max_opp_freq() function.
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The nWP GPIO hog was used to unlock the SPI NOR write protect when U-Boot
used to operate the SPI NOR in 1-1-1 mode. Now that the SPI NOR is operated
in 1-1-4 mode, the hog has adverse effects and causes transfer corruption,
since the hogged pin is also the IO2 pin. Remove the hogs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The stm32 gpio driver private data are not needed in arch include files,
they are not used by code except for stm32 gpio and pincontrol drivers,
using the same IP; the defines for this IP is moved in a new file
"stm32_gpio_priv.h" in driver/gpio.
This patch avoids to have duplicated file gpio.h for each SOC
in MPU directory mach-stm32mp and in each MCU directory arch-stm32*
and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a configuration file "stm32mp15_st_common.h" to handle the
STMicroelectronics boards configuration and rename stm32mp1.h to
"stm32mp15_common.h" to handle the generic STM32MP15x series configuration.
The configuration file "dh_stm32mp1.h" is also renamed to
"stm32mp15_dh_dhcom" for the configuration of board based on the
dhelectronics STM32MP15x SOM.
In the STMicroelectronics board configuration the default bootcmd
"bootcmd_stm32mp" is updated to only select the extlinux file found on
SD-Card on STM32MP15x EV1 for boot from NOR device.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Device tree alignment with Linux kernel v5.15-rc6
- Set {bitclock,frame}-master phandles on ST DKx
- Add coprocessor detach mbox on stm32mp15x-dkx boards
- Add coprocessor detach mbox on stm32mp157c-ed1 board
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Use binman to add the stm32image header on SPL binary for basic boot
or on U-Boot binary when it is required, i.e. for TF-A boot without FIP
support, when CONFIG_STM32MP15x_STM32IMAGE is activated.
The "binman" tool is the recommended tool for specific image generation.
This patch allows to suppress the config.mk file and it is a preliminary
step to manage FIT generation with binman.
The init_r parsing of U-Boot device tree to search the binman
information is not required for STM32MP15, so the binman library
can be removed in U-Boot (CONFIG_BINMAN_FDT is deactivated).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The missing trailing newline could confuse check-config.sh if the
definition of an option was on the first line of the next file that
find(1) happened to return.
Signed-off-by: William Grant <wgrant@ubuntu.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Field srcaddr in kwbimage v0 needs to be adjusted similarly like in v1.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Kwbimage v0 has similar alignment requirements as v1.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Fill the real header size without padding into the main header
This allows to reduce final image when converting image to another format
which does not need additional padding.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently kwbimage header is always aligned to 4096 bytes. But it does not
have to be aligned to such a high value.
The header needs to be just 4-byte aligned, while some image types have
additional alignment restrictions.
This change reduces size of kwbimage binaries by removing extra padding
between header and data part.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This change allows to convert image from one format to another without need
to include unnecessary padding (e.g. when target image format has smaller
alignment requirement as source image format).
Do it by storing real image data size without padding to the kwbimage
header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
xmodem block size is 128 bytes, therefore it is possible to transfer only
images with size multiple of 128 bytes. kwboot automatically pads image
with zero bytes at the end to align it to 128 bytes boundary.
Do this padding when generating image to allow uploading with other xmodem
tools or older kwboot versions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
There are more unused enums and function prototypes. Remove them. The
function kwbimage_check_params() does not return enum kwbimage_cmd_types,
but a boolean value returned as int.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
kwbimage v0 sldo has 32-bit data checksum at the end like kwbimage v1.
Use same data checksum validation for both v0 and v1 image types.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
kwbimage must have valid blockid member instead of zero value. Thus if
config file does not contain BOOT_FROM command, use by default the value
for SPI booting (which is probably the most common).
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
For documentation purposes update struct main_hdr_v0 to include information
where version of the image must be stored. For kwbimage v0 it obviously
must be 0. By default all image header memory is initialized to zero,
therefore this change has no functional effect.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
These two commands allow to specify custom setting of UART port used for
printing BootROM messages.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Header file mach/cpu.h already defines MBUS_PCI_MEM_SIZE macro which
defines size of MBUS_PCI_MEM_BASE window. So use global MBUS_PCI_MEM_SIZE
macro instead of locally defined PCIE_MEM_SIZE macro. Both macros have same
definition.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
It is useful to see kwboot version in the boot log output for debugging
purposes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Properly calculate and align image header size to xmodem block size.
Kirkwood v0 images do not have stored total size of header in header
structure itself like it is for v1 images. So kwbheader_size() calculates
size by traversing image structure itself. Aligning is done in kwboot by
putting zero padding bytes between the header and data part.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The Sunxi boards only support a 16 second watchdog timeout. This is too
short to boot Linux. The UEFI specification requires 300 seconds as
default timeout.
Change the default for CONFIG_WATCHDOG_AUTOSTART for ARCH_SUNXI.
Fixes: b147bd3607 ("sunxi: Enable watchdog timer support by default")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
CONFIG_FSL_ENETC is not explicitly enabled in the NXP LS1028A config
files, instead it is selected by CONFIG_MSCC_FELIX_SWITCH, a state of
matters which is fragile.
CONFIG_MSCC_FELIX_SWITCH depends on CONFIG_DM_DSA, which depends on
CONFIG_PHY_FIXED.
Not all LS1028A boards did enable CONFIG_PHY_FIXED, which resulted in
all of Ethernet being compiled out.
This patch makes sure that CONFIG_PHY_FIXED is enabled for all LS1028A
boards, and CONFIG_FSL_ENETC as well - don't rely on that fragile
selection done by the Felix switch config.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
In the current code, it doesn't reset the cursors of LUT entry and
StreamID at the beginning of the fixup, so it can result in LUT entry
setup and msi-map mismatch and LUT entries and StreamID leaking
when reload and fixup the DTB.
This patch move the initialization of LUT entry and StreamID cursors
to the beginning of the fixup to resolve the issues.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Use moveconfig.py script to convert CONFIG_SYS_FMAN_FW_ADDR,
CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_QE_FMAN_FW_LENGTH to Kconfig and
move these entries to defconfigs.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1046A-QDS board requires updation in few environment configs in TFA
defconfigs of the board.
Following are the changes:
- Update CONFIG_ENV_ADDR
- Update CONFIG_ENV_SECT_SIZE
- Enable CONFIG_SYS_RELOC_GD_ENV_ADDR
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1046A-QDS has CONFIG_SPI_FLASH_SST, CONFIG_SPI_FLASH_EON and
CONFIG_SPI_FLASH_STMICRO defines present in header. Move these entries
from header to defconfigs.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
I'd like to keep informed about ls1028a.dtsi changes. For now, there is
no top-level entry for any layerscape specific files. Instead, add the
file entry to my board MAINTAINERS file.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Don't use efi_allocate_pages(). The allocated memory isn't carved out of
the lmb allocations. The memory might then be allocated twice.
Particulary, this might happened with the fdt_high/initrd_high feature
which will relocate the fdt/ramdisk. This might then overlap with the
spin table.
Instead use memalign() which allocates on memory on the heap which is
correctly carved out by lmb.
Please note, that the memory is later reserved in the device tree as
well as in the EFI memory map in ft_fixup_cpu() (in
arch/arm/cpu/armv8/fsl-layerscape/fdt.c).
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable support to update the board via the DFU protocol and make it
possible to export the block devices via USB mass storage protocol.
This will not work out of the box, yet. You have to change the dr_mode
of the usb0 controller to peripheral manually to make it work. True, OTG
support will hopefully coming soon.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that the DWC3 USB driver has support for the layerscape platform,
use it. This will have the benefit that peripheral mode will work.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for the proper dwc3 device tree binding support as specified
in the offical device tree spec.
Initially, add support for the LS1028A support. Other SoCs should be
easy to add by just adding the corresponding compatible string.
Unfortunately, the device trees of all other layerscape SoCs are not
converted and uses a wrong compatible string only known in u-boot.
To maintain backwards compatibility with current u-boot device trees,
add the generic "fsl,layerscape-dwc3" compatible string.
OTG mode is not supported yet. The dr_mode in the devicetree will either
have to be set to peripheral or host.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
[backport from linux commit d9612c2f0449e24983a8b689603210486a930c90]
Enable the undefined length INCR burst type and set INCRx.
Different platform may has the different burst size type.
In order to get best performance, we need to tune the burst
size to one special value, instead of the default value.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
[backport from linux commit db2be4e9e30c6e43e48c5749d3fc74cee0a6bbb3]
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Both dr_mode and maximum-speed properties are usually optional. Drivers
will still try to fetch the properties nonetheless, which leads to error
messages, although they are no errors. Change pr_err() to pr_debug().
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Instead of looking at all USB (host) devices, just search all DWC3
device tree nodes. This will (1) fix a panic if of_match is zero and (2)
also apply the fixup if the controller is in peripheral mode. Both
happen when the DWC3 USB controller driver is used.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Check that all matching nodes have the correct compatible and that there
is at least one match.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add a helper to iterate over all nodes with a given compatible string.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.12.
Notable changes:
- second watchdog added
- the number of chip selects of the SPI controller is now correct and
reflects what the hardware offers
- the LPUARTs have the correct clock parent
- USB controllers are enabled by default, which was already the case
before this sync because all board enabled all the USB controller
nodes. A linux patch to fix this is pending.
- the eSDHC controller changes from big-endian to little-endian, but
that property seems to be not used at all.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Disable the PCIe controllers by default, just like in the linux device
tree. But there is one catch, for linux they are enabled in-place by the
bootloader. Obviously, this doesn't work for the bootloader. Thus we
explicitly enable the controllers in the -u-boot.dtsi files.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
To make the synchronization of the u-boot device tree with the one from
linux easier, move the I/O window to the one which is specified in the
linux device tree. The actual value shouldn't matter as long as it
mapped to the corresponding memory window of the PCIe controller which
is a 32GiB window at 80_0000_0000h (first controller) or 88_0000_0000h
(second controller).
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This property is unused in the layerscape PCIe controller driver and not
present in the linux device tree. Remove it to be similarly.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The official bindind of the PCIe controller of the ls1028a has the
following compatible string:
compatible = "fsl,ls1028a-pcie";
Additionally, the resource names and count are different. Update the
driver to support this binding and change the entry in the ls1028a
device tree.
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The official ls1028a binding of the driver uses the following as
compatibles:
compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
Change the ls1028a device tree and add this new compatible to the fsl
specific xhci driver, otherwise the generic dwc3 driver will be used
with the compatibles above.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The driver will look for a named resource "ecc-addr", but this isn't the
official binding. In fact, the official device tree binding
documentation doesn't mention any resource names at all. But it is safe
to assume that it's the linux ones we have to use if we want to be
compatible with the linux device tree. Thus rename "ecc-addr" to
"sata-ecc" and convert all the users in u-boot.
While at it, also rename "sata-base" to "ahci" although its not used at
all.
This change doesn't affect the SATA controller on the ZynqMP.
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The official ls1028a binding of the driver uses the following as
compatibles:
compatible = "fsl,ls1028a-lpuart";
Add the missing compatible to the driver and update the device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The official ls1028a binding of the driver uses the following as
compatibles:
compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
Add the missing compatible to the driver and update the device tree.
We can use the fallback "fsl,ls1021a-v1.0-dspi", because the endianness
is determined by the little-endian property and not by the compatible
string itself. Further, we won't need and specific details on the DMA
configuration (which is different on the LS1021A). If it's ever needed,
we can later add the more specific "fsl,ls1028a-dspi" compatible to the
driver.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
According to the linux device tree specification the compatible string
is:
compatible = "arm,sp805", "arm,primecell";
Fix all users in u-boot.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
While at it fix the indentation.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting it into the new location, keep it sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
While at it fix the indentation.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting it into the new location, keep it sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
To keep the device tree similar to the linux kernel one, we need to move
all CCSR related devices into the /soc node. To keep the patches easy to
review, we initially add an empty /soc node and populate it piece by
piece.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Nowadays, both boards boot using the TF-A BL1/BL2 and SPL isn't used at
all. The property is not needed, remove it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This node is some hodgepodge between the ddr controller node at SoC
offset 0x1080000 and some static memory size of 2GiB. Remove this bogus
node because it doesn't seem to be used at all.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no "fsl,ls1028a-gpu" compatible string. It is solely for the
proprietary driver which will never be open source. Lately, linux gained
support for the open source etnaviv driver for the GPU (although there
is still support for the DisplayPort PHY missing to get actual graphics
output). Thus, instead of supporting some proprietary driver, switch
over to the open source one, which also have an official device tree
binding.
Cc: Andy Tang <andy.tang@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Adds check for memory clock variable before calculating caslat_actual.
Set mclk_ps to slowest DIMM supported if mclk_ps is found zero.
Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This has not been supported by toolchains for some time and has been
putting out a warning. Drop this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Remove "num-cs" property from device-tree as it is no longer used by
qspi driver anymore.
Also, specify status as "disabled" and enable qspi support in respective
board dts files. This will also help in aligning node properties with
other board properties.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Document the update image and how to use the EFI UpdateCapsule.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In order to add other Kontron boards to the docs alongside the existing sl28 board,
we need to reduce the levels of the sections and change the title.
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable support for update over EFI UpdateCapsule mechanism. This board
doesn't support setting EFI variables after ExitBootservices().
Therefore, we are also enabling EFI_IGNORE_OSINDICATIONS.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Generate a FIT update image during build. The image will be called
"u-boot.update" and can be used to build an EFI UpdateCapsule or during
DFU mode. Although, the latter isn't supported because there is no USB
OTG driver yet.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Allow EFI to actually set the time before ExitBootServices().
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Increase fdt blob size for lx2160 and lx2162 series
to fix below errors/warnings during device tree fixup.
Unable to update property /soc/spi@2100000:status, err=FDT_ERR_NOSPACE
Unable to update property /soc/spi@2110000:status, err=FDT_ERR_NOSPACE
Unable to update property /soc/spi@2120000:status, err=FDT_ERR_NOSPACE
WARNING: could not set reg FDT_ERR_NOSPACE.
WARNING unable to set iommus: FDT_ERR_NOSPACE
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Disabling PCIE support currently lead to a crash because the code for
erratum A010315 is still run. Add a conditional to only select
CONFIG_SYS_FSL_ERRATUM_A010315 when CONFIG_PCIE_LAYERSCAPE is enabled.
Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix Bad Shift operator issue in step_to_string function
by adding an if check
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix possible divide by zero issue in fsl_ddr_set_memctl_regs
by adding an if check
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix possible divide by zero issue in get_memory_clk_period_ps
by adding a check
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
to fix following checkpatch warnings.
Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where
possible
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
At present the counter never hits the comparitor in this case. Add a
special case.
This ensures that the snow backlight works when at full brightness.
Fixes: 76c2ff3e5f video: backlight: fix pwm's duty cycle calculation
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
According to ./include/linux/kconfig.h,
CONFIG_IS_ENABLED(OF_BOARD) expands to 0
when CONFIG_SPL_BUILD is defined because
there is no CONFIG_SPL_OF_BOARD.
Use #if defined instead.
Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds memcpy_fromio and memcpy_toio definitions for some device
drivers which have these definitions, like cadence_qspi_apb.c
Signed-off-by: Wei Fu <wefu@redhat.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pull request for efi-2022-01-rc2
Documentation:
* improve description of mmc rescan
* remove obsolete PPC documenation
UEFI
* Provide unit test for the EFI_TCG2_PROTOCOL
* Implement add EFI_TCG2_PROTOCOL.SubmitCommand
* Start the implementation of a 64 bit EFI app
* Reduce rcar3_salvator-x image size
Currently output of dfu commands ends on a line with leading hash signs
('#'). The succeeding output should be placed on a new line.
After writing updates via dfu print a new line.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
rcar3_salvator-x u-boot.img is very close to the 0x100000 size limit.
Disable support for Unicode capitalization.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This commit adds the missing EFI_TCG2_PROTOCOL selftest
and Measured Boot selftest in lib/efi_selftest.
This selftest includes PE/COFF image measurement test, some PCR values are
different in each architecture. With that, this commit also adds pre-built
versions of lib/efi_selftest/efi_miniapp_file_image_exit.c for PE/COFF
image measurement test for 32-bit arm, arm64, ia32, x86_64, riscv32 and
riscv64. Prebuilding avoids the problem of reproducible builds.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Make the test 'onrequest'.
Add code comments to the includes with the binaries.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current EFI video driver only works when running in the stub. In that
case the stub calls boot services (before jumping to U-Boot proper) and
copies the graphics info over to the efi table. This is necessary because
the stub exits boot services before jumping to U-Boot.
The app maintains access to boot services throughout its life, so does not
need to do this. Update the driver to support calling boot services
directly.
Enable video output for the app. Note that this uses the
EFI_GRAPHICS_OUTPUT_PROTOCOL protocol, even though it mentions vesa.
A sample qemu command-line for this case is:
qemu-system-x86_64 -bios /usr/share/edk2.git/ovmf-ia32/OVMF-pure-efi.fd
-drive id=disk,file=try.img,if=none,format=raw -nic none
-device ahci,id=ahci -device ide-hd,drive=disk,bus=ahci.0
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a function to return this information along with a stub for the
efi_info_get() function, since calling it otherwise hangs U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This variable is already defined by the EFI code. Drop the duplicate
definition when building a 64-bit EFI app.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Most modern platforms use 64-bit EFI so it is useful to have a U-Boot app
that runs under that. Add a (non-functional) build for this.
Note that --whole-archive causes the gcc 9.2 linker to crash, so disable
this for now. Once this is resolved, things should work.
For now, avoid mentioning the documentation for the 64-bit app, since it
does not work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Most EFI implementations use 64-bit but U-Boot only supports running as
a 32-bit app at present. While efi-x86_payload64 does boot from 64-bit
UEFI it immediately changes back to 32-bit before starting U-Boot.
In order to support a 64-bit U-Boot app, update the Kconfig to add an
option for 32/64 bit. Update the prompt for the existing option so it is
clear it relates to the stub. Move both up to just under the choice that
controls them, since this looks better and the menu.
Use CONFIG_EFI_APP in the Makefile instead of CONFIG_TARGET_EFI_APP,
since the latter is specific to a single target and we will have two.
Memory size is set to 32MB for now so that it can run on qemu without
increasing the default memory size. We may need to increase the default
later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For the EFI app, we must embed the devicetree in the ELF file since that
is the only thing that is run by UEFI. Drop the warning to avoid
confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
There is no need to avoid driver model for networking. Drop this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It is quite complicated to run U-Boot on QEMU since we have four
different builds and they must use different versions of qemu and the
UEFI binaries.
Add a script to help. It requires U-Boot itself to be built. Once that
is done you can use this script to build an image for use with qemu and
optionally run it.
Signed-off-by: Simon Glass <sjg@chromium.org>
This commit adds the EFI_TCG2_PROTOCOL.SubmitCommand
required in the TCG PC Client PFP spec.
SubmitCommand enables to send the raw command to the TPM device.
To implement this api, tpm2_submit_command() is added
into tpm-v2.c.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
As we discussed in ML, currently a device tree is the only place
to store public keys for capsule authentication. So __weak is not
necessary for now.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide human readable descriptions of the speed nodes instead of the name
of constants from the code.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The related boards have been removed four years ago already, in
commit 98f705c9ce ("powerpc: remove 4xx support"), so this README
file is not required anymore.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The PPC440 support has been removed in commit 98f705c9ce
("powerpc: remove 4xx support"). This patch removes this obsolete
file as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Thomas Huth <thuth@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
This converts the following to Kconfig:
CONFIG_BOARD_EARLY_INIT_F
CONFIG_BOARD_LATE_INIT
CONFIG_DISPLAY_BOARDINFO
CONFIG_DISPLAY_BOARDINFO_LATE
Signed-off-by: Tom Rini <trini@konsulko.com>
When building a system that has both TPL and SPL_OS_BOOT, code which
tests for CONFIG_SPL_OS_BOOT will be built and enabled in TPL, which is
not correct. While there is no CONFIG_TPL_OS_BOOT symbol at this time
(and likely will not ever be) we can use CONFIG_IS_ENABLED(OS_BOOT) in
these common paths to ensure we only compile these parts in the SPL
case.
Signed-off-by: Tom Rini <trini@konsulko.com>
For the symbols which are both hard-coded as enabled and used, move to
Kconfig. The rest of the CONFIG_YAFFS namespace is unselected anywhere,
so we leave it as is.
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of hardcoding the watchdog for reset, and the PMIC for poweroff,
use the sysreset framework to manage the available poweroff/reset
backends. This allows (as examples) using the PMIC to do a cold reset,
and using a GPIO to power off H3/H5 boards lacking a PMIC. Furthermore,
it removes the need to hardcode watchdog MMIO addresses, since the
sysreset backends can be discovered using the device tree.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The sysreset uclass unconditionally provides a definition of the
reset_cpu() function. So does the sunxi board code. Fix the build with
SYSRESET enabled by omitting the function from the board code in that
case. The code still needs to be kept around for use in SPL.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add an option to automatically register watchdog devices with the
wdt_reboot driver for use with sysreset. This allows sysreset to be a
drop-in replacement for platform-specific watchdog reset code, without
needing any device tree changes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently, the wdt_reboot driver always gets its watchdog device
reference from an OF node. This prevents selecting a watchdog at
runtime. Move the watchdog device reference to the plat data, so
the driver can be bound with the reference pre-provided. The
reference will still be acquired from the OF node if it is not
already provided.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
These driver probe functions are not (and should not be) called from
outside the respective driver source files. Therefore, the functions
should be marked static.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
None of the sysreset drivers do anything beyond providing sysreset
uclass ops. They should depend on the sysreset uclass.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- pci_mvebu: Fix access to config space and PCIe Root Port (Pali)
- a37xx: pci: Program the data strobe for config read requests (Pali)
- kwboot: Misc improvements and fixes (Pali)
When allocate the GPD ring, and tell its address to the controller, then
the driver starts or resumes the QMU, the controller will try to access
the first GPD, so need flush the first one to avoid wrong GPD status.
Reported-by: Xin Lin <Xin.Lin@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
According to the Armada 3720 Functional Specification Data Strobe applies
for both read and write config requests.
Data strobe bits configure which bytes from the start address should be
returned for read request. Set value 0xf (all 4 bits) into Data Strobe
register to read all four bytes from specified 32-bit config space
register. Same value for Data Strobe register is programmed by Linux
pci-aardvark.c driver for config read requests.
Without this patch pci-aardvark driver sets data strobe register only
during config write operations. So any followup config read operations
could result with just partial datai returned (if previous write operation
was not 32-bit wide). This patch fixes it and ensures that config read
operations always read all bytes from requested register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
After successful transfer of whole image only two things can happen:
- BootROM starts execution of data block, which changes UART baudrate
back to 115200 Bd,
- board crashes and causes CPU reset
In both cases UART baudrate is reset to the default speed. So there is
no need to send special magic sequence to inform kwboot that baudrate is
going to be reset and kwboot does not need to wait for this event and
can do it immediately after BootROM acknowledges end of xmodem transfer.
Move ARM code for sending magic sequence from main baudrate change
section to binhdr_pre section which is executed only before changing
baudrate from the default value of 115200 Bd to some new value. Remove
kwboot code waiting for magic sequence after successful xmodem transfer.
Rationale: sometimes when using very high UART speeds, magic sequence is
damaged and kwboot fails at this last stage. Removal of this magic
sequence makes booting more stable.
Data transfer protocol (xmodem) is using checksums and retransmit, so it
already deals with possible errors on transfer line.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The ARM code we inject into the image to change baudrate back to the
default value of 115200 Baud, which is run after successful UART transfer
of the whole image, cannot use stack as at this stage stack pointer is not
initialized yet.
Stack can only be used when BootROM is executing binary header, to
preserve state of registers, since BootROM expects that.
Change the ARM baudrate code to not use stack at all and put binary
header specific pre + post code (which stores and restores registers) into
separate arrays.
The baudrate change code now jumps at it's end and expects that there is
either code which returns to the BootROM or jumps to the original exec
address.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Older Armada SoCs have custom ARMv5te compatible core which does not
support movt instruction. So replace mov + movt instruction pair used for
immediate move construction by mov + orr instructions which are supported
also by ARMv5te.
After this change kwboot ARM code should be compatible with any 32-bit ARM
core compatible by ARMv2 or new. At least GNU AS does not throw any error
or warning.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Increase loop cycles from 600000 to 2998272, which should increase delay
from 1ms to about 5ms on 1200 MHz CPU.
The Number 2998272 was chosen as the nearest value around 3000000 which can
be encoded into one ARM mov instruction. It avoids usage of movt instruction
which is not supported by ARMv5te cores.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Kwboot puts each xmodem packet to kernel queue, then waits until all bytes
of that packet are transmitted over UART and then waits for xmodem reply
until it is received into kernel queue.
If some reply is received during the time we are waiting until all bytes
are transmitted, then kernel puts them into the queue and returns it to
kwboot in next read() call.
So there is no need to wait (with tcdrain() function) until all bytes from
xmodem packet are transmitted over UART, since any reply received either
during that time or after is returned to kwboot with the next read().
Therefore do not call tcdrain() after each xmodem packet sent. Instead
directly wait for any reply after putting xmodem packet into write kernel
queue.
This change could speed up xmodem transfer in case tcdrain() function waits
for a longer time.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
After the trasfer of last header packet, it is possible that baudrate
change pattern is received, and also that NAK byte is received so that
the packet should be sent again.
Thus we should not clear the baudrate change state when sending retry
of that packet.
Move code for initializing state variables from kwboot_xm_recv_reply()
to kwboot_xm_sendblock().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently when kwboot receive some garbage reply which does not understand,
it waits 1s before it tries to resend packet again.
The most common error on UART is that receiver sees some bit flipped which
results in invalid reply.
This behavior slows down xmodem transfer over UART as basically on every
error kwboot is waiting one second.
To fix this, try to resend xmodem packet for first 3 attempts immediately
without any delay. If broken reply is received also after the 3 attempts,
continue retrying with 1s delay like it was before.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch does not change behavior of the code, just allows to implement
new changes more easily.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Size of the header stored in kwbimage may be larger than real used size in
the kwbimage header. If there is unused space in kwbimage header then use
it for growing it. So update code to calculate used space of kwbimage
header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This ensures that kwboot_img_grow_hdr() function still sees valid kwbimage
header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Expression (hdrsz % KWBOOT_XM_BLKSZ) is non-zero therefore expression
(KWBOOT_XM_BLKSZ - hdrsz % KWBOOT_XM_BLKSZ) is always less than value
KWBOOT_XM_BLKSZ. So there is no need to add another modulo. Also rename
variable `offset` to `grow` which better describes what is stored in
this variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
It is hard to debug why kwboot is failing when the last message is
'Finishing transfer' and no additional output. So show verbose message when
kwboot finished transfer and is waiting for baudrate change magic sequence.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
For kwbimage v1, tell BootROM to send BootROM messages to UART port number
0 (used also for UART booting) with default baudrate (which should be
115200) and do not touch UART MPP configuration.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
If data part of image is modified, update 4-byte data checksum.
It looks like A385 BootROM does not verify this checksum for image
loaded via UART, but we do not know if other BootROMs are also ignoring
it. It is always better to provide correct checksum.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Some vendor U-Boot kwbimage binaries (e.g. those for A375) have load
address set to zero. Therefore it is not possible to inject code which
changes baudrate back to 115200 Bd before the data part.
So instead inject it after the data part and change kwbimage execution
address to that offset. Also store original execution address into
baudrate change code, so after it changes baudrate back to 115200 Bd, it
can jump to orignal address.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Data part of the image contains 4-byte checksum. Validate it when
processing the image.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
SPI image header and data parts do not have to be aligned to 128 byte
xmodem block size. So reserve additional memory for aligning header part
and additional memory for aligning data part.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Explicitly disable 2 stop bits by clearing CSTOPB flag, disable modem
control flow by clearing CRTSCTS flag and do not send hangup after closing
device by clearing HUPCL flag.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Explicitly zero out the rfds fd_set with FD_ZERO() before using it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Root Complex should be the default mode, let's set it explicitly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Now that PCI Bridge is working, U-Boot's CONFIG_PCI_PNP code automatically
enables memory access and bus mastering when it is needed. So do not
prematurely enable memory access and bus mastering.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
PCI Bridge is always accessible also when link is down. So move detection
of link up from mvebu_pcie_of_to_plat() function to mvebu_pcie_valid_addr()
function which is used when accessing PCI config space.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Functions mvebu_pcie_get_local_bus_nr() and mvebu_pcie_get_local_dev_nr()
are not used, so remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The mysterious "Memory controller" PCI device which is present in PCI
config space is improperly configured and crippled PCI Bridge which acts
as PCIe Root Port for endpoint PCIe card.
This PCI Bridge reports in PCI config space incorrect Class Code (Memory
Controller) and incorrect Header Type (Type 0). It looks like HW bug in
mvebu PCIe controller but apparently it can be changed via mvebu registers
to correct values.
The worst thing is that this PCI Bridge is crippled and its PCI config
registers in range 0x10-0x34 alias access to internal mvebu registers which
have different functionality as PCI Bridge registers. Moreover,
configuration of PCI primary and secondary bus numbers (registers 0x18
and 0x19) is done via totally different mvebu registers via totally strange
method and cannot be done via PCI Bridge config space.
Due to above fact about PCI config range 0x10-0x34, allocate a private
cfgcache[] buffer in the driver, to which PCI config access requests to
the 0x10-0x34 space will be redirected in mvebu_pcie_read_config() and
mvebu_pcie_write_config() functions. Function mvebu_pcie_write_config()
will also catch writes to PCI_PRIMARY_BUS (0x18) and PCI_SECONDARY_BUS
(0x19) registers and set PCI Bridge primary and secondary bus numbers via
mvebu's own method.
Also, Expansion ROM Base Address register (0x38) is available, but at
different offset 0x30. So recalculate register offset before accessing PCI
config space.
After these steps U-Boot sees working PCI Bridge and CONFIG_PCI_PNP code
can finally start enumerating all PCIe devices correctly, even with more
complicated PCI topology. So update also mvebu_pcie_valid_addr() function
to reflect state of the real device topology.
Each PCIe port is de-facto isolated and every PCI Bridge which is part of
PCIe Root Complex is also isolated, so put them on separate PCI buses as
(local) device 0.
U-Boot already supports enumerating separate PCI buses, real (HW) bus
number can be retrieved by "PCI_BUS(bdf) - dev_seq(bus)" code, so update
config read/write functions to properly handle more complicated tree
topologies (e.g. when a PCIe switch with multiple PCI buses is connected
to the PCIe port).
Local bus number and local device number on mvebu are used for determining
which config request type is used (Type 0 vs Type 1). On normal non-broken
PCIe hardware it is done by primary and secondary bus numbers. So correctly
translate settings between these numbers to ensure that correct config
requests are sent over the PCIe bus.
As bus numbers are correctly re-configured, it does not make sense to print
some initial bogus configuration during probe, so remove this debug code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When reading 8 or 16 bits from config space, use appropriate readb() or
readw() calls. This ensures that PCIe controller does not read more bits
from endpoint card as asked by read_config() function.
Technically there should not be an issue with reading data from config
space which are not later used as there are no clear-by-read registers.
But it is better to use correct read operation based on requested size.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Current implementation of write_config() is broken for PCI_SIZE_8 or
PCI_SIZE_16 as it always uses writel(), which means that write operation
is always 32-bit, so upper 24 bits for PCI_SIZE_8 and upper 16 bits for
PCI_SIZE_16 are cleared.
Fix this by using writeb() and writew(), respectively.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
- Fixes for x86 build with Clang/LLVM compiler
- Tangier ACPI changes
- Edison SD card detect pin fix
- EFI on x86 doc update with latest instructions
- PXE utility fixes to align with latest x86 zboot implementation
There are two PCB designs in the wild which use the opposite
signaling for SD card detection. This makes U-Boot working
in one case and failing in the other. Quirk this out by
disconnecting SD card detection pin from the PCB by switching
it to mode 3. In the disconnected state the read value is always
the same and inverted to what we are expecting in the code.
BugLink: https://github.com/edison-fw/meta-intel-edison/issues/136
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We would need to quirk out the Card Detect case and for that we allow
configuring the SD/SDIO family of pins.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When building U-Boot with clang, it notices that the i8254.h include
guard does not work correctly due to a typo. Fix it.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the other same typo at the end of the same file]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
There is no point to use Method() for the constant.
Replace it with Name() defined object. For the _STA
case it saves 3 bytes per each entry.
Before: 2881
After: 2833
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
bootm and zboot accept different arguments:
> bootm [addr [arg ...]]
> - boot application image stored in memory
> passing arguments 'arg ...'; when booting a Linux kernel,
> 'arg' can be the address of an initrd image
> zboot [addr] [size] [initrd addr] [initrd size] [setup] [cmdline]
> addr - The optional starting address of the bzimage.
> If not set it defaults to the environment
> variable "fileaddr".
> size - The optional size of the bzimage. Defaults to
> zero.
> initrd addr - The address of the initrd image to use, if any.
> initrd size - The size of the initrd image to use, if any.
In the zboot flow, the current code will reuse the bootm args and attempt
to pass the initrd arg (argv[2]) as the kernel size (should be argv[3]).
zboot also expects the initrd address and size to be separate arguments.
Let's untangle them and have separate argv/argc locals.
Signed-off-by: Zhaofeng Li <hello@zhaofeng.li>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The existing intructions in the U-Boot on EFI doc do not work with
the latest QEMU. Update the doc with the correct instructions, as
well as using the new OVMF URL link.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Environment tidy-ups
patman 'postfix' support
fix binman test race condition causing a timeout error
# gpg: Signature made Sun 31 Oct 2021 03:36:55 PM EDT
# gpg: using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg: issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655 B627 7F17 3A3E 9008 ADE6
Check sizeof(default_environment) against ENV_SIZE in a static_assert()
instead of runtime.
Only check if !USE_HOSTCC (for in fw_env tool ENV_SIZE expands to a
variable, and cannot be checked statically) nad
!DEFAULT_ENV_INSTANCE_EMBEDDED, for in that case the default_environment
variable is not set.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sometimes we use uchar and sometimes char for the default environment
array. By always using char, we can get rid of some explicit casts.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Various freescale boards set gd->env_addr to default_environment in
board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is
redundant, since it is done by env_init() before board_init() is called.
Let the env subsystem handle this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This board sets gd->env_addr to default_environment in board_init(), but
the board has environment in SPI flash according to defconfig. Let the
env API handle environment automatically.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
env_flash_init() (both implementations) assigns default environment if
ENV_INVALID, but this is done in the generic env_init() function, which
calls this initializer, so drop it from here.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use spaces instead of tabs in assignments, since there are no lines to
align assignment values to.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
env_nowhere_init() assigns default environment if ENV_INVALID, but this
is done in the generic env_init() function, which calls this
initializer, so drop it from here.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
env_nvram_init() assigns default environment if ENV_INVALID, but this is
done in the generic env_init() function, which calls this initializer,
so drop it from here.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
env_nand_init() says the environment is valid even if it is assigning
default environment due to not being able to access nand pre-reloaction
(determined by macro values). Change this to ENV_INVALID and let the
generic env_init() function, which calls this initializer, assign the
default environment.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
env_sf_init_addr() says the environment is valid even if it is assigning
default environment due to CRC failure. Change this to ENV_INVALID and
let the generic env_init() function, which calls this initializer,
assign the default environment.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
The function env_sf_init_addr() assigns number literals (1) instead of
ENV_VALID to gd->env_valid. Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the if clause we use tabs and in the else clause spaces. Let's use
spaces in the if clause too.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
When linking the final u-boot binary with LLD, the following link errors
are seen:
ld.lld: error: can't create dynamic relocation R_386_32 against local
symbol in readonly segment; recompile object files with
-fPIC or pass '-Wl,-z,notext' to allow text relocations
in the output
>>> defined in arch/x86/cpu/start.o
>>> referenced by arch/x86/cpu/start.o:(.text.start+0x32)
[...]
>>> defined in arch/x86/cpu/start16.o
>>> referenced by arch/x86/cpu/start16.o:(.start16+0x1C)
According to Nick Desaulniers:
"This is a known difference between GNU and LLVM linkers; the GNU
linkers permit relocations in readonly segments (making them not read
only), LLVM does not (by default)."
Since U-Boot apparently seems to use relocations in readonly segments,
change the global linker flags to permit them when linking with LLD by
specifying '-z notext'.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present testThreadTimeout() assumes that the expected timeout happens
first when building the section, but it can just as easily happen at the
top-level image. Update the test to cope with both.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
The data blob apparently does not need to be modified through the fit
field of the image_sign_info struct so make it point to const to avoid
the need to cast away constness in functions that assign a pointer to
const data to the field.
fit_image_setup_verify already had to cast away constness as it assigned
a const void * argument to the field. The cast can now be removed.
Signed-off-by: Hannu Lounento <hannu.lounento@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Revert GIC LPI changes that need to be reworked.
- mvebu SATA booting bugfix
- Samsung Galaxy S9/S9+(SM-G96x0), Samsung Galaxy A and Apple M1
platform support.
Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones.
U-boot can be used as chain-loaded bootloader to gain control
on booting vanilla linux(and possibly others) kernels
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone,
for China \ Hong Kong markets.
Has unlockable bootloader, unlike SM-G960U (American market version),
which allows running u-boot as a chain-loaded bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Hi-end qualcomm chip, introduced in late 2017.
Mostly used in flagship phones and tablets of 2018.
Features:
- arm64 arch
- total of 8 Kryo 385 Gold / Silver cores
- Hexagon 685 DSP
- Adreno 630 GPU
Tested only as second-stage bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Allows to change clock frequency of debug uart,
thus supporting wide range of baudrates.
Enable / disable functionality is not implemented yet.
In most use cases of SDM845 (i.e. mobile phones and tablets)
it's not needed, because qualcomm first stage bootloader leaves it
initialized, and on the other hand there's no possibility to
replace signed first stage bootloader with u-boot.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Provide preliminary instructions on how to get U-Boot to run on
Apple Silicon Macs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add preliminary device trees for the Apple M1 mini (2020) and
Apple M1 Macbook Pro 13" (2020). Device tree bindings for
the Apple M1 SoC are still being formalized and these device
trees will be synchronized with the Linux kernel as needed.
The device trees in this commit are based on the initial Apple
M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl,
pmgr, usb based on bindings on track for inclusion in Linux
5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and
watchdog that don't have a proposed binding yet.
These device trees are provided as a reference only as U-Boot
uses the device tree passed by the m1n1 bootloader.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DART is an IOMMU that is used on Apple's M1 SoC. This driver
configures the DART such that it operates in bypass mode which is
enough to support DMA for the USB3 ports integrated on the SoC.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Apple M1 SoCs include an S5L UART which is a variant of the S5P
UART. Add support for this variant and enable it by default
on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for Apple's M1 SoC that is used in "Apple Silicon"
Macs. This builds a basic U-Boot that can be used as a payload
for the m1n1 boot loader being developed by the Asahi Linux
project.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add MAINTAINERS entry]
This uclass is intended to manage IOMMUs on systems where the
IOMMUs are not in bypass mode by default. In that case U-Boot
cannot ignore the IOMMUs if it wants to use devices that need
to do DMA and sit behind such an IOMMU.
This initial IOMMU uclass implementation does not implement and
device ops and is intended for IOMMUs that have a bypass mode
that does not require address translation. Support for IOMMUs
that do require address translation is planned and device ops
will be defined when support for such IOMMUs will be added.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use proper SATA macro for boot_device switch in spl_boot_device() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Stop using the device tree as a source for ad-hoc information.
This reverts commit 2ae7adc659.
Signed-off-by: Michael Walle <michael@walle.cc>
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Ad-hoc bindings that are not part of the upstream device tree / bindings
are not allowed in-tree. Only bindings that are in-progress with
upstream and then re-synced once agreed upon are.
This reverts commit af288cb291.
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marc Zyngier <maz@kernel.org>
This allows specifying partitions using more extended syntax. This is
particularly useful to access eMMC hardware partitions. For example,
this allows something like
ums 0 mmc 0.0,0.1,0.2,0.3
to expose four LUNs for each of the four default eMMC hardware
partitions. Note that the comma syntax was already present, and this
syntax is already documented.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
dev_err seems to be moved to different header file. Include
dm/device_compat.h file to compile properly.
Fixes: 69dae8902b ("linux/compat.h: Remove redefinition of dev_xxx macros")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Now that the three M/N/H variants can be built from one config,
rename the defconfig file to be more generic since it supports multiple
RZ/G2.
Signed-off-by: Adam Ford <aford173@gmail.com>
Both Ethernet and USB drivers get their reference clocks from
the versaclock. Enable that driver and the common clock driver
by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that TARGET_BEACON_RZG2M can handle all the work that
was done with TARGET_BEACON_RZG2N and TARGET_BEACON_RZG2H,
remove them since they just create more duplicate code.
Signed-off-by: Adam Ford <aford173@gmail.com>
The three different boards share the same board file and only differ
in terms of which SoC is being used. By enabling FIT on
TARGET_BEACON_RZG2M, it can support all three boards and elimate
duplicate code.
Signed-off-by: Adam Ford <aford173@gmail.com>
There are three boards from Beacon, RZ/G2 M/N/H which all
use the same board file, but different device trees.
Add code to automatically select the proper device tree
based on the CPU type.
Signed-off-by: Adam Ford <aford173@gmail.com>
JetHome has own MAC OUI. Add jethub-j100 board file. Update config.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds support for amlogic efuse write and provides two subcommands
of "sm" command: "efuseread" and "efusewrite" to read/write bytes between
memory and efuse.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
[narmstrong: fixed indent at end of patch]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
needs to be enabled for multi block writes (MMC CMD 18).
Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
It doesn't need to follow more sequence to do the hwparititioning,
because SD doesn't support hwpartitioning feature.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Add option to extend the hardware partition to the maximum size by
using the '-' dash sign instead of $cnt parameter. This is useful
in case we want to switch the entire eMMC user area into pSLC mode,
especially in case the device may be populated with different size
eMMCs. With this change, we do not have to calculate the number of
blocks of the user area manually.
To switch the pSLC mode for user area, use e.g. the following.
WARNING: This is a one-time irreversible change.
=> mmc hwpartition user enh 0 - wrrel on complete
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Adds an implementation of the wait_dat0 MMC operation for the Freescale
eSHDC driver, allowing the driver to continue when the card is ready
rather than waiting for the worst case time on each MMC switch operation.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
- mvebu: Fix usage of BIN header arguments (Pali)
- mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali)
- mvebu: nandpagesize support for kwbimage v1 (Pali)
kwbimage v1 has also nandpagesize field. So set it to zero for both image
versions when image is not signed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The NAND_PAGE_SIZE command is already supported by mkimage for v0 images,
but not for v1 images.
A38x and A39x BootROM supports reading NAND flash page size from v1 image
in the same way as Kirkwood BootROM from v0 image. It it documented in A38x
and A39x Functional Specification.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Linux enumerates MTD partitions in DTB order, while the fdt_add_subnode()
function puts a new subnode at the beginning.
To fix this, put MTD partitions into DTB in reverse order.
Fixes: 92f36c8e74 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
U-Boot SPL binary does not read BIN header arguments, so passing some dummy
values 0000005b and 00000068 has no effect for U-Boot SPL code.
Probably these two values comes from old Marvell DDR training code which
was separated from U-Boot and used it for some configuration.
Seems that two 32-bit values were specified here to ensure SPL code
alignment to 128-bit boundary as it is required e.g. for A370 or AXP
processors. Main kwbimage header is 64-byte long which is aligned to
128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header
arguments is stored in 32-bit number. So for alignment to 128-bit boundary
is needed 64-bit padding which exactly these two 32-bit dummy arguments
provided.
Now when mkimage correctly aligns start of executable code in BIN header to
128-bit boundary, there is no requirement to put dummy argument values into
kwbimage. So remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Important detail is availability of kwbimage BIN header arguments passed
via r0 and r1 registers by BootROM.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
ARM executable code inside the BIN header on some mvebu platforms
(e.g. A370, AXP) must always be aligned with the 128-bit boundary. This
requirement can be met by inserting dummy arguments into BIN header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
ARM executable code inside the BIN header on some mvebu platforms
(e.g. A370, AXP) must always be aligned with the 128-bit boundary. This
requirement can be met by inserting dummy arguments into BIN header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
OF_HOSTFILE is used on sandbox configs only. Although it's pretty
unique and not causing any confusions, we are better of having simpler
config options for the DTB.
So let's replace that with the existing OF_BOARD. U-Boot would then
have only three config options for the DTB origin.
- OF_SEPARATE, build separately from U-Boot
- OF_BOARD, board specific way of providing the DTB
- OF_EMBED embedded in the u-boot binary(should not be used in production
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds the DeployedMode and AuditMode variable
measurement required in TCG PC Client Platform Firmware
Profile Specification.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit adds the UEFI GPT disk partition topology
measurement required in TCG PC Client Platform Firmware
Profile Specification
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Free() checks if its argument in NULL. There is no need for the caller to
do the same.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Correct the test on RNG device presence,when ret is equal to 0,
before to call dm_rng_read function.
Without this patch the RNG device is not used when present (when ret == 0)
or a data abort occurs in dm_rng_read when CONFIG_DM_RNG is activated but
the RNG device is not present in device tree (ret != 0 and devp = NULL).
Fixes: 92fdad28cf ("lib: uuid: use RNG device if present")
CC: Matthias Brugger <mbrugger@suse.com>
CC: Torsten Duwe <duwe@suse.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The padding pss is only supported on u-boot and tools since
commit 2bbed3ff8c ("image: Use Kconfig to enable FIT_RSASSA_PSS on host")
This commit adds the config SPL_FIT_RSASSA_PSS to support
the padding pss in the SPL.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds a check on the padding in the function rsa_verify_key
to avoid using a NULL pointer.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
First two fields are reversed compared to what is expected by the SCMI
specification.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Fixes: 6038884483 ("clk: add clock driver for SCMI agents")
TCG PC Client Platform Firmware Profile Specification
requires to measure the SMBIOS table that contains static
configuration information (e.g. Platform Manufacturer
Enterprise Number assigned by IANA, platform model number,
Vendor and Device IDs for each SMBIOS table).
The device- and environment-dependent information such as
serial number is cleared to zero or space character for
the measurement.
Existing smbios_string() function returns pointer to the string
with const qualifier, but exisintg use case is updating version
string and const qualifier must be removed.
This commit removes const qualifier from smbios_string()
return value and reuses to clear the strings for the measurement.
This commit also fixes the following compiler warning:
lib/smbios-parser.c:59:39: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
const struct smbios_header *header = (struct smbios_header *)entry->struct_table_address;
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Not all SPI flashes and controllers can do continuous transfer longer
than 16 MiB, so perform the DFU read in 16 MiB chunks.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Make sure to (if applicable) flush the D-cache, invalidate I-cache,
and disable MMU and caches before jumping to OPTEE.
This fixes the SDP->SPL->OPTEE boot flow on iMX6Q and most likely on
some other ARM SoCs.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
In multiple places we need the default GUID matching a variable name.
The patch provides a library function. For secure boot related variables
like 'PK', 'KEK', 'db' a lookup table is used. For all other variable
names EFI_GLOBAL_VARIABLE is returned.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
UEFI variable names are typically constants and hence should be defined as
const. Unfortunately some of our API functions do not define the parameters
for UEFI variable names as const. This requires unnecessary conversions.
Adjust parameters of several internal functions to tre UEFI variable names
as const.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The commit 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to
.rodata"") failed to revert the removal of efi_get_public_key_data().
Add back this function and move it under lib/efi_loader so that other
platforms can utilize it. It is now declared as a weak function so that
it can be replaced with a platform-specific implementation.
Fixes: 47a25e81d3 ("Revert "efi_capsule: Move signature from DTB to
.rodata"")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
This reverts commit a7e4f905d2.
The description originally written by Sughosh is still valid
even after the commit 47a25e81d3 ("Revert "efi_capsule: Move signature
from DTB to .rodata"") was applied.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This reverts commit d428e81266.
We have agreed with removing dtb-related stuff from mkeficapsule
command even if the commit 47a25e81d3 ("Revert "efi_capsule: Move
signature from DTB to .rodata"") was applied.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit fixes the following compilation warning
of boottime->install_configuration_table() function.
lib/efi_selftest/efi_selftest_tcg2.c:475:46:
warning: passing argument 1 of ‘boottime->install_configuration_table’
discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
ret = boottime->install_configuration_table(&smbios_guid, dmi);
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Support for the PPC74xx processors has been removed in commit
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")
more than 6 years ago already. So the corresponding README file
can now be removed, too.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Support for PPC4XX processors has been removed. So we should not mention it
in the documentation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Currently the MMC environment driver supports storing redundant environment
only in one eMMC partition at different offsets. This is sub-optimal, since
if this one boot partition is erased, both copies of environment are lost.
Since the eMMC has two boot partitions, add support for storing one copy of
environment in each of the two boot partitions.
To enable this functionality, select CONFIG_SYS_REDUNDAND_ENVIRONMENT to
indicate redundant environment should be used. Set CONFIG_SYS_MMC_ENV_PART
to 1 to indicate environment should be stored in eMMC boot partition. Set
CONFIG_ENV_OFFSET equal to CONFIG_ENV_OFFSET_REDUND, and both to the offset
from start of eMMC boot partition where the environment should be located.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The loads srec loading may overwrite piece of U-Boot accidentally.
Prevent that by using LMB to detect whether upcoming write would
overwrite piece of reserved U-Boot code, and if that is the case,
abort the srec loading.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the environment is stored in eMMC hardware boot partition, the environment
driver first stores the currently selected eMMC boot partition, then does the
requested operation, and then restores the original boot partition settings.
In case the environment operation fails, the boot partition settings are also
restored.
The 'env erase' implementation in the MMC environment driver lacks the path
which restores the boot partition. This could lead to various failure modes,
like the system boots the wrong copy of bootloader etc. Fix this by filling
in the missing restoration path.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
- Add and enable watchdog driver
- Prepare for SYSRESET driven AXP poweroff
- Prepare for SoCs without MMC2
- Some fixes for extending SPL (SPL-DM for RISC-V)
- Some preparations for proper VBUS management
- Fix secure monitor move
Allwinner R329 has no MMC2.
Only include the code of MMC2 if the base address of it is defined.
Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some Allwinner SoCs (e.g. R329) doesn't have a MMC2 controller at all,
and on boards that we do not utilize MMC2, the alias for it is just
useless.
Only include the alias when we specify CONFIG_MMC_SUNXI_EXTRA_SLOT to 2.
Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For some reason, the watchdog was disabled in the H616 device tree. Most
likely this is a copy-paste from the H6 device tree: the H6 watchdog is
disabled because it is broken in some chips. However, there is no
evidence of issues with the H616 watchdog.
Enable the watchdog node so it can be used by the driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
A watchdog helps recover from hangs or failure to boot an OS. It can
also be used by the sysreset framework to intentionally reset the
system. Now that a driver is available, let's enable this functionality
on sunxi boards.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This driver supports the sun4i/sun6i/sun20i watchdog timers.
They have a maximum timeout of 16 seconds.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sunxi clock driver exposes a reset controller, so it selects the
reset controller framework. Ensure that dependency is also satisfied
when building the driver for the SPL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The more recent Allwinner SoCs BootROMs can actually load SPL images
larger than 32KB. We use this on the H616 to fit the extra code needed
for the PMIC into the image, and have provisions in board.c to respect
that larger SPL size when booting from MMC.
However the sunxi SPL SPI loader has a hardcoded load offset of 32KB,
which will fail on the H616.
To fix this, use the same algorithm we use for MMC: if the SPL size is
smaller than 32KB, we use 32KB, otherwise we expect the U-Boot payload
directly after the SPL code.
This prepares for SPI booting with larger SPLs like on the H616.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The AXP PMICs have the ability to power off the system. The existing
code for this is duplicated for each PMIC variant, and uses the legacy
non-DM "pmic_bus" interface. When SYSRESET is enabled, this can all be
replaced with a sysreset device using the DM_PMIC interface.
Since the trigger bit is the same on all PMIC variants, use the register
definitions from the oldest supported PMIC.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The sysreset uclass has an option to provide the do_poweroff() function.
When that option is enabled, the AXP power drivers should not provide
their own definition.
For the AXP305, which is paired with 64-bit systems where TF-A provides
PSCI, there is another possible conflict with the PSCI firmware driver.
This driver can be enabled even if CONFIG_PSCI_RESET is disabled, so
make sure to use the right symbol in the condition.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
A single DM-based driver should be able to support some feature for
several PMIC variants where the interface is the same. For example,
all PMIC variants use the same register bit to trigger poweroff.
However, currently only definitions for a single PMIC are available at
a time. This requires drivers to use #ifdefs and different indentifiers
for each variant they support.
Let's simplify this by making register definitions for all variants
available from the header. Then no preprocessor conditions are needed;
the driver can use the register definition from any variant that
supports the relevant feature.
An exception is the GPIO-related definitions, which do not use unique
identifiers. So for now, keep them like before. They will be cleaned up
along with the GPIO driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This header attempted to avoid multiple inclusion using a header guard.
But the preprocessor symbol was never defined, so the guard had no
effect. Fix this by defining the symbol.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When adding eGON support to mkimage, the struct boot_file_head
definition was moved to its own header. This is the only thing
mksunxiboot needed out of asm/arch/spl.h. Clean up the relative
include by switching to new header.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
commit 1ebfc0c631 ("sunxi: A23/A33/H3: Move sun8i secure monitor to
SRAM A2") attempted to move the secure monitor to SRAM A2. But not all
sun8i SoCs have SRAM A2, so a check was put in for SUNXI_SRAM_A2_SIZE to
avoid breaking the other SoCs.
However, because the header providing SUNXI_SRAM_A2_SIZE was not
included, this unintentionally skipped the new definitions on all SoCs.
Fix this by including the right header.
Fixes: 1ebfc0c631 ("sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The device tree binding provides for getting VBUS state from a device
referenced by phandle, as an optional alternative to using a GPIO. In
U-Boot, where there is no power supply class, this VBUS detection will
be implemented using a regulator device and its get_enable method.
Let's hook this up to the PHY driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Linux driver checks the VBUS detection GPIO first; then VBUS power
supply; then finally assumes VBUS is present. When adding VBUS power
supply support, we want to match that order, so we get the same behavior
in case both a GPIO and a power supply are provided in the device tree.
So refactor the function a bit to remove the early return, and use the
same "assume VBUS is present" final fallback.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Both of these messages log the GPIO number of the ID detection GPIO,
which is not terribly useful, especially in the VBUS detection function.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in
DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will
attempt to load its DTB from the wrong address (after BSS in DRAM).
This change fixes booting with SPL_OF_CONTROL=y.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Errata ERR050568 description says that "Flash access by FlexSPI AHB
command may not work with platform frequency equal to 300 MHz" on
LS1028A.
By default, smaller length reads(equal to RX FIFO size) are done by IP
bus and larger length reads using AHB bus. For adding errata workaround,
use IP bus to read entire flash contents and disable AHB path when
platform frequency is 300Mhz.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add support for disabling AHB bus and read entire flash contents via IP
bus only. Please note, this enables IP bus read using a quirk which can
be enabled directly in device-type data or in existence of an errata
where AHB bus may need to be disabled.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
The mt25qu512a supports 4K or 64K sectors, so adding
SECT_4K to enable 4K sector usage.
Tested on Intel n5x hardware with QSPI carrier card
Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
[jagan: droped Tested-by of patch author and datasheet link]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The original purpose of mtd_erase_callback() in Linux at the time it was
imported to U-Boot, was to inform the caller that erasing is done (since
it was an asynchronous operation).
All supplied callback methods in U-Boot do nothing, but the
mtd_erase_callback() function was (until previous patch) grossly abused
in U-Boot's mtdpart implementation for completely different purpose.
Since we got rid of the abusement, remove the mtd_erase_callback()
function and the .callback member from struct erase_info entirely, in
order to avoid such problems in the future.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
The _erase() method of the mtdpart driver, part_erase(), currently
implements offset shifting (for given mtdpart partition) in a weird way:
1. part_erase() adds partition offset to block address
2. parent driver's _erase() method is called
3. parent driver's _erase() method calls mtd_erase_callback()
4. mtd_erase_callback() subtracts partition offset from block address
so that the callback function is given correct address
The problem here is that if the parent's driver does not call
mtd_erase_callback() in some scenario (this was recently a case for
spi_nor_erase(), which did not call mtd_erase_callback() at all), the
offset is not shifted back.
Moreover the code would be more readable if part_erase() not only added
partition offset before calling parent's _erase(), but also subtracted
it back afterwards. Currently the mtd_erase_callback() is expected to do
this subtracting since it does have to do it anyway.
Add the more steps to this procedure:
5. mtd_erase_callback() adds partition offset to block address so that
it returns the the erase_info structure members as it received them
6. part_erase() subtracts partition offset from block address
This makes the code more logical and also prevents errors in case
parent's driver does not call mtd_erase_callback() for some reason.
(BTW, the purpose of mtd_erase_callback() in Linux is to inform the
caller that it is done, since in Linux erasing is done asynchronously.
We are abusing the purpose of mtd_erase_callback() in U-Boot for
completely different purpose. The callback function itself has empty
implementation in all cases in U-Boot.)
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
The spi_nor_erase() function does not call mtd_erase_callback() as it
should.
The mtdpart code currently implements the subtraction of partition
offset in mtd_erase_callback().
This results in partition offset being added prior calling
spi_nor_erase(), but not subtracted back on return. The result is that
the `mtd erase` command does not erase the whole partition, only some of
it's blocks:
=> mtd erase "Rescue system"
Erasing 0x00000000 ... 0x006fffff (1792 eraseblock(s))
jedec_spi_nor spi-nor@0: at 0x100000, len 4096
jedec_spi_nor spi-nor@0: at 0x201000, len 4096
jedec_spi_nor spi-nor@0: at 0x302000, len 4096
jedec_spi_nor spi-nor@0: at 0x403000, len 4096
jedec_spi_nor spi-nor@0: at 0x504000, len 4096
jedec_spi_nor spi-nor@0: at 0x605000, len 4096
jedec_spi_nor spi-nor@0: at 0x706000, len 4096
This is obviously wrong.
Add proper calling of mtd_erase_callback() into the spi_nor_erase()
function.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reported-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
This check is already done in all callers: mtdcore's mtd_write() /
mtd_erase(), legacy spi_nor_write() / spi_flash_erase(). No reason to do
this here as well.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Check for zero length in the legacy spi_flash_read() /
spi_flash_write() / spi_flash_erase() functions.
On zero length, return 0 immediately, don't call the underlying method.
Rationale:
- these legacy functions call the _read(), _write() and _erase() methods
of struct mtd
- the DM callers of these methods already check for zero length
- making all callers of these methods check for zero length makes it
possible to remove the check from implementations of these _read(),
_write() and _erase() methods
Signed-off-by: Marek Behún <marek.behun@nic.cz>
The cleanup code of spi_nor_erase() function calls write_disable(), but
does not return it's return value even in case of failure. Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
The cleanup code of the spi_nor_erase() function overwrites the ret
variable with return value of clean_bar(), even if the ret variable is
already set. Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
The S25FL256L is a part of the S25FL-L family and has the same feature set
as S25FL128L except the density.
The datasheet can be found in the following link.
https://www.cypress.com/file/316171/download
The S25FL256L is 32MB NOR Flash that does not support Bank Address
Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and
returns ENOTSUPP in setup() hook to avoid further ops.
Tested on Xilinx Zynq-7000 FPGA board.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Pull request for efi-2022-01-rc1
Documentation:
Use Sphinx 3.43.
Move system reset documentation to HTML
UEFI:
Fix linking EFI apps with LLVM
Fix alignment of loaded image
Correct simple network protocol test
Code cleanup
Refactoring of env_get_char() etc.
Update buildman to use gcc-11.1.0
Use in-container toolchain for nokia_rx51 CI test
# gpg: Signature made Thu 21 Oct 2021 09:34:07 PM EDT
# gpg: using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg: issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655 B627 7F17 3A3E 9008 ADE6
Move the following functions from cmd/nvedit.c to env/common.c:
env_set_ulong()
env_set_hex()
env_get_hex()
eth_env_get_enetaddr()
eth_env_set_enetaddr()
env_get()
from_env()
env_get_f()
env_get_ulong()
since these functions are not specific for U-Boot's CLI.
We leave env_set() in cmd/nvedit.c, since it calls _do_env_set(), which
is a static function in that file.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the past the env_match() function was used to match envs with
- name, i.e. string "name"
- variable assignment, i.e. string "name=other_value"
The latter is not the case anymore, since the env_match() function is
now used only in env_get_f(), and so we can simplify the function into
a simple strncmp() with an additional comparison to '='.
Let's do this, and since the resulting function is quite simple, let's
also inline its code into env_get_f().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Copy the value of the found variable into given buffer with memcpy()
instead of ad-hoc code.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently the env_get_f() function's return value behaves weirdly: it
returns the number of bytes written into `buf`, but whether this is
excluding the terminating NULL-byte or including it depends on whether
there was enough space in `buf`.
Change the function to always return the actual length of the value of
the environment variable (excluding the terminating NULL-byte) on
success. This makes it behave like sprintf().
All users of this function in U-Boot are compatible with this change.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
The `nxt` variable actually points to the terminating null-byte of the
current env var, and the next env var is at `nxt + 1`, not `nxt`. So a
better name for this variable is `end`.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since we no longer use env_get_char() to access n-th character of
linearized environment data, but rather access the arrays themselves, we
can convert the iteration to use string pointers instead of position
indexes.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is a relic from the past when environment was read from
underlying device one character at a time.
It is used only in the case when getting an environemnt variable prior
relocation, and the function is simple enough to be inlined there.
Since env_get_char() is being changed to simple access to an array, we
can drop the failing cases and simplify the code (this could have been
done before, since env_get_char() did not fail even before).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function was used by other parts of U-Boot in the past when
environment was read from underlying device one character at a time.
This is not the case anymore.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
This comment is not true since commit 6215bd4c1f ("api: Use hashtable
function for API_env_enum").
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit b2cdef4861 ("env: restore old env_get_char() behaviour")
dropped the .get_char() method from struct env_driver, but left the two
existing implementations (eeprom and nvram) in case someone would use
them by overwriting weak function env_get_char_spec().
Since this was never done in the 3.5 years, let's drop these methods and
simplify the code.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function actually returns:
- the number of bytes written into @buf excluding the terminating
NULL-byte, if there was enough space in @buf
- the number of bytes written into @buf including the terminating
NULL-byte, if there wasn't enough space in @buf
- -1 if the variable is not found
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix up the header's include guard to contain the definition of
dm_priv_to_rw(), which was erroneously added outside of it, by moving
its #endif to the end of the file (i.e. where it belongs). This removes
the risk of compilation errors resulting from the redefinition of that
function where the header might have been (indirectly) included more
than once.
Fixes: cfb9c9b77c ("dm: core: Use separate priv/plat data region")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Cc: Simon Glass <sjg@chromium.org>
While CI has been using gcc-11.1.0 for a long time, we have not updated
buildman to match. Correct this omission.
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of fetching an arm toolchain to use, run the test with the one
that's already in the container image.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
On the iMX7ULP uCOM board, OP-TEE uses the memory region defined by the
maximum DRAM address minus CONFIG_OPTEE_TZDRAM_SIZE, so subtract
CONFIG_OPTEE_TZDRAM_SIZE from the available DRAM size to avoid
conflicts.
Note the OPTEE boot process itself subtracts the DRAM region it
lives in from the memory map passed to Linux.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable the EQoS i.MX driver in defconfig, also enable the PHYLIB
to facilitate the case that only has FEC enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Since we uses the DTS and PHY reset gpio in EQoS driver to do the
reset, remove the duplicated codes from board file.
Signed-off-by: Ye Li <ye.li@nxp.com>
i.MX8MP EVK has two ethernet ports. Add relevant nodes and properties
for EQoS port to the EVK DTS file.
In -u-boot.dtsi, change the u-boot eqos compatible string, add PHY
reset gpio and remove assigned clocks as not supported in CCF.
Signed-off-by: Ye Li <ye.li@nxp.com>
i.MX8MP has two ENET controllers, have to update the function to
enable loading two MAC addresses.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
When boot.bin is configured for secure boot the CSU will disable the
JTAG interface on all cases.
Some boards might rely on this interface for flashing to QSPI in which
case those systems might end up bricked during development.
This commit will restore the interface under CSU control
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Link: https://lore.kernel.org/r/20211013134800.19452-1-jorge@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
As stated in comment above the code, CRS response can be returned to OS
only for 4-byte PCI_VENDOR_ID config read request. So fix the code.
Fixes: 1d7ad68559 ("arm: a37xx: pci: Handle propagation of CRSSVE bit from PCIe Root Port")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We can only select SPL_SKIP_LOWLEVEL_INIT if SPL is enabled, otherwise
we get a warning about unmet dependencies on platforms that don't use
SPL.
Fixes: cf47a8cf8f ("arm: mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT")
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
PCI Bridge which represents Aardvark PCIe Root Port does not have
configurable bars.
So ensure that write operation to bars registers on PCI Bridge is noop and
bars registers always contain zero address which indicates that bars are
unsupported.
After this change U-Boot 'pci bar 0.0.0' command does not show any
allocated bars for PCI Bridge device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Reviewed-by: Stefan Roese <sr@denx.de>
Instead of declaring CONFIG_SPL_DRIVERS_MISC in board config header,
select it in Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Instead of declaring CONFIG_SYS_MALLOC_SIMPLE dependant on
CONFIG_SPL_BUILD in board config header, select
CONFIG_SPL_SYS_MALLOC_SIMPLE in Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
We are printing board information in checkboard() function, which is
called from the default weak implementation of show_board_info().
Rename checkboard() to show_board_info(). This throws away the weak
implementation of show_board_info().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently we always overwrite ethaddrs with those from EEPROM.
In order to allow user to use a cloned MAC address in U-Boot, change the
code so that it sets ethaddr variables only if they aren't set or are
invalid.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently we overwrite ethaddr and eth1addr only if these variables
don't exist.
Better overwrite them even if the env variable exists, but is invalid -
eth_env_get_enetaddr_by_index() checks for validity.
Refactor the code to use a for cycle.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Handle reset button even if we can't configure modules.
This happens if we fail retrieving reset GPIO with which we can reset
the modules.
(Note that this GPIO is different from reset button GPIO.)
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
We are printing board information in last_stage_init(), but U-Boot has
dedicated function, show_board_info(), for this.
Move code which prints board information (board version, serial number,
module topology, ...) to show_board_info().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reorder the definitions in Turris MOX' board config header, drop the
comment relics from when this file was copied, fix indentation.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Move the config option CONFIG_I2C_MV to a Kconfig option
CONFIG_SYS_I2C_MV and move the default definition from config header
files into defconfigs.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Move config options CONFIG_LAST_STAGE_INIT and
CONFIG_DISPLAY_BOARDINFO_LATE to turris_mox_defconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
There are two Linux ioctls which implements tcsendbreak() functionality:
TCSBRK and TCSBRKP
TCSBRK with non-zero parameter implements tcdrain() and with zero parameter
implements tcsendbreak() for duration of 0.25s.
TCSBRKP with zero parameter is same as TCSBRK and with non-zero parameter
implements tcsendbreak() for duration in deciseconds specified by
parameter. TCSBRKP does not have to be provided by older toolchain
versions.
So tcsendbreak() has to either use TCSBRK with zero parameter or TCSBRKP
with any parameter.
Fix code to use TCSBRKP and fallback to TCSBRK with 0.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The function show_eeprom is missing int i if debug is enabled.
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
When compiling U-Boot with ld.lld as the linker, the helloworld EFI app
example fails to link:
LD lib/efi_loader/helloworld_efi.so
ld.lld: error: section: .dynamic is not contiguous with other relro
sections
LLD will always create RELRO program header regardless of target
emulation, whereas BFD may automatically disable it for unsupported
targets. Add -znorelro to disable it explicitly in all cases.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The 'efidebug boot dump' command should not display the VenMedia() device
path node preceding the device path of the initial ram disk.
By letting efi_dp_from_lo() skip the VenMedia() device path node we can
simplify the coding.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Parameter size is never used in function efi_dp_from_lo(). Remove it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of copying a GUID and then using a pointer to the copy for calling
guidcmp(), just pass the pointer to the orginal GUID.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We are ignoring the alignment communicated via the PE/COFF header.
Starting 5.10 the Linux kernel will loudly complain about it. For more
details look at [1] (in linux kernel).
So add a function that can allocate aligned EFI memory and use it for our
relocated loaded image.
[1] c32ac11da3f83 ("efi/libstub: arm64: Double check image alignment at entry")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Vincent Stehlé <vincent.stehle@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When using a file to store UEFI variables we must make sure that secure
boot related variables are not loaded from this file. With commit
9ef82e2947 ("efi_loader: don't load signature database from file")
this has already been implemented for variables defined in the UEFI
specification. As most Linux distributions use Shim we should do the same
for Shim's MOK database.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
It is useful to see some basic EFI info with the command as it forms part
of the information about a board.
Add a hook for this and show the table address as a start.
While here, fix an invalid cast in setup_efi_info(). Note that this
function is using a data structure defined by Linux so we cannot change
it. Also note that ulong is used since this is the standard in U-Boot
(>6k uses), despite there being quite a bit of the more verbose uintptr_t
(930 uses).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The setup routines are called from zimage but don't really belong in the
zimage header. Add a new EFI header to house these. Add comments so it is
clear what the functions do.
Note that these functions are x86-specific. The zimage business is not
used on other architectures.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present this information is stripped when linking. It is useful to keep
it around. Strip it from the .efi files instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Separate this out slightly from the payload, with a new entry.
We might consider renaming EFI PAYLOAD to EFI LOADER, but that would
require quite a lot of file changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This code should never have been added as it builds a new feature on top
of legacy code. This has already been improved with the dependency on BLK.
Add a dependency on DM_ETH also, to avoid needing to deal with this old
code.
Boards which want EFI_LOADER should migrate to driver model first.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Repeatedly receive the packets until the receive buffer is empty.
If the buffer is empty, EFI_SIMPLE_NETWORK_PROTOCOL::Receive()
returns EFI_NOT_READY. We don't need to use the wait_for_event()
every time.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Do not check EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT in packet
receiving loop. This depends on the implementation and not
related to whether the packet can be received or not.
Whether the received packets are available or not is ensured
by wait_for_packet, and that is already done in the loop.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
According to the UEF specification v2.9, the main purpose of the
EFI_SIMPLE_NETWORK_PROTOCOL::GetStatus() is for checking the link
status via EFI_SIMPLE_NETWORK_MODE::MediaPresent.
So this uses net->get_status() for checking the link status before
running network test.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
mkeficapsule is used to create capsules for UEFI firmware update.
To ease inclusion into U-Boot tools packages of Linux distributions we
should add it to the tools-only_defconfig.
Provide dummy values for CONFIG_AVB_BUF_ADDR, CONFIG_AVB_BUF_SIZE to
satisfy Kconfig.
Suggested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The PPC 440 support has been removed in commit 98f705c9ce
("powerpc: remove 4xx support") already, so this file is
certainly not required anymore.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Complete the Sphinx documentation in include/sysreset.h
Add the include to the generated HTML documentation of the U-Boot API.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
For enums documented according to the requirements in chapter
"Structure, union, and enumeration documentation" of
https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html
errors occur with Sphinx 2.4.4 which disappear with Sphinx 3.4.3,
e.g.
/builds/u-boot/custodians/u-boot-efi/doc/api/sysreset:6:
./include/sysreset.h:60:Unknown interpreted text role "enum".
Sphinx 3.4.3 is the version used by Debian in the current release.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add code to build the eMMC variant of the Colibri iMX6ULL, i.e. the
'Colibri iMX6ULL 1GB' which has a eMMC instead of the raw NAND used
on other SKUs.
Related-to: ELB-4056, ELB-4057
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Integrate new Toradex SKU 0062 Colibri iMX6ULL 1GB IT. This commit
basically adjusts three parameters of the RAM settings:
Increase density from 4Gb to 8Gb
Increase ROW address from 15 to 16
Increase tRFC (refresh command time) from 260 to 350
This timing is valid for all Toradex Colibri iMX6ULL SKUs
Related-to: ELB-4055, ELB-4057
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add new i.MX 6ULL and 8M Plus SKUs to ConfigBlock handling:
0062: Colibri iMX6ULL 1GB IT (eMMC)
0063: Verdin iMX8M Plus Quad 4GB IT
0064: Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT
0065: Verdin iMX8M Plus QuadLite 1GB IT
0066: Verdin iMX8M Plus Quad 8GB Wi-Fi / BT
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Restore "Is the module an IT version? [y/N]" for "cfgblock create"
interactive mode command, which was leading to invalid detection
of 0051 Colibri iMX8DX 1GB WB module;
Fixes: a5b5ad4d85 ("toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skus")
Related-to: ELB-3482
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Also take over maintainership of remaining Toradex SoMs as Oleksandr
has left our company.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
CC: Oleksandr Suvorov <cryosay@gmail.com>
After the conversion to binman in commit 8996e6b7c6 ("imx8mm_evk: switch
to use binman to pack images"), it is necessary to flash both flash.bin and
u-boot.itb to get a bootable system. Prior to this commit, only flash.bin
was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single
bootable binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone
(for example, for secure boot purposes).
Also update imx8mm_evk.rst to remove the u-boot.itb copy step.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
NXP used to setup the gpmi clock root from gpmi_clk in early versions
in their downstream BSP. [1]
However on mainline the gpmi clock root was always setup from enfc
since the beginning of the i.MX 6 series SoCs, which is still the same
today. [2]
NXP followed the mainline approach at some point and changed
setup_gpmi_io_clk to setup gpmi clock root from enfc which left faulty
code behind in our board file. [3]
This commit follows the change of NXP as it improves the performance of
the NAND from ~1.2 MiB/s to ~12 MiB/s. [3]
This change was verified to work in recovery-mode and u-boot loaded
from NAND on all four Colibri iMX6ULL SKUs from Toradex.
The frequency used to read the NAND, measured on RE# (Read Enable):
before this patch: 1.4 MHz
after this patch: 22 MHz
in Linux Kernel: 50 MHz
[1] https://source.codeaurora.org/external/imx/uboot-imx/tree/arch/arm/cpu/armv7/mx6/clock.c?h=nxp/imx_v2016.03_4.1.15_2.0.0_ga#n62
[2] commit 23608e23fd ("i.mx: add the initial support for freescale i.MX6Q processor")
[3] https://source.codeaurora.org/external/imx/uboot-imx/commit/?id=7a82a19ceabfb04bbc1591a67c99751748781c7d
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Finally, found the root cause of the issue already once mentioned back
here [2] which caused the following error message during boot:
imx_wdt watchdog@30280000:
pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Turns out while the watchdog node itself was already u-boot,dm-spl its
pinctrl node was not which caused it to be unavailable at that early
stage. Note that any and all other boards I checked also seem to be
missing this. However, I can't judge whether or not they might indeed
need a similar fix or not.
[2] https://marc.info/?l=u-boot&m=161786572422973
Fixes: commit d304e7ace3
("ARM: imx8m: Fix reset in SPL on Toradex iMX8MM Verdin")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable and set preboot var with fdtfile evaluation.
It will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.
This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Variable "kernel_image" is used in boot.scr script only, that sets its
own default value to the constant string @@KERNEL_IMAGETYPE@@ in case
"kernel_image" is not set.
The default name of the kernel image shipped with BSP 5.x is "Image.gz".
Setting kernel_image="Image" as a pre-defined u-boot variable
breaks booting systems with modern versions of boot.scr, whereas
renaming it fixes booting with modern scripts and does not break working
of earlier versions of boot.scr.
While at it also update the copyright period, rather than hard-coding
fdtfile default fdt_board to dev for the Verdin iMX8M Mini and fix its
closing #endif comment.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Prepare for DEK blob encapsulation support through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application
call. U-boot sends and receives the DEK and the DEK blob binaries
through OP-TEE dynamic shared memory.
To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y
Taken from NXP's commit 56d2050f40 ("imx8m: Add DEK blob encapsulation
for imx8m").
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Turns out Microship (formerly Micrel) meanwhile integrated proper
support for the DLL setup on their KSZ9131. Unfortunately, this
conflicts with our previous board code doing that.
Fix this by getting rid of our board code and just relying on the
generic implementation relying on rgmii-id being used as phy-mode.
Fixes: commit c6df0e2ffd
("net: phy: micrel: add support for DLL setup on ksz9131")
Fixes: commit af2d3c91d8
("ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Due to missing configs, CI goes in deadlock until an OOM is tracked. Add
CONFIG_SYS_LOAD_ADDR and replace CONFIG_SYS_EXTRA_OPTIONS with
CONFIG_IMX_CONFIG.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org>
CC: Fabio Estevam <festevam@denx.de>
Even if board can be successfuly built, CI goes in deadlock (see thread
on https://www.mail-archive.com/u-boot@lists.denx.de/msg419663.html).
This is caused by SYS_CONFIG set in header file and because defconfig
for the board is out of sync with Kconfig. As result, buildman goes on
to read from stdin until an OOM is reached.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Frieder Schrempf <frieder.schrempf@kontron.de>
Hex and int Kconfig options are supposed to have defaults. This is so we
can configure U-Boot without having to enter particular values for the
items that don't have specific values in the board's defconfig file.
If this rule is not followed, then introducing a new Kconfig can produce
a loop like this:
Break things (BREAK_ME) [] (NEW)
Error in reading or end of file.
Break things (BREAK_ME) [] (NEW)
Error in reading or end of file.
The continues forever since buildman passes /dev/null to 'conf', and
the build system just tries again. Eventually there is so much output that
buildman runs out of memory.
We can detect this situation by looking for a symbol (like 'BREAK_ME')
which has no default (the '[]' above) and is marked as new. If this
appears multiple times in the output, we know something is wrong.
Add a filter function for the output which detects this situation. Allow
it to return True to terminate the process. Implement this termination in
cros_subprocess.
With this we get a nice message:
buildman --board sandbox -T0
Building current source for 1 boards (0 threads, 32 jobs per thread)
sandbox: w+ sandbox
+.config:66:warning: symbol value '' invalid for BREAK_ME
+
+Error in reading or end of file.
+make[3]: *** [scripts/kconfig/Makefile:75: syncconfig] Terminated
+make[2]: *** [Makefile:569: syncconfig] Terminated
+make: *** [Makefile:177: sub-make] Terminated
+(** did you define an int/hex Kconfig with no default? **)
Signed-off-by: Simon Glass <sjg@chromium.org>
At present buildman does not write any output (to the 'out' and 'err)
files if the build terminates with a fatal error. This is to avoid adding
lots of spam to the logs.
However there are times when this is actually useful, such as when the
build fails for an obscure reason such as a Kconfig loop.
Update the logic to always write the output, so that the user gets a clue
as to what is happening.
Signed-off-by: Simon Glass <sjg@chromium.org>
io read/write may cause wrong result because they may read/write data
from/to register instead of memory. Add 'volatile' to avoid it.
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The following warning is seen in unleashed.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast with uintptr_t.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The following warning is seen in sifive_ddr.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Change to use dev_read_addr_index_ptr().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The following warning is seen in macb.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Change to use dev_read_addr_index_ptr(), or cast with uintptr_t.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
At present there is only devfdt_get_addr_ptr() which only returns
the first <addr, size> pair in the 'reg' property. Add a new API
devfdt_get_addr_index_ptr() to return the indexed pointer.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The following warning is seen in ocores_i2c.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Change to use dev_read_addr_ptr().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit
address and plat->base is a pointer. In a 32-bit build, this causes the
following warning seen when building sifive-gpio.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Change to use dev_read_addr_ptr().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit
address and pd->va is a pointer. In a 32-bit build, this causes the
following warning seen when building sifive-prci.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Change to use dev_read_addr_ptr().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The following warning is seen in cache-sifive-ccache.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Fix by casting it with uintptr_t.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Commit 47d73ba4f4 ("board: sifive: overwrite board_fdt_blob_setup in u-boot proper")
added a board-specific implementation of board_fdt_blob_setup() which
takes a pointer as the return value, but it does not return anything
if CONFIG_OF_SEPARATE is not enabled. This will cause a build warning
seen when testing booting S-mode U-Boot directly from QEMU, per the
instructions in [1]:
board/sifive/unleashed/unleashed.c: In function ‘board_fdt_blob_setup’:
board/sifive/unleashed/unleashed.c:125:1: warning: control reaches end of non-void function [-Wreturn-type]
Return &_end as the default case.
[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
commit 6bf6d81c11 ("clk: fixed_rate: add dummy enable() function")
implemented .enable, so fixed rate clocks can be used where drivers
might call clk_enable(). Implement the .disable op for the same reason;
some drivers, e.g. USB PHYs, may attempt to disable clocks at runtime.
Signed-off-by: Samuel Holland <samuel@sholland.org>
While we intentionally set -std=gnu11 for building host tools, and have
for quite some time, we never dropped -std=gnu99 from tools/Makefile.
This resulted in passing -std=gnu11 ... -std=gnu99 when building, and
gnu99 would win. This in turn would result now in warnings such as:
tools/mkeficapsule.c:25:15: warning: redefinition of typedef 'u32' is a C11 feature [-Wtypedef-redefinition]
typedef __u32 u32;
^
Signed-off-by: Tom Rini <trini@konsulko.com>
This enables the clock controller driver support on TI's SoCs. This will
fix this GPIO issue at boot time:
request_and_set_gpio: Unable to request GPIO_PR1_MII_CTRL
request_and_set_gpio: Unable to request GPIO_MUX_MII_CTRL
request_and_set_gpio: Unable to request GPIO_FET_SWITCH_CTRL
request_and_set_gpio: Unable to request GPIO_PHY_RESET
This issue comes from the fact that the clock controller is not probed.
Enable the TI's clock controller driver support to solve this.
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
At present U-Boot always builds dtc if CONFIG_OF_CONTROL is defined, even
when DTC is provided. The built dtc is not actually used, so this is a
waste of time.
Update the Makefile logic to build dtc only if one is not provided to the
build with the DTC variable. Add documentation to explain this.
This saves about 3.5 seconds of elapsed time on a clean build of
sandbox_spl for me.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need this to make building dtc optional. It makes no sense to build our
own dtc if the system one works correctly.
This reverts commit ddb87a0b40.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bulletproof the default boot command with reset statements in case
any command in the chain would fail. In case a failure were to happen,
the board will reset, increment boot counter and retry the procedure.
In case the failures persist and the boot counter reaches the bootlimit,
U-Boot starts altbootcmd instead of the default bootcmd boot command.
The altbootcmd swaps the default boot partition for the other boot
partition, which is an identical copy or an older copy, and tries
booting from that one instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Build U-Boot in Thumb2 mode for M53Menlo board, this makes better
use of the CPU since the instruction density is higher.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
The board can do primary/secondary boot switching, enable the bmode command.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Move setting CONFIG_BOOTCOMMAND to the mx7ulp_com_defconfig file.
It also allows replacing the default CONFIG_BOOTCOMMAND without
code modification.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add redundant environment support as it is required
by SWUpdate.
While at it, place the CONFIG_ENV_OFFSET at 0x100000 to allow
more headroom.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The previous patches removed OF_PRIOR_STAGE from the last consumers of the
Kconfig option. Cleanup any references to it in documentation, code and
configuration options.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
So let's remove the option in an effort to simplify U-Boot's config and DTB
management, and use OF_BOARD instead.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
On RISC-V some of the boards pick up the DTB from a1 and copy it in their
private gd_t. Apart from that they copy it to prior_stage_fdt_address, if
the Kconfig option is selected, which is unnecessary.
So let's switch the config option for those boards to OF_BOARD and define
the required board_fdt_blob_setup() for them.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
On mvebu this is defined if and only if !ARM64.
Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
This option is only used for
mx23evk_defconfig
mx23_olinuxino_defconfig
which are the only i.MX23 boards.
Add depend on ARCH_MX23 and default to y.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
The default configuration of rk3399 EMMC PHY does not enable the
strobe line, and EMMC controller will got data transmission error
at HS400 mode.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.
Change in V2:
remove change id.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Brand names are supposed to be written with a capital,
so change them all.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the list of mainline U-boot supported Rockchip boards
rk3188 is placed below under the name rv3188. Give back it's
original name and sort the list in alphabetical order.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The 64 bit rk33xx chips don't have the ROCKCHIP_USB2_PHY IP so
drop the configs as they were likely copied over from other
boards during enablement.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove the latest reference of CONFIG_SYS_FLASH_AMD_CHECK_DQ7 in code
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This define was left over from a previous revision, and was never used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.
for example:
doc/uImage.FIT/command_syntax_extensions.txt:
... #ifdef CONFIG_OF_* | ...
cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
FLASH|MMC|FAT|EXT4|\
Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.
With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.
So instead of:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E OSError: [Errno 5] Input/output error
We get:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)
Signed-off-by: Simon Glass <sjg@chromium.org>
Header type is 7-bit number so use all 7 bits when detecting header type
and not only 2 bits.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Header type is 7-bit number so properly clear upper 8th bit which
indicates multifunction device.
And do not try to show bars for unsupported header types.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Function dm_pci_hose_probe_bus() expects that bus is valid PCI device with
Bridge header type (0x01). So add check before touching PCI config space to
prevent misconfiguring some non-standard device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
PCI Rom Address is currently supported only for Normal (0x00) and
Bridge (0x01) header types. Fix code accordingly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This produces a lot of code output which is not very helpful and is quite
annoying to wade through. Use the short format by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rather than duplicate the Ethernet MAC address and carveout updating
code for each board, move it to a common location and make it more
reusable.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.
Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Support multiple reserved memory regions per device to support platforms
that use both a framebuffer and color conversion lookup table for early
boot display splash.
While at it, also pass along the name, compatible strings and flags of
the carveouts.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.
This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The fdtdec_set_carveout() function's parameters are inconsistent with
the parameters passed to fdtdec_add_reserved_memory(). Fix up the order
to make it more consistent.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
When retrieving a given carveout for a device, allow callers to query
the name. This helps differentiating between carveouts when there are
more than one.
This is also useful when copying carveouts to help assign a meaningful
name that cannot always be guessed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
In order make it possible to use fdtdec_get_carveout() in loops, return
FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles
present in the given property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The current code invalidates the range after the read buffer since the
buffer pointer gets incremented in the read loop. Use a temporary
pointer to make sure we have a pristine pointer to invalidate the
correct memory range after read.
Fixes: 704e040a51 ("nvme: Apply cache operations on the DMA buffers")
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
The DS1307 driver was originally based on the DS1337 driver. However,
the functionality of the clock set/get functions has diverged. In the
original DS1337 driver, the set/get functions did the following:
1) Setting the clock ensured the oscillator was enabled.
2) Getting the clock checked and reset the oscillator-stop flag.
The DS1307 does not have an oscillator-stop flag, but the driver tried
(incorrectly) to emulate this by ensuring the oscillator was running. It
really makes no sense to start a stopped clock without setting it.
This patch makes the DS1307 driver behave like the original DS1337
driver again. For the DS1307 itself, this is just a removal of code,
since there is no oscillator-fail bit to check or reset, and the clock
is started when it is set. Since the DS1307 driver can now also be used
for the DS1337 and DS1340 which do have this bit, add code to handle the
oscillator-stop bit in the same was the original DS1337 driver did --
i.e. report that the oscillator had stopped and clear the flag.
This means that setting the date using the date command (which does both
a get and a set) will now clear the oscillator-stop flag in addition to
setting and starting the clock.
The old-style (non-DM) code has not been updated and will be removed in
a future patch. Note that this older code does not support the DS1337,
as there is a separate driver for this. Also note that the original (DM)
code used the wrong control-register address for the DS1337.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
This patch optimizes the commit mentioned below by avoiding running
a set of commands which are useless in the case when
size < mydata->sect_size and sect_count would be 0.
Fixes: 5b3ddb17ba ("fs/fat/fat.c: Do not perform zero block reads if there are no blocks left")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Add a driver for Macronix raw NAND controller.
This patch referred from linux mxic_nand.c. The difference from the
linux version is described here.
1. In order to adapt to the uboot nand framework, add function
binding (cmdfunc, read_byte, read_buf, write_buf).
2. Added parsing command format to use hardware correctly.
3. Remove the incompatible functions of Uboot.
Signed-off-by: Zhengxun Li <zhengxunli@mxic.com.tw>
strlcat() need to be passed the full buffer length. The incorrect call
caused truncation of partition names for fastboot_raw_partition_... and
fastboot_partition_alias_... env lookup to much less than PART_NAME_LEN.
Fixes: 69a7529831 ("fastboot: Fix possible buffer overrun")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
- Disable ATAGS for STM32 MCU and MPU boards
- Disable bi_boot_params for STM32 MCU and MPU boards
- Update stm32-usbphyc node management
- Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards
- Convert some USB config flags to Kconfig for various boards
- Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board
- Remove specific CONFIG_STV0991 flags
- Remove unused CONFIG_USER_LOWLEVEL_INIT flag
- Add ofdata_to_platdata() callback for stm32_spi driver
- Update for stm32f7_i2c driver
- Remove gpio_hog_probe_all() from STM32 MP1 board
- Fix bind command
Signed-off-by: Tom Rini <trini@konsulko.com>
Second set of u-boot-at91 features for the 2022.01 cycle:
This small feature set adds the support for PWM driver for the sama5d2
SoC. It also adds a node in the DT for this SoC.
The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C
deprecation warnings for most 32-bit boards. It also includes some
smaller refactorings that pave the way for more changes, mostly driven
by needing to support the Allwinner RISC-V SoC later on.
Board wise we gain support for the FriendlyARM NanoPi R1S H5 router
board and official Pinetab support.
Build-tested for all 160 sunxi boards, and boot tested on a A64, A20,
H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there
(where applicable).
Add usb_gadget_handle_interrupts(), usb_gadget_register_driver()
and usb_gadget_unregister_driver() to be able to test
binding usb gadget.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix a regression brings by commit 84f8e36f03 ("cmd: bind: allow to
bind driver with driver data")
As example, the following bind command doesn't work:
bind /soc/usb-otg@49000000 usb_ether
As usb_ether driver has no compatible string, it can't be find by
lists_bind_fdt(). In bind_by_node_path(), which called lists_bind_fdt(),
the driver entry is known, pass it to lists_bind_fdt() to force the driver
entry selection.
For this, add a new parameter struct *driver to lists_bind_fdt().
Fix also all lists_bind_fdt() callers.
Fixes: 84f8e36f03 ("cmd: bind: allow to bind driver with driver data")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reported-by: Herbert Poetzl <herbert@13thfloor.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that the last users of legacy I2C (outside of SPL) have been
resolved, we can enable DM_I2C at the sunxi architecture level.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).
Since the i2c-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.
This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pmic_bus functions are used in both SPL (for regulator setup) and
U-Boot proper (for regulator setup, SID access, GPIO, and poweroff).
Currently, pmic_bus conflicts with DM_I2C because it uses the legacy I2C
interface. This commit makes pmic_bus dual-compatible with either the
legacy I2C functions or the newly-added PMIC_AXP driver (which uses
DM_I2C). In turn, this allows platforms to start transitioning to DM_I2C
in U-Boot proper, without breaking boards that still depend on the
legacy I2C interface for other reasons.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Instead of using the SoC symbols to decide the bus type, use whichever
bus driver is actually enabled. This allows collapsing all of the AXP2xx
and AXP8xx variants into one "else" case. It also has the advantage of
falling back to I2C when the other bus drivers are disabled; this works
because all of the PMICs support I2C in addition to other interfaces.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.
There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the p2wi functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants. Move that to the common header, so it can be used by
both interface implementations.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
AXP_PMIC_BUS enables communication with a specific AXP PMIC at a
PMIC-dependent I2C/P2WI/RSB bus address. It is automatically selected
as a dependency of the PMIC driver. It should not be selectable by the
user when no PMIC is chosen.
AXP_GPIO uses the pmic_bus functions, and also depends on a specific
PMIC header to pick up register definitions.
Both of these changes have no impact on any existing configs, since
the code does not compile if the dependencies are not met.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
As it currently stands, selecting that option also requires using it in
some way, which is not the case for one A80 board. Since we have only
three A80 boards in total, we select it their via their defconfigs.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixing up Sunchip_CX-A99 build]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level
Kconfig symbol (not specific to either legacy or DM I2C), whereas the
i2c_init() function is specific to legacy I2C. This change fixes a
build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-by: Andre Przywara <andre.przywara@arm.com>
These PMICs provide some combination of battery charger, fuel gauge,
GPIOs, regulators, and VBUS routing. These functions are represented
as child nodes in the device tree. Add the minimal driver needed to
probe these child devices and provide the DM_PMIC ops.
Enable the driver by default for SoCs that normally pair with a PMIC.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Now that there is a separate symbol to enable DM_PMIC in SPL, update the
the SPL-specific driver symbols to depend on this new option.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Kconfig symbols for two PMIC drivers (PMIC_AS3722 and DM_PMIC_MC34708)
were missing a dependency on DM_PMIC. To fix this inconsistency, and to
keep it from happening again, wrap the driver section with "if DM_PMIC"
instead of using a "depends on DM_PMIC" clause for each driver.
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This fixes the usage of the USB 3.0-capable port under U-Boot as USB
2.0-only port.
Original patch by Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Account for the changes done between merge proposal and the final merge.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The macro called MUX_VAL generates a writel instruction with
semicolon at the end. This table was written to use semicolons,
however one was missed:
MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /* GPIO_4 */
Since the extra semicolon is unnecessary with the use of the macro,
remove all of them, and cleanup whitespace.
Reviewed-by: Wolfgang Denk <wd@denx.de>
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Adam Ford <aford173@gmail.com>
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.
As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for
DDR, PER, and CORE PLLs.
Calculating the required values and setting the registers accordingly
was taken from the set_mpu_spreadspectrum routine contained in the
arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.
In locked condition, DPLL output clock = CLKINP *[M/N]. In case of
SSC enabled, the reference manual explains that there is a restriction
of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts
to select the minimum possible N, the value of M obtained is not
guaranteed to be within the range required. With the new "ti,min-div"
parameter it is possible to increase N and consequently M to satisfy the
constraint imposed by SSC.
Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruhl7x RM, SSC is supported only for LCD
and MPU PLLs, but the PRCM_CM_SSC_DELTAMSTEP_DPLL_XXX and
PRCM_CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field
in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
MPU, DDR, PER, DISP, EXTDEV).
Link: https://lore.kernel.org/r/20210606202253.31649-5-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for LCD
and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).
Link: https://lore.kernel.org/r/20210606202253.31649-4-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
There are five omap3 based boards from LogicPD. Two of them
have added LTO support. Add the remaining three to use LTO.
Signed-off-by: Adam Ford <aford173@gmail.com>
This adds support for the NanoPi R1S H5 board.
Allwinner H5 SoC
512MB DDR3 RAM
10/100/1000M Ethernet x 2
RTL8189ETV WiFi 802.11b/g/n
USB 2.0 host port (A)
MicroSD Slot
Reset button
Serial Debug Port
WAN - LAN - SYS LED
The dts file is taken from Linux 5.14 tag.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add a driver so the clocks/resets for these peripherals (especially I2C,
RSB, and UART) can be enabled using the normal uclass methods.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently, the I2C clocks are configured in the sunxi board code. Add
the I2C clocks to the DM clock driver so they can be enabled from the
DM I2C driver using the normal uclass methods.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Since the beginning, all banks have had space for 32 pins, even when
not all pins were implemented. Let's use a single constant for the GPIO
bank size here, like the GPIO driver is already doing.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This clarifies which callers must be updated to complete the DM_GPIO
conversion.
The only remaining caller of name_to_gpio in generic code is inside the
!DM_GPIO block in cmd/gpio.c. DM_GPIO is always selected on sunxi, so
that code cannot be reached. And after this commit, there are only two
remaining implementations of name_to_gpio.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will
remove the asm/arch/gpio.h header. In preparation, clean up the various
files that include it.
Some files did not contain any GPIO code at all, so this header was
completely unused.
A few files contained only legacy platform-specific GPIO code for
setting up pin muxes. They were left unchanged, as that code will be
completely removed by the DM_PINCTRL migration.
The remaining files contain some combination of DM_GPIO and legacy GPIO
code. For those, switch to including asm/gpio.h (if it wasn't included
already). Right now, this header provides both sets of functions,
because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the
right header to include once the DM_GPIO migration is complete and
GPIO_EXTRA_HEADER is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For some systems, such as the PinePhone, there is no way for the end
user to make sure the system is indeed booting before the boot script is
executed, which takes several seconds. Therefore, it can be useful to
provide early visual feedback as soon as possible.
In order achieve this goal, this patch initializes the status LED (if
configured) in the SPL.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The only caller of this function was the MMC pinmux code, which used it
to parse a string given from a Kconfig symbol. As the Kconfig symbol has
been converted to a Boolean, this function is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Only one board, Yones Toptech BD1078, actually uses a non-default MMC
pinmux. All other uses of these symbols select the default value or an
invalid value. To simplify things, remove support for the unused pinmux
options, and convert the remaining option to a Boolean.
This allows the pinmux to be chosen by the preprocessor, instead of
having the code parse a string at runtime (for a build-time option!).
Not only does this reduce code size, but it also allows this Kconfig
option to be used in a table-driven DM pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The CCU header is only used by the DM drivers, not any platform code.
Its current location adds an artificial dependency on CONFIG_ARM and
ARCH_SUNXI, which will be problematic when adding the CCU driver for
a RISC-V sunxi platform.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The PineTab device-tree is already in u-boot, this commit adds the
corresponding defconfig, based on pinephone_defconfig.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Move CONFIG_VIDEO_MXS from board headers to Kconfig
and drop it from obsolete cfb_console driver.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
After DM_VIDEO conversion the 'vidconsole' is the correct name
for the frame buffer console. 'video' will not work, so update
the description of the config option.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
At present U-Boot has a header file called lz4.h for its own use. If the
host has its own lz4 header file installed (e.g. from the 'liblz4-dev'
package) then host builds will use that instead.
Move the U-Boot file into its own directory, as is done with various
other headers with the same problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Convert pixel values when necessary like we do for 16bpp
framebuffers.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for 30bpp mode where pixels are picked in 32-bit
integers but use 10 bits instead of 8 bits for each component.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
This function is far too long. Before trying to remove #ifdefs, split out
the code that deals with selecting the FDT into a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use boolean variables to deal with the strange #ifdef logic of this
function, so we can remove the #ifdefs.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is far too long. Before trying to remove #ifdefs, split out
the code that deals with selecting the ramdisk into a separate function.
Leave the code indented as it was for easier review. The next patch cleans
this up along with checkpatch violations.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file has a lot of conditional code and much of it is unnecessary.
Clean this up to reduce the number of build combinations.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is only used in one place and does not need to use the
preprocessor. Move it to the C file and convert it to a normal function.
Drop fit_unsupported() since it is not used.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present EFI_SECURE BOOT selects RSA but does not necessarily enable
FIT_SIGNATURE. Mostly this is fine, but a few boards do not enable it,
so U-Boot tries to do RSA verification when loading FIT images, but it
is not enabled.
This worked because the condition for checking the RSA signature is
wrong in the fit_image_verify_with_data() function. In order to fix it
we need to fix this dependency. Make sure that FIT_SIGNATURE is enabled
so that RSA can be used.
It might be better to avoid using 'select' in this situation.
Signed-off-by: Simon Glass <sjg@chromium.org>
We can use the new host_build() function for this, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough and the board code is now in a separate file. Update the only place
where this is used and drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add a host Kconfig for CRC32. With this we can use CONFIG_IS_ENABLED(CRC32)
directly in the host build, so drop the unnecessary indirection.
Add a few more conditions to SPL_CRC32 to avoid build failures as well as
TPL_CRC32. Also update hash.c to make crc32 optional and to actually take
notice of SPL_CRC32.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add a host Kconfig for FIT_RSASSA_PSS. With this we can use
CONFIG_IS_ENABLED(FIT_RSASSA_PSS) directly in the host build, so drop the
forcing of this in the image.h header.
Drop the #ifdef around padding_pss_verify() too since it is not needed.
Use the compiler to check the config where possible, instead of the
preprocessor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add a host Kconfig for FIT_VERBOSE. With this we can use
CONFIG_IS_ENABLED(FIT_VERBOSE) directly in the tools build, so drop the
forcing of this in the image.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add a host Kconfig for OF_LIBFDT. With this we can use
CONFIG_IS_ENABLED(OF_LIBFDT) directly in the tools build, so drop the
unnecessary indirection.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Make use of the host Kconfig for FIT. With this we can use
CONFIG_IS_ENABLED(FIT) directly in the host build, so drop the unnecessary
indirection.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
We can use the __maybe_unused attribute to avoid some of the #ifdefs in
this file. Update the functions accordingly.
Note: The actual hashing interface is still a mess, with four separate
combinations and lots of #ifdefs. This should really use a driver
approach, e.g. as is done with partition drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
At present when building host tools, we force CONFIG_SHAxxx to be enabled
regardless of the board Kconfig setting. This is done in the image.h
header file.
For SPL we currently just assume the algorithm is desired if U-Boot proper
enables it.
Clean this up by adding new Kconfig options to enable hashing on the host,
relying on CONFIG_IS_ENABLED() to deal with the different builds.
Add new SPL Kconfigs for hardware-accelerated hashing, to maintain the
current settings.
This allows us to drop the image.h code and the I_WANT_MD5 hack.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Unfortunately these were removed by mistake. This means that adding hash
support to SPL brings in all software algorithms, with a substantial
increase in code size.
The origin of the problem was renaming them to SPL_FIT_xxx and then these
were removed altogether in a later commit.
Add them back. This aligns with CONFIG_MD5, for example, which has an SPL
variant.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f5bc9c25f3 ("image: Rename SPL_SHAxxx_SUPPORT to SPL_FIT_SHAxxx")
Fixes: eb5171ddec ("common: Remove unused CONFIG_FIT_SHAxxx selectors")
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
some options to enable the various FIT options expected in these tools.
This will ensure that the code builds correctly when CONFIG_TOOLS_xxx
is distinct from CONFIG_xxx.
Drop some #ifdefs which are immediately unnecessary (many more are in
later patches).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
At present we must separately test for the host build for many options,
since we force them to be enabled. For example, CONFIG_FIT is always
enabled in the host tools, even if CONFIG_FIT is not enabled by the
board itself.
It would be more convenient if we could use, for example,
CONFIG_IS_ENABLED(FIT) and get CONFIG_HOST_FIT, when building for the
host. Add support for this.
With this and the tools_build() function, we should be able to remove all
the #ifdefs currently needed in code that is build by tools and targets.
This will be even nicer when we move to using CONFIG(xxx) everywhere,
since all the #ifdef and IS_ENABLED/CONFIG_IS_ENABLED stuff will go away.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> # b4f73886
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
With the new TOOLS_LIBCRYPTO and some other changes, it seems that we are
heading towards calling this a tools build rather than a host build,
although of course it does happen on the host.
I cannot think of anything built by the host which cannot be described as
a tool, so rename this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add a macro to handle manually relocating a pointer. Update the iamge code
to use this to avoid needing #ifdefs.
This also fixes a bug where the 'done' flag was not set.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than adding an #ifdef and open-coding this calculation, add a
helper function to handle it. Use this in the image code.
Signed-off-by: Simon Glass <sjg@chromium.org>
To avoid having #ifdefs in a few functions which are completely different
in the board and host code, create a new image-host.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
To avoid a large #ifdef in the image.c file, move the affected code into
a separate file.
Avoid any style fix-ups for easier review. Those are in the next patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust this function so that preprocessor macros are not needed. With
this, the host build uses more of the same header files as the target
build.
Rather than definining CONFIG_SYS_MALLOC_LEN, add a CONSERVE_MEMORY
define, since that is the purpose of the value.
This appears to have no impact on code size from a spot check of a few
boards (snow, firefly-rk3288, boston32r2el, m53menlo).
Signed-off-by: Simon Glass <sjg@chromium.org>
The gzip API uses the u64 type in it, which is not available in the host
build. This makes it impossible to include the header file.
We could make this type available, but it seems unnecessary. Limiting the
compression size to that of the 'unsigned long' type seems good enough. On
32-bit machines the limit then becomes 4GB, which likely exceeds available
RAM anyway, therefore it should be sufficient. On 64-bit machines this is
effectively u64 anyway.
Update the header file and implementation to use 'ulong' instead of 'u64'.
Add a definition of u32 for the cases that seem to need exactly that
length. This should be safe enough.
Signed-off-by: Simon Glass <sjg@chromium.org>
The zstd implementation prints the error in image_decomp() which is
incorrect and does not match other algorithms. Drop this and let the
caller report the error.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function is full of preprocessor macros. Adjust it to
check for an unsupported algorithm after the switch(). This will allow
us to drop the macros.
Fix up the return-value path and an extra blank line while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing zstd API requires the same sequence of calls to perform its
task. Create a helper for U-Boot, to avoid code duplication, as is done
with other compression algorithms. Make use of of this from the image
code.
Note that the zstd code lacks a test in test/compression.c and this should
be added by the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
When passing a data buffer back from a function, it is not always clear
who owns the buffer, i.e. who is responsible for freeing the memory used.
An example of this is where multiple files are decompressed from the
firmware image, using a temporary buffer for reading (since the
compressed data has to live somewhere) and producing a temporary or
permanent buffer with the resuilts.
Where the firmware image can be memory-mapped, as on x86, the compressed
data does not need to be buffered, but the complexity of having a buffer
which is either allocated or not, makes the code hard to understand.
Introduce a new 'abuf' which supports simple buffer operations:
- encapsulating a buffer and its size
- either allocated with malloc() or not
- able to be reliably freed if necessary
- able to be converted to an allocated buffer if needed
This simple API makes it easier to deal with allocated and memory-mapped
buffers.
Signed-off-by: Simon Glass <sjg@chromium.org>
According to datasheet, the upper four bits are reserved or used for
reflecting the ECC status of the accumulated pages. The error bits
number for the worst segment of the current page is encoded on lower
four bits. Fix it by masking the upper bits.
This same issue has been already fixed in the linux kernel by:
"mtd: spinand: macronix: Fix ECC Status Read"
(sha1: f4cb4d7b46f6409382fd981eec9556e1f3c1dc5d)
Apply the same fix in the U-Boot driver.
Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb492 ("gpio: fixes for gpio-hog support").
And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
DM_GPIO_HOG flag has been replaced by GPIO_HOG flag since a while in
commit 49b10cb492 ("gpio: fixes for gpio-hog support").
And furthermore, gpio_hog_probe_all() is already called in board_r.c.
So gpio_hog_probe() can be removed from stm32mp1.c.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The digital filter related computation are present in the driver
however the programming of the filter within the IP is missing.
The maximum value for the DNF is wrong and should be 15 instead of 16.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Today all the I2C instance point on the same global
variable stm32_i2c_setup according the compatible: i2c_priv->setup =
pointer to the same driver data.
This patch changes this driver data (stm32f7_setup and stm32mp15_setup)
to a const struct and move the timing struct 'setup' as element of i2c
privdata, initialized in stm32_ofdata_to_platdata() with the driver
configuration data.
This patch solves issues when several I2C instance have not the same
clock source or not the same configuration: each timing setup is saved
is the I2C privdata.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Commit ca1a4c8632 ("mvebu: select boot device at SoC level") made it
unnecessary for the A385 boards to have their own kwbimage.cfg but as
the x530 was in flight at the time it was added with it's own
kwbimage.cfg. Remove the custom kwbimage.cfg as the SoC level file is
suitable.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Since the CP1 pinctrl is not properly set in the DTS, there is no
need for setting the pinctrl by writing hardcoded values to the MPP
registers.
So, drop the code relating to that.
Fixes: 87c220d0 ("arm: mvebu: mvebu_armada-8k: Add support for initializing iEi Puzzle-M801 networking")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Current CP1 pinctrl that is set on the Puzzle M801 is incorrect.
CP1 pins are only used for the SMI bus and the MSS I2C, all other
pins are just GPIO-s.
Due to this being set completely wrong, the pinctrl was actually
ended up being hardcoded in the board_early_init_f() step so that
SMI would work.
That is obviously not the right thing to do, so convert the register
hex values that were being written to individual pin modes and set it
in the DTS.
Add the SMI pins to the CP1 MDIO node as otherwise CP1 pinctrl does
not get probed without an consumer.
Fixes: 2ae2b8a2 ("arm: mvebu: Initial iEi Puzzle-M801 support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Select SPL_SKIP_LOWLEVEL_INIT on 32bit Armada platforms via Kconfig,
as this was removed from mach/config.h in a2ac2b96 ("Convert
CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig").
Signed-off-by: Stefan Roese <sr@denx.de>
Fixes: a2ac2b96 ("Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig")
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Behún <kabel@kernel.org>
Cc: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
There were several changes for this structure but the documentation was
not changed at the time. Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Now that PCI Bridge (PCIe Root Port) for Aardvark is emulated in U-Boot,
add support for handling and propagation of CRSSVE bit.
When CRSSVE bit is unset (default), driver has to reissue config
read/write request on CRS response.
CRSSVE bit is supported only when CRSVIS bit is provided in read-only
Root Capabilities register. So manually inject this CRSVIS bit into read
response for that register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Now that PCI Bridge is working for the PCIe Root Port, U-Boot's PCI_PNP
code automatically enables memory access and bus mastering when needed.
We do not need to enable it when setting the HW up.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Aardvark does not have a real PCIe Root Port device on the root bus.
Instead it has PCIe registers of PCIe Root Port device mapped in
internal Aardvark memory space starting at offset 0xc0.
The PCIe Root Port itself is normally available as a PCI Bridge device
on the root bus with bus number zero. Aardvark instead has the
configuration registers of this PCI Bridge at offset 0x00 of Aardvark's
memory space, but the class code of this device is Mass Storage
Controller (0x010400), instead of PCI Bridge (0x600400), which causes
U-Boot to fail to recognize it as a P2P Bridge
Add a hook into the pcie_advk_read_config() / pcie_advk_write_config()
functions to redirect access for root bus from PIO transfer to this
internal Aardvark memory space. This will allow U-Boot to access
configuration space of this PCI Bridge which represents PCIe Root Port.
Redirect access to PCI Bridge registers in range 0x10 - 0x34 to driver's
internal buffer (cfgcache[]). This is because at those addresses
Aardvark has different registers, incompatible with config space of a
PCI Bridge.
Redirect access to PCI Bridge register PCI_ROM_ADDRESS1 (0x38) to
Aardvark internal address for that register (0x30).
When reading PCI Bridge register PCI_HEADER_TYPE, set it explicitly to
value Type 1 (PCI_HEADER_TYPE_BRIDGE) as PCI Bridge must be of Type 1.
When writing to PCI_PRIMARY_BUS or PCI_SECONDARY_BUS registers on this
PCI Bridge, correctly update driver's first_busno and sec_busno
variables, so that pcie_advk_addr_valid() function can check if address
of any device behind the root bus is valid and that PIO transfers are
started with correct config type (1 vs 0), which is required for
accessing devices behind some PCI bridge after the root bus.
U-Boot's PCI_PNP code sets primary and secondary bus numbers as relative
to the configured bus number of the root bus. This is done so that
U-Boot can support multiple PCIe host bridges or multiple root port
buses, when internal bus numbers are different.
Now that root bus is available, update code in pcie_advk_read_config()
and pcie_advk_write_config() functions to correctly calculate real
Aardvark bus number of the target device from U-Boot's bus number as:
busno = PCI_BUS(bdf) - dev_seq(bus)
Stefan: Small fix of header masking as suggested by Pali.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Aardvark reports Disabled and Hot Reset LTSSM states as values >= 0x20.
Link is not up in these states, so fix pcie_advk_link_up() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
These are part of SOC_CONTROL_REG1 register, not PEX_CAPABILITIES_REG.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Remove unused PCIe functions from SerDes code. They are unused and are
duplicated either from generic PCIe code or from pci_mvebu.c.
Remove also unused PCIe macros from SerDes code. They are just obfuscated
variants of standards macros in include/pci.h or in pci_mvebu.c.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This code is trying to parse PCIe config space of PCIe card connected on
the other end of link and then is trying to force 5.0 GT/s speed via Target
Link Speed bits in PCIe Root Port Link Control 2 Register on the local part
of link if it sees that card supports 5.0 GT/s via Max Link Speed bits in
Link Capabilities Register.
The code is incorrect for more reasons:
- Accessing config space of an endpoint card cannot be done immediately.
If the PCIe link is not up, reading vendor/device ID registers will
return all ones.
- Parsing is incomplete, so it can cause issues even for working cards.
Moreover there is no need to force speed to 5.0 GT/s via Target Link Speed
bits on PCIe Root Port Link Control 2 Register. Hardware changes speed from
2.5 GT/s to 5.0 GT/s autonomously when it is supported.
Most importantly, this code does not change link speed at all, since
because after updating Target Link Speed bits on PCIe Root Port Link
Control 2 Register, it is required to retrain the link, and the code for
that is completely missing.
The code was probably needed for making buggy endpoint cards work. Such a
workaround, though, should be implemented via PCIe subsystem (via quirks,
for example), as buggy cards could also affect other PCIe controllers.
Note that this code is fully unrelated to a38x SerDes code and really
should not have been included in SerDes initialization. Usage of magic
constants without names and comments made this SerDes code hard to read and
understand.
Remove this PCIe application code from low level SerDes code. As this code
is configuring only 5.0 GT/s part, in the worst case, it could leave buggy
cards at the initial speed of 2.5 GT/s (if somehow before this change they
could have been "upgraded" to 5.0 GT/s speed even with missing link
retraining). Compliant cards which just need longer initialization should
work better after this change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
PCI device ID is part of the PCIe controller SoC / revision. For Root
Complex mode (which is the default and the only mode supported currently
by U-Boot and Linux kernel), it is PCI device ID of PCIe Root Port device.
If there is some issue with this device ID, it should be set / updated by
PCIe controller driver (pci_mvebu.c), as this register resides in address
space of the controller. It shouldn't be done in SerDes initialization
code.
In the worst case (a specific board for example) it could be done via
U-Boot's weak function board_pex_config().
But it should not be overwritten globally for all A38x devices.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Enabling Common Clock Configuration bit in PCIe Root Port Link Control
Register should not be done unconditionally. It is enabled by operating
system as part of ASPM. Also after enabling Common Clock Configuration it
is required to do more work, like retraining link. Some cards may be broken
due to this incomplete Common Clock Configuration and some cards are broken
and do not support ASPM at all.
Remove this incomplete code for Common Clock Configuration. It really
should not be done in SerDes code as it is not related to SerDes, but to
PCIe subsystem.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Device/Port Type bits of PCIe Root Port PCI Express Capabilities Register
are read-only SAR registers and are initialized according to current mode
configured by PCIe controller. Changing PCIe controller mode (from Root
Complex mode to Endpoint mode or the other way) is possible via PCI
Express Control Register (offset 0x41A00), bit 1 (ConfRoot Complex). This
has to be done in PCIe controller driver (in our case pci_mvebu.c). Note
that default mode is Root Complex.
Maximum Link Speed bits of PCIe Root Port Link Capabilities Register are
platform specific and overwriting them does not make sense. They are set by
PCIe controller according to current SerDes configuration. For A38x it is
5.0 GT/s if SerDes supports appropriate speed.
Maximum Link Width bits of PCIe Root Port Link Capabilities Register are
read-only SAR registers, but unfortunately if this is not set correctly
here, then access PCI config space of the endpoint card behind this Root
Port does not work.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add comments to understand what this magic code is doing.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
SoC Control 1 Register (offset 0x18204) is already defined by macro
SOC_CONTROL_REG1.
Use macro SOC_CONTROL_REG1 instead of macro SOC_CTRL_REG in ctrl_pex.c
code and remove the other definition.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Replace magic register offsets by macros to make code more readable.
Add comments about what this code is doing.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Subroutines in comphy_usb2_power_up() and comphy_sgmii_power_up() functions
may fail. In this case, do not continue execution of current function and
instead jump to the end. Return value in 'ret' variable is already set.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Commit 079b35a261 ("arm: a37xx: pci: Increase PCIe MEM size from 16 MiB
to 127 MiB") increased size of PCIe MEM to 127 MiB, which is the maximal
possible size for allocated 128 MiB PCIe window. PCIe IO size in that
commit was unchanged.
Armada 3720 PCIe controller supports 32-bit IO space mapping so it is
possible to assign more than 64 KiB if address space for IO.
Currently controller has assigned 127 MiB + 64 KiB memory and therefore
there is 960 KiB of unused memory. So assign it to IO space by increasing
IO window from 64 KiB to 1 MiB.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 079b35a261 ("arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB")
Reviewed-by: Stefan Roese <sr@denx.de>
Remove the following STV0991 specific configs:
- CONFIG_STV0991 (never used, only defined in CONFIG_SYS_EXTRA_OPTIONS)
- CONFIG_STV0991_HZ (replaced by generic CONFIG_SYS_HZ)
- CONFIG_STV0991_HZ_CLOCK (replaced by generic CONFIG_SYS_HZ_CLOCK)
This patch allows to reduce the file config_whitelist.txt.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Using the tools moveconfig.py to move the following config in the
defconfig files:
CONFIG_USB_HOST_ETHER
CONFIG_USB_ETHER_ASIX
CONFIG_USB_ETHER_MCS7830
CONFIG_USB_ETHER_SMSC95XX
These option are already migrated since the commit f58ad98a62 ("usb: net:
migrate USB Ethernet adapters to Kconfig") and the commit ae3584498b
("usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ian Ray <ian.ray@ge.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This reverts commit d5d726d3cc,
which breaks boards which ship with multiple SD/eMMC sockets.
This stm32mp1.h config is not used only by the ST reference
boards, but all the other STM32MP1 based boards in U-Boot, so
changes to this stm32mp1.h cannot break the other boards.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add protection on presence and order of the phy node sub node
by using the mandatory reg information.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The vbus-supply is an optional property of sub-node connector node.
and no more in the usb phyc node (in first proposed binding).
This regulator for USB VBUS may be needed for host mode.
See the latest kernel binding for details in
Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml.
usbphyc_port0: usb-phy@0 {
reg = <0>;
phy-supply = <&vdd_usb>;
#phy-cells = <0>;
connector {
compatible = "usb-a-connector";
vbus-supply = <&vbus_sw>;
};
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Import HS400 support for iMX7ULP B0 from the Linux kernel:
2eaf5a533afd ("mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP")
According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET
before any setting of STROBE_DLL_CTRL register.
USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL)
for slave sel value. If this register bits value is 0, it needs
256 ref_clk cycles to update slave sel value. IC suggest to set
bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave
sel value. This will short the lock time of slave.
i.MX7ULP B0 will need more time to lock the REF and SLV, so change
to add 5us delay.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Use the common imx8mm-venice-u-boot.dtsi (dtb for the
'DEFAULT_DEVICE_TREE) so that it inherits things like binman.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use the common imx8mm-venice-u-boot.dtsi (dtb for the
'DEFAULT_DEVICE_TREE) so that it inherits things like binman.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Use the common imx8mm-venice-u-boot.dtsi (dtb for the
'DEFAULT_DEVICE_TREE) so that it inherits things like binman.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
When using SWUpdate, it is necessary to toggle between partitions.
Use the 'mmcpart' environment variable to accomplish that.
Signed-off-by: Fabio Estevam <festevam@denx.de>
After switch to use binman, no need to use the bash script
to check file exsiting or not. And there is bug that
the script will be executed everytime Makefile is used which is
confusing people.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
When creating flash.bin, the hdmi firmware might not be
copied to U-Boot source tree. Then mkimage will fail.
However we are switching to binman, binman will show the
message if the file not there, and create empty file per
i.MX8MQ binman node. So we not fail mkimage here othersize
CI will fail if hdmi firmware not copied here.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The Kontron SoM-Line i.MX8MM (N801x) by Kontron Electronics GmbH is a SoM
module with an i.MX8M-Mini SoC, 1/2/4 GB LPDDR4 RAM, SPI NOR, eMMC and PMIC.
The matching evaluation boards (Board-Line) have 2 Ethernets, USB 2.0, HDMI/LVDS,
SD card, CAN, RS485 and much more.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Remove board_ehci_hcd_init function that is not used with DM_USB
and replace its functionality with device-tree configuraton that treats
USB HUB RST# as a gpio enable for the usbh1 vbus regulator.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Enable LVDS display detection and panel-specific configuration
Make I2C based LVDS detection and configuration model specific:
- not all boards support LVDS connectors; fail detection that do not
support LVDS to avoid misdetecting an I2C device as a display
- GPIO configuration is panel specific; use panel name where needed
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
We configure network phy configuration for internal delay, LED config,
and clock config. If we leave the phy reset gpio defined in dt the
kernel may issue a reset to the phy and break these configs. While some
may be handled by a kernel phy driver, others may not (typically LED
config).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This adds support for i.MX6UL/ULL-based evaluation kits with SoMs by
Kontron Electronics GmbH.
Currently there are the following SoM flavors (SoM-Line):
* N6310: SOM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
* N6311: SOM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND
* N6411: SOM with i.MX6ULL, 512MB RAM, 512MB SPI NAND
And the according evaluation boards (Board-Line):
* N6310-S: Baseboard with SOM N6310, eMMC, display (optional), ...
* N6311-S: Baseboard with SOM N6311, eMMC, display (optional), ...
* N6411-S: Baseboard with SOM N6411, eMMC, display (optional), ...
Currently U-Boot describes i.MX6UL and i.MX6ULL through separate config
options at compile-time. Though the differences are so minor, that for
the scope of these SoMs we just use a single defconfig that is compatible
with both SoCs.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The CONFIG_SPL_MAX_SIZE definition did not account for all areas that
are used by the boot ROM according to the manual, causing boot failures
due to truncated SPL images when actually hitting this limit.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Synchronize the u-boot and kernel imx device trees, using tuned
script from commit c0157bdcafa1 ("ARM: dts: imx: use generic name bus")
Per devicetree specification, generic names are recommended to be
used, such as bus.
i.MX AIPS is an AHB - IP bridge bus, so we could use bus as node
name.
Script:
sed -i "s/\<aips@/bus@/" arch/arm/dts/imx*.dtsi
sed -i "s/\<aips@/bus@/" arch/arm/dts/vf*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm/dts/imx*.dtsi
sed -i "s/\<aips-bus@/bus@/" arch/arm/dts/vf*.dtsi
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Update the mx7ulp wdog disable sequence to avoid potential reset
issue in unlock or refresh sequence. Both sequence need two words
write to wdog CNT register in 16 bus clocks window, if miss the
window, the write will cause violation in wdog and reset the chip.
Current u-boot code is using writel() function which has a DMB
barrier to order the memory access. The DMB between two words write
may introduce some delay in certain circumstance, causing the wdog
reset due to 16 bus clock window requirement.
Also, WDOG1 might have been enabled already depending on FUSE hence
we need to be as close as possible to its reconfiguration timing
requirement of 128 bus clock limit.
This patch replaces writel() function by __raw_writel() to avoid such
issue, and improve to check if watchdog is already disabled or
unlocked.
Signed-off-by: Ye Li <ye.li@nxp.com>
Co-developed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Co-developed-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
The RX8803 and RX8900 register layouts are compatible with the one of
the RV8803. So add these to the compatibles.
The same compatible strings are used and approved in linux kernel.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Add u-boot.dtsi specific to imx6-apalis with a watchdog enabled.
If OP-TEE is loaded by SPL, it may use a watchdog to handle fails of
u-boot running. Enable the watchdog in SPL to use it by OP-TEE.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since c6df0e2ffd ("net: phy: micrel: add support for DLL setup on ksz9131")
the Micrel PHY driver correctly configures the delay register. The Verdin PHY
is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
The BSP platform LmP supports the board NXP iMX8QM MEK. The
kernel size in LmP exceeds 32Mb. Increase the maximum size
of an uncompressed kernel to fix the following error:
Uncompressing Kernel Image
Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
The BSP platform LmP supports the board NXP iMX8M Plus EVK. The
kernel size in LmP exceeds 32Mb. Increase the maximum size
of an uncompressed kernel to fix the following error:
Uncompressing Kernel Image
Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
The BSP platform LmP supports the board NXP iMX8M Mini EVK. The
kernel size in LmP exceeds 32Mb. Increase the maximum size
of an uncompressed kernel to fix the following error:
Uncompressing Kernel Image
Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
The CAAM on IMX7ULP doesn't support public key hardware acceleration
(PKHA), as in other NXP parts. Disable RSA_FREESCALE_EXP for IMX7ULP
too.
Fixed: f4e9ff7135 ("Kconfig: Don't use RSA_FREESCALE_EXP on IMX")
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
binman conversion made flashing flash.bin
and u-boot.itb necessary. Update binman config
to create a single flash.bin image again.
This updates imx8mp_evk and phyCORE-i.MX8MP as they share the
same binman config.
Updated also imx8mp_evk documentation.
Tested on phyCORE-i.MX8MP.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
When purchasing imx8mm-cl-iot-gate it is able to customize the
memory size. It could be 1GB, 2GB and 4GB. We implement
board_phys_sdram_size() to detect the memory size for usage.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Since derivatives are moving to binman from usage of the FIT generator
script, and considering the warning introduced in f4a43d2925
("Makefile: Warn against using CONFIG_SPL_FIT_GENERATOR"), usage of FIT
generator is discouraged.
Current FIT generator also generates broken output, since commit
3f04db891a ("image: Check for unit addresses in FITs") prohibits using
'@' for unit addresses but the generator script still emits the old
sematics.
Remove the generator script and corresponding call in Makefile, all
derivatives should be migrated to binman in order to provide binary
images.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Currently imx8mm-cl-iot-gate_defconfig fails to produce a working boot
binary due to the lack of fip.bin:
" BINMAN all
Image 'main-section' is missing external blobs and is non-functional: blob-ext
Some images are invalid"
To make the build process more consistent with the other i.MX8M targets,
split the defconfig in two:
- imx8mm-cl-iot-gate_defconfig: standard defconfig that only
requires ATF / DDR firmware.
- imx8mm-cl-iot-gate-optee_defconfig: "more advanced" defconfig that
requires ATF / Optee / mbedtls / DDR firmware.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Display hwmon values by default when using the 'gsc' command.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
After the enforcement of DM_MMC the microSD card is not detected. Fix by
correctly configuring the card detect in the devicetree.
Signed-off-by: Andrej Rosano <andrej.rosano@f-secure.com>
Since the mxs_nand_spl has implemented adjust read offset in
nand_spl_load_image, so we don't need to check the bad block in
nand_spl_adjust_offset. Directly return the offset to continue
read by nand_spl_load_image.
Signed-off-by: Ye Li <ye.li@nxp.com>
According to 8MM/MN/MP reference manual, their pad registers only have
4 valid DSE values. And DSE2 and DSE4 are different with current
definitions in iomux-v3.h. Fix the issue to align with manual.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
The SD clock disable is wrapped by MMC_SUPPORTS_TUNING. So it
only works when UHS is enabled. However, in SD initialization the
power cycle does not depends on UHS. But the power cycle needs
disable the SD clock before power down.
So this causes a problem when UHS is not enabled. Some cards can't
become ready (ACMD14 timeout) due to the clock is enabled during
power cycle.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
cherry-picked from NXP code:
719d665a87c6: ("MLK-20467 imx8m: Fix issue for booting signed image through uuu")
which fixes secure boot on imx8m based boards. Problem was
that FIT header and so IVT header too, was loaded to
memallocated address. So the ivt header address coded
in IVT itself does not fit with the real position.
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com>
read the address where the IVT header must sit
from IVT image header, loaded from SPL into
an malloced buffer and copy the IVT header
to this address
May make this dependend on SoC ?
Signed-off-by: Heiko Schocher <hs@denx.de>
add hook function spl_load_simple_fit_fix_load()
which is called after fit image header is loaded.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add new SoC ID for S905Y2 found in Radxa Zero
- pcie_dw_meson: fix usb fail when pci link fails to go up
- Sync Amlogic DT from Linux 5.14
- dwc3-meson-gxl: add AXG compatible
- dts: keep back HW order for MMC devices since change in Upstream Linux
- Cleanup local AXG DT USB nodes now everything is upstream
- distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot
- New Boards:
- Odroid-HC4: a variant of Odroid-C4 with 2 SATA ports (via PCIe-SATA bridge)
- Beelink GS-King X: A variant of the other Beelink board with 2 SATA ports (via USB3-SATA bridge)
- Banana Pi M5: another credit card SBC
- JetHub D1/H1: home automation controllers
- Radxa Zero: another RPi Zero sized SBC
Add documentation bits for the Radxa Zero
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a defconfig for the Radxa Zero SBC, using an Amlogic S905Y2 chip.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: updated u200 MAINTAINERS & add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for new home automation devices.
JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features:
- DIN Rail Mounting case
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 512Mb/1GB DDR3
- 8/16GB eMMC flash
- 1 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- 2 x gpio LEDS
- GPIO user Button
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
- 3 x relay GPIO outputs
- DC source with a voltage of 9 to 56 V / Passive POE
JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features:
- Square plastic case
- Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 1GB DDR3
- 8/16GB eMMC flash
- 2 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support.
- MicroSD 2.x/3.x/4.x DS/HS cards.
- 1 x gpio LED
- ADC user Button
- DC source 5V microUSB with serial console
Patches from:
- JetHub H1
https://lore.kernel.org/r/20210915085715.1134940-4-adeep@lexina.inhttps://git.kernel.org/amlogic/c/abfaae24ecf3e7f00508b60fa05e2b6789b8f607
- JetHub D1
https://lore.kernel.org/r/20210915085715.1134940-5-adeep@lexina.inhttps://git.kernel.org/amlogic/c/8e279fb2903990cc6296ec56b3b80b2f854b6c79
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: removed unused variable value]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
JetHub devices uses its own boot sequence with "rescue" button
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Beelink GS-King X is a variant of the GS King boards but with an internal
USB to SATA bridge and advanced audio features.
[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Odroid-HC4 is a variant of the Odroid-C4 board but with a PCIe-SATA bridge
instead of the USB3 ports.
[narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The SCSI device can be a PCIe adapter, so run pcie enum if enabled.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using
an on-board AHCI PCIe controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Since Linux commmit [1], the order is fixed with aliases, in order to keep the
MMC device order, set it back to HW order in U-Boot dtsi files.
[1] ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs.
This adds it to the compatible list for this driver.
Reported-by: Vyacheslav Bocharov <adeep@lexina.in>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Vyacheslav Bocharov <adeep@lexina.in>
Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"),
dt-bindings clock changes and new meson-g12b-gsking-x.dts,
meson-sm1-bananapi-m5 & odroid-hc4 boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
On Amlogic A311D, when the PCIe link fails disabling the related clocks
makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC.
Mimic the Linux behavior by not considering a link failure a probe failure,
and continue even if the PCIe link is down.
Reported-by: Art Nikpal <email2tema@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add the SOC ID for the S905Y2 to board info, see below for before/after
tested with a Radxa Zero board:
SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2)
SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2)
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
If Coherence Manager were not set in the beginning,
u-boot-spl would sometimes fail to boot to u-boot proper.
Enable CM and I/D cache at the same time in harts_early_init
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
There should be a platform compiled with the new driver.
Enable CONFIG_SYSRESET_SBI for all QEMU boards using SBI.
If you want to test the SBI sysreset driver, disable
CONFIG_SYSRESET_SYSCON.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
bootm_low is used as a base address is used to allocate space for the
FDT blob, initrd, cmdline, etc. when booting Linux. Set the default
value for RISC-V to the start of the first DRAM bank, so platforms can
get their DRAM layout from the device tree, and do not need to define
CONFIG_SYS_SDRAM_BASE.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The no-map property is wrongly skipped if a no-map reserved memory
node follows one without that property. Fix this by not remembering
the absence of a no-map property across loop iterations.
Fixes: d4ea649f17 ("riscv: Provide a mechanism to fix DT for reserved memory")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The RISC-V SBI interface v0.1 provides a function for printing a
character to the console. Even though SBI v0.1 functions are deprecated,
the SBI console is quite useful for early debugging, because it works
without any dcache, memory, or MMIO access in S mode.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In some cases, the best config cannot be used because the VCO would be
out-of-spec. In these cases, we may need to try a worse combination of r/od
in order to find the best representable config. This also adds a few test
cases to catch this and other (possible) unlikely errors.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Having to copy-paste the same 3 lines makes adding new test cases
error-prone. Use a macro.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Everything here sits in a while (true) loop. However, this introduces a
couple of layers of indentation. We can simplify the code by introducing a
single goto instead of using continue/break. This will also make adding
loops in the next patch easier.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The PLL functions take ulong arguments for rate, but still check if that
rate is negative (which is never true). The correct way to handle this is
to use IS_ERR_VALUE (like is already done in k210_clk_set_rate). While
we're at it, we can move the error checking up into the caller of the pll
set/get rate functions. This also protects our other calculations from
using bogus values for rate.
Fixes: 609bd60b94 ("clk: k210: Rewrite to remove CCF")
Reported-by: Coverity Scan <scan-admin@coverity.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in
include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we
will use be a choice statement, enumerating the ones which we have
implemented.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_NAND_FSL_ELBC
CONFIG_NAND_FSL_IFC
Note that a number of PowerPC platforms had previously enabled
CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer
enable the option, reducing the size of a few functions.
Signed-off-by: Tom Rini <trini@konsulko.com>
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward
declaration of struct nand_chip, so do that directly. Then, include
<linux/mtd/rawnand.h> where required directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_NAND_BAD_BLOCK_POS
In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS
as those are the only valid values. Use LARGE as the default as no
in-tree boards use SMALL, but it is possible.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_NAND_LOAD
CONFIG_SYS_NAND_BLOCK_SIZE
CONFIG_SYS_NAND_PAGE_SIZE
CONFIG_SYS_NAND_OOBSIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Typically platforms will define CONFIG_SYS_NAND_PAGE_COUNT based on
CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE. Switch to this
in preparation for migrating CONFIG_SYS_NAND namespace to Kconfig.
Cc: Marek Vasut <marex@denx.de>
Cc: Olaf Mandel <o.mandel@menlosystems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
OEM_REVISION is 32-bit unsigned number. It should be increased only when
changing software version. Therefore it should not depend on build time.
Change calculation to use U-Boot version numbers and set this revision
to date number.
Prior this change OEM_REVISION was calculated from build date and stored in
the same format.
After this change macro U_BOOT_BUILD_DATE is not used in other files so
remove it from global autogenerated files and also from Makefile.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use dev_ function to read the sides and colour to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use dev_ function to read the name and boolean to support a live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These tests currently run in a particular sequence, with some of them
depending on the actions of earlier tests.
Add a check for sandbox and reset to a known state at the start of each
test, so that all tests can run in parallel.
Signed-off-by: Simon Glass <sjg@chromium.org>
The -z tests don't really need to be part of the main set. Separate them
out so we can drop the test setup/cleans functions and thus run all tests
in parallel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the tests to use separate working directories, so we can run them
in parallel. It also makes it possible to see the individual output files
after the tests have completed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Target code and mkimage share the same hashing infrastructure. If one
is wrong, it's very likely that both are wrong in the same way. Thus
testing won't catch hash regressions. This already happened in
commit 92055e138f ("image: Drop if/elseif hash selection in
calculate_hash()"). None of the tests caught that CRC32 was broken.
Instead of testing hash_calculate() against itself, create a FIT with
containing a kernel with pre-calculated hashes. Then check the hashes
produced against the known good hashes.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The generic GPIO flags binding is shared across many drivers, some of
which need their own xlate function. Factor out the flag translation
code from gpio_xlate_offs_flags so it does not need to be duplicated.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Translation of an OF GPIO specifier should fail if the pin offset is
larger than the number of pins in the GPIO bank.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Translation of a pin name to a device+offset should fail if the offset
is larger than the number of pins in the GPIO bank.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This config is only used by three boards with this SOC. Most other
platforms derive this information from devicetree, and are unlikely
to ever need this config.
Moreover, it is confusing when Kconfig asks for this value under
"Support OPTEE images", but does not do anything with the value.
Move it to imx7 for those boards who still make use of it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This value is not used by u-boot, and it should not. The load address
of an OPTEE image is defined by said image. Either a uImage or a FIT
will have a defined load address and entry point. Those values are the
correct ones, not CONFIG_OPTEE_LOAD_ADDR.
Commit f25006b96e ("optee: Add CONFIG_OPTEE_LOAD_ADDR") justifies
this config by requiring its presence in u-boot's .config for other
images as part of a larger build, claiming it is "the best way".
This argument is not persuasive. U-boot's configuration is driven by
platform requirements, not the other way around. It seems more likely
that the argument is conflating tooling issues with Kconfig. Yocto and
buildroot have excellent mechanisms for defining values across the
board (pun intended). u-boot's Kconfig is the wrong place to do it.
Furthermore, it is not "best" for u-boot because it hardcodes a value
which is then not used. In fact the load address that u-boot uses is
the one derived from the OPTEE image.
Confused yet? I sure was. To prevent future confusion, remove
CONFIG_OPTEE_LOAD_ADDR.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
It is no longer used in u-boot. Information about the TZDRAM location
is usually available in the devicetree as "/reserved-memory/" nodes.
Because this isn't used, remove it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The configs TZDRAM_BASE and TZDRAM_SIZE are expected to describe the
memory allocated to the OPTEE region. according to according to commit
c5a6e8bd00 ("optee: Add optee_verify_bootm_image()"). The TZDRAM is
with some limitations, described by "/reserved-memory" nodes in the
devicetree.
Consequently TZDRAM_BASE and TZDRAM_SIZE can point to imaginary
regions which have nothing to do with actual DRAM. They are not used
to configure the hardware or set up the Trust Zone Controller (TZC)
for OP-TEE -- the devicetree values are used instead.
When a valid OP-TEE image does not fall within the region described by
these configs, u-boot will refuse to load it. In fact, it mostly
serves to cause "bootm" to reject perfectly good OP-TEE images.
Ironically, someone has to correctly configure the devicetree for
TZDRAM, then go back and enter the same information in Kconfig for
"bootm". To remedy this, do not use TZDRAM_BASE and TZDRAM_SIZE in the
verification of OPTEE images.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add stub for tee_find_device function when CONFIG_TEE is not activated
to simplify the caller code.
This patch allows to remove the CONFIG_IS_ENABLED(OPTEE) tests
for stm32 platform.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@inaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
The configuration CONFIG_OPTEE is defined 2 times:
1- in lib/optee/Kconfig for support of OPTEE images loaded by bootm command
2- in drivers/tee/optee/Kconfig for support of OP-TEE driver.
It is abnormal to have the same CONFIG define for 2 purpose;
and it is difficult to managed correctly their dependencies.
Moreover CONFIG_SPL_OPTEE is defined in common/spl/Kconfig
to manage OPTEE image load in SPL.
This definition causes an issue with the macro CONFIG_IS_ENABLED(OPTEE)
to test the availability of the OP-TEE driver.
This patch cleans the configuration dependency with:
- CONFIG_OPTEE_IMAGE (renamed) => support of OP-TEE image in U-Boot
- CONFIG_SPL_OPTEE_IMAGE (renamed) => support of OP-TEE image in SPL
- CONFIG_OPTEE (same) => support of OP-TEE driver in U-Boot
- CONFIG_OPTEE_LIB (new) => support of OP-TEE library
After this patch, the macro have the correct behavior:
- CONFIG_IS_ENABLED(OPTEE_IMAGE) => Load of OP-TEE image is supported
- CONFIG_IS_ENABLED(OPTEE) => OP-TEE driver is supported
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This allows to use the watchdog in custom scripts but does not enforce
that the OS has to support it as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
To avoid the need of extra boot scripting on AM65x for loading a
watchdog firmware, add the required rproc init and loading logic for the
first R5F core to the watchdog start handler. In case the R5F cluster is
in lock-step mode, also initialize the second core. The firmware itself
is embedded into U-Boot binary to ease access to it and ensure it is
properly hashed in case of secure boot.
One possible firmware source is https://github.com/siemens/k3-rti-wdt.
The board is responsible for providing the firmware as additional
loadable via the U-Boot fit image. The driver will pick up its location
from /fit-images/k3-rti-wdt-firmware then.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This adds support for the IOT2050 Basic and Advanced devices. The Basic
used the dual-core AM6528 GP processor, the Advanced one the AM6548 HS
quad-core version.
Both variants are booted via a Siemens-provided FSBL that runs on the R5
cores. Consequently, U-Boot support is targeting the A53 cores. U-Boot
SPL, ATF and TEE have to reside in SPI flash.
Full integration into a bootable image can be found on
https://github.com/siemens/meta-iot2050
Based on original board support by Le Jin, Gao Nian and Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Prepares for the addition of the IOT2050 board which is based on the TI
AM65x. The board comes in four variants, Basic and Advanced, each as
product generation 1 (SR1.0) and 2 (SR2.x), so there are separate dts
files needed. Furthermore, the SPL has its own device tree.
Based on original board support by Le Jin, Gao Nian and Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The function prototype for ft_pci_setup is inside fdt_support.h, we need
to include that header.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid W=1 build warnings, declare this function as static, since it
is not used outside of this translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid a build warning with W=1, provide a function prototype for
dm_pciauto_prescan_setup_bridge, which is a non-static function whose
definition is inside pci_auto.c.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The weak definition of pci_skip_dev from drivers/pci/pci_common.c is not
under CONFIG_DM_PCI_COMPAT, and that definition needs a previous
function prototype declaration to avoid W=1 build warnings.
That prototype is not available due to it being under CONFIG_DM_PCI_COMPAT,
so move it outside of that preprocessor block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Writing of individual registers was not functioning
correctly as a 0 'offset' byte under DM-managed
I2C was being appended in front of register we
wanted to access.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
The RX8025/RX8035 does not like having it's time registers
set byte-by-byte in separate I2C transactions.
From the note at the top of the file, it appears
target-dependent workarounds have been used in the
past for this.
Resolve this by setting the time registers in a single
I2C transaction.
As part of this, also ensure the '24/12' flag in the RTC
is reset before writing the date (instead of after), otherwise
the RX8035 will clear the seconds and minutes registers.
Tested on Traverse Ten64 (NXP LS1088A) with RX8035.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
The RX8035 is a newer model from EPSON which is
very similar in operation to the RX8025.
The changes mirror similar ones that will be
in Linux 5.15:
https://lore.kernel.org/all/20210709044518.28769-2-matt@traverse.com.au/
The UBOOT_DRIVER ID has also been corrected, previously
it declared itself as rx8010sj_rtc which is a different driver.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
A search of the tree showed there is only one user
of this driver (soon to be two) - board/socrates
The second user will be the Traverse Ten64 board.
Both these boards have DM_RTC.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
The WDT devices described in the general .dtsi file
should be marked as "disabled" by default.
A WDT should be then enabled in the board specific
.dts file on demands.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
This resyncs the dts files for all of the currently in-tree K3
platforms, along with relevant bindings, with the v5.14 Linux Kernel
release. Of note are that the main-navss/mcu-navss nodes were renamed
to main_navss / mcu_navss and so the u-boot.dtsi files needed to be
updated to match.
Tested on j721e_evm and am65x_evm.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Remove the last non-CONFIG_DM boards, and their related unused code.
- Finish a few partial migrations to Kconfig, and remove some redundant
serial related code.
We enforce that DM_SERIAL will have SYS_MALLOC_F enabled and so
SYS_MALLOC_F_LEN will have a value. Remove the build-time check.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
A number of platforms are still defining CONFIG_SYS_BAUDRATE_TABLE to
the fallback default of "{ 9600, 19200, 38400, 57600, 115200 }", but
with varying whitespace, or were introduced after the default fallback
was added. Use the default table here.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline.
Remove it.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline.
Remove it.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last ARCH_MX25 platform, remove those
references as well.
Cc: Matthias Weisser <weisserm@arcor.de>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last armada100 platform, remove that support
as well.
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last mx35 platform, remove that support as
well.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Add Pali and Marek as another authors of the kwboot utility.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Change kwboot_img_patch() to avoid code repetition of setting errno to
EINVAL.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The kwboot utility does not handle EAGAIN / EBUSY errors, it expects
blocking mode on tty - it uses select() to check if data is available.
Disable non-blocking mode by clearing O_NDELAY flag which was set by
open().
We can't just take O_NDELAY from open(), because it is required there
until the CLOCAL flag is set on the tty.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Function kwboot_tty_recv() has its own handling of read timeout, we
don't need to do set it in tty settings.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Retrieve current terminal settings via tcgetattr(), set to raw mode with
cfmakeraw(), enable receiver via CREAD and ignore modem control lines
via CLOCAL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The tcsetattr() function can return 0 even if baudrate was not changed.
Check whether baudrate was changed to requested value, and in case of
arbitrary baudrate, check whether the set value is within 3% tolerance.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The A38x platform supports more baudrates than just those defined by the
Bn constants, and some of them are higher than the highest Bn baudrate
(the highest is 4 MBd while A38x support 5.15 MBd).
On Linux, add support for arbitrary baudrates. (Since there is no
standard POSIX API to specify arbitrary baudrate for a tty device, this
change is Linux-specific.)
We need to use raw TCGETS2/TCSETS2 or TCGETS/TCSETS ioctls with the
BOTHER flag in struct termios2/termios, defined in Linux headers
<asm/ioctls.h> (included by <sys/ioctl.h>) and <asm/termbits.h>. Since
these headers conflict with glibc's header file <termios.h>, it is not
possible to use libc's termios functions and we need to reimplement them
via ioctl() calls.
Note that the Bnnn constants from <termios.h> need not be compatible
with Bnnn constants from <asm/termbits.h>.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ termios macros rewritten to static inline functions (for type control)
and moved to tools/termios_linux.h ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for uploading the boot image (the data part only) at higher
baudrate than the standard one.
The kwboot utility already has -B option, but choosing other baudrate
than the standard one (115200 Bd) can only work for debug mode, not for
booting the device. The BootROM for kwboot supported platforms (Orion,
Kirkwood, Dove, Discovery, AXP, A37x, A38x, A39x) cannot change the
baudrate when uploading boot image via the Xmodem protocol, nor can it
be configured via strapping pins.
So instead we add this support by injecting baudrate changing code into
the kwbimage v1 header as a new optional binary extension. This code is
executed by BootROM after it receives the whole header. The code sends
the magic string "$baudratechange\0" just before changing the baudrate
to let kwboot know that it should also change it. This is because the
injected code is run as the last binary extension, and we do not want
to loose possible output from other possible binary extensions that
came before it (in most cases this is U-Boot SPL).
We also inject the code before the payload (the data part of the image),
to change the baudrate back to the standard value, in case the payload
does not reset UART.
This change improves boot time via UART significantly (depending on the
chosen baudrate), which is very useful when debugging.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ major refactor ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Explicitly check the image size against size of struct main_hdr_v1.
This way the check is more readable, since the `hdrsz` variable
may semantically contain another value.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The beginning of image data must be sent in a separate xmodem block;
the block must not contain end of header with the beginning of data.
Therefore we need to ensure that the image header size is a multiple of
xmodem block size (which is 128 B).
Read the file into a malloc()ed buffer of enough size instead of
mmap()ing it. (If we are going to move the data, most of the pages will
be dirty anyway.) Then move the payload if header size needs to be
increased.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
These structures are relevant for several other platforms, mention them
all.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add functions kwbheader_size() and kwbheader_size_for_csum().
Refactor code determining header size to use these functions.
Refactor header checksum determining function.
Remove stuff that is not needed anymore.
This simplifies the code a little and fixes one instance of validating
header size meant for checksum instead of whole header size.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Rename this function to kwbimage_version() and don't cast argument if
not needed.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
SPI/NOR kwbimage may have destination address set to 0xFFFFFFFF, which
means that the image is not downloaded to DDR but rather it is executed
directly from SPI/NOR. In this case execution address is set to SPI/NOR
area.
When patching image to UART type, change destination and execution
addresses from SPI/NOR XIP area to DDR area 0x00800000 (which is default
for A38x).
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Some image types have source address in non-bytes unit; for example for
SATA images, it is in 512 B units.
We need to multiply by unit size when patching image type to UART.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
It is not possible to modify image with secure header due to
cryptographic signature.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Create macro
for_each_opt_hdr_v1
and functions
opt_hdr_v1_size(),
opt_hdr_v1_valid_size(),
opt_hdr_v1_ext(),
opt_hdr_v1_first() and
opt_hdr_v1_next()
to simplify iteration over version 1 optional headers.
This prevents ugly code repetition and makes it nicer to read.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
The kwboot_img_patch_hdr() function already decides if header patching
is needed. Always call this function and deprecate the unneeded command
line option `-p`.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
After kwboot sends EOT, BootROM sends back ACK. Add code for handling
this and retry sending EOT on error.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Currently if BootROM fails to respond with ACK/NAK to a xmodem block, we
will be waiting indefinitely for such response.
Make sure that we only wait at most 1 second (blk_rsp_timeo) for ACK/NAK
for each block in case non-xmodem text output is not being expected.
Interpret this timeout expiration as NAK, to try to send the block
again.
On the other hand, if timeout expires without ACK while some non-xmodem
output was already received (DDR training output, for example), we know
that the block was received, since the code is being executed, so in
this case exit with ETIMEDOUT.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When executing header code (which contains U-Boot SPL in most cases),
wait 10s after every non-xmodem character received (i.e. printed by
U-Boot SPL) before timing out.
Sometimes DDR training, which runs in SPL, may be slow.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
There is no separation between output from the code from binary header
(U-Boot SPL in most cases) and subsequent kwboot output.
Print '\n' to make distinguishing these two easier.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When sending image header / image data, BootROM does not send any
non-xmodem text output. We should therefore interpret unknown bytes in
the xmodem protocol as errors and resend current packet. This should
improve the transfer in case there are errors on the UART line.
Text output from BootROM may only happen after whole image header is
sent and before ACK for the last packet of image header is received.
In this case BootROM may execute code from the image, which may interact
with UART (U-Boot SPL, for example, prints stuff on UART).
Print received non-xmodem output from BootROM only in this case.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored & simplified ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This is a non-functional change that should make the code more readable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This change is required to implement other features in kwboot.
Split sending header and data parts of the image into two stages.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When progress was not completed, current terminal position is in progress
bar. So print newline before printing error message to make error message
more readable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Ensure that `pos` is still in range up to the `width` so printing 100%
works also for bigger images. After printing 100% progress reset it to
zero, so that next progressbar can be started.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The compiler complains that we are comparing int with size_t when
compiled with -W.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Function kwboot_xm_makeblock() always returns length of xmodem block. It
is always non-negative and calculated from variable with size_t type. Set
return type of this function to size_t and remove dead code which checks
for negative value.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
When kwboot_tty_recv() fails or times out, it does not set the `c`
variable to NAK. The variable is then compared, while it holds either
an undefined value or a value from previous iteration. Set `c` to NAK so
that the other side will try to resend current block, and remove the
now unnecessary break.
In other failure cases return immediately.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Print kwboot's (U-Boot's) version when printing usage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
There are 3 instances in kwboot.c where we need to write() a given
buffer whole (iteratively writing until all data are written), and 2 of
those instances are wrong, for they do not increment the buffer pointer.
Refactor the code into a new function kwboot_write() where it is fixed.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The `in` variable is set to -1 in kwboot_terminal() if stdin is not a
tty. In this case we should not look whether -1 is set in fd_set, for it
can lead to a buffer overflow, which can be reproduced with
echo "xyz" | ./tools/kwboot -t /dev/ttyUSB0
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
On 32-bit ARM the compiler complains:
tools/kwbimage.c:547: warning: format ‘%lu’ expects argument of type
‘long unsigned int’, but argument 4 has
type ‘unsigned int’
Fix this by using %zu instead of %lu format specifier.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Rebuild our current docker image so that ca-certificates will be updated
and Let's Encrypt issued certificates will work again.
Signed-off-by: Tom Rini <trini@konsulko.com>
Xilinx changes for v2022.01-rc1
zynq:
- Enable capsule update for qspi and mmc
- Update zed DT qspi compatible string
zynqmp:
- Add missing modeboot for EMMC
- Add missing nand DT properties
- List all eeproms for SC on vck190
- Add vck190 SC psu_init
clk:
- Handle only GATE type clock for Versal
watchdog:
- Update versal driver to handle system reset
Existing driver uses generic watchdog mode which generates a signal to
PLM firmware, but the signal cannot be used to reset the system.
Change driver to use window watchdog basic mode. This window watchdog mode
generates a signal to PLM firmware which decides what action to take upon
expiry of watchdog.
Timeout value for xlnx_wwdt_start will come in milli seconds from wdt
framework. Make changes to load count value accordingly.
Add checks before loading the timer for min and max possible values.
Fix authour email id of Ashok Reddy Soma to long email id.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1632808919-8600-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Generate dfu_alt_info setup at runtime for capsule update.
Enabling this feature will help with upgrading boards without remembering
what is where.
The similar change was done for ZynqMP by commit b86f43de0b ("xilinx:
zynqmp: Add support for runtime dfu_alt_info setup").
Code needs to be enabled by CONFIG_SET_DFU_ALT_INFO.
And also enable capsule on disk for RAW firmware images with efidebug
command.
Two indexes are supported for SPL flow. Images can be generated like:
./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin
./tools/mkeficapsule --raw u-boot.img --index 2 capsule2.bin
Then place them to SD card and load them:
load mmc 0 10000000 capsule1.bin && efidebug capsule update -v 10000000
load mmc 0 10000000 capsule2.bin && efidebug capsule update -v 10000000
FSBL flow will also work where only index 1 capsule is used. There
should be enough space for using boot.bin with bitstream too.
Zynq also support multiple boot locations in SPI or MMC but it is not wired
by this patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bea5fc75a87a5971f118b46bab4aa7ca39a629c6.1630061610.git.michal.simek@xilinx.com
i2c changes for 20210928-for-next
- i2c: rcar_i2c: Enable configuring SCL rise and fall times
- i2c: mvtwsi: Add support for DM clocks and resets
- mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface
When mdio_register fails, mdio_free should be called on the mdiodev that
was previously allocated with mdio_alloc.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
If mdio_register fails, it is nice to not leave behind dangling
allocated memory.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass DSA_PORT_NAME_LENGTH - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
These functions can return errors, it's best to catch them and trigger
the driver unwind code path.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
dm_mdio_post_probe used to be vulnerable after truncation, but has been
patched by commit 398e7512d8 ("net: Fix Covarity Defect 244093").
Nonetheless, we can use strlcpy like the rest of the code base now,
which yields the same result.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
strncpy() simply bails out when copying a source string whose size
exceeds the destination string size, potentially leaving the destination
string unterminated.
One possible way to address is to pass MDIO_NAME_LEN - 1 and a
previously zero-initialized destination string, but this is more
difficult to maintain.
The chosen alternative is to use strlcpy(), which properly limits the
copy len in the (srclen >= size) case to "size - 1", and which is also
more efficient than the strncpy() byte-by-byte implementation by using
memcpy. The destination string returned by strlcpy() is always NULL
terminated.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently the init_phy function may overwrite the priv->interface
property, since it calls tsec_get_interface which tries to determine it
dynamically based on default register values in ECNTRL.
Let's do that only if phy-connection-type happens to not be defined in
the device tree.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The felix driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
The enetc driver runs only on NXP LS1028A, which most definitely does
not support the parallel 10G interface, just USXGMII, and that only up
to 2.5Gbps (toned down from 10 Gbps via symbol replication).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
After the discussion here:
https://lore.kernel.org/netdev/20210603143453.if7hgifupx5k433b@pali/
which resulted in this patch:
https://patchwork.kernel.org/project/netdevbpf/patch/20210704134325.24842-1-pali@kernel.org/
and many other discussions before it, notably:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/1512016235-15909-1-git-send-email-Bhaskar.Upadhaya@nxp.com/
it became apparent that nobody really knows what "SGMII 2500" is.
Certainly, Freescale/NXP hardware engineers name this protocol
"SGMII 2500" in the reference manuals, but the PCS devices do not
support any "SGMII" specific features when operating at the speed of
2500 Mbps, no in-band autoneg and no speed change via symbol replication
. So that leaves a fixed speed of 2500 Mbps using a coding of 8b/10b
with a SERDES lane frequency of 3.125 GHz. In fact, "SGMII 2500 without
in-band autoneg and at a fixed speed" is indistinguishable from
"2500base-x without in-band autoneg", which is precisely what these NXP
devices support.
So it just appears that "SGMII 2500" is an unclear name with no clear
definition that stuck.
As such, in the Linux kernel, the drivers which use this SERDES protocol
use the 2500base-x phy-mode.
This patch converts U-Boot to use 2500base-x too, or at least, as much
as it can.
Note that I would have really liked to delete PHY_INTERFACE_MODE_SGMII_2500
completely, but the mvpp2 driver seems to even distinguish between SGMII
2500 and 2500base-X. Namely, it enables in-band autoneg for one but not
the other, and forces flow control for one but not the other. This goes
back to the idea that maybe 2500base-X is a fiber protocol and SGMII-2500
is an MII protocol (connects a MAC to a PHY such as Aquantia), but the
two are practically indistinguishable through everything except use case.
NXP devices can support both use cases through an identical configuration,
for example RX flow control can be unconditionally enabled in order to
support rate adaptation performed by an Aquantia PHY. At least I can
find no indication in online documents published by Cisco which would
point towards "SGMII-2500" being an actual standard with an actual
definition, so I cannot say "yes, NXP devices support it".
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
To avoid a warning with W=1 about this function not having a previous
prototype, declare it as static, because it is not used outside of this
translation module.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
"dev" and "dsa_pdata" are unused inside dsa_port_of_to_pdata.
"dsa_priv" is unused inside dsa_port_probe.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
While adding the logic for DSA to register a fixed-link PHY for the CPU
port, I forgot to pass it to the .port_disable method too, just
.port_enable.
Bug had no impact for felix_switch.c, due to the phy argument not being
used, but ksz9477.c does use it => NULL pointer dereference.
Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
NXP Legal insists that the following are not fine:
- Saying "NXP Semiconductors" instead of "NXP", since the company's
registered name is "NXP"
- Putting a "(c)" sign in the copyright string
- Putting a comma in the copyright string
The only accepted copyright string format is "Copyright <year-range> NXP".
This patch changes the copyright headers in the networking files that
were sent by me, or derived from code sent by me.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Make sure that the link status returned by phy_startup() is propagated
to the .start() method of struct eth_ops.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
It is an unfortunate reality that some PHY settings done by U-Boot
persist even after the PHY is reset and taken over by Linux, and even
more unfortunate that Linux has come to depend on things being set in a
certain way.
For example, on the NXP LS1028A-RDB, the felix switch ports are
connected to a VSC8514 QSGMII PHY. Between the switch port PCS and the
PHY, the U-Boot drivers enable in-band auto-negotiation which makes the
copper-side negotiated speed and duplex be transmitted from the PHY to
the MAC automatically.
The PHY driver portion that does this is in vsc8514_config():
/* Enable Serdes Auto-negotiation */
phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
PHY_EXT_PAGE_ACCESS_EXTENDED3);
val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON);
val = val | MIIM_VSC8574_MAC_SERDES_ANEG;
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON, val);
The point is that in-band autoneg should be turned on in both the PHY
and the MAC, or off in both the PHY and the MAC, otherwise the QSGMII
link will be broken.
And because phy_config() is currently called at .port_enable() time, the
result is that ports on which traffic has been sent in U-Boot will have
in-band autoneg enabled, and the rest won't.
It can be argued that the Linux kernel should not assume one way or
another and just reinitialize everything according to what it expects,
and that is completely fair. In fact, I've already started an attempt to
remove this dependency, although admittedly I am making slow progress at
it:
https://patchwork.kernel.org/project/netdevbpf/cover/20210212172341.3489046-1-olteanv@gmail.com/
Nonetheless, the sad reality is that NXP also has, apart from kernel
drivers, some user space networking (DPDK), and for some reason, the
expectation there is that somebody else initializes the PHYs. The kernel
can't do it because the device ownership doesn't belong to the kernel,
so what remains is for the bootloader to do it (especially since other
drivers generally call phy_config() at probe time). This is a really
weak guarantee that might break at any time, but apparently that is
enough for some.
Since initializing the ports and PHYs at probe time does not break
anything, we can just do that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
Some drivers might want to execute code for each port at probe time, as
opposed to executing code just-in-time for the port selected for
networking.
To cater to that use case, introduce a .port_probe() callback method
into the DSA switch operations which is called for each available port,
at the end of dsa_port_probe().
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
This snippet of code has a bothering "if (...) return 0" in it which
assumes it is the last piece of code running in dsa_port_probe().
This makes it difficult to add further code at the end of dsa_port_probe()
which does not depend on MAC address stuff.
So move the code to a dedicated function which returns void and let the
code flow through.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
Non DM builds fail with the following error:
drivers/net/tsec.c:641:24: error: 'tsec_get_interface' defined but not used [-Werror=unused-function]
641 | static phy_interface_t tsec_get_interface(struct tsec_private *priv)
Fix that.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
In commit b24bb99d cp110 configuration initially done in u-boot
was removed and delegated to atf firmware as smc call.
That commit didn't account for later introduced in d13b740c SATA invert polarity support.
This patch adds support of passing SATA invert polarity flags to atf
firmware during the smc call.
Signed-off-by: Denis Odintsov <shiva@mail.ru>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
After getting MTD device via get_mtd_device_nm(), we need to put it with
put_mtd_device(), otherwise we get
Removing MTD device #0 (mx25l6405d) with use count 1
before booting kernel.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
TCG EFI Protocol Specification defines the number_of_algorithms
field in spec ID event to be equal to the number of active
algorithms supported by the TPM device. In current implementation,
this field is populated with the count of all algorithms supported
by the TPM which leads to incorrect spec ID event creation.
Similarly, the algorithm array in spec ID event should be a variable
length array with length being equal to the number_of_algorithms field.
In current implementation this is defined as a fixed length array
which has been fixed.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
CC: Masahisa Kojima <masahisa.kojima@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The devicetree binding files are in their own directory and use a simple
text format. Add a link for the binding for the /config node, since it
is otherwise hard to find.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since Albert Aribaud is not maintaining anymore the LaCie Ethernet Disk
mini V2 board, then I am taking over.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr
support").
Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
I am taking over responsibility for the GE board from Sebastian Reichel.
Updating the MAINTAINERS files to reflect this.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
As the lastest spear directories are removed, delete the associated entry
in the MAINTAINERS file:
- arch/arm/cpu/arm926ejs/spear/
- arch/arm/include/asm/arch-spear/
Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Output like the following is quite irritating:
=> bootefi hello
Scanning disk mmc2.blk...
No valid Btrfs found
Bad magic number for SquashFS image.
** Unrecognized filesystem type **
Scanning disk mmc1.blk...
No valid Btrfs found
Bad magic number for SquashFS image.
** Unrecognized filesystem type **
Scanning disk mmc0.blk...
No valid Btrfs found
Bad magic number for SquashFS image.
** Unrecognized filesystem type **
Albeit a whole disk may be formatted with a filesystem in most cases
a partition table is used and the whole disk (partition number 0) doesn't
contain a filesytem. Some partitions may only contain a blob. Not seeing a
filesytem on the whole disk or on any partition is only worth a debug
message.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Our mailmapper script required Python 2 which is no longer maintained.
A main difference when converting to Python 3 is that byte strings are not
character strings. So add conversion and skip over conversion errors.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tpm test cases relies on tpm device setup. Provide an environment
variable "env__tpm_device_test_skip = True" to skip the test case
if tpm device is not present.
Only needed will have to add variable to the py-test framework.
Test runs successfully even this variable is absent.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The KBUILD_BASENAME contains just the name of the compiled module,
in this case 'sequencer', rather than a full path to the compiled
file. Use it to prevent pulling the full path into the U-Boot binary,
which is useless and annoying.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
The SPI NOR bus mode is 0 on this system, update it accordingly.
Increase frequency to 40 MHz and enable SFDP parsing, since the
flashes on this system support that and it is a huge performance
improvement.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
This adds support for the DWC_sub31 controllers such as those
found on Apple's M1 SoC. This version of the controller
seems to work fine with the existing driver.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Allow using different PHY interfaces for multiple USB controllers. When no
value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay
compatible with current board configurations.
This also adds support for the HSIC mode of the i.MX7.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
The MXC_EHCI_MODE_ definitions are redundant. Replace MXC_EHCI_MODE_SERIAL
with the equivalent PORT_PTS_SERIAL.
Only the zmx25 platform is affected.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Pine H64 and Orange Pi 3 both provide a USB3 type A port.
Enable it in U-Boot.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some platforms, like the Allwinner H6, do not have a separate glue layer
around the dwc3. Instead, they rely on the clocks/resets/phys referenced
from the dwc3 DT node itself. Add support for enabling the clocks/resets
referenced from the dwc3 DT node.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Resetting an XHCI controller inside xhci_register undoes any register
setup performed by the platform driver. And at least on the Allwinner
H6, resetting the XHCI controller also resets the PHY, which prevents
the controller from working. That means the controller must be taken out
of reset before initializing the PHY, which must be done before calling
xhci_register.
The logic in the XHCI core was added to support the Raspberry Pi 4
(although this was not mentioned in the commit log!), which uses the
xhci-pci platform driver. Move the reset logic to the platform driver,
where it belongs, and where it cannot interfere with other platform
drivers.
This also fixes a failure to call reset_free if xhci_register failed.
Fixes: 0b80371b35 ("usb: xhci: Add reset controller support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This driver is needed for XHCI to work on the Allwinner H6 SoC. The
driver is copied from Linux v5.10.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.
For doing this, node parameter type must be ofnode.
First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().
So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The controller may need to have clocks/resets enabled for it to work.
Add support for this. Since the clocks/resets are optional on some
platforms (per the device tree binding), do not prevent probing the
controller if they are missing.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The Linux i2c driver supports i2c-scl-rising-time-ns,
and i2c-scl-falling-time-ns, but U-Boot uses hard-coded values
for these values.
Update the calculation by fetching them from the device tree if
present and use the previous values as the default if they are
missing.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
We have individual SOC symbols for each keystone 2 platform. Use the
existing CONFIG_ARCH_KEYSTONE rather than CONFIG_SOC_KEYSTONE to
encompass all of the keystone families.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
To do this, we also introduce CONFIG_HAS_CONFIG_OMAP_EHCI_PHYn_RESET_GPIO
options to get setting the GPIO number.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have one places that uses this symbol and CONFIG_TARGET_OMAPL138_LCDK
works equally well, switch to that.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the main option for handling drivers/dma/keystone_nav* to Kconfig,
and enable it by default. All of the sub-symbols are not configurable,
so remove them from the CONFIG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
The COFNIG_KEYSTONE_RBL_NAND option is always enabled for the driver on
keystone platforms, but not older davinci platforms. Use def_bool for
the symbol. For CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE, it's only used within
the driver and derived from another symbol, so remove CONFIG from the
name. Finally, CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE is a bit more fixed.
For now, use the value directly. Long term, as part of DM'ifying NAND,
this should come from the device tree.
Signed-off-by: Tom Rini <trini@konsulko.com>
Since cm_t35 was removed, CONFIG_CM_T3X does not exist. This lets us
simplify the code in board/compulab/common/eeprom.c a bit.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point in time, all platforms that had previously used
drivers/usb/phy/omap_usb_phy.c have been migrated to DM and related
options. Remove this now unused code and some related unused defines.
Signed-off-by: Tom Rini <trini@konsulko.com>
This is only used in the aemif driver that is otherwise currently
keystone2 centric. Moving forward, if this is applicable to some other
platform then such base addresses should be able to be obtained via the
device tree. Use KS2_AEMIF_CNTRL_BASE directly now rather than
indirectly.
Signed-off-by: Tom Rini <trini@konsulko.com>
- At this point there are a large number of Beaglebone boards, refer to
them as a family rather than a growing list.
- Reword customization as we're largely Kconfig-oriented now.
- Remove the NOR section as the relevant defconfigs have long been
removed and the general support was not updated.
Signed-off-by: Tom Rini <trini@konsulko.com>
There are two duplicated declarations for ft_cpu_setup() and
ft_pci_setup().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Some PCIe controller's read_config() method support indicating error
directly via return value, but some cannot distinguish all-ones (or
all-zeros) read response from an error.
The current code in pci_bind_bus_devices() interprets all-ones /
all-zeros in PCI_VENDOR_ID register as "nothing connected", and
continues the cycle, but an error returned via return value breaks the
cycle.
This is wrong for the PCIe controllers which return this error via
return value.
Handle all errors when reading PCI_VENDOR_ID the same way.
This fixes enumeration of PCI devices for example when there is a PCI
bridge connected behind another PCI bridge and not all ports are
connected to a device, and the controller (for example Aardvark)
translates the UR error (Unsupported Request) as -EOPNOTSUPP.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The cpu nodes in arch/sandbox/dts/test.dts should conform to the devicetree
specification:
* property device_type must be set to "cpu"
* the reg property must be provided
* the cpu nodes must have an address
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for accessing GPIOs using of-plata. This uses the same
mechanism as for clocks, but allows use of the xlate() method so that
the driver can interpret the parameters.
Update the condition for GPIO_HOG so that it is not built into SPL,
since it needs SPL_OF_REAL which is not enabled in sandbox_spl.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is available but not exported. More generally it does not
really work as intended.
Reimplement it and add a sandbox test too.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is actually a misnomer now, since the phandle info may contain
a driver_info index or a udevice index. Rename it to use the word
'phandle', which seems more accurate. Add a comment while we are here.
Also add a test for this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Convert some of these occurences to C code, where it is easy to do. This
should help encourage this approach to be used in new code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we have a 'positive' Kconfig option, use this instead of the
negative one, which is harder to understand.
Signed-off-by: Simon Glass <sjg@chromium.org>
The condition to indicate whether there is a runtime devicetree available
is OF_CONTROL && !OF_PLATDATA. This is a bit unweidly and is repeated in
a lot of places.
Add a new OF_REAL Kconfig which provides this information directly.
Note: This is similar in effect to LIBFDT. We might consider dropping
LIBFDT and using this instead, but this is left for now as we also have
OF_LIBFDT_OVERLAY which it would not make sense to change.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current API is outdated as it requires a devicetree pointer.
Move these functions to use the ofnode API and update this globally. Add
some tests while we are here.
Correct the call in exynos_dsim_config_parse_dt() which is obviously
wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
When printing full help output from a tool, we should be able to handle
a PAGER variable which includes arguments, e.g. PAGER='less -F'.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Collect the code for printing the full help message of patman, buildman
and binman into a single function in patman.tools.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
vexpress_ca9x4 is seemingly the only board except for qemu_arm which
is able to run U-Boot correctly, using the `-M vexpress-a9` option to
QEMU. Building for qemu_arm and running qemu-system-arm with the `-M
virt` argument has a number of downsides, most importantly that it
only supports virtio storage drivers. This significantly reduces its
usefulness in testing memory card and Flash solutions, especially when
the tested images are from a third party source.
So therefore we reintroduce the vexpress_ca9x4 board in this commit,
with the explicit goal of using it with QEMU.
A number of differences to note from the original:
* Since the board was apparently unmaintained, I have now set myself
as the maintainer.
* The board has been converted to use the driver model, which was the
reason it was removed in the first place.
* The vexpress_ca15_tc2 and vexpress_ca5x2 boards, which were removed
in the same commit, are not necessary for the QEMU use case, and
have been omitted.
* An `mmc0` alias was introduced in the dts file. The mmc is not
detected correctly without this, now that it's based on the device
tree instead of the board's init function.
* A couple of other nodes were removed because they were problematic
when trying to run the UEFI bootmgr. Once again, the primary use
case here is QEMU, and these nodes are not needed for that to work.
* Unnecessary board init code has been removed, thanks to driver model
and device tree.
* `CONFIG_OF_EMBED` has been enabled. I know this goes against
recommended practice, but there doesn't seem to be any other way to
pass the dtb to U-Boot in the QEMU scenario. Using the -dtb argument
does not work, I suppose because U-Boot doesn't use the same
mechanics as the kernel when it's booting.
* Load addresses have been changed to fit QEMU use case.
People wanting to get a more detailed, yet somewhat isolated, diff
between this and the original, can run this command:
git diff c6c26a05b89f25a06e7562f8c2071b60fd0c9eac~1 -- \
$( git diff-tree --diff-filter=A -r --name-only HEAD~1 HEAD)
(Make sure to either check out this commit first, or replace HEAD with
the commit ID of this commit)
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
Simplify the bootm and the spl code by using the new config
CONFIG_SUPPORT_PASSING_ATAGS.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch enables the use of the optimized memset(), memmove() &
memcpy() versions recently added on ARM64.
Please note that these optimized functions are now only enabled for
recent GCC versions (>= 9.4), as earlier GCC versions throw these
errors:
aarch64-linux-ar: warning: arch/arm/lib/memset-arm64.o: unsupported GNU_PROPERTY_TYPE (5) type: 0xc0000000
...
Signed-off-by: Stefan Roese <sr@denx.de>
[trini: Make this default to off as it causes problems on some platforms still]
Signed-off-by: Tom Rini <trini@konsulko.com>
The optimized memset uses the dc opcode, which causes problems when the
cache is disabled. This patch adds a check if the cache is disabled and
uses a very simple memset implementation in this case. Otherwise the
optimized version is used.
Signed-off-by: Stefan Roese <sr@denx.de>
Ported from https://github.com/ARM-software/optimized-routines
These files are included from this repository, including the latest
git commit ID:
string/aarch64/memcpy.S: afd6244a1f8d
string/aarch64/memset.S: e823e3abf5f8
string/asmdefs.h: e823e3abf5f8
Note that memmove is also handled by the memcpy function.
Please note that when adding these optimized functions as default memset
memcpy functions in U-Boot, U-Boot fails to boot on the LX2160ARDB.
After the initial ATF output, no U-Boot output is shown on the serial
console. Some exception is triggered here in the very early boot process
as some of the assembler opcodes need the caches to be enabled.
Because of this, a follow-up patch will add a check to use a simple
non-optimized memset for the "cache disabled" case.
Note:
I also integrated and tested with the Linux versions of these optimized
functions. They are similar to the ones now integrated but these ARM
versions are still a small bit faster.
Signed-off-by: Stefan Roese <sr@denx.de>
- Rework lmb reservation so we have common code for all arches to use
- armv8 cache.S cleanups, crc32 speedup
- ENV_IS_NOWHWERE, pci io/memory base configuration fixes
Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved
and should be zero. So do not set them to non-zero value.
Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers
contain information if 64-bit memory addressing is supported. So preserve
this information when overwriting these registers.
Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information
if 32-bit io addressing is supported. So preserve this information and do
not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and
PCI_IO_LIMIT_UPPER16 registers) when it is unsupported.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME
variables from defconfig.
This is because in board/mediatek/mtXXXX/Kconfig this value was override
by default due to the if CONFIG_TARGET_MTXXXX condition.
Merge all the Kconfigs to the mach-medatek/Kconfig.
This way:
- we only define SYS_{SOC,VENDOR} once
- all board definitions are in a single place, simplifying the build logic.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
The arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() implementations
are all mostly the same, except for a couple of details. Implement a
generic arch_lmb_reserve_generic() function which can be parametrized
enough to cater for those differences between architectures. This can
also be parametrized enough so it can handle cases where U-Boot is not
relocated to the end of DRAM e.g. because there is some other reserved
memory past U-Boot (e.g. unmovable firmware for coprocessor), it is not
relocated at all, and other such use cases.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Hai Pham <hai.pham.ud@renesas.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even
if CMD_BOOTM is not enabled. However, the arc variant of arch_lmb_reserve()
is only compiled in if CMD_BOOTM is enabled.
This currently does not trigger build error, because there is an empty
weak implementation of arch_lmb_reserve(), however that is not the
function that should be used on arc.
Fix this by moving the arch_lmb_reserve() implementation into common
code and always compile it in.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even
if CMD_BOOT{I,M,Z} is not enabled. However, the arm32/arm64 variant of
arch_lmb_reserve() is only compiled in if CMD_BOOT{I,M,Z} is enabled.
This currently does not trigger build error, because there is an empty
weak implementation of arch_lmb_reserve(), however that is not the
function that should be used on arm32/arm64.
Fix this by moving the arch_lmb_reserve() implementation into common
code and always compile it in.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
ARMv8.0 has optional crc32 instruction for crc32 calculation. The
instruction is mandatory since ARMv8.1. The crc32 calculation is
faster using the dedicated instruction, e.g. 1.4 GHz iMX8MN gives:
=> time crc32 0x50000000 0x2000000
time: 0.126 seconds # crc32 instruction
time: 0.213 seconds # software crc32
Add implementation using the compiler builtin wrapper for the crc32
instruction and enable it by default, since we don't support any
platforms which do not implement this instruction.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
[trini: Make crc32_table guarded by CONFIG_ARM64_CRC32]
Signed-off-by: Tom Rini <trini@konsulko.com>
Replace the current 2-instruction 2-step tripling code by a
corresponding single instruction leveraging ARMv8-A's "flexible second
operand as a register with optional shift". This has the added benefit
(albeit arguably negligible) of reducing the final code size.
Fix the comment as the tripled cache level is placed in x12, not x0.
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Improve the file's readability and conciseness by using the appropriate
Aarch64 instruction: ubfx (unsigned bitfield extract). This makes the
code easier to follow as it directly manipulates the offsets and widths
of the fields read from system registers, as they are expressed in the
Standard (ARM ARM). This has the added benefit (albeit arguably
negligible) of reducing the final code size.
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Avoid applying the "fix" introduced by commit 5557eec01c ("env: Fix
invalid env handling in env_init()") to the environment "nowhere".
This is necessary as that commit, by setting the return value of
env_init() to -ENOENT if gd->env_valid is ENV_INVALID, forces that
function to reset gd->env_valid to ENV_VALID. By doing so, it breaks the
assumption (required by ENV_IS_NOWHERE) that gd->env_valid must be
ENV_INVALID.
This, in turn, results in env_relocate() calling env_load() (it should
not), which itself, calls U_BOOT_ENV_LOCATION(nowhere).load() i.e.
env_nowhere_load(). That function, being implemented under the
assumption mentioned above, calls env_set_default(), which in turn,
seeing that gd->env_valid is ENV_VALID (it should not), tries to
dereference whatever lies in gd->env_addr (most likely garbage), leading
to a faulty memory access.
Note that other env_locations might be concerned by this bug but that
this commit only intends to fix it for when ENV_IS_NOWHERE.
Fixes: 5557eec01c ("env: Fix invalid env handling in env_init()")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
First set of u-boot-at91 features for the 2022.01 cycle:
This feature set includes : the support for CPU driver for arm926
(sam9x60 device); changes required for OP-TEE boot for sama5d2_xplained
and sama5d27_som1_ek boards; QSPI boot configuration for sama5d2_icp;
starting to remove old Kconfig unused symbols from config_whitelist.txt
(work will take more time); also small fixes and updates in mach, DT,
configs, etc.
Replace the number in the flexcom-mode property with the define from the
include file.
This corresponds to the approach in Linux kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add dt-bindings include file for Atmel Flexcom hardware block.
This file is copied from Linux kernel.
It is used in devicetrees from Linux.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The AT91 RM9200DK board was removed long time ago.
Remove existing references that were not cleaned up.
Fixes: 1c85752258 ("ARM: remove broken "at91rm9200dk" board")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
CONFIG_SYS_AT91_CPU_NAME looks to be unused.
Remove it and remove it from config_whitelist.txt
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Rewrite the CONFIG_BOOTCOMMAND only if it's not previously configured from
defconfig file.
This allows the user to select from defconfig/menuconfig the desired
boot command.
Adjust the current board defconfigs to reflect the default booting command
for the specific ENV configuration.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add new config for storing environment from QSPI1.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: cleanup and add MAINTAINERS entry]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixed the following DTC build warning (reproducible with W=1)
arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ohci@00400000: unit name should not have leading 0s
arch/arm/dts/at91-sama5d2_icp.dtb: Warning (unit_address_format): /ahb/ehci@00500000: unit name should not have leading 0s
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Alexander Dahl <ada@thorsis.com>
Reorder the nodes following the kernel rules: nodes in a range are sorted
by ascending bus address, and when referenced by phandle, are ordered
alphabetically.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add support for sst26vf064b 64Mbit qspi-flash that is
present on sama5d2_icp board.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[eugen.hristev@microchip.com: move u-boot properties to sama5d2_icp-u-boot.dtsi]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved.
This modification allows to have a system which always work even when
OP-TEE is present.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
In order to make it more flexible and allow modifying the base address
of DRAM without recompiling U-Boot, use memory node from device tree
with fdtdec functions.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
sama5d2_xplained DRAM detection code will be modified to use device tree
instead of hardcoded addresses. In order to prepare that, add the memory
node to at91-sama5d2_xplained.dts.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved.
This modification allows to have a system which always work even when
OP-TEE is present.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
In order to make it more flexible and allow modifying the base address
of DRAM without recompiling U-Boot, use memory node from device tree
with fdtdec functions.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
When SYSRESET is enabled, cpu_reset function is also defined in
sysreset-uclass.c which lead to multiple definitions of this function
since reset.c is build unconditionally. Add a check in Makefile to build
this file only if SYSRESET isn't enabled.
SYSRESET can be enabled when building SYSRESET_PSCI for instance on this
platform.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
This commit updates the default config with the values that will be used
soon on the Atmel / Microchip AT91SAM9G25 based GARDENA smart gateway.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add bindings for CPU. This will allow displaying correctly the crystal,
CPU and master clock.
Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
The crystal, CPU and master clock were not displayed correctly on SAM9X60
after adding CCF clock support. Add compatible for ARM926EJ-S to fix
this.
Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Split master clock in 2 controlling block: one for prescaler one for
divider. This will allow referencing correctly the CPU clock and
master clock in device trees.
Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Header file version.h does not use anything from timestamp.h. Including of
timestamp.h has side effect which cause recompiling object file at every
make run because timestamp.h changes at every run.
So remove timestamp.h from version.h and include timestamp.h in files
which needs it.
This change reduce recompilation time of final U-Boot binary when U-Boot
source files were not changed as less source files needs to be recompiled.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add in lib/acpi/acpi_table.c and test/dm/acpi.c, rework a few others]
Signed-off-by: Tom Rini <trini@konsulko.com>
Version string is available in global variable char version_string[].
Macro U_BOOT_VERSION_STRING is not used by any other file, so remove it
completely from version.h. Other files were already converted to use
variable version_string[].
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
U_BOOT_DATE and U_BOOT_TIME are updated on every run of make command.
Therefore mrc.c file is recompiled every time when running make which means
that whole U-Boot binary is recompiled on every run of make command.
Simplify it and do not recompile U-Boot binary on every run of make command
by not depending on macros U_BOOT_DATE and U_BOOT_TIME.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is no platform which needs to overload version_string[] variable, so
remove weak symbol mark.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
As explained by Wolfgang, historically PowerPC would do a number of
things to hand-optimize placement of the binary on NOR flash in order to
maximize utilization of very scarce resources. These days, we simply
aren't optimizing our binary layout for NOR flash placement and it's
quite likely this wasn't working as intended. Furthermore, this level
of optimization makes it difficult to have version_string be a global,
instead of a weak and overridden value, and so make more progress on
reproducible builds, which is a current concern.
Move to having PowerPC no longer store version_string in the early part
of text so that it might be part of the first page of NOR and instead
use the same declaration everyone else does.
Link: https://lore.kernel.org/r/96716.1629798400@gemini.denx.de/
Signed-off-by: Tom Rini <trini@konsulko.com>
There is no need to overload version_string at the end of start.S files.
Common implementation of version_string should be fine.
Signed-off-by: Pali Rohár <pali@kernel.org>
[trini: Keep the align, it's important for the rest of linkage]
Signed-off-by: Tom Rini <trini@konsulko.com>
More C files do not use compile time timestamp macros and do not have to be
recompiled every time when SOURCE_DATE_EPOCH changes.
This patch moves version_string[] from version.h to version_string.h and
updates other C files which only needs version_string[] string to include
version_string.h instead of version.h. After applying this patch these
files are not recompiled every time when SOURCE_DATE_EPOCH changes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Macro U_BOOT_VERSION_STRING is already stored in variable version_string.
So use directly this variable instead of storing U_BOOT_VERSION_STRING into
temporary variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
[trini: This area was reworked since posted, what is here is now really
inspired by the previous version, so drop Ilias' Acked-by]
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, there is no ENTRY() entry in the m68k linker script.
However, since they currently contain a version_string symbol, which
then overrides the default weak version_string symbol, the linker
decides we must keep start.o in the resulting link. Add an ENTRY() line
so that the linker will know to keep this, even when version_string is
no longer provided in start.S
Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
Some tests produce a lot of output that does not need to be individually
checked by an assertion. Add a macro to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to map a file into memory so that it can be accessed using
simple pointers. Add a function to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function to return the size of a file. This is useful in situations
where we need to allocate memory for it before reading it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This message comes up a lot when scanning filesystems. It suggests to the
user that there is some sort of error, but in fact there is no reason to
expect that a particular partition has a sqfs filesystem. Other
filesystems don't print this error.
Turn it into a debug message.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
This message comes up a lot when scanning filesystems. It suggests to the
user that there is some sort of error, but in fact there is no reason to
expect that a particular partition has a btrfs filesystem. Other
filesystems don't print this error.
Turn it into a debug message.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
CONFIG_SPIFLASH is manually re-added as it is not a new symbol, but now
only exists in CONFIG_SYS_EXTRA_OPTIONS.
Signed-off-by: Tom Rini <trini@konsulko.com>
With legacy PCI code removed and thus DM_PCI also removed, a few places
did not get correctly updated with the merge to next and thus broke.
Remove now extraneous dependencies on DM_PCI.
Signed-off-by: Tom Rini <trini@konsulko.com>
This adds CI tests for SiFive Unleashed board.
QEMU supports booting exact the same images as used on the real
hardware out of the box, that U-Boot SPL loads U-Boot proper
from either an SD card or the SPI NOR flash, hence we can easily
set up CI to cover these 2 boot flows of SiFive Unleashed board.
With this, now we can have regression testing of mmc-spi-slot and
sifive spi drivers, as well as mmc and spi-nor subsystems.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This adds genimage [1] config files for generating SD card and spi-nor
images, which can be programmed to an SD card or SPI flash and boot
from there.
The same images will be used for U-Boot CI testing for this board.
[1] https://github.com/pengutronix/genimage
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
genimage [1] is a tool to create flash/disk images. This is required
by some targets, e.g.: sifive_unleashed, to generate sdcard or spi-nor
images for real hardware, as well as U-Boot CI testing.
[1] https://github.com/pengutronix/genimage
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present U-Boot CI testing is still using QEMU 4.2.0 which is
pretty old. Let's bump up to QEMU 6.1.0.
ninja-build is added as the prerequisite required by QEMU 6.1.0.
Note there is a bug in QEMU 6.1.0 Xilinx Zynq UART emulation codes.
A quick fix [1] was posted on QEMU mailing list but it it too late
for 6.1.0 release. Let's manually apply the bug fix on top of the
v6.1.0 release tag at the time being.
[1] http://patchwork.ozlabs.org/project/qemu-devel/patch/20210823020813.25192-2-bmeng.cn@gmail.com/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
- Merge ATAGs and MACH_ID options to Kconfig, and then disable them for
nearly all platforms. A small number of platforms actively require
this support still, and have it still enabled. Otherwise, it's migrated
and disabled.
As this is only useful when booting with ATAGs, which are now largely
disabled, remove this value for the remaining platforms. We have a few
places in the code that had been testing for MACH_TYPE as a sort of
internal logic. Update those to use different but still correct CONFIG
symbols.
Cc: Phil Sutter <phil@nwl.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and
stemmy, disable ATAG support. A large number of platforms had enabled
support but never supported a kernel so old as to require it. Further,
some platforms are old enough to support both, but are well supported by
devicetree booting, and have been for a number of years. This is
because some of the ATAGs related functions have been re-used to provide
the same kind of information, but for devicetree or just generally to
inform the user. When needed still, rename these functions to
get_board_revision() instead, to avoid conflicts. In other cases, these
functions were simply unused, so drop them.
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
No iMX platforms have supported ATAG-based booting. They have however
re-used the CONFIG_SERIAL_TAG option as a way to enable support of
reading the OTP fuses and setting the serial# environment variable in
some cases. Change the warp7 support to use this symbol, use this for
updating the rest of the imx7 code, and update the imx8 conditionals.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
- Further Makefile/Kconfig namespace cleanups from Simon. This migrates
a number of symbols to Kconfig and replaces some inconsistencies
between CONFIG_FOO and CONFIG_SPL_FOO_SUPPORT/CONFIG_TPL_FOO_SUPPORT.
The code under drivers/net is related to ethernet networking drivers, in
some fashion or another. Drop these from the top-level Makefile and
also move the phy rule into drivers/net/Makefile which is where it
belongs. Make the new rule for drivers/net check for the build-stage
relevant ETH symbol.
Fix up some Kconfig dependencies while we're here to mirror how the
Makefile logic now works.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Introduce ETH, Kconfig dependency changes, am43xx fix]
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the power/ rules into drivers/power to avoid clutter in the Makefile
and drivers/Makefile files.
We must select SPL_POWER if SPL_POWER_DOMAIN is used, since the two are
currently independent and boards do not necessarily enable SPL_POWER.
Add a TPL_POWER as well, as that is used by one board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
At present we have SPL_POWER but not piain POWER. This works because
there is a special build rule in Makefile that always includes the
drivers/power directory.
It is better to have all driver directories included by drivers/Makefile
and there is already a rule in there for this purpose. It just needs a
Kconfig for U-Boot proper, so add one.
Update the pmic.h header file so that it defines the old pmic struct
always, when driver model is not in use. That will avoid build errors
for boards which enable POWER but not DM_PMIC.
Enable this option always. That seems strange at first sight, but it
actually but mimics the current Makefile behaviour. Once we can drop the
old PMICs it should be easy enough to rename DM_PMIC to POWWER, or
something similar.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_POWER_I2C
CONFIG_POWER_LEGACY
They are handled at the same time due to a dependency between them.
Update the Makefile rule to use legacy power only in U-Boot proper.
Unfortunately a separate rule is needed in SPL to be able to build
legacy power. Add SPL related symbols for both, to allow for SPL-only
usage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: More SPL related cleanups, reword commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
This option is used in pre-driver model code and much of it has never
been converted to driver model.
We want to add a new option to enable power support, so we can use a
simple rule in the Makefile. Rename this one, which is really about
a particular implementation of power.
Also update the pmic.h header file so it either includes the legacy
API or the driver model one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add a proper Kconfig option for SPL so we can remove the hack in some of
the board config files.
This involves adding CONFIG_SPL_DM_PMIC to some of the configs as well
as updateing the Makefile rule for PMIC_RK8XX to exclude SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Add SPL_PMIC_RK8XX, enable when needed, handle undef of
CONFIG_DM_PMIC_PFUZE100 as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
At present we have SPL_GPIO and TPL_GPIO but not piain GPIO. This
works because there is a special build rule in Makefile that always
includes the drivers/gpio directory.
It is better to have all driver directories included by drivers/Makefile
and there is already a rule in there for this purpose. It just needs a
Kconfig for U-Boot proper, so add one.
Enable the option always for now, since this mimics current behaviour.
This can be updated once DM_GPIO is used everywhere.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is not a good idea to use things called CONFIG_xxx in the source code
since this prefix is reserved for use by Kconfig. Rename these variables.
Signed-off-by: Simon Glass <sjg@chromium.org>
We cannot use the existing DMA config for the MCD driver because it is
not migrated to driver model. In order to move it to drivers/Makefile
we need some sort of option for it. Add a new DMA_LEGACY option, which
also acts as a signal that it should be migrated.
Enable this for devkit3250 which uses CONFIG_DMA_LPC32XX which is not
converted to Kconfig.
For now this is not used in the Makefile. That update happens in a
following patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename this option so that CONFIG_IS_ENABLED can be used with it.
Oddly there is already an SPL_CACHE option. Drop it in favour of this one.
Drop the special SPL Makefile rule which is now superfluous.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have SPL_SERIAL and TPL_SERIAL but not piain SERIAL. This
works because there is a special build rule in Makefile that always
includes the drivers/serial directory.
It is better to have all driver directories included by drivers/Makefile
and there is already a rule in there for this purpose. It just needs a
Kconfig for U-Boot proper, so add one.
It is always enabled, for now, since that mimics the current behaviour.
It should be possible to drop the strange 'SERIAL_PRESENT' option at some
point and use SERIAL instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup some incorrect renames]
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently it is possible to cancel loadx and loady commands by pressing
CTRL+X (CAN character) at least 3 times quickly.
All other U-Boot commands, including loadb and loads can be cancelled by
CTRL+C. So allow it also in xyz-modem code used by loadx and loady
commands. Implement it by handling CTRL+C (ETX character) in the same way
as CTRL+X (CAN character).
Due to how x/y-modem protocol works, it is required to press
CTRL+C or CTRL+X at least 3 times quickly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Transfer termination tries to instruct sender that transfer was terminated.
Print error message and indicates aborted transfer in return value.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
In x-modem protocol EOF is not an error state at the end of file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Variable xyz.len is set to -1 on error. At the end xyzModem_stream_read()
function calls memcpy() with length from variable xyz.len. If this variable
is set to -1 then value passed to memcpy is casted to unsigned value, which
means to copy whole address space. Which then cause U-Boot crash. E.g. on
arm64 it cause CPU crash: "Synchronous Abort" handler, esr 0x96000006
Fix this issue by checking that value stored in xyz.len is valid prior
trying to use it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Per a request from Andre Przywara and agreed with by Peter Hoyes, the
vexpress aemv8r support wasn't quite ready to be merged, but the
discussion had moved off list. We should keep the first patch in the
series for now, but revert the rest. This reverts the following
commits:
e0bd6f31ce doc: Add documentation for the Arm vexpress board configs
30e5a449e8 arm: Use armv8_switch_to_el1 env to switch to EL1
b53bbca63b vexpress64: Add BASER_FVP vexpress board variant
2f5b7b7490 armv8: Add ARMv8 MPU configuration logic
37a757e227 armv8: Ensure EL1&0 VMSA is enabled
Signed-off-by: Tom Rini <trini@konsulko.com>
- Add position independent execution support for ARMv7
- Snapdragon, synquacer, vexpress64 fixes / improvements
- Prevent NEON register use on ARMv8
- Other assorted fixes
On some cases, the actual number of bytes read can be shorter
than what was requested. This can be handled gracefully by
taking this difference into account instead of exiting.
Signed-off-by: Thibault Ferrante <thibault.ferrante@gmail.com>
The prototype of psci_features() duplicated. Remove extra declaration.
Fixed: e21e3ffdd1 ("psci: Fix warnings when compiling with W=1")
Reported-by: Michael Scott <mike@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
For ARMv8-A, NEON is standard, so the compiler can use it even when no
special target flags are provided. For example, it can use stores from
NEON registers to zero-initialize large structures. GCC 11 decides to
do this inside the DRAM init code for the Allwinner H6.
However, GCC 11 has a bug where it generates misaligned NEON register
stores even with -mstrict-align. Since the MMU is not enabled this early
in SPL, the misaligned store causes an exception and breaks booting.
Work around this issue by restricting the compiler to using GPRs only,
not vector registers. This prevents any future surprises relating to
NEON use as well.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Create a new documentation section for Arm Ltd boards with a sub-page
for the vexpress board (FVP-A, FVP-R and Juno).
Document how the armv8_switch_to_el1 environment variable can be used
to switch between booting from S-EL2/S-EL1 at runtime on the BASER_FVP.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Use the environment variable armv8_switch_to_el1 to determine whether
to switch to EL1 at runtime. This is an alternative to the
CONFIG_ARMV8_SWITCH_TO_EL1 compile-time option.
The environment variable will be ineffective if the ARMV8_MULTIENTRY
config is used.
This is required by the Armv8r64 architecture, which must be able to
boot at S-EL1 for Linux but may need to boot at other ELs for other
systems.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
The BASER_FVP board variant is implemented on top of the BASE_FVP board
config (which, in turn, is based on the Juno Versatile Express board
config). They all share a similar memory map - for BASER_FVP the map is
inverted from the BASE_FVP
(https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map)
* Create new TARGET_VEXPRESS64_BASER_FVP target, which uses the same
board config as BASE_FVP and JUNO
* Adapt vexpress_aemv8a.h header file to support BASER_FVP (and rename
to vexpress_aemv8.h)
* Enable config to switch to EL1 for the BASER_FVP
* Create vexpress_aemv8r defconfig
* Provide an MPU memory map for the BASER_FVP
For now, only single core boot is supported.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[trini: Add MAINTAINERS, move BOOTCOMMAND to defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
Armv8r64 is the first Armv8 platform that only has a PMSA at the
current exception level. The architecture supplement for Armv8r64
describes new fields in ID_AA64MMFR0_EL1 which can be used to detect
whether a VMSA or PMSA is present. These fields are RES0 on Armv8a.
Add logic to read these fields and, for the protection of the memory
used by U-Boot, initialize the MPU instead of the MMU during init, then
clear the MPU regions before transition to the next stage.
Provide a default (blank) MPU memory map, which can be overridden by
board configurations.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
On Armv8-R, the EL1&0 memory system architecture is configurable as a
VMSA or PMSA, and resets to an "architecturally unknown" value.
Add code to armv8_switch_to_el1_m which detects whether the MSA at
EL1&0 is configurable using the id_aa64mmfr0_el1 register MSA fields.
If it is we must ensure the VMSA is enabled so that a rich OS can boot.
The MSA and MSA_FRAC fields are described in the Armv8-R architecture
profile supplement (section G1.3.7):
https://developer.arm.com/documentation/ddi0600/latest/
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
The use of ARMv8.3 pointer authentication (PAuth) is governed by fields
in HCR_EL2, which trigger a 'trap to EL2' if not enabled. The reset
value of these fields is 'architecturally unknown' so we must ensure
that the fields are enabled (to disable the traps) if we are entering
the kernel at EL1.
The APK field disables PAuth instruction traps and the API field
disables PAuth register traps
Add code to disable the traps in armv8_switch_to_el1_m. Prior to doing
so, it checks fields in the ID_AA64ISAR1_EL1 register to ensure pointer
authentication is supported by the hardware.
The runtime checks require a second temporary register, so add this to
the EL1 transition macro signature and update 2 call sites.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
This reverts commit f7e16bb0c5, since
the U-Boot doesn't boot if it is booted directly from SPI-NOR with
CONFIG_POSITION_INDEPENDENT=y. Unless fixing this issue, it is better
to revert this change.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
CONFIG_MMC_SPI_CRC_ON needs the crc16 functions, but it was not included
in an SPL build. For non-SPL builds, crc16.o is already added
unconditionally. This also removes CONFIG_SPL_YMODEM_SUPPORT from the
sifive board configs, which is only relevant for some ARM boards and was
only set for its side effect of adding crc16.o.
When running 'part list' for an ISO partition the numbers are not under the
labels.
Correct the alignment of the ISO partition list. With the patch the
output looks like:
Part Start Sect x Size Type
1 3720 5024 512 U-Boot
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The logic in msm_generate_mac_addr() was originally taken from the LK
bootloader where the serial number is a string and must be parsed first.
However, in U-Boot msm_board_serial() returns an u32 and
msm_generate_mac_addr() has quite complicated code that will first
print it as a hex string and then immediately parse it again.
What this function actually does at the end is to put the serial number
encoded as big endian (the order used for the hex string) into the u8 *mac.
Use put_unaligned_be32() to do that with bit shifts instead of going
through the string format.
This should be slightly more efficient and cleaner but does not result
in any functional difference.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
At the moment U-Boot produces an empty MAC address (02:00:00:00:00:00)
if the eMMC is not used by anything in U-Boot (e.g. with
CONFIG_ENV_IS_NOWHERE=y instead of having the environment on eMMC).
This happens because then there is nothing that actually initializes
the eMMC and reads the "cid" that is later accessed.
To fix this, call mmc_init() to ensure the eMMC is initialized.
There is no functional difference if the eMMC is already initialized
since then mmc_init() will just return without doing anything.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
A U-Boot image could be loaded and executed at a different
location than it was linked at.
For example, Aspeed takes a stable release version of U-Boot image
as the golden one for recovery purposes. When the primary storage
such as flash is corrupted, the golden image would be loaded to any
SRAM/DRAM address on demands through ethernet/UART/etc and run for
rescue.
To deal with this condition, the PIE is needed as there is only one
signed, golden image, which could be however executed at different
places.
This patch adds the PIE support for ARMv7 platform.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
This new option allows to disable ahci-pci driver in SPL. Disabling it is
needed when SPL_PCI is not enabled as ahci-pci depends on PCI.
This change fixes following compile error when CONFIG_SPL_SATA_SUPPORT is
enabled and SPL_PCI is disabled.
LD spl/u-boot-spl
arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.o: in function `ahci_probe_scsi_pci':
drivers/ata/ahci.c:1205: undefined reference to `dm_pci_map_bar'
arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.c:1215: undefined reference to `dm_pci_read_config16'
arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.c:1216: undefined reference to `dm_pci_read_config16'
arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci.c:1220: undefined reference to `dm_pci_map_bar'
make[1]: *** [scripts/Makefile.spl:512: spl/u-boot-spl] Error 1
make: *** [Makefile:1977: spl/u-boot-spl] Error 2
LD spl/u-boot-spl
arm-linux-gnueabihf-ld.bfd: drivers/ata/ahci-pci.o: in function `ahci_pci_probe':
drivers/ata/ahci-pci.c:21: undefined reference to `ahci_probe_scsi_pci'
make[1]: *** [scripts/Makefile.spl:512: spl/u-boot-spl] Error 1
make: *** [Makefile:1977: spl/u-boot-spl] Error 2
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
File drivers/ata/ahci-pci.c calls function ahci_probe_scsi_pci() which is
compiled only when DM_PCI is enabled. So add missing dependency into
Kconfig.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The ds1307 driver also supports the DS1339 and DS1340.
However, in ds1307_rtc_reset the register writes assume that the chip
is a DS1307. This is evident in the writing of bits SQWE, RS1, RS0 to
the control register. While this applies correctly to the DS1307, on a
DS1340 the control register doesn't contain those bits (instead, the
register is used for clock calibration). By writing these bits the
clock calibration will be changed and the chip can become
non-functional after a reset call.
Signed-off-by: Callum Sinclair <callum.sinclair@alliedtelesis.co.nz>
Enabling CONFIG_SYS_THUMB_BUILD produces a significantly smaller
U-Boot binary (250 KiB vs 320 KiB) that still seems to be fully
functional. Make use of that by default but keep it as "imply" so it
can be disabled for testing in case this causes trouble for someone.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Over the time, the "stemmy" U-Boot board was tested on several other
Samsung smartphones based on ST-Ericsson NovaThor Ux500. Convert the
documentation to reStructuredText at doc/board/ste/stemmy.rst and
make the device list complete. Also note that the board now boots
into USB Fastboot instead of just ending up at the U-Boot prompt.
The device table is mostly taken from the postmarketOS wiki article
(https://wiki.postmarketos.org/wiki/ST-Ericsson_NovaThor_U8500).
All the newly added devices were tested by Linus Walleij.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Make use of the new drivers for ARM U8500 introduced in the U-Boot
2021.10 merge window by adding basic support for USB Fastboot with
the "stemmy" board. As a first step this will always boot directly
into USB Fastboot for now with the console displayed on the screen
to make that obvious.
Samsung uses quite strange GPT partition labels on these boards,
so also add a bunch of fastboot_partition_alias_* to make this more
easy to use.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
So far there is no need for a clock driver in U-Boot because the
previous boot stage leaves all the necessary clocks on. However,
some drivers in U-Boot (e.g. arm_pl180_mmci) depend on having a clock
driver to obtain the clock frequency.
Setting up the clock drivers properly is a bit tricky on U8500,
so for now add a simple fixed-clock for the eMMC that allows obtaining
the clock frequency. This should be replaced eventually if some board
actually requires enabling some of the clocks.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Imply the options for new drivers added for ARM U8500 during the
U-Boot 2021.10 merge window. Adding these as "imply" in the Kconfig
avoids having to add them to all the board defconfigs but still allows
disabling them if wanted.
Also select DM_USB_GADGET if DM_USB is selected because otherwise
the Ux500 MUSB glue driver does not show up in the configuration.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Update MAINTAINERS with various drivers for ARM U8500 that were
added during the U-Boot 2021.10 merge window.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
When k_recv() returns zero it indicates that kermit transfer was aborted.
Function do_load_serial_bin() (caller of load_serial_bin()) interprets
value ~0 as aborted transfer, so properly propagates information about
aborted transfer from k_recv() to do_load_serial_bin().
Signed-off-by: Pali Rohár <pali@kernel.org>
This resyncs us with the version found in v5.13 of the Linux kernel with
the following exceptions:
- Keep our u-boot specific tests / code area.
- Change the location of checkpatch.rst (which we now import)
- Drop the "use strscpy" test as we don't have that, but do have strlcpy
and want that used now.
- Keep debug/printf in the list for $logFunctions
And note that we now also include the spdxcheck.py tool that
checkpatch.pl supports calling out to, and include upstream's
checkpatch.rst in our develop section of the documentation.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, an empty imput file causes `mmap()` to fail, and you get an
error like "mkimage: Can't read file.img: Invalid argument", which is
extremely unintuitive and hard to diagnose if you don't know what to
look for. Add an explicit check for an empty file and provide a clear
error message instead.
We already bounds check the image size when listing and re-signing
existing images, so we only need this check here, when opening data
files going into a image.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With glibc 2.33 (Ubuntu package glibc6 2.33-0ubuntu9) building
sifive_unmatched_defconfig results in:
In file included from /usr/include/stdio.h:866,
from ././include/compiler.h:26,
from <command-line>:
In function ‘snprintf’,
inlined from ‘rsa_engine_get_priv_key’ at ./tools/../^:273:4:
/usr/include/riscv64-linux-gnu/bits/stdio2.h:71:10: warning:
‘%s’ directive argument is null [-Wformat-truncation=]
71 | return __builtin___snprintf_chk (__s, __n,
__USE_FORTIFY_LEVEL - 1,
|
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
72 | __glibc_objsize (__s), __fmt,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
73 | __va_arg_pack ());
| ~~~~~~~~~~~~~~~~~
Avoid passing a NULL string.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Calculate hash using DM driver if supported.
For backward compatibility, the call to legacy
hash functions is reserved.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Add purely software-implmented drivers to support multiple
hash operations including CRC, MD5, and SHA family.
This driver is based on the new hash uclass.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Add UCLASS_HASH for hash driver development. Thus the
hash drivers (SW or HW-accelerated) can be developed
in the DM-based fashion.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Older OpenSSL and libressl versions have a slightly different API.
This require #ifdefs to support. However, we still can't support it
because the ECDSA path does not compile with these older versions.
These #ifdefs are truly a vestigial appendage.
Alternatively, the ECDSA path could be updated for older libraries,
but this requires significant extra code, and #ifdefs. Those libraries
are over three years old, and there concerns whether it makes sense to
build modern software for real world use against such old libraries.
Thusly, remove #ifdefs and code for old OpenSSL and LibreSSL support.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
- Further CONFIG to Kconfig migrations
- Some DDR related symbols
- CONFIG_SYS_LOAD_ADDR moved, loadaddr always set in environment now.
- Finish MX7D, convert IMX_CONFIG
- Some RAMBOOT related options
- L1 cache size converted and named consistently for all arches. A
further follow-up to rename things for even better clarity is welcome.
- CONFIG_SKIP_LOWLEVEL_INIT, CONFIG_SYS_MALLOC_LEN
default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SKIP_LOWLEVEL_INIT
CONFIG_SKIP_LOWLEVEL_INIT_ONLY
In order to do this, we need to introduce SPL and TPL variants of these
options so that we can clearly disable these options only in SPL in some
cases, and both instances in other cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
Based on include/configs/ls1046ardb.h it seems that CONFIG_RAMBOOT_PBL
should have been enabled, but was not. Enable and migrate the values to
Kconfig.
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than using CONFIG_SABRELITE to set FDTFILE for only that
platform, switch to always setting this based on
CONFIG_DEFAULT_DEVICE_TREE as this should always match the kernel
device tree name anyhow.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Move the CONFIG_DDR_MB symbol to Kconfig. A later clean-up would be to
make dynamic memory size detection work based on how this is done on
other i.MX6 platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
- Provide a default Kconfig value of the default script
- Largely continue to define this via the board Kconfig file
- For the boards that select a script based on defconfig rather than
TARGET, keep this within the defconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, there is no over-arching symbol for access to
arch/arm/mach-imx nor the CONFIG symbols that are common over all of
these related platforms. This new CONFIG symbol will allow us to start
down this path.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we have consistent usage, migrate this symbol to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
- In most of the codebase, we reference CONFIG_SYS_LOAD_ADDR and not
CONFIG_LOADADDR.
- Generally, CONFIG_SYS_LOADADDR is set to CONFIG_LOADADDR and then as
noted, we use CONFIG_SYS_LOADADDR.
Signed-off-by: Tom Rini <trini@konsulko.com>
All platforms define CONFIG_SYS_LOAD_ADDR, but only some define
CONFIG_LOADADDR. Very very rarely are these not the same address, and
qemu-ppce500 is one such case. However, based on reading the history of
the code, this mismatched value was simply a copy-paste from other
PowerPC platforms where it is this unused currently. Switch the code to
use CONFIG_SYS_LOAD_ADDR and update the documentation.
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Guard most of the options in drivers/ddr/fsl/Kconfig with
SYS_FSL_DDR || SYS_FSL_MMDC.
- Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER
to Kconfig.
- Clean up the logic for including the DDR_ECC_CMD code.
Signed-off-by: Tom Rini <trini@konsulko.com>
As this symbol can either be a fixed value or the function
get_board_ddr_clk, migration is tricky. Introduce a choice of DYNAMIC
or STATIC_DDR_CLK_FREQ. If DYNAMIC, we continue to use the board
defined get_board_ddr_clk function. If STATIC, set CONFIG_DDR_CLK_FREQ
to that value and now include/clock_legacy.h contains the function
prototype or defines get_board_ddr_clk() to that static value. Update
callers to test for DYNAMIC or STATIC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the symbol that controls building some JEDEC SPD support functions
to Kconfig. This is required on the TI keystone 2 platforms and very
frequently (but not always) used on large number of Freescale/NXP
platforms, so use imply there.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have a number of CONFIG symbols to express the fixed size of system
memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
size rather than MiB.
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <marek.behun@nic.cz>
Move CONFIG_DDR_32BIT/64BIT to Kconfig as a choice for Armada XP
platforms. Make 64bit the default as this mirrors the current code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Check that the watchdog_reset() implementation in wdt-uclass behaves
as expected:
- resets all activated watchdog devices
- leaves unactivated/stopped devices alone
- that the rate-limiting works, with a per-device threshold
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
It seems that no other test has claimed gpio_a:7 yet, so use that.
The only small wrinkle is modifying the existing wdt test to use
uclass_get_device_by_driver() since we now have two UCLASS_WDT
instances in play, so it's a little more robust to fetch the device by
driver and not merely uclass+index.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
A rather common kind of external watchdog circuit is one that is kept
alive by toggling a gpio. Add a driver for handling such a watchdog.
The corresponding linux driver apparently has support for some
watchdog circuits which can be disabled by tri-stating the gpio, but I
have never actually encountered such a chip in the wild; the whole
point of adding an external watchdog is usually that it is not in any
way under software control. For forward-compatibility, and to make DT
describe the hardware, the current driver only supports devices that
have the always-running property. I went a little back and forth on
whether I should fail ->probe or only ->start, and ended up deciding
->start was the right place.
The compatible string is probably a little odd as it has nothing to do
with linux per se - however, I chose that to make .dts snippets
reusable between device trees used with U-Boot and linux, and this is
the (only) compatible string that linux' corresponding driver and DT
binding accepts. I have asked whether one should/could add "wdt-gpio"
to that binding, but the answer was no:
https://lore.kernel.org/lkml/CAL_JsqKEGaFpiFV_oAtE+S_bnHkg4qry+bhx2EDs=NSbVf_giA@mail.gmail.com/
If someone feels strongly about this, I can certainly remove the
"linux," part from the string - it probably wouldn't the only place where
one can't reuse a DT snippet as-is between linux and U-Boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
A board can have and make use of more than one watchdog device, say
one built into the SOC and an external gpio-petted one. Having
wdt-uclass only handle the first is both a little arbitrary and
unexpected.
So change initr_watchdog() so we visit (probe) all DM watchdog
devices, and call the init_watchdog_dev helper for each.
Similarly let watchdog_reset() loop over the whole uclass - each
having their own ratelimiting metadata, and a separate "is this device
running" flag.
This gets rid of the watchdog_dev member of struct global_data. We
do, however, still need the GD_FLG_WDT_READY set in
initr_watchdog(). This is because watchdog_reset() can get called
before DM is ready, and I don't think we can call uclass_get() that
early.
The current code just returns 0 if "getting" the first device fails -
that can of course happen because there are no devices, but it could
also happen if its ->probe call failed. In keeping with that, continue
with the handling of the remaining devices even if one fails to
probe. This is also why we cannot use uclass_probe_all().
If desired, it's possible to later add a per-device "u-boot,autostart"
boolean property, so that one can do CONFIG_WATCHDOG_AUTOSTART
per-device.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Since the gd->watchdog_dev member is going away, switch to using the
new wdt_stop_all() helper.
While here, clean up the preprocessor conditional: The ->watchdog_dev
member is actually guarded by CONFIG_WDT [disabling that in
x530_defconfig while keeping CONFIG_WATCHDOG breaks the build], and in
the new world order so is the existence of the wdt_stop_all()
function.
Actually, existence of wdt_stop_all() depends on CONFIG_${SPL_}WDT, so
really spell the condition using CONFIG_IS_ENABLED, and make it a C
rather than cpp if.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Since the watchdog_dev member of struct global_data is going away in
favor of the wdt-uclass handling all watchdog devices, prepare for
that by adding a helper to call wdt_stop() on all known devices.
If an error is encountered, still do wdt_stop() on remaining devices,
but remember and return the first error seen.
Initially, this will only be used in one single
place (board/alliedtelesis/x530/x530.c).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
For the unit tests, it is more convenient if the tests are in charge
of when the watchdog devices are started and stopped, so prevent
wdt-uclass from doing it automatically.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
As a step towards handling all DM watchdogs in watchdog_reset(), use a
per-device flag to keep track of whether the device has been started
instead of a bit in gd->flags.
We will still need that bit to know whether we are past
initr_watchdog() and hence have populated gd->watchdog_dev -
incidentally, that is how it was used prior to commit 9c44ff1c5f.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
In preparation for handling all DM watchdogs in watchdog_reset(), pull
out the code which handles starting (or not) the gd->watchdog_dev
device.
Include the device name in various printfs.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The addition of .pre_probe and .per_device_auto made this look
bad. Fix it.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
As preparation for having the wdt-uclass provided watchdog_reset()
function handle all DM watchdog devices, and not just the first such,
introduce a uclass-owned struct to hold the reset_period and
next_reset, so these become per-device instead of being static
variables.
No functional change intended.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
wdt_start() does the "no ->start? return -ENOSYS" check, don't
open-code that in wdt_expire_now().
Also, wdt_start() maintains some global (and later some per-device)
state, which would get out of sync with this direct method call - not
that it matters much here since the board is supposed to reset very
soon.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
These symbols are now either unused or were only used within the config
file to determine other logic, which could be done in a way that doesn't
further pollute the CONFIG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Begin merging some Kconfig migration, and CONFIG namespace cleanup
series in. This gives us:
- A number of I2C symbols migrated over
- DWC2, i8042, altera_spi and a few other areas updated to use CFG not
CONFIG for the concept of "configuration space" defines.
- Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS
- Some dead code removal.
- Rename a number of CONFIG symbols that were only referenced within
the config header to not use CONFIG as a prefix.
While the Kconfig language seems to accept either form of whitespace, we
use a space throughout the project, except in these spots.
Signed-off-by: Tom Rini <trini@konsulko.com>
Rather than using CONFIG namespace for logic internal to
include/configs/astro_mcf5373l.h to select ASTRO_ID (and populate the
default environment), strip CONFIG from the various options used and
set.
Signed-off-by: Tom Rini <trini@konsulko.com>
Update the comment here to refer to PCI_CONFIG_ADDRESS rather than
CONFIG_ADDRESS.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The value CONFIG_ALTERA_SPI_IDLE_VAL is never re-defined by a board.
Rename this to ALTERA_SPI_IDLE_VAL.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This driver uses the CONFIG namespace to set the chips internal CONFIG
namespace related bits. However, CONFIG is reserved for the top-level
Kconfig based configuration system. Use CFG as the namespace here
instead to avoid pollution.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There are an assortment of hard-coded CONFIG_BOOTCOMMAND options in some
board headers. Rework these so that they do not add to the CONFIG
namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Migrate CONFIG_GICV2 and CONFIG_GICV3 to Kconfig. We still have the GIC
related registers that need to be handled more cleanly but start by
moving this symbol to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver uses the CONFIG namespace to set the chips internal CONFIG
namespace related bits. However, CONFIG is reserved for the top-level
Kconfig based configuration system. Use CFG as the namespace here
instead to avoid pollution.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- As there are no boards that use different values for speed / slave on
different buses, use a single option.
- Switch to using the common SYS_I2C_SPEED / SYS_I2C_SLAVE options.
- Introduce _HAS_ options for additional buses as only the first one is
common to all users.
- Convert all remaining symbols to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Migrate SYS_I2C_SH and related defines to Kconfig
- Remove currently unused SYS_I2C_SH related defines
- Cleanup related README section.
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_I2C_MXC
CONFIG_SYS_I2C_MXC_I2C1
CONFIG_SYS_I2C_MXC_I2C2
CONFIG_SYS_I2C_MXC_I2C3
CONFIG_SYS_I2C_MXC_I2C4
Signed-off-by: Tom Rini <trini@konsulko.com>
The omap24xx I2C driver uses its own CONFIG namespace for common I2C
variables. Rather than convert more of them to Kconfig, rename these to
the common I2C ones and remove the entirely unused functionality. As
part of this, we make the am335x_shc platforms consistent with their
intended speed values.
Signed-off-by: Tom Rini <trini@konsulko.com>
There are no users of more than 1 i2c bus in the non-DM case currently.
Remove the additional defines for this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert SYS_I2C_EARLY_INIT to Kconfig, and make it depend on
SPL_SYS_I2C_LEGACY. Remove the weak implementation as it's either
something that needs to exist for real, or shouldn't be called.
Signed-off-by: Tom Rini <trini@konsulko.com>
First, we convert CONFIG_SYS_I2C_LEGACY to Kconfig. Next, as you cannot
have SYS_I2C_LEGACY and DM_I2C at the same time, introduce
CONFIG_SPL_SYS_I2C_LEGACY so that we can enable the legacy option only
in SPL. Finally, for some PowerPC cases we also need
CONFIG_TPL_SYS_I2C_LEGACY support. Convert all of the existing users to
one or more symbols.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently the legacy software i2c support is only used for a single bus.
Remove all of the extra and unused support. Also update the README to
not reference that, and finish removing some already badly auto-edited
related text.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_I2C_SOFT
CONFIG_SYS_I2C_SOFT_SPEED
CONFIG_SYS_I2C_SOFT_SLAVE
Signed-off-by: Tom Rini <trini@konsulko.com>
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR
based on current usage.
- Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
to Kconfig. We move these symbols around a bit and add appropriate
dependencies to them. In some cases, we now add a correct default value
as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
At this point in time, there's no systems with "U-Boot environment
exists on an EEPROM which is accessed over the I2C bus" that sets this
option. Drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform defines everything needed to be able to use the
eeprom command. In addition, board/compulab/common/eeprom.c is required
by the platform, and does not use CONFIG_ID_EEPROM to enable/disable
builing of it. In order to migrate CONFIG symbols to Kconfig and to not
have to add complex logic to handle this case, enable CMD_EEPROM on this
board.
Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
Finish moving this driver to Kconfig.
- Update the dependency logic for Exynos5 too
- Remove the unused CONFIG_SYS_I2C_S3C24X0_SPEED variable
- Drop CONFIG_SYS_I2C_S3C24X0_SLAVE as it's always set to 0.
- Move the internal SYS_I2C_S3C24X0_SLAVE define closer to the only user.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The instances of CONFIG_SYS_I2C_EEPROM_ADDR on these platforms doesn't
match up with the rest of the EERPOM related defines in U-Boot. Move
these out of the CONFIG namespace rather than make complex Kconfig
logic.
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
The shc platforms do not make use of the rest of the EEPROM
infrastructure. Rather than make more elaborate Kconfig logic, remove
this setting from the CONFIG namespace.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Looking over the current boards, there are no users of
CONFIG_MAC_ADDR_IN_EEPROM. Further, omapl138_lcdk uses
CONFIG_NET_RANDOM_ETHADDR. Drop various unused code paths.
Cc: Adam Ford <aford173@gmail.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform does not use any of the standard EEPROM functionality and
instead provides its own. Use a local namespace for the I2C related
defines to access the EEPROM.
Cc: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Rework the default environment a bit to not use non-standard
CONFIG_ENV_... names and similar one-off CONFIG names.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Rename CONFIG_ENV_KS2_BOARD_SETTINGS to ENV_KS2_BOARD_SETTINGS so that
it better fits with the rest of the environment addition macros.
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in
order to not further add to the CONFIG namespace.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
There are a number of DWC2 configuration options that are set in dwc2.h
and referenced in dwc2.c only. Move these out of the CONFIG_DWC2
namespace and in to the DWC2 namespace. Note that hikey was defining an
option that was already always enabled, so we can remove that hunk.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:05 -04:00
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