Add 900MHz/1.25V setpoint according the latest datasheet(Rev.1,2/2017),
we add a 25mV voltage margin to cover the IR frop and board tolerance.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 9c31f7bf938adb9a808ea7bf637ccecf53f6e7be)
According to the latest datasheet(Rev.1,02/2017), when the internal LDO
is enabled, the ARM core can run at 900MHz. We need to check the
speed grading fuse to determine the max ARM core frequency.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit cc0edd14c5fc3b5590302572687b08f80563c683)
We detected some problems using the smsc lan8720a in combination with
i.MX28 and tracked this down to commit 2100968 ("net: phy: smsc: move
smsc_phy_config_init reset part in a soft_reset function")
With 2100968 the generic soft reset is replaced by a specific function
which handles power down state correctly. But additionally the soft
reset
itself got conditional and is therefore also only performed if the phy
is
in power down state.
This patch keeps the conditional wake up from power down, but
re-introduces the unconditional soft reset using the generic soft reset
function.
Function fec_enet_clk_enable() was disabling this line leaving the PHY
without a running clock. This makes the PHY lose its internal state
requiring a reset of the PHY to be reactivated.
This patch enables the clk_enet_out once at probe() so that it remains
enabled during all MDIO accesses.
Reference: https://patchwork.ozlabs.org/patch/549391/
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
https://jira.digi.com/browse/DEL-3150
Add "phy-reset-in-suspend" device tree option. When this option is
present, the driver will assert the phy reset line during suspend.
There are two main reasons to set this configuration:
- Avoid that the phy reset line "powers" the phy when the phy power
is turned off.
- Ensure that the phy is reset when waking up from suspend, what
helps to ensure proper operation when the phy power is turned off.
Signed-off-by: Pedro Perez de Heredia <pedro.perez@digi.com>
spi interface for sc16is7xx is added along with Kconfig flag
to enable spi or i2c, thus in a instance we can have either
spi or i2c or both, in sync to the hw.
Signed-off-by: Rama Kiran Kumar Indrakanti <indrakanti_ram@hotmail.com>
Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>