The existing implementation calculates mclk rate as function
of audio sample rate multiplied to multiplier taken from Table 5.
However this is not accurate for Manual Setting Mode - tables 3 & 4 from
AK4458 RM defines rate (LRCK/FS) and frame width (MCLK/16fs..1152fs) ranges
as parameters to calculate mclk frequency. Aside of this - adjust
bclk:mclk ratio from machine driver as function of "compatible" id.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 527b8b7032dcb75c14bb2790330ab96743d83b16)
Similar to DSD512 case we need a PCM pinctrl state option to map SAI BCLK
to codec MCLK pin. Given that bitclock rate is function of slots number and
slot width - pass bclk rate as parameter value from SAI driver.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 826caeae32713cff7ad50de8ebc9915de975edd9)
Comparing to 4.9 kernel, the generic irq chip core of 4.14 kernel
imposes more strict check on !irqd_irq_masked(&desc->irq_data) when
it tries to unmask an irq via unmask_irq(). For irq chips without
implementing ->irq_enable() and ->irq_disable() callbacks, like the
DPU irq chip, the IRQ_DISABLE_UNLAZY flag has to be set to irq status,
otherwise, irqs cannot be enabled again after disablement(due to things
like system power management).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
When switching from a 10-bit to an 8-bit color depth, the PHY pixel engine
simply stops functioning correctly 90% of the time. This results in the
HDMI sink not detecting any signal.
This patch will reset the PHY pixel engine after the pipe clocks are ON,
in the bridge enable callback. This will make the pixel engine work
correctly when BPC changes. Resetting the pixel engine before all the pipe
clocks are on, produces no results.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
(cherry picked from commit 72246ac9ccfa2074f4f575292af10d19a58c95c4)
To support lowest power mode for suspend, if no wakeup source
from non-secure partition is enabled, IRQSTEER can be powered
off when suspend, so non-secure linux OS needs to pass WU
irqchip wakeup source info to ATF, as MU is always enabled
as wakeup source, and it is a system level resource, so no
need to have it in WU domain.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit d45b2fd47417cc1c4e03616007271e07834cf415)
Refine dma-buf metadata setting to support framebuffer compression
Change-Id: Ia0ab9224d789c4b620e33a6f1c28483025a136ce
Signed-off-by: Richard Liu <xuegang.liu@nxp.com>
This patch adds line 0 PAD wakeup support, it is missed previously,
also protect the PAD wakeup interrupt handle with spin lock to
avoid possible race condition of GPIO interrupt arriving during
PAD wakeup interrupt handling.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit db842471137ef2758de6192f8f400e4b56da5d01)
4K@50 does not currently work. This patch will enable the scambler for
VIC96@50Hz.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
(cherry picked from commit 0f13947a2fb72673b19c9f154eb202a9be916c4f)
Select gpio PAD wakeup for those i.MX8 platforms with
system controller present.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 61f3cc34747e5c8db1578c8aba5bd9592533cede)
This patch enables gpio pin's pad wakeup function which
is supported by SCFW, with pad wakeup enabled, GPIO's
power is no need to be enabled after suspend, hence
save a sub-system's power.
To enable pad wakeup, dtb needs to provide pad wakeup
number for each gpio port, and each pin has to provide
<pin_id, type, line>, they should be inside each gpio node,
this is for calling SCFW APIs to enable/disable pad wakeup,
example of adding GPIO4_22 pad wakeup in dtb:
gpio4: gpio@5d0c0000 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
reg = <0x0 0x5d0c0000 0x0 0x10000>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
power-domains = <&pd_lsio_gpio4>;
interrupt-controller;
#interrupt-cells = <2>;
/* total pad wakeup number in gpio4 */
pad-wakeup-num = <1>;
/* SC_P_USDHC1_CD_B, SC_PAD_WAKEUP_LOW_LVL, LINE 22 */
pad-wakeup = <27 4 22>;
};
Pad wakeup will be enabled after GPIO port suspend, and
once any pad wakes up system, gpio driver will get the
wakeup line and handles the event during noirq resume
phase.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 1c7ffe9bf3a115031cec8c759a4cd0e09146de09)
Add PAD wakeup support for i.MX8 platforms with system
controller present, with PAD wakeup feature enabled,
the corresponding resource's power is no need to be
kept enabled when linux suspend, thus save a sub-system's
power consumption.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 3b5d781273b22461de9aaea337f9da9b2fdb643e)
Improving the PHY timing parameters by using linear interpolation for the linear parameters.
For, the non-linear parameters, use more frequency steps to improve the accuracy.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Allow PLL switch for playback stream only and remove
PLL switch guard with regard to capture stream as the
clock for capture stream is provided externally.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit c8213da5fbcd370acb4d764bef5df5981a517c11)
While investigating MLK-18894 ran a large number of suspend iterations
on imx6qp-sdb with rc2 kernel. After ~6 hours it hung while suspending
devices and sysrq-T showed the following trace for rtcwake:
The gckHARDWARE_SetPowerManagementState function seems hung waiting for
gckHARDWARE_QueryIdle. Inside the gckHARDWARE_QueryIdle there is a check
which looks like this:
rtcwake D 0 7090 561 0x00000001
[<809d5fc8>] (__schedule) from [<809d6380>] (schedule+0x48/0xb0)
[<809d6380>] (schedule) from [<809d9d3c>] (schedule_hrtimeout_range_clock+0xc8/0x13c)
[<809d9d3c>] (schedule_hrtimeout_range_clock) from [<809d9df0>] (schedule_hrtimeout+0x20/0x28)
[<809d9df0>] (schedule_hrtimeout) from [<807168c4>] (gckOS_Delay.part.3+0x64/0x6c)
[<807168c4>] (gckOS_Delay.part.3) from [<8071813c>] (gckOS_Delay+0x18/0x20)
[<8071813c>] (gckOS_Delay) from [<8073f08c>] (gckHARDWARE_SetPowerManagementState+0x838/0xb70)
[<8073f08c>] (gckHARDWARE_SetPowerManagementState) from [<8071df18>] (gpu_suspend+0x74/0xe4)
[<8071df18>] (gpu_suspend) from [<804fb9e8>] (dpm_run_callback+0x3c/0xdc)
/* Test if address is inside the last WAIT/LINK sequence. */
if ((address >= Hardware->lastWaitLink)
&& (address <= Hardware->lastWaitLink + 16)
Stepping through using the debugger (screenshot attached) this function
seems to return non-idle with both address lastWaitLink and being equal
to 0xFFFFFFF0. As far as I can tell the intention seems to be that the
check should pass but 0xFFFFFFF0 + 16 overflows back to zero so the
second part of the check fails because 0xFFFFFFF0 is not less than or
equal to 0.
Adding some prints to GPU code it seems that it's normal for these
values to be >0xFFFFe000. When they (randomly) hit 0xFFFFFFF0 exactly
the idle check will incorrectly fail and suspend will hang.
Actually, it is wrong when address reach to Hardware->lastWaitLink + 16,
because the address shall be either Hardware->lastWaitLink(wait command)
or Hardware->lastWaitLink + 8 (link command).
Fix the end address offset with 8 or 16 (extra 8 bytes for L2 flush).
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Below description copied from RM:
"RX_THRESHOLD. This field defines the FIFO threshold that triggers
a RX DMA/INT request.A RX DMA/INT request is issued when the number
of data entries in the RXFIFO is greater than RX_THRESHOLD."
Then, the RX_THRESHOLD of ECSPIx_DMAREG should be set as 'wml-1',
otherwise, the last 'wml' number of data in rxfifo will never be pulled
out.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
Upstreaming code already support dynamically adjust watermark with
the transfer count, so in case 'wml=1', tx wml will be set to 0
after divided by 2, which cause tx dma never start.Actually, don't
need promise tx_wml=rx_wml/2 any more, because the max wml for tx/rx
is half of fifo size and sdma script have already check the data count
in RXFIFO, if more than half of rxfifo data remain in rxfifo, tx dma
will never start transfer next 'watermark'(the max count maybe the half
of fifo size) data until the data in rxfifo less than half of rxfifo.
So never any data loss happen. Remove 'wml/2'.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
This patch will allow userspace to rotate planes by setting the
'rotation' property. Generally, 0 and 180 rotations are allowed for
pretty much all 8-bit xRGB and 2-plane YUV420 formats. 90/270 rotations
can be performed only for non-compressed tiled GPU xRGB formats. Tiled
YUV420 formats do not allow rotations at all because these formats need
DTRC for de-tiling and DTRC has no rotation support.
For more info, consult the DPR Features chapter in the reference manual.
Test example:
modetest -M imx-drm -w 27:rotation:4 -w 32:rotation:33 -w 27:alpha:30 -s
42@31:3840x2160-60@XR24 -P 32@31:3840x2160@NV21
The above will perform:
* 180 degree rotation of primary plane (XR24);
* vertical flip of first overlay plane (rotate-0 | reflect-y);
* set primary plane alpha to 30;
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
support for encoder
- Add level and profile for h264 encoder, level is mapped like level 5.1
to uLevel 51 for firmware except 1b to uLevel 14
- Add check for the function enc_mem_alloc() to ensure buffers are
allocated once to prevent memory leak
- modify streamoff() streamon() update_yuv_addr() and report_stream_done()
function to enable loop for encoder
Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>
For some eMMC, after switch to HS400ES mode, it need to config the strobe
dll target dealy even if the clock is 50MHZ or 25MHz, otherwise will meet
CMD index/crc error when send CMD13 to check the switch status. Take
imx8MM-EVK board as example, without this patch, it will meet:
[ 2.473915] IRQ status 0x000a8001
[ 2.473930] the mmc send status get -84
[ 2.473934] mmc2: mmc_select_hs400es failed, error -84
[ 2.473938] mmc2: error -84 whilst initialising MMC card
And we also meet some customer require to let eMMC work at 80MHz HS400ES
mode, so here remove the 100MHz limitation for Strobe DLL target delay
setting.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Commit 7103962dbc would return success even though we
don't have a OPP array (i.e., i.MX6). This patch completes that
in de-register part.
Signed-off-by: Marius Vlad <marius-cristian.vlad@nxp.com>
Add delay time and retry to make sure the Power state was changed.
Signed-off-by Yong Gan <yong.gan@ncp.com>
(cherry picked from commit 59a836f35807f5c09c98cf3be318ac49526bcf69)
Due to HW board design, FEC2 depend on FEC1's MII bus. But FEC1's PHY
locates on adapter PHY board that may not connect with sabreauto board.
And FEC1 depend on MAX732X to select 1.8v IO voltage, MAX732X chip is
also installed on adapter board.
In such case, MAX732X expander gpio chip is not registered, and pinctrl
driver cannot detect the gpio chip and return deferred_probe, FEC1 driver
also do defer probe and never has chance to get probed. so its MII bus is
also not regisgered. Then FEC2 also cannot work without MII bus.
To avoid FEC1 depends on MAX732X, move the output IO setting to max732x
driver by setting the default value.
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
In imx8mm-evk DTS both AUDIO PLL rates are configured, so SPDIF1
pll8k and pll11k clocks can be set accordingly.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 4ee8ed7f91ebc96ee398ec1382fac738d79cfe6c)
Set SPDIF master clock frequency as function of rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 407430a03994e4acff508afe8c9772680558c1c5)
iMX8 platforms typically have 2 AUDIO PLLs being configured to handle
8k and 11k audio rates. The patch implements the functionality to
select at runtime the appropriate AUDIO PLL as function of audio
file rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 3a29374cfbe0bfaf1785fa66163ffd3b9e30aca3)
Use txclk array to keep all 7 TxClk sources instead of keeping clocks per
rate - need to do this in order to avoid multiple prepare_enable /
disable_unprepare of the same clock during suspend/resume.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 61bc5c83af0713a09b520486051a2efcbe852763)
According to RM SPDIF TXCLK_DF mask is 7-bit wide.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 206d61281dfd245898c5971f8cbb3fbd6b1c1ef7)
Enable USBOTG2 port, there are some limitations for USB port usage
from hardware engineer:
USBOTG2 port must be connected to Host or Charger at anytime as the
power supply.
USBOTG1 port can be connected to Host, device or charger only after
USBOTG2 port is connected.
This limitation is caused by SIP team's load switch, the debouce time
is too long, so when power supply switches from one port to another,
system might lose power and reboot.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add support for i.MX8QM B0 vpu decoder and encoder and it is compatiable
with i.MX8QXP B0 VPU.
Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>
(cherry picked from commit f2d7823da29c55644299eea84a2e866ea188c698)
Modify the action for disable recoder
Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>
(cherry picked from commit 64302c586a541f8effc1e16427f50ec490918a9d)
xen does not support wu interrupt controller, it will cause dom0
boot failure, modify the nodes that use wu to use gic and remove wu.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Since IMX7ULP_PAD_PTC13 has OTG ID function, so change the iomux
to be OTG ID instead of GPIO, with that we can use usb ID event
directly for role switch, which is more quick than extcon driver.
which also help on pass the type-C compliance test: "TD 4.5.6 DRP
connect Try.SNK DRP Test"
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
The generic PCI host controller is often instantiated by hypervisors, and
they may add several of them or add them in addition to a physical host
controller like the Jailhouse hypervisor is doing. Therefore, allow for
multiple domains so that we can handle them all.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit 37bd62d224)
(cherry picked from commit 9c363f4a6e5a420218b42f442d6beef0f2eb28f2)
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for unbinding the generic PCI host controller. This is
particularly useful when working in virtual environments where the
controller may come and go, but possibly not only there.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Will Deacon <will.deacon@arm.com>
CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
(cherry picked from commit 01fcb7f777)
(cherry picked from commit 6a8a0e11c827908864cdd45623aa17b5bc80d2e5)
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The only user of pci_get_new_domain_nr() is of_pci_bus_find_domain_nr().
Since they are defined in the same file, pci_get_new_domain_nr() can be
made static, which also simplifies preprocessor conditionals.
No functional change intended.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
(cherry picked from commit ae07b78688)
(cherry picked from commit 3c52948d8a977b147e7b36172b9531eb2b7cb59d)
Signed-off-by: Peng Fan <peng.fan@nxp.com>
bio_check_eod() should check partition size not the whole disk if
bio->bi_partno is non-zero. Do this by moving the call
to bio_check_eod() into blk_partition_remap().
Based on an earlier patch from Jiufei Xue.
Fixes: 74d46992e0 ("block: replace bi_bdev with a gendisk pointer and partitions index")
Reported-by: Jiufei Xue <jiufei.xue@linux.alibaba.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
(cherry picked from commit 52c5e62d4c)
Similar to blkdev_write_iter(), return -EPERM if the partition is
read-only. This covers ioctl(), fallocate() and most in-kernel users
but isn't meant to be exhaustive -- everything else will be caught in
generic_make_request_checks(), fail with -EIO and can be fixed later.
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Ilya Dryomov <idryomov@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
(cherry picked from commit a13553c777)
Regular block device writes go through blkdev_write_iter(), which does
bdev_read_only(), while zeroout/discard/etc requests are never checked,
both userspace- and kernel-triggered. Add a generic catch-all check to
generic_make_request_checks() to actually enforce ioctl(BLKROSET) and
set_disk_ro(), which is used by quite a few drivers for things like
snapshots, read-only backing files/images, etc.
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Ilya Dryomov <idryomov@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
(cherry picked from commit 721c7fc701)
The __blk_mq_register_dev(), blk_mq_unregister_dev(),
elv_register_queue() and elv_unregister_queue() calls need to be
protected with sysfs_lock but other code in these functions not.
Hence protect only this code with sysfs_lock. This patch fixes a
locking inversion issue in blk_unregister_queue() and also in an
error path of blk_register_queue(): it is not allowed to hold
sysfs_lock around the kobject_del(&q->kobj) call.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
(cherry picked from commit 2c2086afc2)
Since I can remember DM has forced the block layer to allow the
allocation and initialization of the request_queue to be distinct
operations. Reason for this is block/genhd.c:add_disk() has requires
that the request_queue (and associated bdi) be tied to the gendisk
before add_disk() is called -- because add_disk() also deals with
exposing the request_queue via blk_register_queue().
DM's dynamic creation of arbitrary device types (and associated
request_queue types) requires the DM device's gendisk be available so
that DM table loads can establish a master/slave relationship with
subordinate devices that are referenced by loaded DM tables -- using
bd_link_disk_holder(). But until these DM tables, and their associated
subordinate devices, are known DM cannot know what type of request_queue
it needs -- nor what its queue_limits should be.
This chicken and egg scenario has created all manner of problems for DM
and, at times, the block layer.
Summary of changes:
- Add device_add_disk_no_queue_reg() and add_disk_no_queue_reg() variant
that drivers may use to add a disk without also calling
blk_register_queue(). Driver must call blk_register_queue() once its
request_queue is fully initialized.
- Return early from blk_unregister_queue() if QUEUE_FLAG_REGISTERED
is not set. It won't be set if driver used add_disk_no_queue_reg()
but driver encounters an error and must del_gendisk() before calling
blk_register_queue().
- Export blk_register_queue().
These changes allow DM to use add_disk_no_queue_reg() to anchor its
gendisk as the "master" for master/slave relationships DM must establish
with subordinate devices referenced in DM tables that get loaded. Once
all "slave" devices for a DM device are known its request_queue can be
properly initialized and then advertised via sysfs -- important
improvement being that no request_queue resource initialization
performed by blk_register_queue() is missed for DM devices anymore.
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Reviewed-by: Ming Lei <ming.lei@redhat.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
(cherry picked from commit fa70d2e2c4)
