The root clock slice at 0xbf00 is media_ldb clock, not csi_phy2_ref,
so correct it.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
For SOC like i.MX8MP, it has two sensor under the same tmu module, so
update the driver to support thermal zone for each of the sensor.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
At android ADB use case, we find the TRB ring is prepared very fast,
and it reaches empty very soon, enlarge it avoid empty trb ring
situation.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
We use polling EP_TRADDR to judge if the trb has finished, so for
request which includes multiple trb, we may quit the trb judgement
in the middle of request, in that case, we can't giveback the
request. We should only giveback the request when all the TRB in
this request has finished.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
If the dequeue pointer advances to the first trb, but the priv_req->end_trb
is the last trb, we consider the trb this dequeue pointer points doesn't
belong to this request.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For some systems, the iommu or swiotlb is used, the sg list may not
the same between before and after DMA map. So we should use
num_mapped_sgs for DMA since it is the final DMA mapped sg list
for hardware.
Reviewed-by: Jun Li <jun.li@nxp.com>
Reported-by: Zhang Sanshan <pete.zhang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The 8DX MEK only has 1GB DDR, update GPU memory as below:
- set GPU MMU mapping size to 1GB (0x80000000-0xC0000000)
- set GPU reserve size to 128MB
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 30efecdc1cef0fcff82f5cebd9823c61fee17e74)
This file is almost same as the fsl-imx8qxp-mek-dsp.dts
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 62a4fde8d81886244c59d7ebb3c0b7023ce7c57a)
Add iMX8DX MEK DTS file and its rpmsg DTS file, both re-use the
common MEK board DTS files.
The 8DX MEK only has 1GB DDR, so decrease its CMA size to 320MB.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 9ab7b42c2c99dc0e2dd7fafa5cb4cebd792aceaf)
Abstract the MEK board DTS nodes to common files imx8x-mek.dtsi
and imx8x-mek-rpmsg.dtsi. So that we can share the board nodes
between 8QXP and 8DX MEK DTS
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit e1a4c61d3c0f9593ec0d2292cc4d510bcb59a01f)
According to iMX8DX spec, the GPU and shader frequecy are both 372Mhz.
Also fix VPU decoder issue, not delete it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 2dd79af22fd753434b4213b11b799053cb9ec358)
Enable the sound-wm8960 and sound-micfil
1. Add audio device node for each IP in imx8mp
2. Add clocks for audiomix power domains
3. Enable the ASRC.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8mp there is audiomix power domains, and only
one power domain, that we don't need to call
dev_pm_domain_attach_by_id, which should return the EEXIST.
And we need to enable the MCLK output even it is in slave
mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The new features are:
1. The output is 24 more significative bits in 32bit slot
2. The fifo depth is 32 entries.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Request dma channel from specific dma controller instead of generic dma
controller list, otherwise, may get the wrong dma controller if there are
multi dma controllers such as i.mx8mp.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
It seems the audiomix_pd needs the following clocks:
IMX8MP_CLK_AUDIO_ROOT, IMX8MP_CLK_AUDIO_AXI_DIV
and IMX8MP_CLK_IPG_AUDIO_ROOT.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
The dev needs to be passed on to the clk_register
to allow the PM runtime and other dev related stuff
to work.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Since the clocks that are unused get disabled on imx_5.4.y,
the IMX8MP_CLK_AUDIO_ROOT needs to be controlled by the audiomix
driver on suspend and resume. And that allows us to get
rid of the dummy clock of_clk_get_by_name that was there to
make sure the CCM driver gets probed before the audiomix.
The order of the clocks was all wrong. Fixed that here also.
Also added the PM runtime and the AUDIO_ROOT_CLK.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
The audiomix MFD driver registers some devices, one of which maps correctly to
a reset controller type. This driver registers a reset controller for that.
For now, only the EARC specific resets are added.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Add iMX8MP hdmi driver.
Basci hdmi video function is working.
EDID function is working.
HPD basic working but not stable enough for stress test,
may not work in some TVs.
HDMI GP audio function added.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
PAVI is a submodule for imx8mp hdmimix.
Create API functions in the driver for iMX8MP HDMI driver
to enable/disable PAVI function and power.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
audiomix driver is not ready, disable it
to avoid bootup break.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Some of the i.MX SoCs have a IP for interfacing the audio dedicated IPs with
clocks, resets and interrupts, plus some DSP specific control registers.
To allow the functionality to be split between drivers, this MFD driver is
added that has only two purposes: register the devices and map the entire
register addresses. Everything else is left to the dedicated drivers that will
bind to the registered devices.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Remove CSI1_PHY_REF clock for i.MX8MN MIPI CSI since it's not being used.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Set panic threshold for Y, U, V output buffer in ISI for different version
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
For i.MX8MN/MP, dispmix/mediamix subsystem use GPR to do bus reset, but
for i.MX8QM/QXP, it doesn't. So add no-reset-control property in dts for
i.MX8QXP and QM to distinguish.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
For i.MX8MN platform, it uses dispmix-reset driver to control bus reset,
clock enable for LCDIF, DSI, CSI and ISI in dispmix GPR. But for i.MX8MP,
driver for mediamxi GPR isn't ready, so use no-reset-control property in
dts to skip parse reset node.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Remove CSI PHY clock operation because MIPI CSI only need clock
for CSI core.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Because there are three ISI version and CHNL_STS[BUF1_ACTIVE],
CHNL_STS[BUF2_ACTIVE] have reverse definition in new version,
please refer to commit fe2655a720 ("LF-356: media: imx8 isi:
fix buffer active bit change for QXP C0") for more information.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Image will be sourced from input port of the Pixel Link Crossbar. For different
soc, it has some difference, as bellow:
For i.MX8QM/QXP,
Pixel Link input 0 => DC0,
Pixel Link input 1 => DC1,
Pixel Link input 2 => MIPI CSI0,
Pixel Link input 3 => MIPI CSI1,
Pixel Link input 4 => HDMI,
Pixel Link input 4 => Parallel CSI,
Pixel Link input 5 => MEM,
HDMI and Parallel CSI share the same input port.
For i.MX8MN
Pixel Link input 0 => MIPI CSI0,
Pixel Link input 1 => MIPI CSI1,
Don't support other port.
So add it platform data for ISI pixel-link port selection
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
IER[24:16] used to enable/disable ISI line buffer panic, overflow
generation of interrupt to the processor. With the improvement of
ISI, there are three version for it and have some changes in IER
bit definition. So add it as platform data for different version.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Add ISI, MIPI CSI and OV5640 device node for i.MX8MP platform. i.MX8MP evk
board support dual mipi csi interfaces. Because the two csi interface share
the same RST, PWDN and MCLK pin, which will cause some problem when user
change camera work sequence, so disable the second one until fix the issue
on board.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Remove mediamix-reset and its child node in dts because mediamix reset
driver for i.MX8MP is not ready;
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Should use IMX8MP_CLK_GPU3D_SHADER_DIV instead of IMX8MP_CLK_DUMMY clk.
Signed-off-by: Ella Feng <ella.feng@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
The LCDIFv3 panic threshold enable register should be
'LCDIFV3_INT_ENABLE_D1' instead of 'LCDIFV3_PANIC0_THRES'.
So correct it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
According to the LCDIFv3 specification, the input pixel
FIFO size is 8K(512 * 128bit) and the panic threshold
low and high should be chosen from 0 to 511, so correct
the thresholds calculation.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Jian Li <jian.li@nxp.com>
Add new frequency support for video PLL, and there is restriction
for audio PLL that the frequency is up to 650MHz, correct them as
well.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Bypass the mediamix resets for dsim on imx8mp temporarily,
since on imx8mp platform, the mediamix resets code is not
ready and the imx8mp ATF has done this resets for DSIM.
And after the reset driver code is ready, this bypass will
be removed then.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Allows the LCDIFv3 to be one of the supported
client components. And set the 'legacyfb_depth'
of LCDIFv3 to be 32.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This is a new DRM/KMS driver for LCDIFv3 controller
which conforms to the IMX DRM Core framework. It
provides support for CRTCs, Planes and mode config
of KMS.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The LCDIFv3 core driver is responsible to provide
controller registers configuration and create the
platform devices for the child port nodes. And the
platform devices later will attach to the related
DRM/KMS drivers via name match. And the LCDIFv3 is
completely different from the LCDIF controller
which is used on imx8mm and imx8mn platforms.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Add the 'blk-ctl' property for lcdif1 which is used to
do the lcdif controller reset during probe stage to
avoid any conflict with uboot splash screen settings.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The block control module in mediamix is responsible for
clocks gating, sub-modules reset and other module control
for lcdif, dsi, csi, isp, isi and etc sub-modules which
are included in the mediamix. So create a device node to
simplify the usages.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The 'cfg' clock for mipi dsi is used for register
accesses and the mipi apb clock should be enabled
for this purpose, so correct it in the mipi dsi
device node.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Adds compatible string for "nxp,cbtl04gp", which is also super speed
mux switch for type-c orientation, controlled by one GPIO.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
imx8mp SoC has the similar USB3 PHY with different version than
imx8mq, add compatible string "fsl,imx8mp-usb-phy", which has
the same properties.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
iMX8MP USB3 integrate Synopsys DesignWare Cores SuperSpeed
USB 3.0 Controller 3.30b IP, the glue layer is added to support
wakeup from low power mode.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
usb0 with typec is enabled as dual role port, and usb1 with type-A
socket is enabled as host only port. Make IMX8MP_CLK_HSIO_ROOT as
init-on-array because currently usb power domain is not ready, this
clock should be controlled by hsiomix power domain.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Use parent and child node as we need a glue layer driver
to support wakeup. Adds snps,dis_u2_susphy_quirk property
because currently there is one issue, USB2 PHY suspend
will make host can't work with USB3 device; Adds
snps,dis_u3_susphy_quirk for now to avoid gadget command
timeout.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Set the quirk flag of XHCI_NO_64BIT_SUPPORT if the XHC actually does
not support 64-bit address memory pointers on some platforms.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
imx8mp SoC has the similar phy as imx8mq but with a few different
settings for ref clock.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
iMX8MP integrate DWC3 core and adds wakeup support, the glue layer
mainly used to support low power suspend.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
gputop patch added gcvDB_CONTIGUOUS and gcvDB_COMMAND_BUFFER types,
these need create more system memory to maintain database frequently,
gpu out of memory issue happen when run openGL ES CTS on imx6 boards,
this patch can avoid system memory allocation for new database types,
combine gcvDB_CONTIGUOUS memory type into video memory database,
remove gcvDB_COMMAND_BUFFER as not in database counters.
Fix "LF-165 [#imx-1870] gputop counter test failed"
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
need check memory object type when remove database,
Fix "LF-165 [#imx-1870] gputop counter test failed"
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Fix Coverity issue of uninitialized variable, which is introduced by
"LF-165 [#imx-1870] gputop counter test failed"
Date: 10 Jan, 2020
Signed-off-by: Ella Feng <ella.feng@nxp.com>
Use gcmPTR_TO_UINT64() for converting pointer to int for both 64 bit and 32 bit system.
Fix previous patch, "LF-165 [#imx-1870] gputop counter test failed".
Signed-off-by: Xianzhong Li <xianzhong.li@nxp.com>
Signed-off-by: Ella Feng <ella.feng@nxp.com>
Add GPU 3D/2D/VIP support for 8mp evk board.
Enlarge cma to 960M. Also enlarge GPU reserve memory to 256M.
Signed-off-by: Ella Feng <ella.feng@nxp.com>
When add buffer to queue which status should be active.
When firmware release one buffer, could re-add it to queue if
its status is active.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Acked-by: ming_qian <ming.qian@nxp.com>
A53 CCM clk root only accepts input up to 1GHz, however
the A53 core could run above 1GHz which voliates the CCM limitation.
There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.
The A53 CCM clk root should only be used when need to change ARM PLL
frequency.
Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Enable arm_pll_out to avoid disable the clock when set a53 core parent.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
A53 CCM clk root only accepts input up to 1GHz, however
the A53 core could run above 1GHz which voliates the CCM limitation.
There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.
The A53 CCM clk root should only be used when need to change ARM PLL
frequency.
Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Enable arm_pll_out to avoid disable the clock when set a53 core parent.
Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
A53 CCM clk root only accepts input up to 1GHz, however
the A53 core could run above 1GHz which voliates the CCM limitation.
There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.
The A53 CCM clk root should only be used when need to change ARM PLL
frequency.
Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Enable arm_pll_out to avoid disable the clock when set a53 core parent.
Fixes: ba5625c3e2 ("clk: imx: Add clock driver support for imx8mm")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
A53 CCM clk root only accepts input up to 1GHz, however
the A53 core could run above 1GHz which voliates the CCM limitation.
There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.
The A53 CCM clk root should only be used when need to change ARM PLL
frequency.
Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Enable arm_pll_out to avoid disable the clock when set a53 core parent.
Fixes db27e40b27 ("clk: imx8mq: Add the missing ARM clock")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The current implementation of "stmmac_dt_phy" function initializes
the MDIO platform bus data, even in the absence of PHY. This fix
will skip MDIO initialization if there is no PHY present.
Fixes: 7437127 ("net: stmmac: Convert to phylink and remove phylib logic")
Acked-by: Jayati Sahu <jayati.sahu@samsung.com>
Signed-off-by: Sriram Dash <sriram.dash@samsung.com>
Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
For ARCHs that don't support 64 bits division we need to use the
helpers.
Fixes: b60189e039 ("net: stmmac: Integrate EST with TAPRIO scheduler API")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This can be useful for debug. Add these counters on GMAC5+ cores just
like we did for XGMAC.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds the HW specific support for Frame Preemption on XGMAC3+ cores.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds the HW specific support for Frame Preemption on GMAC5+ cores.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds the support for Frame Preemption using TAPRIO API. This works along
with EST feature and allows to select if preemptable traffic shall be
sent during specific queues opening time.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that we have the EST code for XGMAC and QoS we can use it with the
TAPRIO scheduler. Integrate it into the main driver and use the API to
configure the EST feature.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds the support for EST in XGMAC cores. This feature allows to offload
scheduling of queues opening time to the IP.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds the support for EST in GMAC5+ cores. This feature allows to offload
scheduling of queues opening time to the IP.
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When we have pending packets we re-arm the TX timer with a magic value.
This changes the re-arm of the timer from 10us to the user-defined
coalesce value. As we support different speeds, having a magic value of
10us can be either too short or to large depending on the speed so we
let user configure it. The default value of the timer is 1ms but it can
be reconfigured by ethtool.
Changes from v1:
- Reword commit message (Jakub)
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
By using this mechanism we can get rid of the not so nice method of
scheduling TX NAPI when the RX was scheduled. No bandwidth reduction was
seen with this change.
Changes from v1:
- Remove useless comment (Jakub)
- Do not bind the TX clean to NAPI budget (Jakub)
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
DMA Capabilites have grown but the DebugFS that shows this info has not
been updated. Lets add the missing information.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
If TX Coalesce timer is enabled we should always arm it, otherwise we
may hit the case where an interrupt is missed and the TX Queue will
timeout.
Arming the timer does not necessarly mean it will run the tx_clean()
because this function is wrapped around NAPI launcher.
Fixes: 9125cdd1be ("stmmac: add the initial tx coalesce schema")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
XGMAC supports maximum MTU that can go to 16KB. Lets add this check in
the calculation of RX buffer size.
Fixes: 7ac6653a08 ("stmmac: Move the STMicroelectronics driver")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The 16KB RX Buffer must also be 16 byte aligned. Fix it.
Fixes: 7ac6653a08 ("stmmac: Move the STMicroelectronics driver")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We need to align the RX buffer size to at least 16 byte so that IP
doesn't mis-behave. This is required by HW.
Changes from v2:
- Align UP and not DOWN (David)
Fixes: 7ac6653a08 ("stmmac: Move the STMicroelectronics driver")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When switching between buffer sizes we need to clear the previous value.
Fixes: d6ddfacd95 ("net: stmmac: Add DMA related callbacks for XGMAC2")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Only the last received buffer contains the FCS field. Check for end of
packet before trying to strip the FCS field.
Fixes: 88ebe2cf7f ("net: stmmac: Rework stmmac_rx()")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The maximum MTU value is determined by the maximum size of TX FIFO so
that a full packet can fit in the FIFO. Add a check for this in the MTU
change callback.
Also check if provided and rounded MTU does not passes the maximum limit
of 16K.
Changes from v2:
- Align MTU before checking if its valid
Fixes: 7ac6653a08 ("stmmac: Move the STMicroelectronics driver")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Split Header feature needs to know the size of RX buffer but current
code is determining it too late. Fix this by moving the RX buffer
computation to earlier stage.
Changes from v2:
- Do not try to align already aligned buffer size
Fixes: 67afd6d1cf ("net: stmmac: Add Split Header support and enable it in XGMAC cores")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When running the MC and UC filter tests we setup a multicast address
that its expected to be blocked. If the number of available multicast
registers is zero, driver will always pass the multicast packets which
will fail the test.
Check if available multicast addresses is enough before running the
tests.
Fixes: 091810dbde ("net: stmmac: Introduce selftests support")
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There are no clocks, resets or gpios referenced by Tegra ACPI
device so don't access clocks, resets or gpios interface with
ACPI device.
Clocks, resets and GPIOs for ACPI devices will be handled via
ACPI interface.
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Refer to the databook of DesignWare Cores Ethernet MAC Universal:
6.2.1.5 Register 4 (Transmit Descriptor List Address Register
If this register is not changed when the ST bit is set to 0, then
the DMA takes the descriptor address where it was stopped earlier.
The stmmac_tx_err() does zero indices to Tx descriptors, but does
not reset HW current Tx descriptor address. To fix inconsistency,
the base address of the Tx descriptors should be rewritten before
restarting Tx.
Signed-off-by: Jongsung Kim <neidhard.kim@lge.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The page pool keeps track of the number of pages in flight, and
it isn't safe to remove the pool until all pages are returned.
Disallow removing the pool until all pages are back, so the pool
is always available for page producers.
Make the page pool responsible for its own delayed destruction
instead of relying on XDP, so the page pool can be used without
the xdp memory model.
When all pages are returned, free the pool and notify xdp if the
pool is registered with the xdp memory system. Have the callback
perform a table walk since some drivers (cpsw) may share the pool
among multiple xdp_rxq_info.
Note that the increment of pages_state_release_cnt may result in
inflight == 0, resulting in the pool being released.
Fixes: d956a048cd ("xdp: force mem allocator removal and periodic warning")
Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com>
Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that TX Coalesce has been rewritten we no longer need this
additional interrupt enabled. This reduces CPU usage.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Coalesce logic currently increments the number of packets and sets the
IC bit when the coalesced packets have passed a given limit. This does
not reflect very well what coalesce was meant for as we can have a large
number of packets that are coalesced and then a single one, sent later
on that has the IC bit.
Rework the logic so that it coalesces only upon a limit of packets and
sets the IC bit for large number of packets.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Tune-up the defalt coalesce settings for optimal values. This gives the
best performance in most of the use-cases.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
RFA and RFD should not be dependent on FIFO size. In fact, the more FIFO
space we have, the later we can activate Flow Control. Let's use
hard-coded values for RFA and RFD for all FIFO sizes with the exception
of 4k, which is a special case.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
RFA and RFD should not be dependent on FIFO size. In fact, the more FIFO
space we have, the later we can activate Flow Control. Let's use
hard-coded values for RFA and RFD for all FIFO sizes with the exception
of 4k, which is a special case.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
For performance reasons, sometimes using the minimum RX Coalesce value
is not optimal. Lets setup a default value that is optimal in most of
the use cases.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We may only want to use the RX Watchdog so lets check if RX Coalesce
settings are non-zero and only set the RX Interrupt on Completion bit if
its not.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Implement the UDP Segmentation Offload feature in stmmac. This is only
available in GMAC4+ cores.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This looks over-engineered. Let's use some helpers to get the buffer
length and hereby simplify the stmmac_rx() function. No performance drop
was seen with the new implementation.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
XGMAC3 supports full CBS features with speeds that can go up to 10G so
we can now remove the maximum speed check of CBS.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the support for C45 PHYs in the MDIO callbacks for XGMAC. This was
tested using Synopsys DesignWare XPCS.
v2:
- Pull out the readl_poll_timeout() calls into common code (Andrew)
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
GMAC4+ cores also support the Split Header feature.
Add the support for Split Header feature in the RX path following the
same implementation logic that XGMAC followed.
Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
All the registers and the functionalities used in the callback
dwmac5_flex_pps_config() are common between dwmac 4.10a [1] and
5.00a [2].
Reuse the same callback for dwmac 4.10a too.
Tested on STM32MP15x, based on dwmac 4.10a.
[1] DWC Ethernet QoS Databook 4.10a October 2014
[2] DWC Ethernet QoS Databook 5.00a September 2017
Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
GMAC4+ cores support Layer 3 and Layer 4 filtering. Add the
corresponding callbacks in these cores.
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There is a NOTE at the section "Detection and correction of memory errors":
All FlexCAN memory must be initialized before starting its operation in
order to have the parity bits in memory properly updated. CTRL2[WRMFRZ]
grants write access to all memory positions that require initialization,
ranging from 0x080 to 0xADF and from 0xF28 to 0xFFF when the CAN FD feature
is enabled. The RXMGMASK, RX14MASK, RX15MASK, and RXFGMASK registers need to
be initialized as well. MCR[RFEN] must not be set during memory initialization.
Memory range from 0x080 to 0xADF, there are reserved memory (unimplemented
by hardware), these memory can be initialized or not.
Initialize all FlexCAN memory before accessing them, otherwise, memory
errors may be detected. The internal region cannot be initialized when
the hardware does not support ECC.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
commit cdce844865 ("can: flexcan: add vf610 support for FlexCAN")
From above commit by Stefan Agner, the patch just disables
non-correctable errors interrupt and freeze mode. It still can correct
the correctable errors since ECC enabled by default after reset (MECR[ECCDIS]=0,
enable memory error correct) if HW supports ECC.
commit 5e269324db ("can: flexcan: disable completely the ECC mechanism")
From above commit by Joakim Zhang, the patch disables ECC completely (assert
MECR[ECCDIS]) according to the explanation of FLEXCAN_QUIRK_DISABLE_MECR that
disable memory error detection. This cause correctable errors cannot be
corrected even HW supports ECC.
The error correction mechanism ensures that in this 13-bit word, errors
in one bit can be corrected (correctable errors) and errors in two bits can
be detected but not corrected (non-correctable errors). Errors in more than
two bits may not be detected.
If HW supports ECC, we can use this to correct the correctable errors detected
from FlexCAN memory. Then disable non-correctable errors interrupt and freeze
mode to avoid that put FlexCAN in freeze mode.
This patch adds correctable errors correction when HW supports ECC, and
modify explanation for FLEXCAN_QUIRK_DISABLE_MECR.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Add 'FRAME_SKIP' status to record 'MEDIA_PLAYER_SKIPPED_FRAME_ID'
frame. Instead of use 'FRAME_READY' that will lead to this buffer
no chance to re-add to available buffer queue.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: ming_qian <ming.qian@nxp.com>
There are snvs design issue on legacy i.mx6q/dl chip so gpio key used
instead of snvs_pwrkey on i.mx6qdl-sabresd board. Disable snvs_pwrkey to
match board design though there is another software workaround for such
design issue in the future:
https://lore.kernel.org/linux-arm-kernel/20191125161210.8275-1-robin@protonic.nl/
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 26e4d220c335f2225fc35ba7f28acc5671e5483c)
Add the MU clock mandatory required by MU module and mailbox
would be used in RPMSG.
Check M core is enabled or not, to make sure M core's uart consol
work well.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
Add clocks mangement for gamc driver.
Only enable clocks when netif is running, otherwise
keep all clocks disabled. If the dwmac driver is built as
module, it also keeps clocks off when the module is removed.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Current ptp driver, for event 'HWTSTAMP_FILTER_PTP_V2_EVENT',
it only takes timestamp for sync, Pdelay_req, Pdelay_resp evnets.
Then it causes below issue when test E2E case:
ptp4l[2479.534]: port 1: received DELAY_REQ without timestamp
ptp4l[2481.423]: port 1: received DELAY_REQ without timestamp
ptp4l[2481.758]: port 1: received DELAY_REQ without timestamp
ptp4l[2483.524]: port 1: received DELAY_REQ without timestamp
ptp4l[2484.233]: port 1: received DELAY_REQ without timestamp
ptp4l[2485.750]: port 1: received DELAY_REQ without timestamp
ptp4l[2486.888]: port 1: received DELAY_REQ without timestamp
ptp4l[2487.265]: port 1: received DELAY_REQ without timestamp
ptp4l[2487.316]: port 1: received DELAY_REQ without timestamp
For dwmac v5.10a, enabling all events and general messages
timestamps by setting bits 17/16 to 01 and clearing bits 15,14
to 0, which can support rx filter including SYNC, Follow_Up,
Delay_Req, Delay_Resp, Pdelay_Req, Pdelay_Resp and
Pdelay_Resp_Follow_U pmessages.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
msg hasn't process in time
firmware write event message to message buffer, and trigger an interrupt,
driver will read the message and store it into a fifo. and call queue_work.
If the work is scheduling but have exited the while loop,
it may cause the event won't be processed until another event received.
So in some case, the stream may hang
as the next event is depends on the driver process the current event.
vpu_windsor may have the same issue.
Signed-off-by: Ming Qian <ming.qian@nxp.com>
The i.MX8MP DDR Perf JSON file only give the LSB 5 bits, also need point
out the MSB 3 bits for each master. This patch corrects the master ID
and makes some masters name more readable.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
For i.MX8MP, we cannot ensure that cycle counter overflow occurs at
least 4 times as often as other events. Due to byte counters will count for
any event configured, it will overflow more often. And if byte counters
oveflow that related counters would stop since they share the
COUNTER_CNTL. We can speed up cycle counter overflow frequency by
setting counter parameter(CP) field of cycle counter.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
DDR perf driver now only supports free running counter, add stop counter
support which is compabile with free running counter, since i.MX8MP is
not free running.
Add spinlock for counter value update and clear.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Although MAC fuse is not hard wired and is fully handled by
software, but we judge the correct mapping by below name string:
IP fuse table string uboot/kernel net interface
-----------------------------------------------------------
ENET: ENET1 MAC1 eth0
EQOS TSN: ENET2 MAC2 eth1
The ethernet RJ45 labels on imx8mp EVK board：
IP REVA Next
-----------------------------------
ENET： ENET1 ENET1
EQOS TSN： ENET0 ENET2
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
currently, vpu encoder only support integer frame rate,
we need improve the firmware to support fractional frame rate
so extends the range of frame rate from integers to real numbers
Signed-off-by: Ming Qian <ming.qian@nxp.com>
export fw log via debugfs
the fw log can help us debug some firmware issue.
keep consistent with the decoder
Signed-off-by: Ming Qian <ming.qian@nxp.com>
Add pwm1/2/4 nodes support.
Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM
pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM
pwm4 on pin SAI5_RXFS for J21-32
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
On sabreauto board, the usdhc1 is connected to the base board, to
make sd card work stable on base board sd slot, need to increase
the I/O drive strength.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
The source of per clock should be source 0 which connected to
can_clk_root.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Remove the unused interrupt for CAN, this interrupt is for ECC and now
driver disabled ECC function.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
According to design timing requirement, when SoC is running at OD mode's
voltage/frequency, ARM can NOT run at ND voltage, choose OD mode's typical
voltage for 1.2GHz/1.6GHz.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
enet_qos is for eqos tsn AXI bus clock whose clock source is from
ccm_enet_axi_clk_root, but depends on CCM_CCGR59 and CCM_CCGR64.
So correct enet_qos root clock's parent clock to sim_enet.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Current timeout value is not enough for gmac5 dma reset
on imx8mp platform, increase the timeout range.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Use platform_get_irq_byname_optional() to get optional irq.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add "snps,dwmac-5.10a" compatible string for 5.10a version,
and move some plat data from glue layer into platform layer.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
NXP imx8 family chips support Synopsys MAC 5.10a IP.
This patch adds settings for logical glue logic:
- clocks
- dwmac address width
- low power wake up
- phy interface mode selection
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The patch fixes the build warnings by adding the comments 'fall through' to avoid the build warnings
The patch also initializes the value pgid_val to avoid the warning: ‘pgid_val’ may be used uninitialized
The patch should not and will not have any function impact.
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c: In function ‘ValidateNextEngineParams’:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_cc.c:1681:51: warning: this statement may fall through [-Wimplicit-fallthrough=]
In file included from drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c:40:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c: In function ‘GetGenHdrCode’:
drivers/net/ethernet/freescale/sdk_fman/inc/error_ext.h:446:12: warning: this statement may fall through [-Wimplicit-fallthrough=]
In file included from drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c:40:
drivers/net/ethernet/freescale/sdk_fman/inc/error_ext.h:446:12: warning: this statement may fall through [-Wimplicit-fallthrough=]
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c:255:13: note: here
255 | case (HEADER_TYPE_ETH):
| ^~~~
In file included from drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c:40:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_kg.c:278:13: note: here
278 | case (HEADER_TYPE_MINENCAP):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c: In function ‘BuildHmct’:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c:673:32: warning: this statement may fall through [-Wimplicit-fallthrough=]
673 | tmpReg = HMCD_INSRT_UDP_LITE;
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Pcd/fm_manip.c:674:21: note: here
674 | case (e_FM_PCD_MANIP_INSRT_BY_HDR_UDP):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c: In function ‘FM_PORT_Config’:
arch/arm64/include/asm/io.h:36:22: warning: this statement may fall through [-Wimplicit-fallthrough=]
36 | #define __raw_writel __raw_writel
drivers/net/ethernet/freescale/sdk_fman/src/inc/types_linux.h:99:25: note: in expansion of macro ‘__raw_writel’
99 | #define out_be32(a, v) __raw_writel(__cpu_to_be32(v), a)
| ^~~~~~~~~~~~
drivers/net/ethernet/freescale/sdk_fman/src/inc/types_linux.h:121:37: note: in expansion of macro ‘out_be32’
121 | #define WRITE_UINT32(arg, data) out_be32(&(arg), data)//*(volatile unsigned int *)(&(arg)) = (data)
| ^~~~~~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:2404:13: note: in expansion of macro ‘WRITE_UINT32’
2404 | WRITE_UINT32( p_FmPort->p_FmPortBmiRegs->txPortBmiRegs.fmbm_tfp,
| ^~~~~~~~~~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:2407:9: note: here
2407 | case (e_FM_PORT_TYPE_TX_10G):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:2435:60: warning: this statement may fall through [-Wimplicit-fallthrough=]
2435 | p_FmPort->p_FmPortDriverParam->noScatherGather =
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:2438:9: note: here
2438 | case (e_FM_PORT_TYPE_OH_HOST_COMMAND):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c: In function ‘FM_PORT_ModifyCounter’:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:4268:16: warning: this statement may fall through [-Wimplicit-fallthrough=]
4268 | if ((p_FmPort->portType == e_FM_PORT_TYPE_RX)
| ^
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:4273:9: note: here
4273 | case (e_FM_PORT_COUNTERS_ENQ_TOTAL):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c: In function ‘SetPcd’:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:1396:24: warning: this statement may fall through [-Wimplicit-fallthrough=]
1396 | tmpReg = NIA_KG_CC_EN;
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/Port/fm_port.c:1397:13: note: here
1397 | case (e_FM_PORT_PCD_SUPPORT_PRS_AND_KG):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c: In function ‘FM_GetCounter’:
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c:4804:16: warning: this statement may fall through [-Wimplicit-fallthrough=]
4804 | if ((p_Fm->p_FmStateStruct->revInfo.majorRev == 4) ||
| ^
drivers/net/ethernet/freescale/sdk_fman/Peripherals/FM/fm.c:4810:9: note: here
4810 | case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c: In function ‘fm_get_counter’:
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c:1803:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
1803 | if (p_fm->p_FmStateStruct->revInfo.majorRev >= 6)
| ^
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_sysfs_fm.c:1806:2: note: here
1806 | case (e_FM_COUNTERS_ENQ_TOTAL_FRAME):
| ^~~~
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c: In function ‘compat_copy_fm_pcd_cc_next_engine’:
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c:378:33: warning: this statement may fall through [-Wimplicit-fallthrough=]
378 | param->manip_id = compat_pcd_id2ptr(compat_param->manip_id);
| ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c:379:13: note: here
379 | default:
| ^~~~~~~
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c:405:40: warning: this statement may fall through [-Wimplicit-fallthrough=]
405 | compat_param->manip_id = compat_pcd_ptr2id(param->manip_id);
| ~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/ethernet/freescale/sdk_fman/src/wrapper/lnxwrp_ioctls_fm_compat.c:406:13: note: here
406 | default:
| ^~~~~~~
In file included from drivers/net/ethernet/mscc/ocelot.h:21,
from drivers/net/ethernet/mscc/ocelot_tsn.c:12:
drivers/net/ethernet/mscc/ocelot_tsn.c: In function ‘ocelot_seq_gen_set’:
include/soc/mscc/ocelot.h:499:48: warning: ‘pgid_val’ may be used uninitialized in this function [-Wmaybe-uninitialized]
499 | #define ocelot_write_rix(ocelot, val, reg, ri) __ocelot_write_ix(ocelot, val, reg, reg##_RSZ * (ri))
| ^~~~~~~~~~~~~~~~~
drivers/net/ethernet/mscc/ocelot_tsn.c:755:5: note: ‘pgid_val’ was declared here
755 | u8 pgid_val, fwdport;
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Cc: Madalin Bucur <madalin.bucur@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
memrepair clock needs to be on for HDMIMIX memrepair before
de-assert HDMIMIX reset. If the clock is run time off by Linux,
the memrepair will not be functional. Since there is no software
user in Linux side, let's remove this clock and leave it
default on.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable cpu-idle for i.MX8MP, system counter also needs to be added
as broadcast timer, 2 states supported as below:
root@imx8mpevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/name
WFI
root@imx8mpevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/name
cpu-pd-wait
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
coreInfoArray use offset as coreIndex, not use hardware core
Fix: 8744fe58453c("MGS-5372 [#imx-1708] Fix the VX/CL apps hang for 865 GPU/VIP
")
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
1M GPU MMU pages are used for flat mapping by default,
there is no performance benefit for dynamic mapping.
disabled 1M MMU page to fix unstable GPU problems.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Some drm common code changed, gpu driver need do the matched update on 5.4 kernel.
1. Some drm API name changed.
drm_gem_object_unreference_unlocked() rename as drm_gem_object_put_unlocked().
drm_dev_unref() rename as drm_dev_put().
2. Drm/prime remove DRIVER_PRIME, driver needs do the matched update.
3. API gem_prime_export remove input parameter "struct drm_device *dev".
Signed-off-by: Richard Liu <xuegang.liu@nxp.com>
BUG25711 CL244484 Android CTS: some cases fail in gles2/gles3
group on imx815 AndroidP/wayland BUG25710 CL244484 [vkcts1.1.3]:fail when run
"dEQP-VK.glsl.limits.near_max.fragment_input.*" on 815 wayland BUG25646
CL244484 [vkcts1.1.3]:dEQP-VK.glsl.limits.near_max.fragment_input.* fail on
815 wayland
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
* linux-lts-nxp/lf-5.4.y: (11 commits)
LF-625 PCI: imx: pcie ep probe failed
LF-637 pwm: imx27: Eliminate error message for defer probe
MLK-22620: ASoC: imx-ak5558: Force tdm mode for ASRC case
...
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
According to design, for overdrive mode, NOC/NOC_IO/GIC need to run
at higher speed as below:
NOC: 1000MHz;
NOC_IO: 800MHz;
GIC: 500MHz;
Configure them to expected frequency by default.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
The atu_base should be assigned if the iatu_unroll_enabled is true.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
For defer probe error, no need to output error message which
will cause confusion.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
In order to support the odd channels for ASRC case, we
force to enable TDM mode. In non-tdm case, we enable
multi lane to support multi channels, but limitation
is odd multi channels can't be supported.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The source of reg_vdd3p0 should be from USB_VBUS instead of VDD_HIGH_IN
which is provied by PMIC. Correct it, otherwise below error will come out
on i.mx6sll-evk board since usb driver want to raise voltage to 3.2V and
mismatch is here(3.2V + 125mv = 3.325V > 3.3V max):
[ 5.836553] SW2: unsupportable voltage range: 3325000-3300000uV
[ 5.843066] regulator regulator.1: Failed to increase supply voltage: -22
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
ls208xa encounteded below USB failure when applying dma-coherent, remove it.
[ 11.087839] xhci-hcd xhci-hcd.1.auto: Error while assigning device slot ID
[ 11.094730] xhci-hcd xhci-hcd.1.auto: Max number of devices this xHCI host supports is 127.
[ 11.103103] xhci-hcd xhci-hcd.0.auto: Error while assigning device slot ID
[ 11.109985] xhci-hcd xhci-hcd.0.auto: Max number of devices this xHCI host supports is 127.
[ 11.118348] usb usb2-port1: couldn't allocate usb_device
[ 11.123680] usb usb4-port1: couldn't allocate usb_device
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Add bus recovery feature for LPI2C.
Need add gpio pinctrl, scl-gpios and sda-gpios configuration in dts.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
In low-latency mode, donot need set end_flag if scode type is
BUFFLUSH_PADDING_TYPE. Otherwise, firmware will ignore frame
threshold then may affect another instance performance.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
Acked-by: ming_qian <ming.qian@nxp.com>
export frame threshold of frame mode,
and then we can modify the threshold without update firmware.
It can be used for debug
Signed-off-by: ming_qian <ming.qian@nxp.com>
Acked-by: <shijie.qin@nxp.com>
LS2088ADB has one spansion flash s25fs512s of size 64M.
Update qspi dts entry for the board using compatibles as "jedec,spi-nor"
to probe flash successfully. Also, align properties with other board dts
properties.
Since device properties are different, so remove fsl, ls1021a-qspi.
ls1021a-qspi is to be used only for Big-endian verion of QSPI
controller. Use dt-bindings constants in interrupts instead of using
numbers.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Improve DT files by below:
1. Fix some nodes reg address format issue;
2. Sort nodes using either address or alphabet sequence;
3. Remove unnecessary code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Add "fsl,imx8mm-anatop" as fallback compatible for anatop node to support
reading SoC revision.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Since using power domains to handle the mipi phy power
management in gpcv2 driver for mipi phy domain, remove
the legacy unncessary regulator related code for mipi
phy.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Since the gpcv2 driver has been changed to use
power domains for all the modules, so add the
'power-domains' property for mipi dsi and remove
previous 'mipi-phy' supply property for dphy
power management.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
i.MX8MP uses operating-points-v2, add it to blacklist for proper
OPPs initialization.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add i.MX8MP cpufreq DT support for speed grading and market
segment check.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Select CONFIG_PINCTRL_IMX8MP by default to support i.MX8MP pinctrl.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since dwc3 cache type has been set to cacheable, apply dma-coherent to
all dwc3 nodes accordingly.
Note: For LS1043A and LS1046A, since QE-HDLC still doesn't support
dma-coherent, we cannot directly revert cd1a4f3c (sdk: dts: ls104x move
dma-coherent from soc to its child nodes) to recover dma-coherent for
soc.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
There is an official update for eSDHC tuning erratum A-008171.
This patch is to implement the changes,
- Affect all revisions of SoC.
- Changes for tuning window checking.
- Hardware hits a new condition that tuning succeeds although
the eSDHC might not have tuned properly for type2 SoCs
(soc_tuning_erratum_type2[] array in driver). So check
tuning window after tuning succeeds.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Convert to use a new function esdhc_tuning_window_ptr() to
get tuning window start point and end point.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
* linux-lts-nxp/lf-5.4.y: (7 commits)
LF-592 usb: chipidea: handle single role for usb role class
LF-568-2: drm: gpu: bridge: cdns: Add force mode set flag
LF-568-1: drm: bridge: cdns: dp: change bridge_enable/disable name
...
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
If usb port is configed to be single role, but usb role class
is trying to set unavailable role, don't try to do role change.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
In DRM framework, when hdmi/dp cable plugout/plugin in the same HDMI
sink, because the video mode is same, DRM will not call mode_set.
But for HDMI 2.0 sink the SCDC configurate will lost, and DP sink
linktraning status will lost too after cable plugout then plugin.
Currently, hdmi/dp driver will call mode_set function in HPD thread,
But the mode_set function is called out of DRM framework, and it have
chance to fail.
In the patch add force_mode_set flag, set the crtc_state->mode_changed
to force drm call mode_set when cable plugin.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Some registers on pfuze3000 will lost after exit from LPSR, need restore them,
otherwise system may reboot with below command after system enter LPSR one time:
root@imx7d_all:~# echo enabled > /sys/class/tty/ttymxc0/power/wakeup
root@imx7d_all:~# echo mem > /sys/power/state
because LDOGCTL not recover as 1. Add 'fsl,lpsr-mode' property to this case,
please add this property if your board support LPSR mode as imx7d-12x12-lpddr3-arm2
board.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 4aa2a2a928)
On i.mx8mq-evk, sw1ab/sw1c could be enable/disable in runtime.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Correct supply for vpu since it source from pgc_vpu which relies on
sw1c_reg.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
To save power consumption, turn off the REFCLK and set the test power
down mode when link is down during the initialization.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
* linux-lts-nxp/lf-5.4.y: (23 commits)
sdk_dpaa: ceetm: coding style cleanup
sdk_dpaa: ceetm: enable building as a module
sdk_dpaa: ceetm: export the ceetm_tx symbol
...
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Enable building the driver as a module by adding the required module
macros and creating the fsl_ceetm object file.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
In order to enable building the driver as a module, export the ceetm_tx
symbol for the DPAA Ethernet driver to use.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
In order to enable building the driver as a module, remove the
references to the undefined qdisc_lookup symbol.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The VGEN_1V8 is used on SCH-28857 REV B sabresd board.
Add the according vgen3 into PCIe node.
Thus, the external OSC can keep toggling with the correct
power supply.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <Fugang.duan@nxp.com>
Current i2c4/uart1 clocks ID have conflict with pwm2/pwm3,
correct them.
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
In imx8mn, M7 image has poor quality for 8kHz ~ 22kHz sample rate
case, but M7 side don't want to fix this issue in their image, so
we remove these sample rate in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
the usdhc IP of imx8mn and imx8mm is the same, so let imx8mn share
the compatible with imx8mm. so that it can support HS400ES and CMDQ.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
If usdhc want to support SDR104/HS200, it need to do tuning, so need
to config the tuning step and tuning start tap. Otherwise some card may
meet tuning issue as the following log show:
mmc2: Tuning failed, falling back to fixed sampling clock
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
The A050385 erratum extends the A010022 erratum by defining additional
FMan lock-up conditions and suggests new w/a restrictions.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Detect if the platform is vulnerable to the A010022 erratum based on device
tree properties instead of the SoC family.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
With certain limitation, SG frames can be used safely without triggering
the errata.
Buffers can be recycled, even after realigning the data.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
An skb is in no danger of triggering the errata under the following
conditions:
- the paged data doesn't cross a 4K page boundary OR the linear data
is aligned to 256 bytes when crossing a 4K page boundary
- the linear and the paged data are 16 byte aligned
- the paged data is a multiple of 16 bytes in size
Optimize the detection for each skb that might trigger the errata. Parse
the skb twice, at most, and realign it only once.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Avoid a crash by verifying the allocation return status.
Use the standard API for determining the page order needed for
allocating Jumbo sized skbs.
Explicitly remove the old skb outside the w/a, for both successful and
unsuccessful realignments. Make sure the old skb's memory isn't leaked.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
A new object type was recently added in MC. This has to be added in the
fsl-mc bus device type list so that it can be properly listed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@nxp.com>
we should reinit the completion before send command
who may trigger the completion,
otherwise it may be reinit after complete in certain timing,
then led to timeout
use private workqueue instead of public workqueue
Signed-off-by: ming_qian <ming.qian@nxp.com>
Acked-by: Shijie Qin <shijie.qin@nxp.com>
modify GPU core clock to 800000 and GPU shader clock to 1000000.
As per commit 30d9947ad71007("LF-168: arm64: dts: imx8qm: add frequency
operating-points to enable GPU governor") the operating-points node use
the wrong GPU core clock and shader clock.
So, modify GPU frequency according to 8QM spec
Fixes:30d9947ad71007("LF-168: arm64: dts: imx8qm: add frequency
operating-points to enable GPU governor")
Signed-off-by: Minjie Zhuang <minjie.zhuang@nxp.com>
ISI will not do scale when output width or height equal to input
width or height. But actully, in this case, the source image size
is larger than target size. For instance, 640x480 resize to 640x400.
ISI need to skip scaling operation only when output width and height
equeal to input width and height, so change the OR logic into AND logic.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Fix GPU AXI bus error when run WebGL 2.0 CTS,
The original CMA size is 320MB, set with 640MB,
This patch will align 8MN CMA size with L4.14.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
move gpu device configuration out of soc subsystem,
gpu parameters exceed soc range and will be skipped:
ranges = <0x0 0x0 0x0 0x3e000000>
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
* linux-lts-nxp/lf-5.4.y: (19 commits)
LF-531-2 arm64: dts: imx8mn: add cma setting
LF-531-1 arm64: dts: imx8mq/imx8mn: fix gpu setting
staging: fsl-dpaa2/mac: do not stop MAC when the net_dev is not up
...
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
In case the net_device is not up, there is no need to call
dpmac_mac_stop(). Guard the call by checking the IFF_UP flag.
This patch will also solve the following warning generated by removing a
dpmac that is not up.
[ 40.942937] called from state READY
[ 40.946442] WARNING: CPU: 0 PID: 755 at drivers/net/phy/phy.c:838
phy_stop+0x6c/0x78
[ 40.954171] Modules linked in:
[ 40.957214] CPU: 0 PID: 755 Comm: bash Tainted: G W
5.4.0-03629-gfd7102c32b2c-dirty #911
[ 40.966592] Hardware name: NXP Layerscape LX2160ARDB (DT)
[ 40.971978] pstate: 40000005 (nZcv daif -PAN -UAO)
[ 40.976756] pc : phy_stop+0x6c/0x78
[ 40.980232] lr : phy_stop+0x6c/0x78
(..)
[ 41.066487] Call trace:
[ 41.068922] phy_stop+0x6c/0x78
[ 41.072052] dpaa2_mac_stop.part.4+0x34/0x5c
[ 41.076309] dpaa2_mac_remove+0x9c/0xa8
Also, remove the IFF_UP flag from the mac netdev since the PHY is not
anymore started at probe time but is rather started/stopped on ifconfig
up/down.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Setting the software portal configuration DE(dequeue stashing
enable) bit. This should enable the ACP (Accelerator Coherency
Port).
During test this improved performance on the LS2088a slightly. No
effect on the LX2160a.
Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
When allocating pages for share memory with OP-TEE,
the driver checks the page attribute (pte).
The current checks only allow writealloc pages.
i.MX 6SLL sets the page attribute to writeback.
Relax this check to allow writealloc, writeback and writethrough.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Franck Lenormand <franck.lenormand@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
(cherry picked from commit a4c5efa2df07a54ce112206c3ffc8fccf3369c52)
(cherry picked from commit 51f031613d55e864f22cb244059e70432d7acd81)
To allow USB dwc3 driver to conduct some chip-scpeific configuring.
Cover all arm64 based Layerscape SoCs.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Reviewed-by: Leo Li <leo.li@nxp.com>
This feature is telling how to configure cache type on 4 different
transfer types: Data Read, Desc Read, Data Write and Desc write. For each
treasfer type, controller has a 4-bit register field to enable different
cache type. Quoted from DWC3 data book Table 6-5 Cache Type Bit Assignments:
----------------------------------------------------------------
MBUS_TYPE| bit[3] |bit[2] |bit[1] |bit[0]
----------------------------------------------------------------
AHB |Cacheable |Bufferable |Privilegge |Data
AXI3 |Write Allocate|Read Allocate|Cacheable |Bufferable
AXI4 |Allocate Other|Allocate |Modifiable |Bufferable
AXI4 |Other Allocate|Allocate |Modifiable |Bufferable
Native |Same as AXI |Same as AXI |Same as AXI|Same as AXI
----------------------------------------------------------------
Note: The AHB, AXI3, AXI4, and PCIe busses use different names for certain
signals, which have the same meaning:
Bufferable = Posted
Cacheable = Modifiable = Snoop (negation of No Snoop)
In most cases, driver support is not required unless the default values of
registers are not correct *and* DWC3 node has enabled dma-coherent. So far we
have observed USB device detect failure on some Layerscape platforms if this
programming was not applied.
Related struct:
struct dwc3_cache_type {
u8 transfer_type_datard;
u8 transfer_type_descrd;
u8 transfer_type_datawr;
u8 transfer_type_descwr;
};
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Some Layerscape paltforms (such as LS1088A, LS2088A, etc) require update HW
default cache type configuration to fix DWC3 init failure when applying
property dma-coherent.
Note that the cache type configuration is actually native feature of DWC3,
not additional desgin coming from SoC, so add this support here.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
When doing DRAM frequency change, the DRAM PLL config will
be changed in ATF side, so add 'CLK_GET_RATE_NOCACHE' flag
to make sure each time we get the DRAM PLL frequency through
'clk_get_rate' API, we can get the correct frequency.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
When DRAM PLL clock is changed in TF-A, the DRAM PLL clock rate needs
to be updated, previous implementation uses dram_pll_clk which is
clock gate and it will NOT trigger clock rate update, need to use PLL
type clock which has CLK_GET_RATE_NOCACHE flag set and will trigger
clock rate recalculation. Otherwise, when system enters low bus mode,
checking clock rate via "cat /sys/kernel/debug/clk/dram_core_clk/clk_rate"
will NOT return the latest dram core clk rate.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
On i.MX8MM/i.MX8MN platforms, need to add dram_pll_div clock for
busfreq driver to update dram_core clock when DRAM frequency switches
between low bus mode and high bus mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Current phy driver only support master mode.
Add sysfs interface for user to danimiacally configure
the phy mode to master or slave.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Update caam/qi to work with QBMan from NXP SDK.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Squashed "crypto: caam/qi - fix FD congestion weight" fix.
Solved rebase conflicts:
drivers/crypto/caam/qi.c:579
kept call to dev_err_ratelimited, but changed to fd->status
drivers/crypto/caam/sg_sw_qm.h:96
kept changes from patch, but changed sg_count to len
Signed-off-by: Vlad Pelin <vlad.pelin@nxp.com>
Acked-by: Horia Geanta <horia.geanta@nxp.com>
Add missing definitions for probe deferal APIs for drivers
that use them with the SDK version of the qbman drivers.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Vlad Pelin <vlad.pelin@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
sii902x hdmi cable detect thread is trigged by
event FB_EVENT_FB_REGISTERED in register_framebuffer function
when device bootup.
when CONFIG_FB_MXC_OVERLAY is enabled, pixel clock has
chance to be disabled by overlay fb.
In this case cable detect thread will fail to get cable state
and sii902x hdmi will not initialized.
Fix it with immediate execute the cable detect thread and
add 20ms delay to wait cable detect thread get the cable state.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Fix the followed build warning.
drivers/video/fbdev/mxc/mxc_hdmi.c: In function ‘mxc_hdmi_cable_connected’:
drivers/video/fbdev/mxc/mxc_hdmi.c:1964:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
mxc_hdmi_default_edid_cfg(hdmi);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/video/fbdev/mxc/mxc_hdmi.c:1966:2: note: here
case HDMI_EDID_NO_MODES:
^~~~
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
In normal sound case all DAIs are detected as CPU-Codec.
simple_dai_link_of supports the presence of a platform but it counts
it as a CPU DAI resulting in the creation of an extra link.
Adding a platform property to a link description like:
simple-audio-card,dai-link {
cpu {
sound-dai = <&sai1>;
};
plat {
sound-dai = <&dsp>;
};
codec {
sound-dai = <&wm8960>;
}
will result in the creation of two links:
* sai1 <-> wm8960
* dsp <-> wm8960
which is obviously not what we want. We just want one single link
with:
* sai1 <-> wm8960 (and platform set to dsp).
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/20191209135353.17427-1-daniel.baluta@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Rename imx8qxp-mek-sof.dtb -> imx8qxp-mek-sof-cs42888.dtb to better
explain what this dts is for.
We have now:
* imx8qxp-mek-sof-wm8960, for wm8960 codec
* imx8qxp-mek-sof-cs42888, for cs42888 codec.
In the future we will support both codecs in parallel, but currently SOF
doesn't easily allow this.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
We use existing simple-audio-card machine drivfer to demonstrate
the usage of SAI1 + wm8960 codec.
FSL DAI driver is used in order to manage SAI resources (PD, clocks,
pinctrl) the rest is taken care of by the SAI driver from the DSP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
dsp_box is used to keep DSP initiated messages. The value of dsp_offset
is set by the DSP with the first message, so we need a way to boostrap
it in order to get the first message.
We do this by setting the correct default dsp_box offset which on i.MX8
is not zero.
Very interesting is why it has worked until now.
On i.MX8, DSP communicates with ARM core using a shared SDRAM memory
area. Actually, there are two shared areas:
* SDRAM0 - starting at 0x92400000, size 0x800000
* SDRAM1 - starting at 0x92C00000, size 0x800000
SDRAM0 keeps the data sections, starting with .rodata. By chance
fw_ready structure was placed at the beginning of .rodata.
dsp_box_base is defined as SDRAM0 + dsp_box_offset and it is placed
at the begining of SDRAM1 (dsp_box_offset should be 0x800000). But
because it is zero initialized by default it points to SDRAM0 where
by chance the fw_ready was placed in the SOF firmware.
Anyhow, SOF commit 7466bee378dd811b ("clk: make freq arrays constant")
fw_ready is no longer at the beginning of SDRAM0 and everything shows
how lucky we were until now.
Fix this by properly setting the default dsp_box offset.
Fixes 202acc565a ("ASoC: SOF: imx: Add i.MX8 HW support")
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Log information about used compilator and optimization level
in sof firmware to host system.
It will be helful to catch some compiler dependent bugs.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Add compiler information structure sof_ipc_cc_version.
Add new enum value in sof_ipc_ext_data for new structure.
This struct will be used to show more information about firmware
in host system. It will be helpful during debugging.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
An error occurs during parsing more than one ext_data from the mailbox, because
of invalid data offset handling. Fix by removing the incorrect duplicate
increment of the offset.
The return value is also reset in the switch case. This does not change the
behavior but improves readability - there is no longer a need to check what the
return value of get_ext_windows is.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Added warning log when found some unknown FW boot ext header,
to improve debuggability.
Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
ACPI creates tables with information about the machine driver.
With DT there is no need for such tables because we can directly
get all the information needed from DT file.
This patch introduces machine driver property inside dsp node.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The UDC core uses req->num_sgs to judge if scatter buffer list is used.
Eg: usb_gadget_map_request_by_dev. For f_fs sync io mode, the request
is re-used for each request, so if the 1st request->length > PAGE_SIZE,
and the 2nd request->length is <= PAGE_SIZE, the f_fs uses the 1st
req->num_sgs for the 2nd request, it causes the UDC core get the wrong
req->num_sgs value (The 2nd request doesn't use sg). For f_fs async
io mode, it is not harm to initialize req->num_sgs as 0 either, in case,
the UDC driver doesn't zeroed request structure.
Cc: Jun Li <jun.li@nxp.com>
Cc: stable <stable@vger.kernel.org>
Fixes: 772a7a724f ("usb: gadget: f_fs: Allow scatter-gather buffers")
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At current transfer complete handler, it doesn't consider
sg (scatter buffer list) case, and only handles single trb
request. In fact, we need to handle every trbs in request,
and giveback the request after all trbs are handled.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The security related node in dtsi are default status okay, so we need
remove them from inmate linux, otherwise inmate crash.
Also remove other nodes that might break boot, such as busfreq and etc
to make it align with 4.19 kernel.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Without init on IMX8MQ_CLK_USDHC1_ROOT, inmate linux emmc
will not work properly.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Without init on IMX8MM_CLK_NAND_USDHC_BUS, inmate linux emmc
will not work properly.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Otherwise M/F will be off while system sleep even wakeup source
is enabled or requested on.
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Otherwise M/F will be off while system sleep even wakeup source
is enabled or requested on.
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Check the space of cmd buffer before write cmd,
if the wptr equals to rptr, it'll be treated as empty,
so we can't write to full.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Acked-by: Shijie Qin <shijie.qin@nxp.com>
This reverts commit 957ce0c6b8 (ASoC: soc-pcm: check symmetry after
hw_params).
That commit cause soc_pcm_params_symmetry can't take effect.
cpu_dai->rate, cpu_dai->channels and cpu_dai->sample_bits
are updated in the middle of soc_pcm_hw_params, so move
soc_pcm_params_symmetry to the end of soc_pcm_hw_params is
not a good solution, for judgement of symmetry in the function
is always true.
FIXME:
According to the comments of that commit, I think the case
described in the commit should disable symmetric_rates
in Back-End, rather than changing the position of
soc_pcm_params_symmetry.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1573555602-5403-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Remove dev for mmio regmap init can forbid the
regmap to create entries for this device under
the /sys/kernel/debug/regmap/ directory which
can avoid hang issue when access the registers
if no display connected to it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This reverts commit 9b947a13e7.
The commit 9b947a13e7 does not consider power and
clock when expose the regmap into debugsfs. This may bring some problem for some
case. E.g., For reset registers (not real GPR, but csi bridge register) for
MIPI DSI, MIPI CSI and LCDIF on i.mx8mm, they only can be accessed after the
disp_root clock and dispmix power has been turned on, otherwise the system may
be stuck.
on i.mx8mm evk, the command to reproduce (with default dtb, no display/capture
running):
cat /sys/kernel/debug/regmap/dummy-display-gpr@32e28000/registers
This patch reverted previous commit to avoid the exposure.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
Use the following command to boot the 2nd linux, the lpuart2 is in base
board. The m4 should be disabled for qm mek, because lpuart2 is used
by m4.
jailhouse cell linux imx8qm-linux-demo.cell Image -d
imx8qm-mek-inmate.dtb -c "clk_ignore_unused console=ttyLP2,115200
earlycon=lpuart32,mmio32,0x5a060010,115200 cma=32MB root=/dev/mmcblk0p2
rootwait rw"
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add i.MX8QXP inmate/root dts.
Use the following command to boot the 2nd linux, the lpuart2 is in base
board.
jailhouse cell linux imx8qxp-linux-demo.cell Image -d
imx8qxp-mek-inmate.dtb -c "clk_ignore_unused console=ttyLP2,115200
earlycon=lpuart32,mmio32,0x5a060010,115200 cma=32MB root=/dev/mmcblk0p2
rootwait rw"
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
memory-region in ss dtsi is not correct, it should be in soc dtsi,
because the referenced region is in soc dtsi
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
"earlycon" no need to specify the value string since it uses
stdout-path parameters. However when earlycon and normal console
are not using the same uart port, we need specify value string
to earlycon, this is what we need to do when support dual linux
using jailhouse hypervisor. The 2nd linux will use the uart
of the 1st linux as earlycon.
earlycon=lpuart32,mmio32,0x5a060010,115200 not work for i.MX8QXP.
It is because lpuart32_early_console_setup not support little endian.
Since the original code is to support UPIO_MEM32BE, so if not
UPIO_MEM32, we still take it as UPIO_MEM32BE
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add DDRC node to support DDR type identification during
kernel boot up.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This is the 5.4.3 stable release
Conflicts:
drivers/cpufreq/imx-cpufreq-dt.c
drivers/spi/spi-fsl-qspi.c
The conflict is very minor, fixed it when do the merge. The imx-cpufreq-dt.c
is just one line code-style change, using upstream one, no any function change.
The spi-fsl-qspi.c has minor conflicts when merge upstream fixes: c69b17da53
spi: spi-fsl-qspi: Clear TDH bits in FLSHCR register
After merge, basic boot sanity test and basic qspi test been done on i.mx
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
[ Upstream commit 02bf1f8b3c ]
As per commit 131b30c94f ("kselftest: exclude failed TARGETS from
runlist") failed targets were excluded from the runlist. But value
$$INSTALL_PATH is always NULL. It should be $INSTALL_PATH instead
$$INSTALL_PATH.
So, fix Makefile to use $INSTALL_PATH.
Fixes: 131b30c94f ("kselftest: exclude failed TARGETS from runlist")
Signed-off-by: Prabhakar Kushwaha <pkushwaha@marvell.com>
Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 23f61b9fc5 ]
The ghes registration and refcount is broken in several ways:
* ghes_edac_register() returns with success for a 2nd instance
even if a first instance's registration is still running. This is
not correct as the first instance may fail later. A subsequent
registration may not finish before the first. Parallel registrations
must be avoided.
* The refcount was increased even if a registration failed. This
leads to stale counters preventing the device from being released.
* The ghes refcount may not be decremented properly on unregistration.
Always decrement the refcount once ghes_edac_unregister() is called to
keep the refcount sane.
* The ghes_pvt pointer is handed to the irq handler before registration
finished.
* The mci structure could be freed while the irq handler is running.
Fix this by adding a mutex to ghes_edac_register(). This mutex
serializes instances to register and unregister. The refcount is only
increased if the registration succeeded. This makes sure the refcount is
in a consistent state after registering or unregistering a device.
Note: A spinlock cannot be used here as the code section may sleep.
The ghes_pvt is protected by ghes_lock now. This ensures the pointer is
not updated before registration was finished or while the irq handler is
running. It is unset before unregistering the device including necessary
(implicit) memory barriers making the changes visible to other CPUs.
Thus, the device can not be used anymore by an interrupt.
Also, rename ghes_init to ghes_refcount for better readability and
switch to refcount API.
A refcount is needed because there can be multiple GHES structures being
defined (see ACPI 6.3 specification, 18.3.2.7 Generic Hardware Error
Source, "Some platforms may describe multiple Generic Hardware Error
Source structures with different notification types, ...").
Another approach to use the mci's device refcount (get_device()) and
have a release function does not work here. A release function will be
called only for device_release() with the last put_device() call. The
device must be deleted *before* that with device_del(). This is only
possible by maintaining an own refcount.
[ bp: touchups. ]
Fixes: 0fe5f281f7 ("EDAC, ghes: Model a single, logical memory controller")
Fixes: 1e72e673b9 ("EDAC/ghes: Fix Use after free in ghes_edac remove path")
Co-developed-by: James Morse <james.morse@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Co-developed-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Robert Richter <rrichter@marvell.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20191105200732.3053-1-rrichter@marvell.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit c04571251b ]
The ast2600 no longer uses bit 4 in the control register to indicate a
1MHz clock (It now controls whether this watchdog is reset by a SOC
reset). This means we do not want to set it. It also does not need to be
set for the ast2500, as it is read-only on that SoC.
The comment next to the clock rate selection wandered away from where it
was set, so put it back next to the register setting it's describing.
Fixes: b3528b4874 ("watchdog: aspeed: Add support for AST2600")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20191108032905.22463-1-joel@jms.id.au
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit e3fc3f3d09 ]
The first argument to WARN() is supposed to be a condition. The
original code will just print the mdname() instead of the full warning
message.
Fixes: c84a1372df ("md/raid0: avoid RAID0 data corruption due to layout confusion.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit af44d180e3 ]
i.MX8MN has different speed grade definition compared to
i.MX8MQ/i.MX8MM, when fuses are NOT written, the default
speed_grade should be set to minimum available OPP defined
in DT which is 1.2GHz, the corresponding speed_grade value
should be 0xb.
Fixes: 5b8010ba70 ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit ca58f55108 ]
This is an alternative fix attemp for the issue reported in the commit
caa8422d01 ("ALSA: hda: Flush interrupts on disabling") that was
reverted later due to regressions. Instead of tweaking the hardware
disablement order and the enforced irq flushing, do calling
cancel_work_sync() of the unsol work early enough, and explicitly
ignore the unsol events during the shutdown by checking the
bus->shutdown flag.
Fixes: caa8422d01 ("ALSA: hda: Flush interrupts on disabling")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://lore.kernel.org/r/s5h1ruxt9cz.wl-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
commit 2a9edd056e upstream.
The old loop wouldn't stop when reaching `start` if `start==NULL`, instead
continuing backwards to index -1 and crashing.
Luckily you need to be highly privileged to map things at NULL, so it's not
a big problem.
Fix it by adjusting the loop so that the loop variable is always in bounds.
This patch is deliberately minimal to simplify backporting, but IMO this
function could use a refactor. The jump labels in the second loop body are
horrible (the error gotos should be jumping to free_range instead), and
both loops would look nicer if they just iterated upwards through indices.
And the up_read()+mmput() shouldn't be duplicated like that.
Cc: stable@vger.kernel.org
Fixes: 457b9a6f09 ("Staging: android: add binder driver")
Signed-off-by: Jann Horn <jannh@google.com>
Acked-by: Christian Brauner <christian.brauner@ubuntu.com>
Link: https://lore.kernel.org/r/20191018205631.248274-3-jannh@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a7a74d7ff5 upstream.
binder_alloc_mmap_handler() attempts to detect the use of ->mmap() on a
binder_proc whose binder_alloc has already been initialized by checking
whether alloc->buffer is non-zero.
Before commit 880211667b ("binder: remove kernel vm_area for buffer
space"), alloc->buffer was a kernel mapping address, which is always
non-zero, but since that commit, it is a userspace mapping address.
A sufficiently privileged user can map /dev/binder at NULL, tricking
binder_alloc_mmap_handler() into assuming that the binder_proc has not been
mapped yet. This leads to memory unsafety.
Luckily, no context on Android has such privileges, and on a typical Linux
desktop system, you need to be root to do that.
Fix it by using the mapping size instead of the mapping address to
distinguish the mapped case. A valid VMA can't have size zero.
Fixes: 880211667b ("binder: remove kernel vm_area for buffer space")
Cc: stable@vger.kernel.org
Signed-off-by: Jann Horn <jannh@google.com>
Acked-by: Christian Brauner <christian.brauner@ubuntu.com>
Link: https://lore.kernel.org/r/20191018205631.248274-2-jannh@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 8eb52a1ee3 upstream.
binder_alloc_print_pages() iterates over
alloc->pages[0..alloc->buffer_size-1] under alloc->mutex.
binder_alloc_mmap_handler() writes alloc->pages and alloc->buffer_size
without holding that lock, and even writes them before the last bailout
point.
Unfortunately we can't take the alloc->mutex in the ->mmap() handler
because mmap_sem can be taken while alloc->mutex is held.
So instead, we have to locklessly check whether the binder_alloc has been
fully initialized with binder_alloc_get_vma(), like in
binder_alloc_new_buf_locked().
Fixes: 8ef4665aa1 ("android: binder: Add page usage in binder stats")
Cc: stable@vger.kernel.org
Signed-off-by: Jann Horn <jannh@google.com>
Acked-by: Christian Brauner <christian.brauner@ubuntu.com>
Link: https://lore.kernel.org/r/20191018205631.248274-1-jannh@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 27ed14d0ec upstream.
This reverts commit fdc2de8712 ("serial/8250:
Add support for NI-Serial PXI/PXIe+485 devices").
The commit fdc2de8712 ("serial/8250: Add support for NI-Serial
PXI/PXIe+485 devices") introduced a breakage on NI-Serial PXI(e)-RS485
devices, RS-232 variants have no issue. The Linux system can enumerate the
NI-Serial PXI(e)-RS485 devices, but it broke the R/W operation on the
ports.
However, the implementation is working on the NI internal Linux RT kernel
but it does not work in the Linux main tree kernel. This is only affecting
NI products, specifically the RS-485 variants. Reverting the upstream
until a proper implementation that can apply to both NI internal Linux
kernel and Linux mainline kernel is figured out.
Signed-off-by: Je Yen Tam <je.yen.tam@ni.com>
Fixes: fdc2de8712 ("serial/8250: Add support for NI-Serial PXI/PXIe+485 devices")
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191127075301.9866-1-je.yen.tam@ni.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 419e9c38aa upstream.
When splicing using iomap_dio_rw() to a pipe, we may leak pipe pages
because bio_iov_iter_get_pages() records that the pipe will have full
extent worth of data however if file size is not block size aligned
iomap_dio_rw() returns less than what bio_iov_iter_get_pages() set up
and splice code gets confused leaking a pipe page with the file tail.
Handle the situation similarly to the old direct IO implementation and
revert iter to actually returned read amount which makes iter consistent
with value returned from iomap_dio_rw() and thus the splice code is
happy.
Fixes: ff6a9292e6 ("iomap: implement direct I/O")
CC: stable@vger.kernel.org
Reported-by: syzbot+991400e8eba7e00a26e1@syzkaller.appspotmail.com
Signed-off-by: Jan Kara <jack@suse.cz>
Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit cba22d86e0 upstream.
Currently, block device size in not updated on second and further open
for block devices where partition scan is disabled. This is particularly
annoying for example for DVD drives as that means block device size does
not get updated once the media is inserted into a drive if the device is
already open when inserting the media. This is actually always the case
for example when pktcdvd is in use.
Fix the problem by revalidating block device size on every open even for
devices with partition scan disabled.
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Cc: Laura Abbott <labbott@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 8670b2b8b0 upstream.
udev has a feature of creating /dev/<node> device-nodes if it finds
a devnode:<node> modalias. This allows for auto-loading of modules that
provide the node. This requires to use a statically allocated minor
number for misc character devices.
However, rfkill uses dynamic minor numbers and prevents auto-loading
of the module. So allocate the next static misc minor number and use
it for rfkill.
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Link: https://lore.kernel.org/r/20191024174042.19851-1-marcel@holtmann.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
commit 3e5ec1db8b upstream.
When improving the CS GPIO support at core level, the SPI_CS_HIGH
has been enabled for all the CS lines used for a given SPI controller.
However, the SPI framework allows to have on the same controller native
CS and GPIO CS. The native CS may not support the SPI_CS_HIGH, so they
should not be setup automatically.
With this patch the setting is done only for the CS that will use a
GPIO as CS
Fixes: f3186dd876 ("spi: Optionally use GPIO descriptors for CS GPIOs")
Cc: <stable@vger.kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20191018152929.3287-1-gregory.clement@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7cbb16b212 upstream.
Until a few years ago, this driver was only used with CS GPIO. The
only exception is CS0 on AT91RM9200 which has to use internal CS. A
limitation of the internal CS is that they don't support CS High.
So by using the CS GPIO the CS high configuration was available except
for the particular case CS0 on RM9200.
When the support for the internal chip-select was added, the check of
the CS high support was not updated. Due to this the driver accepts
this configuration for all the SPI controller v2 (used by all SoCs
excepting the AT91RM9200) whereas the hardware doesn't support it for
infernal CS.
This patch fixes the test to match the hardware capabilities.
Fixes: 4820303480 ("spi: atmel: add support for the internal chip-select of the spi controller")
Cc: <stable@vger.kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20191017141846.7523-3-gregory.clement@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f6910679e1 upstream.
Later versions of the QSPI controller (e.g. in i.MX6UL/ULL and i.MX7)
seem to have an additional TDH setting in the FLSHCR register, that
needs to be set in accordance with the access mode that is used (DDR
or SDR).
Previous bootstages such as BootROM or bootloader might have used the
DDR mode to access the flash. As we currently only use SDR mode, we
need to make sure the TDH bits are cleared upon initialization.
Fixes: 84d043185d ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Cc: <stable@vger.kernel.org>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Han Xu <han.xu@nxp.com>
Link: https://lore.kernel.org/r/20191007071933.26786-1-frieder.schrempf@kontron.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f398243e9f upstream.
The elliptic curve arithmetic library used by the EC-DH KPP implementation
assumes big endian byte order, and unconditionally reverses the byte
and word order of multi-limb quantities. On big endian systems, the byte
reordering is not necessary, while the word ordering needs to be retained.
So replace the __swab64() invocation with a call to be64_to_cpu() which
should do the right thing for both little and big endian builds.
Fixes: 3c4b23901a ("crypto: ecdh - Add ECDH software support")
Cc: <stable@vger.kernel.org> # v4.9+
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 504582e8e4 upstream.
Commit 79c65d179a ("crypto: cbc - Convert to skcipher") updated
the generic CBC template wrapper from a blkcipher to a skcipher algo,
to get away from the deprecated blkcipher interface. However, as a side
effect, drivers that instantiate CBC transforms using the blkcipher as
a fallback no longer work, since skciphers can wrap blkciphers but not
the other way around. This broke the geode-aes driver.
So let's fix it by moving to the sync skcipher interface when allocating
the fallback. At the same time, align with the generic API for ECB and
CBC by rejecting inputs that are not a multiple of the AES block size.
Fixes: 79c65d179a ("crypto: cbc - Convert to skcipher")
Cc: <stable@vger.kernel.org> # v4.20+ ONLY
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Florian Bezdeka <florian@bezdeka.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 64e7f852c4 upstream.
when libkcapi test is executed using HW accelerator, cipher operation
return -74.Since af_alg_async_cb->ki_complete treat err as unsigned int,
libkcapi receive 429467222 even though it expect -ve value.
Hence its required to cast resultlen to int so that proper
error is returned to libkcapi.
AEAD one shot non-aligned test 2(libkcapi test)
./../bin/kcapi -x 10 -c "gcm(aes)" -i 7815d4b06ae50c9c56e87bd7
-k ea38ac0c9b9998c80e28fb496a2b88d9 -a
"853f98a750098bec1aa7497e979e78098155c877879556bb51ddeb6374cbaefc"
-t "c4ce58985b7203094be1d134c1b8ab0b" -q
"b03692f86d1b8b39baf2abb255197c98"
Fixes: d887c52d6a ("crypto: algif_aead - overhaul memory management")
Cc: <stable@vger.kernel.org>
Signed-off-by: Ayush Sawal <ayush.sawal@chelsio.com>
Signed-off-by: Atul Gupta <atul.gupta@chelsio.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Ayush Sawal <ayush.sawal@chelsio.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 86ef1dfcb5 upstream.
commit 394a9e0447 ("crypto: cfb - add missing 'chunksize' property")
adds a test vector where the input length is smaller than the IV length
(the second test vector). This revealed a NULL pointer dereference in
the atmel-aes driver, that is caused by passing an incorrect offset in
scatterwalk_map_and_copy() when atmel_aes_complete() is called.
Do not save the IV in req->info of ablkcipher_request (or equivalently
req->iv of skcipher_request) when req->nbytes < ivsize, because the IV
will not be further used.
While touching the code, modify the type of ivsize from int to
unsigned int, to comply with the return type of
crypto_ablkcipher_ivsize().
Fixes: 91308019ec ("crypto: atmel-aes - properly set IV after {en,de}crypt")
Cc: <stable@vger.kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 746c908c4d upstream.
This patch fixes a crash that can happen during probe
when the available dma memory is not enough (this can
happen if the crypto4xx is built as a module).
The descriptor window mapping would end up being free'd
twice, once in crypto4xx_build_pdr() and the second time
in crypto4xx_destroy_sdr().
Fixes: 5d59ad6eea ("crypto: crypto4xx - fix crypto4xx_build_pdr, crypto4xx_build_sdr leak")
Cc: <stable@vger.kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ad5996d9a0 upstream.
Acquire kvm->srcu for the duration of ->set_nested_state() to fix a bug
where nVMX derefences ->memslots without holding ->srcu or ->slots_lock.
The other half of nested migration, ->get_nested_state(), does not need
to acquire ->srcu as it is a purely a dump of internal KVM (and CPU)
state to userspace.
Detected as an RCU lockdep splat that is 100% reproducible by running
KVM's state_test selftest with CONFIG_PROVE_LOCKING=y. Note that the
failing function, kvm_is_visible_gfn(), is only checking the validity of
a gfn, it's not actually accessing guest memory (which is more or less
unsupported during vmx_set_nested_state() due to incorrect MMU state),
i.e. vmx_set_nested_state() itself isn't fundamentally broken. In any
case, setting nested state isn't a fast path so there's no reason to go
out of our way to avoid taking ->srcu.
=============================
WARNING: suspicious RCU usage
5.4.0-rc7+ #94 Not tainted
-----------------------------
include/linux/kvm_host.h:626 suspicious rcu_dereference_check() usage!
other info that might help us debug this:
rcu_scheduler_active = 2, debug_locks = 1
1 lock held by evmcs_test/10939:
#0: ffff88826ffcb800 (&vcpu->mutex){+.+.}, at: kvm_vcpu_ioctl+0x85/0x630 [kvm]
stack backtrace:
CPU: 1 PID: 10939 Comm: evmcs_test Not tainted 5.4.0-rc7+ #94
Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 0.0.0 02/06/2015
Call Trace:
dump_stack+0x68/0x9b
kvm_is_visible_gfn+0x179/0x180 [kvm]
mmu_check_root+0x11/0x30 [kvm]
fast_cr3_switch+0x40/0x120 [kvm]
kvm_mmu_new_cr3+0x34/0x60 [kvm]
nested_vmx_load_cr3+0xbd/0x1f0 [kvm_intel]
nested_vmx_enter_non_root_mode+0xab8/0x1d60 [kvm_intel]
vmx_set_nested_state+0x256/0x340 [kvm_intel]
kvm_arch_vcpu_ioctl+0x491/0x11a0 [kvm]
kvm_vcpu_ioctl+0xde/0x630 [kvm]
do_vfs_ioctl+0xa2/0x6c0
ksys_ioctl+0x66/0x70
__x64_sys_ioctl+0x16/0x20
do_syscall_64+0x54/0x200
entry_SYSCALL_64_after_hwframe+0x49/0xbe
RIP: 0033:0x7f59a2b95f47
Fixes: 8fcc4b5923 ("kvm: nVMX: Introduce KVM_CAP_NESTED_STATE")
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit cbbaa2727a upstream.
KVM does not implement MSR_IA32_TSX_CTRL, so it must not be presented
to the guests. It is also confusing to have !ARCH_CAP_TSX_CTRL_MSR &&
!RTM && ARCH_CAP_TAA_NO: lack of MSR_IA32_TSX_CTRL suggests TSX was not
hidden (it actually was), yet the value says that TSX is not vulnerable
to microarchitectural data sampling. Fix both.
Cc: stable@vger.kernel.org
Tested-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit de1fca5d6e upstream.
"Shared MSRs" are guest MSRs that are written to the host MSRs but
keep their value until the next return to userspace. They support
a mask, so that some bits keep the host value, but this mask is
only used to skip an unnecessary MSR write and the value written
to the MSR is always the guest MSR.
Fix this and, while at it, do not update smsr->values[slot].curr if
for whatever reason the wrmsr fails. This should only happen due to
reserved bits, so the value written to smsr->values[slot].curr
will not match when the user-return notifier and the host value will
always be restored. However, it is untidy and in rare cases this
can actually avoid spurious WRMSRs on return to userspace.
Cc: stable@vger.kernel.org
Reviewed-by: Jim Mattson <jmattson@google.com>
Tested-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ca185b2609 upstream.
It's possible that two LPIs locate in the same "byte_offset" but target
two different vcpus, where their pending status are indicated by two
different pending tables. In such a scenario, using last_byte_offset
optimization will lead KVM relying on the wrong pending table entry.
Let us use last_ptr instead, which can be treated as a byte index into
a pending table and also, can be vcpu specific.
Fixes: 280771252c ("KVM: arm64: vgic-v3: KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES")
Cc: stable@vger.kernel.org
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Eric Auger <eric.auger@redhat.com>
Link: https://lore.kernel.org/r/20191029071919.177-4-yuzenghui@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 04f11ef458 upstream.
Write the desired L2 CR3 into vmcs02.GUEST_CR3 during nested VM-Enter
instead of deferring the VMWRITE until vmx_set_cr3(). If the VMWRITE
is deferred, then KVM can consume a stale vmcs02.GUEST_CR3 when it
refreshes vmcs12->guest_cr3 during nested_vmx_vmexit() if the emulated
VM-Exit occurs without actually entering L2, e.g. if the nested run
is squashed because nested VM-Enter (from L1) is putting L2 into HLT.
Note, the above scenario can occur regardless of whether L1 is
intercepting HLT, e.g. L1 can intercept HLT and then re-enter L2 with
vmcs.GUEST_ACTIVITY_STATE=HALTED. But practically speaking, a VMM will
likely put a guest into HALTED if and only if it's not intercepting HLT.
In an ideal world where EPT *requires* unrestricted guest (and vice
versa), VMX could handle CR3 similar to how it handles RSP and RIP,
e.g. mark CR3 dirty and conditionally load it at vmx_vcpu_run(). But
the unrestricted guest silliness complicates the dirty tracking logic
to the point that explicitly handling vmcs02.GUEST_CR3 during nested
VM-Enter is a simpler overall implementation.
Cc: stable@vger.kernel.org
Reported-and-tested-by: Reto Buerki <reet@codelabs.ch>
Tested-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Reviewed-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e7d71c9430 upstream.
If we cannot allocate the XIVE VPs in OPAL, the creation of a XIVE or
XICS-on-XIVE device is aborted as expected, but we leave kvm->arch.xive
set forever since the release method isn't called in this case. Any
subsequent tentative to create a XIVE or XICS-on-XIVE for this VM will
thus always fail (DoS). This is a problem for QEMU since it destroys
and re-creates these devices when the VM is reset: the VM would be
restricted to using the much slower emulated XIVE or XICS forever.
As an alternative to adding rollback, do not assign kvm->arch.xive before
making sure the XIVE VPs are allocated in OPAL.
Cc: stable@vger.kernel.org # v5.2
Fixes: 5422e95103 ("KVM: PPC: Book3S HV: XIVE: Replace the 'destroy' method by a 'release' method")
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 30486e7209 upstream.
We need to check the host page size is big enough to accomodate the
EQ. Let's do this before taking a reference on the EQ page to avoid
a potential leak if the check fails.
Cc: stable@vger.kernel.org # v5.2
Fixes: 13ce3297c5 ("KVM: PPC: Book3S HV: XIVE: Add controls for the EQ configuration")
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 31a88c82b4 upstream.
The EQ page is allocated by the guest and then passed to the hypervisor
with the H_INT_SET_QUEUE_CONFIG hcall. A reference is taken on the page
before handing it over to the HW. This reference is dropped either when
the guest issues the H_INT_RESET hcall or when the KVM device is released.
But, the guest can legitimately call H_INT_SET_QUEUE_CONFIG several times,
either to reset the EQ (vCPU hot unplug) or to set a new EQ (guest reboot).
In both cases the existing EQ page reference is leaked because we simply
overwrite it in the XIVE queue structure without calling put_page().
This is especially visible when the guest memory is backed with huge pages:
start a VM up to the guest userspace, either reboot it or unplug a vCPU,
quit QEMU. The leak is observed by comparing the value of HugePages_Free in
/proc/meminfo before and after the VM is run.
Ideally we'd want the XIVE code to handle the EQ page de-allocation at the
platform level. This isn't the case right now because the various XIVE
drivers have different allocation needs. It could maybe worth introducing
hooks for this purpose instead of exposing XIVE internals to the drivers,
but this is certainly a huge work to be done later.
In the meantime, for easier backport, fix both vCPU unplug and guest reboot
leaks by introducing a wrapper around xive_native_configure_queue() that
does the necessary cleanup.
Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com>
Cc: stable@vger.kernel.org # v5.2
Fixes: 13ce3297c5 ("KVM: PPC: Book3S HV: XIVE: Add controls for the EQ configuration")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Greg Kurz <groug@kaod.org>
Tested-by: Lijun Pan <ljp@linux.ibm.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit bed903167a upstream.
Commit ef72171b36 ("arm64: dts: exynos: Remove unneeded address space
mapping for soc node") changed the address and size cells in root node from
2 to 1, but /memory nodes for the affected boards were not updated. This
went unnoticed on Exynos5433-based TM2(e) boards, because they use u-boot,
which updates /memory node to the correct values. On the other hand, the
mentioned commit broke boot on Exynos7-based Espresso board, which
bootloader doesn't touch /memory node at all.
This patch reverts commit ef72171b36 ("arm64: dts: exynos: Remove
unneeded address space mapping for soc node"), so Exynos5433 and Exynos7
SoCs again matches other ARM64 platforms with 64bit mappings in root
node.
Reported-by: Alim Akhtar <alim.akhtar@samsung.com>
Fixes: ef72171b36 ("arm64: dts: exynos: Remove unneeded address space mapping for soc node")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: <stable@vger.kernel.org> # 5.3.x: 72ddcf6aa2 arm64: dts: exynos: Move GPU under /soc node for Exynos5433
Cc: <stable@vger.kernel.org> # 5.3.x: ede87c3a2b arm64: dts: exynos: Move GPU under /soc node for Exynos7
Cc: <stable@vger.kernel.org> # 4.18.x
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit df325e05a6 upstream.
__range_ok(), invoked from access_ok(), clears the tag of the user
address only if CONFIG_ARM64_TAGGED_ADDR_ABI is enabled and the thread
opted in to the relaxed ABI. The latter sets the TIF_TAGGED_ADDR thread
flag. In the case of asynchronous I/O (e.g. io_submit()), the
access_ok() may be called from a kernel thread. Since kernel threads
don't have TIF_TAGGED_ADDR set, access_ok() will fail for valid tagged
user addresses. Example from the ffs_user_copy_worker() thread:
use_mm(io_data->mm);
ret = ffs_copy_to_iter(io_data->buf, ret, &io_data->data);
unuse_mm(io_data->mm);
Relax the __range_ok() check to always untag the user address if called
in the context of a kernel thread. The user pointers would have already
been checked via aio_setup_rw() -> import_{single_range,iovec}() at the
time of the asynchronous I/O request.
Fixes: 63f0c60379 ("arm64: Introduce prctl() options to control the tagged user addresses ABI")
Cc: <stable@vger.kernel.org> # 5.4.x-
Cc: Will Deacon <will@kernel.org>
Reported-by: Evgenii Stepanov <eugenis@google.com>
Tested-by: Evgenii Stepanov <eugenis@google.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit add3efdd78 upstream.
When number of free space in the journal is very low, the arithmetic in
jbd2_log_space_left() could underflow resulting in very high number of
free blocks and thus triggering assertion failure in transaction commit
code complaining there's not enough space in the journal:
J_ASSERT(journal->j_free > 1);
Properly check for the low number of free blocks.
CC: stable@vger.kernel.org
Reviewed-by: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: Jan Kara <jack@suse.cz>
Link: https://lore.kernel.org/r/20191105164437.32602-1-jack@suse.cz
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e23f568aa6 upstream.
When the 32bit ino wraps around, kernfs increments the generation
number to distinguish reused ino instances. The wrap-around detection
tests whether the allocated ino is lower than what the cursor but the
cursor is pointing to the next ino to allocate so the condition never
triggers.
Fix it by remembering the last ino and comparing against that.
Signed-off-by: Tejun Heo <tj@kernel.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Fixes: 4a3ef68aca ("kernfs: implement i_generation")
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: stable@vger.kernel.org # v4.14+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a25e3726b3 upstream.
The NFSv4.2 CLONE operation has implicit persistence requirements on the
target file, since there is no protocol requirement that the client issue
a separate operation to persist data.
For that reason, we should call vfs_fsync_range() on the destination file
after a successful call to vfs_clone_file_range().
Fixes: ffa0160a10 ("nfsd: implement the NFSv4.2 CLONE operation")
Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
Cc: stable@vger.kernel.org # v4.5+
Signed-off-by: J. Bruce Fields <bfields@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 9ebd796e24 upstream.
Slcan_open doesn't clean-up device which registration failed from the
slcan_devs device list. On next open this list is iterated and freed
device is accessed. Fix this by calling slc_free_netdev in error path.
Driver/net/can/slcan.c is derived from slip.c. Use-after-free error was
identified in slip_open by syzboz. Same bug is in slcan.c. Here is the
trace from the Syzbot slip report:
__dump_stack lib/dump_stack.c:77 [inline]
dump_stack+0x197/0x210 lib/dump_stack.c:118
print_address_description.constprop.0.cold+0xd4/0x30b mm/kasan/report.c:374
__kasan_report.cold+0x1b/0x41 mm/kasan/report.c:506
kasan_report+0x12/0x20 mm/kasan/common.c:634
__asan_report_load8_noabort+0x14/0x20 mm/kasan/generic_report.c:132
sl_sync drivers/net/slip/slip.c:725 [inline]
slip_open+0xecd/0x11b7 drivers/net/slip/slip.c:801
tty_ldisc_open.isra.0+0xa3/0x110 drivers/tty/tty_ldisc.c:469
tty_set_ldisc+0x30e/0x6b0 drivers/tty/tty_ldisc.c:596
tiocsetd drivers/tty/tty_io.c:2334 [inline]
tty_ioctl+0xe8d/0x14f0 drivers/tty/tty_io.c:2594
vfs_ioctl fs/ioctl.c:46 [inline]
file_ioctl fs/ioctl.c:509 [inline]
do_vfs_ioctl+0xdb6/0x13e0 fs/ioctl.c:696
ksys_ioctl+0xab/0xd0 fs/ioctl.c:713
__do_sys_ioctl fs/ioctl.c:720 [inline]
__se_sys_ioctl fs/ioctl.c:718 [inline]
__x64_sys_ioctl+0x73/0xb0 fs/ioctl.c:718
do_syscall_64+0xfa/0x760 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
Fixes: ed50e1600b ("slcan: Fix memory leak in error path")
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: David Miller <davem@davemloft.net>
Cc: Oliver Hartkopp <socketcan@hartkopp.net>
Cc: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Jouni Hogander <jouni.hogander@unikie.com>
Cc: linux-stable <stable@vger.kernel.org> # >= v5.4
Acked-by: Oliver Hartkopp <socketcan@hartkopp.net>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit b2b2dd71e0 upstream.
Do not try to handle keycodes that are too big, otherwise we risk doing
out-of-bounds writes:
BUG: KASAN: global-out-of-bounds in clear_bit include/asm-generic/bitops-instrumented.h:56 [inline]
BUG: KASAN: global-out-of-bounds in kbd_keycode drivers/tty/vt/keyboard.c:1411 [inline]
BUG: KASAN: global-out-of-bounds in kbd_event+0xe6b/0x3790 drivers/tty/vt/keyboard.c:1495
Write of size 8 at addr ffffffff89a1b2d8 by task syz-executor108/1722
...
kbd_keycode drivers/tty/vt/keyboard.c:1411 [inline]
kbd_event+0xe6b/0x3790 drivers/tty/vt/keyboard.c:1495
input_to_handler+0x3b6/0x4c0 drivers/input/input.c:118
input_pass_values.part.0+0x2e3/0x720 drivers/input/input.c:145
input_pass_values drivers/input/input.c:949 [inline]
input_set_keycode+0x290/0x320 drivers/input/input.c:954
evdev_handle_set_keycode_v2+0xc4/0x120 drivers/input/evdev.c:882
evdev_do_ioctl drivers/input/evdev.c:1150 [inline]
In this case we were dealing with a fuzzed HID device that declared over
12K buttons, and while HID layer should not be reporting to us such big
keycodes, we should also be defensive and reject invalid data ourselves as
well.
Reported-by: syzbot+19340dff067c2d3835c0@syzkaller.appspotmail.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191122204220.GA129459@dtor-ws
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit fa9c236249 upstream.
Even when mounting modern protocol version the server may be
configured without supporting SMB2.1 leases and the client
uses SMB2 oplock to optimize IO performance through local caching.
However there is a problem in oplock break handling that leads
to missing a break notification on the client who has a file
opened. It latter causes big latencies to other clients that
are trying to open the same file.
The problem reproduces when there are multiple shares from the
same server mounted on the client. The processing code tries to
match persistent and volatile file ids from the break notification
with an open file but it skips all share besides the first one.
Fix this by looking up in all shares belonging to the server that
issued the oplock break.
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Pavel Shilovsky <pshilov@microsoft.com>
Signed-off-by: Steve French <stfrench@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 6f582b273e upstream.
Currently when the client creates a cifsFileInfo structure for
a newly opened file, it allocates a list of byte-range locks
with a pointer to the new cfile and attaches this list to the
inode's lock list. The latter happens before initializing all
other fields, e.g. cfile->tlink. Thus a partially initialized
cifsFileInfo structure becomes available to other threads that
walk through the inode's lock list. One example of such a thread
may be an oplock break worker thread that tries to push all
cached byte-range locks. This causes NULL-pointer dereference
in smb2_push_mandatory_locks() when accessing cfile->tlink:
[598428.945633] BUG: kernel NULL pointer dereference, address: 0000000000000038
...
[598428.945749] Workqueue: cifsoplockd cifs_oplock_break [cifs]
[598428.945793] RIP: 0010:smb2_push_mandatory_locks+0xd6/0x5a0 [cifs]
...
[598428.945834] Call Trace:
[598428.945870] ? cifs_revalidate_mapping+0x45/0x90 [cifs]
[598428.945901] cifs_oplock_break+0x13d/0x450 [cifs]
[598428.945909] process_one_work+0x1db/0x380
[598428.945914] worker_thread+0x4d/0x400
[598428.945921] kthread+0x104/0x140
[598428.945925] ? process_one_work+0x380/0x380
[598428.945931] ? kthread_park+0x80/0x80
[598428.945937] ret_from_fork+0x35/0x40
Fix this by reordering initialization steps of the cifsFileInfo
structure: initialize all the fields first and then add the new
byte-range lock list to the inode's lock list.
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: Pavel Shilovsky <pshilov@microsoft.com>
Reviewed-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <stfrench@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7e8ce0e2b0 upstream.
The AMD FCH USB XHCI Controller advertises support for generating PME#
while in D0. When in D0, it does signal PME# for USB 3.0 connect events,
but not for USB 2.0 or USB 1.1 connect events, which means the controller
doesn't wake correctly for those events.
00:10.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller [1022:7914] (rev 20) (prog-if 30 [XHCI])
Subsystem: Dell FCH USB XHCI Controller [1028:087e]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Clear PCI_PM_CAP_PME_D0 in dev->pme_support to indicate the device will not
assert PME# from D0 so we don't rely on it.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203673
Link: https://lore.kernel.org/r/20190902145252.32111-1-kai.heng.feng@canonical.com
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 9a62d20027 upstream.
The job of vmalloc_sync_all() is to help the lazy freeing of vmalloc()
ranges: before such vmap ranges are reused we make sure that they are
unmapped from every task's page tables.
This is really easy on pagetable setups where the kernel page tables
are shared between all tasks - this is the case on 32-bit kernels
with SHARED_KERNEL_PMD = 1.
But on !SHARED_KERNEL_PMD 32-bit kernels this involves iterating
over the pgd_list and clearing all pmd entries in the pgds that
are cleared in the init_mm.pgd, which is the reference pagetable
that the vmalloc() code uses.
In that context the current practice of vmalloc_sync_all() iterating
until FIX_ADDR_TOP is buggy:
for (address = VMALLOC_START & PMD_MASK;
address >= TASK_SIZE_MAX && address < FIXADDR_TOP;
address += PMD_SIZE) {
struct page *page;
Because iterating up to FIXADDR_TOP will involve a lot of non-vmalloc
address ranges:
VMALLOC -> PKMAP -> LDT -> CPU_ENTRY_AREA -> FIX_ADDR
This is mostly harmless for the FIX_ADDR and CPU_ENTRY_AREA ranges
that don't clear their pmds, but it's lethal for the LDT range,
which relies on having different mappings in different processes,
and 'synchronizing' them in the vmalloc sense corrupts those
pagetable entries (clearing them).
This got particularly prominent with PTI, which turns SHARED_KERNEL_PMD
off and makes this the dominant mapping mode on 32-bit.
To make LDT working again vmalloc_sync_all() must only iterate over
the volatile parts of the kernel address range that are identical
between all processes.
So the correct check in vmalloc_sync_all() is "address < VMALLOC_END"
to make sure the VMALLOC areas are synchronized and the LDT
mapping is not falsely overwritten.
The CPU_ENTRY_AREA and the FIXMAP area are no longer synced either,
but this is not really a proplem since their PMDs get established
during bootup and never change.
This change fixes the ldt_gdt selftest in my setup.
[ mingo: Fixed up the changelog to explain the logic and modified the
copying to only happen up until VMALLOC_END. ]
Reported-by: Borislav Petkov <bp@suse.de>
Tested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Cc: <stable@vger.kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: hpa@zytor.com
Fixes: 7757d607c6: ("x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32")
Link: https://lkml.kernel.org/r/20191126111119.GA110513@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In the implementation of psxpad_spi_probe() the allocated memory for
pdev is leaked if psxpad_spi_init_ff() or input_register_polled_device()
fail. The solution is using device managed allocation, like the one used
for pad. Perform the allocation using
devm_input_allocate_polled_device().
Fixes: 8be193c7b1 ("Input: add support for PlayStation 1/2 joypads connected via SPI")
Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 2fe6899e36 upstream.
A number of issues are fixed relating to sysfs input validation:-
1) bb_ctrl_store() - incorrect compare of bit select field to absolute
value. Reworked per ETMv4 specification.
2) seq_event_store() - incorrect mask value - register has two
event values.
3) cyc_threshold_store() - must mask with max before checking min
otherwise wrapped values can set illegal value below min.
4) res_ctrl_store() - update to mask off all res0 bits.
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Fixes: a77de2637c ("coresight: etm4x: moving sysFS entries to a dedicated file")
Cc: stable <stable@vger.kernel.org> # 4.9+
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20191104181251.26732-6-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a284e11c37 upstream.
This increment of rmi_smbus in rmi_smb_read/write_block() causes
garbage to be read/written.
The first read of SMB_MAX_COUNT bytes is fine, but after that
it is nonsense. Trial-and-error showed that by dropping the
increment of rmiaddr everything is fine and the F54 function
properly works.
I tried a hack with rmi_smb_write_block() as well (writing to the
same F54 touchpad data area, then reading it back), and that
suggests that there too the rmiaddr increment has to be dropped.
It makes sense that if it has to be dropped for read, then it has
to be dropped for write as well.
It looks like the initial work with F54 was done using i2c, not smbus,
and it seems nobody ever tested F54 with smbus. The other functions
all read/write less than SMB_MAX_COUNT as far as I can tell, so this
issue was never noticed with non-F54 functions.
With this change I can read out the touchpad data correctly on my
Lenovo X1 Carbon 6th Gen laptop.
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Link: https://lore.kernel.org/r/8dd22e21-4933-8e9c-a696-d281872c8de7@xs4all.nl
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 86bcd3a129 upstream.
F34 is a bit special as it reinitializes the device and related driver
structs during the firmware update. This clears the fn_irq_mask which
will then prevent F34 from receiving further interrupts, leading to
timeouts during the firmware update. Make sure to reinitialize the
IRQ enables at the appropriate times.
The issue is in F34 code, but the commit in the fixes tag exposed the
issue, as before this commit things would work by accident.
Fixes: 363c53875a (Input: synaptics-rmi4 - avoid processing unknown IRQs)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Link: https://lore.kernel.org/r/20191129133514.23224-1-l.stach@pengutronix.de
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e38e486d66 upstream.
The recent commit in HD-audio stream management for changing the
stripe control seems causing a regression on some platforms. The
stripe control is currently used only by HDMI codec, and applying the
stripe mask unconditionally may lead to scratchy and static noises as
seen on some MacBooks.
For addressing the regression, this patch changes the stream
management code to apply the stripe mask conditionally only when the
codec driver requested.
Fixes: 9b6f7e7a29 ("ALSA: hda: program stripe bits for controller")
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=204477
Tested-by: Michael Pobega <mpobega@neverware.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191202074947.1617-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4cc8d6505a upstream.
syzkaller reported an invalid access in PCM OSS read, and this seems
to be an overflow of the internal buffer allocated for a plugin.
Since the rate plugin adjusts its transfer size dynamically, the
calculation for the chained plugin might be bigger than the given
buffer size in some extreme cases, which lead to such an buffer
overflow as caught by KASAN.
Fix it by limiting the max transfer size properly by checking against
the destination size in each plugin transfer callback.
Reported-by: syzbot+f153bde47a62e0b05f83@syzkaller.appspotmail.com
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191204144824.17801-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 336820c437 upstream.
We've added the bass speaker support on Acer 8951G by the commit
00066e9733 ("Add Acer Aspire Ethos 8951G model quirk"), but it seems
that the GPIO pin was wrongly set: while the commit turns off the bit
to power up the amp, the actual hardware reacts other way round,
i.e. GPIO bit on = amp on.
So this patch fixes the bug, turning on the GPIO bit 0x02 as default.
Since turning on the GPIO bit can be more easily managed with
alc_setup_gpio() call, we simplify the quirk code by integrating the
GPIO setup into the existing alc662_fixup_aspire_ethos_hp() and
dropping the whole ALC669_FIXUP_ACER_ASPIRE_ETHOS_SUBWOOFER quirk.
Fixes: 00066e9733 ("Add Acer Aspire Ethos 8951G model quirk")
Reported-and-tested-by: Sergey 'Jin' Bostandzhyan <jin@mediatomb.cc>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191128202630.6626-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 66eb3add45 upstream.
Jon Hunter: "I have been tracking down another suspend/NFS related
issue where again I am seeing random delays exiting suspend. The delays
can be up to a couple minutes in the worst case and this is causing a
suspend test we have to fail."
Change the use of a deferrable work to a standard delayed one.
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: 7e0a0e38fc ("SUNRPC: Replace the queue timer with a delayed work function")
Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
There's an issue with deferred requests through drain, where if we do
need to defer, we're not copying over the sqe_submit state correctly.
This can result in using uninitialized data when we then later go and
submit the deferred request, like this check in __io_submit_sqe():
if (unlikely(s->index >= ctx->sq_entries))
return -EINVAL;
with 's' being uninitialized, we can randomly fail this check. Fix this
by copying sqe_submit state when we defer a request.
Because it was fixed as part of a cleanup series in mainline, before
anyone realized we had this issue. That removed the separate states
of ->index vs ->submit.sqe. That series is not something I was
comfortable putting into stable, hence the much simpler addition.
Here's the patch in the series that fixes the same issue:
commit cf6fd4bd55
Author: Pavel Begunkov <asml.silence@gmail.com>
Date: Mon Nov 25 23:14:39 2019 +0300
io_uring: inline struct sqe_submit
Reported-by: Andres Freund <andres@anarazel.de>
Reported-by: Tomáš Chaloupka
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit aa4c396775 upstream.
Christophe reports that current master fails building on powerpc with
this error:
CC fs/io_uring.o
fs/io_uring.c: In function ‘loop_rw_iter’:
fs/io_uring.c:1628:21: error: implicit declaration of function ‘kmap’
[-Werror=implicit-function-declaration]
iovec.iov_base = kmap(iter->bvec->bv_page)
^
fs/io_uring.c:1628:19: warning: assignment makes pointer from integer
without a cast [-Wint-conversion]
iovec.iov_base = kmap(iter->bvec->bv_page)
^
fs/io_uring.c:1643:4: error: implicit declaration of function ‘kunmap’
[-Werror=implicit-function-declaration]
kunmap(iter->bvec->bv_page);
^
which is caused by a missing highmem.h include. Fix it by including
it.
Fixes: 311ae9e159 ("io_uring: fix dead-hung for non-iter fixed rw")
Reported-by: Christophe Leroy <christophe.leroy@c-s.fr>
Tested-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit eb59bd17d2 upstream.
If a filesystem returns negative inode sizes, future reads on the file were
causing the cpu to spin on truncate_pagecache.
Create a helper to validate the attributes. This now does two things:
- check the file mode
- check if the file size fits in i_size without overflowing
Reported-by: Arijit Banerjee <arijit@rubrik.com>
Fixes: d8a5ba4545 ("[PATCH] FUSE - core")
Cc: <stable@vger.kernel.org> # v2.6.14
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f1ebdeffc6 upstream.
exit_aio() is sometimes stuck in wait_for_completion() after aio is issued
with direct IO and the task receives a signal.
The reason is failure to call ->ki_complete() due to a leaked reference to
fuse_io_priv. This happens in fuse_async_req_send() if
fuse_simple_background() returns an error (e.g. -EINTR).
In this case the error value is propagated via io->err, so return success
to not confuse callers.
This issue is tracked as a virtio-fs issue:
https://gitlab.com/virtio-fs/qemu/issues/14
Reported-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Fixes: 45ac96ed7c ("fuse: convert direct_io to simple api")
Cc: <stable@vger.kernel.org> # v5.4
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 311ae9e159 upstream.
Read/write requests to devices without implemented read/write_iter
using fixed buffers can cause general protection fault, which totally
hangs a machine.
io_import_fixed() initialises iov_iter with bvec, but loop_rw_iter()
accesses it as iovec, dereferencing random address.
kmap() page by page in this case
Cc: stable@vger.kernel.org
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit cdb2256f79 upstream.
The SDIO HW reset procedure in mwifiex_sdio_card_reset_work() is broken,
when the SDIO card is shared with another SDIO func driver. This is the
case when the Bluetooth btmrvl driver is being used in combination with
mwifiex. More precisely, when mwifiex_sdio_card_reset_work() runs to resets
the SDIO card, the btmrvl driver doesn't get notified about it. Beyond that
point, the btmrvl driver will fail to communicate with the SDIO card.
This is a generic problem for SDIO func drivers sharing an SDIO card, which
are about to be addressed in subsequent changes to the mmc core and the
mmc_hw_reset() interface. In principle, these changes means the
mmc_hw_reset() interface starts to return 1 if the are multiple drivers for
the SDIO card, as to indicate to the caller that the reset needed to be
scheduled asynchronously through a hotplug mechanism of the SDIO card.
Let's prepare the mwifiex driver to support the upcoming new behaviour of
mmc_hw_reset(), which means extending the mwifiex_sdio_card_reset_work() to
support the asynchronous SDIO HW reset path. This also means, we need to
allow the ->remove() callback to run, without waiting for the FW to be
loaded. Additionally, during system suspend, mwifiex_sdio_suspend() may be
called when a reset has been scheduled, but waiting to be executed. In this
scenario let's simply return -EBUSY to abort the suspend process, as to
allow the reset to be completed first.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Cc: stable@vger.kernel.org # v5.4+
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f6a1964771 upstream.
PL011's ->flush_buffer() implementation releases and reacquires the port
lock. Due to a race condition here, data can end up being added to the
circular buffer but neither being discarded nor being sent out. This
leads to, for example, tcdrain(2) waiting indefinitely.
Process A Process B
uart_flush_buffer()
- acquire lock
- circ_clear
- pl011_flush_buffer()
-- release lock
-- dmaengine_terminate_all()
uart_write()
- acquire lock
- add chars to circ buffer
- start_tx()
-- start DMA
- release lock
-- acquire lock
-- turn off DMA
-- release lock
// Data in circ buffer but DMA is off
According to the comment in the code, the releasing of the lock around
dmaengine_terminate_all() is to avoid a deadlock with the DMA engine
callback. However, since the time this code was written, the DMA engine
API documentation seems to have been clarified to say that
dmaengine_terminate_all() (in the identically implemented but
differently named dmaengine_terminate_async() variant) does not wait for
any running complete callback to be completed and can even be called
from a complete callback. So there is no possibility of deadlock if the
DMA engine driver implements this API correctly.
So we should be able to just remove this release and reacquire of the
lock to prevent the aforementioned race condition.
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191118092547.32135-1-vincent.whitchurch@axis.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit b027ce2583 upstream.
hci_qca interfaces to the wcn3990 via a uart_dm on the msm8998 mtp and
Lenovo Miix 630 laptop. As part of initializing the wcn3990, hci_qca
disables flow, configures the uart baudrate, and then reenables flow - at
which point an event is expected to be received over the uart from the
wcn3990. It is observed that this event comes after the baudrate change
but before hci_qca re-enables flow. This is unexpected, and is a result of
msm_reset() being broken.
According to the uart_dm hardware documentation, it is recommended that
automatic hardware flow control be enabled by setting RX_RDY_CTL. Auto
hw flow control will manage RFR based on the configured watermark. When
there is space to receive data, the hw will assert RFR. When the watermark
is hit, the hw will de-assert RFR.
The hardware documentation indicates that RFR can me manually managed via
CR when RX_RDY_CTL is not set. SET_RFR asserts RFR, and RESET_RFR
de-asserts RFR.
msm_reset() is broken because after resetting the hardware, it
unconditionally asserts RFR via SET_RFR. This enables flow regardless of
the current configuration, and would undo a previous flow disable
operation. It should instead de-assert RFR via RESET_RFR to block flow
until the hardware is reconfigured. msm_serial should rely on the client
to specify that flow should be enabled, either via mctrl() or the termios
structure, and only assert RFR in response to those triggers.
Fixes: 04896a77a9 ("msm_serial: serial driver for MSM7K onboard serial peripheral.")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: stable <stable@vger.kernel.org>
Reviewed-by: Andy Gross <agross@kernel.org>
Link: https://lore.kernel.org/r/20191021154616.25457-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit eb9c1a41ea upstream.
As platform_get_irq() now prints an error when the interrupt does not
exist, this warnings are printed on bananapi-r2:
[ 4.935780] mt6577-uart 11004000.serial: IRQ index 1 not found
[ 4.962589] 11002000.serial: ttyS1 at MMIO 0x11002000 (irq = 202, base_baud = 1625000) is a ST16650V2
[ 4.972127] mt6577-uart 11002000.serial: IRQ index 1 not found
[ 4.998927] 11003000.serial: ttyS2 at MMIO 0x11003000 (irq = 203, base_baud = 1625000) is a ST16650V2
[ 5.008474] mt6577-uart 11003000.serial: IRQ index 1 not found
Fix this by calling platform_get_irq_optional() instead.
now it looks like this:
[ 4.872751] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
Fixes: 7723f4c5ec ("driver core: platform: Add an error message to platform_get_irq*()")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191027062117.20389-1-frank-w@public-files.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 17a29fea08 upstream.
When building for a non-Cavium MIPS system with COMPILE_TEST=y, the
Octeon ethernet driver hits a number of issues due to use of macros
provided only for CONFIG_CAVIUM_OCTEON_SOC=y configurations. For
example:
drivers/staging/octeon/ethernet-rx.c:190:6: error:
'CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE' undeclared (first use in this function)
drivers/staging/octeon/ethernet-rx.c:472:25: error:
'OCTEON_IRQ_WORKQ0' undeclared (first use in this function)
These come from various asm/ headers that a non-Octeon build will be
using a non-Octeon version of.
Fix this by using the octeon-stubs.h header for non-Cavium MIPS builds,
and only using the real asm/octeon/ headers when building a Cavium
Octeon kernel configuration.
This requires that octeon-stubs.h doesn't redefine XKPHYS_TO_PHYS, which
is defined for MIPS by asm/addrspace.h which is pulled in by many other
common asm/ headers.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
URL: https://lore.kernel.org/linux-mips/CAMuHMdXvu+BppwzsU9imNWVKea_hoLcRt9N+a29Q-QsjW=ip2g@mail.gmail.com/
Fixes: 171a9bae68 ("staging/octeon: Allow test build on !MIPS")
Cc: Matthew Wilcox (Oracle) <willy@infradead.org>
Cc: David S. Miller <davem@davemloft.net>
Link: https://lore.kernel.org/r/20191007231741.2012860-1-paul.burton@mips.com
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit c745da8d43 upstream.
Commit 7723f4c5ec ("driver core: platform: Add an error message to
platform_get_irq*()") added an error message to avoid drivers having
to print an error message when IRQ lookup fails. However, there are
some cases where IRQs are optional and so new optional versions of
the platform_get_irq*() APIs have been added for these cases.
The IRQs for Tegra HSP module are optional because not all instances
of the module have the doorbell and all of the shared interrupts.
Hence, since the above commit was applied the following error messages
are now seen on Tegra194 ...
ERR KERN tegra-hsp c150000.hsp: IRQ doorbell not found
ERR KERN tegra-hsp c150000.hsp: IRQ shared0 not found
The Tegra HSP driver deliberately does not fail if these are not found
and so fix the above errors by updating the Tegra HSP driver to use
the platform_get_irq_byname_optional() API.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20191011083459.11551-1-jonathanh@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7b8474466e upstream.
On compat interfaces, the high order bits of nanoseconds should be zeroed
out. This is because the application code or the libc do not guarantee
zeroing of these. If used without zeroing, kernel might be at risk of using
timespec values incorrectly.
Originally it was handled correctly, but lost during is_compat_syscall()
cleanup. Revert the condition back to check CONFIG_64BIT.
Fixes: 98f76206b3 ("compat: Cleanup in_compat_syscall() callers")
Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191121000303.126523-1-dima@arista.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 45a2d64696 upstream.
The layout of struct timeval is different on sparc64 from
anything else, and the patch I did long ago failed to take
this into account.
Change it now to handle sparc64 user space correctly again.
Quite likely nobody cares about parallel ports on sparc64,
but there is no reason not to fix it.
Cc: stable@vger.kernel.org
Fixes: 9a45048408 ("lp: support 64-bit time_t user space")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20191108203435.112759-7-arnd@arndb.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit d440538e5f upstream.
Commit 4fdbfd60a3a2 ("arm64: tegra: Add PCIe slot supply information
in p2972-0000 platform") added regulators for the PCIe slot on the
Jetson Xavier platform. One of these regulators has an active-low enable
and this commit incorrectly added an active-low specifier for the GPIO
which causes the following warning to occur on boot ...
WARNING KERN regulator@3 GPIO handle specifies active low - ignored
The fixed-regulator binding does not use the active-low flag from the
gpio specifier and purely relies of the presence of the
'enable-active-high' property to determine if it is active high or low
(if this property is omitted). Fix this warning by setting the GPIO
to active-high in the GPIO specifier. Finally, remove the
'enable-active-low' as this is not a valid property.
Fixes: 4fdbfd60a3a2 ("arm64: tegra: Add PCIe slot supply information in p2972-0000 platform")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 1e5e929c00 upstream.
Commit 3499359418 ("arm64: tegra: Enable HDMI on Jetson TX1")
added a regulator for HDMI on the Jetson TX1 platform. This regulator
has an active high enable, but the GPIO specifier for enabling the
regulator incorrectly defines it as active-low. This causes the
following warning to occur on boot ...
WARNING KERN regulator@10 GPIO handle specifies active low - ignored
The fixed-regulator binding does not use the active-low flag from the
gpio specifier and purely relies of the presence of the
'enable-active-high' property to determine if it is active high or low
(if this property is omitted). Fix this warning by setting the GPIO
to active-high in the GPIO specifier which aligns with the presense of
the 'enable-active-high' property.
Fixes: 3499359418 ("arm64: tegra: Enable HDMI on Jetson TX1")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add a new dtb imx8mm-evk-rm67191.dtb to support rm67191
mipi panel display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
The 'attach-bridge' property for dsi port@1 can be used
to assit the dsim bridge to check if the port is used to
attach to the next bridge display device(e.g. adv7511).
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
The 'attach-bridge' property for dsi port@1 can be used
to assit the dsim bridge to check if the port is used to
attach to the next bridge display device(e.g. adv7511).
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Add ADV7535 device node and enable the whole display
pipeline for mipi2hdmi on imx8mm evk board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Disable lockdep for release due to it has performance impact.
Defconfig generated by make ARCH=arm savedefconfig
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Both the LINK_UP_REQ and the LINK_DOWN_REQ IRQs can be received in the
same time when a reset is performed on the DPMAC's partner.
Handle first the link down and then the link up so that we do not
trigger a phylib WARNING like the following:
[ 446.272011] called from state NOLINK
[ 446.275604] WARNING: CPU: 0 PID: 473 at drivers/net/phy/phy.c:874
phy_start+0x44/0xa8
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
In case nothing changed in the link configuration do not call
dpmac_set_link_state().
This is needed in case of the following sequence of commands.
$ ip link set dev eth1 up; ip link set dev eth2 down
Phylib brings the link down when the aneg is started on the phy which
translates in a link down from phy in MC and confuses the MC linkman.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
As we enabled WQ_FREEZABLE for workqueue, flush_workqueue in suspend
stage will not success, for the workqueue is freezed.
flush_workqueue in suspend is a wrong operation with WQ_FREEZABLE,
so remove it.
Fixes: 5b07f684de ("LF-215: ASoC: fsl_rpmsg_i2s: Enable WQ_FREEZABLE for workqueue")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Back-to-back LPCG writes can be ignored by the LPCG register due to
a HW bug. The writes need to be seperated by at least 4 cycles of
the gated clock.
The workaround is implemented as follows:
1. For clocks running greater than or equal to 24MHz, a read
followed by the write will provide sufficient delay.
2. For clocks running below 24MHz, add a delay of 4 clock cylces
after the write to the LPCG register.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Make powersave and conservative governor built in instead of module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
The scheduler code calling cpufreq_update_util() may run during CPU
offline on the target CPU after the IRQ work lists have been flushed
for it, so the target CPU should be prevented from running code that
may queue up an IRQ work item on it at that point.
Unfortunately, that may not be the case if dvfs_possible_from_any_cpu
is set for at least one cpufreq policy in the system, because that
allows the CPU going offline to run the utilization update callback
of the cpufreq governor on behalf of another (online) CPU in some cases.
If that happens, the cpufreq governor callback may queue up an IRQ work
on the CPU running it, which is going offline, and the IRQ work will
not be flushed after that point. Moreover, that IRQ work cannot be
flushed until the "offlining" CPU goes back online, so if any other
CPU calls irq_work_sync() to wait for the completion of that IRQ work,
it will have to wait until the "offlining" CPU is back online and that
may not happen forever. In particular, a system-wide deadlock may
occur during CPU online as a result of that.
The failing scenario is as follows. CPU0 is the boot CPU, so it creates
a cpufreq policy and becomes the "leader" of it (policy->cpu). It
cannot go offline, because it is the boot CPU.
Next, other CPUs join the cpufreq policy as they go online and they
leave it when they go offline. The last CPU to go offline, say CPU3,
may queue up an IRQ work while running the governor callback on behalf
of CPU0 after leaving the cpufreq policy because of the
dvfs_possible_from_any_cpu effect described above. Then, CPU0 is the
only online CPU in the system and the stale IRQ work is still queued on
CPU3. When, say, CPU1 goes back online, it will run
irq_work_sync() to wait for that IRQ work to complete and so it will
wait for CPU3 to go back online (which may never happen even in
principle), but (worse yet) CPU0 is waiting for CPU1 at that point too
and a system-wide deadlock occurs.
To address this problem notice that CPUs which cannot run cpufreq
utilization update code for themselves (for example, because they have
left the cpufreq policies that they belonged to), should also be
prevented from running that code on behalf of the other CPUs that
belong to a cpufreq policy with dvfs_possible_from_any_cpu set and so
in that case the cpufreq_update_util_data pointer of the CPU running
the code must not be NULL as well as for the CPU which is the target
of the cpufreq utilization update in progress.
Accordingly, change cpufreq_this_cpu_can_update() into a regular
function in kernel/sched/cpufreq.c (instead of a static inline in a
header file) and make it check the cpufreq_update_util_data pointer
of the local CPU if dvfs_possible_from_any_cpu is set for the target
cpufreq policy.
Also update the schedutil governor to do the
cpufreq_this_cpu_can_update() check in the non-fast-switch case too
to avoid the stale IRQ work issues.
Fixes: 99d14d0e16 ("cpufreq: Process remote callbacks from any CPU if the platform permits")
Reported-by: Anson Huang <anson.huang@nxp.com>
Cc: 4.14+ <stable@vger.kernel.org> # 4.14+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Since the port nodes under dsim device can be detached
dynamically by other devices. So use the 'attach-bridge'
property to imply that if there is any available bridge
endpoint node exists. If not, the panel node existence
is required to be detected. If still not, whole display
components binding should be ended which can avoid the
endless defer probe problem when no available display
devices can be attached to dsim.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
The 'attach-bridge' property for dsi port@1 can be used
to assit the dsim bridge to check if the port is used to
attach to the next bridge display device(e.g. adv7511).
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
When built the driver as module, this typo error can
be found by compiler with below build error reported:
In file included from drivers/gpu/imx/lcdif/lcdif-common.c:20:
drivers/gpu/imx/lcdif/lcdif-common.c:78:25: error: ‘lcdif_dt_ids’ undeclared here (not in a function); did you mean ‘imx_lcdif_dt_ids’?
78 | MODULE_DEVICE_TABLE(of, lcdif_dt_ids);
| ^~~~~~~~~~~~
./include/linux/module.h:227:15: note: in definition of macro ‘MODULE_DEVICE_TABLE’
227 | extern typeof(name) __mod_##type##__##name##_device_table \
| ^~~~
./include/linux/module.h:227:21: error: ‘__mod_of__lcdif_dt_ids_device_table’ aliased to undefined symbol ‘lcdif_dt_ids’
227 | extern typeof(name) __mod_##type##__##name##_device_table \
| ^~~~~~
drivers/gpu/imx/lcdif/lcdif-common.c:78:1: note: in expansion of macro ‘MODULE_DEVICE_TABLE’
78 | MODULE_DEVICE_TABLE(of, lcdif_dt_ids);
| ^~~~~~~~~~~~~~~~~~~
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
The code change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes) and proposed a new
way to set ECC layout.
Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.
The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is
1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.
2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.
Previous code has two methods for ECC layout setting, the
legacy_set_geometry and set_geometry_by_ecc_info, the difference between
these two methods is, legacy_set_geometry set the chunk size larger chan
oob size and then set the maximum ECC strength that oob can afford.
While the set_geometry_by_ecc_info set chunk size and ECC strength
according to NAND spec. It has been proved that the first method cannot
provide safe ECC strength for some modern NAND chips, so in current
code,
1. Driver read NAND parameters first and then chose the proper ECC
layout setting method.
2. If the oob is large or NAND required data chunk larger than oob
size, chose set_geometry_for_large_oob, otherwise use
set_geometry_by_ecc_info
3. legacy_set_geometry only used for some NAND chips does not
contains necessary information. So this is only a backup plan, it is NOT
recommended to use these NAND chips.
Signed-off-by: Han Xu <han.xu@nxp.com>
csis_get_remote_sensor_pad() and media_entity_to_v4l2_subdev() called
to get remote subdev in many place. This patch wrap the two function
with a new method named csis_get_remote_subdev(). So we can remove
some redundant code.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby.cai <robby.cai@nxp.com>
Replace s_parm/g_parm with s_frame_interval/g_frame_interval because
s_parm/g_parm was remove in latest V4L2 framework, more detail, please
refer to commit: 8180b4f4f5
we need to use s_frame_interval/g_frame_interval to set/get new property
of subdev.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby.cai <robby.cai@nxp.com>
Currently sdhc0_clk is an orphan clock and it's rate is wrong.
The reason is missing parent pll clocks defined in DT.
$ cat /sys/kernel/debug/clk/clk_summary | grep sdhc
...
sdhc0_clk 0 0 0 0 0 0 50000
sdhc0_lpcg_per_clk 0 0 0 396000000 0 0 50000
As sdhc does not have requiremnt to change the clock parent to AVPLL now,
let's remove the unused parent clock definition in clock driver to avoid
this issue.
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
IMX8QXP MEK board connect data[9:2] lines of ov5640 sensor, so we need
to set sensor work at 10-bit mode.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Acked-by: Sandor.yu <sandor.yu@nxp.com>
In case long latency spent on some board such as i.mx8mq-evk where pcie
driver may take 200ms timing window to restore pcie link in no_irq phase,
press event will be ignored since key maybe already released before timer
start to run because of the above large 200ms window with irq disabled.
Directly report press event in interrupt handler after suspend to ensure
no press event miss in this case.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
As per latest i.MX8QM SOC Errata, TKT340553 workaround needs to be
updated to unconditionally downgrade TLB operations and instruction
cache maintenance.
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Export the OF table, report the OF module alias, to enable the
module autoloading.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
SAI software reset is done in runtime resume,
there is no need to do it in fsl_sai_dai_probe.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
On recent kernels clks which are marked with CLK_SET_RATE_GATE are
"protected" against further changes at clk_prepare time, including clk
set_parent and set_rate. See commit 9461f7b33d ("clk: fix
CLK_SET_RATE_GATE with clock rate protection"). The current fsl_sai
implementation ensures the clock is not in use prior set_parent,
extend this for set_rate also by moving if (sai->mclk_streams == 0)
outside fsl_sai_set_mclk_rate(). Aside of this avoid changing rate and
parent for BUS clk.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
In dcss_dtg_sync_set(), the pixel clock is cut off in order to change the rate.
However, if the vblank interrupt happens in the same time, it will freeze the
platform as it will access the DTG registers while the clock is off.
This patch will activate the vblank interrupt after the dcss_dtg_sync_set() is
called.
Also, while at it, make sure the DPR and DTG interrupts are masked off before
requesting the interrupt, so that the handlers are not called before CRTC is
enabled.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Upstream demoved the drmP.h header file. This patch replaces it with the
appropriate headers.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
When build with CONFIG_SND_SOC_IMX_PCM_DMA=m, there is error:
ERROR: "snd_pcm_lib_preallocate_free" [sound/soc/fsl/imx-pcm-dma-v2.ko] undefined!
The reason is that snd_pcm_lib_preallocate_free is not declared
with EXPORT_SYMBOL.
In this patch, we use snd_dma_alloc_pages & snd_dma_free_pages to replace
the snd_pcm_lib_preallocate_pages & snd_pcm_lib_preallocate_free to fix
the build issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The reset pin may be shared between multiple panels, so make it non
exclusive and set it's default state to reset. Also, don't put the pin
into reset in prepare, so it won't brake the other panel port.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
By default, the MIPI RX and TX clocks are parented to the BYPASS clock,
but it seems that this doesn't work on QXP. Since these clocks can also
be parented to MIPI_PLL and MIPI_PLL_DIV2, use the MIPI_PLL_DIV2 with a
fixed rate of 432M and parent the RX and TX clocks to it.
This works on both QM and QXP.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Add parent clocks to allow mipi to select a parent.
Now only support pll div2 by refer to 4.19 tree.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Panel driver modified in order to accept non-exclusive reset gpio, so we
can add back the reset gpio for MIPI1 panel.
Also, increase the clock-drop-level to 2, for a better pixel-clock.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
* linux-lts-nxp/lf-5.4.y: (6 commits)
LF-364: media: isi: correct capabilities for ISI m2m video device
LF-323-2: drm/bridge/cdns: enhance link training stability
LF-323-1: drm/bridge/cdns: move link training to bridge enable function
...
V4L2_CAP_VIDEO_CAPTURE_MPLANE and V4L2_CAP_VIDEO_OUTPUT_MPLANE is used
to video capture and output device, so remove them for mem-to-mem video
device
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Sandor.yu <sandor.yu@nxp.com>
Remove drm_dp_link_power_down from bridge_disable function,
in case some DP sinks aren't follow DP 1.1 specification
and can not exit the power saving state within 1 ms.
Add drm_dp_link_power_up to bridge_enable function,
make sure DP sinks are power up before link training.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Move link training and video enable functions from mode_set to
bridge_enable. it is more reasonable.
cdns_dp_mode_set don't needed in HPD thread, DP link training will
resetup in bridge_enable when cable connecting.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
On i.MX6DL, AXI clock is from 540M PFD in normal mode, and from periph
clk in low bus mode, so need to make sure AXI clock parent switch
correctly in normal mode and low bus mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
CONFIG_MSCC_FELIX_SWITCH is obsolete.
CONFIG_NET_DSA is a dependecy for FELIX and FELIX_SWITCH_TSN.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Balance the clocks enable/disable to make sure clock use count is 0 when the
module is not used.
This applies for imx8mm, imx7d.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
(cherry picked from commit c2e8e77015a69955541152f4942fa6ff58fbe4cd)
Balance the clocks enable/disable to make sure clock use count is 0 when the
module is not used.
This applies for imx8mq.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
(cherry picked from commit f7b9503f39836e6e84bd1302f3a9eeee9f87b060)
The EEE support has not been enabled on ENETC, but it may connect
to a PHY which supports EEE and advertises EEE by default, while
its link partner also advertises EEE. If this happens, the PHY enters
low power mode when the traffic rate is low and causes packet loss.
This patch disables EEE advertisement by default for any PHY that
ENETC connects to, to prevent the above unwanted outcome.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
After change e00f0e9f11 ("ASoC: fsl_dsp: Rename reserved-region
with memory-region") reserved memory area for DSP is now grabbed
from DSP node property named memory-region instead of reserved-region.
We've done this change in order to align with upstream implementation.
Usually we should support the old property name but because
imx-audio-framework is is obsolete and planned for removal in the future
we won't do that.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The default output data rate was only assigned to variable. It was not
configured for register when sensor init. This causes output data rate
is 800hz and it will increase cpu loading.
Config output data rate as 12.5hz to register when sensor init now.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
- If frame ID is MEDIA_PLAYER_SKIPPED_FRAME_ID, need skip this frame,
also need skip its tsm at the same time.
- Fixed coverity issue: CID 6344236 (#2 of 2): Buffer not null
terminated (BUFFER_SIZE_WARNING).
- Remove two deaded code about ctx pointer check.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Acked-by: ming_qian <ming.qian@nxp.com>
HDMI driver couldn't support unbind function now,
because HDMI FW should always running.
mipi dsi driver will probe faile if no mipi dsi panel connected
to mek board, then all connectors will be unbinded and hdmi will faile
in the secondly bind.
Disable mipi dsi in hdmi dts file to avoid hdmi driver unbinded.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
gpmi_init function may return without marking the last_busy status for
runtime, which causes gpmi doesn't go to auto suspend. Also fixed the
issue that pinctrl set to wrong state and re-apply timing after system
resume.
Signed-off-by: Han Xu <han.xu@nxp.com>
Another coming patch will wait for framegen secondary channel syncup
for non-sync mode cases. It appears that waiting for 50ms for video
modes like 1920x1080p@24 and 1920x1080p@30 is not enough. So, this
patch increases the timeout value to 100ms.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The Felix switch supports different port number with Ocelot.
This makes the bits mapping in TCAM entry and Action entry
is different with Ocelot for VCAP function.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
This removes build warning,
drivers/soc/fsl/rcpm.c: In function ‘rcpm_pm_prepare’:
drivers/soc/fsl/rcpm.c:126:37: warning: left shift count >= width of type [-Wshift-count-overflow]
(u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
^~
drivers/soc/fsl/rcpm.c:131:38: warning: left shift count >= width of type [-Wshift-count-overflow]
(u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
For some reason, the ADV7535 DSI-HDMI converter doesn't have a signal
when the DSI uses a phy_ref of 24M. In order to fix that, put the 27M as
the first option in phy_ref_rates.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
On 8QM, there is a single GPIO pin that is used for both MIPI DSI
interfaces. So, use the correct pin only for MIPI0, which will be used
for both ports MIPI0 and MIPI1.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add DTS files to support iMX8MQ DDR3l and DDR4 validation boards. Basic nodes
like UART, SD/eMMC, i2c, Ethernet, rawnand and usb are added to work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Add gpmi and apbh-dma nodes to i.MX8MQ DTSi. Both are used by RAWNAND driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
For ISI of QXP B0, if CHNL_STS[BUF1_ACTIVE] bit is zero, means buffer1
of ping-pong buffer is active, driver can't change buffer1 address.
If CHNL_STS[BUF1_ACTIVE] bit is set, means buffer1 is free, driver
can modify its address.
For ISI of QXP C0, the buffer active logical reverse. It means driver
can change buffer1 address if CHNL_STS[BUF1_ACTIVE] bit is zero and can't
if CHNL_STS[BUF1_ACTIVE] bit is set.
So driver need to distinguish soc version and select how to switch ping
pong buffer.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Sandor.yu <sandor.yu@nxp.com>
If the master mtd does not have any slave mtd partitions,
and its numeraseregions is one(only has one erease block), and
we attach the master mtd with : ubiattach -m 0 -d 0
We will meet the error:
-------------------------------------------------------
root@freescale ~$ ubiattach /dev/ubi_ctrl -m 0 -d 0
UBI: attaching mtd0 to ubi0
UBI error: io_init: multiple regions, not implemented
ubiattach: error!: cannot attach mtd0
error 22 (Invalid argument)
-------------------------------------------------------
In fact, if there is only one "erase block", we should not
prevent the attach.
This patch fixes it.
Signed-off-by: Huang Shijie <b32955@freescale.com>
(cherry picked from commit 361cdc47fc4c4db31c5485560cdabd94f409bd81)
(cherry picked from commit ebee7d7491)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Han Xu <han.xu@nxp.com>
The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
on LS1021A
Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zero
Workaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021A
Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
commit f3e4f3fc8e upstream.
The AML code implementing the WMI methods creates a variable length
field to hold the input data we pass like this:
CreateDWordField (Arg1, 0x0C, DSZI)
Local5 = DSZI /* \HWMC.DSZI */
CreateField (Arg1, 0x80, (Local5 * 0x08), DAIN)
If we pass 0 as bios_args.datasize argument then (Local5 * 0x08)
is 0 which results in these errors:
[ 71.973305] ACPI BIOS Error (bug): Attempt to CreateField of length zero (20190816/dsopcode-133)
[ 71.973332] ACPI Error: Aborting method \HWMC due to previous error (AE_AML_OPERAND_VALUE) (20190816/psparse-529)
[ 71.973413] ACPI Error: Aborting method \_SB.WMID.WMAA due to previous error (AE_AML_OPERAND_VALUE) (20190816/psparse-529)
And in our HPWMI_WIRELESS2_QUERY calls always failing. for read commands
like HPWMI_WIRELESS2_QUERY the DSZI value is not used / checked, except for
read commands where extra input is needed to specify exactly what to read.
So for HPWMI_WIRELESS2_QUERY we can safely pass the size of the expected
output as insize to hp_wmi_perform_query(), as we are already doing for all
other HPWMI_READ commands we send. Doing so fixes these errors.
Cc: stable@vger.kernel.org
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=197007
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=201981
BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1520703
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 16245db148 upstream.
The HP WMI calls may take up to 128 bytes of data as input, and
the AML methods implementing the WMI calls, declare a couple of fields for
accessing input in different sizes, specifycally the HWMC method contains:
CreateField (Arg1, 0x80, 0x0400, D128)
Even though we do not use any of the WMI command-types which need a buffer
of this size, the APCI interpreter still tries to create it as it is
declared in generoc code at the top of the HWMC method which runs before
the code looks at which command-type is requested.
This results in many of these errors on many different HP laptop models:
[ 14.459261] ACPI Error: Field [D128] at 1152 exceeds Buffer [NULL] size 160 (bits) (20170303/dsopcode-236)
[ 14.459268] ACPI Error: Method parse/execution failed [\HWMC] (Node ffff8edcc61507f8), AE_AML_BUFFER_LIMIT (20170303/psparse-543)
[ 14.459279] ACPI Error: Method parse/execution failed [\_SB.WMID.WMAA] (Node ffff8edcc61523c0), AE_AML_BUFFER_LIMIT (20170303/psparse-543)
This commit increases the size of the data element of the bios_args struct
to 128 bytes fixing these errors.
Cc: stable@vger.kernel.org
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=197007
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=201981
BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1520703
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 1cb0d2aee2 upstream.
Upstream commit 58e7515500 ("HID: core: move Usage Page concatenation
to Main item") adds support for Usage Page item after Usage ID items
(such as keyboards manufactured by Primax).
Usage Page concatenation in Main item works well for following report
descriptor patterns:
USAGE_PAGE (Keyboard) 05 07
USAGE_MINIMUM (Keyboard LeftControl) 19 E0
USAGE_MAXIMUM (Keyboard Right GUI) 29 E7
LOGICAL_MINIMUM (0) 15 00
LOGICAL_MAXIMUM (1) 25 01
REPORT_SIZE (1) 75 01
REPORT_COUNT (8) 95 08
INPUT (Data,Var,Abs) 81 02
-------------
USAGE_MINIMUM (Keyboard LeftControl) 19 E0
USAGE_MAXIMUM (Keyboard Right GUI) 29 E7
LOGICAL_MINIMUM (0) 15 00
LOGICAL_MAXIMUM (1) 25 01
REPORT_SIZE (1) 75 01
REPORT_COUNT (8) 95 08
USAGE_PAGE (Keyboard) 05 07
INPUT (Data,Var,Abs) 81 02
But it makes the parser act wrong for the following report
descriptor pattern(such as some Gamepads):
USAGE_PAGE (Button) 05 09
USAGE (Button 1) 09 01
USAGE (Button 2) 09 02
USAGE (Button 4) 09 04
USAGE (Button 5) 09 05
USAGE (Button 7) 09 07
USAGE (Button 8) 09 08
USAGE (Button 14) 09 0E
USAGE (Button 15) 09 0F
USAGE (Button 13) 09 0D
USAGE_PAGE (Consumer Devices) 05 0C
USAGE (Back) 0a 24 02
USAGE (HomePage) 0a 23 02
LOGICAL_MINIMUM (0) 15 00
LOGICAL_MAXIMUM (1) 25 01
REPORT_SIZE (1) 75 01
REPORT_COUNT (11) 95 0B
INPUT (Data,Var,Abs) 81 02
With Usage Page concatenation in Main item, parser recognizes all the
11 Usages as consumer keys, it is not the HID device's real intention.
This patch checks whether Usage Page is really defined after Usage ID
items by comparing usage page using status.
Usage Page concatenation on currently defined Usage Page will always
do in local parsing when Usage ID items encountered.
When Main item is parsing, concatenation will do again with last
defined Usage Page if this page has not been used in the previous
usages concatenation.
Signed-off-by: Candle Sun <candle.sun@unisoc.com>
Signed-off-by: Nianfu Bai <nianfu.bai@unisoc.com>
Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Cc: Siarhei Vishniakou <svv@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 6e78c01fde upstream.
This reverts commit f2538f9993. The patch
stopped JFFS2 from being able to mount an existing filesystem with the
following errors:
jffs2: error: (77) jffs2_build_inode_fragtree: Add node to tree failed -22
jffs2: error: (77) jffs2_do_read_inode_internal: Failed to build final fragtree for inode #5377: error -22
Fixes: f2538f9993 ("jffs2: Fix possible null-pointer dereferences...")
Cc: stable@vger.kernel.org
Suggested-by: Hou Tao <houtao1@huawei.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 14012c9f3b ]
Alan reported [0] that network is broken since the referenced commit
when using jumbo frames. This commit isn't wrong, it just revealed
another issue that has been existing before. According to the vendor
driver the RTL8168e-specific jumbo config doesn't apply for RTL8168evl.
[0] https://lkml.org/lkml/2019/11/30/119
Fixes: 4ebcb113ed ("r8169: fix jumbo packet handling on resume from suspend")
Reported-by: Alan J. Wylie <alan@wylie.me.uk>
Tested-by: Alan J. Wylie <alan@wylie.me.uk>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 2745aea675 ]
Some versions of iproute2 will output more than one line per entry, which
will cause the test to fail, like:
TEST: ipv6: list and flush cached exceptions [FAIL]
can't list cached exceptions
That happens, for example, with iproute2 4.15.0. When using the -oneline
option, this will work just fine:
TEST: ipv6: list and flush cached exceptions [ OK ]
This also works just fine with a more recent version of iproute2, like
5.4.0.
For some reason, two lines are printed for the IPv4 test no matter what
version of iproute2 is used. Use the same -oneline parameter there instead
of counting the lines twice.
Fixes: b964641e99 ("selftests: pmtu: Make list_flush_ipv6_exception test more demanding")
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Acked-by: Stefano Brivio <sbrivio@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit fd567ac20c ]
In commit 4f07b80c97 ("tipc: check msg->req data len in
tipc_nl_compat_bearer_disable") the same patch code was copied into
routines: tipc_nl_compat_bearer_disable(),
tipc_nl_compat_link_stat_dump() and tipc_nl_compat_link_reset_stats().
The two link routine occurrences should have been modified to check
the maximum link name length and not bearer name length.
Fixes: 4f07b80c97 ("tipc: check msg->reg data len in tipc_nl_compat_bearer_disable")
Signed-off-by: John Rutherford <john.rutherford@dektech.com.au>
Acked-by: Jon Maloy <jon.maloy@ericsson.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit c5daa6cccd ]
Partially sent record cleanup path increments an SG entry
directly instead of using sg_next(). This should not be a
problem today, as encrypted messages should be always
allocated as arrays. But given this is a cleanup path it's
easy to miss was this ever to change. Use sg_next(), and
simplify the code.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 9e5ffed37d ]
Looks like when BPF support was added by commit d3b18ad31f
("tls: add bpf support to sk_msg handling") and
commit d829e9c411 ("tls: convert to generic sk_msg interface")
it broke/removed the support for in-place crypto as added by
commit 4e6d47206c ("tls: Add support for inplace records
encryption").
The inplace_crypto member of struct tls_rec is dead, inited
to zero, and sometimes set to zero again. It used to be
set to 1 when record was allocated, but the skmsg code doesn't
seem to have been written with the idea of in-place crypto
in mind.
Since non trivial effort is required to bring the feature back
and we don't really have the HW to measure the benefit just
remove the left over support for now to avoid confusing readers.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 031097d9e0 ]
TLS 1.3 started using the entry at the end of the SG array
for chaining-in the single byte content type entry. This mostly
works:
[ E E E E E E . . ]
^ ^
start end
E < content type
/
[ E E E E E E C . ]
^ ^
start end
(Where E denotes a populated SG entry; C denotes a chaining entry.)
If the array is full, however, the end will point to the start:
[ E E E E E E E E ]
^
start
end
And we end up overwriting the start:
E < content type
/
[ C E E E E E E E ]
^
start
end
The sg array is supposed to be a circular buffer with start and
end markers pointing anywhere. In case where start > end
(i.e. the circular buffer has "wrapped") there is an extra entry
reserved at the end to chain the two halves together.
[ E E E E E E . . l ]
(Where l is the reserved entry for "looping" back to front.
As suggested by John, let's reserve another entry for chaining
SG entries after the main circular buffer. Note that this entry
has to be pointed to by the end entry so its position is not fixed.
Examples of full messages:
[ E E E E E E E E . l ]
^ ^
start end
<---------------.
[ E E . E E E E E E l ]
^ ^
end start
Now the end will always point to an unused entry, so TLS 1.3
can always use it.
Fixes: 130b392c6c ("net: tls: Add tls 1.3 support")
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit d10523d0b3 ]
When tls_do_encryption() fails the SG lists are left with the
SG_END and SG_CHAIN marks in place. One could hope that once
encryption fails we will never see the record again, but that
is in fact not true. Commit d3b18ad31f ("tls: add bpf support
to sk_msg handling") added special handling to ENOMEM and ENOSPC
errors which mean we may see the same record re-submitted.
As suggested by John free the record, the BPF code is already
doing just that.
Reported-by: syzbot+df0d4ec12332661dd1f9@syzkaller.appspotmail.com
Fixes: d3b18ad31f ("tls: add bpf support to sk_msg handling")
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
Acked-by: John Fastabend <john.fastabend@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 8a574f8665 ]
If we can't build the flow del notification, we can simply delete
the flow, no need to crash the kernel. Still keep a WARN_ON to
preserve debuggability.
Note: the BUG_ON() predates the Fixes tag, but this change
can be applied only after the mentioned commit.
v1 -> v2:
- do not leak an skb on error
Fixes: aed067783e ("openvswitch: Minimize ovs_flow_cmd_del critical section.")
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 8ffeb03fbb ]
All the callers of ovs_flow_cmd_build_info() already deal with
error return code correctly, so we can handle the error condition
in a more gracefull way. Still dump a warning to preserve
debuggability.
v1 -> v2:
- clarify the commit message
- clean the skb and report the error (DaveM)
Fixes: ccb1352e76 ("net: Add Open vSwitch kernel components.")
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 312434617c ]
This patch is to fix a data-race reported by syzbot:
BUG: KCSAN: data-race in sctp_assoc_migrate / sctp_hash_obj
write to 0xffff8880b67c0020 of 8 bytes by task 18908 on cpu 1:
sctp_assoc_migrate+0x1a6/0x290 net/sctp/associola.c:1091
sctp_sock_migrate+0x8aa/0x9b0 net/sctp/socket.c:9465
sctp_accept+0x3c8/0x470 net/sctp/socket.c:4916
inet_accept+0x7f/0x360 net/ipv4/af_inet.c:734
__sys_accept4+0x224/0x430 net/socket.c:1754
__do_sys_accept net/socket.c:1795 [inline]
__se_sys_accept net/socket.c:1792 [inline]
__x64_sys_accept+0x4e/0x60 net/socket.c:1792
do_syscall_64+0xcc/0x370 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x44/0xa9
read to 0xffff8880b67c0020 of 8 bytes by task 12003 on cpu 0:
sctp_hash_obj+0x4f/0x2d0 net/sctp/input.c:894
rht_key_get_hash include/linux/rhashtable.h:133 [inline]
rht_key_hashfn include/linux/rhashtable.h:159 [inline]
rht_head_hashfn include/linux/rhashtable.h:174 [inline]
head_hashfn lib/rhashtable.c:41 [inline]
rhashtable_rehash_one lib/rhashtable.c:245 [inline]
rhashtable_rehash_chain lib/rhashtable.c:276 [inline]
rhashtable_rehash_table lib/rhashtable.c:316 [inline]
rht_deferred_worker+0x468/0xab0 lib/rhashtable.c:420
process_one_work+0x3d4/0x890 kernel/workqueue.c:2269
worker_thread+0xa0/0x800 kernel/workqueue.c:2415
kthread+0x1d4/0x200 drivers/block/aoe/aoecmd.c:1253
ret_from_fork+0x1f/0x30 arch/x86/entry/entry_64.S:352
It was caused by rhashtable access asoc->base.sk when sctp_assoc_migrate
is changing its value. However, what rhashtable wants is netns from asoc
base.sk, and for an asoc, its netns won't change once set. So we can
simply fix it by caching netns since created.
Fixes: d6c0256a60 ("sctp: add the rhashtable apis for sctp global transport hashtable")
Reported-by: syzbot+e3b35fe7918ff0ee474e@syzkaller.appspotmail.com
Signed-off-by: Xin Long <lucien.xin@gmail.com>
Acked-by: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com>
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit e58c191241 ]
Slip_open doesn't clean-up device which registration failed from the
slip_devs device list. On next open after failure this list is iterated
and freed device is accessed. Fix this by calling sl_free_netdev in error
path.
Here is the trace from the Syzbot:
__dump_stack lib/dump_stack.c:77 [inline]
dump_stack+0x197/0x210 lib/dump_stack.c:118
print_address_description.constprop.0.cold+0xd4/0x30b mm/kasan/report.c:374
__kasan_report.cold+0x1b/0x41 mm/kasan/report.c:506
kasan_report+0x12/0x20 mm/kasan/common.c:634
__asan_report_load8_noabort+0x14/0x20 mm/kasan/generic_report.c:132
sl_sync drivers/net/slip/slip.c:725 [inline]
slip_open+0xecd/0x11b7 drivers/net/slip/slip.c:801
tty_ldisc_open.isra.0+0xa3/0x110 drivers/tty/tty_ldisc.c:469
tty_set_ldisc+0x30e/0x6b0 drivers/tty/tty_ldisc.c:596
tiocsetd drivers/tty/tty_io.c:2334 [inline]
tty_ioctl+0xe8d/0x14f0 drivers/tty/tty_io.c:2594
vfs_ioctl fs/ioctl.c:46 [inline]
file_ioctl fs/ioctl.c:509 [inline]
do_vfs_ioctl+0xdb6/0x13e0 fs/ioctl.c:696
ksys_ioctl+0xab/0xd0 fs/ioctl.c:713
__do_sys_ioctl fs/ioctl.c:720 [inline]
__se_sys_ioctl fs/ioctl.c:718 [inline]
__x64_sys_ioctl+0x73/0xb0 fs/ioctl.c:718
do_syscall_64+0xfa/0x760 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
Fixes: 3b5a39979d ("slip: Fix memory leak in slip_open error path")
Reported-by: syzbot+4d5170758f3762109542@syzkaller.appspotmail.com
Cc: David Miller <davem@davemloft.net>
Cc: Oliver Hartkopp <socketcan@hartkopp.net>
Cc: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Jouni Hogander <jouni.hogander@unikie.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 4e81c0b3fa ]
When user-space sets the OVS_UFID_F_OMIT_* flags, and the relevant
flow has no UFID, we can exceed the computed size, as
ovs_nla_put_identifier() will always dump an OVS_FLOW_ATTR_KEY
attribute.
Take the above in account when computing the flow command message
size.
Fixes: 74ed7ab926 ("openvswitch: Add support for unique flow IDs.")
Reported-by: Qi Jun Ding <qding@redhat.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 14e54ab914 ]
When a classful qdisc's child qdisc has set the flag
TCQ_F_CPUSTATS (pfifo_fast for example), the child qdisc's
cpu_bstats should be passed to gnet_stats_copy_basic(),
but many classful qdisc didn't do that. As a result,
`tc -s class show dev DEV` always return 0 for bytes and
packets in this case.
Pass the child qdisc's cpu_bstats to gnet_stats_copy_basic()
to fix this issue.
The qstats also has this problem, but it has been fixed
in 5dd431b6b9 ("net: sched: introduce and use qstats read...")
and bstats still remains buggy.
Fixes: 22e0f8b932 ("net: sched: make bstats per cpu and estimator RCU safe")
Signed-off-by: Dust Li <dust.li@linux.alibaba.com>
Signed-off-by: Tony Lu <tonylu@linux.alibaba.com>
Acked-by: Cong Wang <xiyou.wangcong@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 9bca3a0a92 ]
This function was using configuration of port 0 in devicetree for all ports.
In case CPU port was not 0, the delay settings was ignored. This resulted not
working communication between CPU and the switch.
Fixes: f5b8631c29 ("net: dsa: sja1105: Error out if RGMII delays are requested in DT")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 32085f25d7 ]
Geert Uytterhoeven reported that using devm_reset_controller_get leads
to a WARNING when probing a reset-controlled PHY. This is because the
device devm_reset_controller_get gets supplied is not actually the
one being probed.
Acquire an unmanaged reset-control as well as free the reset_control on
unregister to fix this.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
CC: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David Bauer <mail@david-bauer.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 1d7ea55668 ]
While enqueueing a broadcast skb to port->bc_queue, schedule_work()
is called to add port->bc_work, which processes the skbs in
bc_queue, to "events" work queue. If port->bc_queue is full, the
skb will be discarded and schedule_work(&port->bc_work) won't be
called. However, if port->bc_queue is full and port->bc_work is not
running or pending, port->bc_queue will keep full and schedule_work()
won't be called any more, and all broadcast skbs to macvlan will be
discarded. This case can happen:
macvlan_process_broadcast() is the pending function of port->bc_work,
it moves all the skbs in port->bc_queue to the queue "list", and
processes the skbs in "list". During this, new skbs will keep being
added to port->bc_queue in macvlan_broadcast_enqueue(), and
port->bc_queue may already full when macvlan_process_broadcast()
return. This may happen, especially when there are a lot of real-time
threads and the process is preempted.
Fix this by calling schedule_work(&port->bc_work) even if
port->bc_work is full in macvlan_broadcast_enqueue().
Fixes: 412ca1550c ("macvlan: Move broadcasts into a work queue")
Signed-off-by: Menglong Dong <dong.menglong@zte.com.cn>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit a95069ecb7 ]
In gve_alloc_queue_page_list(), when a page allocation fails,
qpl->num_entries will be wrong. In this case priv->num_registered_pages
can underflow in gve_free_queue_page_list(), causing subsequent calls
to gve_alloc_queue_page_list() to fail.
Fixes: f5cedc84a3 ("gve: Add transmit and receive support")
Signed-off-by: Jeroen de Borst <jeroendb@google.com>
Reviewed-by: Catherine Sullivan <csully@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 59c4bd853a upstream.
The state/owner of the FPU is saved to fpu_fpregs_owner_ctx by pointing
to the context that is currently loaded. It never changed during the
lifetime of a task - it remained stable/constant.
After deferred FPU registers loading until return to userland was
implemented, the content of fpu_fpregs_owner_ctx may change during
preemption and must not be cached.
This went unnoticed for some time and was now noticed, in particular
since gcc 9 is caching that load in copy_fpstate_to_sigframe() and
reusing it in the retry loop:
copy_fpstate_to_sigframe()
load fpu_fpregs_owner_ctx and save on stack
fpregs_lock()
copy_fpregs_to_sigframe() /* failed */
fpregs_unlock()
*** PREEMPTION, another uses FPU, changes fpu_fpregs_owner_ctx ***
fault_in_pages_writeable() /* succeed, retry */
fpregs_lock()
__fpregs_load_activate()
fpregs_state_valid() /* uses fpu_fpregs_owner_ctx from stack */
copy_fpregs_to_sigframe() /* succeeds, random FPU content */
This is a comparison of the assembly produced by gcc 9, without vs with this
patch:
| # arch/x86/kernel/fpu/signal.c:173: if (!access_ok(buf, size))
| cmpq %rdx, %rax # tmp183, _4
| jb .L190 #,
|-# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read_stable(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
|-#APP
|-# 512 "arch/x86/include/asm/fpu/internal.h" 1
|- movq %gs:fpu_fpregs_owner_ctx,%rax #, pfo_ret__
|-# 0 "" 2
|-#NO_APP
|- movq %rax, -88(%rbp) # pfo_ret__, %sfp
…
|-# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read_stable(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
|- movq -88(%rbp), %rcx # %sfp, pfo_ret__
|- cmpq %rcx, -64(%rbp) # pfo_ret__, %sfp
|+# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
|+#APP
|+# 512 "arch/x86/include/asm/fpu/internal.h" 1
|+ movq %gs:fpu_fpregs_owner_ctx(%rip),%rax # fpu_fpregs_owner_ctx, pfo_ret__
|+# 0 "" 2
|+# arch/x86/include/asm/fpu/internal.h:512: return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
|+#NO_APP
|+ cmpq %rax, -64(%rbp) # pfo_ret__, %sfp
Use this_cpu_read() instead this_cpu_read_stable() to avoid caching of
fpu_fpregs_owner_ctx during preemption points.
The Fixes: tag points to the commit where deferred FPU loading was
added. Since this commit, the compiler is no longer allowed to move the
load of fpu_fpregs_owner_ctx somewhere else / outside of the locked
section. A task preemption will change its value and stale content will
be observed.
[ bp: Massage. ]
Debugged-by: Austin Clements <austin@google.com>
Debugged-by: David Chase <drchase@golang.org>
Debugged-by: Ian Lance Taylor <ian@airs.com>
Fixes: 5f409e20b7 ("x86/fpu: Defer FPU state load until return to userspace")
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Rik van Riel <riel@surriel.com>
Tested-by: Borislav Petkov <bp@suse.de>
Cc: Aubrey Li <aubrey.li@intel.com>
Cc: Austin Clements <austin@google.com>
Cc: Barret Rhoden <brho@google.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: David Chase <drchase@golang.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: ian@airs.com
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Josh Bleecher Snyder <josharian@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20191128085306.hxfa2o3knqtu4wfn@linutronix.de
Link: https://bugzilla.kernel.org/show_bug.cgi?id=205663
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7a7ebfa85f upstream.
On zang's Dell XPS 13 9370 after Thunderbolt NVM firmware upgrade the
Thunderbolt controller did not come back as expected. Only after the
system was rebooted it became available again. It is not entirely clear
what happened but I suspect the new NVM firmware image authentication
failed for some reason. Regardless of this the router needs to be power
cycled if NVM authentication fails in order to get it fully functional
again.
This modifies the driver to issue a power cycle in case the NVM
authentication fails immediately when dma_port_flash_update_auth()
returns. We also need to call tb_switch_set_uuid() earlier to be able to
fetch possible NVM authentication failure when DMA port is added.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=205457
Reported-by: zang <dump@tzib.net>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 6689f0f4bb upstream.
Testing on different generations of Lantiq MIPS SoC based boards, showed
that it takes up to 1500 us until the core reset bit is cleared.
The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the
same timeout to fix wrong hang detections and make the driver work for
Lantiq MIPS SoCs.
At least till kernel 4.14 the hanging reset only caused a warning but
the driver was probed successful. With kernel 4.19 errors out with
EBUSY.
Cc: linux-stable <stable@vger.kernel.org> # 4.19+
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 492c88720d upstream.
platform_find_device_by_driver calls bus_find_device and passes
platform_match as the callback function. Casting the function to a
mismatching type trips indirect call Control-Flow Integrity (CFI) checking.
This change adds a callback function with the correct type and instead
of casting the function, explicitly casts the second parameter to struct
device_driver* as expected by platform_match.
Fixes: 36f3313d6b ("platform: Add platform_find_device_by_driver() helper")
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191112214156.3430-1-samitolvanen@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit b8c5d882c8 upstream.
This patch corrects an error in the Transform Record Cache initialization
code that was causing intermittent stability problems on the Macchiatobin
board.
Unfortunately, due to HW platform specifics, the problem could not happen
on the main development platform, being the VCU118 Xilinx development
board. And since it was a problem with hash table access, it was very
dependent on the actual physical context record DMA buffers being used,
i.e. with some (bad) luck it could seemingly work quit stable for a while.
Signed-off-by: Pascal van Leeuwen <pvanleeuwen@verimatrix.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit d69e07793f ]
Only io_uring uses (and added) these, and we want to disallow the
use of sendmsg/recvmsg for anything but regular data transfers.
Use the newly added prep helper to split the msghdr copy out from
the core function, to check for msg_control and msg_controllen
settings. If either is set, we return -EINVAL.
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 4257c8ca13 ]
This is in preparation for enabling the io_uring helpers for sendmsg
and recvmsg to first copy the header for validation before continuing
with the operation.
There should be no functional changes in this patch.
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This enables SOF for i.MX8QXP.
Brings in support for:
* IMX DSP protocol communication driver
* SOF_OF, device tree support for SOF
* SOF_IMX8, support for i.MX8QXP integration.
* Generic FSL DAI support
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Mark ocotp as read only, if you need to program fuse in linux,
remove this property.
Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The previous offset / 4 maps to fuse map row index, which is
not friendly for user. So align with the following patch, update
the write to align with fuse row index exactly
"
nvmem: imx: correct the fuse word index
iMX8 fuse word index represent as one 4-bytes word,
it should not be divided by 4.
Exp:
- MAC0 address layout in fuse:
offset 708: MAC[3] MAC[2] MAC[1] MAC[0]
offset 709: XX xx MAC[5] MAC[4]
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
"
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
SIP number 0xC200000A is for reading, 0xC200000B is for writing.
And the following two args for write are word index, data to write.
Fixes: 885ce72a09 ("nvmem: imx: scu: support write")
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Support Qbv/Qci/Qbu/Credit Base Shaper etc.
This patch using the generic netlink adapt layer driver net/tsn/*
and include/net/tsn.h interface load by user space. The user space
refer the include/uapi/linux/tsn.h.
Signed-off-by: Po Liu <Po.Liu@nxp.com>
The ENETC hardware support the Credit Based Shaper(CBS) which part
of the IEEE-802.1Qav. The CBS driver was loaded by the sch_cbs
interface when set in the QOS in the kernel.
Here is an example command to set 20Mbits bandwidth in 1Gbits port
for taffic class 7:
tc qdisc add dev eth0 root handle 1: mqprio \
num_tc 8 map 0 1 2 3 4 5 6 7 hw 1
tc qdisc replace dev eth0 parent 1:8 cbs \
locredit -1470 hicredit 30 \
sendslope -980000 idleslope 20000 offload 1
Signed-off-by: Po Liu <Po.Liu@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
On i.MX6QP, the soc_id exported to the /sys/devices/soc0/soc_id
should be 'i.MX6QP'.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
The i.MX8QM/QXP LDB control register lives in CSR region, so the offset
of it should be calculated according to CSR region start address.
Without this patch, the offset is calculated according to i.MX8QM/QXP
LVDS subsystem start address. This patch corrects the offset.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Registers tx_ulps and pxl2dpi live in CSR region, so the offsets of
them should be calculated according to CSR region start address.
Without this patch, the offsets are calculated according to i.MX8QM
MIPI DSI subsystem start address or i.MX8QXP LVDS/MIPI DSI subsystem
start address. This patch corrects the offsets.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The LVDS/MIPI DSI region is the CSR(Control Status Registers) space.
The spec tells us that the CSR start address is 0x1000 and end address
is 0x1FFF according to the subsystem start address. However, it turns
out some space are inaccessible, which would accidently cause system
hang via kernel regmap debugfs. This patch corrects the LVDS/MIPI DSI
region start address and chooses a sensible size, which makes sure all
exposed registers are accessible.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The spec tells us that the CSR start address is 0x1000 and end address
is 0x1FFF according to the subsystem start address. However, it turns
out some space are inaccessible, which would accidently cause system
hang via kernel regmap debugfs. This patch corrects the MIPI CSR
start address and chooses a sensible size, which makes sure all exposed
registers are accessible.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The LVDS region is the CSR(Control Status Registers) space.
The spec tells us that the CSR start address is 0x1000 and end address
is 0x1FFF according to the subsystem start address. However, it turns
out some space are inaccessible, which would accidently cause system
hang via kernel regmap debugfs. This patch corrects the LVDS region
start address and chooses a sensible size, which makes sure all exposed
registers are accessible.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The channel num (9 - 15) should not be supported in tdm & daisy chain
mode for there is two dataline, this channel number can't be
symmetrically distributed on two dataline (the first one is fixed to
be 8 channel)
Fixes commit 8d29874365 ("MLK-17817-2: ASoC: imx-ak4458: enable 16
channels in TDM mode")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0bc47b3166)
Create a new dts to support rm67191 panel display and its
touch function on the imx8mm ddr4 evk revb board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
There are some fallthrough build warnings reported by
the GCC with -Wimplicit-fallthrough option like below:
drivers/gpu/drm/bridge/sec-dsim.c: In function ‘sec_mipi_dsim_write_pl_to_sfr_fifo’:
drivers/gpu/drm/bridge/sec-dsim.c:606:11: warning: this statement may fall through [-Wimplicit-fallthrough=]
606 | pl_data |= ((u8 *)payload)[2] << 16;
| ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/bridge/sec-dsim.c:607:2: note: here
607 | case 2:
| ^~~~
drivers/gpu/drm/bridge/sec-dsim.c:608:11: warning: this statement may fall through [-Wimplicit-fallthrough=]
608 | pl_data |= ((u8 *)payload)[1] << 8;
| ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/bridge/sec-dsim.c:609:2: note: here
609 | case 1:
| ^~~~
drivers/gpu/drm/bridge/sec-dsim.c: In function ‘sec_mipi_dsim_read_pl_from_sfr_fifo’:
drivers/gpu/drm/bridge/sec-dsim.c:687:24: warning: this statement may fall through [-Wimplicit-fallthrough=]
687 | ((u8 *)payload)[2] = (pl >> 16) & 0xff;
| ~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/bridge/sec-dsim.c:688:4: note: here
688 | case 2:
| ^~~~
drivers/gpu/drm/bridge/sec-dsim.c:689:24: warning: this statement may fall through [-Wimplicit-fallthrough=]
689 | ((u8 *)payload)[1] = (pl >> 8) & 0xff;
| ~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/bridge/sec-dsim.c:690:4: note: here
690 | case 1:
| ^~~~
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
This enables SOF for i.MX8QXP.
Brings in support for:
* IMX DSP protocol communication driver
* SOF_OF, device tree support for SOF
* SOF_IMX8, support for i.MX8QXP integration.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This aligns DSP node description with upstream. No need
to add backward compatibility for older dtbs because
FSL DSP driver is obsolete and it will be removed in the future
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Because we've separated power domain enablement for DSP (DAI related
power-domains are now enabled in FSL DAI node) there is no need
to override power-domains node.
Note that IRQSTR_DSP power-domain was missing from initial dsp
description so add it now.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Introduce two DT properties in dsp node:
* fw-filename, optional property giving the firmware filename
(if this is missing fw filename is read from board description)
* tplg-filename, mandatory giving the topology filename.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Enable vbus low voltage alert and do force discharge, this can aid turn
off vbus quickly.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
fix following build warning:
../drivers/video/fbdev/mxc/mxc_hdmi.c: In function 'mxc_hdmi_cable_connected':
../drivers/video/fbdev/mxc/mxc_hdmi.c:1964:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
mxc_hdmi_default_edid_cfg(hdmi);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/video/fbdev/mxc/mxc_hdmi.c:1966:2: note: here
case HDMI_EDID_NO_MODES:
^~~~
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit ca5ffb6e67b6c4ce7351285a184179bd3c20afc5)
Fix the following build warning:
../drivers/dma/pxp/pxp_dma_v3.c: In function 'pxp_store_shift_ctrl_config':
../drivers/dma/pxp/pxp_dma_v3.c:1700:17: warning: this statement may fall through [-Wimplicit-fallthrough=]
shift_bypass = 1;
~~~~~~~~~~~~~^~~
../drivers/dma/pxp/pxp_dma_v3.c:1701:3: note: here
case PXP_PIX_FMT_YVYU:
^~~~
../drivers/dma/pxp/pxp_dma_v3.c:1705:17: warning: this statement may fall through [-Wimplicit-fallthrough=]
shift_bypass = 1;
~~~~~~~~~~~~~^~~
../drivers/dma/pxp/pxp_dma_v3.c:1706:3: note: here
case PXP_PIX_FMT_NV61:
^~~~
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit c1ca344b32c914c89cbcf307a2e1313ad82a0b71)
Since the commit
commit 212836a992
Author: Christoph Hellwig <hch@lst.de>
Date: Fri Jul 26 08:58:36 2019 +0200
dma-mapping: remove dma_{alloc,free,mmap}_writecombine
has removed dma_alloc_writecombine interface, below build
error occured:
drivers/video/fbdev/mxsfb.c: In function ‘mxsfb_overlay_map_video_memory’:
drivers/video/fbdev/mxsfb.c:2059:19: error: implicit declaration of function ‘dma_alloc_writecombine’; did you mean ‘pgprot_writecombine’? [-Werror=implicit-function-declaration]
2059 | ofb->video_mem = dma_alloc_writecombine(ofb->dev,
| ^~~~~~~~~~~~~~~~~~~~~~
| pgprot_writecombine
drivers/video/fbdev/mxsfb.c:2059:17: warning: assignment to ‘void *’ from ‘int’ makes pointer from integer without a cast [-Wint-conversion]
2059 | ofb->video_mem = dma_alloc_writecombine(ofb->dev,
| ^
drivers/video/fbdev/mxsfb.c: In function ‘mxsfb_overlay_exit’:
drivers/video/fbdev/mxsfb.c:2134:4: error: implicit declaration of function ‘dma_free_writecombine’; did you mean ‘pgprot_writecombine’? [-Werror=implicit-function-declaration]
2134 | dma_free_writecombine(ofb->dev, ofb->video_mem_size,
| ^~~~~~~~~~~~~~~~~~~~~
| pgprot_writecombine
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Since the commit
commit cf4a3ae4ef
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Tue May 28 11:02:47 2019 +0200
fbdev: lock_fb_info cannot fail
has changed the lock_fb_info() to void type, so cannot check its
return value anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The prompt string for config entry DRM_IMX_DPU is missing,
so this patch adds it.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
- Two USB certification configuration
i.MX customers need one Image for both USB certification and production,
add USB certification configurations will not affect normal functions.
- CONFIG_EXTCON_USB_GPIO
Align with v4.19 kernel, some old boards uses this configurations.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
i.MX customers need one Image for both USB certification and production,
add USB certification configurations will not affect normal functions.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
mhdp kernel driver support build as module.
All mhdp sub-modules are built into one driver module.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit f516f7769a52fdda185920a89efa3de9a1ddb9e8)
i.MX6UL and i.MX7D have Cortex-A7 inside, need to enable ARM_ERRATA_814220
for proper workaround.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
The former imx_v7_defconfig missed a lot configs. Re-generated by removing
only MULTI_V6 support and make savedefconfig.
Double checked with 4.19 .config, no signifcant config options are missing.
Fixes: 6d80685fd7 ("LF-272-1 ARM: config: add imx_v7_defconfig")
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
For vbus change event, we need read the vbus status to clear
the alert. Current code do this in queue work, this has problem
on single core running, the queue work of vbus change may have
no chance to be scheduled as we continue receive the vbus change
event in threaded irq.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Update typec node of 1st port to use the property of new kernel
driver, and use usb-role-switch for dual role switch.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Per latest imx8mn datasheet of CCM, the parent of usb1_ctrl_root_clk
should be usb_bus.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Since of_irq_count() is not exported as a symbol, we cannot
find it's definition when imx-dpu-core is built as a module.
To address this issue, this patch calls platform_irq_count()
to get irq count instead.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add synaptics_dsx_i2c touch support for imx8mm-ddr4-evk board and
imx8mq-evk board.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Use 2G/2G for user/kernel memory split to increase vmalloc size.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
1. Remove other Arch except layerscape and s32.
2. Change CONFIG_FORCE_MAX_ZONEORDER to 14
Then generated by make savedefconfig
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Remove MULTI_V6 and Vybrid support.
This is aligned with 4.19 support
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
* wifi/next: (51 commits)
MLK-22949 brcmfmac: add chip id check for clm_blob firmware load
MLK-22948 brcmfmac: avoid to send mailbox interrupt twice for core version 0xb
MLK-22946 brcmfmac: freeing wiphy after brcmf attach failed
dt-bindings: add new property to enable board_type
brcmfmac: let board_type is optional
...
* vfio/next: (10 commits)
vfio/fsl-mc: Map the VFIO region according to the flags received from mc firmware
vfio/fsl-mc: Add read/write support for fsl-mc devices
vfio/fsl-mc: trigger an interrupt via eventfd
vfio/fsl-mc: Add irq infrastructure for fsl-mc devices
vfio/fsl-mc: Added lock support in preparation for interrupt handling
...
* thermal/next: (12 commits)
MLK-23010 thermal: imx_sc_thermal: Correct message format to avoid stack corruption
thermal: imx_sc_thermal: Add system-wide device cooling to all thermal zones
thermal: qoriq: add thermal monitor unit version 2 support
thermal: imx: Add device cooling support
thermal: imx8mm: Add device cooling support
...
* sata/next: (11 commits)
LF-58: sata: imx8: fix the calibration failure of phy
MLK-22941 ata: ahci_imx: fix error path
ahci: imx: set the rx water mark to fix the gen3 link issue
ahci_qoriq: bug fix for ecc_addr
ahci: qoriq: workaround for errata A-379364 on lx2160a
...
* rpmsg/next: (8 commits)
LF-44 rpmsg: imx: add the rpmsg tty demo
rpmsg: imx: enable the tx_block mechanism in the flow
rpmsg: imx_rpmsg: add partition reset notify
rpmsg: imx: bug fix and clean up the codes
rpmsg: imx: extend the rpmsg support for imx8qm and so on
...
* reset/next: (12 commits)
reset: Kconfig: use 'ARCH_MXC' for reset dispmix
reset: imx8m: Correct clock name for dispmix driver
reset: gpio-reset: add pinctrl comsuer header file
reset: imx7: add the clkreq reset for imx8m
dt-bindings: reset: imx7: add clkreq reset used by the l1ss on imx8m
...
* qe/next: (6 commits)
config/qe: add irq-qeic support.
QE: remove PPCisms for QE
irqchip/qeic: remove PPCisms for QEIC
irqchip/qeic: merge qeic_of_init into qe_ic_init
irqchip/qeic: merge qeic init code from platforms to a common function
...
* pcie/next: (40 commits)
LF-128 PCI: imx: turn off the clocks and regulators when link is down
PCI: imx: add the imx pcie ep verification solution
misc: pci_endpoint_test: Add the layerscape PCIe GEN4 EP device support
PCI: mobiveil: Add workaround for unsupported request error
PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
...
After commit
622445541b ("kbuild: detect missing "WITH Linux-syscall-note" for uapi headers")
the headfile must explicitly include "WITH Linux-syscall-note".
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch provids netlink method to configure the TSN protocols hardwares.
TSN guaranteed packet transport with bounded low latency, low packet delay
variation, and low packet loss by hardware and software methods.
The three basic components of TSN are:
1. Time synchronization: This was implement by 8021AS which base on the
IEEE1588 precision Time Protocol. This is configured by the other way
in kernel.
8021AS not included in this patch.
2. Scheduling and traffic shaping and per-stream filter policing:
This patch support Qbv/Qci/Qbu/8021CB/Qav etc.
3. Selection of communication paths:
This patch not support the pure software only TSN protocols(like Qcc)
but hardware related configuration.
TSN Protocols supports by this patch: Qbv/Qci/Qbu/Credit-base Shaper(Qav).
This patch verified on NXP ls1028ardb board.
Signed-off-by: Po Liu <Po.Liu@nxp.com>
Depending on FW defaults USX AN in AQR PHY must be explicitly enabled when
using USXGMII. Enable it based on interface type.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Do not set up protocols for speeds that are not supported by FW. Enabling
these protocols leads to link issues on system side.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Adds support for AQR112 and AQR412 which is mostly based on existing code
with the addition of code configuring the protocol on system side.
This allows changing the system side protocol without having to deploy a
different firmware on the PHY.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
The retimer doesn't get probed in linux due to the fact that it's a
non-standard clause-45 device. Hardcoding the phyid in device-tree
and adding custom routines for registry read/write operations
solves the issue.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
* According to the AR8035 datasheet, smartEEE mode (active by default)
makes the PHY enters sleep after a configurable idle time. It does
this autonomously, without LPI (Low Power Idle) signals coming from MAC.
* Tested with ping (default of 1 second interval) over back-to-back
RGMII between 2 boards having AR8035 at both ends:
- Without patch:
225 packets transmitted, 145 received, 35% packet loss, time 229334ms
- With patch:
144 packets transmitted, 144 received, 0% packet loss, time 146378ms
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
LS1012A MAC PCS block has an erratum that is seen with specific PHY AR803x.
The issue is triggered by the (spec-compliant) operation of the AR803x PHY
on the LS1012A-FRWY board.Due to this, good FCS packet is reported as error
packet by MAC, so for these error packets FCS should be validated and
discard only real error packets in PFE Rx packet path.
Signed-off-by: Nagesh Koneti <koneti.nagesh@nxp.com>
Signed-off-by: Nagesh Koneti <“koneti.nagesh@nxp.com”>
Currently, the rules for configuring search paths in Kbuild have
changed: https://lkml.org/lkml/2019/5/13/37
This will lead the below error:
fatal error: pfe/pfe.h: No such file or directory
Fix it by adding $(srctree)/ prefix to the search paths.
Signed-off-by: Ting Liu <ting.liu@nxp.com>
RAM area used by PFE should be mapped using memremap() instead of
directly traslating physical addr to virtual. This will ensure proper
checks are done before the area is used.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Commit ("soc: fsl: guts: make fsl_guts_get_svr() static") has
made fsl_guts_get_svr() static and hence use generic soc_device
infrastructure to check SoC revision.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Setting link mode bits have changed with the integration of
commit (3c1bcc8 net: ethernet: Convert phydev advertize and
supported from u32 to link mode). Adapt to the new method of
setting and clearing the link mode bits.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
- separate mdio initialization from mac initialization
- Define pfe_mdio_priv_s structure to hold mii_bus structure and other
related data.
- Modify functions to work with the separted mdio init model.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Use commonly used phy-handle property and mdio subnode to handle
phy properties.
Deprecate bindings fsl,gemac-phy-id & fsl,pfe-phy-if-flags.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
- arrange members of struct mii_bus in sequence matching phy.h
- if mdio node is defined, use of_mdiobus_register to register
child nodes (phy devices) available on the mdio bus.
- remove of_phy_register_fixed_link from pfe_phy_init as it is being
handled in pfe_get_gemac_if_properties
- remove mdio enabled check
- skip phy init, if no PHY or fixed-link
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
- Use "phy-handle" and of_* functions to get phy node and fixed-link
parameters
- Reorganize phy parameters and initialize them only if phy-handle
or fixed-link is defined in the dtb.
- correct typo pfe_get_gemac_if_proprties to pfe_get_gemac_if_properties
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
- remove redundant hwfeature init
- remove unused vars from ls1012a_eth_platform_data
- To handle ls1012a errata_a010897, PPFE driver requires GUTS driver
to be compiled in. Select FSL_GUTS when PPFE driver is compiled.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Replace license text with corresponding SPDX identifiers and update the
format of existing SPDX identifiers to follow the new guideline
Documentation/process/license-rules.rst.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
HIF interrupts are enabled using ioctl from user space,
and epoll wait from user space wakes up when there is an HIF
interrupt.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Read and IOCTL support is added. Application would need to open,
read/ioctl the /dev/pfe_us_cdev device.
select is pending as it requires a wait_queue.
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
In cases where MAC is not connected to a normal MDIO-managed PHY
device, and instead to a switch, it is configured as a "fixed-link".
Code to handle this scenario is added here.
phy_node in the dtb is checked to identify a fixed-link.
On identification of a fixed-link, it is registered and connected.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Resolve the following indentation warning:
drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:
In function ‘pfe_get_gemac_if_proprties’:
drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:96:2:
warning: this ‘else’ clause does not guard...
[-Wmisleading-indentation]
else
^~~~
drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:98:3:
note: ...this statement, but the latter is misleadingly indented as
if it were guarded by the ‘else’
pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
^~~~~
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
On LS1012A rev 1.0, Jumbo frames are not supported as it causes
the PFE controller to hang. A reset of the entire chip is required
to resume normal operation.
To handle this errata, frames with length > 1900 are truncated for
rev 1.0 of LS1012A.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Disable CRC removal from the packet, so that packets are forwarded
as is to Linux.
CRC configuration in MAC will be reflected in the packet received
to Linux.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
MAC Receive Control Register was configured to allow jumbo frames.
This is removed as jumbo frames can be supported anytime by changing
mtu which will in turn modify MAX_FL field of MAC RCR.
Jumbo frames caused pfe to hang on LS1012A rev 1.0 Silicon due to
erratum A-010897.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Define and use PFE_RCR_MAX_FL_MASK to properly set Rx max frame
length of MAC Receive Control Register.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Reorganize members of struct pfe_netdev_ops to match with the order
of members in struct net_device_ops defined in include/linux/netdevice.h
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
HW Parse results are included in the packet headroom.
Length and Offset calculation now accommodates parse info size.
Signed-off-by: Archana Madhavan <archana.madhavan@nxp.com>
rmmod pfe.ko throws below warning:
kernfs: can not remove 'phydev', no directory
------------[ cut here ]------------
WARNING: CPU: 0 PID: 2230 at fs/kernfs/dir.c:1481
kernfs_remove_by_name_ns+0x90/0xa0
This is caused when the unregistered netdev structure is accessed to
disconnect phy.
Resolve the issue by unregistering netdev after disconnecting phy.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
This patch adds the userspace mode support to fsl_ppfe network driver.
In the new mode, basic hardware initialization is performed in kernel, while
the datapath and HIF handling is the responsibility of the userspace.
The new command line parameter is added to initialize the ppfe module
in userspace mode. By default the module remains in kernelspace networking
mode.
To enable userspace mode, use "insmod pfe.ko us=1"
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
pfe packet size was calculated without considering skb data alignment
and this resulted in jumbo frames crashing kernel when the
cacheline size increased from 64 to 128 bytes with
commit 9730348075 ("arm64: Increase the max granular size").
Modify pfe packet size caclulation to include skb data alignment of
sizeof(struct skb_shared_info).
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
PCS initialization sequence for 2.5G SGMII interface governs
auto negotiation to be in disabled mode
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
when we opearate in clause 45 mode, we need to call
the function get_phy_device() with its 3rd argument as
"true" and then the resultant phy device needs to be
register with phy layer via phy_device_register()
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Added flow control between TMU queues and PFE Linux driver,
based on TMU credits availability.
Added tx_qos module parameter to control this behavior.
Use queue-0 as default queue to transmit packets.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Akhila Kavi <akhila.kavi@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
__hif_lib_update_credit function is used to update the tmu credits.
If tx_qos is set, tmu credit is updated based on the number of packets
transmitted by tmu.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
While fixing checkpatch errors some of the index increments
were commented out. They are enabled.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
This patch introduces Linux support for NXP's LS1012A Packet
Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding
engine to provide high performance Ethernet interfaces. The device
includes two Ethernet ports.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
This removes the bootloader dependency for SGMII PCS pre-configuration,
as well as adds support for monitoring the in-band SGMII AN between the
PCS and the system-side link partner (PHY or other MAC).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The reason for doing this is that the 2 mainline Ocelot switches so far,
VSC7514 and VSC9959, have radically different SoC/SerDes integration. So
although the PHYLINK callbacks are common, the implementations will
actually lie in device-specific function pointers.
Also, there was a duplicated and unused function pointer for pcs_init in
struct ocelot, remove that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
This patch reworks ocelot_board.c (aka the MIPS on the VSC7514) to
register a PHYLINK instance for each port. The registration code is
local to the VSC7514, but the PHYLINK callback implementation is common
so that the Felix DSA front-end can use it as well (but DSA does its own
registration).
Now Felix can use native PHYLINK callbacks instead of the PHYLIB
adaptation layer in DSA, which had issues supporting fixed-link slave
ports (no struct phy_device to pass to the adjust_link callback), as
well as fixed-link CPU port at 2.5Gbps.
The old code from ocelot_port_enable and ocelot_port_disable has been
moved into ocelot_phylink_mac_link_up and ocelot_phylink_mac_link_down.
The PHY connect operation has been moved from ocelot_port_open to
mscc_ocelot_probe in ocelot_board.c.
The phy_set_mode_ext() call for the SerDes PHY has also been moved into
mscc_ocelot_probe from ocelot_port_open, and since that was the only
reason why a reference to it was kept in ocelot_port_private, that
reference was removed.
Again, the usage of phy_interface_t phy_mode is now local to
mscc_ocelot_probe only, after moving the PHY connect operation.
So it was also removed from ocelot_port_private.
*Maybe* in the future, it can be added back to the common struct
ocelot_port, with the purpose of validating mismatches between
state->phy_interface and ocelot_port->phy_mode in PHYLINK callbacks.
But at the moment that is not critical, since other DSA drivers are not
doing that either. No SFP+ modules are in use with Felix/Ocelot yet, to
my knowledge.
In-band AN is not yet supported, due to the fact that this is a mostly
mechanical patch for the moment. The mac_an_restart PHYLINK operation
needs to be implemented, as well as mac_link_state. Both are SerDes
specific, and Felix does not have its PCS configured yet (it works just
by virtue of U-Boot initialization at the moment).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
In the LS1028A, the VSC9959 switch was integrated with an NXP PCS which
performs SGMII AN and rate adaptation autonomously. The MAC does not
need to know about this, and forcing the MAC speed to something else,
when connected to a 10/100 link partner, actually breaks the GMII
internal link between the MAC and the PCS.
Add a quirk system in the ocelot driver, and a first quirk called "PCS
performs rate adaptation", to distinguish the VSC7514 from the VSC9959
regarding this behavior.
Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
This increases the MDIO hold time to 5 enet_clk cycles from the previous
value of 0. This is actually the out-of-reset value, that the driver was
previously overwriting with 0. Zero worked for the external MDIO, but
breaks communication with the internal MDIO buses on which the PCS of
ENETC SI's and Felix switch are found.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The Felix DSA switch has an internal MDIO bus that has the same register
map as the ENETC one, so the accessors can be reused.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
It doesn't quite make sense why restarting the AN process should be
unique to 802.3z (1000Base-X) modes. It is valid to put an SGMII PCS in
in-band AN mode, therefore also make PHYLINK re-trigger an
auto-negotiation if needed.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
QSGMII is just SGMII clocked at a higher frequency (5 Gbaud vs 1.25
Gbaud). Logically it is just 4 SGMII interfaces multiplexed onto the
same physical lanes. Each MAC PCS has its own in-band AN process with
the system side of the QSGMII PHY, which is identical to the regular
SGMII AN process. So allow QSGMII as a valid in-band AN mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Typically a MAC PCS auto-configures itself after it receives the
negotiated link settings from the PHY, but some MAC devices are more
special and need manual manipulation of the SGMII AN result.
Therefore, add the bit definitions for the SGMII registers 4 and 5
(local device ability, link partner ability), as well as a link_mode
conversion helper that can be used to feed the AN results into
phy_resolve_aneg_linkmode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The dsa switch instance hasn't alloc memory for switch ports in felix
initialization driver, which will cause NULL pointer issue. Using
dsa_switch_alloc to alloc memory for dsa switch instance.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Support tsn capabilities in DSA felix switch driver. This felix tsn
driver is using tsn configuration of ocelot, and registered on each
switch port through DSA port setup.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Support TSN configuration for ocelot switch. The TSN configuration
fucntions are based on tsn netlink interface, it can support Qbv,
Qbu, Qci, 802.1CB, and Qav configuration now.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Convert to use skb queue instead of the list of skbs.
The skb queue could provide protection with lock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Break the matching loop when find the matching skb for TX timestamp.
This is to avoid consuming more skbs incorrectly. The timestamp ID
is from 0 to 3 while the FIFO could support 128 timestamps at most.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch is to reuse ocelot functions as possible to enable PTP
clock and to support hardware timestamping on Felix.
On TX path, timestamping works on packet which requires timestamp.
The injection header will be configured accordingly, and skb clone
requires timestamp will be added into a list. The TX timestamp
is final handled in threaded interrupt handler when PTP timestamp
FIFO is ready.
On RX path, timestamping is always working. The RX timestamp could
be got from extraction header.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert to use ocelot_port_add_txtstamp_skb() for adding skbs which
require TX timestamp into list. Export it so that DSA Felix driver
could reuse it too.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The method getting TX timestamp by reading timestamp FIFO and
matching skbs list is common for DSA Felix driver too.
So move code out of ocelot_board.c, convert to use
ocelot_get_txtstamp() function and export it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
On the NXP LS1028A, there are 2 Ethernet links between the Felix switch
and the ENETC:
- eno2 <-> swp4, at 2.5G
- eno3 <-> swp5, at 1G
Only one of the above Ethernet port pairs can act as a DSA link for
tagging.
When adding initial support for the driver, it was tested only on the 1G
eno3 <-> swp5 interface, due to the necessity of using PHYLIB initially
(which treats fixed-link interfaces as emulated C22 PHYs, so it doesn't
support fixed-link speeds higher than 1G).
After making PHYLINK work, it appears that swp4 still can't act as CPU
port. So it looks like ocelot_set_cpu_port was being called for swp4,
but then it was called again for swp5, overwriting the CPU port assigned
in the DT.
It appears that when you call dsa_upstream_port for a port that is not
defined in the device tree (such as swp5 when using swp4 as CPU port),
its dp->cpu_dp pointer is not initialized by dsa_tree_setup_default_cpu,
and this trips up the following condition in dsa_upstream_port:
if (!cpu_dp)
return port;
So the moral of the story is: don't call dsa_upstream_port for a port
that is not defined in the device tree, and therefore its dsa_port
structure is not completely initialized (ds->num_ports is still 6).
Fixes: 5605194877 ("net: dsa: ocelot: add driver for Felix switch family")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This supports an Ethernet switching core from Vitesse / Microsemi /
Microchip (VSC9959) which is part of the Ocelot family (a brand name),
and whose code name is Felix. The switch can be (and is) integrated on
different SoCs as a PCIe endpoint device.
The functionality is provided by the core of the Ocelot switch driver
(drivers/net/ethernet/mscc). In this regard, the current driver is an
instance of Microsemi's Ocelot core driver, with a DSA front-end. It
inherits its name from VSC9959's code name, to distinguish itself from
the switchdev ocelot driver.
The patch adds the logic for probing a PCI device and defines the
register map for the VSC9959 switch core, since it has some differences
in register addresses and bitfield mappings compared to the other Ocelot
switches (VSC7511, VSC7512, VSC7513, VSC7514).
The Felix driver declares the register map as part of the "instance
table". Currently the VSC9959 inside NXP LS1028A is the only instance,
but presumably it can support other switches in the Ocelot family, when
used in DSA mode (Linux running on the external CPU, and not on the
embedded MIPS).
In a few cases, some h/w operations have to be done differently on
VSC9959 due to missing bitfields. This is the case for the switch core
reset and init. Because for this operation Ocelot uses some bits that
are not present on Felix, the latter has to use a register from the
global registers block (GCB) instead.
Although it is a PCI driver, it relies on DT bindings for compatibility
with DSA (CPU port link, PHY library). It does not have any custom
device tree bindings, since we would like to minimize its dependency on
device tree though.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
While it is entirely possible that this tagger format is in fact more
generic than just these 2 switch families, I don't have that knowledge.
The Seville switch in NXP T1040 has a similar frame format, but there
are enough differences (e.g. DEST field starts at bit 57 instead of 56)
that calling this file tag_vitesse.c is a bit of a stretch at the
moment. The frame format has been listed in a comment so that people who
add support for further Vitesse switches can rework this tagger while
keeping compatibility with Felix.
The "ocelot" name was chosen instead of "felix" because even the Ocelot
switch can act as a DSA device when it is used in NPI mode, and the Felix
tagger format is almost identical. Currently it is only used for the
Felix switch embedded in the NXP LS1028A chip.
The ABI for this tagger should be considered "not stable" at the moment.
The DSA tag is always placed before the Ethernet header and therefore,
we are using the long prefix for RX tags to avoid putting the DSA master
port in promiscuous mode. Once there will be an API in DSA for drivers
to request DSA masters to be in promiscuous mode unconditionally, we
will switch to the "no prefix" extraction frame header, which will save
16 padding bytes for each RX frame.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The Felix DSA driver needs to write to SYS_RAM_INIT_RAM_INIT for its own
chip initialization process.
Also update the MAINTAINERS file such that the headers exported by the
ocelot driver are under the same maintainers' umbrella as the driver
itself.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We will be registering another switch driver based on ocelot, which
lives under drivers/net/dsa.
Make sure the Felix DSA front-end has the necessary abstractions to
implement a new Ocelot driver instantiation. This includes the function
prototypes for implementing DSA callbacks.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The Felix switch has a different reset procedure, so a function pointer
needs to be created and added to the ocelot_ops structure.
The reset procedure has been moved into ocelot_init.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
When using the NPI port, the DSA tag is passed through Ethernet, so the
switch's MAC needs to accept it as it comes from the DSA master. Increase
the MTU on the external CPU port to account for the length of the
injection header.
Without this patch, MTU-sized frames are dropped by the switch's CPU
port on xmit, which is especially obvious in TCP sessions.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This constant will be used in a future patch to increase the MTU on NPI
ports, and will also be used in the tagger driver for Felix.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since in an NPI/DSA setup, not all ports will have the same MTU, we need
to make sure the watermarks for pause frames and/or tail dropping logic
that existed in the driver is still coherent for the new MTU values.
We need to do this because the NPI (aka external CPU) port needs an
increased MTU for the DSA tag. This will be done in a future patch.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
It doesn't make sense to rewrite all these registers every time the PHY
library notifies us about a link state change.
In a future patch we will customize the MTU for the CPU port, and since
the MTU was previously configured from adjust_link, if we don't make
this change, its value would have got overridden.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The adjust_link routine should be generic enough to be (re)used by
any SoC that integrates a switch core compatible with the Ocelot
core switch driver. Currently all configurations are generic except
for the PCS settings that are SoC specific. Move these out to the
Ocelot SoC/board instance.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Let's make this ioremap and regmap init code common. It should not
be platform dependent as it should be usable by PCI devices too.
Use better names where necessary to avoid clashes.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the
queuing subsystem for terminating traffic locally).
There are 2 issues with hardcoding the CPU port as #10:
- It is not clear which snippets of the code are configuring something
for one of the CPU ports, and which snippets are just doing something
related to the number of physical ports.
- Actually any physical port can act as a CPU port connected to an
external CPU (in addition to the local CPU). This is called NPI mode
(Node Processor Interface) and is the way that the 6-port VSC9959
(Felix) switch is integrated inside NXP LS1028A (the "local management
CPU" functionality is not used there).
This patch makes it clear that the ocelot_bridge_stp_state_set function
operates on the CPU port (by making it an implicit member of the
bridging domain), and at the same time adds logic for the NPI port (aka
a physical port) to play the role of a CPU port (it shouldn't be part of
bridge_fwd_mask, as it's not explicitly enslaved to a bridge).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that the places that configure routing destinations for the CPU port
have been marked as such, allow callers to specify their own CPU port
that is different than ocelot->num_phys_ports. A user will be the Felix
DSA driver, where the CPU port is one of the physical ports (NPI mode).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This will be called from the Felix DSA frontend, which will work in
PHYLIB compatibility mode initially.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is just common path code that belongs to ocelot_init,
it has nothing to do with a specific SoC/board instance.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Allow these functions to be called from the .port_enable and
.port_disable callbacks of DSA.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We need a function for the DSA front-end that does none of the
net_device registration, but initializes the hardware ports.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The VSC7514 switch (Ocelot) is a 10-port device, while VSC9959 (Felix)
is 6-port. Therefore the VLAN filtering mask would be out of bounds when
calling for this new switch. Fix that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert them into an implementation that can be called from DSA as well.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The ocelot and ocelot_port structures will be used by a new DSA driver,
so the ocelot_board.c file will have to allocate and work with a private
structure (ocelot_port_private), which embeds the generic struct
ocelot_port. This is because in DSA, at least one interface does not
have a net_device, and the DSA driver API does not interact with that
anyway.
The ocelot_port structure is equivalent to dsa_port, and ocelot to
dsa_switch. The members of ocelot_port which have an equivalent in
dsa_port (such as dp->vlan_filtering) have been moved to
ocelot_port_private.
We want to enforce the coding convention that "ocelot_port" refers to
the structure, and "port" refers to the integer index. One can retrieve
the structure at any time from ocelot->ports[port].
The patch is large but only contains variable renaming and mechanical
movement of fields from one structure to another.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The ocelot_port structure has a net_device embedded in it, which makes
it unsuitable for leaving it in the driver implementation functions.
Leave ocelot_flower.c untouched. In that file, ocelot_port is used as an
interface to the tc shared blocks. That will be addressed in the next
patch.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is needed so that the Felix DSA front-end can call the Ocelot
implementations.
The implementation of the "mc_disabled" switchdev attribute has also
been simplified by using the read-modify-write macro instead of
open-coding that operation.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is needed in order to present a simpler prototype to the DSA
front-end of ocelot.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
To be able to implement a DSA front-end over ocelot_fdb_add,
ocelot_fdb_del, ocelot_fdb_dump, these need to have a simple function
prototype that is independent of struct net_device, netlink skb, etc.
So rename the ndo ops of the ocelot driver into
ocelot_port_fdb_{add,del,dump}, and have them all call the abstract
implementations. At the same time, refactor ocelot_port_fdb_do_dump into
a function whose prototype is compatible with dsa_fdb_dump_cb_t, so that
the do_dump implementations can live together and be called by the
ocelot_fdb_dump through a function pointer.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We need an implementation of these functions that is agnostic to the
higher layer (switchdev or dsa).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch transforms the ocelot_vlan_port_apply function ("apply
what?") into 3 standalone functions:
- ocelot_port_vlan_filtering
- ocelot_port_set_native_vlan
- ocelot_port_set_pvid
These functions have a prototype that is better aligned to the DSA API.
The function also had some static initialization (TPID, drop frames with
multicast source MAC) which was not being changed from any place, so
that was just moved to ocelot_probe_port (one of the 6 callers of
ocelot_vlan_port_apply).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
* Update Kconfig to also check for ARCH_S32
* Add compatible string and quirks for fsl,s32v234
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
In .mdio_bus_phy_may_suspend(), there check netdev is NULL to judge to set
phy to suspend status.
netdev is NULL has three cases:
- phy is not found
- phy is found, match to general phy driver
- phy is found, match to specifical phy driver
Case 1: phy is not found, cannot communicate by MDIO bus.
Case 2: phy is found:
if phy dev driver probe/bind err, netdev is not __open__ status,
mdio bus is unregistered.
if phy is detached, phy had entered suspended status.
Case 3: phy is found, phy is detached, phy had entered suspended status.
So, in here, it shouldn't set phy to suspend by calling mdio bus.
In i.MX6UL evk/arm2 board, if down the ethx interface and do
suspend/resume, system will hang. Because after ethx down all clocks are
gated off, for general phy driver, unbind the phy device, for specifical
phy driver, no unbind the device, and the original driver call mdio bus to
set phy to suspend during system suspend, so system will hang since there
have mdio register access.
The patch can fix it.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Force mii bus runtime pm suspend during dev suspend since
phydev state already is PHY_HALTED, and there has no mii bus
accessing during suspend stage.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Double check the mii interrupt status during mdio bus accessing
to avoid interrupt lost in timeout case.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Set the default rx copybreak value to maximum that can improve
the performance when SMMU is enabled. User can change the copybreak
vaule in dynamically by ethtool.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
i.MX6SX-AI board has two enet MACs (MAC0 and MAC1), they share MAC0 MII
bus. When PHY0 don't connect to enet MAC0, MAC0 mii bus probe phy0 failed,
and the net interface is set to unattach mode. During suspend resume test,
driver don't reinit MAC0 after resume back, so MII bus don't work that
causes MAC1 also cannot access PHY1. SO reinit MAC0 MII bus for MAC1 using.
Signed-off-by: Fugang Duan <B38611@freescale.com>
The current driver support stop mode by calling machine api.
The patch add dts support to set gpr register for stop request.
imx8mq enter stop/exit stop mode by setting GPR bit, which can
be accessed by A core.
imx8qm enter stop/exit stop mode by calling IMX_SC ipc APIs that
communicate with M core ipc service, and the M core set the related
GPR bit at last.
After magic pattern coming during system suspend status, system will
be waked up, and irq handler will be called, then registers access
cause system hang due to clocks are off. So disable wake up irq in
.suspend(), and enable it in .resume().
Signed-off-by: Fugang Duan <B38611@freescale.com>
Support Gstreamer AVB demo support.
ring1 -> ClassA, ring2 -> ClassB, ring0 -> Best Effort
For QoS: ring1 > ring2 > ring0
For bandwidth reverse:
50% bandwidth -> ClassA
33% bandwidth -> ClassB
17% bandwidth -> Best effort queue
In general, ClassA run audio, ClassB run video.
Since AVB demo use big bandwidth streaming, video cost more than
33Mbps bandwidth, and with Qos limitation: ClassA >= ClassB > Best effort,
so we have to change ring2 bandwidth equal to ring1 bandwidth (50%).
After validate on FPGA, AVB demo can work fine for audio and video.
Signed-off-by: Fugang Duan <B38611@freescale.com>
i.MX8QM ENET IP version support timing specification that MAC
integrate clock delay in RGMII mode, the delayed TXC/RXC as an
alternative option to work well with various PHYs.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The i.MX8MQ ENET version support IEEE802.3az eee mode, add
eee mode tx lpi enable to support ethtool interface.
usage:
1. set sleep and wake timer to 5ms:
ethtool --set-eee eth0 eee on tx-lpi on tx-timer 5000
2. check the eee mode:
~# ethtool --show-eee eth0
EEE Settings for eth0:
EEE status: enabled - active
Tx LPI: 5000 (us)
Supported EEE link modes: 100baseT/Full
1000baseT/Full
Advertised EEE link modes: 100baseT/Full
1000baseT/Full
Link partner advertised EEE link modes: 100baseT/Full
Note: For realtime case and IEEE1588 ptp case, it should disable
EEE mode.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The ENET of imx8mq and imx8qm are basically the same as imx6sx,
but they have new features support based on imx6sx, like:
- imx8mq: supports IEEE 802.3az EEE standard.
- imx8qm: supports RGMII mode delayed clock.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add release_bus_freq on probe exit path.
This was exposed by commit 95ea0158b3fe ("net: fec: add defer probe for
of_get_mac_address")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Fixes: fed31bc87f36 ("MLK-9786 net: fec: Add busfreq support to the driver")
Currently, of_get_mac_address supports NVMEM, some platforms
MAC address that read from NVMEM efuse requires to swap bytes
order, so add new property "nvmem_macaddr_swap" to specify the
behavior. If the MAC address is valid from NVMEM, add new property
"nvmem-mac-address" in ethernet node.
Update these two properties in the binding documentation.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Aisheng: update to yaml format ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
If MAC address read from nvmem cell and it is valid mac address,
.of_get_mac_addr_nvmem() add new property "nvmem-mac-address" in
ethernet node. Once user call .of_get_mac_address() to get MAC
address again, it can read valid MAC address from device tree in
directly.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
ethernet controller driver call .of_get_mac_address() to get
the mac address from devictree tree, if these properties are
not present, then try to read from nvmem.
For example, read MAC address from nvmem:
of_get_mac_address()
of_get_mac_addr_nvmem()
nvmem_get_mac_address()
i.MX6x/7D/8MQ/8MM platforms ethernet MAC address read from
nvmem ocotp eFuses, but it requires to swap the six bytes
order.
The patch add optional property "nvmem_macaddr_swap" to swap
macaddr bytes order.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
If MAC address read from nvmem efuse by calling .of_get_mac_address(),
but nvmem efuse is registerred later than the driver, then it
return -EPROBE_DEFER value. So modify the driver to support
defer probe when read MAC address from nvmem efuse.
Updates for v2:
avoid memory leak that the queues allocated by fec_enet_alloc_queue().
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
If the memory allocated for cbd_base is failed, it should
free the memory allocated for the queues, otherwise it causes
memory leak.
And if the memory allocated for the queues is failed, it can
return error directly.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add request_bus_freq() and release_bus_freq() calls to the
various drivers to ensure that the DDR and AHB are the requested
frequency before the driver starts its task.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
The LS1028A MDIO errata tells us that any MDIO register access must not
be concurrent with any other ENETC register access.
That has been handled so far by a number of per-CPU spinlocks over the
ENETC register map. This came as an optimization over a single spinlock,
because the regular register accesses can still be concurrent with one
another, as long as they aren't concurrent with MDIO.
But this logic is broken in RT, because the enetc_rd_reg_wa and
enetc_wr_reg_wa functions can be preempted in any context, and when they
resume they may not run on the same CPU.
This renders the logic to take the per-CPU spinlock pointless, since the
spinlock may not be the correct one (corresponding to this CPU) after
preemption has occurred.
The following splat is telling us the same thing:
[ 19.073928] BUG: using smp_processor_id() in preemptible [00000000] code: systemd-network/3423
[ 19.073932] caller is debug_smp_processor_id+0x1c/0x30
[ 19.073935] CPU: 1 PID: 3423 Comm: systemd-network Not tainted 4.19.68-rt26 #1
[ 19.073936] Hardware name: LS1028A RDB Board (DT)
[ 19.073938] Call trace:
[ 19.073940] dump_backtrace+0x0/0x1a0
[ 19.073942] show_stack+0x24/0x30
[ 19.073945] dump_stack+0x9c/0xdc
[ 19.073948] check_preemption_disabled+0xe0/0x100
[ 19.073951] debug_smp_processor_id+0x1c/0x30
[ 19.073954] enetc_open+0x1b0/0xbc0
[ 19.073957] __dev_open+0xdc/0x160
[ 19.073960] __dev_change_flags+0x160/0x1d0
[ 19.073963] dev_change_flags+0x34/0x70
[ 19.073966] do_setlink+0x2a0/0xcd0
[ 19.073969] rtnl_setlink+0xe4/0x140
[ 19.073972] rtnetlink_rcv_msg+0x18c/0x500
[ 19.073975] netlink_rcv_skb+0x60/0x120
[ 19.073978] rtnetlink_rcv+0x28/0x40
[ 19.073982] netlink_unicast+0x194/0x210
[ 19.073985] netlink_sendmsg+0x194/0x330
[ 19.073987] sock_sendmsg+0x34/0x50
[ 19.073990] __sys_sendto+0xe4/0x150
[ 19.073992] __arm64_sys_sendto+0x30/0x40
[ 19.073996] el0_svc_common+0xa4/0x1a0
[ 19.073999] el0_svc_handler+0x38/0x80
[ 19.074002] el0_svc+0x8/0xc
But there already exists a spinlock optimized for the single writer,
multiple readers case: the rwlock_t. The writer in this case is the MDIO
access code (irrelevant whether that MDIO access is a register read or
write), and the reader is everybody else.
This patch also fixes two more existing bugs in the errata workaround:
- The MDIO access code was not unlocking the per-CPU spinlocks in the
reverse order of their locking order.
- The per-CPU spinlock array was not initialized.
Fixes: 5ec0d668d62e ("enetc: WA for MDIO register access issue")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Due to a hardware issue access to MDIO registers concurrent with other
ENETC register access may lead to the MDIO access being dropped or
corrupted. The workaround introduces locking for all register access in
ENETC space. To reduce performance impact, code except MDIO uses per-cpu
locks, MDIO code having to acquire all per-CPU locks to perform an access.
To further reduce the performance impact, datapath functions acquire the
per-cpu lock fewer times and use _hot accessors. All the rest of the code
uses the _wa accessors which lock every time a register is accessed.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Use device flag IFF_LIVE_ADDR_CHANGE to signal that
the device supports changing the primary mac address
for a ENETC port, when the PF eth interface is running.
This capability is required by certain applications,
like bonding mode 6 (Adaptive Load Balancing).
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Adds USXGMII protocol which is now supported in Linux. XGMII is kept for
compatibility although there is no plain XGMII support in ENETC.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Use DT information rather than in-band information from bootloader to
set up MAC for XGMII. For RGMII use the DT indication in addition to
RGMII defaults in hardware.
However, this implies that PHY connection information needs to be
extracted before netdevice creation, when the ENETC Port MAC is
being configured.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
The existence of the DT port node is the first thing checked
at probe time, and probing won't continue if the node is missing.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
ENETC has ethernet MACs capable of SGMII and SXGMII but
in order to use these protocols some serdes configurations
need to be performed.
The serdes is configurable via an internal MDIO bus
connected to an internal PCS device, all reads/writes are
performed at address 0.
This patch basically removes the dependecy on a bootloader
regarding serdes initialization.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Refactoring needed to support multiple MDIO buses.
'mdio_base' - MDIO registers base address - is being parameterized.
The MDIO accessors are made more generic to be able to work with
different MDIO register bases.
Some includes get cleaned up in the process.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
ENETC has a register PSPEED to indicate the link speed of hardware.
It is need to update accordingly. PSPEED field needs to be updated
with the port speed for QBV scheduling purposes. Or else there is
chance for gate slot not free by frame taking the MAC if PSPEED and
phy speed not match. So update PSPEED when link adjust. This is
implement by the adjust_link.
Signed-off-by: Po Liu <Po.Liu@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
ENETC supports in hardware for time-based egress shaping according
to IEEE 802.1Qbv. This patch implement the Qbv enablement by the
hardware offload method qdisc tc-taprio method.
Also update cbdr writeback to up level since control bd ring may
writeback data to control bd ring.
Signed-off-by: Po Liu <Po.Liu@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the autorescan sysfs in order to enable/disable the DPRC IRQs on
which automatic rescan of the bus is performed. This is important when
dynamic creation of objects is needed to happen in a timely manner because
object creation can be bundled together.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
This change of algorithm will enable faster bulk enqueue.
This will grately benefit XDP bulk enqueue.
Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
We are making the access decision in the initialization and
setting the function pointers accordingly.
Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Update of QMAN the interface to enqueue frame. We now support multiple
enqueue (qbman_swp_enqueue_multiple) and multiple enqueue with
a table of descriptor (qbman_swp_enqueue_multiple_desc).
Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
The QMAN region can be memory mapped, so it should be
of type IORESOURCE_MEM. Also use the bus specific bits
in order to pass additional information about the region.
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
The bus/dpcr driver use some common functions, export those
functions to be accessible from the vfio-mc driver.
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
Prepare the dprc_scan_objects function to be used by
the VFIO mc driver code. The function is used to scan the mc
objects by the bus driver. The same functionality is
needed by the VFIO mc driver, but in this case the
interrupt configuration is delayed until the userspace
configures them. In order to use the same function in both
drivers add a new parameter.
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
Using Rx skb bulking for all frames may negatively impact the
performance in some TCP termination scenarios, as it effectively
bypasses GRO.
Look at the hardware parse results of each ingress frame to see
if a TCP header is present or not; for TCP frames fall back to
the old implementation.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
For MC versions that support it, use the new DPNI link APIs, which
allow setting/getting of advertised and supported link modes.
A mapping between DPNI link modes and ethtool ones is created to
help converting from one to the other.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Add v2 of dpni_get_link_state() and dpni_set_link_cfg() commands.
The new version allows setting & getting advertised and supported
link options.
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Which was removed from upstream driver since without a MAC driver
we have no support for changing link parameters there.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Features include:
- dual rate shaping support
- per-channel shaping and classification
- strict / weighted scheduling among num_tc classes
- TD enabled for configured class queues
- prio class (leaf) firmware statistics support
- weights normalized based on max
- tc filters based classification
Only 1 CEETM ch supported, only channel shaping supported.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Statistics struct now contains an addditional page, with CEETM stats.
Also update the cmd version, and the call where it's used.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Compute average number of frames processed for each CDAN
received on a channel and print it in the detailed channel
stats.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Until now all error frames on the ingress path were discarded
in hardware. For debug purposes, add an option to have these
frames delivered to the cpu, on a dedicated queue.
TODO: Remove Kconfig option, find another way to enable
Rx error queue support
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Add support in sysfs for controlling DPNI Tx shaping
parameters: rate limit (in Mbps) and max burst size (in bytes).
The settings are per port.
TODO: See how to integrate Tx shaping support using
standard Linux tools (ethtool)
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
DPNIs can be configured to accept a maximum Tx rate and
burst size. Add the MC API for controlling these parameters.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Leave congestion group taildrop enabled for all traffic classes
when PFC is enabled. Notification threshold is low enough such
that it will be hit first and this also ensures that FQs on
traffic classes which are not PFC enabled won't drain the buffer
pool.
FQ taildrop threshold is kept disabled as long as any form of
flow control is on. Since FQ taildrop works with bytes, not number
of frames, we can't guarantee it will not interfere with the
congestion notification mechanism for all frame sizes.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Configure the hardware to generate PFC frames based on Rx congestion
notifications. When a certain number of frames accumulate in the
ingress queues corresponding to a traffic class, priority flow control
frames are generated for that TC.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Instruct the hardware to respond to received PFC frames.
Current firmware doesn't allow us to selectively enable PFC
on the Rx side for some priorities only, so we will react to
all incoming PFC frames (and stop transmitting on the traffic
classes specified in the frame).
PFC depends on the PAUSE flag also being set in link options.
Don't set it implicitly when user configures PFC, but issue
a warning if the two settings are not in sync.
For the Tx side, setting the PFC_PAUSE flag in the link options
is necessary but not sufficient, so PFC frame generation is
not enabled yet.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Add a skeleton implementation of DCB PFC ops. Actual hardware
configuration to be added in further commits.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Now that we have congestion group taildrop configured at all
times, we can afford to increase the frame queue taildrop
threshold; this will ensure a better response when receiving
bursts of large-sized frames.
Also decouple the buffer pool count from the Rx FQ taildrop
threshold, as above change would increase it too much. Instead,
keep the old count as a hardcoded value.
With the new limits, we try to ensure that:
* we allow enough leeway for large frame bursts (by buffering
enough of them in queues to avoid heavy dropping in case of
bursty traffic, but when overall ingress bandwidth is manageable)
* allow pending frames to be evenly spread between ingress FQs,
regardless of frame size
* avoid dropping frames due to the buffer pool being empty; this
is not a bad behaviour per se, but system overall response is
more linear and predictable when frames are dropped at frame
queue/group level.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
The increase in number of ingress frame queues means we now risk
depleting the buffer pool before the FQ taildrop kicks in.
Congestion group taildrop allows us to control the number of frames
that can accumulate on a group of Rx frame queues belonging to the
same traffic class.
This setting coexists with the frame queue based taildrop: whichever
limit gets hit first triggers the frame drop.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Make clear the setting refers to FQ-based taildrop and the threshold
value is given in bytes (the default option).
Reverse the logic of the second argument (pass tx_pause transparently).
This will be helpful further on.
Also don't set the device's Rx taildrop flag unless configuration
succeeds.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Add convenient helper functions that determines whether Rx/Tx pause
frames are enabled based on link state flags received from firmware.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Configure static ingress classification based on VLAN PCP field.
If the DPNI doesn't have enough traffic classes to accommodate all
priority levels, the lowest ones end up on TC 0 (default on miss).
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
With the addition of multiple traffic classes support, the number
of available frame queues grew significantly, overly inflating the
debugfs FQ statistics entry. Update it to only show the queues
which are actually in use (i.e. have a non-zero frame counter).
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
The firmware reserves for each DPNI a number of RX frame queues
equal to the number of configured flows x number of configured
traffic classes.
Current driver configuration directs all incoming traffic to
FQs corresponding to TC0, leaving all other priority levels unused.
Start adding support for multiple ingress traffic classes, by
configuring the FQs associated with all priority levels, not just
TC0. All settings that are per-TC, such as those related to
hashing and flow steering, are also updated.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Throughout the driver there are several places where we wait
indefinitely for DPIO portal commands to be executed, while
the portal returns a busy response code.
Even though in theory we are guaranteed the portals become
available eventually, in practice the QBMan hardware module
may become unresponsive in various corner cases.
Make sure we can never get stuck in an infinite while loop
by adding a retry counter for all portal commands.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Avoid triggering stack trace when retrieving interface counters via
ifconfig by allocating MC portal with atomic I/O enabled.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Set limits on the MTU to accommodate netdevice update. There is no need to
check the limits before setting the new value.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Improve ethtool support by adding ops for:
- driver info
- link status
- auto-negotiation setting and result
- speed setting and result
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
This contains the following patches migrated from sdk-v2.0.x branch:
dpaa2-evb: Added Edge Virtual Bridge driver
dpaa2-evb: Add VLAN_8021Q dependency
dpaa2-evb: Update dpdmux binary interface to 5.0
dpaa2-evb: Add support to set max frame length.
dpaa2-evb: Fix interrupt handling
dpaa2-evb: Add object version check
staging: dpaa2-evb: update dpdmux command ids set for MC v10.x
dpaa2-evb: replace uintX_t types by kernel preferred kernel uX types
dpaa2-evb: uprev binary interface to v6.0
dpaa2-evb: move comments from declaration to definition
dpaa2-evb: delete extraneous tabs
dpaa2-evb: align function parameters
dpaa2-evb: convert mc command build/parse to use C structs
Initial patches have been signed-off by:
Alex Marginean <alexandru.marginean@freescale.com>
J. German Rivera <German.Rivera@freescale.com>
Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
Mihaela Panescu <mihaela.panescu@freescale.com>
Catalin Horghidan <catalin.horghidan@nxp.com>
Ioana Ciornei <ioana.ciornei@nxp.com>
Stuart Yoder <stuart.yoder@freescale.com>
Updated FLIBs to the latest available for MC 10.x and fixed check-patch
warnings. Updated maintainer to myself and removed the DPAA2 Ethernet
dependency.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Fix a limitation that affects the networking behavior when the user
issues ifconfig down/up on a DPNI and the link remains down.
The actual problem was that the mac driver was not aware of the
dpni link change event. Now, the event is sent by firmware and
phylib state machine is manipulated conveniently.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
We used to set PHY_INTERFACE_MODE_XGMII as a placeholder
for interface modes listed by MC but not defined in the
linux kernel. Some of these modes have been added in upstream,
so update the interface mode array to better match actual PHYs.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
This patch is formed from 2 parts:
- first it moves the code that determines the if_mode to the
beginning so that it's used for both fixed link and phy mode.
- secondly, when in fixed link mode, call the phy_connect_phy
function as needed.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
For MC versions that support it, use the new DPMAC link APIs, which
allow setting/getting of advertised and supported link modes.
A mapping between DPMAC link modes and phydev ones is created to
help converting from one to the other.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Add v2 of dpmac_set_link_state() and dpmac_get_link_cfg() commands.
The new version allows setting & getting advertised and supported
link options.
Signed-off-by: Valentin Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
The instruction writing link state value in the MC command
structure wasn't correct, but it happened to work nonetheless.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Read the current API version exposed by the DPMAC object.
Add a check at probe time to make sure it is compatible with
the set of MC commands we intend to use on it.
Also, print the version number through ethtool driver info.
Signed-off-by: Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
If the a dpmac node defines its phy mode in the device tree using
the 'phy-mode' or the 'phy-connection-type' attributes this will take
precedence over the interface mode reported by the MC in the
dpmac attributes structure.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Keep in sync the PHY type settings in DPC and Linux device tree.
If the dpmac is connected to a fixed link PHY based on dpc config,
treat it as a fixed-link device, regardless of whether the "phy-handle"
property is present in the device tree node or not.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
- move dpaa2_mac_open and dpaa2_mac_stop out of
CONFIG_FSL_DPAA2_MAC_NETDEVS, since their implementation is necessary
regardless of it
- reorder ndo ops to match function implementation order
- update comment to describe the phy connection mode that's to be used -
it no longer depends on DPC, but on the device tree
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
free_netdev (put_device) already handles freeing the private data
structure, and KASAN will complain due to a free after free if we
explicitly do the same afterwards.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
The MAC driver may need to issue MC commands while in atomic
context (e.g. dpaa2_mac_get_stats can be called from a critical
section), so we need to use MC portals that don't sleep while
waiting for a command response to arrive.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Ethtool ops get/set_settings() are deprecated, so implement
get/set_link_ksettings() instead.
These now call the corresponding phy_ethtool_ksettings_*
generic functions, as the old ones also got deprecated
and removed from the kernel entirely.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Introduce the DPAA2 mac driver, which manages Datapath
Media Access Control (DPMAC) objects discovered on the
MC bus.
This driver works as a proxy between phylib including phy
drivers and the Management Complex firmware. It receives
updates on link state changes from PHY lib and forwards
them to the Management Complex and receives interrupts
from the Management Complex whenever a request is made to
change the link state.
This is a squashed commit containing contributions of the
following owners:
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Itai Katz <itai.katz@freescale.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Add the command build/parse APIs for operating on DPMAC
objects through the DPAA2 Management Complex.
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Alignment requirement on ARM is lenient (In Linux) for regions
mapped as "Memory Type" but have very strict policy for regions
mapped as "Device Type". Unaligned access to regions mapped
as "Device Type" will always result to unaligned fault.
DPIO driver have un-aligned access to QBman cacheable region
and the Linux driver maps the region as "Memory Type". On Host
Linux this works because MMU Stage-1 configured by driver allows
unaligned access. In Virtual Machine cases, final region mapping type
is governed by combination of Stage-1 and Stage-2 MMU mapping.
Linux driver in VM controls maps the region as "Memory Type" in
Stage-1 MMU while Stage-2 is controlled by KVM. And current KVM
implementation does not allow device region to be mapped as
"Memory Type". Till we have a working/upstream-able solution
for Virtual Machine, we need to change un-aligned access in DPIO
driver to be aligned
While we reached to this point as we observed below alignment
exception in Virtual Machine when accessing qbman cacheable region.
kvm [2347]: Unsupported FSC: EC=0x24 xFSC=0x21
ESR_EL2=0x92000061
error: kvm run failed Bad address
PC=ffff000008398e78 SP=ffff800009bcb540
X00=ffff000008041000 X01=ffff800009bcb580 X02=ffff800009bcb650
X03=0000000000000180
X04=ffff000008041001 X05=ffff800009bcb581 X06=0200000000000000
X07=0000000000000000
X08=0000000000000000 X09=ffff000008041000 X10=0000000000000001
X11=0000000000de6cb0
X12=00000000fa83b2da X13=0000000000000001 X14=000000007f605ec8
X15=00000000e26f5d5e
X16=000000008521af1e X17=000000001076277e X18=ffff800009bcb5c0
X19=ffff800079da2b00
X20=ffff800009bcb650 X21=0000000000000002 X22=0000000000000000
X23=0000000000000000
X24=0000000000000000 X25=ffff8000099e7440 X26=ffff000008da6000
X27=ffff000008e7f000
X28=00000000499e7440 X29=ffff800009bcb540 X30=ffff00000839a160
PSTATE=20000145 --C- EL1h
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Order preservation is a feature that will be supported
in dpni, dpseci and dpci devices.
This is a preliminary patch for the changes to be
introduced in the corresponding drivers.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
The mechanism for indicating to HW that a frame was dropped
when performing HW order restoration changed in QBMan 5.0 to
use a management command instead of a special enqueue command.
This patch implements that change when running on a QBMan 5.0
and above device.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Use the cpu affine DPIO unless there isn't one which can happen
if less DPIOs than cores are assign to the kernel.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Once we enable the cacheable portal memory, we need to do
cache flush for enqueue, vdq, buffer release, and management
commands, as well as invalidate and prefetch for the valid bit
of management command response and next index of dqrr.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Change cache enabled regsiter accessed to be cacheable
plus non-shareable to meet the performance requirement.
QMan's CENA region contains registers and structures that
are 64byte in size and are inteneded to be accessed using a
single 64 byte bus transaction, therefore this portal
memory should be configured as cache-enabled. Also because
the write allocate stash transcations of QBMan should be
issued as cachable and non-coherent(non-sharable), we
need to configure this region to be non-shareable.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Replace the spinlock that serializes the MC commands with a raw
spinlock. This is needed for the RT kernel because there are MC
commands sent in interrupt context.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Root dprc container have allocate-able mc-portals which
can be allocated by kernel drivers.
As per current design mc-portal is allocated from parent
dprc container if requesting device is not root-dprc.
This works fine if the requesting device is child of
root dprc container, because their parent is root-dprc
container. But if request device is grandchild of root
dprc container then it tries to allocate from it's parent
root dprc-container and it fails.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Implicit dma setting from bus works when dma-ranges
specified but not otherwise. We need to continue
to go for force_dma as default for cases dma-ranges not
specified. Example dynamic device tree generation for
generic kvm virtual machines.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Some of the APIs and data-structures are required for VFIO.
This patch moves dprc.h to public header files.
Also some APIs of mc-bus are made public for vfio.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Extend the ICID from 16-bit to 32-bit.
Primary reason for this is enabling DPAA2 drivers
in Virtual Machine where device-id range is defined
for DPAA2 devices is 0x10000-0x20000.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Macros to get coherency and the container device of the devices on
fsl-mc bus are required to suport SMMU for this bus. This patch
defines the same.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
'type' and 'flags' fields were missing from dprc_rsp_get_obj_region
structure therefore the MC Bus driver was not receiving proper flags
from MC like DPRC_REGION_CACHEABLE.
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
With recent MC release, a timeout of 500ms is not enough in most
circumstances. If MC firmware will respond faster, we should
decrease this value.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
VFIO fsl-mc driver need this function on device remove,
moving this to common header file
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
This patch is required for vfio-fsl-mc meta driver to successfully bind
layerscape container devices for device passthrough. This patch adds
a mechanism to allow a layerscape device to specify a driver rather than
a layerscape driver provide a device match.
This patch is based on following proposed patches for PCI and platform
devices
- https://lkml.org/lkml/2014/4/8/571 :- For Platform devices
- http://lists-archives.com/linux-kernel/28030441-pci-introduce-new-device-binding-path-using-pci_dev-driver_override.html
:- For PCI devices
Example to allow a device (dprc.1) to specifically bind
with driver (vfio-fsl-mc):-
- echo vfio-fsl-mc > /sys/bus/fsl-mc/devices/dprc.1/driver_override
- echo dprc.1 > /sys/bus/fsl-mc/drivers/fsl_mc_dprc/unbind
- echo dprc.1 > /sys/bus/fsl-mc/drivers/vfio-fsl-mc/bind
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
When a child DPRC is bound to the vfio_fsl_mc driver via
driver_override, its own children should not be bound to corresponding
host kernel drivers, but instead should be bound to the vfio_fsl_mc
driver as well.
Currently, when a child container is scanned by the vfio_fsl_mc
driver, child devices found are automatically bound to corresponding
host kernel drivers (e.g., DPMCP and DPBP objects are bound to the
fsl_mc_allocator driver, DPNI objects are bound to the ldpaa_eth
driver, etc), Then, the user has to manually unbind these child
devices from their drivers, set the driver_override sysfs attribute
to vfio_fsl_mc driver, for each of them and rebind them.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
DPRC-reset is required for VFIO and is missing from
mc-bus support.
This patch added reset-container support.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Introduce the rescan attribute as a bus attribute to
synchronize the fsl-mc bus objects and the MC firmware.
To rescan the fsl-mc bus, e.g.,
echo 1 > /sys/bus/fsl-mc/rescan
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Introduce the rescan attribute as a device attribute to
synchronize the fsl-mc bus objects and the MC firmware.
To rescan the root dprc only, e.g.
echo 1 > /sys/bus/fsl-mc/devices/dprc.1/rescan
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Adding userspace support for the MC (Management Complex) means exporting
an ioctl capable device file representing the root resource container.
This new functionality in the fsl-mc bus driver intends to provide
userspace applications an interface to interact with the MC firmware.
Commands that are composed in userspace are sent to the MC firmware
through the FSL_MC_SEND_MC_COMMAND ioctl. By default the implicit MC
I/O portal is used for this operation, but if the implicit one is busy,
a dynamic portal is allocated and then freed upon execution.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
We met below build break due to new kernel change:
8842d285ba ("net: Convert skb_frag_t to bio_vec")
../drivers/net/ethernet/freescale/dpaa/dpaa_eth.c: In function ‘dpaa_errata_a010022_has_dma_issue’:
../drivers/net/ethernet/freescale/dpaa/dpaa_eth.c:2137:37: error: ‘skb_frag_t’ has no member named ‘page_offset’
if (CROSS_4K_BOUND((uintptr_t)frag->page_offset, frag->bv_len))
^
../drivers/net/ethernet/freescale/dpaa/dpaa_eth.c:2105:5: note: in definition of macro ‘CROSS_4K_BOUND’
(((start) + (size)) > (((start) + 0x1000) & ~0xFFF))
^
../drivers/net/ethernet/freescale/dpaa/dpaa_eth.c:2137:37: error: ‘skb_frag_t’ has no member named ‘page_offset’
if (CROSS_4K_BOUND((uintptr_t)frag->page_offset, frag->bv_len))
^
../drivers/net/ethernet/freescale/dpaa/dpaa_eth.c:2105:27: note: in definition of macro ‘CROSS_4K_BOUND’
(((start) + (size)) > (((start) + 0x1000) & ~0xFFF))
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The ptp_qoriq driver could be used for both sdk version
dpaa driver and upstream version dpaa driver. So added
sdk dpaa dependency for ptp_qoriq driver.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Update for upstream data structure change similar to
commit b8b576a16f
Author: Matthew Wilcox (Oracle) <willy@infradead.org>
Date: Mon Jul 22 20:08:30 2019 -0700
net: Rename skb_frag_t size to bv_len
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Explicitly mention the root source tree directory when building. This
allows the build process to start from a different location.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Maintain all timestamping fields when copying the skb.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Align to the following upstream patches:
8cb0817 netlink: make validation more configurable for future strictness
ae0be8d netlink: make nla_nest_start() add NLA_F_NESTED flag
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The comparison for QMAN_REV31 was incorrect as it
would always fail due to the wrong mask.
This fixes the following error in newer GCC versions:
"error: bitwise comparison always evaluates to false
[-Werror=tautological-compare]"
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
As of Linux 5.0 variable length arrays on the stack are no
longer allowed. Change to a dynamic array and create a common
exit point in the function for cleanup.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Apply fixes corresponding to the following upstream patches:
3c1bcc8 net: ethernet: Convert phydev advertize and supported from u32 to link mode
1e562c8 ptp_qoriq: make structure/function names more consistent
70814e8 net: ethernet: Add helper for set_pauseparam for Asym Pause
22b7d29 net: ethernet: Add helper to determine if pause configuration is supported
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Only a limited number of FQs can be in the cache, setting the
QM_FQCTRL_PREFERINCACHE flag for all FQs is not useful.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Scatter/Gather frames are not support on LS1043A beacuse they trigger
the A010022 errata.
Even though we do not advertise S/G support to the stack, we need to
make sure that if S/G frames do reach the driver somehow, they trigger
the errata workaround.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Fix the platform device creation in QMan portals such that
dma mappings are done properly.
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Perform a verification of external buffer pools used which can cause array
overflow error in port init function SetExtBufferPools() if it was set to
value 1 via fman port API
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
The wait_for_completion() call in qman_delete_cgr_safe()
was triggering a scheduling while atomic bug, replacing the
kthread with a smp_call_function_single() call to fix it.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
The hardware timestamp value got didn't need to be multiplied
by nominal frequency since ptp_qoriq driver initialized the
counter to add clock period, not the clock tick.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
DPAA PTP timer was managed by ptp_qoriq driver in drivers/ptp/.
We will no longer manage it in sdk_fman driver and use related
APIs.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The SCFG_FMCLKDPSLPCR register is present on PPC targets only. This
feature does not apply to ARM SoCs.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Save the current CPU ID on ingress, when FSL_DPAA_DBG_LOOP is set.
Use the skb_set_queue_mapping() call instead of skb_record_rx_queue()
because the stack isn't involved and won't compensate for the additional
offset.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The driver relies on the no longer valid assumption that dma addresses
(iovas) are identical to physical addressees and uses phys_to_virt() to
make iova -> vaddr conversions. Fix this also for scatter-gather frames
using the iova -> phys conversion function added in the previous patch.
While at it, clean-up a redundant dpaa_bpid2pool() and pass the bp
as parameter.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
The driver relies on the no longer valid assumption that dma addresses
(iovas) are identical to physical addressees and uses phys_to_virt() to
make iova -> vaddr conversions. Fix this by adding a function that does
proper iova -> phys conversions using the iommu api and update the code
to use it.
Also, a dma_unmap_single() call had to be moved further down the code
because iova -> vaddr conversions were required before the unmap.
For now only the contiguous frame case is handled and the SG case is
split in a following patch.
While at it, clean-up a redundant dpaa_bpid2pool() and pass the bp
as parameter.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
The dma transactions initiator is the rx fman port so that's the device
that the dma mappings should be done. Previously the mappings were done
through the MAC device which makes no sense because it's neither dma-able
nor connected in any way to smmu.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
Enabling SMMU altered the order of device probing causing the dpaa1
ethernet driver to get probed before qbman and causing a boot crash.
Add predictability in the probing order by deferring the ethernet
driver probe after qbman and portals by using the recently introduced
qbman APIs.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
Add an API that retrieves the 'struct device' that the specified fman
port probed against. The new API will be used in a subsequent iommu
enablement related patch.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
During probing, FMAN is reset thus losing all its register
settings. Backup port ICID registers before reset and restore
them after, similarly to how it's done on powerpc / PAMU based
platforms.
This also has the side effect of disabling the old code path
(liodn backup/restore handling) that obviously make no sense
in the context of SMMU on ARMs.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Acked-by: Madalin Bucur <madalin.bucur@nxp.com>
Remove FSL_DPAA_ETH_USE_NDO_SELECT_QUEUE and record the
receive CPU in skb queue mapping to maintain the same CPU
for tx in forwarding scenarios.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
The stack calls the destroy() callback when a qdisc init() fails.
We stop calling it ourselves and trust the stack do the cleanup.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The current_kernel_time() call was removed in [1] in order to avoid
overflows in 2038. Use ktime_get_coarse_real_ts64() instead.
[1] 9765164 ("y2038: remove unused time interfaces")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The bootmem allocator was removed in [1]. The memblock allocator is
supposed to be used directly instead. We already include it.
[1] afd505b ("mm: remove include/linux/bootmem.h")
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The congestion thresholds need to be set in such a way that:
a) the threshold is high enough so that frames aren't dropped
unnecessarily
b) the threshold is low enough so that the latency isn't too big
The current thresholds are set too high. In forwarding scenarios, the
latency is too large and frames are dropped on ingress due to a lack of
buffers.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The skb backpointer is stored right before the FMan buffer, in order to
avoid overwriting. The memory area storing the backpointer was outside of
the skb. This made it hard to guarantee its size.
This patch changes the layout of the skb at buffer seed time: the area
reserved for storing the skb backpointer is part of the skb's headroom.
This makes it easier to track if the backpointer can be safely stored
when recycling the buffer.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Current ptp compatible "fsl,fman-rtc" used for ptp probe
in fmd driver couldn't involve PowerPC DPAA FMan PTP timer.
Let's use "fsl,fman-ptp-timer" instead to support DPAA FMan
PTP timer of both ARM and PowerPC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
If the dqrr_init() function consumes frames during init
the cursor needs to be updated before anything starts
to use the ring.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
The FMan reads 256 bytes from the start of the SGT regardless of its
size. We reserve the same amount of memory on TX to access.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Due to the A010022 errata restrictions, Jumbo frames on LS1043A require two
conditions to be met:
- on TX, the data is stored in a contiguous buffer of up to 9600 bytes
- the data is aligned to 256 bytes
The conditions are met by realigning all outgoing frames to 256 bytes.
Also, compound pages of varying orders are allocated to accommodate the
outgoing contiguous buffers.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
The CEETM CQs must be empty when configured. To guarantee this, stop all
transmissions and wait for them to drain before releasing them. On the
next configuration, we are certain they will be empty.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Once the pfiofo qdiscs are grafted to the netdev queues, they are destroyed
by the kernel when required. Remove references to the pfifo qdiscs after
grafting, in order to avoid double free scenarios.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
* The mEMAC configuration for RGMII is held in the IF_MODE register
* In the driver, IF_MODE is configured in 2 places (both in fman_memac.c):
- fman_memac_init: sets the IF_MODE bit macro IF_MODE_RGMII_AUTO
(this translates to setting ENA = 1 - Enable automatic speed selection
- RGMII PHY in-band status information is used to select the speed
of operation).
- fman_memac_adjust_link: brings the RGMII port in ENA = 0 mode
(link speed not determined autonomously by the MAC, but set according
to SSP).
* The issue with the current code is that in the case of RGMII fixed-link,
the of_phy_attach function is being called, instead of of_phy_connect
with a callback that calls fman_memac_adjust_link.
* For this reason, the RGMII port is left in a state with ENA = 1. In
most (if not all) RGMII fixed-link setups, the link partner will not
send any in-bank link speed information that is expected by the mEMAC.
* The effect is that the link speed setting will probably not be correct
(and will definitely not be according to the "fixed-link" property in
the DTS).
* The adjust_link callback seems to be called by the PHY state machine,
even for fixed links, exactly once: on "link up". Therefore, this
patch ensures that on link up, RGMII fixed links are configured to the
link speed that is set in the DTS, and not left with IF_MODE[ENA] = 1.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Some skbs on the Tx path may be reallocated by the driver
due to insufficient headroom, in which case the socket
value gets lost.
Make sure we propagate the skb ownership information to the
new skb, since it's needed by the Tx timestamp function in
the kernel.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
The (unused) timer code is no longer compatible with the newer
kernel API. Disabling the incompatible code in the arm64 code.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
The (unused) timer code is no longer compatible with the newer
kernel API. Disabling the incompatible code.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
On LS1043A SoC there is a known erratum ERR010022 that results in split DMA
transfers in the FMan under certain conditions. This, combined with a fixed
size FIFO of ongoing DMA transfers that may overflow when a split occurs,
results in the FMan stalling DMA transfers under high traffic. To avoid the
problem, one needs to prevent the DMA transfer splits to occur by preparing
the buffers as follows.
In order to prevent split transactions, all frames need to be aligned to 16
bytes and not cross 4K address boundaries. To allow Jumbo frames (up to
9.6K), all data must be aligned to 256 byes. This way, 4K boundary crossings
will not trigger any transaction splits.
The errata is prevented from manifesting by realigning all outgoing frames to
256 byte boundaries. In the process, all S/G frames are linearized.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Guarantee there is enough space inside the skb's headroom to store the
skb back-pointer before recycling the buffer. The back-pointer is stored
right before the buffer's start.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
When the egress CQ is congested, drop the frames instead of enqueueing
them. This is more efficient than enqueueing and receiving them back on
the ERN queue.
We also can't stop the netdev queues because that would affect all the CQs
and would hinder prioritization.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Configure the CEETM egress congestion thresholds independently from the
default Ethernet driver's Work Queues. Allow the user to edit the
thresholds through menuconfig.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Rename PHY_INTERFACE_MODE_SGMII_2500 to PHY_INTERFACE_MODE_2500SGMII
Convention is to put the number(2500) first and then the
interface mode(SGMII)
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Invalidate the cache for the software portals before using them
since the portals are non coherent. This ensures that the core
using the portal is seeing the most up to date information in
case the cache contained older data. This is important during
the cleanup phase if cleanup occurs on a differnt core than
what the application was using.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Use the management commmand response registers to determine
the next expected valid bit when initializing a software
portal. This avoids using the wrong valid bit in cases
where a command was partially written but then not
completed.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
The errata prevents us from transmitting S/G frames. Instead of
linearizing them ourselves, stop advertising S/G support and have the
stack do it for us.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Documentation/networking/netdevices.txt mentions that interfaces must
be able to receive frames at least the size of the configured MTU. The
behavior for received frames larger than the MTU is unspecified. We have
been dropping these frames in software. Remove this behavior and accept
them.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
We can not allow for Jumbo frames and large MTU values on LS1043A due to
the A-010022 FMan errata. All outgoing frames larger than 4K bytes are dropped.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
When creating a new skb for the errata workaround, maintain the socket
and timestamp configurations for timestamp hardware offloading.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Update txq0's trans_start in order to prevent the netdev watchdog from
triggering too quickly. Since we set the LLTX flag, the stack won't update
the jiffies for other tx queues. Prevent the watchdog from checking the
other tx queues by adding the NETIF_HW_ACCEL_MQ flag.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
If an ECC error occurs QBMan stores data in a register for
debug purposes. If the memory is software portal memory then
15 bits are used. This patch adjusts the mask to be correct.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
If the skb's headroom isn't aligned to 16 bytes, reallocate the entire
skb and resize its headroom to priv->tx_headroom. Update the pointers
to the network and transport headers accordingly.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Allocate a new page and copy the skb's contents to it in order to
guarantee that 4k boundary crossings do not occur.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Layerscape DPAA platforms have updated dts to use ptp-timer phandle
instead of ptimer-handle for Fman RTC node. This patch is to
update it in driver.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Layerscape DPAA platforms have updated dts to use ptp-timer
instead of rtc for Fman RTC node name. This patch is to
update it in driver.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Prior to calling iommu_map()/iommu_unmap() page align the size or
failures such as below could happen:
iommu: unaligned: iova 0x... pa 0x... size 0x4000 min_pagesz 0x10000
qman_portal 500000000.qman-portal: failed to iommu_map() -22
Seen when booted a kernel compiled with 64K page size support.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add a couple of new APIs to check the probing status of the required
cpu bound qman and bman portals:
'int bman_portals_probed()' and 'int qman_portals_probed()'.
They return the following values.
* 1 if qman/bman portals were all probed correctly
* 0 if qman/bman portals were not yet probed
* -1 if probing of qman/bman portals failed
Portals are considered successful probed if no error occurred during
the probing of any of the portals and if enough portals were probed
to have one available for each cpu.
The error handling paths were slightly rearranged in order to fit this
new functionality without being too intrusive.
Drivers that use qman/bman portal driver services are required to use
these APIs before calling any functions exported by these drivers or
otherwise they will crash the kernel.
First user will be the dpaa1 ethernet driver, coming in a subsequent
patch.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add a one-to-one iommu mapping for qman portal CENA register area.
This is required for QMAN stashing to work without faults behind
an iommu.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add a one-to-one iommu mapping for qman private data memory areas
(FQD and PFDR). This is required for QMAN to work without faults
behind an iommu.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add a one-to-one iommu mapping for bman private data memory (FBPR).
This is required for BMAN to work without faults behind an iommu.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
ARM SoCs use SMMU so the liodn fixup done in the qman driver is no
longer making sense and it also breaks the ICID settings inherited
from u-boot. Do the fixups only for PPC targets.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
* nand/next:
mtd: nand: raw: gpmi-nand: fix the qxp clk name and runtime issues
mtd: nand: raw: gpmi-nand: add all supported platform info
mtd: nand: raw: gpmi-nand: fix the suspend/resume issue
drivers/mtd: Add deep sleep support for IFC
* misc/next:
nvmem: imx: correct the fuse word index
nvmem: imx-ocotp: add support for the unaliged word count
MA-11994 Add get phys address ioctl to dma-buf.
staging: android: allow to compile ION unconditionally
* mailbox/next: (6 commits)
mailbox: imx: add support for imx v1 mu
dt-bindings: mailbox: imx-mu: add imx7ulp MU support
mailbox: imx: Clear the right interrupts at shutdown
mailbox: imx: Fix Tx doorbell shutdown path
mailbox: imx: change to arch_init()
...
* gpio/next: (12 commits)
gpio : mpc8xxx : ls1088a/ls1028a edge detection mode bug fixs.
gpio: mpc8xxx: Don't overwrite default irq_set_type callback
gpio/mpc8xxx: change irq handler from chained to normal
MLK-22733 gpio: mxc: use platform_get_irq_optional() to avoid error message
gpio: pca953x: no need to do regcache sync without vcc regulator
...
* dts/next: (765 commits)
arm64: dts: fsl: ls1028a: Disable eno3 and make swp5 the Felix CPU port
arm64: dts: fsl: ls1028a: Specify that the Felix port 4 runs at 2.5Gbps
arm64: dts: fsl: Drop "compatible" string from Felix switch
arm64: dts: fsl: Specify phy-mode for CPU ports
LF-261: arm64: dts: imx8mq: Set parent clock for IMX8MQ_CLK_AUDIO_AHB
...
In case of zero-length input for ablkcipher algorithms, IV copying
accesses invalid memory - due to (last_out_len-AES_BLOCK_SIZE)
turning into a big unsigned offset for last_out_len = 0U.
Since zero-length input is allowed for ablkcipher / skcipher algorithms,
make this case a no-op by returning immediately.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Commit 77debf316c44 ("LFV-26 crypto: caam - fix Secure Memory driver init")
addressed SM driver initialization and also update SM test.
However, the fix for SM test is insufficient.
There are cases when SM test runs before SM driver, causing a crash
due to uninitialized "priv" pointer being dereferenced.
The fix consists in the following:
1. Since SM test is a "bare" device driver (doesn't sit on any bus),
there is no deferred probing support.
Thus we have no choice (*) but to abort SM tests with a notification.
(*) We don't want to force SM driver running first by means of
init levels etc. Just KISS.
2. SM test driver forced to being built only as a module
Since SM test driver's only goal is to run SM tests, it doesn't make
any sense to be built-in.
Building the driver as a module allows for running the tests
several times if needed (multiple modprobe & rmmod cycles).
Note: from the perspective of wanting to test repetitively, it would
make sense to force module unloading by returning an error code
in the module_init function.
However, this might affect test scripts (due to error code and/or
message output by unsuccessful module loading), so we postpone
this change for now.
Fixes: d02fe599d7d5 ("MLKU-25-3 crypto: caam - add Secure Memory support")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
SM driver is buggy, since it runs irrespective of the presence of
the caam-sm DT node.
This causes issues on SoCs that have caam HW, but without support
for secure memory.
Let's transform the module in a library, in the same way (and for
the same reasons) we did for the other job ring-dependent drivers
(caamalg, caamhash etc.) in
commit 1b46c90c8e ("crypto: caam - convert top level drivers to libraries")
SM test module is also updated, to run only when needed.
Fixes: 54e3fcf89f97 ("MLKU-25-3 crypto: caam - add Secure Memory support")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
This patch add the support for job ring UIO so
that userspace drivers can have access to the
caam job rings
Signed-off-by: Sandeep Malik <Sandeep.Malik@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Dynamically create a platform device for the caam_dma driver
at caam_probe() time.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Use devres for caam_dma platform device unregistering.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
The caam_dma is a memcpy DMA driver based on the DMA functionality of
the CAAM hardware block. It creates a DMA channel for each JR of the
CAAM. This patch adds functionality that is used by the caam_dma that is
not yet part of the JR driver.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
TLS 1.0 descriptors run on SEC 4.x or higher. For now, only
tls10(hmac(sha1),cbc(aes)) algorithm is registered by the driver.
Known limitations:
- when src == dst - there should be no element in the src scatterlist
array that contains both associated data and message data.
- when src != dst - associated data is not copied from source into
destination.
- for decryption when src != dst the size of the destination should be
large enough so that the buffer may contain the decrypted authenc and
padded data.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
TLS 1.0 descriptors run on SEC 4.x or higher.
For now, only tls10(hmac(sha1),cbc(aes)) algorithm
is registered by the driver.
Known limitations:
- when src == dst - there should be no element in the src scatterlist array
that contains both associated data and message data.
- when src != dst - associated data is not copied from source into
destination.
- for decryption when src != dst the size of the destination should be
large enough so that the buffer may contain the decrypted authenc and
padded data.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Cristian Stoica <cristian.stoica@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
CHAs of SEC work natively in BE mode. When moving
data to the alignment blocks, swapping is needed
for LE platforms. This is done by means of the MOVEB
command. This patch adds support
to DCL for this command.
Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
During driver upstreaming OPR was removed due to lacking users.
Add OPR back, since in LSDK / LSDK-based ADKs there is at least
one user (ASF / VortiQa IPsec).
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
During driver upstreaming all unused dpseci API was trimmed down.
Add the API back to be in sync with files provided by MC f/w release.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
The structure partid is not suitable to represent the DECO MID register.
This patch replace partid by masterid which is more appropriate.
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit 2d8dab7357)
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
This patch allows CAAM to be enabled as a wakeup source for the
Mega/Fast mix domain. If CAAM is enabled as a wakeup source, it
will continue to be powered on across Deep Sleep Mode (DSM). This
allows CAAM to be functional after the system resumes from DSM.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit 290744e3b40a563319324e234fa5a65b49fd4d82)
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 0bf9c6f84f)
Changed commit headline prefix.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
A tagged key is a key which has been tagged with metadata
using tag_object.h API.
We add the support for these keys to caamalg.
For each algo of caamalg which supports tagged keys , it is done by:
- Creating a modified version of the algo
- Registering the modified version
- When the modified transform is used, it gets
the load parameter of the key.
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit 88dee97d985890dbf37cafa7934c476d0ecfd0b3)
(Vipul: Fixed merge conflicts)
Conflicts:
drivers/crypto/caam/caamalg.c
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 5adebac40a)
-port from ablkcipher to current skcipher implementation
-since in linux-imx true key_inline was always true: a. simplify
the descriptors and b. use key_cmd_opt to differentiate b/w tk and non-tk
cases
-change commit headline prefix
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Add functions to tag an object with metadata(configuration).
It is possible to:
- create metadata:
- init_tag_object_header
- init_blackey_conf
- set_tag_object_conf
- retrieve metadata:
- get_tag_object_conf
- get_blackey_conf
The API expects an object to be a space a memory
with an address and a size.
The implementation of the tag is currently exposed
but users shouldn't access it directly, they should
use the functions provided.
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit ebbb132da8e7f9de7f3d375eff8d87f684feb1eb)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 8b6f6b4474)
-make tag functionality depend on JR
-change commit headline prefix
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
This is a squash of the following i.MX BSP commits
(rel_imx_4.19.35_1.1.0_rc2)
1. 8f6a17b419 ("ENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.")
2. 8433c811e9 ("MLK-9710-18 snvs - make SECVIO module device tree correct")
3. 35bbc34e99 ("MLK-9769-23 Replace SECVIO of_irq_to_resource() with irq_of_parse_and_map()")
4. 3ac6edcd92 ("MLK-11360-01 crypto: caam_snvs: add snvs clock management")
5. 9d9ca7a03e ("MLK-11922 i.mx6: Linux 3.14.28 CAAM & SNVS enabled by default. JTAG, DS-5 attachment causes exceptions")
6. fcdaabf1bb ("MLK-17412-01: Fix secvio driver to have same driver name as DTS")
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Steve Cornelius <steve.cornelius@nxp.com>
Signed-off-by: Fugang Duan <andy.duan@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
that have been reworked:
1.
-make SM depend on JR
-enable SM, SECVIO only on i.MX SoCs
-fix resource leak - add off_node_put() where needed
Split commit in three:
- SNVS/SECVIO driver
- Secure Memory driver
- DT changes
3.
JR changes dropped - no longer needed, already upstream in
commit 549077d7d8 ("crypto: caam - check irq_of_parse_and_map for errors")
4.
Split the patch in two:
-DT bindings changes
-driver changes
5.
Fixed conflicts in imx7d.dtsi - added caam_sm and irq_sec_vio nodes.
Split commit in 3:
-SECVIO/SNVS driver changes
-SECVIO/SNVS DT changes
-Secure Memory DT changes
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
caam driver needs to be aware of OP-TEE f/w presence, since some things
are done differently:
1. there is no access to controller's register page (note however that
some registers are aliased in job rings' register pages)
It's worth mentioning that due to this, MCFGR[PS] cannot be read
and driver assumes MCFGR[PS] = b'0 - engine using 32-bit address pointers.
This is in sync with the fact that:
-all i.MX SoCs currently use MCFGR[PS] = b'0
-only i.MX OP-TEE use cases don't allow access to controller register page
Note: When DN OP-TEE will start enforcing the same policy,
this solution will stop working and information about caam configuration
will have to deduced in some other way.
2. as a consequence of "1.", part of the initialization is moved in
other f/w (TF-A etc.), e.g. RNG initialization
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Some i.MX8 processors, e.g. i.MX8QM (QM, QP), i.MX8QX (QXP, DX) have a
System Controller Firmware (SCFW) running on a dedicated Cortex-M core
that provides power, clock, and resource management.
caam driver needs to be aware of SCU f/w presence, since some things
are done differently:
1. clocks are under SCU f/w control and are turned on automatically
2. there is no access to controller's register page (note however that
some registers are aliased in job rings' register pages)
It's worth mentioning that due to this, MCFGR[PS] cannot be read
and driver assumes MCFGR[PS] = b'0 - engine using 32-bit address pointers.
This is in sync with the limitation imposed by the
SECO (Security Controller) ROM and f/w running on a dedicated Cortex-M.
3. as a consequence of "2.", part of the initialization is moved in
other f/w (SCU, TF-A etc.), e.g. RNG initialization
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
TODO:
1. if of_property_read_u32_index(,,index=0,) is to be used,
DT bindings (fsl-sec4.txt) should be updated to mandate for
-checked that all existing DTs are configured like this
-this might create problems in the future, if DTs are needed where
JR DT nodes would exist without the controller DT node
(directly on simple bus etc.)
2. MCFGR (ctrl->mcr)
How to determine caam_ptr_sz if MCFGR is not accesible?
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
TODO:
1. clarify logic wrt. virtualization and DECORSR - see e-mail thread:
"Register-based interface - DECORSR with virtualization disabled"
2. check whether the clocks are identical for all mScale parts,
and if they do use a single "i.MX8M*" entry in clocks array.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Freescale's CAAM includes a Random Number Generator. This change adds
a kernel configuration option to test the RNG's capabilities via the
hw_random framework.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 05fba1bb85)
-fixed compilation warning:
drivers/crypto/caam/caamrng.c:271:2: warning: format '%d' expects argument of type 'int', but argument 2 has type 'size_t' [-Wformat=]
-changed commit headline
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
The TRNG as used in RNG4, used in CAAM has a documentation issue. The
effect is that it is possible that the entropy used to instantiate the
DRBG may be old entropy, rather than newly generated entropy. There is
proper programming guidance, but it is not in the documentation.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit ea2b30c817)
-ported to RNG initialization in ctrl.c
-changed commit headline
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
When building on a platform with a 32bit DMA address, taking the
upper 32 bits makes no sense.
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit d3346aaa3f)
-replace ifdeffery with IS_ENABLED() macro
-change commit headline prefix
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
caam_jr_register() function is no longer part of the driver since
commit 6dad41158d ("crypto: caam - Remove unused functions from Job Ring")
This patch removes a comment referencing the function.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 96c125b896)
-changed commit headline prefix
-added details about commit removing caam_jr_register()
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
The mapped_{src,dst}_nents _returned_ from the dma_map_sg
call (which could be less than src/dst_nents) have to be
used to generate the job descriptors.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit eff9771d51)
This patch adds kernel support for encryption/decryption of TLS 1.0
records using block ciphers. Implementation is similar to authenc in the
sense that the base algorithms (AES, SHA1) are combined in a template to
produce TLS encapsulation frames. The composite algorithm will be called
"tls10(hmac(<digest>),cbc(<cipher>))". The cipher and hmac keys are
wrapped in the same format used by authenc.c.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Cristian Stoica <cristian.stoica@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
* can/next: (29 commits)
can: flexcan: Add S32V234 support to FlexCAN driver
can: flexcan: add CAN wakeup function for i.MX8
can: flexcan: change the way of stop mode acknowledgment
can: flexcan: fix deadlock when using self wakeup
can: flexcan: add LPSR mode support for i.MX7D
...
* audio/next: (528 commits)
LF-276: ASoC: fsl_easi: constrain period size for edma case
LF-215: ASoC: fsl_rpmsg_i2s: Enable WQ_FREEZABLE for workqueue
ASoC: SOF: Read tplg filename from board descriptor
ASoC: SOF: Update fw_filename from board description
ASoC: SOF: Allow probe to continue when we have an actual codec
...
* core: (8 commits)
Revert "jffs2: Fix possible null-pointer dereferences in jffs2_add_frag_to_fragtree()"
of: of_reserved_mem: Ensure cma reserved region not cross the low/high memory
mm: Re-export ioremap_page_range
nand: raw: workaround for EDO high speed mode
cgroup/bfq: revert bfq.weight symlink change
...
* base: (7 commits)
perf/imx_ddr: Dump AXI ID filter info to userspace
perf/imx_ddr: Add driver for DDR PMU in i.MX8MPlus
perf/imx_ddr: Add enhanced AXI ID filter support
bindings: perf: imx-ddr: Add new compatible string
docs: perf: Add imx-ddr to documentation index
...
* origin/usb/phy: (14 commits)
Doc: ABI: add usb charger uevent
usb: phy: show USB charger type for user
MLK-19850-1 usb: phy: mxs: add DCD implementation
MLK-16576 usb: phy: mxs: set hold_ring_off for USB2 PLL power up
MLK-14947-2 usb: phy: add mxs phy driver dependency for ARM64
...
* origin/usb/cdns3: (89 commits)
LF-252 usb: cdns3: gadget: fix the issue for DMA scatter buffer list
MLK-22878 usb: cdns3: gadget: add imx8qxp C0 support
MA-15789-1 usb: cdns3: gadget: move USB interrupt handling to thread irq
MLK-22527-2 usb: cdns3: quit if the port is woken up during suspending
MLK-22527-1 usb: cdns3: gadget: quit functional halt if there are pending requests
...
* origin/spi/qspi:
spi: spi-fsl-qspi: Introduce variable to fix different invalid master Id
dt-bindings: spi: spi-fsl-qspi: Add bindings of ls1088a and ls1012a
spi: spi-fsl-qspi: dynamically alloc AHB memory for QSPI
* origin/spi/lpspi:
MLK-21520-3 spi: lpspi: remove fsl_lpspi->chipselect
MLK-21520-2 spi: lpspi: add multi SS support in PIO mode
MLK-21520-1 spi: lpspi: add NULL check when probe device
* origin/spi/cspi: (6 commits)
MLK-10404-1 spi: spi-imx: use XCH mode even in DMA mode
MLK-11405 spi: imx : sets spi IOMUX to default state
MLK-9817 spi: imx: convert all clk_enable to clk_prepare_enable
dt-bindings: spi: imx: add i.mx6ul to state errata fixed
spi: imx: remove ERR009165 workaround on i.mx6ul
...
* origin/pcie/mobiveil: (14 commits)
misc: pci_endpoint_test: Add the layerscape PCIe GEN4 EP device support
PCI: mobiveil: Add workaround for unsupported request error
PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
dt-bindings: Add DT binding for PCIE GEN4 EP of the layerscape
PCI: mobiveil: Add the EP driver support
...
* origin/pcie/dwc: (22 commits)
LF-128 PCI: imx: turn off the clocks and regulators when link is down
PCI: imx: add the imx pcie ep verification solution
MLK-22995: pci: controller: dwc: pci-imx6: fix regulator warning complains on i.mx6sx-sdb
PCI: dwc: fix the msi failure after pm operations
Revert "MLK-11484-3 PCI: designware: Refine setup_rc and add msi data restore"
...
* origin/pcie/core:
PCI: Disable MSI on marvel 88w9098 and 88w8997 chips
MLK-20716 PCI: add quirk for cyw4356 to disable D3 mode
MLK-20684 PCI: Disable MSI on CYW4356 and CYW4359 chips
pci:add support aer/pme interrupts with none MSI/MSI-X/INTx mode
* origin/mxc/vpu: (44 commits)
LF-80:[8QM_MEK/8QXP_MEK]mxc:vpu_malone:clear eos flag when output streamoff
MLK-22999 mxc: vpu_malone: release debugfs after open to avoid memory leak
MLK-22991 mxc: vpu_malone vpu_windsor: check is vpu poweroff when suspend
MLK-22963 mxc vpu_windsor: fix call vzalloc during spinlock
MLK-22945 mxc vpu_malone: disable decode ctx before release it.
...
* origin/mxc/sim: (23 commits)
sim: emvsim: add multi power domain support
MLK-22217 mxc: emvsim: add value adjustment for cwt/bwt timer
MLK-22216 mxc: emvsim: last character need be transmitted separately with no guard time
MLK-22215 mxc: emvsim: correct irq mask and clear irq status before receiving
MLK-22214 mxc: emvsim: clean up the code in ATR stage
...
* origin/dts/qoriq: (105 commits)
arm64: dts: fsl: ls1028a: Disable eno3 and make swp5 the Felix CPU port
arm64: dts: fsl: ls1028a: Specify that the Felix port 4 runs at 2.5Gbps
arm64: dts: fsl: Drop "compatible" string from Felix switch
arm64: dts: fsl: Specify phy-mode for CPU ports
arm64: dts: ls1028a: Add DP DT nodes
...
In case 60 seconds maybe not enough for Yocto loading sdma firmware on
some poor performance chips such as i.mx6sll in nfs case, add another
round to load firmware.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
* origin/display/prefetch:
MLK-21378-2 gpu: imx: Add imx8_dprc support
MLK-21378-1 gpu: imx: Add imx8_prg support
gpu: Move ipu-v3 to imx folder
drm/imx: Revert a patch which merges imx-drm-core and ipuv3-crtc in one module
* origin/display/pc:
gpu: imx: Add imx8 pixel combiner support
gpu: Move ipu-v3 to imx folder
drm/imx: Revert a patch which merges imx-drm-core and ipuv3-crtc in one module
* origin/display/nwl-dsi: (14 commits)
drm/bridge: nwl-dsi Correct the DSI init sequence
drm/bridge: nwl-dsi: Fix find_panel_or_bridge
drm/bridge: nwl-dsi: Add support for 8QM and 8QXP
drm/bridge: nwl-dsi: Add support for component framework
phy: imx8-mipi-dphy: Add support for 8QM and 8QXP
...
* origin/display/mxsfb: (14 commits)
drm/mxsfb: Add support for live pixel format change
drm/mxsfb: Add support for horizontal stride
drm/mxsfb: Clear OUTSTANDING_REQS bits
drm/mxsfb: Improve the axi clock usage
drm/mxsfb: Update mxsfb to support LCD reset
...
* origin/display/dsim: (17 commits)
LF-46 drm/imx: sec-dsim: use late suspend
drm/imx: sec_dsim-imx: add imx8mn compatible support
drm/imx: sec-dsim_imx: add resets put for probe failure
drm/imx: Replace reset flow for DSIM
MLK-22304-1 drm/imx: dsim: fix build warnings if CONFIG_PM_SLEEP off
...
* origin/capture/pi:
LF-101: staging: media: imx: fix XR24 format R and B are opposite issue
staging: media: imx: add video ops for imx8 parallel subdev
staging: media: imx: add parallel capture interface driver for imx8qxp
media: dt-bindings: add bindings for i.MX8QXP parallel interface
imx busfreq: Add API header file
* origin/capture/ov5640: (16 commits)
LF-237 media: ov5640_mipi: fix regulator dump when i2c access for camera fail
LF-115: media: i2c: ov5640: fix enumerate capture mode issue
media: i2c: ov5640: add mode and fps checking for ov5640
media: i2c: fix the incomplete first frame issue
media: i2c: fix hang issue when ov5640 work at DVP mode
...
* origin/capture/media-dev:
media: staging: imx: add media device driver support for IMX8
media: dt-bindings: add bindings for i.MX8QXP/QM virtual media device
* origin/capture/jpeg: (9 commits)
MLK-22835: mxc-jpeg: jpeg decoder stuck due to race condition
mxc-jpeg: Fix warning at build, for EXPORT_SYMBOL on static variable
media: mxc-jpeg: jpeg: Replace stracpy with strscpy
mxc-jpeg: Build mxc-jpeg as module, by default
mxc-jpeg: Add support for multi power domain
...
* origin/audio/sof: (21 commits)
ASoC: SOF: Read tplg filename from board descriptor
ASoC: SOF: Update fw_filename from board description
ASoC: SOF: Allow probe to continue when we have an actual codec
ASoC: SOF: Hardcode ignore_machine
ASoC: fsl: Add generic DAI driver
...
* origin/audio/fm: (8 commits)
MLK-11429-21: ASoC: fsl: port si476x machine driver from imx_3.10.y
MLK-11305 radio-si476x: support set V4L2_CID_AUDIO_MUTE CTRL
MLK-22355: mfd: si476x: Use system_freezable_wq instead of system_wq
MLK-10055-2: mfd: si476x-i2c: sound is registered when no FM module attached
MLK-10038-1: mfd: si476x-i2c: Add support of si476x-rev4.0 board
...
* origin/audio/esai: (7 commits)
LF-276: ASoC: fsl_easi: constrain period size for edma case
ASoC: fsl_esai: Remove the tasklet
ASoC: fsl_esai: Add spin lock to protect reset, stop and start
ASoC: fsl_esai: Remove expensive print in irq handler
ASoC: fsl_esai: support multi power domain
...
* origin/arch/qoriq: (17 commits)
drivers: soc: fsl: add qixis driver
Add APIs to setup HugeTLB mappings for USDPAA
powerpc/pm: add sleep and deep sleep on QorIQ SoCs
powerpc/cache: add cache flush operation for various e500
powerpc/pm: Fix suspend=n in menuconfig for e500mc platforms.
...
* origin/arch/imx: (64 commits)
MLK-21599-1 arm64: Kconfig: Make FORCE_MAX_ZONEORDER configurable
LF-171 ARM: imx: Add cpu type check for imx6ulz in msl code
LF-176 ARM: imx: mach-imx6q: Revert "ARM: imx: correct the enet_clk_ref clock string"
LF-39 soc: imx: Update busfreq to support different frequncy setpoint
MLK-23008 ARM: imx: Remove unused code on i.MX7D suspend driver
...
ISI is image sensor interface of imx8 family. It's reused in imx8mn
platform. But they use different clock tree, so driver need to select
the related clock operation for different platform. In order to solve
the problem, driver define mxc_isi_dev_ops which used to control clock
operation.
Dispmix subsystem of imx8mn is consist of ISI, CSI, DSI and LCDIF modules.
It use GPR to manage the reset and clock signal for all modules. We add
a reset driver for dispmix reset function, so add related consumer of reset
in ISI core driver.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
There is limitaion for EDMA, which can only accept the period bytes
that can be divided by maxburst with no remainder. Otherwise EDMA
will not copy the left data in the end, and it will cause noise.
so add constraint for these chips.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
CPU resources are specical resources, it is assigned in ATF, not
non-secure OS, but we still need to allow cpu freq, so return
true for non-secure OS for cpu resources.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Anson Huang <anson.huang@nxp.com>
Add media device drivers support. Media device is a virtual platform
device which used to manage all modules in IMX8 image subsystem and
as the parent device for all modules devices.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: Kconfig & Makefile update for a clean base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Correct is_ram_script checking in case sdma firmware not loaded as
expected, otherwise all scripts are considered as rom script without
correct "sdma firmware not ready!" since sdma->ram_code_start is 0.
Note: only add the doubtless is_ram_script for sdma-imx6q.bin/sdma-imx7d.
bin , and leave the legacy i.mx5x/i.mx3x/i.mx2x firmware alone since not
sure which of the remain scripts should be in ram.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
This patch returns to the switch port setup from BSP 0.2, where the
switch only had a single Ethernet connection to the CPU, via a tagging
interface. Choose eno2 for this purpose, as it has higher bandwidth and
also supports TSN offloads.
The reason is that the switch is not able to do DSA tags on 2 CPU ports
at the same time, and it is confusing to have so many ports with no
clear indication which should be used for what (a "data" port and a
"control" port).
We don't revert to the BSP 0.2 RCW configuration, however. The ENETC
port 3 is still enabled in the RCW, however it is not probed by Linux by
default, since the large majority of use cases will not need it. For
those that do (like originating 802.1CB traffic from the CPU), it can be
enabled back by simply reverting this device tree change.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
This is just an informative change, because all Felix MACs inside the
LS1028A are hardwired in gigabit mode anyway.
Only PHYLINK is able to understand fixed-link speeds higher than 1 Gbps.
With PHYLIB, fixed-link interfaces are emulated as C22 PHYs by the swphy
driver, and C22 does not specify settings for speeds higher than
gigabit.
This patch brings no functional change except for the messages printed
during driver initialization.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Since Felix is not a platform device but a PCI device, the "compatible"
string serves no purpose. The device driver is found by matching the PCI
device/vendor ID to the ENETC PF.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
PHYLINK requires that device tree nodes have a phy-mode or
phy-connection-type property. The internal Felix ports really are
connected to the ENETC via 2 back-to-back MACs, so the correct MII type
is GMII (one of which is overclocked at 2.5Gbaud, but still GMII).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Set parent clock for IMX8MQ_CLK_AUDIO_AHB, and move setting
IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 rate to a common place.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
scfw only take care of the least 1 byte of payload of powerkey message.
Correct key state checking logic, otherwise, the state maybe wrong since
the upper 3 bytes maybe not 0 as expected.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Add hdmi phy video mode valid function to filter the video modes.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
imx8qm hdmi has a specific dts file, in order to avoid
unnecessary probe hdmi subsystem modules in imx8qm-mek.dts
all hdmi submodules by default set to disabled and enabled
in imx8qm-mek-hdmi.dts
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Switching the clock frequently will affect the data transmission
efficiency, and prolong the timeout to reduce autosuspend times for
i2c-imx.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Switching the clock frequently will affect the data transmission
efficiency, and prolong the timeout to reduce autosuspend times for
lpi2c.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Due to the errata ERR010450 limit, this patch change the imx6ull
usdhc root clock to 132MHz in soc related dts file, remove all
the root clock setting in board dts file, after this patch,
SDR104/HS200 work at 132MHz, DDR50/DDR52 work at 33MHz.
(merged from commit: 1a3160ae69)
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
S32V234 SoCs provide two instances of FlexCAN. Each of S32V234-EVB and
S32V234-SBC use both of them. Add the can nodes and the necessary
pinctrl groups for FlexCAN PAD configurations in SIUL2.
The pinctrl_can* nodes for SBC include a fix for an S-pin reliability
issue.
Signed-off-by: Chircu-Mare Bogdan-Petru <Bogdan.Chircu@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Kay Potthoff <Kay.Potthoff@microsys.de>
Signed-off-by: Costin Carabas <costin.carabas@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Define macros for the combinations of MSCR numbers and values to be
written into those registers. These will be used together in 'fsl,pins'
properties of pinctrl group dts nodes.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
These values were replaced with macros with the same names in
s32v234-pinctrl.h, to be usable in device tree definitions as well.
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
The values of the s32v234_pins enum from pinctrl-s32v234.c will be moved
to s32v234-pinctrl.h to avoid using magic numbers in ENET configuration
definitions.
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Need to set the IMX8MQ_CLK_NAND_USDHC_BUS clock rate to 266MHz, to make
clock align, otherwise USDHC oparation will has issue.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
hdmi type is uninitialized with non-SCDC HDMI sinks.
And hdmi ctrl will work in DVI mode that is not ecpected.
Set hdmi type to HDMI1.4 before SCDC support check to fix it.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
For HDMI sinks that support HDMI2.0, those video modes have
listed in hdmi1.4 specification should work in hdmi 1.4.
Remove the patch, make sure all video modes can work well
in HDMI2.0 sinks.
For non-SCDC HDMI sinks issue,
it will be fixed with another patch.
This reverts commit 4b6617643f.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
commit af2e8c68b9 upstream.
On some systems that are vulnerable to Spectre v2, it is up to
software to flush the link stack (return address stack), in order to
protect against Spectre-RSB.
When exiting from a guest we do some house keeping and then
potentially exit to C code which is several stack frames deep in the
host kernel. We will then execute a series of returns without
preceeding calls, opening up the possiblity that the guest could have
poisoned the link stack, and direct speculative execution of the host
to a gadget of some sort.
To prevent this we add a flush of the link stack on exit from a guest.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 39e72bf96f upstream.
In commit ee13cb249f ("powerpc/64s: Add support for software count
cache flush"), I added support for software to flush the count
cache (indirect branch cache) on context switch if firmware told us
that was the required mitigation for Spectre v2.
As part of that code we also added a software flush of the link
stack (return address stack), which protects against Spectre-RSB
between user processes.
That is all correct for CPUs that activate that mitigation, which is
currently Power9 Nimbus DD2.3.
What I got wrong is that on older CPUs, where firmware has disabled
the count cache, we also need to flush the link stack on context
switch.
To fix it we create a new feature bit which is not set by firmware,
which tells us we need to flush the link stack. We set that when
firmware tells us that either of the existing Spectre v2 mitigations
are enabled.
Then we adjust the patching code so that if we see that feature bit we
enable the link stack flush. If we're also told to flush the count
cache in software then we fall through and do that also.
On the older CPUs we don't need to do do the software count cache
flush, firmware has disabled it, so in that case we patch in an early
return after the link stack flush.
The naming of some of the functions is awkward after this patch,
because they're called "count cache" but they also do link stack. But
we'll fix that up in a later commit to ease backporting.
This is the fix for CVE-2019-18660.
Reported-by: Anthony Steinhauser <asteinhauser@google.com>
Fixes: ee13cb249f ("powerpc/64s: Add support for software count cache flush")
Cc: stable@vger.kernel.org # v4.4+
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 5618332e5b upstream.
The userspace comedilib function 'get_cmd_generic_timed' fills
the cmd structure with an informed guess and then calls the
function 'usbduxfast_ai_cmdtest' in this driver repeatedly while
'usbduxfast_ai_cmdtest' is modifying the cmd struct until it
no longer changes. However, because of rounding errors this never
converged because 'steps = (cmd->convert_arg * 30) / 1000' and then
back to 'cmd->convert_arg = (steps * 1000) / 30' won't be the same
because of rounding errors. 'Steps' should only be converted back to
the 'convert_arg' if 'steps' has actually been modified. In addition
the case of steps being 0 wasn't checked which is also now done.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Cc: <stable@vger.kernel.org> # 4.4+
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://lore.kernel.org/r/20191118230759.1727-1-mail@berndporr.me.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 92fe35fb9c upstream.
The driver was setting the device remote-wakeup feature during probe in
violation of the USB specification (which says it should only be set
just prior to suspending the device). This could potentially waste
power during suspend as well as lead to spurious wakeups.
Note that USB core would clear the remote-wakeup feature at first
resume.
Fixes: 3f5429746d ("USB: Moschip 7840 USB-Serial Driver")
Cc: stable <stable@vger.kernel.org> # 2.6.19
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ea422312a4 upstream.
The driver was setting the device remote-wakeup feature during probe in
violation of the USB specification (which says it should only be set
just prior to suspending the device). This could potentially waste
power during suspend as well as lead to spurious wakeups.
Note that USB core would clear the remote-wakeup feature at first
resume.
Fixes: 0f64478cbc ("USB: add USB serial mos7720 driver")
Cc: stable <stable@vger.kernel.org> # 2.6.19
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e696d00e65 upstream.
Add USB ID for MOXA UPort 2210. This device contains mos7820 but
it passes GPIO0 check implemented by driver and it's detected as
mos7840. Hence product id check is added to force mos7820 mode.
Signed-off-by: Pavel Löbl <pavel@loebl.cz>
Cc: stable <stable@vger.kernel.org>
[ johan: rename id defines and add vendor-id check ]
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 2a9125317b upstream.
Smatch reported that nents is not initialized and used in
stub_recv_cmd_submit(). nents is currently initialized by sgl_alloc()
and used to allocate multiple URBs when host controller doesn't
support scatter-gather DMA. The use of uninitialized nents means that
buf_len is zero and use_sg is true. But buffer length should not be
zero when an URB uses scatter-gather DMA.
To prevent this situation, add the conditional that checks buf_len
and use_sg. And move the use of nents right after the sgl_alloc() to
avoid the use of uninitialized nents.
If the error occurs, it adds SDEV_EVENT_ERROR_MALLOC and stub_priv
will be released by stub event handler and connection will be shut
down.
Fixes: ea44d19076 ("usbip: Implement SG support to vhci-hcd and stub driver")
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Suwan Kim <suwan.kim027@gmail.com>
Acked-by: Shuah Khan <skhan@linuxfoundation.org>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191111141035.27788-1-suwan.kim027@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 5a858e79c9 upstream.
The old Nvidia chips have multiple HD-audio codecs on the same
HD-audio controller, and this doesn't work as expected with the current
audio component binding that is implemented under the one-codec-per-
controller assumption; at the probe time, the driver leads to several
kernel WARNING messages.
For the proper support, we may change the pin2port and port2pin to
traverse the codec list per the given pin number, but this needs more
development and testing.
As a quick workaround, instead, this patch drops the binding in the
audio side for these legacy chips since the audio component support in
nouveau graphics driver is still not merged (hence it's basically
unused).
[ Unlike the original commit, this patch actually disables the audio
component binding for all Nvidia chips, not only for legacy chips.
It doesn't matter much, though: nouveau gfx driver still doesn't
provide the audio component binding on 5.4.y, so it's only a
placeholder for now. Also, another difference from the original
commit is that this removes the nvhdmi_audio_ops and other
definitions completely in order to avoid a compile warning due to
unused stuff. -- tiwai ]
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=205625
Fixes: ade49db337 ("ALSA: hda/hdmi - Allow audio component for AMD/ATI and Nvidia HDMI")
Link: https://lore.kernel.org/r/20191122132000.4460-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e43148645d upstream.
Fix multiple cases of out of bounds (OOB) read associated with
MCE device receive/input data handling.
In reference for the OOB cases below, the incoming/read (byte) data
format when the MCE device responds to a command is:
{ cmd_prefix, subcmd, data0, data1, ... }
where cmd_prefix are:
MCE_CMD_PORT_SYS
MCE_CMD_PORT_IR
and subcmd examples are:
MCE_RSP_GETPORTSTATUS
MCE_RSP_EQIRNUMPORTS
...
Response size dynamically depends on cmd_prefix and subcmd.
So data0, data1, ... may or may not be present on input.
Multiple responses may return in a single receiver buffer.
The trigger condition for OOB read is typically random or
corrupt input data that fills the mceusb receiver buffer.
Case 1:
mceusb_handle_command() reads data0 (var hi) and data1 (var lo)
regardless of whether the response includes such data.
If { cmd_prefix, subcmd } is at the end of the receiver buffer,
read past end of buffer occurs.
This case was reported by
KASAN: slab-out-of-bounds Read in mceusb_dev_recv
https://syzkaller.appspot.com/bug?extid=c7fdb6cb36e65f2fe8c9
Fix: In mceusb_handle_command(), change variable hi and lo to
pointers, and dereference only when required.
Case 2:
If response with data is truncated at end of buffer after
{ cmd_prefix, subcmd }, mceusb_handle_command() reads past
end of buffer for data0, data1, ...
Fix: In mceusb_process_ir_data(), check response size with
remaining buffer size before invoking mceusb_handle_command().
+ if (i + ir->rem < buf_len)
mceusb_handle_command(ir, &ir->buf_in[i - 1]);
Case 3:
mceusb_handle_command() handles invalid/bad response such as
{ 0x??, MCE_RSP_GETPORTSTATUS } of length 2 as a response
{ MCE_CMD_PORT_SYS, MCE_RSP_GETPORTSTATUS, data0, ... }
of length 7. Read OOB occurs for non-existent data0, data1, ...
Cause is mceusb_handle_command() does not check cmd_prefix value.
Fix: mceusb_handle_command() must test both cmd_prefix and subcmd.
Case 4:
mceusb_process_ir_data() receiver parser state SUBCMD is
possible at start (i=0) of receiver buffer resulting in buffer
offset=-1 passed to mceusb_dev_printdata().
Bad offset results in OOB read before start of buffer.
[1214218.580308] mceusb 1-1.3:1.0: rx data[0]: 00 80 (length=2)
[1214218.580323] mceusb 1-1.3:1.0: Unknown command 0x00 0x80
...
[1214218.580406] mceusb 1-1.3:1.0: rx data[14]: 7f 7f (length=2)
[1214218.679311] mceusb 1-1.3:1.0: rx data[-1]: 80 90 (length=2)
[1214218.679325] mceusb 1-1.3:1.0: End of raw IR data
[1214218.679340] mceusb 1-1.3:1.0: rx data[1]: 7f 7f (length=2)
Fix: If parser_state is SUBCMD after processing receiver buffer,
reset parser_state to CMD_HEADER.
In effect, discard cmd_prefix at end of receiver buffer.
In mceusb_dev_printdata(), abort if buffer offset is out of bounds.
Case 5:
If response with data is truncated at end of buffer after
{ cmd_prefix, subcmd }, mceusb_dev_printdata() reads past
end of buffer for data0, data1, ...
while decoding the response to print out.
Fix: In mceusb_dev_printdata(), remove unneeded buffer offset
adjustments (var start and var skip) associated with MCE gen1 header.
Test for truncated MCE cmd response (compare offset+len with buf_len)
and skip decoding of incomplete response.
Move IR data tracing to execute before the truncation test.
Signed-off-by: A Sun <as1033x@comcast.net>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 3ef240eaff upstream.
Oleg provided the following test case:
int main(void)
{
struct sched_param sp = {};
sp.sched_priority = 2;
assert(sched_setscheduler(0, SCHED_FIFO, &sp) == 0);
int lock = vfork();
if (!lock) {
sp.sched_priority = 1;
assert(sched_setscheduler(0, SCHED_FIFO, &sp) == 0);
_exit(0);
}
syscall(__NR_futex, &lock, FUTEX_LOCK_PI, 0,0,0);
return 0;
}
This creates an unkillable RT process spinning in futex_lock_pi() on a UP
machine or if the process is affine to a single CPU. The reason is:
parent child
set FIFO prio 2
vfork() -> set FIFO prio 1
implies wait_for_child() sched_setscheduler(...)
exit()
do_exit()
....
mm_release()
tsk->futex_state = FUTEX_STATE_EXITING;
exit_futex(); (NOOP in this case)
complete() --> wakes parent
sys_futex()
loop infinite because
tsk->futex_state == FUTEX_STATE_EXITING
The same problem can happen just by regular preemption as well:
task holds futex
...
do_exit()
tsk->futex_state = FUTEX_STATE_EXITING;
--> preemption (unrelated wakeup of some other higher prio task, e.g. timer)
switch_to(other_task)
return to user
sys_futex()
loop infinite as above
Just for the fun of it the futex exit cleanup could trigger the wakeup
itself before the task sets its futex state to DEAD.
To cure this, the handling of the exiting owner is changed so:
- A refcount is held on the task
- The task pointer is stored in a caller visible location
- The caller drops all locks (hash bucket, mmap_sem) and blocks
on task::futex_exit_mutex. When the mutex is acquired then
the exiting task has completed the cleanup and the state
is consistent and can be reevaluated.
This is not a pretty solution, but there is no choice other than returning
an error code to user space, which would break the state consistency
guarantee and open another can of problems including regressions.
For stable backports the preparatory commits ac31c7ff86 .. ba31c1a485
are required as well, but for anything older than 5.3.y the backports are
going to be provided when this hits mainline as the other dependencies for
those kernels are definitely not stable material.
Fixes: 778e9a9c3e ("pi-futex: fix exit races and locking problems")
Reported-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Stable Team <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/20191106224557.041676471@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ac31c7ff86 upstream.
attach_to_pi_owner() returns -EAGAIN for various cases:
- Owner task is exiting
- Futex value has changed
The caller drops the held locks (hash bucket, mmap_sem) and retries the
operation. In case of the owner task exiting this can result in a live
lock.
As a preparatory step for seperating those cases, provide a distinct return
value (EBUSY) for the owner exiting case.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20191106224556.935606117@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit af8cbda2cf upstream.
exec() attempts to handle potentially held futexes gracefully by running
the futex exit handling code like exit() does.
The current implementation has no protection against concurrent incoming
waiters. The reason is that the futex state cannot be set to
FUTEX_STATE_DEAD after the cleanup because the task struct is still active
and just about to execute the new binary.
While its arguably buggy when a task holds a futex over exec(), for
consistency sake the state handling can at least cover the actual futex
exit cleanup section. This provides state consistency protection accross
the cleanup. As the futex state of the task becomes FUTEX_STATE_OK after the
cleanup has been finished, this cannot prevent subsequent attempts to
attach to the task in case that the cleanup was not successfull in mopping
up all leftovers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20191106224556.753355618@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 18f694385c upstream.
Instead of relying on PF_EXITING use an explicit state for the futex exit
and set it in the futex exit function. This moves the smp barrier and the
lock/unlock serialization into the futex code.
As with the DEAD state this is restricted to the exit path as exec
continues to use the same task struct.
This allows to simplify that logic in a next step.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20191106224556.539409004@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4610ba7ad8 upstream.
mm_release() contains the futex exit handling. mm_release() is called from
do_exit()->exit_mm() and from exec()->exec_mm().
In the exit_mm() case PF_EXITING and the futex state is updated. In the
exec_mm() case these states are not touched.
As the futex exit code needs further protections against exit races, this
needs to be split into two functions.
Preparatory only, no functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20191106224556.240518241@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 3d4775df0a upstream.
The futex exit handling relies on PF_ flags. That's suboptimal as it
requires a smp_mb() and an ugly lock/unlock of the exiting tasks pi_lock in
the middle of do_exit() to enforce the observability of PF_EXITING in the
futex code.
Add a futex_state member to task_struct and convert the PF_EXITPIDONE logic
over to the new state. The PF_EXITING dependency will be cleaned up in a
later step.
This prepares for handling various futex exit issues later.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20191106224556.149449274@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ba31c1a485 upstream.
The futex exit handling is #ifdeffed into mm_release() which is not pretty
to begin with. But upcoming changes to address futex exit races need to add
more functionality to this exit code.
Split it out into a function, move it into futex code and make the various
futex exit functions static.
Preparatory only and no functional change.
Folded build fix from Borislav.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20191106224556.049705556@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e6e8df0726 upstream.
Add NULL checks to show() and store() in cpufreq.c to avoid attempts
to invoke a NULL callback.
Though some interfaces of cpufreq are set as read-only, users can
still get write permission using chmod which can lead to a kernel
crash, as follows:
chmod +w /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq
echo 1 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq
This bug was found in linux 4.19.
Signed-off-by: Kai Shen <shenkai8@huawei.com>
Reported-by: Feilong Lin <linfeilong@huawei.com>
Reviewed-by: Feilong Lin <linfeilong@huawei.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[ rjw: Subject & changelog ]
Cc: All applicable <stable@vger.kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 9e08117c9d upstream.
Visual inspection of the usbvision driver shows that it suffers from
three races between its open, close, and disconnect handlers. In
particular, the driver is careful to update its usbvision->user and
usbvision->remove_pending flags while holding the private mutex, but:
usbvision_v4l2_close() and usbvision_radio_close() don't hold
the mutex while they check the value of
usbvision->remove_pending;
usbvision_disconnect() doesn't hold the mutex while checking
the value of usbvision->user; and
also, usbvision_v4l2_open() and usbvision_radio_open() don't
check whether the device has been unplugged before allowing
the user to open the device files.
Each of these can potentially lead to usbvision_release() being called
twice and use-after-free errors.
This patch fixes the races by reading the flags while the mutex is
still held and checking for pending removes before allowing an open to
succeed.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
CC: <stable@vger.kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit c7a1914640 upstream.
The syzbot fuzzer found two invalid-access bugs in the usbvision
driver. These bugs occur when userspace keeps the device file open
after the device has been disconnected and usbvision_disconnect() has
set usbvision->dev to NULL:
When the device file is closed, usbvision_radio_close() tries
to issue a usb_set_interface() call, passing the NULL pointer
as its first argument.
If userspace performs a querycap ioctl call, vidioc_querycap()
calls usb_make_path() with the same NULL pointer.
This patch fixes the problems by making the appropriate tests
beforehand. Note that vidioc_querycap() is protected by
usbvision->v4l2_lock, acquired in a higher layer of the V4L2
subsystem.
Reported-and-tested-by: syzbot+7fa38a608b1075dfd634@syzkaller.appspotmail.com
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
CC: <stable@vger.kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 6dcd5d7a7a upstream.
There is the same incorrect approach to locking implemented in
vivid_stop_generating_vid_cap(), vivid_stop_generating_vid_out() and
sdr_cap_stop_streaming().
These functions are called during streaming stopping with vivid_dev.mutex
locked. And they all do the same mistake while stopping their kthreads,
which need to lock this mutex as well. See the example from
vivid_stop_generating_vid_cap():
/* shutdown control thread */
vivid_grab_controls(dev, false);
mutex_unlock(&dev->mutex);
kthread_stop(dev->kthread_vid_cap);
dev->kthread_vid_cap = NULL;
mutex_lock(&dev->mutex);
But when this mutex is unlocked, another vb2_fop_read() can lock it
instead of vivid_thread_vid_cap() and manipulate the buffer queue.
That causes a use-after-free access later.
To fix those issues let's:
1. avoid unlocking the mutex in vivid_stop_generating_vid_cap(),
vivid_stop_generating_vid_out() and sdr_cap_stop_streaming();
2. use mutex_trylock() with schedule_timeout_uninterruptible() in
the loops of the vivid kthread handlers.
Signed-off-by: Alexander Popov <alex.popov@linux.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Tested-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Cc: <stable@vger.kernel.org> # for v3.18 and up
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit b4add02d22 upstream.
When vbi stream is started, followed by video streaming,
the vid_cap_streaming and vid_out_streaming were not being set to true,
which would cause the video stream to stop when vbi stream is stopped.
This patch allows to set vid_cap_streaming and vid_out_streaming to true.
According to Hans Verkuil it appears that these 'if (dev->kthread_vid_cap)'
checks are a left-over from the original vivid development and should never
have been there.
Signed-off-by: Vandana BN <bnvandana@gmail.com>
Cc: <stable@vger.kernel.org> # for v3.18 and up
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ca16d5bee5 upstream.
Robust futexes utilize the robust_list mechanism to allow the kernel to
release futexes which are held when a task exits. The exit can be voluntary
or caused by a signal or fault. This prevents that waiters block forever.
The futex operations in user space store a pointer to the futex they are
either locking or unlocking in the op_pending member of the per task robust
list.
After a lock operation has succeeded the futex is queued in the robust list
linked list and the op_pending pointer is cleared.
After an unlock operation has succeeded the futex is removed from the
robust list linked list and the op_pending pointer is cleared.
The robust list exit code checks for the pending operation and any futex
which is queued in the linked list. It carefully checks whether the futex
value is the TID of the exiting task. If so, it sets the OWNER_DIED bit and
tries to wake up a potential waiter.
This is race free for the lock operation but unlock has two race scenarios
where waiters might not be woken up. These issues can be observed with
regular robust pthread mutexes. PI aware pthread mutexes are not affected.
(1) Unlocking task is killed after unlocking the futex value in user space
before being able to wake a waiter.
pthread_mutex_unlock()
|
V
atomic_exchange_rel (&mutex->__data.__lock, 0)
<------------------------killed
lll_futex_wake () |
|
|(__lock = 0)
|(enter kernel)
|
V
do_exit()
exit_mm()
mm_release()
exit_robust_list()
handle_futex_death()
|
|(__lock = 0)
|(uval = 0)
|
V
if ((uval & FUTEX_TID_MASK) != task_pid_vnr(curr))
return 0;
The sanity check which ensures that the user space futex is owned by
the exiting task prevents the wakeup of waiters which in consequence
block infinitely.
(2) Waiting task is killed after a wakeup and before it can acquire the
futex in user space.
OWNER WAITER
futex_wait()
pthread_mutex_unlock() |
| |
|(__lock = 0) |
| |
V |
futex_wake() ------------> wakeup()
|
|(return to userspace)
|(__lock = 0)
|
V
oldval = mutex->__data.__lock
<-----------------killed
atomic_compare_and_exchange_val_acq (&mutex->__data.__lock, |
id | assume_other_futex_waiters, 0) |
|
|
(enter kernel)|
|
V
do_exit()
|
|
V
handle_futex_death()
|
|(__lock = 0)
|(uval = 0)
|
V
if ((uval & FUTEX_TID_MASK) != task_pid_vnr(curr))
return 0;
The sanity check which ensures that the user space futex is owned
by the exiting task prevents the wakeup of waiters, which seems to
be correct as the exiting task does not own the futex value, but
the consequence is that other waiters wont be woken up and block
infinitely.
In both scenarios the following conditions are true:
- task->robust_list->list_op_pending != NULL
- user space futex value == 0
- Regular futex (not PI)
If these conditions are met then it is reasonably safe to wake up a
potential waiter in order to prevent the above problems.
As this might be a false positive it can cause spurious wakeups, but the
waiter side has to handle other types of unrelated wakeups, e.g. signals
gracefully anyway. So such a spurious wakeup will not affect the
correctness of these operations.
This workaround must not touch the user space futex value and cannot set
the OWNER_DIED bit because the lock value is 0, i.e. uncontended. Setting
OWNER_DIED in this case would result in inconsistent state and subsequently
in malfunction of the owner died handling in user space.
The rest of the user space state is still consistent as no other task can
observe the list_op_pending entry in the exiting tasks robust list.
The eventually woken up waiter will observe the uncontended lock value and
take it over.
[ tglx: Massaged changelog and comment. Made the return explicit and not
depend on the subsequent check and added constants to hand into
handle_futex_death() instead of plain numbers. Fixed a few coding
style issues. ]
Fixes: 0771dfefc9 ("[PATCH] lightweight robust futexes: core")
Signed-off-by: Yang Tao <yang.tao172@zte.com.cn>
Signed-off-by: Yi Wang <wang.yi59@zte.com.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1573010582-35297-1-git-send-email-wang.yi59@zte.com.cn
Link: https://lkml.kernel.org/r/20191106224555.943191378@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 05b042a194 upstream.
When two recent commits that increased the size of the 'struct cpu_entry_area'
were merged in -tip, the 32-bit defconfig build started failing on the following
build time assert:
./include/linux/compiler.h:391:38: error: call to ‘__compiletime_assert_189’ declared with attribute error: BUILD_BUG_ON failed: CPU_ENTRY_AREA_PAGES * PAGE_SIZE < CPU_ENTRY_AREA_MAP_SIZE
arch/x86/mm/cpu_entry_area.c:189:2: note: in expansion of macro ‘BUILD_BUG_ON’
In function ‘setup_cpu_entry_area_ptes’,
Which corresponds to the following build time assert:
BUILD_BUG_ON(CPU_ENTRY_AREA_PAGES * PAGE_SIZE < CPU_ENTRY_AREA_MAP_SIZE);
The purpose of this assert is to sanity check the fixed-value definition of
CPU_ENTRY_AREA_PAGES arch/x86/include/asm/pgtable_32_types.h:
#define CPU_ENTRY_AREA_PAGES (NR_CPUS * 41)
The '41' is supposed to match sizeof(struct cpu_entry_area)/PAGE_SIZE, which value
we didn't want to define in such a low level header, because it would cause
dependency hell.
Every time the size of cpu_entry_area is changed, we have to adjust CPU_ENTRY_AREA_PAGES
accordingly - and this assert is checking that constraint.
But the assert is both imprecise and buggy, primarily because it doesn't
include the single readonly IDT page that is mapped at CPU_ENTRY_AREA_BASE
(which begins at a PMD boundary).
This bug was hidden by the fact that by accident CPU_ENTRY_AREA_PAGES is defined
too large upstream (v5.4-rc8):
#define CPU_ENTRY_AREA_PAGES (NR_CPUS * 40)
While 'struct cpu_entry_area' is 155648 bytes, or 38 pages. So we had two extra
pages, which hid the bug.
The following commit (not yet upstream) increased the size to 40 pages:
x86/iopl: ("Restrict iopl() permission scope")
... but increased CPU_ENTRY_AREA_PAGES only 41 - i.e. shortening the gap
to just 1 extra page.
Then another not-yet-upstream commit changed the size again:
880a98c339: ("x86/cpu_entry_area: Add guard page for entry stack on 32bit")
Which increased the cpu_entry_area size from 38 to 39 pages, but
didn't change CPU_ENTRY_AREA_PAGES (kept it at 40). This worked
fine, because we still had a page left from the accidental 'reserve'.
But when these two commits were merged into the same tree, the
combined size of cpu_entry_area grew from 38 to 40 pages, while
CPU_ENTRY_AREA_PAGES finally caught up to 40 as well.
Which is fine in terms of functionality, but the assert broke:
BUILD_BUG_ON(CPU_ENTRY_AREA_PAGES * PAGE_SIZE < CPU_ENTRY_AREA_MAP_SIZE);
because CPU_ENTRY_AREA_MAP_SIZE is the total size of the area,
which is 1 page larger due to the IDT page.
To fix all this, change the assert to two precise asserts:
BUILD_BUG_ON((CPU_ENTRY_AREA_PAGES+1)*PAGE_SIZE != CPU_ENTRY_AREA_MAP_SIZE);
BUILD_BUG_ON(CPU_ENTRY_AREA_TOTAL_SIZE != CPU_ENTRY_AREA_MAP_SIZE);
This takes the IDT page into account, and also connects the size-based
define of CPU_ENTRY_AREA_TOTAL_SIZE with the address-subtraction based
define of CPU_ENTRY_AREA_MAP_SIZE.
Also clean up some of the names which made it rather confusing:
- 'CPU_ENTRY_AREA_TOT_SIZE' wasn't actually the 'total' size of
the cpu-entry-area, but the per-cpu array size, so rename this
to CPU_ENTRY_AREA_ARRAY_SIZE.
- Introduce CPU_ENTRY_AREA_TOTAL_SIZE that _is_ the total mapping
size, with the IDT included.
- Add comments where '+1' denotes the IDT mapping - it wasn't
obvious and took me about 3 hours to decode...
Finally, because this particular commit is actually applied after
this patch:
880a98c339: ("x86/cpu_entry_area: Add guard page for entry stack on 32bit")
Fix the CPU_ENTRY_AREA_PAGES value from 40 pages to the correct 39 pages.
All future commits that change cpu_entry_area will have to adjust
this value precisely.
As a side note, we should probably attempt to remove CPU_ENTRY_AREA_PAGES
and derive its value directly from the structure, without causing
header hell - but that is an adventure for another day! :-)
Fixes: 880a98c339: ("x86/cpu_entry_area: Add guard page for entry stack on 32bit")
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: stable@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4d2fa82d98 upstream.
If the kernel accidentally uses DS or ES while the user values are
loaded, it will work fine for sane userspace. In the interest of
simulating maximally insane userspace, make sigreturn_32 zero out DS
and ES for the nasty parts so that inadvertent use of these segments
will crash.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 8caa016bfc upstream.
For reasons that I haven't quite fully diagnosed, running
mov_ss_trap_32 on a 32-bit kernel results in an infinite loop in
userspace. This appears to be because the hacky SYSENTER test
doesn't segfault as desired; instead it corrupts the program state
such that it infinite loops.
Fix it by explicitly clearing EBP before doing SYSENTER. This will
give a more reliable segfault.
Fixes: 59c2a7226f ("x86/selftests: Add mov_to_ss test")
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 8954290765 upstream.
When the NMI lands on an ESPFIX_SS, we are on the entry stack and must
swizzle, otherwise we'll run do_nmi() on the entry stack, which is
BAD.
Also, similar to the normal exception path, we need to correct the
ESPFIX magic before leaving the entry stack, otherwise pt_regs will
present a non-flat stack pointer.
Tested by running sigreturn_32 concurrent with perf-record.
Fixes: e5862d0515 ("x86/entry/32: Leave the kernel via trampoline stack")
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a1a338e5b6 upstream.
Right now, we do some fancy parts of the exception entry path while SS
might have a nonzero base: we fill in regs->ss and regs->sp, and we
consider switching to the kernel stack. This results in regs->ss and
regs->sp referring to a non-flat stack and it may result in
overflowing the entry stack. The former issue means that we can try to
call iret_exc on a non-flat stack, which doesn't work.
Tested with selftests/x86/sigreturn_32.
Fixes: 45d7b25574 ("x86/entry/32: Enter the kernel via trampoline stack")
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4c4fd55d3d upstream.
When re-building the IRET frame we use %eax as an destination %esp,
make sure to then also match the segment for when there is a nonzero
SS base (ESPFIX).
[peterz: Changelog and minor edits]
Fixes: 3c88c692c2 ("x86/stackframe/32: Provide consistent pt_regs")
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 40ad219958 upstream.
As reported by Lai, the commit 3c88c692c2 ("x86/stackframe/32:
Provide consistent pt_regs") wrecked the IRET EXTABLE entry by making
.Lirq_return not point at IRET.
Fix this by placing IRET_FRAME in RESTORE_REGS, to mirror how
FIXUP_FRAME is part of SAVE_ALL.
Fixes: 3c88c692c2 ("x86/stackframe/32: Provide consistent pt_regs")
Reported-by: Lai Jiangshan <laijs@linux.alibaba.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 880a98c339 upstream.
The entry stack in the cpu entry area is protected against overflow by the
readonly GDT on 64-bit, but on 32-bit the GDT needs to be writeable and
therefore does not trigger a fault on stack overflow.
Add a guard page.
Fixes: c482feefe1 ("x86/entry/64: Make cpu_entry_area.tss read-only")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f490e07c53 upstream.
Commit 945fd17ab6 ("x86/cpu_entry_area: Sync cpu_entry_area to
initial_page_table") introduced the sync for the initial page table for
32bit.
sync_initial_page_table() uses clone_pgd_range() which does the update for
the kernel page table. If PTI is enabled it also updates the user space
page table counterpart, which is assumed to be in the next page after the
target PGD.
At this point in time 32-bit did not have PTI support, so the user space
page table update was not taking place.
The support for PTI on 32-bit which was introduced later on, did not take
that into account and missed to add the user space counter part for the
initial page table.
As a consequence sync_initial_page_table() overwrites any data which is
located in the page behing initial_page_table causing random failures,
e.g. by corrupting doublefault_tss and wreckaging the doublefault handler
on 32bit.
Fix it by adding a "user" page table right after initial_page_table.
Fixes: 7757d607c6 ("x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Joerg Roedel <jroedel@suse.de>
Cc: stable@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 922eea2ce5 upstream.
This can be had with two instead of six insns, by just checking the high
CS.RPL bit.
Also adjust the comment - there would be no #GP in the mentioned cases, as
there's no segment limit violation or alike. Instead there'd be #PF, but
that one reports the target EIP of said branch, not the address of the
branch insn itself.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Juergen Gross <jgross@suse.com>
Link: https://lkml.kernel.org/r/a5986837-01eb-7bf8-bf42-4d3084d6a1f5@suse.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 29b810f5a5 upstream.
Now that SS:ESP always get saved by SAVE_ALL, this also needs to be
accounted for in xen_iret_crit_fixup(). Otherwise the old_ax value gets
interpreted as EFLAGS, and hence VM86 mode appears to be active all the
time, leading to random "vm86_32: no user_vm86: BAD" log messages alongside
processes randomly crashing.
Since following the previous model (sitting after SAVE_ALL) would further
complicate the code _and_ retain the dependency of xen_iret_crit_fixup() on
frame manipulations done by entry_32.S, switch things around and do the
adjustment ahead of SAVE_ALL.
Fixes: 3c88c692c2 ("x86/stackframe/32: Provide consistent pt_regs")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Juergen Gross <jgross@suse.com>
Cc: Stable Team <stable@vger.kernel.org>
Link: https://lkml.kernel.org/r/32d8713d-25a7-84ab-b74b-aa3e88abce6b@suse.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 81ff2c37f9 upstream.
Once again RPL checks have been introduced which don't account for a 32-bit
kernel living in ring 1 when running in a PV Xen domain. The case in
FIXUP_FRAME has been preventing boot.
Adjust BUG_IF_WRONG_CR3 as well to guard against future uses of the macro
on a code path reachable when running in PV mode under Xen; I have to admit
that I stopped at a certain point trying to figure out whether there are
present ones.
Fixes: 3c88c692c2 ("x86/stackframe/32: Provide consistent pt_regs")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Stable Team <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/0fad341f-b7f5-f859-d55d-f0084ee7087e@suse.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 03bf73c315 upstream.
In nbd_add_socket when krealloc succeeds, if nsock's allocation fail the
reallocted memory is leak. The correct behaviour should be assigning the
reallocted memory to config->socks right after success.
Reviewed-by: Josef Bacik <josef@toxicpanda.com>
Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 64870ed1b1 upstream.
For MDS vulnerable processors with TSX support, enabling either MDS or
TAA mitigations will enable the use of VERW to flush internal processor
buffers at the right code path. IOW, they are either both mitigated
or both not. However, if the command line options are inconsistent,
the vulnerabilites sysfs files may not report the mitigation status
correctly.
For example, with only the "mds=off" option:
vulnerabilities/mds:Vulnerable; SMT vulnerable
vulnerabilities/tsx_async_abort:Mitigation: Clear CPU buffers; SMT vulnerable
The mds vulnerabilities file has wrong status in this case. Similarly,
the taa vulnerability file will be wrong with mds mitigation on, but
taa off.
Change taa_select_mitigation() to sync up the two mitigation status
and have them turned off if both "mds=off" and "tsx_async_abort=off"
are present.
Update documentation to emphasize the fact that both "mds=off" and
"tsx_async_abort=off" have to be specified together for processors that
are affected by both TAA and MDS to be effective.
[ bp: Massage and add kernel-parameters.txt change too. ]
Fixes: 1b42f01741 ("x86/speculation/taa: Add mitigation for TSX Async Abort")
Signed-off-by: Waiman Long <longman@redhat.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: linux-doc@vger.kernel.org
Cc: Mark Gross <mgross@linux.intel.com>
Cc: <stable@vger.kernel.org>
Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Tyler Hicks <tyhicks@canonical.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20191115161445.30809-2-longman@redhat.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 700c1018b8 upstream.
gawk 5.0.1 generates the following regexp warnings:
GEN /home/sasha/torvalds/tools/objtool/arch/x86/lib/inat-tables.c
awk: ../arch/x86/tools/gen-insn-attr-x86.awk:260: warning: regexp escape sequence `\:' is not a known regexp operator
awk: ../arch/x86/tools/gen-insn-attr-x86.awk:350: (FILENAME=../arch/x86/lib/x86-opcode-map.txt FNR=41) warning: regexp escape sequence `\&' is not a known regexp operator
Ealier versions of gawk are not known to generate these warnings. The
gawk manual referenced below does not list characters ':' and '&' as
needing escaping, so 'unescape' them. See
https://www.gnu.org/software/gawk/manual/html_node/Escape-Sequences.html
for more info.
Running diff on the output generated by the script before and after
applying the patch reported no differences.
[ bp: Massage commit message. ]
[ Caught the respective tools header discrepancy. ]
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Alexander Kapshuk <alexander.kapshuk@gmail.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20190924044659.3785-1-alexander.kapshuk@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 45422b704d upstream.
Due to unneeded multiplication in the out_free_pages portion of
r10buf_pool_alloc(), when using a 3-copy raid10 layout, it is
possible to access a resync_pages offset that has not been
initialized. This access translates into a crash of the system
within resync_free_pages() while passing a bad pointer to
put_page(). Remove the multiplication, preventing access to the
uninitialized area.
Fixes: f025061836 ("md: raid10: don't use bio's vec table to manage resync pages")
Cc: stable@vger.kernel.org # 4.12+
Signed-off-by: John Pittman <jpittman@redhat.com>
Suggested-by: David Jeffery <djeffery@redhat.com>
Reviewed-by: Laurence Oberman <loberman@redhat.com>
Signed-off-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit f8914a1462 upstream.
This patch restores the old behavior that read
the chip_id on the QCA988x before resetting the
chip. This needs to be done in this order since
the unsupported QCA988x AR1A chips fall off the
bus when resetted. Otherwise the next MMIO Op
after the reset causes a BUS ERROR and panic.
Cc: stable@vger.kernel.org
Fixes: 1a7fecb766 ("ath10k: reset chip before reading chip_id in probe")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7165ef890a upstream.
The introduction of 768ec4c012 ("ath10k: update HOST capability QMI
message") served the purpose of supporting the new and extended HOST
capability QMI message.
But while the new message adds a slew of optional members it changes the
data type of the "daemon_support" member, which means that older
versions of the firmware will fail to decode the incoming request
message.
There is no way to detect this breakage from Linux and there's no way to
recover from sending the wrong message (i.e. we can't just try one
format and then fallback to the other), so a quirk is introduced in
DeviceTree to indicate to the driver that the firmware requires the 8bit
version of this message.
Cc: stable@vger.kernel.org
Fixes: 768ec4c012 ("ath10k: update HOST capability qmi message")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit bfd6e6e6c5 upstream.
The `ar_usb` field of `ath10k_usb_pipe_usb_pipe` objects
are initialized to point to the containing `ath10k_usb` object
according to endpoint descriptors read from the device side, as shown
below in `ath10k_usb_setup_pipe_resources`:
for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
endpoint = &iface_desc->endpoint[i].desc;
// get the address from endpoint descriptor
pipe_num = ath10k_usb_get_logical_pipe_num(ar_usb,
endpoint->bEndpointAddress,
&urbcount);
......
// select the pipe object
pipe = &ar_usb->pipes[pipe_num];
// initialize the ar_usb field
pipe->ar_usb = ar_usb;
}
The driver assumes that the addresses reported in endpoint
descriptors from device side to be complete. If a device is
malicious and does not report complete addresses, it may trigger
NULL-ptr-deref `ath10k_usb_alloc_urb_from_pipe` and
`ath10k_usb_free_urb_to_pipe`.
This patch fixes the bug by preventing potential NULL-ptr-deref.
Signed-off-by: Hui Peng <benquike@gmail.com>
Reported-by: Hui Peng <benquike@gmail.com>
Reported-by: Mathias Payer <mathias.payer@nebelwelt.net>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[groeck: Add driver tag to subject, fix build warning]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
If the DMA buffer is sgatter list, current TD organization is wrong.
Fix this in this commit. We triggered this issue due to the f_fs
begins to use scatter buffer list as data buffer.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
In the end of playback, when the suspend happen, there will be error
in m4 side.
RTM_SaiSdmaAdapter_SetParam: Tx in wrong state 2!
SRTM_SaiSdmaAdapter_SetBuf: Tx in wrong state 2!
SRTM_SaiSdmaAdapter_Start: Tx in wrong state 2!
The reason is that the I2S_TX_TERMINATE happen in the middle of
I2S_TX_SUSPEND and I2S_TX_RESUME, this sequence is not allowed.
So we make the rpmsg message workqueue enter freeze in suspend
to avoid such issue. that the command sequence will be
I2S_TX_SUSPEND->I2S_TX_RESUME->I2S_TX_TERMINATE
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
rng DT node was added without a compatible string.
i.MX driver for RNGC (drivers/char/hw_random/imx-rngc.c) also claims
support for RNGB, and is currently used for i.MX25.
Let's used this driver also for RNGB block in i.MX6SL.
Fixes: e29fe21cff ("ARM: dts: add device tree source for imx6sl SoC")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
This patch change MAX_ZONEORDER default to 14 on i.MX8 platforms
due to GPU/DISPLAY large continuous physical memory requires it
This also aligned with previous imx releases on imx6/7/8
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
In imx fragment config file, it will disable all other ARCH
except Layerscape and S32 which can save the image size and
compiling time a lot.
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Older imx releases increased this based on SOC_IMX8 but that symbol is
gone and the expectation is that SOC-selection symbols like "ARCH_MXC"
will almost always be defined and shouldn't be used to make incompatible
config decisions.
Make the value of FORCE_MAX_ZONEORDER configurable so this can be
adjusted in a .config file.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Li Yang <Leoyang.li@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
imx6ul/ull/ulz 14x14 evk board memory size is 512M, current
board dts set CMA reserved memory size to 320M, which causes
system has no free memory for unmovable and reclaimable.
In fact, set CMA memory size to 96M is large enough for pxp and
epdc cases.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
To save power consumption, disable pcie clocks and regulators when
pcie link is down.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Select CONFIG_PM_TEST_SUSPEND by default to support PM test.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Deselect CONFIG_HIBERNATION as it is NOT supported on i.MX SoCs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
For now the machine driver taking care of the codec is hard-coded.
In the future we will need to read the name from DT.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
On i.MX8 platforms that have a DSP the DAI handling is taken care
of by two entities:
* Application Processor (AP), which runs Linux
* DSP, which runs a firmware (typically Sound Open Firmware)
The DSP has access to DAI IP registers, but it cannot easily handle
resources like:
* clock
* power domain management
* pinctrl.
For this reason we introduce a generic FSL DAI driver which will take
care of the resources above.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 9aca4d89de.
Reverting this because the patch suffered a lot of changes and
I don't want to do a first push. This should be squasehd
with 9aca4d89de.
We use existing simple-audio-card machine driver to demonstrate
the usage of ESAI0 with cs42888 codec.
Mind that we use FSL DAI driver in order to manage ESAI related
resources (PD, clocks, pinctrl). This was previously done by
dsp platorm node.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This clock is needed in order to be able to correctly use the MIPI
resets, since this clock is the only one connected to the MIPI Reset
Synchronizer block.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Use the correct sequence for DSI power-on, as detailed by vendor. In
order to do that, each resets should be handled individually.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add dts nodes for adv7535 DSI-HDMI converter and connect them to their
corresponding mipi dsi nodes.
Use dsi-adv7535 as default use-case for imx8qxp-mek.dtb file.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add dts nodes for adv7535 DSI-HDMI converter and connect them to their
corresponding mipi dsi nodes.
Use dsi-adv7535 as default use-case for imx8qm-mek.dtb file.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add n_voltages/min_uV in regulator description so that no failure return
while regulator_count_voltages() called, which cause vqmmc regulator
voltage switching to 1.8V failure on i.mx7ulp-evk. This issue is exposed
by commit 4982094451 ("regulator: core: simplify return value on
suported_voltage").
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reported-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Any CRTC driver should use the crtc_clock instead of clock value from
drm_display_mode structure, since the crtc_clock might differ from the
actual pixel clock needed by that mode.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Currently, if the actual i2c device chip (ADV75**) is not found, the
remote node is disabled completely. This causes undefined behavior, if
that device was probed and being used.
In order to fix this behavior, don't disable the remote device, just
detach the remote's endpoint, so that the remote device will just
abandon the connection.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Some modes are not working with this converter. Until we find a real fix
to make any mode working, just limit the supported modes by their
clocks.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Correct the usage of drm_of_find_panel_or_bridge. It's pair remove
function drm_of_panel_bridge_remove should be called from drm_bridge
detach instead of dsi_host detach.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add compatible for i.MX8QM and i.MX8QXP and the related helper functions
needed to power on the MIPI IP on these platforms.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add a new dts property 'use-disp-ss', based on this, nwl driver will act
like a component with bind and unbind callbacks.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
there's pin conflict between epdc and sii902x, seeing following boot message:
[ 4.736169] imx7d-pinctrl 30330000.iomuxc: pin MX7D_PAD_EPDC_DATA13 already requested by 2-0039; cannot claim for 306f0000.epdc
[ 4.748188] imx7d-pinctrl 30330000.iomuxc: pin-26 (306f0000.epdc) status -22
[ 4.755346] imx7d-pinctrl 30330000.iomuxc: could not request pin 26 (MX7D_PAD_EPDC_DATA13) from group epdcgrp0 on device 30330000.iomuxc
[ 4.767766] imx_epdc_v2_fb 306f0000.epdc: Error applying setting, reverse things back
disable hdmi(sii902x) to make epdc work
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
This supports property idle-state,if present,
overrides i2c-mux-idle-disconnect.
My use cases:
- Use the property idle-state to fix
an errata on LS2085ARDB and LS2088ARDB.
- Errata id: E-00013(board LS2085ARDB and
LS2088ARDB revision on Rev.B, Rev.C and Rev.D).
- About E-00013:
- Description: I2C1 and I2C3 buses
are missing pull-up.
- Impact: When the PCA954x device is tri-stated, the I2C bus
will float. This makes the I2C bus and its associated
downstream devices inaccessible.
- Hardware fix: Populate resistors R189 and R190 for I2C1
and resistors R228 and R229 for I2C3.
- Software fix: Remove the tri-state option from the PCA954x
driver(PCA954x always on enable status, specify a
channel zero in dts to fix the errata E-00013).
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
The I2CR[MSTA] will be modified by software or hardware even in master
mode. The judgment of slave mode by reading CR register is unreliable.
Change to use i2c_imx->slave registered status to judge i2c mode.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
- Simplify code with helper function i2c_imx_clr_al_bit
- Fix an error about clearing arbitration lost bit
- Fix an error that not set I2Cx_IBCR following by
the workaround of A-010650 (in step 5)
Reviewed-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Add i2c backend frontend support.
The transaction only support one msg each time.
The frontend sends a request to backend, backend use i2c_transfer
to do real transaction to hardware and return the results to frontend.
Now i2cdump/get/set works.
In domu cfg file, use
"vi2c = ['backend=0,be-adapter=5a800000.i2c,addr=0x51;0x44']" to
create a dummy controller in frontend and allowed slaves in backend.
Currently the slave address check not added, it will be supported in
furture patch.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Introduce i2cif from xen. This will be used by paravirtualization
i2c driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Currently, if sink does not support SCDC, even if the sink is HDMI 1.4 or 2.0,
the hdmi_type is left to default value (MODE_DVI). Hence the HDMI controler is
not properly initialized when cdns_hdmi_ctrl_init() is called.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reported-by: Jared Hu <jared.hu@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Add cpu type check for i.MX6ULZ in MSL code to support low
power feature.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
The vbus regulator should be put under its node, not but at
usb controller node.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
set GPU 2D/3D clock parent with IMX7ULP_CLK_APLL_PFD2,
set IMX7ULP_CLK_APLL_PFD2 clock rate with 400MHz.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
This feature is telling how to configure cache type on 4 different
transfer types: Data Read, Desc Read, Data Write and Desc write. For each
transfer type, controller has a 4-bit register field to enable different
cache type. Quoted from DWC3 data book Table 6-5 Cache Type Bit Assignments:
----------------------------------------------------------------
MBUS_TYPE| bit[3] |bit[2] |bit[1] |bit[0]
----------------------------------------------------------------
AHB |Cacheable |Bufferable |Privilegge |Data
AXI3 |Write Allocate|Read Allocate|Cacheable |Bufferable
AXI4 |Allocate Other|Allocate |Modifiable |Bufferable
AXI4 |Other Allocate|Allocate |Modifiable |Bufferable
Native |Same as AXI |Same as AXI |Same as AXI|Same as AXI
----------------------------------------------------------------
Note: The AHB, AXI3, AXI4, and PCIe busses use different names for certain
signals, which have the same meaning:
Bufferable = Posted
Cacheable = Modifiable = Snoop (negation of No Snoop)
In most cases, driver support is not required unless the default values of
registers are not correct *and* DWC3 node has enabled dma-coherent. So far we
have observed USB device detect failure on some Layerscape platforms if this
programming was not applied.
Related struct:
struct dwc3_cache_type {
u8 transfer_type_datard;
u8 transfer_type_descrd;
u8 transfer_type_datawr;
u8 transfer_type_descwr;
};
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Some Layerscape paltforms (such as LS1088A, LS2088A, etc) require update HW
default cache type configuration to fix DWC3 init failure when applying
property dma-coherent.
Note that the cache type configuration is actually native feature of DWC3,
not additional desgin coming from SoC, so add this support here.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
- Advantage of park mode
When only a single Async endpoint is active.
- Behavior of park mode
1. The controller prefetches data/TRBs to do 3 * burst_size worth
of packets.
2. When park mode is disabled there will be some delay between
bursts on the USB. This can be avoided if park mode is enabled
in cases of only one endpoint is active.
3. But this delay is significant only with systems of large
latencies.
4. We have noticed that in cases where a device NAKs often, it
tends to bring down the performance for a single endpoint case.
- Issue on "park mode"
1. LSP (List Processor) goes in and out of park mode irrespective
of the fact that there are more endpoints active. #LSP consider
that there is only one endpoint active.
2. This causes master scheduler and transaction handlers to think
that they are in park mode even though they are not. This is
because request to transaction handlers, generated by HSCH is
in park mode when the request is made
3. This causes a case where the master scheduler calculates wrongly
the number of TRB cache space available.
4. Because of the wrongly calculated number of TRB spaces, the core
fetches more TRBS than there is space for.
5. This causes overwriting the TRB cache area into the TRQ cache
area which is next to the TRB cache area.
6. This causes invalidating an entry in the TRQ
7. This causes transaction handlers to ignore a request in the TRQ
which it should have processed.
8. This causes the main scheduler to hang because it is waiting for
status from transaction handler.
9. This causes host controller to hang.
- Work Around
Disabling park mode for super speed by setting GUCTL1[17] to be 1.
The STAR number is 9001415732, which is target to be released around
May,2020.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Add JSON metrics for i.MX8 DDR perf.
Below command used for metric:
--------------------------------------------------------------
root@imx8qmmek:~# perf list metricgroup
List of pre-defined events (to be used in -e):
Metric Groups:
i.MX8MM_DDR_MON
i.MX8MP_DDR_MON
i.MX8QM_DDR_MON
--------------------------------------------------------------
root@imx8qmmek:~# perf list metric
List of pre-defined events (to be used in -e):
Metrics:
imx8mm-ddr0-2d-r
[imx8mm: bursts of gpu 2d read from ddr0]
imx8mm-ddr0-2d-w
[imx8mm: bursts of gpu 2d write to ddr0]
imx8mm-ddr0-3d-r
[imx8mm: bursts of gpu 3d read from ddr0]
imx8mm-ddr0-3d-w
[imx8mm: bursts of gpu 3d write to ddr0]
imx8mm-ddr0-a53-r
[imx8mm: bursts of a53 core read from ddr0]
imx8mm-ddr0-a53-w
[imx8mm: bursts of a53 core write to ddr0]
imx8mm-ddr0-all-r
[imx8mm: bytes of all masters read from ddr0]
imx8mm-ddr0-all-w
[imx8mm: bytes of all masters write to ddr0]
------------------------------------------------------------
root@imx8qmmek:~# perf stat -a -M imx8mm-ddr0-2d-r sleep 1
Performance counter stats for 'system wide':
0 imx8_ddr0/axid-read,axi_mask=0x0001,axi_id=0x0004/ # 0.0 imx8mm-ddr0-2d-r
1.012773375 seconds time elapsed
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
If we want to add/print metricgroup, we need get pmu evets map via CPUID
string, so it is important to get CPUID string. Now in metricgroup, it
passes NULL to perf_pmu__find_map(), will never get the pmu events map on
ARM64 platforms, due to get_cpuid_str() implement for ARM64 depending on the
cpu info of PMU. The CPUID string will not be same on all CPUs on heterogeneous
platforms, adding provision(using pmu->cpus) to find cpuid string from
associated CPUs of PMU.
The implement of get_cpuid_str() for ARM64 has taken heterogeneous platforms
into consideration, but metricgroup has not. So it is necessory to add
heterogeneous support for metricgroup. When we want to add/print metricgroup,
need iterator each PMU then pass the perf_pmu struct to perf_pmu__find_map().
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
caps/filter indicates whether HW supports AXI ID filter or not.
caps/enhanced_filter indicates whether HW supports enhanced AXI ID filter
or not.
Users can check filter features from userspace with these attributions.
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
[will: reworked cap switch to be less error-prone]
Signed-off-by: Will Deacon <will@kernel.org>
With DDR_CAP_AXI_ID_FILTER quirk, indicating HW supports AXI ID filter
which only can get bursts from DDR transaction, i.e. DDR read/write
requests.
This patch add DDR_CAP_AXI_ID_ENHANCED_FILTER quirk, indicating HW
supports AXI ID filter which can get bursts and bytes from DDR
transaction at the same time. We hope PMU always return bytes in the
driver due to it is more meaningful for users.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Will Deacon <will@kernel.org>
Sphinx is currently outputting a warning where
the file 'imx-ddr.rst' is not included in the
documentation index. Additionally, the code
highlighting and doc formatting can be slightly
improved.
Signed-off-by: Adam Zerella <adam.zerella@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Add basic dom0/domu dts for xen on i.MX8QM MEK.
Dual display works and emmc passthrough to DomU.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Should not register power domain that not owned by current
partition.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Add resource management API, when we have multiple
partition running together, resources not owned to current
partition should not be used.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
The calibration of the SATA PHYX1 is derived from the PHYX2.
Add the release of the PHYX2 APB reset, and turn on the HW gated
pipe_pclks of PHYX2 to make sure that the calibration of SATA PHYX1
can be finished successfully.
Adjust the APB reset of SATA, it should be released firstly.
The EPCS configrations should be placed before the EPCS reset.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
The HD Display controller includes DP TX CTRL and DPHY, their offers
multi-protocol support of standards such as DisplayPort and eDP, with
one of these standards supported at a time.
This patch enables the HD Display controller driver on the LS1028A.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Update the property #clock-cells = <1> to #clock-cells = <0> of the
dpclk, since the Display output pixel clock driver provides single
clock output.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to maximise performance of the LCD Controller's 64-bit AXI
bus, for any give speed bin of the device, the AXI master interface
clock(ACLK) clock can be up to CPU_frequency/2, which is already
capable of optimal performance. In general, ACLK is always expected
to be equal to CPU_frequency/2. APB slave interface clock(PCLK) and
Main processing clock(PCLK) both are tied to the same clock as ACLK.
This change followed the LS1028A Architecture Specification Manual.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order for the dwc controller to work with SMMU it needs the
bootloader to fixup it's iommu-map property. In the current
implementation to bootloader will not perform the fixup if the
property is not already in the device tree with dummy fields.
Add it to fix DWC PCI over SMMU.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
layerscape otg function should be supported HNP SRP and ADP protocol
accroing to rm doc, but dwc3 code not realize it and use id pin to
detect who is host or device(0 is host 1 is device) this patch is to
enable OTG mode on ls1028ardb ls1088ardb and ls1046ardb in dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Defines connectivity for a few serdes protocol combinations (85xx, 65xx,
13xx, 9999, 7777).
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
When converting a normal link to a DPCM link we need
to set dpcm_playback / dpcm_capture otherwise playback/capture
streams will not be created resulting in aplay/arecord not working.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
On i.MX8 platforms that have a DSP the DAI handling is taken care
of by two entities:
* Application Processor (AP), which runs Linux
* DSP, which runs a firmware (typically Sound Open Firmware)
The DSP has access to DAI IP registers, but it cannot easily handle
resources like:
* clock
* power domain management
* pinctrl.
For this reason we introduce a generic FSL DAI driver which will take
care of the resources above.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Set the drv_name and tplg_filename for nocodec
machine driver in sof_machine_check().
This means the sof_nocodec_setup() does not
need the mach, plat_data or desc arguments any longer.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Currently, SOF probes machine drivers by creating a platform device
and passing the machine description as private data.
This is driven by the ACPI restrictions. Ideally, ACPI tables
should contain the description for the machine driver. This is
not possible because ACPI tables are frozen and used on multiple
OS-es (e.g Windows).
In the case, of Device Tree we don't have this restrictions, so we
choose to probe the machine drivers by creating a DT node as is
the standard ALSA way.
This patch makes the probing of machine drivers from SOF core optional
allowing for arm platforms to decouple the SOF core from machine
driver probing.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
For some platforms, the refcount is explicitly incremented
to prevent it from entering runtime suspend. This
should be be done during probe in the core instead
of being done in the PCM driver.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This is a rework of the following i.MX BSP commit
(rel_imx_4.19.35_1.1.0_rc2):
9b63038a58cc ("MLK-21453: crypto: caam - fix Mentor's port, merge conflict resolutions")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
secvio_src property of caam_secvio node is a left-over from i.MX BSP,
remove it since it's no longer used.
Fixes: 2bc9a11149 ("MLKU-38-2 ARM: dts: imx: add caam snvs and secvio")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
This effectively:
-reverts commit 0c857beb7d ("hotfix: arm64: defconfig: disable CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST")
since the SM test issue has been fixed and
-changes SM test Kconfig symbol from y to m
(since SM test driver was changed to build only as a module)
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
SM test driver was changed to build only as a module.
Update defconfig accordingly.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Modify the signature for snd_sof_create_page_table to
take struct device pointer as an argument instead of
struct snd_sof_dev as this will be used by both the SOF
core device and its clients. Also, move the definition
out of core.c to utils.c.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Currently the FW filename is obtained from the ACPI matching
table when determining which machine driver to use. In
preparation for making the machine driver ACPI match optional
for Device Tree platforms and moving the machine driver selection
out of the SOF core, this patch introduces the default_fw_filename
member in struct sof_dev_desc.
Once the machine driver selection is moved out of SOF core,
the nocodec_fw_filename will become obsolete and will be removed.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Link unload now fails for ESAI/SAI DAIs with:
"error: invalid DAI type 6" because DAI type is not
properly handled.
Fix this by correctly handling cases where type is ESAI or SAI.
Fixes: a4eff5f86c ("ASoC: SOF: imx: Read ESAI parameters and send them to DSP")
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Introduce sof_ipc_dai_sai_params to keep information that
we get from topology and we send to DSP FW.
For the moment it is identical to ESAI one but it will
evolve shortly independently
Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
ESAI parameters are read for topology file, packed into
sof_ipc_dai_esai_parms struct and then sent to DSP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Introduce sof_ipc_dai_esai_params to keep information that
we get from topology and we send to DSP FW.
Also bump the ABI minor to reflect the changes on DSP FW.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Due to possible defer probe, the system suspend
sequences between display-subsystem and dsim can
not be fixed. But the working sequence should be
display-subsystem first and then dsim. Use late
suspend operation for dsim can make this fixed.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable CONFIG_PREEMPT instead of CONFIG_PREEMPT_VOLUNTARY, the former
is much suitable for embed system as i.mx. Besides, that aligns with
internal legacy imx_v7_defconfig.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
This Display TX CTRL clock should be ACLK/4, update it to align with
the specification.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
integer division and range of the display output pixel clock's 27-594MHz.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
LS1028A has a clock domain PXLCLK0 used for provide pixel clocks to Display
output interface. Add a YAML schema for this.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
enet_clk_ref is the same clock as ptp for i.MX6qdl platform,
but dtsi only define ptp clock that source from soc internal
anatop clock, and imx6q clock driver already register "enet_ref"
clock lookup for the ptp clock, so keep the con_id string as
"enet_ref" for clk_get_sys().
This reverts commit a3990871b9.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
imx7ulp need to support emmc hs400 mode, this mode need the sdhc clock
set near 400MHz, so that hs400 mode can work at near 200MHz, to get
the best performance. And also due to the I/O limitation, HS400 can only
work stable when the card clock rate is less than 176.4MHz. So this patch
change the sdhc clock sourced from apll_pfd1, and config the apll_pfd1
at 352.8MHz.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Driver will enumerate all res@fps to user, but for ov5640,
when it work in DVP mode, 1080P only can reach 15fps. For
2592x1944, no matter which mode it works, it only support
about 8fps. So driver need to clarify these info and report
the real capability to user.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Accroding to ov5640 datasheet, 2592x1944 only support 7.5fps.
But actually, it can reach about 8. For 1080P@30fps in DVP
mode, it can reach 1080P@15fsp, so adding valid mode and fps
checking before streaming.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Enable the PCIE EP RC for iMX
- hw setup:
* two imx boards, one is used as pcie rc, the other is used
as pcie ep.
RC TX N/P <--> EP RX N/P
RX N/P <--> EP TX N/P
- sw setup:
* when build rc image, make sure that
CONFIG_PCI_IMX6=y
CONFIG_RC_MODE_IN_EP_RC_SYS=y
* when build ep image
CONFIG_PCI_IMX6=y
CONFIG_EP_MODE_IN_EP_RC_SYS=y
- features:
* set-up link between rc and ep by their stand-alone
ref clk running internally.
* in ep's system, ep can access the reserved ddr memory
(default address:0x4000_0000 on imx6q sd board, and
0xb000_0000 on imx6sx sdb and imx7d arm2 boards) of
pcie rc's system, by the interconnection between pcie
ep and pcie rc.
* provide one example, howto configure the bar# of ep and so on,
when pcie ep emaluates one memory ram ep device
* setup one new outbound memory region at rc side, let imx pcie rc
can access the memory of imx pcie ep in imx pcie rc ep validation
system.
- NOTE:
* boot up ep platform firstly, then boot up rc platform.
* For imx6q/6dl/6sx/7d sabresd boards, make sure that mem=768M is
contained in the kernel command line,
since the start address of the upper 256mb of the 1g ddr mem is
reserved to do the pcie ep rc access operations in default.
- RC access memory of EP:
- EP:
write the <ddr_region_address> to the bar0 of ep.
echo <ddr_region_address> > /sys/devices/.../pcie/ep_bar0_addr
- RC:
access the <pcie_mem_base_addr>, and this address
would be mapped to the <ddr_region_address> of ep.
- Note:
ddr_region_address pcie_mem_base_addr bar0_addr
imx6qdl 0x4000_0000 0x0100_0000 0x01ff_c010
imx6sx 0xb000_0000 0x0800_0000 0x08ff_c010
imx7d 0xb000_0000 0x4000_0000 0x3380_0010
imx8mq 0xb820_0000 0x2000_0000 0x33c0_0010
imx8mm 0xb820_0000 0x1800_0000 0x3380_0010
imx8qm 0x9020_0000 0x6000_0000 0x5f00_0010
imx8qxp 0x9020_0000 0x7000_0000 0x5f01_0010
- The example of the RC access memory of EP
step1:
EP side:
echo 0x90200000 > /sys/devices/platform/bus@5f000000/5f000000.pcie
/ep_bar0_addr
root@imx8_all:~# ./memtool 90200000 4
Reading 0x4 count starting at address 0x90200000
0x90200000: 00000000 00000000 00000000 00000000
RC side:
./memtool 60000000=55aa55aa
Writing 32-bit value 0x55AA55AA to address 0x60000000
EP side:
root@imx8_all:~# ./memtool 90200000 4
Reading 0x4 count starting at address 0x90200000
0x90200000: 55AA55AA 00000000 00000000 00000000
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
We use controller version to differetiate between B0 (0x00024502)
and C0 (0x0002450C). The controller uses TDL check to
avoid "NO NAK" issue at B0 if there is not buffer for OUT, this issue
is described at "Work around 2" at the begin of gadget.c
At default, the TDL value is 0, so it always NAK host's OUT token.
When the TD is added, the TDL value is non-zero, it will respond
NAK/ACK according to OUT FIFO's situation.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
On i.mx8mm, kernel may hang if imx_imx_snvs_check_for_events() scheduled
after snvs clock turned off by rtc-snvs driver while ONOFF key kept on
pressing during kernel suspend, because imx_imx_snvs_check_for_events()
will touch snvs rigister. Add clock management in snvs_pwrkey driver
to fix it. Please note this clock is optional since snvs clock kept always
on(or even no snvs root clock in clock tree)on some chips such as i.mx6sx/
i.mx6ul.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Currently a downstream bridge is attached only if dsi->panel_bridge is valid.
However, dsi->panel_bridge becomes valid after the DSI host is attached. For
ADV7535, for example, the DSI host is attached from the drm_bridge_attach()
routine, which is never called.
This patch moves the downstream panel_bridge probing part from
nwl_dsi_host_attach() to nwl_dsi_bridge_attach().
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
In case the DTRC init function fails, or the exit routine is called, the IRQs
should be properly released.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
There are some VFIO regions which are cacheable (QMAN CENA region).
These regions should be mapped cacheable.
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
This patch adds support to read and write ioctls for
fsl-mc devices. Only read-write to DPRC/DPMCP devices
are supported while read writes on other fsl-mc devices
is not supported by this patch.
Also current patch limits userspace to write complete
64byte command once and read 64byte response by one ioctl.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
This patch allows to set an eventfd for fsl-mc device interrupt
and also to trigger the interrupt eventfd from userspace for testing.
All fsl-mc device interrupts are MSI type. This does not yet handle
correctly DPRC container interrupt where re-scanning on container is
required.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
This patch adds the skeleton for interrupt support
for fsl-mc devices. The interrupts are not yet functional,
the functionality will be added by subsequent patches.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
All the devices in a DPRC share the same pool of interrupts.
Because of this the access to the pool of interrupts must be
protected with a lock. Extend the current lock implementation
to have a lock per DPRC.
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
Allow userspace to mmap device regions for direct access of
fsl-mc devices.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
Allow userspace to get fsl-mc device info (number of regions
and irqs).
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
The DPRC(Data Path Resource Container) device is a bus device and has
child devices attached to it. When the vfio-fsl-mc driver is probed
the DPRC is scanned and the child devices discovered and initialized.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
This patch adds the infrastructure for VFIO support for fsl-mc
devices. Subsequent patches will add support for binding and secure
assigning these devices using VFIO.
FSL-MC is a new bus (driver/bus/fsl-mc/) which is different
from PCI and Platform bus.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
Fix below build error when CONFIG_SMP is NOT selected:
drivers/irqchip/irq-imx-gpcv2.c: In function "imx_gpcv2_wake_request_fixup":
drivers/irqchip/irq-imx-gpcv2.c:123:2: error: implicit declaration of function
"set_smp_cross_call" [-Werror=implicit-function-declaration]
123 | set_smp_cross_call(imx_gpcv2_raise_softirq);
| ^~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
make[3]: *** [drivers/irqchip/irq-imx-gpcv2.o] Error 1
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
imx8mq-evk.dts defines a graph connection for hdmi, but
then imx8mq-evk-dcss-rm67191.dts overrides that with a graph
connection for the mipi dsi as the same output signals are used.
This leaves an incomplete graph as the hdmi output has only half a
connection. Though hdmi is disabled in imx8mq-evk-dcss-rm67191.dts
Still have the following warning:
arch/arm64/boot/dts/freescale/imx8mq-evk.dts:1092.21-1094.5:
Warning (graph_endpoint): /soc@0/bus@32c00000/hdmi@32c00000/port@0/endpoint:
graph connection to node '/soc@0/bus@32c00000/
display-controller@32e00000/port@0/endpoint' is not bidirectional
Fix this by delete hdmi node in imx8mq-evk-dcss-rm67191.dts.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Add power-domain-names for edma2 device node, otherwise, power-domains
in imx8qm-mek-dsp.dts will not match with the default power-domain-names
in imx8qm-ss-audio.
commit 479432deec17 ("LF-121: arm64: dts: imx8qm-mek-dsp: Fix the typo")
is not enough.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Since the endpoint interrupt handling is at thread irq, to align with
it, move USB interrupt handling to thread irq, otherwise, it may has
lock recursion issue.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Mpl3115 shares one interrupt pin with fxos8700/fxas2100/isl29023. Need
to set its interrupt pin as "interrupt-open-drain". Otherwise, one of
them interrupt cannot pull down this pin to 0V.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Disable regulator first after an error occurs when probe. Remove the
directly return code when probe error occurs.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Fix build warning when CONFIG_PM_SLEEP=n, the warning message is:
drivers/input/misc/mpl3115.c:290:12: warning: ‘mpl3115_start_chip’ defined but not used [-Wunused-function]
static int mpl3115_start_chip(struct i2c_client *client)
^~~~~~~~~~~~~~~~~~
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit fd826f4b26257fe04272e0d91b53a8e448812bf3)
The sensors share an interrupt pin on imx8qm/imx8qxp mek.
As a result, the interrupt signals will be interfered by
each other in default push-pull status.
This patch sets sensor interrupt pins as open-drain when
necessary.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-picked from 48bcb7aafa2a3ced923d1a1753bb19d89a9fc273)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 8406dfab0fdbd5d135a614c38492b2e949ce0ede)
FPGA on LX2160AQDS/LX2160ARDB connected on I2C bus, so add qixis driver
which is basically an i2c client driver to control FPGA.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
In sleep mode, the clocks of CPU core and unused IP blocks are turned
off (IP blocks allowed to wake up system will running).
Some QorIQ SoCs like MPC8536, P1022 and T104x, have deep sleep PM mode
in addtion to the sleep PM mode. While in deep sleep mode,
additionally, the power supply is removed from CPU core and most IP
blocks. Only the blocks needed to wake up the chip out of deep sleep
are ON.
This feature supports 32-bit and 36-bit address space.
The sleep mode is equal to the Standby state in Linux. The deep sleep
mode is equal to the Suspend-to-RAM state of Linux Power Management.
Command to enter sleep mode.
echo standby > /sys/power/state
Command to enter deep sleep mode.
echo mem > /sys/power/state
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback function will flush all caches in the current cpu.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[PowerPC part]
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[PowerPC part]
The codes of qe_ic init from a variety of platforms are redundant,
merge them to a common function and put it to irqchip/irq-qeic.c
For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead of
"qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Add below functions for ARM platform which are used by ehci fsl driver:
1. spin_event_timeout function
2. set/clear bits functions
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Hrtimer based broadcast is used on ARM platform. It can be
registered as the tick broadcast device in the absence of
a real external clock device.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
On i.MX8M SOC family, we can support LPDDR4, DDR4 or DDR3L, we may need
to support different setpoint for audio & low bus mode on different DDR type,
So update the code to get all the supported setpoint info from ATF.
The maximum setpoints that can be supported by hardware is 4, if the drate
for a setpoint is '0', that means this setpoint is not enabled. We can use
these info to find out the lowest drate setpoint for audio & low bus mode.
BuildInfo:
- ATF 59fe78cfe7
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
During system counter frequency change, the counter will stop, it
takes several mS even up to 20mS to finish the frequency change, if
system enters STOP mode before the frequency change done, system
counter will NOT run during STOP mode, then it will case system time
inaccurate and sometimes cause below RCU stall, so system can ONLY
enter STOP mode after the system counter frequency change done by
checking the ACK of frequency change.
rtc_testapp_6 0 TINFO : Waiting 50 seconds for alarm.......
fec 30be0000.ethernet eth0: Link is Down
PM: suspend devices took 0.670 seconds
Disabling non-boot CPUs ...
Enabling non-boot CPUs ...
rcu: INFO: rcu_sched self-detected stall on CPU
rcu: 0-...!: (1 ticks this GP) idle=1f6/1/0x40000002 softirq=5240/5240 fqs=0
(t=4903 jiffies g=3737 q=4)
rcu: rcu_sched kthread starved for 4903 jiffies! g3737 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->0
rcu: RCU grace-period kthread stack dump:
rcu_sched I 0 10 2 0x00000000
[<c0d85a9c>] (__schedule) from [<c0d85e64>] (schedule+0x50/0xc4)
[<c0d85e64>] (schedule) from [<c0d8b8fc>] (schedule_timeout+0x1b8/0x37c)
[<c0d8b8fc>] (schedule_timeout) from [<c01b9f2c>] (rcu_gp_kthread+0x8cc/0x1678)
[<c01b9f2c>] (rcu_gp_kthread) from [<c015f12c>] (kthread+0x114/0x14c)
[<c015f12c>] (kthread) from [<c01010b4>] (ret_from_fork+0x14/0x20)
Exception stack(0xd80fdfb0 to 0xd80fdff8)
dfa0: 00000000 00000000 00000000 00000000
dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
dfe0: 00000000 00000000 00000000 00000000 00000013 00000000
NMI backtrace for cpu 0
CPU: 0 PID: 834 Comm: rtc_testapp_6 Not tainted 5.4.0-rc7-03214-g56a9ca3 #105
Hardware name: Freescale i.MX7 Dual (Device Tree)
[<c01126e4>] (unwind_backtrace) from [<c010cf3c>] (show_stack+0x10/0x14)
[<c010cf3c>] (show_stack) from [<c0d691dc>] (dump_stack+0xe4/0x118)
[<c0d691dc>] (dump_stack) from [<c0d70678>] (nmi_cpu_backtrace+0xac/0xbc)
[<c0d70678>] (nmi_cpu_backtrace) from [<c0d70768>] (nmi_trigger_cpumask_backtrace+0xe0/0x130)
[<c0d70768>] (nmi_trigger_cpumask_backtrace) from [<c01be188>] (rcu_dump_cpu_stacks+0x9c/0xd8)
[<c01be188>] (rcu_dump_cpu_stacks) from [<c01bd254>] (rcu_sched_clock_irq+0x940/0xbec)
[<c01bd254>] (rcu_sched_clock_irq) from [<c01c5758>] (update_process_times+0x2c/0x54)
[<c01c5758>] (update_process_times) from [<c01d9cf0>] (tick_sched_timer+0x5c/0xc0)
[<c01d9cf0>] (tick_sched_timer) from [<c01c6bf8>] (__hrtimer_run_queues+0x140/0x548)
[<c01c6bf8>] (__hrtimer_run_queues) from [<c01c792c>] (hrtimer_interrupt+0x134/0x2bc)
[<c01c792c>] (hrtimer_interrupt) from [<c097eb00>] (arch_timer_handler_phys+0x2c/0x34)
[<c097eb00>] (arch_timer_handler_phys) from [<c01a6b1c>] (handle_percpu_devid_irq+0xd4/0x384)
[<c01a6b1c>] (handle_percpu_devid_irq) from [<c01a072c>] (generic_handle_irq+0x20/0x34)
[<c01a072c>] (generic_handle_irq) from [<c01a0d34>] (__handle_domain_irq+0x64/0xe0)
[<c01a0d34>] (__handle_domain_irq) from [<c0548510>] (gic_handle_irq+0x4c/0xa0)
[<c0548510>] (gic_handle_irq) from [<c0101a70>] (__irq_svc+0x70/0x98)
Exception stack(0xd8cedd00 to 0xd8cedd48)
dd00: 00000001 d88a5d20 00000000 200a0013 00000000 00000000 c1b3f6f0 0000002a
dd20: d8cec000 00000000 c1b3dbf8 c1b3d6f8 c16c82bc d8cedd50 c018fe50 c019dd68
dd40: 200a0013 ffffffff
[<c0101a70>] (__irq_svc) from [<c019dd68>] (console_unlock+0x4e0/0x634)
[<c019dd68>] (console_unlock) from [<c019f6c8>] (vprintk_emit+0xf4/0x2d0)
[<c019f6c8>] (vprintk_emit) from [<c019f8c8>] (vprintk_default+0x24/0x2c)
[<c019f8c8>] (vprintk_default) from [<c019fe9c>] (printk+0x2c/0x54)
[<c019fe9c>] (printk) from [<c013b560>] (enable_nonboot_cpus+0x38/0x2cc)
[<c013b560>] (enable_nonboot_cpus) from [<c019b4d0>] (suspend_devices_and_enter+0x374/0xa44)
[<c019b4d0>] (suspend_devices_and_enter) from [<c019be8c>] (pm_suspend+0x2ec/0x3d0)
[<c019be8c>] (pm_suspend) from [<c019a088>] (state_store+0x68/0xc8)
[<c019a088>] (state_store) from [<c033305c>] (kernfs_fop_write+0xfc/0x1e0)
[<c033305c>] (kernfs_fop_write) from [<c029d278>] (__vfs_write+0x2c/0x1d0)
[<c029d278>] (__vfs_write) from [<c02a0184>] (vfs_write+0xa0/0x180)
[<c02a0184>] (vfs_write) from [<c02a03e0>] (ksys_write+0x5c/0xd8)
[<c02a03e0>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
Exception stack(0xd8cedfa8 to 0xd8cedff0)
dfa0: 00036294 00021590 00000004 bef5cd29 00000007 00000000
dfc0: 00036294 00021590 b6fc0d20 00000004 00000000 00000000 b6fc2fa4 00000000
dfe0: 00000004 bef5c8e8 b6f35d4f b6ec1d16
CPU1 is up
imx6q-pcie 33800000.pcie: Phy link never came up
imx6q-pcie 33800000.pcie: pcie link is down after resume.
mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
PM: resume devices took 0.220 seconds
OOM killer enabled.
Restarting tasks ... done.
PM: suspend exit
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
on i.MX8QM 1.0/1.1,TLB maintenance through DVM messages over ARADDR channel,
some bits (see the following) will be corrupted:
ASID[15:12] VA[48:45] VA[44:41] VA[39:36]
This issue will result in the TLB aintenance across the clusters not working
as expected due to some VA and ASID bits get corrupted
The SW workaround is: use the vmalle1is if VA larger than 36bits or
ASID[15:12] is not zero, otherwise, we use original TLB maintenance path.
Note: To simplify the code, we did not check VA[40] bit specifically
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
SOC revision on older imx8mq is not available in fuses so on anything
other than B1 current code just reports "unknown".
TF-A already handles this by parsing the ROM and exposes the value
through a SMC call. Call this instead of reimplementing the workaround
in the kernel itself.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Tested-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit e814909ddca3067d089a8bd62084aae851387f79)
The GPC power domain driver add GENPD_FLAG_RPM_ALWAYS_ON to
the i.MX6QP's PU power domain flag, that means it is always ON
for runtime PM but can be OFF during suspend, so no need to
explicitly power ON/OFF PU power for i.MX6QP during suspend/resume
to avoid below dump:
Unable to handle kernel NULL pointer dereference at virtual address 00000044
pgd = 20824a30
[00000044] *pgd=4e36d831
Internal error: Oops: 17 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 732 Comm: sh Tainted: G W 5.3.0-rc3-next-20190809-01770-g0a0b3ec-dir3
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
PC is at regmap_update_bits_base+0x10/0x74
LR is at imx6_pm_domain_power_on+0xbc/0x1b4
pc : [<c070887c>] lr : [<c05e18e4>] psr: 600001d3
sp : e9339d68 ip : e9338000 fp : c1a24158
r10: c1308b08 r9 : 00000260 r8 : c1308b08
r7 : c1426120 r6 : c1426120 r5 : c1373580 r4 : 00000000
r3 : 00000001 r2 : 00000001 r1 : 00000260 r0 : 00000000
Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment none
Control: 10c5387d Table: 3949404a DAC: 00000051
Process sh (pid: 732, stack limit = 0x8ba716d6)
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Init ENET RGMII tx clock source, set GPR5[9] to select clock from
internal PLL_enet. And set phy VDDIO to 1.8V that get better signal
quality.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: d7a171fcf5218166f558428610ca8e9cb9f7e830)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
The management data input/output (MDIO) bus where often high-speed,
open-drain operation is required. i.MX7D TO1.0 ENET MDIO pin has no
open drain as IC ticket number: TKT252980, i.MX7D TO1.1 fix the issue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: a747abd5f01d278b91d1b6ee6628e1935cb7b23c)
Conflicts:
arch/arm/mach-imx/mach-imx7d.c
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Enet get MAC address order:
From module parameters or kernel command line -> device tree ->
pfuse -> mac registers set by bootloader -> random mac address.
When there have no "fec.macaddr" parameters set in kernel command
line, enet driver get MAC address from device tree. And then if
the MAC address set in device tree and is valid, enet driver get
MAC address from device tree. Otherwise,enet get MAarch/arm/mach-imx
/mach-imx6q.c address from
pfuse. So, in the condition, update the MAC address (read from pfuse)
to device tree.
Cherry-pick & Merge patches from:
149ac988a25b8d8eb86d05679cbb7b42819ff7a1 &
3269e5c06bdb2f7ab9bd5afa9bbfe46d872197d3
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Add i.MX7ULP suspend/resume support, including standby mode
and mem mode, mapped to VLPS and VLLS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
The imx8m_pm_domain driver is used by i.MX8M SOC family, so enable
the IMX8M_PM_DOMAINS config for ARCH_MXC platform by default.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Because that the mailbox MU driver is used in i.MX RPMSG implementation.
There is a confliction between this MU driver and the mailbox MU driver.
To back-compaible with LPM of iMX6SX, iMX7D and iMX7ULP.
Rename the compatible node of this MU driver.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
The 100MTS low bus mode can be only supported by i.MX8MQ Rev2.1 and
future TO. So necessary check is added to identify the chip revision
when doing busfreq mode switch.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Use soc_device_metch instead of global imx_get_soc_revision
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
This reverts commit 7560cff21b7b92127675d5e955874af2827a9bca.
drivers/soc/imx/busfreq-imx8mq.o: In function `reduce_bus_freq':
/home/b29396/Work/linux/dash-linux-devel/build_v8/../drivers/soc/imx/busfreq-imx8mq.c:193: undefined reference to `imx_get_soc_revision'
/home/b29396/Work/linux/dash-linux-devel/build_v8/../drivers/soc/imx/busfreq-imx8mq.c:120: undefined reference to `imx_get_soc_revision'
drivers/soc/imx/busfreq-imx8mq.o: In function `set_high_bus_freq':
/home/b29396/Work/linux/dash-linux-devel/build_v8/../drivers/soc/imx/busfreq-imx8mq.c:327: undefined reference to `imx_get_soc_revision'
/home/b29396/Work/linux/dash-linux-devel/Makefile:1052: recipe for target 'vmlinux' failed
make[1]: *** [vmlinux] Error 1
upstream kernel did not export imx_get_soc_revision for mx8.
Need find a better way to support for both mx8m and mx8.
The 100MTS low bus mode can be only supported by i.MX8MQ Rev2.1 and
future TO. So necessary check is added to identify the chip revision
when doing busfreq mode switch.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit a906afb17d)
add busfreq support on i.MX8MM. when system is running at low bus or
audio bus mode, the dram & bus clock will be reduced to a lower rate:
NOC: 150MHZ, AXI: 24MHz, AXI 20MHZ, DRAM core clock: 25MHz.
when system is running at high bus mode, all the bus clock and dram
clock will be restore to the highest one.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 4984e653a6)
Currently, on imx8mq evk board, we only support 3200mts and 667mts
frequency setpoints. So the DDR DVFS flow need to be updated accordingly.
The dram pll and dram apb clock rate is changed in ATF when doing frequency,
in kernel side, we need to call the clk API to update the clock rate info
in clock tree.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit a69c3794f5)
A 'return' statement is missed before, So the mutex will be unlocked
twice, in some corner case, one core will unlock the mutex that locked
by anohter core wrongly. Then lead to concurrent access to the DVFS
at the same time.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 659615af4d)
If the system is currently in low bus mode, if the audio device
request the audio bus mode, the NOC, AHB and AXI bus clock rate
will be set wrongly, then bus will run at very low frequency, then
lead to audio playback underrun.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Tested-by: Anson Huang <anson.huang@nxp.com>
(cherry picked from commit 3a2a988cc0)
reduce the NOC, main AXI and AHB bus clock frequency to save power when DDR enter low
frequency mode. VDDSOC is ~195mA during video play, and ~180mA in idle.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit e109b34d30)
If audio device is the only that access to ddr memory, the DDR
frequency can be reduce to 25MHz to save power. when DDR run in
25MHz frequency, the memory bandwidth is about 66MB/s, it can
meet the performance requirement for audio only case.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
(cherry picked from commit 7c2389b6dc)
Add busfreq driver support on i.MX8MQ. The busfreq driver is
mainly used for dynamic DDR frequency change for power saving
feature. When there is no peripheral or DMA device has direct
access to DDR memory, we can lower the DDR frequency to save
power. Currently, we support frequency setpoint for LPDDR4:
(1): 3200mts, the DDRC core clock is sourced from 800MHz
dram_pll, the DDRC apb clock is 200MHz.
(2): 400mts, the DDRC core clock is source from sys1_pll_400m,
the DDRC apb clock is is sourced from sys1_pll_40m.
(3): 100mts, the DDRC core clock is sourced from sys1_pll_100m,
the DDRC apb clock is sourced from sys1_pll_40m.
In our busfreq driver, we have three mode supported:
* high bus mode <-----> 3200mts;
* audio bus mode <-----> 400mts;
* low bus mode <-----> 100mts;
The actual DDR frequency is done in ARM trusted firmware by calling
the SMCC SiP service call.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Use CONFIG_IMX8M_BUSFREQ
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
This is a temporarily workaround cause it breaks MX8MQ and LS platforms
booting.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
When user use squashfs image which has enabled XZ, kenrel need to also enable
this feature, otherwise will encoutner below error when boot:
squashfs: SQUASHFS error: Filesystem uses "xz" compression.. This is not supported
This feature is needed by some standard Ubuntu tools like snap or initramfs.
So enable it in LSDK kernel by default.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
- CONFIG_SND_USB_AUDIO
Support USB audio card when boards are at host mode.
- CONFIG_USB_EHSET_TEST_FIXTURE
Triggering Embedded Host entering test mode for USB-IF electrical test.
- CONFIG_USB_TEST
Support USB host stress test in raw data mode
Cc: Jun Li <jun.li@nxp.com>
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This reverts commit 8bf5ea8506c2185dba919d7876987e24b193ca9c.
There is no ARCH_FSL_IMX8MQ in upstream, this was ported by mistake for
VPU. VPU dependency was already fixed.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Enable the following:
-CAAM SNVS and SM drivers
-generic SW crypto algorithms - needed for tcrypt speed tests
-CRYPTO_USER - needed for configuring crypto algorithms
from user space (using tools like crconf)
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
The two configs are needed when enabling jailhouse hypervisor for
inter-cell communication.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
There are many non-NXP modules which are endabled in defconfig by default.
Actually we can remove these unused modules in kernel lsdk.config for LSDK to
reduce the size of lib/modules.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
The upstream kernel created this option to disable the bypass by
default. But our MC driver cannot work with bypass disabled. While we
are investigating the issue, disable the new option temporarily for the
DPAA2 platforms to boot. As this is not aligned with the upstream
strategy, the change is temporary and should be removed once the MC
problem is addressed.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This patch enables Audio related options.
CONFIG_SND_SOC_FSL_SAI is implied by CONFIG_SND_SOC_IMX_* drivers.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Current ramdiskrfs is causing error of 'No space left on device' when
merging kernel module into the ramdisk. Need change CONFIG_BLK_DEV_RAM_SIZE
to 524288 to fix this issue
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
As per patch "arm64: defconfig: Enables Display support on LS1028A"
, already added option CONFIG_DRM as default. this definition will
override default options set by defconfig.
Otherwise 64-bit ARM builds fail with undefined references to DRM.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Since Linux v4.19 the new kernel configure option has been added to
enable the IOMMU passthrough by default. We have been enabling the
passthrough for LSDK in kernel parameter. Enabling this in kernel
configure will make kernel parameter optional.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Enables various network related options:
CONFIG_FSL_DPAA2_ETH=y
CONFIG_FSL_DPAA2_MAC=y
CONFIG_FSL_SDK_DPA=y
CONFIG_FSL_SDK_FMAN=y
CONFIG_FSL_SDK_DPAA_ETH=y
CONFIG_VITESSE_PHY=y
CONFIG_REALTEK_PHY=y
CONFIG_AQUANTIA_PHY=y
CONFIG_FSL_XGMAC_MDIO=y
CONFIG_VFIO_FSL_MC=y
CONFIG_NET_SWITCHDEV=y
CONFIG_FSL_DPAA2_ETHSW=y
CONFIG_FSL_PPFE=y
CONFIG_FSL_PPFE_UTIL_DISABLED=y
and other drivers:
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_PCF2127=y
CONFIG_SND_SOC_FSL_SAI=y
CONFIG_CRYPTO_DEV_FSL_CAAM=y
CONFIG_SPI_FSL_DSPI=y
CONFIG_SPI_FSL_QUADSPI=y
CONFIG_E1000=y
There are options implied by new options:
CONFIG_MDIO_BUS_MUX_MMIOREG by CONFIG_FSL_DPAA2_MAC=y
CONFIG_CLK_QORIQ by CONFIG_QORIQ_CPUFREQ=y
CONFIG_VLAN_8021Q=m by CONFIG_FSL_DPAA2_EVB drivers/staging/fsl-dpaa2/evb/Kconfig
CONFIG_MEMORY by CONFIG_MTD_NAND_FSL_IFC drivers/mtd/nand/raw/Kconfig
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Enable CONFIG_CRYPTO_USER to allow for configuring crypto algorithms
from user space, for e.g. changing their priorities.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
As per patch "driver: mtd: update struct map_info's swap as per
map requirement" swap filed of struct mtd_info is automatically
configured as per device characteristics defined in device tree.
No need to CONFIG_MTD_CFI_BE_BYTE_SWAP as default.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Enable Bluetooth stack, driver and HCI interface config for
Bluetooth support.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Leonard: make savedefconfig clean ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
For mfgtool (UUU) requirement, it needs to build in IPv6 for nfs
rootfs mount.
Reviewed-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Leonard: make savedefconfig clean ]
[ Leonard: drop adding xfrm modules, upstream removed symbols ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
- disable marvell community wifi driver that is conflict
with marvell wifi module driver released from marvell.
- build in cfg80211 and cfg80211 wireless extensions.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Leonard: make savedefconfig clean ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Let mxc-jpeg build as module, as it is by default in
drivers/media/platform/imx8/Kconfig
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
tcrypt module is required for testing crypto algorithms.
Note: CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is let to default value ("y"),
since setting it to "n" would slow down boot, i.e. have a system-level
effect.
For tcrypt testing CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=n is needed,
which will have to be done using a separate kernel config.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Add drivers for MXSFB, NWL-DSI, MIXEL_DPHY and RAYDIUM_RM67191 as
built-in.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
[ Leonard: make savedefconfig clean ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable SNVS/SC key driver for i.mx8 family.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 017ad346c16771f62905745550511ce951e9eea8)
Enable the Raydium RM67171 drm panel driver as built-in in defconfig.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
[ Leonard: make savedefconfig clean ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Add sensors' CONFIG stings for imx6/7/8.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
[ Leonard: make savedefconfig clean ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Make the ADV7511 drm bridge driver as built-in, so the path MIPI-DSI to
ADV7535 will be available by default.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable CONFIG_IMX8MM_THERMAL by default to support i.MX8MM
thermal driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Leonard: make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable the 'IMX_LCDIF_CORE' config by default in ARM64
defconfig.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
[ Leonard: make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable QuadSPI function in defconfig.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
[Leonard: Make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Make i.MX RTC, thermal and watchdog modules build-in by default.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Leonard: Make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Use ondemand as default cpufreq governor to save power.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[Leonard: Make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable OV5640 camera sensor driver
Enable Image subsystem driver for imx8, it includes ISI, MIPI CSI
and virtual camera device which used to manage all modules driver
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: fix upgrade conflict ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
[ Leonard: Make savedefconfig clean ]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable LPSPI, SPIDEV and slave mode support for ARM64.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
[ Leonard: make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
- Enable imx8mq PHY driver
- Enable usb gadget via configfs
- Enable legacy gadget drivers as module
- Enable typec related configs.
Signed-off-by: Li Jun <jun.li@nxp.com>
[ Aisheng: fix conflicts due to TYPEC already enabled as m ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
[ Leonard: Make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
This patch enables CONFIG_IMX_SC_THERMAL as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[Leonard: make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Set the imx FlexCAN block as build-in.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
[Leonard: Make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Set the imx pcie, lpi2c and nvme blk as built-in.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
[Leonard: Make savedefconfig clean]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
IMX bluetooth support interface is HCI UART. Remove HCI SDIO
interface since there have HIF conflict for cypress bluetooth.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Enable the following:
-CAAM SNVS and SM drivers
-generic SW crypto algorithms - needed for tcrypt speed tests
-CRYPTO_USER - needed for configuring crypto algorithms
from user space (using tools like crconf)
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
This is needed for VPU/MM/GPU features.
Generated by savedefconfig.
NOTE: the exist CONFIG_CMA_SIZE_MBYTES=320 option actually did not work
before due to missing CONFIG_DMA_CMA, removed it first.
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
There are many non-NXP modules which are endabled in defconfig by
default. Actually we can remove these unused modules in kernel
lsdk.config for LSDK to reduce the size of lib/modules.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Move crypto options from ARMv8-specific config fragment to lsdk.config
(which is used both by ARMv7 and ARMv8) - since they are needed for both
SoCs.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Enables the CONFIG_ARM_MODULES_PLTS by default for LSDK to allow modules
to be allocated in the vmalloc area.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Enable CONFIG_MTD_CFI_AMDSTD to support CFI command set 0002.
Enable CONFIG_MTD_PHYSMAP_OF which allows the NOR flash driver code to
communicate with chips which are mapped physically into the CPU's memory.
[ Leo: CONFIG_MTD_PHYSMAP_OF implied ]
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
This patch enables more drivers for LS1021A, such as FlexCAN, IFC, SATA,
PCIE, DCU, RTC, CAAM and Virtualization.
[leo: FlexCAN and DCU were enabled as 'm' in upstream.]
Signed-off-by: Alison Wang <alison.wang@nxp.com>
This patch is to add multi_v8.config for AArch32 support on ARMv8
platforms.
The default config for ARMv8 AArch32 support is multi_v7_defconfig +
multi_v7_lpae.config + multi_v8.config.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
tcrypt module is required for testing crypto algorithms.
Note: CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is let to default value ("y"),
since setting it to "n" would slow down boot, i.e. have a system-level
effect.
For tcrypt testing CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=n is needed,
which will have to be done using a separate kernel config.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
add v4l2 capture support for imx6qdl, including IPU CSI/PrP, V4L2 capture and the
camera ov5640 (mipi and parallel) drivers.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Correct the typo for CONFIG_LLC2.
Fixes: ec4753a4c99a("MLK-22558 imx_v6_v7_defconfig: enable the necessary net configs")
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
No need for this config define, remove it.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
[ Aisheng : split arm64 changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch sets CONFIG_MXC_IPU and CONFIG_MXC_IPU_PRE to y so that we
can build in IPUv3 common driver and IPUv3 prefetch drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
For now we'll use our internal IPUv3 common driver, so this patch
disables CONFIG_IMX_IPUV3_CORE from upstream kernel.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[Leonard: Remove unrelated changes]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Enable 'FB_MXC_TRULY_WVGA_SYNC_PANEL' config by default
for imx6 and imx7 series which support the TRULY HX8369
mipi panel.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable 'FB_MXC_MIPI_DSI' config by default for imx6 and imx7
series which include the NXP MIPI DSI controller.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable 'FB_MXC_MIPI_DSI_SAMSUNG' config by default for
imx6 and imx7 series which include the Samsung MIPI DSI
controller.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable 'FB_MXC_RK_PANEL_RK055IQH042' config by default for
imx6 and imx7 series which support the RM68191 mipi panel.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable 'FB_MXC_RK_PANEL_RK055AHD042' config by default for imx6 and imx7
series which support the RM68200 mipi panel.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable 'FB_MXC_TRULY_PANEL_TFT3P5581E' config by default for imx6 and
imx7 series which support the TRULY TFT3P5581E mipi panel.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Enable 'FB_MXC_MIPI_DSI_NORTHWEST' config by default for imx6 and imx7
series which includes the Northwest Logic MIPI DSI controller.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This reverts commit aaeabc18a0.
Since, on legacy i.MX6 and i.MX7 series, only framebuffer driver
can be supported.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Select CONFIG_THERMAL by default, it is removed by commit
6b77284c4e ("ARM: imx_v6_v7_defconfig: Re-sync defconfig")
which is unexpected.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Cycling through "make savedefconfig" ensures that following patches
don't include diffs caused by changes in Kconfig defaults.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
In the last stage of deep sleep, software will trigger a Finite
State Machine (FSM) to control the hardware procedure, such a
board isolation, killing PLLs, removing power, and so on.
When the system is waked up by an interrupt, the FSM controls
the hardware to complete the early resume procedure.
This patch configure the EPU FSM preparing for deep sleep.
Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
The NXP's QorIQ processors based on ARM Core have RCPM module
(Run Control and Power Management), which performs system level
tasks associated with power management such as wakeup source control.
Note that this driver will not support PowerPC based QorIQ processors,
and it depends on PM wakeup source framework which provide collect
wake information.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
By default, QorIQ SoC's RCPM register block is Big Endian. But
there are some exceptions, such as LS1088A and LS2088A, are
Little Endian. So add this optional property to help identify
them.
Actually LS2021A and other Layerscapes won't totally follow Chassis
2.1, so separate them from powerpc SoC.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
wu_num needs to be int type, u32 is not correct.
When "wakeup-irq" not included, of_property_count_u32_elems
will return a negative value. So use int.
And directly return when "wakeup-irq" not exists.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN has different speed grade definition compared to
i.MX8MQ/i.MX8MM, when fuses are NOT written, the default
speed_grade should be set to minimum available OPP defined
in DT which is 1.2GHz, the corresponding speed_grade value
should be 0xb.
Fixes: 5b8010ba70 ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
On i.MX8 QM and QXP, caam crypto accelerator has 4 job rings,
however only the last two (JR2 and JR3) are accesible from the kernel.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Now that i.MX6QP does NOT need to handle PU power manually during
suspend/resume, remove those unused APIs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Get the old_freq from the policy->cur. So we can
get the correct frequency when low power run mode
is enabled.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
part2 of commit(b4568bee5d).
The function calibration_voltage is calling max11801_read_adc from
touchscreen driverm which can return negative values in case of an
error. I case of an error, just stop reading ADC data and return 0 as
voltage_data.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
cherry-pick below patch:
ENGR00288351 sabresd_battery: fix usb charger detect when resume back on
mx6sl
Fix below redundant log after first resume back on mx6slevk:
max8903-charger max8903.12: USB Charger Connected
It's caused by not add enough prepare for uok&dok which are connected,
such as i.MX6SL-EVK. In this case the board only support DC charger detect,
so we didn't need judge the uok pin for USB charger detect, although uok
share with dok pin.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit c5ba4940a72e8124db7ef91a67b337df4e45e3b0)
(cherry picked from commit bcd7f8e5e1)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 52692baf47)
cherry-pick below patch:
ENGR00277663-3 power: sabresd_battery: remove check charger offset on
mx6slevk
No need check the charger offset on mx6slevk, since there is no adc
converter
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 7683c62cf2290629f09983744d5a3987a4d64669)
(cherry picked from commit 5f29715585)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit c00d547719)
Change power domain init level to subsys_initcall to ensure it's probed
before most devices to avoid unneccesary defer probe.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The i.MX8M family is a set of NXP product focus on delivering
the latest and greatest video and audio experience combining
state-of-the-art media-specific features with high-performance
processing while optimized for lowest power consumption.
i.MX8MQ, i.MX8MM, i.MX8MN, even the furture i.MX8MP are all
belong to this family. A GPC module is used to manage all the
PU power domain on/off. But the situation is that the number of
power domains & the power up sequence has significate difference
on those SoCs. Even on the same SoC. The power up sequence still
has big difference. It makes us hard to reuse the GPCv2 driver to
cover the whole i.MX8M family. Each time a new SoC is supported in
the mainline kernel, we need to modify the GPCv2 driver to support
it. We need to add or modify hundred lines of code in worst case.
It is a bad practice for the driver maintainability.
This driver add a more generic power domain driver that the actual
power on/off is done by TF-A code. the abstraction give us the
possibility that using one driver to cover the whole i.MX8M family
in kernel side.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
To support different wakeup source, Linux kernel needs to call
SCU firmware to assign different wakeup controllers, for those
SCU resources like RTC alarm, ON/OFF button, MU etc., it should
use SCU wakeup controller, for other peripheral resources like
LPUART, CAN, etc., it should use IRQSTERR wakeup controller.
To support this feasure, all devices supporting wakeup should
add its hwirq number to pd node's wakeup-irq property. Below
is the example of adding LPUART0~3 as wakeup source, SCU PD
driver will determine whether IRQSTEER or SCU should be selected
as wakeup controller, this is done by reading GIC distributor's
register and wakeup-irq array to check whether a wakeup source
is enabled in GIC in order to support wakeup.
pd: imx8qx-pd {
compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
wakeup-irq = <345 346 347 348>;
};
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
For a domain has no working devices anymore, let's choose the deepest state
to enter to save power. e.g. driver probe failure.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Currently the generic power domain will power off the domain if all
devices in it have been stopped during system suspend.
It is done by checking if the domain is active in genpd_sync_power_off,
then disable it. However, for power domains supporting multiple low power
states, it may have already entered an intermediate low power state by
runtime PM before system suspend and the status is already
GPD_STATE_POWER_OFF which results in then the power domain stay at an
intermediate low power state during system suspend.
Then genpd_sync_power_off will keep it at the low power state instead
of completely gate off it.
Let's give the power domain a chance to switch to the deepest state in
case it's already off but in an intermediate low power state.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Move the Subdomain check into _genpd_power_off, then the caller does
not have to check it each time. This also ensures a double check
of &genpd->sd_count before really power off domain in case it's
increased asychronously by subdomains. This is the same behavior
as the original genpd_power_off() does.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
For some i.MX platforms such as i.MX6SX, PLL1 is used as temporary
clock during low power idle mode enter/exit, it MUST be enabled, but
can be switch to its default bypass clock source OSC. This patch
adds support for such scenario, when PLL1 is NOT used, bypass it and
keep it enabled.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Export PU power ON/OFF APIs for suspend/resume usage, some i.MX
platforms need to control PU power status during suspend/resume.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add bus-freq request for high cpu-freq set-point and release
the request when cpu is running at lowest set-point.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add SCU power domains for image subsystem. The subsystem include
ISI, CSI, PARALLEL, I2C, PWM and DPLL modules
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Only moving device pm to tail for defer probe is not enough because
the device driver may be probed out of order without defer probe
due to different driver init levels.
Let's move the device pm to tail in the driver bound to ensure
the device pm sequence is exactly the same as its probe sequence.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Some user might want to go through all registered wakeup sources
and doing things accordingly. For example, SoC PM driver might need to
do HW programming to prevent powering down specific IP which wakeup
source depending on. So add this API to help walk through all registered
wakeup source objects on that list and return them one by one.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Tested-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Add the layerscape PCIE GEN4 EP device support in pci_endpoint_test driver.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This PCIe controller is based on the Mobiveil GPEX IP, it work in EP
mode if select this config opteration.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
[Zhiqiang: Correct the Copyright]
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add the documentation for the Device Tree binding of the layerscape
PCIe GEN4 controller with EP mode.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add the EP driver support for Mobiveil base on endpoint framework.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
[Zhiqiang: Correct the Copyright]
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
When LX2 PCIe controller is sending multiple split completions and
ACK latency expires indicating that ACK should be send at priority.
But because of large number of split completions and FC update DLLP,
the controller does not give priority to ACK transmission. This
results into ACK latency timer timeout error at the link partner and
the pending TLPs are replayed by the link partner again.
Workaround:
1. Reduce the ACK latency timeout value to a very small value.
2. Restrict the number of completions from the LX2 PCIe controller
to 1, by changing the Max Read Request Size (MRRS) of link partner
to the same value as Max Packet size (MPS).
This patch implemented part 1, the part 2 can be set by kernel parameter
'pci=pcie_bus_perf'
This ERRATA is only for LX2160A Rev1.0, and it will be fixed
in Rev2.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
PCIe configuration access to non-existent function triggered
SERROR interrupt exception.
Workaround:
Disable error reporting on AXI bus during the Vendor ID read
transactions in enumeration.
This ERRATA is only for LX2160A Rev1.0, and it will be fixed
in Rev2.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This PCIe controller is based on the Mobiveil GPEX IP, which is
compatible with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Make the mobiveil_host_init() function can be used to re-init
host controller's PAB and GPEX CSR register block, as NXP
integrated Mobiveil IP has to reset and then re-init the PAB
and GPEX CSR registers upon hot-reset.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Refactor the Mobiveil PCIe Host Bridge IP driver to make
it easier to add support for both RC and EP mode driver.
This patch moved the Mobiveil driver to an new directory
'drivers/pci/controller/mobiveil' and refactor it according
to the RC and EP abstraction.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
maybe there is interrupt line for aer pme etc. Search the interrupt
number in the fdt file. Then fixup the dev->irq with it.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The controller may be powered off (Link is in L3) during the suspend
mode. The MSI_ADDR would be missed after resume and MSI function
would be failed.
Re-store MSI_ADDR to fix the MSI failure after PM operations.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This patch is not proper for 5.4 kernel, revert it by this commit.
This reverts commit 8b76ca7ff3f7bb26223e5aa111d3bef987e62a4e.
Signed-off-by: richard zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Add the epdev_on regulator to power up the WiFi module
on the iMX8QM board.
This regulator needs to be powered up before the pcie
link, in order for the WiFi module to work.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
rebase on v4.19
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Since "dis_gpio" GPIO pin is used as M.2 KeyE interface PIN56
for power control of EP device, it should do reset for EP device
for partition reset case.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
- move "program correct class for RC" from dw_pcie_host_init()
to dw_pcie_setup_rc(). since this is RC setup, it's
better to contained in dw_pcie_setup_rc function.
Then, RC can be re-setup really by dw_pcie_setup_rc().
- add one store/re-store msi cfg functions. Because that
pcie controller maybe powered off during system suspend,
and the msi data configuration would be lost.
these functions can be used to store/restore the msi data
and msi_enable during the suspend/resume callback.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
Vipul: rebased on v4.19
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
commit 830920e065e9("PCI: dwc: Use interrupt masking instead
of disabling") break i.MX platform PCIe suspend/resume when
MSI enabled.
Revert the commit to keep orinigal method that using interrupt
disabling instead of masking.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Setup PCI its own HSIO regmap to fix the kernel dump, when the HSIO
regmap is set as system syscon.
/sys/kernel/debug/regmap# cat dummy-hsio@5f080000/register
NOTE: devm_ioremap is used to get the virtual address, because that the
devm_ioremap_resource would return -EBUSY when there is a resource
overlap between different HSIO consumers.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
The MSI Enable bit controls delivery of MSI interrupts from components
below the Root Port.
This bit would be lost during the suspend, should be re-configured
during resume.
Remove one line redundant debug code.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Set the according disable signal to high when enable the pcie port if
there is the disable signal in the hardware design.(e.x the second
port of imx8mq evk board).
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
i.MX8x with MSI enable suspend/resume doesn't work for
marvell 88w9098 and 88w8997 wlan chips, disable the feature
before the issue fixed.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add quirk for cyw4356 to disable D3 mode because current firmware
still doesn't support D3 mode.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
(cherry picked from commit 22212c60d7fb067e28a2fed16914515e3d6d3950)
MSI is broken on CYW4356/4359 chips. This causes CYW4356 1CX not
work on i.MX8x platforms with bandwidth test. It is known issue
that i.MX8x PCIe host driver MSI interrupt lost.
Disable MSI completely for this chipset to let wifi can stable work
until PCIe RC driver fix the issue.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit d99766187f)
On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
When chip support the aer/pme interrupts with none MSI/MSI-X/INTx mode,
maybe there is interrupt line for aer pme etc. Search the interrupt
number in the fdt file. Then fixup the dev->irq with it.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The SCU message data field received from SCU side is 32 bit width,
while the message defined in imx_sc_pwrkey driver is 8 bit width,
it will cause stack corruption when SCU writes the response data,
with CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG enabled, kernel stack
protection will have panic. Correct the data field width to 32 bit
to avoid this issue.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
On the imx8 MIPI DSI oled board, MIPI panel and touch share one RST
pin. when suspend the whole system, touch will suspend first, it
disable touch irq, and let touch work in sleep mode. Then MIPI panel
suspend, it will give a reset signal on the RST pin. Due to this reset
signal, touch will trigger two interrupt on GPIO1_9. Because touch
suspend code already disable touch irq, so these two new touch interrupt
will be pending there, and pending there in GPIO forever.
When system resume, GPIO will restore registers in runtime resume before
synaptics_dsx_i2c touch driver resume, so the GPIO1_9 IRQ will be unmasked
and since its IRQ is pending there so IRQ keeps coming without touch
driver to handle it, since it is NOT resume yet, make the system can't
resueme back normally.
Due to this is the hardware limitation which cause this issue, I format this
patch to workaround this issue.
This patch free touch irq in the touch driver suspend procedure, rather than
just disable the touch irq.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit a157605b47e2c3800d706b3ca0af24e26c92c187)
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
On imx8mscale-evk baord, if I2C bus is configed pull-up, then once send
the i2c command to clear touch interrupt during the touch initialization,
touch will keep SDA line in low level, block the i2c bus. If config the
I2C bus pull-down, then this issue gone. Due to it is not reasonable to
set the I2c bus to pull-down for other i2c slave device, this patch work
as a workaround, just remove this i2c command, do not clear the touch
interrupt, test that touch can also work well after the initialization.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Upstream dropped the call to i2c_set_client_data as "unneeded" in commit
8300445cc7 ("Input: touchscreen - drop calls to platform_set_drvdata and i2c_set_clientdata")
The client_data pointer is used on suspend/resume by downstream commit
76a621ae711b ("MLK-17779 input: egalax_ts: free irq resource before request the line as GPIO")
This causes suspend/resume to crash (and apparently hang) on
imx6qdl-sabresd with LVDS display connected. Fix by adding back the
i2c_set_clientdata call.
Fixes: 76a621ae711b ("MLK-17779 input: egalax_ts: free irq resource before request the line as GPIO")
This could be squashed into MLK-17779
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
For HannStar (HSD100PXN1 Rev: 1-A00C11 F/W:0634) LVDS touch screen,
it has a special request for the EETI touch controller. The host
needs to trigger I2C event to device FW at booting first, and then
the FW can switch to I2C interface. Otherwise, the FW can’t work
with I2C interface, and can't generate any interrupt when touch
the screen.
This patch send an I2C command before the device wake up, make sure
the device switch to I2C interface first.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add the support for a CT36X based touchscreens using
the CT36X controller and i2c touchscreen interface.
Signed-off-by: Alejandro Lozano <alejandro.lozano@nxp.com>
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
Signed-off-by: Alejandro Sierra <alejandro.sierra@nxp.com>
(Vipul: Fixed merge conflicts)
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
For the touch pressure_max, if dts has no property "ti,pressure-max"
or this property is config to value 0, then default use 65535 as
the max pressure value. otherwise, in the latest xwayland rootfs,
will meet the following issue:
[21:44:34.302] input device 'ADS7846 Touchscreen', /dev/input/event3 is tagged by udev as: Touchscreen
[21:44:34.302] kernel bug: Device 'ADS7846 Touchscreen' has min == max on ABS_PRESSURE
[21:44:34.302] input device 'ADS7846 Touchscreen', /dev/input/event3 was rejected.
[21:44:34.302] failed to create input device '/dev/input/event3'
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 0bb15e676cb74739291c9054411a28cad4e36f34)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
We need add DCM mode/AUX mode for ADC converter function of max11801, so
that it can be used to read voltage of battery. Meanwhile, let the driver
based on device tree. The patchset is based on below patch (V3.5.7):
commit 4001774cf51f0140ae7e4e8e0ec1d86475790682
Author: Rong Dian <b38775@freescale.com>
Date: Fri Jan 18 14:24:28 2013 +0800
Engr00240284-1 MAX11801: Add DCM aux adc sample function
1.Add direct conversion mode operations
2.Add aux adc sample function
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add ethernet clocks and dependencies (sys_pll, arm_pll)
Based on ALB v4.19.31_bsp23.0_rc2
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add DT bindings documentation for the upcoming S32V234 clk driver. Add
s32v234-clock.h header, which is referred in MC_CGM documentation.
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Add configuration option for the NXP S32 platform family in
Kconfig.platforms. For starters, the only SoC supported will be Treerunner
(S32V234), with a single execution target: the S32V234-EVB (rev 29288)
board.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
(cherry picked from commit 3d4e0158c1)
There should be a sentinel of ulp_div_table, otherwise _get_table_div
may access data out of the array.
Fixes: b1260067ac ("clk: imx: add imx7ulp clk driver")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Check if M4 is enabled to make sure the root
clocks used by M4 are on by default.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Display sub-system has special clock settings in SCFW, the
bypassed clock is used instead of PLL in Linux kernel clock
tree, so when saving clock rate, need to save non-cached clock
rate for Display sub-system's bypass clocks, and other clocks
still use the cached clock rate which is with runtime PM ON.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Tested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
On i.MX8QM, HDMI LPCG clocks operation needs SCU clock "hdmi_ipg_clk"
to be ON, while during noirq suspend phase, "hdmi_ipg_clk" is disabled
by HDMI IRQ STEER driver, so SError will be triggered.
Skip all HDMI LPCG clocks save/restore to avoid this SError during
system suspend/resume, it will NOT introduce additional power consumption
as their parent clock is disabled when suspend.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
The 'nand_usdhc_bus' clock is only need to be enabled when usdhc
or nand module is active, so change it to non-critical clock type.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Add A72 clock to support cpufreq on A72 cluster, and adding
cpufreq governor switch for i.MX8QM which has 2 clusters,
in the late phase of kernel boot up, cpufreq governor will
be switched to shedutil which is much more suitable for
multi-clusters SoCs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
When we need to support dual linux with jailhouse, there is no clock
controller in 2nd inmate linux cell, it relys on the first linux to
configure the clock ready and on. So we add those clocks required for
the 2nd linux in dts to make them prepare enabled, and pass
clk_ignore_unused to the 1st linux, then the 1st linux will not gated
off the clocks. So the 2nd linux could use IPs without touching clocks.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If the M4/M7 core is enabled, just skip registering the gate ops
to make sure the ROOT clock is always enabled for M core to simplify
the clock management due to the lack of domain control for the root
clock slice gate.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
(cherry picked from commit 0853b1d611)
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Audio PLL is a frac pll, the config for this PLL should follow
below limitation:
Fout = ((m + k / 65536) * FIN) / (p * 2^s),
Fvco = ((m + k / 65536) * FIN) / p
Fref = FIN / p
a). 6MHz <= Fref <= 25MHz;
b). 1 <= p <= 63;
c). 64 <= m <= 1023;
d). 0 <= s <= 6;
e). -32768 <= k <= 32767;
due to the frac part calculation deviation, frac pll 'recalc_rate'
is updated to look up the pll rate from table first.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Remove the earlycon uart clocks that are hard cord in platforms
clock driver, instead of parsing the earlycon uart port from dt
and enable these clocks from clock property in dt node.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
This patch forwards some IPUv3 and LDB clock changes from imx_4.19.y kernel,
as needed to enable internal IPUv3 fb and LVDS displays.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The mipi pll clock comes from the MIPI PHY PLL output, so
it should not be a fixed clock.
MIPI PHY PLL is in the MIPI DSI space, and it is used as
the bit clock for transfering the pixel data out and its
output clock is configured according to the display mode.
So it should be used only for MIPI DSI and not be exported
out for other usages.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
SCU clock state may be changed transparently to users due to PD state
changes. We need use CLK_SET_PARENT_NOCACHE to ensure the parent setting
can be programed into HW in case an invalid parent cache.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Implement a CLK_SET_PARENT_NOCACHE flag in clk core for imx8 clk
implementation where the parent needs to be restore after PM domain is
up.
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
(cherry picked from commit 87e997822c)
[Leonard: split clk core part]
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
The gpt0 is assigned to ATF previously due to LPCG, context
save/restore etc. for cpu-idle feature, remove gpt0_clk to
avoid below warning during kernel boot up, if gpt0 is going
to be used in future, need to remove corresponding operations
in ATF and add it back in kernel.
[ 0.291286] gpt0: failed to power up resource 207 ret -13
[ 0.291355] imx-scu-clk: probe of gpt0_clk failed with error -5
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
ACM depends on SCU PD, change its init level later than SCU PD
but to fs_initcall to ensure it's probed before LPCG clocks to
avoid unneccesary massive defer probe.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Change scu clk init level to subsys_initcall_sync to ensure it's
probed before most devices to avoid unneccesary defer probe.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
imx_register_uart_clocks() only support once call during platform
clocks register. So use one gobal pcc_uart_clks[] array instead of
two array.
Fixes: 041652514d8b(clk: imx7ulp: Make sure earlycon's clock is enabled)
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
clk-imx8qxp is a common SCU clock driver used by both QM and QXP
platforms. The clock numbers vary a bit between those two platforms.
This patch introduces a mechanism to only register the valid clocks
for one platform by checking the clk resource id table.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The ENET RMII 50M SCU Ref clock was wrongly put in LPCG clock ID
definition which may overwrite the SCU clock IDs.
Fix it by move it into the correct place.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
LPCG clock state may be lost when it's power domain is completely
off during system suspend/resume and we need save and restore the
state properly.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch implements the new two cells binding for SCU clocks.
The usage is as follows:
clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>
Due to each SCU clock is associated with a power domain, without power
on the domain, the SCU clock can't work. So we create platform devices
for each domain clock respectively and manually attach the required domain
before register the clock devices, then we can register clocks in the
clock platform driver accordingly.
Note because we do not have power domain info in device tree and the SCU
resource ID is the same for power domain and clock, so we use resource ID
to find power domains.
Later, we will also use this clock platform driver to support suspend/resume
and runtime pm.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MX8QM and MX8QXP LPCG Clocks are mostly the same except they may reside
in different subsystems across CPUs and also vary a bit on the availability.
Same as SCU clock, we want to move the clock definition into device tree
which can fully decouple the dependency of Clock ID definition from device
tree and make us be able to write a fully generic lpcg clock driver.
And we can also use the existence of clock nodes in device tree to address
the device and clock availability differences across different SoCs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
There's a few limitations on the original one cell clock binding
(#clock-cells = <1>) that we have to define some SW clock IDs for device
tree to reference. This may cause troubles if we want to use common
clock IDs for multi platforms support when the clock of those platforms
are mostly the same.
e.g. Current clock IDs name are defined with SS prefix.
However the device may reside in different SS across CPUs, that means the
SS prefix may not valid anymore for a new SoC. Furthermore, the device
availability of those clocks may also vary a bit.
For such situation, we want to eliminate the using of SW Clock IDs and
change to use a more close to HW one instead.
For SCU clocks usage, only two params required: Resource id + Clock Type.
Both parameters are platform independent. So we could use two cells binding
to pass those parameters,
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The UART clock used by M4 maybe turned off by Linux side, after the
initialization of the clocks. Enable the UART2 clock when M4 is enabled.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
On i.MX8QM/QXP platforms, some clocks tree use GPR to set clock
gate, add scu clock gate driver support.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
We met below build warnings:
WARNING: vmlinux.o(.text+0x52ea80): Section mismatch in reference from the function imx_register_uart_clocks() to the variable .init.data:earlycon_bits
The function imx_register_uart_clocks() references
the variable __initdata earlycon_bits.
This is often because imx_register_uart_clocks lacks a __initdata
annotation or the annotation of earlycon_bits is wrong.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
i.MX8QM/QXP platforms some clocks tree use GPR to set clock
divider value, or select the clock source.
So add scu divider and mux clock driver support.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
../drivers/clk/imx/clk-composite-7ulp.c: In function ‘imx7ulp_clk_composite’:
../drivers/clk/imx/clk-composite-7ulp.c:83:3: error: implicit declaration of function ‘readl_relaxed’ [-Werror=implicit-function-declaration]
val = readl_relaxed(reg);
^
../drivers/clk/imx/clk-composite-7ulp.c:85:3: error: implicit declaration of function ‘writel_relaxed’ [-Werror=implicit-function-declaration]
writel_relaxed(val, reg);
^
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Only enable clocks for earlycon or earlyprintk uart port.
For communication uart port, clock enable will break clock
paraent and rate switch by commit 9461f7b33d (clk: fix
CLK_SET_RATE_GATE with clock rate protection)
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Aisheng: update to CLK HW APIs ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
i.MX7ULP peripheral clock ONLY allow parent/rate to be changed
with clock gated, however, during clock tree initialization, the
peripheral clock could be enabled by bootloader, but the prepare
count in clock tree is still zero, so clock core driver will allow
parent/rate changed even with CLK_SET_RATE_GATE/CLK_SET_PARENT_GATE
set, but the change will fail due to HW NOT allow parent/rate change
with clock enabled. It will cause clock HW status mismatch with
clock tree info and lead to function issue. Below is an example:
usdhc0's pcc clock value is 0xC5000000 during kernel boot up, it
means usdhc0 clock is enabled, its parent is APLL_PFD1. In DT file,
the usdhc0 clock settings are as below:
assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
when kernel boot up, the clock tree info is as below, but the usdhc0
PCC register is still 0xC5000000, which means its parent is still
from APLL_PFD1, which is incorrect and cause usdhc0 NOT work.
nic1_clk 2 2 0 176000000 0 0 50000
usdhc0 0 0 0 176000000 0 0 50000
After making sure the peripheral clock is disabled during clock tree
initialization, the usdhc0 is working, and this change is necessary
for all i.MX7ULP peripheral clocks.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add clocks for parallel port capture interface of IMX8QXP.
Because digital pll for parallel interface is on by default, and
not provide enable/disable function by scu, so add the related ops
for this kind of clocks.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
When M4 is active, Linux needs to take care of the power management
considering M4 status, this patch adds runtime check for clock
management for M4 active case.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Aisheng: update to CLK HW APIs ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
i.MX6SX has A9 and M4 inside, they can run independently,
this patch adds shared clock management for AMP system.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Aisheng: update to CLK HW APIs ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add M4 related APIs for suspend/resume support, and make
MMDC P1 IPG clock always ON, as it is required during resume
with FastMix OFF.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Aisheng: update to CLK HW APIs and add FIXME]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
OCRAM_S is used as iram tlb table for low power modes, clock
needs to be always ON.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[ Aisheng: update to CLK HW APIs ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Notes:
- Since the SDs that required to work at 1.8V encountered errors when
attempting to transition to that voltage, support for 1.8V has been
disabled for S32V234.
- The maximum bus-width for SD/eMMC is set to 8 bits by default, in order
to increase the speed. The driver will detect automatically the maximum
supported bus-width according to the used media properties.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Add initial version of device tree for S32V234-EVB, including nodes for the
4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and
Generic Interrupt Controller (GIC).
Keep SoC level separate from board level to let future boards with this SoC
share common properties, while the dts files will keep board-dependent
properties.
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Dan Nica <dan.nica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The patch adds ftm_alarm0 DT node for Soc LX2160A
FlexTimer1 module is used to wakeup the system in deep sleep
Signed-off-by: Biwen Li <biwen.li@nxp.com>
The current interrupt-map entries lost the 'parent unit address',
it will result in fail to allocate legacy INTx interrupts.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This enables the CPU traffic for the l2 switch (aka the
CPU frame injection/ extraction feature).
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Just link the switch PHY nodes to the central MDIO
controller PCIe endpoint node on ls1028 (implemented
as PF3) so that PHYs are configurable via MDIO.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Add the switch device node, available on PF5, so that the
switch port sub-nodes (net devices) can be linked to
corresponding board specific phy nodes (external ports) or
have their link mode defined (internal ports).
The switch device features 6 ports, 4 with external links
and 2 internally facing to the ls1028a SoC and connected via
fixed links to 2 internal enetc ethernet contoller ports.
Add the corresponding enetc internal port device nodes,
mapped to PF2 and PF6 PCIe functions.
And don't forget to enable the 4MB BAR4 in the root complex
ECAM space, where the switch registers are mapped.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
This patch add HDP PHY Controller related nodes on the LS1028AQDS.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
This patch add HDP PHY Controller related nodes on the LS1028ARDB.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
The patch replaces ftm0 with ftm_alarm0 DT node
- replace ftm0 with ftm_alarm0
- add new rcpm node
- remove old rcpm node
- aliases ftm_alarm0 as rtc1
Signed-off-by: Biwen Li <biwen.li@nxp.com>
The Aquantia driver does not allow xgmii mode anymore for
the AQR107 PHYs. Use the correct usxgmii mode instead.
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Since SMMU is not supported for SDK version, USB function will down if
still apply property 'dma-coherent' in scope of soc (USB driver is not
ready to support it alone) in SDK device trees, decide to remove it.
And add dma-coherent on other non-USB child nodes under soc.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Drop the smmu from the frwy and frwy-usdpaa versions of the SDK device
trees because SMMU is supported only for the upstream version of the
dpaa ethernet drivers.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LS1028ARDB and LS1028AQDS target.
This is having one SPI-NOR flash device, mt35xu02g connected at
CS0.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
P1010RDB-PA board configure the INTA with polarity as active-low.
P1010RDB-PB board configure the INTA with polarity as active-high.
Therefore, we need to configure P1010RDB-PB's INTA with polarity as
active-high and configure P1010RDB-PA's INTA with polarity as active-low.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
The qspi flash in ls1046a based QDS and RDB boards can operate
at 50MHz frequency.
Therefore, update the maximum supported freq in their respective
dts files.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Add flexcan node in LS1028A SOC file as well as in QDS and RDB files.
The device tree bindings used can be referred from
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Add flexcan node in LX2160A SOC file as well as in QDS and RDB files.
The device tree bindings used can be referred from
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
The clocking information is missing from flexcan device tree bindings.
This information is needed to be able to use flexcan. Document the same.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Enable USB3 HW LPM feature for lx2160a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
when compiling dts file using DTC_FLAG='-@', the device tree compiler
reports these warnings:
Warning (alias_paths): /aliases: aliases property name must include
only lowercase and '-'
Fixed the node aliases to silence these warnings.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
when compiling dts file using DTC_FLAG='-@', the device tree compiler
reports these warnings:
Warning (simple_bus_reg): /soc/mdio@0x8c0b000: simple-bus unit address
format error, expected "8c0b000"
Warning (unit_address_format): /pfe@04000000: unit name should not have
leading 0s
Fixed the node names to silence these warnings.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Add interrupt property for Aquantia AQR107 ethernet phy, currently
working in polling mode.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Since SMMU is not supported for SDK version, USB function will down if
still apply property 'dma-coherent' in scope of soc (USB driver is not
ready to support it alone) in SDK device trees, decide to remove it.
And add dma-coherent on other non-USB child nodes under soc.
dma-coherent feature in dts node will cause issue that
QE-HDLC received too little, when a lot of data is transmitted while
just little data received, the Tx buffer will run out.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
This patch reducing the USDPAA reseved memory to 4K.
In case USDPAA is to be used, 256MB needs to be reserved in the DTS file.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
The two external MDIO buses used to communicate with phy devices that are
external to SOC are muxed in LX2160AQDS board.
These buses can be routed to any one of the eight IO slots on LX2160AQDS
board depending on value in fpga register 0x54.
Additionally the external MDIO1 is used to communicate to the onboard
RGMII phy devices.
The mdio1 is controlled by bits 4-7 of fpga register and mdio2 is
controlled by bits 4-7 of fpga register.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Set the "simple-bus" compatible and the fpga ranges in order to
successfully probe the mdio-mux-emi1.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Also drop the smmu from the qds and usdpaa versions of the
SDK device trees because SMMU is supported only for the
upstream version of the dpaa ethernet drivers.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
To keep platform specific properties in the platform dts files,
remove pfe_mac nodes from dtsi and define them in dts files.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Replace properties "fsl,gemac-phy-id" and "fsl,pfe-phy-if-flags"
and use phy-handle instead.
Create mdio node with phy-handles defining PHYs available on the
mdio bus.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Limit the dma mask size for sata to 40 bits to match the actual address
size generated towards the interconnect. Re-use the already existing
auxiliary simple bus meant for usb but drop the usb reference from the
node name.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add Inphi retimer phyid in the mdio node, solving the probe issue
for this non-standard clause-45 device.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
This is an example of device tree nodes required to enable 10GBase-KR and 40GBase-KR on LX2160
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
To enable all the supported thermal sensors, add sensor id information
to thermal zone node.
Dts for ls1012a, ls1046a, ls1043a, ls1088a are updated.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Ls208xa has several thermal sensors. Add all the sensor id to dts
to enable them.
To make the dts cleaner, re-organize the nodes to split out the
common part so that it can be shared with other SoCs.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Add device tree node for first flash (CS0) connected
to all dspi controller.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
SMMU is not supported for the SDK version of the dpaa ethernet
drivers so remove the SMMU node from the device tree.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Wrap the usb controllers in an intermediate simple-bus and use it to
constrain the dma address size of these usb controllers to the 40 bits
that they generate toward the interconnect.
This is required because the SoC uses 48 bits address sizes and this
mismatch would lead to smmu context faults because the usb generates
40-bit addresses while the smmu page tables are populated with 48-bit
wide addresses.
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
These SoCs are really completely dma coherent in their entirety so add
the dma-coherent property at the soc level in the device tree and drop
the instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
The pci controllers are also behind the smmu so add the iommu-map
property to reflect this. The bootloader needs to patch the stream id
ranges to some sane values.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
These chips have a 48-bit address size so make sure that the dma-ranges
reflects this. Otherwise the linux kernel's dma sub-system will set
the default dma masks to full 64-bit, badly breaking dmas.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
The StreamID entering the SMMU is actually a concatenation of the
SMMU TBU ID and the ICID configured in software.
Since the TBU ID is internal to the SoC and since we want that the
actual the ICID configured in software to enter the SMMU witout any
additional set bits, mask out the TBU ID bits and leave only the
relevant ICID bits to enter SMMU.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Add compatible for LX2160A SoC,QDS and RDB board
Add lx2160a compatible for clockgen and dcfg
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
commit 118e2f48ee8da3f5547c24888bd6fdb78f03b7ce
Author: Peng Ma <peng.ma@nxp.com>
Date: Wed Jul 25 08:53:07 2018 +0000
dts: fsl-ls1021a, fsl-ls1043a, fsl-ls1046a: add multi block node
support
add block-offset to support different virtual block offset for qdma
base on soc;
the interrupt named "qdma-queueN(N:0,1,2,3)" correspond to a virtual
block,N based on block number of qdma;
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Date: Mon Apr 2 16:22:40 2018 +0800
arm64: dts: ls1043a: add dts entry for A-010650
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit a47e4bd0b5d076feb6d81601c16d5b79e53a92c8
Author: Rajesh Bhagat <rajesh.bhagat@freescale.com>
Date: Wed Jan 27 11:37:25 2016 +0530
arm64: dts: ls1043a: Add configure-gfladj property to USB3 node
Add "configure-gfladj" boolean property to USB3 node. This property
is used to determine whether frame length adjustent is required
or not
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
commit 38566bbd5ca6747b30d2f0c251bbcfe0723df8c6
Author: Changming Huang <jerry.huang@nxp.com>
Date: Wed Apr 19 12:49:50 2017 +0800
arm/arm64: dts: Add property snps incr burst type adjustment for
INCR burst type for dwc3
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
commit 8632d84e0fe187aa023a24f0dad0040c53e12450
Author: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Date: Thu Jan 25 11:31:13 2018 +0530
arm64: dts: freescale: ls1043a: Modify DT nodes for qspi
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
commit b1dc1ebed79e9aaab75fd06837d794ec2f1b624d
Author: Ran Wang <ran.wang_1@nxp.com>
Date: Fri Jan 5 15:14:48 2018 +0800
arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node
Enable USB3 HW LPM feature for ls1043a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
commit 9b17a5fcf8da5656ff99ebef3d63ba040e9f676d
Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Date: Tue Jun 13 13:14:26 2017 +0800
arm64: dts: correct the register range of dcfg
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit f60e39fd51ad702e3a2613faaca40871a4763735
Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Date: Tue Aug 22 18:04:02 2017 +0800
arm64: dts: ls1043a: add pcf85263 rtc nodes
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit 67c82e3c7b376139d7cee624589bedbc311f8868
Author: jiaheng.fan <jiaheng.fan@nxp.com>
Date: Thu May 11 17:36:33 2017 +0800
arm64: dts: ls1021/ls1043/ls1046: add qdma nodes
Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
commit c6d9c2498ee83669f9853100301edff9a5905caf
Author: Wang Dongsheng <dongsheng.wang@nxp.com>
Date: Fri Apr 21 13:26:07 2017 +0800
arm64: dts: ls1043a: add ftm0 nodes
Add rcpm and ftm0 nodes. The Power Management related features
need these nodes.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
commit 3bcdc4de0a1c9e6f4a4ddc916e8efe8044d8bbfd
Author: Po Liu <po.liu@nxp.com>
Date: Fri Sep 30 17:11:36 2016 +0800
arm64: dts: ls1043/ls2080: add pcie aer/pme interrupt-name property
Some platforms(NXP Layerscape for example) aer/pme interrupts was
not
MSI/MSI-X/INTx but using interrupt line independently. This patch
add "aer", "pme" interrupt-names for aer/pme interrupt.
With the interrupt-names "aer", "pme" code could probe aer/pme
interrupt
line for pcie root port, replace the aer/pme interrupt service irqs.
This is intend to fixup the Layerscape platforms which aer/pmes
interrupts
was not MSI/MSI-X/INTx, but using interrupt line independently.
Since the interrupt-names "intr" never been used. Remove it.
Signed-off-by: Po Liu <po.liu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
commit 4d20ecf029f1255520b30c103e1724c618b981c7
Author: Zhao Qiang <qiang.zhao@nxp.com>
Date: Sun Jun 12 15:51:44 2016 +0800
arm64: dts: ls1043ardb: add ds26522 node
add ds26522 node to fsl-ls1043a-rdb.dts
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
commit ca470562646ab058814fc4a1195016fb3266cdf5
Author: Zhao Qiang <qiang.zhao@nxp.com>
Date: Sun Jun 12 15:44:11 2016 +0800
arm64: dts: ls1043ardb: add qe node
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
This patch add support for NXP LS2081ARDB board which has
LS2081A SoC.
LS2081A SoC is 40-pin derivative of LS2088A SoC
So, from functional perspective both are same.
Hence,ls2088a SoC dtsi files are included from ls2081ARDB dts
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Tao Yang <b31903@freescale.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
LS1012A-FRWY is a different design from LS1012A-FRDM,
but has some common SoC features. Key feature on this
board is 2x1G SGMII PFE MAC, Micro SD, USB 3.0, DDR,
QuadSPI, Audio, UART.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
LS1012A-2G5RDB is a different design from LS1012ARDB,
but has some common SoC features. Key feature on this
board is 2.5Gbps SGMII.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Remove the DCSS entries from DTS. Will add them back, after the upstream DCSS
driver is added back.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Remove imx8mq-evk-hdmi.dts file.
Because native hdmi is the default display for imx8mq evk board.
hdmi properties are moved to imx8mq-evk.dts.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Use 3MHz as GPT clock source on i.MX7D to aligned with
previous releases.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Without this "jedec,spi-nor" compatible property, probing of the SPI NOR
does not work on the NXP i.MX6ULL EVK. Fix this by adding this
compatible property to the DT.
Fixes: 7d77b8505a ("ARM: dts: imx6ull: fix the imx6ull-14x14-evk configuration")
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Create a new dts 'imx8mm-ddr4-evk-rm67191.dts' to
support panel 'RM67191' display which is attached
to DSIM controller directly on IMX8MM DDR4 board
to avoid conflict with ADV7535 display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
We find some imx7ulp evk board, SD card work in DDR50 mode will meet
data CRC error. Only some board has this issue. And eMMC DDR50 mode
also has this issue on these boards. For DDR50, do tuning can fix
this issue, but eMMC DDR52 do not support tuning. So this patch
manually add the delay cell on the fixed clock (FBCLK_SEL = 0).
Currently, add 15 delay cell, which can make DDR50/DDR52 works stable
on all imx7ulp evk board.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit ef369313de)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
imx8dxl phanton mek board doesn't support lvds and dc0 subsystem
resources are not owned by A-core os. So disable lvds subsystem.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
This patch introduces two DT source files to add IT6263 dual
channel mode support. Either LVDS0 acts as the primary channel
or LVDS1 does.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The JDI TX26D202VM0BWA WUXGA LVDS panel works in LVDS
dual channel mode. It can connect with the i.MX8QXP
MEK board via J1(for LVDS0) and J3(for LVDS1) jacks.
Either LVDS0 or LVDS1 can be the primary channel.
The panel uses PWM signal supplied by i.MX8QXP to
control the backlight. This patch adds the panel
support on the i.MX8QXP MEK platform.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds JDI WUXGA LVDS panel(on LVDS1) support
for the i.MX8QM MEK platform.
Note that the i.MX8QM MEK board needs a hardware rework
to add a 0ohm resistor for R211 to make the PWM backlight
work for the panel.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds properties of auxiliary ldb to support LDB split mode
for i.MX8QXP MIPI DSI/LVDS subsystem device tree.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Broken the auto cmd23 function for eMMC on imx6qpdl/imx6sx/imx7d, otherwise
the eMMC RPMB write access will return general fail.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
sdma1 should work in clock ratio 1:2, thus ahb clock should be correct
to IMX8MN_CLK_AHB, otherwise, 1:1 clock ratio will be used wrong like
sdma2/3. Correct it to IPG@66Mhz/AHB@133Mhz.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Change the sound card name from "rpmsg-audio" to "wm8960-audio".
That we can utilize the /var/lib/alsa/asound.state config
file to share same configuration as wm8960 sound card.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Sensors are connected to M4 and not to A-Core.
Sensors will not be exposed to A-Core via standard
i2c interface but via an i2c proxy layer over rpmsg.
Remove the dts entry to avoid the probe error messages and
add a separate dts file for the case where someone wishes to
rework the board themselves and connect sensors for testing purposes.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
(cherry picked from commit 05f0c61222)
Add a address-cells property to fix compile warning of -ecspi-slave.dts.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
i.MX8MM ddr4 evk revC already use the external osc as the pcie
refclk, and previous boards not supported, so change the refclk
to osc in default.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
On imx8qxp and imx8qm mek board, usdhc1 is for eMMC usage, and will work at
HS400 mode, this HS400 mode will work at 200MHz, and will default divide 2 from
source clock(IMX_SC_R_SDHC_0), which mean we need to config the source clock
to 400MHz at least.
Before this patch, HS400 mode only work at 100MHz, and will meet some timeout issue
when do system suspend/resume, due to our HS400 related timing setting is based on
the 200MHz. Also, HS400 work at 100MHz will impact the performance.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Tested-by: Anson Huang <Anson.Huang@nxp.com>
This reverts commit 9b9ae1e2d639973ca826f839717e2b2405df5f51.
Was an emergency hotfix but real problem was solved
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch adds dc1_dpr1_channel3 and dc1_dpr2_channel1-3 device tree
nodes support for i.MX8 DC1 subsystem.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds dc0_dpr1_channel3 and dc0_dpr2_channel1-3 device tree
nodes support for i.MX8 DC0 subsystem.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Specify the SID of SATA. Otherwise, uboot would configure the SID by
the power domain.
And would break PCIe functions since SATA module has PCIe's power
domain too.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
GPMI NAND has pin conflict with uart3, and there already
have extra dts "*-gpmi-weim.dts" files to enable GPMI, so
disable GPMI in sabreauto default dts.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
i.MX6Q/DL ENET cannot wake up system in wait mode because ENET
tx & rx interrupt signal don't connect to GPC. Add ENET GPIO IRQ
workaround for sabresd/sabreauto boards.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
This node will be used by the OCRAM driver in optee to:
* Get the OCRAM start address for power management in optee.
* Add an entry that will overwrite ocrams nodes and dynamically reduce
the OCRAM available for mmio-sram in Linux.
That way we do not touch the legacy Linux boot and remove the dedicated
optee device tree.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
[Arul: Fix merge conflicts]
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
The mem clock is used to access the register, if there is no
mem clock defined, we should use the ipg clock instead,
otherwise there will be kernel dump after system reboot.
[ 3.010962] Kernel panic - not syncing: Asynchronous SError Interrupt
[ 3.010964] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.19.35-05057-g2134d856e6b2 #2889
[ 3.010966] Hardware name: Freescale i.MX8QXP MEK (DT)
[ 3.010968] Call trace:
[ 3.010969] dump_backtrace+0x0/0x178
[ 3.010971] show_stack+0x14/0x20
[ 3.010972] dump_stack+0x8c/0xac
[ 3.010974] panic+0x120/0x28c
[ 3.010975] __stack_chk_fail+0x0/0x18
[ 3.010977] arm64_serror_panic+0x74/0x80
[ 3.010979] do_serror+0x68/0x130
[ 3.010980] el1_error+0x7c/0xdc
[ 3.010982] _raw_spin_unlock_irqrestore+0xc/0x48
[ 3.010984] clk_core_disable_lock+0x28/0x38
[ 3.010985] clk_disable+0x1c/0x30
[ 3.010987] regmap_mmio_write+0x54/0x68
[ 3.010989] _regmap_bus_reg_write+0x14/0x20
[ 3.010990] _regmap_write+0x60/0xa8
[ 3.010992] regmap_write+0x48/0x70
[ 3.010994] fsl_asrc_probe+0x258/0x660
[ 3.010995] platform_drv_probe+0x50/0xb0
Why this issue only happen at kernel reboot, it is because the ipg
clock is enabled in default after system reset, after used once, the
ipg clock is disabled, then reboot system, the issue happen.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
After commit f7907e57ae ("regulator: fixed: add off-on-delay"), user
can use "off-on-delay-us" to define the regulator off-delay time.
For SD card, according to the spec requirement, for sd card power reset
operation, it need sd card supply voltage to be lower than 0.5v and keep
over 1ms, otherwise, next time power back the sd card supply voltage to
3.3v, sd card can't support SD3.0 mode again.
This patch add the off-on-delay-us to each board, make sure the sd power
reset behavior is align with the specification. Without this patch, when
do quick system suspend/resume test, some sd card can't work at SD3.0 mode
after system resume back.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Add *-ca53.dtb and *-ca72.dtb to support booting up single
cluster on LPDDR4 validation board, to boot up single A72 cluster,
dedicated flash.bin needs to be used.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Since the ddr4 evk with qca9377 board is out support, so set the
ddr4 evk with cyw43455 board as the default support.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked and merged from commit: d260e22591)
Add a new dts imx8mn-ddr4-evk-rm67191.dts to support the
mipi panel RM67191 display on IMX8MN DDR4 EVK board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Rename the apb clock names from 'apb-clk' to 'disp_apb_root_clk'
for dispmix reset nodes, since in commit f541de184245(reset: imx8m:
Correct clock name for dispmix driver), it changes the apb clock
name.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The dispmix-reset device can be used to control the LCDIF and
DSIM bus reset and clock enable. So define 'resets' property
for both LCDIF and DSIM for this purpose which will be used to
replace 'dispmix_gpr' usage.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Create a new device node 'dispmix-reset' to describe the
reset controller in DISPMIX to control several submodules
bus and clock reset and enable. All the reset lines can be
divided into three groups: sft_rstn, clk_en and mipi_rst.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Add *-ca53.dtb and *-ca72.dtb to support booting up single
cluster, to boot up single A72 cluster, dedicated flash.bin
needs to be used.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
- The mailbox of mu_m0 is used by vpu decoder
- The mailbox of mu1_m0 and mu2_m0 are used by vpu encoder
mu2_m0 only enabled on imx8qm
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
PIN LPSR_GPIO1_IO04 is LPSR pin, then move it to iomuxc_lpsr
node. And remove the dummy pin group for the PIN.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
one of the sai3 pinctrl should be in lpsr iomux group rather than
in iomux group, which messes up the QSPI iomux control.
Signed-off-by: Han Xu <han.xu@nxp.com>
Put assigned clocks of audio PLLs in imx8mm-evk.dts, which conflict
with the assigned clocks in imx8mm.
Fixes: 77b5daa55e63 ("ARM64: dts: imx8mm: Enable AK4497/AK4458/AK5558/SPDIF/MICFIL")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
For some reason the activating the upsteam sysctr driver causes cpuidle
hangs on imx8mq.
Temporarily disable this until the root cause can be figured out. This
reverts to behavior in linux-nxp before rebase from next-20190809 to
v5.4-rc3.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Otherwise, the system will hang if USB driver try to access
portsc register.
Cc: André Draszik <git@andred.net>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Without configuring this pinctrl, the ID value can't be got correctly,
then, the dual-role switch can't work well.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
pinctrl-assert-gpios, this property does not exist in upstream, need add
back.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
(cherry picked from commit 4577fefdc5bc5e7de7a0a2f904fefc8445d68ac9)
pinctrl-assert-gpios and registers-default, these properties does not exist
in upstream, need add back.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
(cherry picked from commit 8492eb228a80712059d1873c613954b180f009ae)
Add assigned-clocks for audio PLL
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 12727b6d7c6f47452c14da34edc9c1194ea81cde)
enable csi bridge, mipi csi and mipi camera ov5640
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 7f7bbb2dfb7a19381f1f6dab75110329b89dc05b)
This patch changes LDB_DI0/1_SEL clock's parent from PLL3_USB_OTG to
PLL2_PFD0_352M so that it aligns with imx_4.19.y kernel. Also, with
this patch applied, the clock tree may provide ~64.6MHz pixel clock
rate to the Hannstar XGA LVDS panel, which is closer to the desired
65MHz(before the change, it's ~68.5MHz).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 142b7222bbebe521d3f4b8d3850c40bd7660a7cf)
This patch changes LDB_DI0/1_SEL clock's parent from PLL3_USB_OTG to
PLL2_PFD0_352M so that it aligns with imx_4.19.y kernel. Also, with
this patch applied, the clock tree may provide ~64.6MHz pixel clock
rate to the Hannstar XGA LVDS panel, which is closer to the desired
65MHz(before the change, it's ~68.5MHz).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit a76d0c86ada7717c1cb556a1ac1fc4dd022db8bc)
Clocks needed by JPEG Encoder/Decoder Linux V4L2 driver.
These additions are based on linux-imx/imx_4.19.y.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Tested-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
(cherry picked from commit 7ac4b9c761b133cfb364d269d7e64db57c4863d8)
Default is only about 300MB, not enough for some multi-instance test
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
(cherry picked from commit 43b40a50f66d7e6e83775a9568546a92876956d1)
change cpu-dai to audio-cpu for alignment between
imx-wm8962 and fsl-asoc-card
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 010293d320968ac8b74ae2beff2815574efaf2a6)
change compatible string for sdma
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 12c7a2a0fa87a09977eb5582a28f39db29b11f00)
on imx6qp sabresd board, use different regulators for AVDD and DOVDD
power supply for camera ov5640 (both parallel and mipi).
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 2f372c5776fd84541577bc61a9501795206d1dd0)
Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 874740c7dcceb0704e68cacf57b3ea907c3b2710)
Improve model name which is used as machine name in
soc driver to meet test team's auto test requirement.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit b7d8943bb1b2342a431424e7e4c3c9094d35fa5c)
cpu clocks should match cpufreq's clk table, otherwise,
cpufreq driver probe will fail.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit ca2dadb6be4a30b3b8b429faa2bbbd8c86ab9eae)
Remove GPU/VPU thermal zones to make it aligned with
previous NXP internal tree.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 6bcd8249cb717c8525bd69c9ca501d378b67e0be)
This is a rework of the following i.MX BSP commit
(rel_imx_4.19.35_1.1.0_rc2):
0adf02011a ("MLK-18082: defconfig: Add caam to 7ulp conf")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
This is a rework of the following i.MX BSP commit
(rel_imx_4.19.35_1.1.0_rc2):
3ac6edcd92 ("MLK-11360-01 crypto: caam_snvs: add snvs clock management")
caam_snvs driver involves snvs HP registers access that needs to
enable snvs clock source. The patch add the clock management.
Signed-off-by: Andy Duan <fugang.duan@nxp.com>
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Security subsystem includes:
-caam crypto engine
-secure memory
Notes:
1. caam has 4 job rings, however only last 2 rings are accessible
from the kernel.
2. Controller DT node is added in the same power domain as the JR2
(1st jr showing in DT).
This is needed since controller driver (ctrl.c) needs first jr
(JR2 in this case) "powered", so it can access its register page
(which has some aliases for registers located in controller page,
page that is not accesible from the kernel).
Adding controller DT node to the power domain leads to SCU f/w
being instructed to "power up" JR2.
What actually happens is that:
-XRDC2 is programmed to provide access to JR2 register page
-SECO f/w is instructed to update JR2DID_LS and possibly
JR2DID_MS[USE_OUT].
USE_OUT details from Security RM:
"JRaDID_MS contains a USE_OUT field that enables a second set of ICID
and DID values.
When USE_OUT=1, this Job Ring's *data* write transactions will assert
TrustZone Non-SecureWorld, along with the OUT_DID and OUT_ICID values
from JRSDID_LS.
All other bus transactions, including all reads, descriptor write-backs
and job completion status writes will assert the PRIM_ICID, PRIM_ICID and
not PRIM_TZ values from JRaDID_MS.
When USE_OUT=0, all bus transactions performed on behalf of this Job Ring
will use the PRIM_ICID, PRIM_ICID and not PRIM_TZ values from JRSDID_MS."
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
on SDB board, LCD1_DATA07 is shared by lcdif1 and csi1, so add -lcdif1 dts
file to resovle the conflict.
[ 503.947201] imx6sx-pinctrl 20e0000.iomuxc: pin MX6SX_PAD_LCD1_DATA07 already requested by 2220000.lcdif; cannot claim for 0-003c
[ 503.958957] imx6sx-pinctrl 20e0000.iomuxc: pin-59 (0-003c) status -22
[ 503.965560] imx6sx-pinctrl 20e0000.iomuxc: could not request pin 59 (MX6SX_PAD_LCD1_DATA07) from group csigrp-0 on device 20e0000.iomuxc
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Add csi node on imx6ul
This has different clocks versus upstream.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
use internal version and resolve conflict with upstreaming code.
add the nodes for v4l2 capture, mipi csi, and ov5460 cameras.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Change OV10635 as default camera for IMX8QM platform and OV5640
as optional choice. For OV10635, IMX8QM support eight sensors.
For OV5640, IMX8QM support two.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Change OV10635 and OV5640 DVP mode as default camera for
IMX8QXP platform and OV5640 MIPI mode as optional choice.
IMX8QXP support four ov5640 sensors and one ov5640 sensor
which only work on DVP mode by default. For ov5640 optional
choice, it support two sensor, one work on DVP mode and the
other work on MIPI mode.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
This will allow using DCSS with HDMI on iMX8MQ.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
[ Aisheng: fix one unnecessary blank line ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
currently we still use internal framebuffer driver for lcdif.
remove DRM-specific staff to avoid conflict.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
currently we still use internal framebuffer driver for lcdif.
remove DRM-specific staff to avoid conflict.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
The panel node is a device node for the DRM driver for
"sii,43wvf1g" panel. But the lcdif1 is implemented by
a framebuffer driver. So to avoid conflict, remove the
panel node.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Since the mxsfb framebuffer driver requires 'display'
property to exist, so add this property to lcdif1,
otherwise there will be below errors printed:
[ 3.617194] mxsfb 2220000.lcdif: failed to find display phandle
[ 3.623254] mxsfb 2220000.lcdif: Failed to initialize fbinfo: -2
[ 3.640538] mxsfb: probe of 2220000.lcdif failed with error -2
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The panel node is a device node for the DRM driver for
"sii,43wvf1g" panel. But the lcdif1 is implemented by
a framebuffer driver. So to avoid conflict, remove the
panel node.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Since the mxsfb framebuffer driver requires 'display'
property to exist, so add this property to lcdif1,
otherwise there will be below errors printed:
[ 3.617194] mxsfb 2220000.lcdif: failed to find display phandle
[ 3.623254] mxsfb 2220000.lcdif: Failed to initialize fbinfo: -2
[ 3.640538] mxsfb: probe of 2220000.lcdif failed with error -2
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Since on imx8mq evk board there are multiple display paths, create one
dts file for each display path.
This patch creates the dts file for lcdif-dsi-rm67191 (mipi-dsi panel)
display path.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Change isl29023's compatible string into "fsl,isl29023". Make sure it
will match the driver drivers/input/misc/isl29023.c.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Change isl29023's compatible string into "fsl,isl29023". Make sure it
will match the driver drivers/input/misc/isl29023.c.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
The devices in the device tree are registered in the
top-down order. But when system suspend entered, the
device tree is walked in a bottom-up order to suspend
devices. So change the display device nodes register
order to be:
LCDIF -> SEC DSIM -> Display Subsystem
Since in display subystem, it will disable the whole
display pipeline. So this should be first suspended
before LCDIF and SEC DSIM. And besides, the SEC DSIM
is better to be suspended before LCDIF which is the
same with the sequence for display pipeline disables.
And when system resume entered, the devices resume
sequence is:
LCDIF -> SEC DSIM -> Display Subsystem
Which is a top-down order and is the correct sequence
for display devices resume.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
note ELAN touch chip is on IMXEBOOKDC2 board, which is plugged into
i.MX6DL SabreSD board.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
According to the IMX7ULP reference manual, the mipi pll
clock comes from the MIPI PHY PLL output. So it should
not be defined as a fixed clock. So remove this clock
node and all the references to it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Move hdmi tx function out of imx8qm-mek.dts.
Disable lvds devices in imx8qm-mek-hdmi.dts,
then hdmi tx function should not depend on LVDS connector plugged.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
This introduces a separate DT file for enabling DSP SOF
DT node.
Scenario that we want to enable is. Simple playback pipeline
with CS42888 + ESAI on imx8QXP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Currently there are two Linux DSP drivers. We will use the following
compatible strings depending on which driver is used:
1) fsl,imx8qxp-dsp-v1
Used for FSL DSP Linux driver that works with the old audio framework written
completely inside NXP.
2) fsl,imx8qxp-dsp
Used for SOF Linux driver. This will be used in the future, but until
SOF Linux driver / FW will completely support all the features we will
need to support 1) and 2) in parallel.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
As the typec switch driver may use more gpio(like reset), so
rename the "gpios" property to be "switch-gpios", update
the existing user dts accordingly.
Signed-off-by: Li Jun <jun.li@nxp.com>
Add typec node for USB3 which cover:
- Typec and PD support with power source and dual data role.
- USB3 super speed mux switch for orientation.
- usb-role-switch property is not added as the controller driver
does not support role switch class for now.
Signed-off-by: Li Jun <jun.li@nxp.com>
cherry-pick below patch:
ENGR00290496-1 ARM: imx6: Add charging led support on Sabresd board
Enable led lighting while the board in charging status. Implement it
on Sabresd board.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 7a47183634c524f5ac11c60fe555b0b18c0fe7e0)
(cherry picked from commit 28b266aa0b)
[Arul: Fix merge conflicts]
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
(cherry picked from commit 0d4fb6276e)
Add battery device node on imx6q/dl-sabresd and imx6sl-evk board
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 1f2670578d)
External 100Mhz differential OSC is used as HSIO REF clock source, so
set it as the parent clk of the PHY PCLK.
Then add the fixed HSIO REF clocks regarding the different HSIO use
cases.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Synaptics_dsx touch is on i2c3 bus, so add it here, but default disbale
it, because it share the irq pin with screen, will enable it in the
fsl-imx8mq-evk-dcss-rm67191.dts
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Image subsystem of imx8qm, qxp have some common part and some different
part. For qm, img ss include ISI, CSI0 and CSI1. For qxp, img ss include
ISI, CSI0 and PI0. So split two dtsi file to disable the unrelated modules
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Add focaltech new touch panel ft5426 support.
Set the ft5426 as default panel for dts. If want to use the old panel, then
it needs to boot with imx7ulp-evk-ft5416.dtb file.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Change the reset gpio polarity for RM67191 panel to active low
to match the RM67191 dt bindings file:
'Documentation/devicetree/bindings/display/panel/raydium,rm67191.txt'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
SDIO wifi and sd1 slot share one usdhc, this patch add sd1 slot support
on imx7ulp evk board, need to do hardware rework first.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add emmc support for imx6sx-sdb board, due to this support
need remove sd4 sd card slot and solder an eMMC chip, so
this patch add imx6sx-sdb-emmc.dts file.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add imx6qdl-sabreauto board uart3 DTE pad set. To avoid a flood of
dts files, there comment out DTE pinctrl set. If user want to test
DTE mode, it needs to rebuild the DTB file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit dc6028b08c6bd718d57866a1714f3977ba7820d3)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Add uart5 DTE mode pinctrl set for imx6q-sabresd board. Since there
have pin confliction, so add new dts file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit d63b40d5b1b05992d2328ef0bdc80ec5d96f2dce)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Tuning MMDC ZQ_PU_OFFSET impact DDR IO timing like the value is greater
than 0x9 causing enet lost packets due to the worse timing. Reinforce
ENET DDR IO drive strength can fix the issue. Use the default pin setting
can match the RGMII timing for AI board.
Worse timing cause performance drop, the performance has no drop after
enhancing the DDR IO pins drive strength. Pass over night test.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 5ceb746c0358c0851187a3f4f6f61d02e951eae0)
Conflicts:
arch/arm/boot/dts/imx6qp-sabreauto.dts
(cherry picked from commit 0ea975d4bd)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Add uart4 DCE and DTE pinctrl set. Since there have pin confliction,
so add new dts file. To avoid a flood of dts files, there comment out
DTE pinctrl set. If user want to test DTE mode, it needs to rebuild
the DTB file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit a3602fa5796bb86ba432474220389ec712bde92a)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
The current enet RGMII TXCLK rise/fall time which could be
observed(~0.85ns) is longer than requirement (<=0.75ns).
The current setting, SPEED/DSE/SRE=10/110/1 is used, and then it needs to
increase DSE to 111 "37 Ohm @ 3.3V, 21 Ohm@1.8V, 34 Ohm for DDR".
After the change RGMII TXCLK match the spec requirement.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Add imx6sx-sdb baord uart5 DTE pad set. To avoid a flood of dts files,
there only comment out DTE pinctrl set. If user want to test DTE mode,
it needs to rebuild the DTB file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
Add clock parents and rates for enet_axi and enet_phy in dts via
the asigned-parents and assigned-rates attributes.
These were previously set in the ccm driver via set_parent/set_rate
calls but that has been removed in upstream linux.
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Correct enet clock CCGR register offset.
CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 enet2 bus clocks)
CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK
CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK
IMX7D_ENET_PHY_REF_ROOT_DIV supply clock for PHY, no gate after the clock, its parent
clcok root has gate.
IMX7D_ENET1_REF_ROOT_DIV/IMX7D_ENET2_REF_ROOT_DIV supply clocks for enet IPG_CLK_RMII,
no gate after the clock, its parent clock root has gate.
IMX7D_PLL_ENET_MAIN_125M_CLK (anatop pll) supply clock for enet RGMII tx_clk.
Update copyright information.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Currently, all DPUs in i.MX8qm/qxp have the same clocks - pll0/1,
bypass0 and disp0/1. So add the common clocks in imx8-ss-dc0/1.dtsi.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Power domains for dpu are specified in imx8-ss-dc0/1.dtsi,
so remove the superfluous power domains in imx8qm-ss-dc.dtsi.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add necessary nodes for suspend/resume support, including wdog
node which is needed for initializing wdog when resumed from
VLLS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
One version 1.0 MU module is contained in i.MX7ULP.
And it has the different register layout.
Use one specific compatible for i.MX7ULP MU.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Add interrupt and related pinctrl properties for ADV7535,
the interrupt can be used for hotplug, edid ready and etc
in the adv bridge driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Create a new dts 'fsl-imx8mm-evk-rm67191.dts' to support panel
'RM67191' display which is attached to DSIM controller directly.
So the corresponding panel device node is defined as the child
of 'mipi_dsi' node under the DRM DSI framework. Since the
'adv_bridge' and 'RM67191' should be enabled exclusively, so
disable 'adv_bridge' when enable 'RM67191'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Add thermal zone and tmu node to support i.MX8MM thermal
driver, ONLY cpu thermal zone is supported, and cpu cooling
is also added.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
i.MX8qxp LVDS display feature is supported by MIPI DSI/LVDS combo subsystem.
i.MX8qm LVDS display feature is supported by standalone LVDS subsystem.
There is not a lot of common hardwares for the two kinds of subsytems,
so rename imx8-ss-lvds.dtsi to imx8qxp-ss-lvds.dtsi.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch improves DC0 subsystem device tree to clearly reflect it is
the first DC subsystem instance embedded in a SoC. So, some renaming
happens in imx8-ss-dc.dtsi, and finally imx8-ss-dc.dtsi is renamed to be
imx8-ss-dc0.dtsi.
Also, extract the i.MX8qxp specific compatible string, display clocks,
display ports and display-subsystem from imx8-ss-dc0.dtsi and put them
in SoC specific imx8qxp-ss-dc.dtsi.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add the cpu-sleep idle state with all the necessary parameters and also add
the cpu-idle-states to the cpu nodes.
The 'broken-wake-request-signals' property is used to let the irq-imx-gpcv2
driver know that the wake request signals from GIC are not linked to the
GPC at all and, therefore, the driver should make use of the dedicated
workaround to explicitly wake up the target core on every IPI.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Broken the auto cmd23 function for eMMC on imx6qpdl/imx6sx/imx7d, otherwise
the eMMC RPMB write access will return general fail.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
edma devices are slight different with i.mx8qxp, such as different
edma2 called on i.mx8qm while edma0 called on i.mx8qxp for the same
edma address map. Besides, dma channel used by audio/uart may be
different with i.mx8qxp too.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Add a "wakeup-irq" property in scu pd's node to pass wakeup
source's hardware irq number for irqsteer wakeup support in
kernel.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add a "wakeup-irq" property in scu pd's node to pass wakeup
source's hardware irq number for irqsteer wakeup support in
kernel.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add tja1100 net card support on imx8qm MEK base board
enet2 connector.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Aisheng: fix small conflicts during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
From HW point of view, CAN1/2 do not depend on CAN0 PD, it just uses
CAN0 clock which could be handled by clock driver itself. Now clock
runtime pm has support it, so drop multi-pd for CAN1/2.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Can't access this LPCG on QM, not sure if it's doc incorrectness issue.
Anyway it seems the driver actually is not using it currently, so it's
safe to disable.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
imx8qm lpuart is the same as imx8qxp, and driver's compatible
string in of_device_id is "fsl,imx8qxp-lpuart", so change imx8qm
lpuart compatible string to "fsl,imx8qxp-lpuart".
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
imx8qxp img does not support csi1
Note: a better way is to split csi, pi and img ss,
then imx8qm/qxp could select the required ones.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
GPU driver does not support DEFER_PROBE, we have to postpone
it's register to ensure it's probe&suspend is later than the dependent
resoureces.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The DMA SS of MX8QM is mostly the same as the DMA part in MX8QXP ADMA SS
while it has one more instance for each of LPUART, ADC and LPI2C. And unlike
MX8QXP that flexcan clocks are shared between multiple CAN instances,
MX8QM has separate flexcan clock slice.
So we reuse the most part of common imx8-ss-dma.dtsi and add new things
based on it.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
amda ss is consisted of dma and audio ss in qxp which are
also used in qm.
Let's split them into two ss for better code reuse.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MX8 SoC is comprised of a few HW subsystems while some of them can be
reused in the different SoCs. So let's re-orginize them into subsystems
in device tree as well for the possible reuse of the common part.
Note, as there's still no devices of hsio subsys, so removed it
first instead of creating a subsys headfile with no devices.
They will be added back when new devices added.
NOTE: this is a complementary patch of
c24fc267a8a9 ("arm64: dts: imx8qxp: orginize dts in subsystems"
based on latest upstream versions.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
For 24 bits samples SAI is not able to derive a bitclk. So,
use tdm width = 32 so that requested rate is always a multiple of 32.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Because the pin conflict between fec and mlb, add a
imx6dl-sabreauto-enetirq.dts to avoid the conflict.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
This reverts commit 8240161b1488a24d71df07f5e43fcb77dd562c27.
Since the dwc3 feature branch resolved the boot hang, so revert
this patch.
Signed-off-by: Li Jun <jun.li@nxp.com>
Enable uart1 and uart3 ports, uart1 port is for Bluetooth.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Aisheng: fix small conflicts during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
GMSL MAX9286 is a quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output. IMX8QM support two max9286
and IMX8QXP only support one.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: fix small conflicts during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add the ocram node in dts for low power feature support
on i.MX6SL.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
[ Aisheng: fix small conflicts during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add the rpmsg support.
- Setup the rpmsg reserved memory, one is used for vring, the other one
is used for shared buffers.
- The mailbox of the lsio mu5a is used by rpmsg on imx8qxp platforms
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Correct ecspi/sdma compatible since ecspi errata ERR009165
not fixed on i.mx6sll chip.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: fix small conflicts during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add new 'imx6ul-ecspi' compatible name for ecspi and new 'imx8mq-sdma' name
for sdma since on i.mx8mm/mq chip fix ecspi errata.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
There are two ways for SDMA accessing SPBA devices: one is SDMA->AIPS
->SPBA(masterA port), another is SDMA->SPBA(masterC port). Please refer
to the 'Figure 58-1. i.MX 6Dual/6Quad SPBA connectivity' of i.mx6DQ
Reference Manual. SDMA provide the corresponding app_2_mcu/mcu_2_app and
shp_2_mcu/mcu_2_shp script for such two options. So both AIPS and SPBA
scripts should keep the same behaviour, the issue only caught in AIPS
script sounds not solide.
The issue is more likely as the ecspi errata
ERR009165(http://www.nxp.com/docs/en/errata/IMX6DQCE.pdf):
eCSPI: TXFIFO empty flag glitch can cause the current FIFO transfer to
be sent twice
So revert commit 'dd4b487b32a3' firstly.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
There are two ways for SDMA accessing SPBA devices: one is SDMA->AIPS
->SPBA(masterA port), another is SDMA->SPBA(masterC port). Please refer
to the 'Figure 58-1. i.MX 6Dual/6Quad SPBA connectivity' of i.mx6DQ
Reference Manual. SDMA provide the corresponding app_2_mcu/mcu_2_app and
shp_2_mcu/mcu_2_shp script for such two options. So both AIPS and SPBA
scripts should keep the same behaviour, the issue only caught in AIPS
script sounds not solide.
The issue is more likely as the ecspi errata
ERR009165(http://www.nxp.com/docs/en/errata/IMX6DQCE.pdf):
eCSPI: TXFIFO empty flag glitch can cause the current FIFO transfer to
be sent twice
So revert commit 'df07101e1c4a' firstly.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
This patch adds low power mode support for i.MX7D, including
FastMix off feature support, low power idle support and A7-M4
AMP power management support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
When cpu-freq driver switch ARM clock source from PLL1 to
STEP clock, need to keep PLL1 enabled and from its bypass
clock source OSC, this is necessary for i.MX6SX low power
idle.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
This patch introduces i.MX8qxp DC subsystem support in device tree.
The dpu node is supported.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: update irqsteer to latest binding ]
[ Aisheng: Fix rebase conflict ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
enable dsp function
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: fix conflict due to upstreamed MU13 ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add usdhc1 support SD3.0.
Besides, add fsl,tuning-start-tap for all usdhc, imx usdhc IP
logic require the tuning-start-tap larger than 10, to make
sure the tuning logical can work normal.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
PTN36043 is a super speed active channel switch controlled
by a GPIO, used for USB3 data channel switch according to typec
orientation.
Signed-off-by: Li Jun <jun.li@nxp.com>
Add typec port controller node ptn5110, which is a standard
TCPCI interface with PD PHY, imx8mq-evk board equiped with
a typec connector which is DRP on power, with the usb port
dwc3_0 has dual role enabled, so typec can control the data
role of the otg port.
Signed-off-by: Li Jun <jun.li@nxp.com>
The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features.
This patch adds i.MX8QuadMax MEK board support.
Note that MX8QM needs a special workaround for TLB flush due to a SoC
errata, otherwise there may be random crash if enable both clusters of
A72 and A53. As the errata workaround is still not in mainline, so we
disable A72 cluster first for MX8QM MEK.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
MX8 SoC is comprised of a few HW subsystems while some of them can be
reused in the different SoCs. So let's re-orginize them into subsystems
in device tree as well for the possible reuse of the common part.
Note, as there's still no devices of hsio subsys, so removed it
first instead of creating a subsys headfile with no devices.
They will be added back when new devices added.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Different platforms have different Master with different SourceID on
AHB bus. The 0X0E Master ID is used by cluster 3 in case of LS2088A.
So, patch introduce an invalid master id variable to fix invalid
mastered on different platforms.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Replace fsl_lpspi->chipselect by controller->cs_gpios. Clean up the
code.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Add "fsl,spi-num-chipselects" check to support multi SS function in PIO
mode.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Add a NULL check for device node and lpspi_platform_info when lpspi
device probe.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
To workaroud the TKT238285, the safe way is use XCH mode in SDMA
script to simulate as PIO mode which never report such issue. Meanwhile,
set tx threashold as 0. But this workaroud will bring performance impacted,
below performance data is collected by 'dd' with SPI-NOR flash on i.mx6dl
sabresd board:
mode write data read data
--PIO 194KB/s 644KB/s
--DMA normal
(SMC, tx_thresh=32) 222KB/s 1.4MB/s
--DMA(XCH, tx_thresh=0) 210KB/s 1.0MB/s
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 01be65fa5617aa192307ca38b6fc6128f3f0c3f7)
(cherry picked from commit 646a751a4d1d0e227a762b461d9b8f92605c26b1)
(cherry picked from commit b334993950)
Conflicts:
drivers/spi/spi-imx.c
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 52b04b9b51)
SPI IOMUX is changed into reset state in LPSR mode. As a result,
spi can't work again.
This patch sets spi IOMUX to default state.
(cherry-picked from commit 2c8603c318)
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 48de3eb17f)
This is done in preparation for low power mode. Convert all clk_enable
to clk_prepare_enable and clk_disable to clk_disable_unprepare. Make sure
PLL3 power down when entering low power mode.
Signed-off-by: Bai Ping <b51503@freescale.com>
(cherry picked from commit 1808b31fdae576e775159a05cde9b45e404bb6e2)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit a58ef0c6a2)
ERR009165 fix on i.mx6ul and next chip, such as i.mx6ull/i.mx8mq/i.mx8mm.
Remove workaround on those chips. Add new i.mx6ul type for that.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
This module introduces a memcpy DMA driver based on the DMA capabilities
of the CAAM hardware block. CAAM DMA is a platform driver that is only
probed if the device is defined in the device tree. The driver creates
a DMA channel for each JR of the CAAM. This introduces a dependency on
the JR driver. Therefore a defering mechanism was used to ensure that
the CAAM DMA driver is probed only after the JR driver.
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Rajiv Vishwakarma <rajiv.vishwakarma@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
DPPA2(Data Path Acceleration Architecture 2) qDMA supports
virtualized channel by allowing DMA jobs to be enqueued into
different work queues. Core can initiate a DMA transaction by
preparing a frame descriptor(FD) for each DMA job and enqueuing
this job through a hardware portal. DPAA2 components can also
prepare a FD and enqueue a DMA job through a hardware portal.
The qDMA prefetches DMA jobs through DPAA2 hardware portal. It
then schedules and dispatches to internal DMA hardware engines,
which generate read and write requests. Both qDMA source data and
destination data can be either contiguous or non-contiguous using
one or more scatter/gather tables.
The qDMA supports global bandwidth flow control where all DMA
transactions are stalled if the bandwidth threshold has been reached.
Also supported are transaction based read throttling.
Add NXP dppa2 qDMA to support some of Layerscape SoCs.
such as: LS1088A, LS208xA, LX2, etc.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
The MC(Management Complex) exports the DPDMAI(Data Path DMA Interface)
object as an interface to operate the DPAA2(Data Path Acceleration
Architecture 2) qDMA Engine. The DPDMAI enables sending frame-based
requests to qDMA and receiving back confirmation response on transaction
completion, utilizing the DPAA2 QBMan(Queue Manager and Buffer Manager
hardware) infrastructure. DPDMAI object provides up to two priorities for
processing qDMA requests.
The following list summarizes the DPDMAI main features and capabilities:
1. Supports up to two scheduling priorities for processing
service requests.
- Each DPDMAI transmit queue is mapped to one of two service
priorities, allowing further prioritization in hardware between
requests from different DPDMAI objects.
2. Supports up to two receive queues for incoming transaction
completion confirmations.
- Each DPDMAI receive queue is mapped to one of two receive
priorities, allowing further prioritization between other
interfaces when associating the DPDMAI receive queues to DPIO
or DPCON(Data Path Concentrator) objects.
3. Supports different scheduling options for processing received
packets:
- Queues can be configured either in 'parked' mode (default),
or attached to a DPIO object, or attached to DPCON object.
4. Allows interaction with one or more DPIO objects for
dequeueing/enqueueing frame descriptors(FD) and for
acquiring/releasing buffers.
5. Supports enable, disable, and reset operations.
Add dpdmai to support some platforms with dpaa2 qdma engine.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Clear EDMA_CH_INT in case dma done interrupt comes after channel terminated
instead of channel free-ed, otherwise, RCU maybe caught because it's
ignored without interrupt status cleared as Android team report in Monkey
test.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit ef91ff6ed465cebe2fe6483a480351abba36e237)
(cherry picked from commit 56ee55c71c)
Check dma desscription firstly to ignore any unexpected interrupt
after channel terminate, otherwise, still have chance to touch channel
register whose power has been already off.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
(cherry picked from commit fd073e017e)
Add power domains for each dma channel so that edma channel could
know the power state of every dma channel anytime and clear easily
unexpected interrupt which triggered before the last partition reset.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0b6da46b7b)
edma interrupt maybe happened during reboot or watchdog reset, meanwhile
gic never power down on i.mx8QM/QXP, thus the unexpect irq will come in
once edma driver request irq at probe phase. Unfortunately, at that time
that edma channel's power domain which power-up by customer driver such
as audio/uart driver may not be ready, so kernel panic triggered once
touch such edma registers which still not power up in interrupt handler.
Move request irq from probe to alloc dma channel so that edma channel's
power domain has already been powered, besides, clear meaningless
interrupt before request irq.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 0a0d8f8b94)
Do not enable interrupt in dev_2_dev with cyclic case, since in such
case no any interrupt needed. Otherwise many interrupt will come in
every 64 words transfered in ASRC case, which cause heavy system
loading.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f0a3172e1c)
Since the imx8qm/qxp hsio only supports up to 32bit
dma capability.
Add the 32bit dma limitation into dma binding document.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
There is one potential race condition in virt-dma framework as below:
terminate dma channel after the last dma done interrupt, but before
vchan_complete tasklet scheduled, thus the free-ed 'vd' (free in
fsl_edma3_terminate_all) maybe still be touched in vchan_complete()
which cause NULL pointer crash.
Kernel community noticed this issue and fix it at virt-dma level:
https://patchwork.kernel.org/patch/10057791/. To avoid backport too
much patches, set 'vc->cyclic = NULL' in terminate dma channel
interfaces to fix such issue easily.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 18c9083826400a2ef731496391a0b5e71d461a5f)
Add device_synchronize for edma driver, since some driver such as
Audio need it to make sure dma done callback never come out after
resource related with dma channel free-ed by Audio driver. Android
team report such issue on MA-12087.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 483519c063b08fc1ce0dd297b6c186799cf639d6)
(cherry picked from commit 29ab274aca01ef8f5fc70e8c0a6d43a5bdb3c689)
Avoid touch unused edma channel register in susped/resume, otherwise,
kernel crash if XRDC enabled in scfw.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit aa221c4aba34c6ce1ce5f561fa073bb8297cc0ff)
Fix below issue reported by Coverity, actually, don't need this
condition check here, remove it.
CID undefined (#1 of 1): Wrong operator used (CONSTANT_EXPRESSION_RESULT)operator_confusion:
(16UL /* 1UL << 4 */) | (__u16)(__le16)tcd->csr is always 1/true regardless of the values of its operand.
This occurs as the logical first operand of "&&".
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit ab942110975cadcde57ab1110df03f526bd3fec5)
Add suspend to save channel registers and resume to restore them back since
edmav3 may powered off in suspend.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 7eda1ae538ec7e7c0f993b3ea91805459f3dedd3)
Since there are multi edmav3 instances on i.mx8, every edma channel name
is better unique.But so far, all edma channel name is 'edma-channel(id)-
tx',thus some edma channels which share the same channel id but different
edma instance will show the same channel name in kernel and this is not
friendly to debug in kernel.
Now the edma channel name(interrupt-names property) is define in dts
as below:
"edmaX-chanX-Xx"
| | |---> receive/transmit, r or t
| |---> channel id, the max number is 32
|---> edma controller instance, 0, 1, 2,..etc
and get below correct name with 'cat /proc/interrupts':
43: 0 0 0 0 GICv3 466 Level edma0-chan8-rx
44: 0 0 0 0 GICv3 467 Level edma0-chan9-tx
45: 79 0 0 0 GICv3 468 Level edma0-chan10-rx
46: 311 0 0 0 GICv3 469 Level edma0-chan11-tx
47: 0 0 0 0 GICv3 470 Level edma0-chan12-rx
48: 0 0 0 0 GICv3 471 Level edma0-chan13-tx
49: 0 0 0 0 GICv3 472 Level edma0-chan14-rx
50: 0 0 0 0 GICv3 473 Level edma0-chan15-tx
51: 0 0 0 0 GICv3 406 Level edma2-chan0-tx
52: 0 0 0 0 GICv3 407 Level edma2-chan1-tx
53: 0 0 0 0 GICv3 408 Level edma2-chan2-tx
54: 0 0 0 0 GICv3 409 Level edma2-chan3-tx
55: 0 0 0 0 GICv3 410 Level edma2-chan4-tx
56: 0 0 0 0 GICv3 411 Level edma2-chan5-tx
57: 0 0 0 0 GICv3 442 Level edma2-chan6-rx, edma2-chan7-tx
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit af8e197a92c9c024ec4fbfcf543d744e81748773)
There is Audio dual fifo cause that fill fifo one by one and
loop back after every minor loop:
-- fill the first 32bit width fifo
-- fill the next 32bit width fifo
-- +MLOFF signed offset after the above two FIFOs filled
-- loop back to the first step to handle the next minor loop.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 5aa5e9663bb3a834444b75ea086bef8c37ecb636)
For dual fifo case, fsl-edma-v3 need add another cell. It's not friendly
for user and it's possible other cells maybe added to other use cases,
so combine two cells into one now, and for some special use cases such as
dual fifo property can directly be passed by one bit of cell3 rather than
another cell.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 3ecd1b3382e2c746728842fb2c084fbb030eb5de)
Below described in RM, otherwise, channel error status(CHa_ES)
may be triggered:
The user must clear the CHa_CSR[DONE] bit before writing the
TCDa_CSR[MAJORELINK] or TCDa_CSR[ESG] bits.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit c4164d0a15306174056c6ff423ba2408dd901fcf)
update fsl_edma_v3 document for #dma-cell is changed
one more cell is added, which is for local/remote access.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 65543fb7fefbdb7df4cb60931a88f61507c5073f)
The parameter is "is_remote", which is to use remote access for
edma, the default access is local access.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit eee976b30b0523680f30e762742984f5b5a01b97)
Correct data size of channel context which would be save and restore back
during suspend/resume. Otherwise, potential memory break may come as
USB met.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Reported-by: Jun Li <jun.li@nxp.com>
Tested-by: Jun Li <jun.li@nxp.com>
update sdma script for multi fifo SAI on i.mx8MQ. Besides,Add
new cell for sw_done/sw_done_selector, because PDM need enable
software done feature in sdma script(same multi fifo script).
The new fourth cell defined as below:
Bit31: sw_done
Bit15~bit0: selector
For example: 0x80000000 means sw_done enabled for done0 sector which
is for PDM on i.mx8mm.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
As SSI has dual fifo, add src_dualfifo and dst_dualfifo in imx_dma_data
to support dual fifo in DMA_DEV_TO_DEV.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit cfde1308f170166a0099ca39ee8733895f9626f0)
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
(cherry picked from commit 0ea90e5f83)
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
On i.mx6sx or i.mx7d chip, megafast could be off in suspend which
means sdma controller will be power-ed off, thus sdma driver
should resume back including firmware loaded again.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: fix rebase conflict ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Allocate memory from SoC internal SRAM so that we can turn off
voltage of external DDR to save power if 'iram' property in dts.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
For syncing with unstreaming kernel on UART driver from 4.19 changed
to rom script for uart rx path, and the compatiblity of legacy kernel
using ram script, add both uart rom and ram script support, so add
rom script address.
ram script:
uart_2_mcu_fix_addr
uartsh_2_mcu_fix_addr /* through spba bus */
rom script:
uart_2_mcu_addr
uartsh_2_mcu_addr /* through spba bus */
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
check ignore such special case without dma channel enabled, which caused
ecspi1 rx works failed. Actually, no need to check event_id0, checking
event_id1 is enough for DEV_2_DEV case because it's so lucky that event_id1
never be 0.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
ECSPI issue fixed from i.mx6ul at hardware level, no need
ERR009165 anymore on those chips such as i.mx8mq. Add i.mx6sx
from where i.mx6ul source.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Since sdma_transfer_init() will do sdma_load_context before any
sdma transfer, no need once more in sdma_config_channel().
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
update sdma script for multi fifo SAI on i.mx8MQ.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: fix build error ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
In order to support multi-fifo sdma script, the audio driver need to send
the fifo number to dma driver through dma_slave_config, so add src_fifo_num
and dst_fifo_num two new variable for struct dma_slave_config.
src_fifo_num: bit 0-7 is the fifo number, bit:8-11 is the fifo offset;
dst_fifo_num: same as src_fifo_num
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Robin Gong<yibin.gong@nxp.com>
update mxs-dma filter function to firstly filter the dma channels only
for mxs-dma, rather than checking unrelated dma chans in following code.
Signed-off-by: Han Xu <han.xu@nxp.com>
The race condition is on ctx->dht_needed, this variable indicates if the
decoder operates in one stage (decode) or two stages (inject default
Huffman table + decode).
While decoding the current buffer, and before the IP finishes it, a new
buffer in enqueued, jpeg parse begins, initializes ctx->dht_needed with
true, and does not get to finish parsing the jpeg headers. In the
meantime, the IP finishes decoding the current buffer and checks for
ctx->dht_needed, and believes it needs to run again the IP to finish
the job, which is wrong and gets the IP stuck.
This dht_needed property should be per buffer, not per context, so, add
a custom structure for the source buffer, struct mxc_jpeg_src_buf, and
don't forget to tell v4l2 core about its size, in mxc_jpeg_queue_init.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
(cherry picked from commit 4601417e95d35e995e0d8347b8464090a511db0d)
WARNING: "mxc_jpeg_tracing" [drivers/media/platform/imx8/mxc-jpeg-encdec]
is a static EXPORT_SYMBOL
While at it, add description for module parameter jpeg_tracing.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
The stracpy function exists in next-20190809 but not in v5.4. Replace
with strscpy to fix the build
The stracpy function was apparently rejected by Linus:
https://lkml.org/lkml/2019/8/20/1286
Fixes: fa00960c5659 ("mxc-jpeg: Add v4l2 driver for i.MX8 CAST IP JPEG Encoder/Decoder")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
For now, only mxc-jpeg is present in imx8 folder,
modify the corresponding Kconfig entry for it.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
(cherry picked from commit 1ef7d078d7bef7f24d9f4adeea603ec11afb1881)
Attach the power domains in probe, detach in remove.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
(cherry picked from commit 5b766aa74094e73875282c110e0824e92af6c93e)
This IP is present in i.MX 8QuadMax and i.MX 8DualX/8DualXPlus/8QuadXPlus
application processors.
The mxc-jpeg driver creates two v4l2 file handles in /dev, one for the
decoder, and one for the encoder, which can be used by v4l2 programs.
The multi-planar buffers API is used.
Baseline and extended sequential jpeg decoding is supported.
Progressive jpeg decoding is not supported by the IP.
Supports encode and decode of various formats:
YUV444, YUV422, YUV420, RGB, ARGB, Gray
YUV420 is the only multi-planar format supported.
Minimum resolution is 64 x 64, maximum 8192 x 8192.
The alignment requirements for the resolution depend on the format,
multiple of 16 resolutions should work for all formats.
Special workarounds are made in the driver to support NV12 1080p.
When decoding, the driver detects image resolution and pixel format
from the jpeg stream, parsing the jpeg markers.
The mxc-jpeg driver was tested to work with gstreamer & NXP gst plugins
for jpeg encoder/decoder.
The IP has 4 slots available for context switching, but only slot 0
was fully tested to work. Context switching is not used by the driver.
Each driver instance (context) allocates a slot for itself, but this
is postponed util device_run, to allow unlimited opens.
The driver submits jobs to the IP by setting up a descriptor for the
used slot, and then validating it. The encoder has an additional descriptor
for the configuration phase. The driver expects FRM_DONE interrupt from
IP to mark the job as finished.
The decoder IP has some limitations regarding the component ID's,
but the driver works around this by replacing them in the jpeg stream.
A module parameter is available for debug purpose: jpeg_tracing
The v4l2-compliance basic tests are passing on decoder/encoder nodes.
The driver builds fine as builtin or module.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Signed-off-by: Zhengyu Shen <zhengyu.shen_1@nxp.com>
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>, Frank Li <Frank.Li@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
(cherry picked from commit 4450ab9207122e885c4b3ad877db3f8163e9ce7f)
MAX9286 is a quad 1.5Gbps GMSL Deserializer with Coax or STP Input
and CSI-2 Output. Add driver support for it.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: Kconfig & Makefile update for a clean base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
- use v4l2_async_notifier_add_subdev for subdev registration on notification
- vidioc_cropcap/vidioc_s_crop/vidioc_g_crop not used anymore,
- vdev->device_caps need to be set
Signed-off-by: Robby Cai <robby.cai@nxp.com>
add v4l2 capture driver based on csi, which is used by
iMX 6UL/6ULL/6SX/6SL/6SLL(parallel), and iMX7D/M850(mipi).
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
VSYNC signal trigger before a frame end when ov5640 work at MIPI
mode. It leads to the first frame content only hav some lines of
image. I tried many configuration and finally have the patch to
fix the issue. My thought is suspending sensor when update its
registers and resume after update.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
When setting ov5640 to XGA, 720P, 1080P and 2592x1944 at DVP mode,
receiver can't get data from sensor. After trying many configuration,
I found 0x3824[1] need to be set to control divide DVP PCLK and do
software power-down when configure sensor to XGA and 720P.
For 1080P and 2592x1944, sensor don't support 30fps. So return NULL
when user try to get 1080P@30 and 2592x1944@30fps.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
in 5451781dad commit, it added the check that
the regulator need to be disabled before calling regulator_put().
If not do so, the kernel will print warning message as below.
To fix this, need to disable regulator before probe function return if the
camera's not found. regulator_put() will be called when probe fails in this case
as devm_regulator_get() already called in probe function.
[ 1482.424157] camera ov5640 is not found
[ 1482.428022] ------------[ cut here ]------------
[ 1482.433070] WARNING: CPU: 0 PID: 697 at drivers/regulator/core.c:2039 _regulator_put.part.4+0x100/0x120
[ 1482.442566] Modules linked in: ov5640_camera_v2(+) v4l2_int_device mx6s_capture galcore(O) [last unloaded: ov5640_camera_int]
[ 1482.453990] CPU: 0 PID: 697 Comm: modprobe Tainted: G O 5.3.0-rc3-next-20190809-5.3-warrior-next+g1dc2946 #1
[ 1482.465136] Hardware name: Freescale i.MX6 SoloX (Device Tree)
[ 1482.471007] [<c0112868>] (unwind_backtrace) from [<c010cd9c>] (show_stack+0x10/0x14)
[ 1482.478781] [<c010cd9c>] (show_stack) from [<c0cec834>] (dump_stack+0xd8/0x110)
[ 1482.486116] [<c0cec834>] (dump_stack) from [<c01362c4>] (__warn.part.3+0xa8/0xe8)
[ 1482.493620] [<c01362c4>] (__warn.part.3) from [<c013645c>] (warn_slowpath_null+0x40/0x4c)
[ 1482.501824] [<c013645c>] (warn_slowpath_null) from [<c05e6868>] (_regulator_put.part.4+0x100/0x120)
[ 1482.510894] [<c05e6868>] (_regulator_put.part.4) from [<c05e68b4>] (regulator_put+0x2c/0x3c)
[ 1482.519356] [<c05e68b4>] (regulator_put) from [<c06dd210>] (release_nodes+0x1ac/0x1f8)
[ 1482.527298] [<c06dd210>] (release_nodes) from [<c06d8cb0>] (really_probe+0x104/0x340)
[ 1482.535151] [<c06d8cb0>] (really_probe) from [<c06d9098>] (driver_probe_device+0x84/0x194)
[ 1482.543436] [<c06d9098>] (driver_probe_device) from [<c06d938c>] (device_driver_attach+0x58/0x60)
[ 1482.552329] [<c06d938c>] (device_driver_attach) from [<c06d93ec>] (__driver_attach+0x58/0xd0)
[ 1482.560875] [<c06d93ec>] (__driver_attach) from [<c06d70b8>] (bus_for_each_dev+0x70/0xb4)
[ 1482.569073] [<c06d70b8>] (bus_for_each_dev) from [<c06d80e4>] (bus_add_driver+0x198/0x1d0)
[ 1482.577358] [<c06d80e4>] (bus_add_driver) from [<c06da078>] (driver_register+0x74/0x108)
[ 1482.585474] [<c06da078>] (driver_register) from [<c088b238>] (i2c_register_driver+0x38/0x84)
[ 1482.593937] [<c088b238>] (i2c_register_driver) from [<c0103078>] (do_one_initcall+0x80/0x338)
[ 1482.602486] [<c0103078>] (do_one_initcall) from [<c01e163c>] (do_init_module+0x5c/0x238)
[ 1482.610598] [<c01e163c>] (do_init_module) from [<c01e3b00>] (load_module+0x2260/0x256c)
[ 1482.618623] [<c01e3b00>] (load_module) from [<c01e4060>] (sys_finit_module+0xbc/0xdc)
[ 1482.626473] [<c01e4060>] (sys_finit_module) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
[ 1482.634666] Exception stack(0xec0f5fa8 to 0xec0f5ff0)
[ 1482.639737] 5fa0: 00000000 00000000 00000003 00028e44 00000000 01602408
[ 1482.647933] 5fc0: 00000000 00000000 00040000 0000017b 00000000 00000000 00000000 01602630
[ 1482.656127] 5fe0: beb158f0 beb158e0 0001fdb4 b6f1f510
[ 1482.661324] irq event stamp: 3497
[ 1482.664677] hardirqs last enabled at (3505): [<c019be00>] console_unlock+0x418/0x5f4
[ 1482.672612] hardirqs last disabled at (3522): [<c019ba70>] console_unlock+0x88/0x5f4
[ 1482.680451] softirqs last enabled at (3538): [<c01024e4>] __do_softirq+0x2c4/0x514
[ 1482.688136] softirqs last disabled at (3531): [<c013da4c>] irq_exit+0x100/0x188
[ 1482.695530] ---[ end trace e580778621876135 ]---
Signed-off-by: Robby Cai <robby.cai@nxp.com>
in 5451781dad commit, it added the check that
the regulator need to be disabled before calling regulator_put().
If not do so, the kernel will print warning message as below.
To fix this, need to disable regulator before probe function return if the
camera's not found. regulator_put() will be called when probe fails in this case
as devm_regulator_get() already called in probe function.
[ 11.444811] ------------[ cut here ]------------
[ 11.444866] WARNING: CPU: 1 PID: 317 at drivers/regulator/core.c:2039 _regulator_put.part.4+0x100/0x120
[ 11.444881] Modules linked in: ov5640_camera_mipi_int(+) ov5640_camera_int(+) v4l2_int_device
[ 11.444949] CPU: 1 PID: 317 Comm: systemd-udevd Tainted: G W O 5.3.0-rc3-next-20190809-02774-g6e085ec #18
[ 11.444965] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[ 11.445008] [<c0112868>] (unwind_backtrace) from [<c010cd9c>] (show_stack+0x10/0x14)
[ 11.445047] [<c010cd9c>] (show_stack) from [<c0d26ad4>] (dump_stack+0xd8/0x110)
[ 11.445081] [<c0d26ad4>] (dump_stack) from [<c01362c4>] (__warn.part.3+0xa8/0xe8)
[ 11.445107] [<c01362c4>] (__warn.part.3) from [<c013645c>] (warn_slowpath_null+0x40/0x4c)
[ 11.445143] [<c013645c>] (warn_slowpath_null) from [<c05e6520>] (_regulator_put.part.4+0x100/0x120)
[ 11.445177] [<c05e6520>] (_regulator_put.part.4) from [<c05e656c>] (regulator_put+0x2c/0x3c)
[ 11.445213] [<c05e656c>] (regulator_put) from [<c06dce90>] (release_nodes+0x1ac/0x1f8)
[ 11.445247] [<c06dce90>] (release_nodes) from [<c06d8968>] (really_probe+0x104/0x340)
[ 11.445266] [<c06d8968>] (really_probe) from [<c06d8d50>] (driver_probe_device+0x84/0x194)
[ 11.445281] [<c06d8d50>] (driver_probe_device) from [<c06d9044>] (device_driver_attach+0x58/0x60)
[ 11.445295] [<c06d9044>] (device_driver_attach) from [<c06d90a4>] (__driver_attach+0x58/0xd0)
[ 11.445308] [<c06d90a4>] (__driver_attach) from [<c06d6d70>] (bus_for_each_dev+0x70/0xb4)
[ 11.445322] [<c06d6d70>] (bus_for_each_dev) from [<c06d7d9c>] (bus_add_driver+0x198/0x1d0)
[ 11.445337] [<c06d7d9c>] (bus_add_driver) from [<c06d9d30>] (driver_register+0x74/0x108)
[ 11.445355] [<c06d9d30>] (driver_register) from [<c088ae30>] (i2c_register_driver+0x38/0x84)
[ 11.445394] [<c088ae30>] (i2c_register_driver) from [<bf01b010>] (ov5640_init+0x10/0x1000 [ov5640_camera_mipi_int])
[ 11.445442] [<bf01b010>] (ov5640_init [ov5640_camera_mipi_int]) from [<c0103078>] (do_one_initcall+0x80/0x338)
[ 11.445482] [<c0103078>] (do_one_initcall) from [<c01e163c>] (do_init_module+0x5c/0x238)
[ 11.445512] [<c01e163c>] (do_init_module) from [<c01e3b00>] (load_module+0x2260/0x256c)
[ 11.445535] [<c01e3b00>] (load_module) from [<c01e4060>] (sys_finit_module+0xbc/0xdc)
[ 11.445550] [<c01e4060>] (sys_finit_module) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
[ 11.445559] Exception stack(0xed885fa8 to 0xed885ff0)
[ 11.445571] 5fa0: 00000000 00000000 00000007 b6f167e8 00000000 007f2e78
[ 11.445583] 5fc0: 00000000 00000000 beebbddc 0000017b 00000000 00000000 beebbda0 007f0890
[ 11.445593] 5fe0: beebbd08 beebbcf8 b6f0ed84 b6d81510
[ 11.445604] irq event stamp: 19099
[ 11.445618] hardirqs last enabled at (19105): [<c019d9f4>] vprintk_emit+0x294/0x2c8
[ 11.445629] hardirqs last disabled at (19110): [<c019d884>] vprintk_emit+0x124/0x2c8
[ 11.445641] softirqs last enabled at (18974): [<c01024e4>] __do_softirq+0x2c4/0x514
[ 11.445657] softirqs last disabled at (18917): [<c013da4c>] irq_exit+0x100/0x188
[ 11.445666] ---[ end trace 13b19ccc3a78aa48 ]---
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 5c9b5de893eda4e328d1b72a244fe790efaddd54)
in 5451781dad commit, it added the check that
the regulator need to be disabled before calling regulator_put().
If not do so, the kernel will print warning message as below.
To fix this, need to disable regulator before probe function return if the
camera's not found. regulator_put() will be called when probe fails in this case
as devm_regulator_get() already called in probe function.
[ 11.342219] ------------[ cut here ]------------
[ 11.347211] WARNING: CPU: 0 PID: 314 at drivers/regulator/core.c:2039 _regulator_put.part.4+0x100/0x120
[ 11.356861] Modules linked in: ov5640_camera_mipi_int(+) ov5640_camera_int(+) v4l2_int_device
[ 11.365604] CPU: 0 PID: 314 Comm: systemd-udevd Tainted: G W O 5.3.0-rc3-next-20190809-02774-g6e085ec #18
[ 11.376346] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[ 11.382947] [<c0112868>] (unwind_backtrace) from [<c010cd9c>] (show_stack+0x10/0x14)
[ 11.390758] [<c010cd9c>] (show_stack) from [<c0d26ad4>] (dump_stack+0xd8/0x110)
[ 11.398120] [<c0d26ad4>] (dump_stack) from [<c01362c4>] (__warn.part.3+0xa8/0xe8)
[ 11.405636] [<c01362c4>] (__warn.part.3) from [<c013645c>] (warn_slowpath_null+0x40/0x4c)
[ 11.414007] [<c013645c>] (warn_slowpath_null) from [<c05e6520>] (_regulator_put.part.4+0x100/0x120)
[ 11.414045] [<c05e6520>] (_regulator_put.part.4) from [<c05e656c>] (regulator_put+0x2c/0x3c)
[ 11.414063] [<c05e656c>] (regulator_put) from [<c06dce90>] (release_nodes+0x1ac/0x1f8)
[ 11.414082] [<c06dce90>] (release_nodes) from [<c06d8968>] (really_probe+0x104/0x340)
[ 11.414097] [<c06d8968>] (really_probe) from [<c06d8d50>] (driver_probe_device+0x84/0x194)
[ 11.414112] [<c06d8d50>] (driver_probe_device) from [<c06d9044>] (device_driver_attach+0x58/0x60)
[ 11.414126] [<c06d9044>] (device_driver_attach) from [<c06d90a4>] (__driver_attach+0x58/0xd0)
[ 11.414141] [<c06d90a4>] (__driver_attach) from [<c06d6d70>] (bus_for_each_dev+0x70/0xb4)
[ 11.414154] [<c06d6d70>] (bus_for_each_dev) from [<c06d7d9c>] (bus_add_driver+0x198/0x1d0)
[ 11.414168] [<c06d7d9c>] (bus_add_driver) from [<c06d9d30>] (driver_register+0x74/0x108)
[ 11.414186] [<c06d9d30>] (driver_register) from [<c088ae30>] (i2c_register_driver+0x38/0x84)
[ 11.414203] [<c088ae30>] (i2c_register_driver) from [<c0103078>] (do_one_initcall+0x80/0x338)
[ 11.414223] [<c0103078>] (do_one_initcall) from [<c01e163c>] (do_init_module+0x5c/0x238)
[ 11.414236] [<c01e163c>] (do_init_module) from [<c01e3b00>] (load_module+0x2260/0x256c)
[ 11.414250] [<c01e3b00>] (load_module) from [<c01e4060>] (sys_finit_module+0xbc/0xdc)
[ 11.414263] [<c01e4060>] (sys_finit_module) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
[ 11.414272] Exception stack(0xeda6bfa8 to 0xeda6bff0)
[ 11.414284] bfa0: 00000000 00000000 0000000f b6f167e8 00000000 007ecba0
[ 11.414297] bfc0: 00000000 00000000 beebbddc 0000017b 00000000 00000000 beebbda0 007f7db0
[ 11.414307] bfe0: beebbd08 beebbcf8 b6f0ed84 b6d81510
[ 11.414423] irq event stamp: 16217
[ 11.414445] hardirqs last enabled at (16223): [<c019d9f4>] vprintk_emit+0x294/0x2c8
[ 11.414458] hardirqs last disabled at (16228): [<c019d884>] vprintk_emit+0x124/0x2c8
[ 11.414472] softirqs last enabled at (16192): [<c01024e4>] __do_softirq+0x2c4/0x514
[ 11.414489] softirqs last disabled at (16137): [<c013da4c>] irq_exit+0x100/0x188
[ 11.414498] ---[ end trace 13b19ccc3a78aa43 ]---
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 14d7e9fc1249f8d8ed81743c42e157fcd6598ac9)
ov5640 module supports both mipi and parallel interface.
The driver is based on subdev framework.
The driver is used on 6UL/6ULL/6SX/6SL/6SLL/7D EVK or SabreSD board.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
ov5640 module supports both mipi and parallel interface.
The driver is based on int device framework.
The driver is used on imx6qdl Sabresd boads.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Save the width and height info of new mode to sensor format data
in order to get the info by G_FMT ioctl command
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Add link_setup callback for ov5640 sensor entity ops.
In some cases, driver will call the related entity ops
to notify the link setup events
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
CI_PI module which is used for capture parallel interface in
imx8qxp platform. Add v4l2 subdev driver for it.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: Kconfig & Makefile update for a clean base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
add mixel's mipi csi driver, which is used on imx8mq.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit bc1d9b215f5c9374dcf9b949df83d939038962bd)
ISI is an image sensor interface which used to process image data from
camera sensor or memory. Add ISI V4L2 memory to memory function driver
for it.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
ISI is an image sensor interface which used to process image data from
camera sensor or memory. Add ISI capture function driver for it.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Because ISI can be used to capture data from camera or memory.
Split ISI driver to two parts. One for ISI core and hardware, the
other is for ISI capture function. Core driver will create virtual
device for them and be shared by capture and memory to memory driver.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
API change due to commit:
7e98b7b542 ("media: v4l2: Get rid of ->vidioc_enum_fmt_vid_{cap, out}_mplane")
../drivers/staging/media/imx/imx8-isi-cap.c:1211:2: error: unknown field ‘vidioc_enum_fmt_vid_cap_mplane’ specified in initializer
.vidioc_enum_fmt_vid_cap_mplane = mxc_isi_cap_enum_fmt_mplane,
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
ISI is an image sensor interface which used to process
image data from camera sensor and then transfer to DC
or memory.
Add V4L2 Capture subdev driver support for it.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: Kconfig & Makefile update for a clean base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The added format is V4L2_PIX_FMT_YUV24, this is a packed
YUV 4:4:4 format, with 8 bits for each component, 24 bits
per sample.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
[ Aisheng : fix minor conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Android has RGBA format output but V4L2 framework do not have this format
.In order to support this in our mem2mem driver, we need to extend V4L2
format.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
(cherry picked from commit 24c970a517)
Only add uapi part to help yocto build
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
This reverts commit b71c99801e.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
(cherry picked from commit 5c74966c0e7deb0ac84b3fa8a84c6c942e7d434f)
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Conflicts:
drivers/media/v4l2-core/v4l2-ioctl.c
Configure the display Quality of service (QoS) levels priority if the
optional property node "arm,malidp-aqros-value" is defined in DTS file.
QoS signaling using AQROS and AWQOS AXI interface signals, the AQROS is
driven from the "RQOS" register, so needed to program the RQOS register
to avoid the high resolutions flicker issue on the LS1028A platform.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Add optional property node 'arm,malidp-arqos-value' for the Mali DP500.
This property describe the ARQoS levels of DP500's QoS signaling.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This patch fixes a "NULL pointer dereference" in DTRC exit routine.
Also, it removes a couple of defines used for tracing that are no longer
needed.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
The DTRC module triggers an interrupt when each bank finished processing. So,
they are needed if video compressed formats are to be played.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Video tiled formats are handled by the DTRC (Decompression and Tiled to Raster
Conversion) module. This patch allows playback of VPU tiled formats.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This patch will adjust the HDR10 LUTs/CSCs depending on how userspace sets
color encoding and color range.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
The properties will be used by userspace to configure the video planes' color
encoding and/or range.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This patch will allow DCSS to configure the pipes accordingly when 10 bit NV12
packed format is received from VPU.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
In order to be able to spread the DDR bandwidth over the entire duration of the
frame, when scaling down to lower downscale ratios, WRSCL/RDSRC should be used.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
iMX8MQ DCSS has one graphics plane and 2 overlay video planes. This patch adds
support for HDR10 module which will handle the 3 pipes' blending based on LUTs
and CSCs.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This patch adds support in DCSS for Vivante tiled-compressed buffers.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
The 27MHz external oscillator offers a high precision low jitter clock and
is suitable for high pixel clocks modes(ie 4K@60).
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here:
https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM
The current patch adds only basic functionality: one primary plane for
graphics, linear, tiled and super-tiled buffers support (no graphics
decompression yet), no HDR10 and no video planes.
Video planes support and HDR10 will be added in subsequent patches once
per-plane de-gamma/CSC/gamma support is in.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without needing
to set DRM_IMX.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This reverts commit 345c0451efbccdf4561e848ebb84942e8a658d31.
This is reverted in order to add the driver that was sent on the LKML mailing
list.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This reverts commit 78034aa7ca2b28ca2bcda6ddeabc19cebb88c7df.
This is reverted in order to add the driver that was sent on the LKML mailing
list.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
This reverts commit 6dc6cbdf24b4863ed8f213604dc98bf4cba1b94f.
This is reverted in order to add the driver that was sent on the LKML mailing
list.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
The bit DIV0 of register STORE9_STATIC is used as a control bit
to fix the unsynchronization issue bewteen two display streams
in FrameGen side-by-side mode, which is introduced from an ECO
operation for the display controller. The bit has to be one
when the side-by-side mode is enabled. And, it has to be zero
when the mode is disabled, otherwise, a single display stream
cannot startup correctly. Since the DPU common driver initializes
the register for us at the driver probe stage and system resume
stage, we may remove the same initialization logic of our own.
Without this patch, as the DPU blit engine DRM driver is resumed
relatively late, the bit would be overwritten to be zero at the
driver's ->resume() callback, which causes the display controller
cannot be correctly resumed from FrameGen side-by-side mode and
content ExtDst shadow load done event from the slave stream won't
come.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
video playback cause system hang with Wayland g2d compositor,
this also can be reproduced with Android G2D HWComposer.
the problem is second prg not handled between GPU and video.
need re-enable dprc & prg pipes when modifier changed.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 8ca7df5227)
auto-trigger cause dpr hang in inital blitter implementation,
the problem is dpr repeat mode has conflict with command sequencer.
as proposed by design, blitter need do manual trigger for each process:
dpr register -> dpr run -> seeris register -> seeris trigger -> sync
frstly this patch removed dprc first frame handler from dpu blitter,
then removed dpr repeat, and enable dpr run for each blit processing.
also add sync flag to avoid the duplicated calling to dpu_be_wait.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 04eb0533d5)
chrome browser hang is reproduced with mouse connected,
the first frame handler trigger the problem in below scenario:
tile (dprc-enable) --> linear (dprc->disable) --> tile (handle first frame wrongly).
need_handle_start is set following dprc_enable, need reset it with dprc_disable.
fix event trigger as previous implementation does not flush command sequence,
that will cause the obvious flicker when run glmark2 in full-screen.
also reduce bitter delay to 30us to improve blitter performance.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 9b5700a98e9b12b9d0119a67e45251a8d2405628)
resume will increase unlock counter, max allowed value is 15.
suspend need decrease unlock counter to avoid overflow panic.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 0582cd50ed)
(cherry picked from commit a9b740f91b05398564bf776e4f1959e44c876938)
Add struct drm_imx_dpu_frame_info.
Configure dprc to enable prefetch for dpu blit.
Configure prefetch with source frame info for dpu blit.
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
iMX8MQ has the ability to handle color depths up to 12bpc. This patch adds
support for higher color depths for various modes.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
If the userspace changes the connector Colorspace property, we need to force a
modeset, so that the entire pipeline is properly configured.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
iMX8MQ has the ability to adjust the DCSS output pipe gamut and nonlinearity
depending on the HDMI connector capability. Userspace can explicitly set this
property if it decides, based on EDID parsing, that the sink supports REC.2020
and it wants to switch when it plays HDR10 content.
Otherwise, the kernel will use the default settings specified in the HDMI
specifications.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
The HDR_OUTPUT_METADATA property is needed in order for userspace to instruct
the sink to switch to HDR10 mode.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
combine mode is supported by imx8qm DPU.
imx8qm HDMI could support full feature.
Remove the 1080p60 limition.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
DP need setup link training, and HDMI need reset hdmi sink SCDC
status after cable reconnected.
Add video mode_set function when cable plugin.
Add 20ms/50ms delay for hdmi/dp to waite FW stable.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Add muxtex lock to mhdp registers access functions
that could avoid race condition between cec thread and hdmi video.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
HDMI sink that only support HDMI1.4 is not support
SCDC read/write. Skip the SCDC write check and continue
HDMI initialize process.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Normally, DP/HDMI PHY use HPD_IRQ to monitor the connector connection
status, but LS1028A doesn't support HPD_IRQ signals response.
This patch allows periodically poll the connector for connection and
disconnection.
Signed-off-by: Wen He <wen.he_1@nxp.com>
move struct imx_mhdp_device to drm/imx folder.
change the base address name from regs to regs_base.
add mhdp bus access function.
uniform variable name.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Macro variable AFMT_SPDIF have renamed to AFMT_SPDIF_INT in headfile.
use the correct variable to fix build issue.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Move mhdp audio driver to cadence folder.
Add audio info-frame set function for hdmi tx audio.
The driver suppoer both HDMI and DP audio.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Add variable lane_mapping for hdmi.
Add new API function cdns_mhdp_bus_read/cdns_mhdp_bus_write,
cdns_mhdp_get_fw_clk and cdns_mhdp_infoframe_set.
Adjust some API function interface.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Changes made in the low level driver (cdn-dp-reg.*):
- moved it to from drivers/gpu/drm/rockchip to
drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c and
include/drm/bridge/cdns-mhdp-common.h
- functions for sending/receiving commands are now public
- added functions for reading registers and link training adjustment
Changes made in RK's driver (cdn-dp-core.*):
- Moved audio_info and audio_pdev fields from cdn_dp_device to
cdns_mhdp_device structure.
Signed-off-by: Quentin Schulz<quentin.schulz@free-electrons.com>
Signed-off-by: Piotr Sroka <piotrs@cadence.com>
Signed-off-by: Damian Kos <dkos@cadence.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
- Extracted common fields from cdn_dp_device to a new cdns_mhdp_device
structure which will be used by two separate drivers later on.
- Moved some datatypes (audio_format, audio_info,
vic_pxl_encoding_format, video_info) from cdn-dp-core.c to cdn-dp-reg.h.
- Changed prefixes from cdn_dp to cdns_mhdp cdn -> cdns to match the other Cadence's drivers
dp -> mhdp to distinguish it from a "just a DP" as the IP underneath this registers map can be a HDMI (which is
internally different, but the interface for commands, events is pretty much the same).
- Modified cdn-dp-core.c to use the new driver structure and new function names.
Signed-off-by: Damian Kos<dkos@cadence.com>
Reviewed-by: Andrzej Hajda<a.hajda@samsung.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
When we do set-par for background framebuffer without on-the-fly
flag being set, we should also unset the enabled overlay framebuffer's
on-the-fly flag, otherwise the overlay framebuffer cannot be enabled
again properly because a full mode set procedure is needed for overlay
framebuffer as it experiences a period of time when background
framebuffer stops fetching frames.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
HDCP function could work in other TVs
but it failed with Sony TV when run hdcp enable/disable stress test.
The TMDS clock is not detected by Sony TV.
The TV seems time sensitive for HDMI TMDS.
Add 20ms delay before TMDS enable make it work.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
FB events FB_EVENT_SUSPEND/FB_EVENT_RESUME
are remove in the kernel patch
commit 50c5056356
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Tue May 28 11:02:52 2019 +0200
fbdev: directly call fbcon_suspended/resume
Add these events back to support mxc hdmi fb driver.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
fb event FB_EVENT_FB_REGISTERED and FB_EVENT_FB_UNREGISTERED
are removed by kernel patch
commit 97b67986f1
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Tue May 28 11:02:41 2019 +0200
fbcon: call fbcon_fb_(un)registered directly
Add these two events back to support
mxc hdmi and sii90x hdmi fb driver.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
This patch forwards IPUv3 framebuffer driver from imx_4.19.y kernel.
[ Liu Ying: Fixed a minor build warning ]
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
DCSS needs active low VSYNC and HSYNC. Also, move the input selection in the
probe function, as this will not change at runtime.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
When used as module and the panel is not yet probed, the bridge attach
callback will return -EINVAL. We should return -EPROBE_DEFER instead, to
give us another shot.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
The clock-drop-level is needed in order to add more blanking space needed
by DSI panels when sending DSI commands. One level is the equivalent of
phy_ref rate from the PLL rate. Since the PLL rate is targeted as highest
possible, each level should not get the crtc_clock too low, compared to the
actual clock.
Example for a clock of 132M, with "clock-drop-level = <1>" in dts file will
result in a crtc_clock of 129M, using the following logic:
- video_pll rate to provide both phy_ref rate of 24M and pixel-clock
of 132M is 1056M (divisor /43 for phy_ref and /8 for pixel-clock)
- from this rate, we subtract the equivalent of phy_ref (24M) but
keep the same divisor. This way, the video_pll rate will be 1056 - 24 =
1032M.
- new pixel-clock will be: 1032 / 8 = 129M
For a "clock-drop-level = <2>", new pixel-clock will be:
(1056 - (24 * 2)) / 8 = 1008 / 8 = 126M
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
This patch adds support for a new clock 'video_pll' in order to better
set the video_pll clock to a clock-rate that satisfies a mode's clock.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
This adds initial support for the NWL MIPI DSI Host controller found on
i.MX8 SoCs.
It adds support for the i.MX8MQ but the same IP can be found on
e.g. the i.MX8QXP.
It has been tested on the Librem 5 devkit using mxsfb.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Co-developed-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
After the dispmix reset driver development, the reset flow
is better to be replaced by using this driver to hide the
reset details for all the dispmix submodules, and whose
driver code for reset can become platform independent.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit b1fd6e40a4)
When CONFIG_PM_SLEEP is disabled, the suspend and resume hooks
are implemented as dummy functions, but GCC will report below
build warnings:
drivers/gpu/drm/imx/sec_mipi_dsim-imx.c:324:12: warning: ‘imx_sec_dsim_suspend’ defined but not used [-Wunused-function]
static int imx_sec_dsim_suspend(struct device *dev)
^
drivers/gpu/drm/imx/sec_mipi_dsim-imx.c:329:12: warning: ‘imx_sec_dsim_resume’ defined but not used [-Wunused-function]
static int imx_sec_dsim_resume(struct device *dev)
^
So remove these dummy functions to avoid these build warnings.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
According to the design spec for IMX8MN platform, the GPR reset
module for DISPMIX has some changes. So the reset code should be
adjusted accordingly. This is a temporary solution and will be
improved later.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
During the DSIM binding stage, only enable cfg clock is not
enough to access the version register, since at this time,
if the DSIM is still in the reset state, the register read
will always return 0. So before the version register read,
the runtime pm should be in resume state.
(This is the DSIM controller driver part change.)
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
A fixed PLL PMS setting for attached panel is obviously not
enough for any other mipi panel which needs a different PLL
output clock frequency, and besides, for the CEA-861 standard
display modes, the 'pll_pms' table also can not cover all the
modes requirements. So a general way is created to solve this
problem which can provide an optimum solution to output a PLL
bit clock to match the request frequency in a maximum degree
and also satisfy the input clock and intermediate clocks limit
according to the PLL specification.
(This is the DSIM controller driver change for PLL PMS compute.)
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Since the DSIM's runtime PM suspend() and resume() callbacks
are also called during system PM suspend() and resume(), it
is necessary to use a counter to record the suspended depth,
and 'rpm_suspended' field can be used as this purpose which
can help to detect and avoid runtime suspend and resume calls
mismatch caused problems, by changing the 'rpm_suspended' to
be an atomic integer from a boolean type.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 91a8e6c8f63db328fbc752b1659bdaa67ee5c8d5)
The SEC provides a table to guide the DPHY TIMINGS config based
on the PLL output bit clock frequency for DSIM. So create the
table which is used by SEC LN14LPP DPHY with HS Timing v1.2 and
this table will be used by the SEC DSIM Bridge driver to help to
config the corresponding DPHY Timings correctly for each display
mode. Along with the table, a DPHY TIMING table entry 'compare'
method is implemented for the binary search when lookup the
suitable DPHY TIMING entry.
(This is the DSIM controller driver change for DPHY TIMING config
improvements.)
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Defer the PLL output check to the SEC DSIM Encoder's atomic check
from SEC DSIM Bridge's mode_fixup(), since in the attached DSI
device Bridge's mode_fixup(), it may change the data lanes number,
and this change is done after the SEC DSIM Bridge's mode_fixup().
And the DSIM Encoder's atomic check is the ideal place to do this
PLL check, since it happens after all the Bridges' mode_fixup()
done.
(This is the DSIM controller driver change for the PLL check.)
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Remove dphy slave reset and only keep master reset for mipi dsi
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 83f4a5a95262184759f1c99be46e8906dd24543b)
The connector's 'display_info' usually includes all the bus
formats the display peripheral device can be accepted. And
the DRM adjusted display mode's 'private_flags' includes
bus format the DSIM bridge requested according to the DSI
device display format. Add the bus format check to the DSIM
encoder's atomic check to make sure these two bus formats
have intersection.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6d804db82b95411ebad9fcfb43b3acecee5941d9)
Add runtime PM status check during runtime suspend and resume
to avoid unnecessary jobs if it is already in that state which
can avoid possible kernel warnings of clock disable/unprepare
mismatch during system suspend if it is alreay in runtime
suspended state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6f95c6fdc0de2fd4fe1d835c164f5e3cfb23e17d)
Implement the suspend()/resume() callbacks to support system
power management functions for SEC DSIM.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit db3e9faa0278af6de5aaac008478123d0ebecb73)
After the DISPMIX power domain enabled, all the related registers
will drop their values once runtime pm suspend called. So in the
pm runtime resume process, the SEC DSIM de-reset and some init jobs
need to be done, and these jobs are no longer necessary to be done
during probe bind anymore.
(This is the platform driver part change for power domain support.)
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 7a7f17f5fb66135629ef20a2b4780dfef2f0f0ce)
The Samsung DSIM host driver mainly focuses on the config
related with soc platforms. And the controller itself config
has been moved to the sec-dsim bridge driver.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This patch adds support for Japan Display Inc. 10.1" TX26D202VM0BWA
WUXGA(1920x1200) TFT LCD panel with LVDS interface.
The panel has dual LVDS channels.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The JDI TX26D202VM0BWA LCD panel is a 10.1" panel
with a 1920x1200 (WUXGA) resolution.
The panel has dual LVDS channels.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The flag MIPI_DSI_CLOCK_NON_CONTINUOUS was wrong used in the DSI driver,
so it was added to this panel, but not neccesary.
So, remove this flag since it is not needed.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
When CONFIG_OF_DYNAMIC is used, and this driver is enabled in
devicetree, but fails to probe a physical i2c client, it should disable
it's remote endpoint, so that the DRM master device won't fail to bind
the other available devices.
Usually, the remote endpoint of this device is a DRM encoder. If a DRM
encoder fails to bind, the DRM master device will also fail to bind.
This is why, we should disable the encoder node dynamically in
devicetree.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Configure 'FORCEBTA' mandatorily for every packet send may
cause some packet send timeout in a low possibility. And
until now, this timeout issue only happens during panel
disable callback with the below error log:
"
imx_sec_dsim_drv 32e10000.mipi_dsi: wait pkthdr tx done time out
panel-raydium-rm67191 32e10000.mipi_dsi.0: [drm:rad_panel_disable] *ERROR* Failed to enter sleep mode (-16)
imx_sec_dsim_drv 32e10000.mipi_dsi: panel disable failed: -16
panel-raydium-rm67191 32e10000.mipi_dsi.0: [drm:rad_panel_unprepare] *ERROR* Panel still enabled!
imx_sec_dsim_drv 32e10000.mipi_dsi: panel unprepare failed: -1
"
The root cause for this error is not clear, but remove
'FORCEBTA' can avoid it and won't cause any side effect.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 8116960876)
According to the test, the Low Power Mode config should be
done before the Long Packet payload is written to SFR FIFO.
Otherwise, the packet send out by DSIM is not correct. This
should be the DSIM implementation behaviour.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit c7833c3920)
Since the dsi panel device is not a component, so its driver
loading can be before or after the other display components
binding randomly. So add defer probing for sec dsim bridge
attach to support the case that the panel driver is loaded
after sec dsim binding.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
According to the Analog Devices configuration script, there are some
steps that need to be made when configuring the ADV for a specific mode.
Some of those steps were missing from driver, so this patch takes care
of this.
Also, in mode_fixup, the driver is trying to reconfigure the DSI lanes
from 4 to 3, when pixel clock is lower than 80MHz, which is not
necessary. the lanes property represents the maximum available lanes on
that devices and should not differ from a mode to another.
The DSI host is the one who should predict how many lanes it could use
to drive a display mode, so remove this from ADV driver.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Add debug information for the HDP event catched with i2c interrupt.
Also, simplify the code in adv7511_hpd_work.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
The DSI-HDMI converter, ADV7535, driver uses four i2c memory maps: MAIN,
DSI-CEC, EDID and PACKET.
While the MAIN address is hard-coded in the ROM chip, the other three
can be programmed into the MAIN memory map.
Currently, the three memory maps addresses, that can be programmed, are
hard-coded into the code.
In order to avoid conflicts with other i2c clients on the bus, update
the driver to use configurable addresses specified in DTS file.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Add a new property "adi,dsi-channel" to allow the user specify the DSI
channel to be used when communicating with DSI peripheral.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
When CONFIG_OF_DYNAMIC is used, and this driver is enabled in
devicetree, but fails to probe a physical i2c client, it should disable
it's remote endpoint, so that the DRM master device won't fail to bind
the other available devices.
Usually, the remote endpoint of this device is a DRM encoder. If a DRM
encoder fails to bind, the DRM master device will also fail to bind.
This is why, we should disable the encoder node dynamically in
devicetree.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
For a proper initialization of the crtc driving the connector for this
bridge, we need to set the bus_formats and bus_flags of the connector's
display_info.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
The low refresh rate register for ADV7535 is in 0x4A instead of 0xFB. In
order to correctly handle these differences, add the new type ADV7535.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Added "adi,adv7535" to the adv7511 drm bridge and adi,adv7511.txt doc,
since the driver can also support the ADV7535 chipset (upgrade of ADV7533).
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
The 'pll_pms' data is allocated dynamically and it should be
freed after its usage is done explicitly, otherwise there is
a serious memory leak problem, since this data allocation
frequency is really high during video playback and graphic
cases running.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
During the DSIM binding stage, only enable cfg clock is not
enough to access the version register, since at this time,
if the DSIM is still in the reset state, the register read
will always return 0. So before the version register read,
the runtime pm should be in resume state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
If enable CONFIG_DYNAMIC_DEBUG, below maybe-uninitialized build
warnings happen:
"
In file included from ./include/linux/printk.h:336:0,
from ./include/linux/kernel.h:14,
from ./include/linux/unaligned/access_ok.h:5,
from ./include/asm-generic/unaligned.h:13,
from ./arch/arm64/include/generated/asm/unaligned.h:1,
from drivers/gpu/drm/bridge/sec-dsim.c:17:
drivers/gpu/drm/bridge/sec-dsim.c: In function ‘sec_mipi_dsim_calc_pmsk’:
./include/linux/dynamic_debug.h:135:3: warning: ‘best_s’ may be used uninitialized in this function [-Wmaybe-uninitialized]
__dynamic_dev_dbg(&descriptor, dev, fmt, \
^
drivers/gpu/drm/bridge/sec-dsim.c:1149:27: note: ‘best_s’ was declared here
uint32_t best_p, best_m, best_s;
^
In file included from ./include/linux/printk.h:336:0,
from ./include/linux/kernel.h:14,
from ./include/linux/unaligned/access_ok.h:5,
from ./include/asm-generic/unaligned.h:13,
from ./arch/arm64/include/generated/asm/unaligned.h:1,
from drivers/gpu/drm/bridge/sec-dsim.c:17:
./include/linux/dynamic_debug.h:135:3: warning: ‘best_m’ may be used uninitialized in this function [-Wmaybe-uninitialized]
__dynamic_dev_dbg(&descriptor, dev, fmt, \
^
drivers/gpu/drm/bridge/sec-dsim.c:1149:19: note: ‘best_m’ was declared here
uint32_t best_p, best_m, best_s;
^
In file included from ./include/linux/printk.h:336:0,
from ./include/linux/kernel.h:14,
from ./include/linux/unaligned/access_ok.h:5,
from ./include/asm-generic/unaligned.h:13,
from ./arch/arm64/include/generated/asm/unaligned.h:1,
from drivers/gpu/drm/bridge/sec-dsim.c:17:
./include/linux/dynamic_debug.h:135:3: warning: ‘best_p’ may be used uninitialized in this function [-Wmaybe-uninitialized]
__dynamic_dev_dbg(&descriptor, dev, fmt, \
^
drivers/gpu/drm/bridge/sec-dsim.c:1149:11: note: ‘best_p’ was declared here
uint32_t best_p, best_m, best_s;
^
"
Although this is a spurious warning according to the code logic, it
is better to give 'best_p', 'best_m' and 'best_s' initial values to
suppress the warnings.
Reported-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 753f2cab5a21256d51338caa746909066ba4ea8f)
Coverity reports the 'OVERFLOW_BEFORE_WIDEN' warns which can
cause potential expression overflow for multiplying two 32bit
integers and assign the result to a 64bit integer, since no
automatic integer type promotion exists before the multiply
operation, so requires explicit type casting for either one
of operands.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 9f10b3172107df0c31031e3fb02d32b6f26696f2)
A fixed PLL PMS setting for attached panel is obviously not
enough for any other mipi panel which needs a different PLL
output clock frequency, and besides, for the CEA-861 standard
display modes, the 'pll_pms' table also can not cover all the
modes requirements. So a general way is created to solve this
problem which can provide an optimum solution to output a PLL
bit clock to match the request frequency in a maximum degree
and also satisfy the input clock and intermediate clocks limit
according to the PLL specification.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Add a new property 'pref-rate' support which can be used to
assign a different clock frequency for the DPHY PLL reference
clock in the dtb file. And if this property does not exist,
the default clock frequency for the reference clock will be
used. And according to the spec, the DPHY PLL reference clk
frequency should be in [6MHz, 300MHz] range.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
When there is no existing horizontal blanking word counts in
'dsim_hblank_par' tables, these data requires to be computed
according to the 'hfp', 'hbp' and 'hsa' timings which are in
pixel unit. So the pixel unit data requires to be converted
to word count unit data correctly to match the PLL output clk
frequency.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Change the 'bit_clk' and 'pix_clk' fields of struct sec_mipi_dsim
and the 'bit_clk' field of struct dsim_pll_pms from 'uint64_t' type
to 'uint32_t' type, since first, these two fields are in KHz unit,
and so 32 bit unsigned integer is enough to hold the data values,
and second, use 32 bit integer can simplify related clocks compute.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Obviously, DRM panel prepare is done after the DSIM PLL config,
so when PLL config failed, the 'sec_mipi_dsim_bridge_enable()'
should return directly instead of goto DRM panel unprepare.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 9c77865d6ec98ff60a82f03743fd797d082634cc)
There is an issue that run several times of modetest 720p@60 test,
display turns to be abnormal or no display. So fine tunning the
DPHY TIMING config to use the same timing config of '720p@60Hz'
mode on 4 data lanes for the same display mode no 2 data lanes.
Until now, it works fine with this config.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6ca115f778cf61691ef4c20d8473e5818f96ad31)
In the macro 'DSIM_DPHY_TIMING' definition, the field
'clk_trail' assignment to 'ctrail' is missing which
certainly needs to be added.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f2818410d3d8d3b09002a85b593cee192d60bb06)
For the CEA standard mode '1280x720@60Hz', the standard HFP value
is not suitable for the DSI peripheral which works with Non-burst
with Sync Pulse mode with 4 data lanes enabled. And this commit is
a workaround to plus 2 to the original HFP value to make this case
can display correctly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 8b39ff24f89c5a9d21459ab5af47259060185b0a)
(cherry picked from commit 56c91a7ee4)
The SEC provides a table to guide the DPHY TIMINGS config based
on the PLL output bit clock frequency for DSIM. So create the
table which is used by SEC LN14LPP DPHY with HS Timing v1.2 and
this table will be used by the SEC DSIM Bridge driver to help to
config the corresponding DPHY Timings correctly for each display
mode. Along with the table, a DPHY TIMING table entry 'compare'
method is implemented for the binary search when lookup the
suitable DPHY TIMING entry.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit eb899b434be6127db26c370bf200d8072eaf01c4)
(cherry picked from commit 3b23233daf)
Generally, different modes request different frequency bit clock,
so create a table to contain the PLL PMS config for each display
mode. This commit first contains several PLL PMS config entry for
several most popular CEA standard display modes.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 016ebc631e592e16848cd6426dd5b262a401746f)
(cherry picked from commit 5cddc84ba3)
To make some DSI peripheral which can work only with 'Non-burst
with Sync Pulse mode' to display CEA standard timings, and there
is no common way to get the horizontal blanking timings for all
the display modes according to the test, and this is also related
with the data lanes used for data transfer, so create an horizontal
blanking parameters table for 2 and 4 data lanes mode respectively
for several popular CEA standard display modes.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 8fe1e3d77af5d380da4642c9f99c2dc59f5c5484)
(cherry picked from commit dbd661c160)
According to a lot of tests and debug, for the Non-Burst with
Sync Pulse mode with 3 data lanes enable, the DSI peripheral
ADV7535 cannot display correctly, but the output timings seems
to be correct. Until now, the root cause for this issue still
cannot be found. So make this workaround to force to use 2 data
lanes when meeting the 3 lanes requests.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6e7bc3bfd5b03da698a4024199bb696b792cc14e)
(cherry picked from commit 14f43f0aef)
Defer the PLL output check to the SEC DSIM Encoder's atomic check
from SEC DSIM Bridge's mode_fixup(), since in the attached DSI
device Bridge's mode_fixup(), it may change the data lanes number,
and this change is done after the SEC DSIM Bridge's mode_fixup().
And the DSIM Encoder's atomic check is the ideal place to do this
PLL check, since it happens after all the Bridges' mode_fixup()
done.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit c9bce66fed982383dde189c428d4c2ee2c2fc623)
(cherry picked from commit ead3666313)
According to a lot of tests, for long packet send, the packet
payload transfer done interrupt will be triggered no later than
the packet header transfer done interrupt. So, to make sure the
long packet has been send to the peripheral completely, wait
'ph_tx_done' interrupt instead of 'pl_tx_done' for long packet
transfer. Otherwise it may cause subsequent packet transfer
failed sometimes.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 69a5f44025c6ecb2fee16c1650a81198b501f284)
After the DISPMIX power domain enabled, all the related registers
will drop their values once runtime pm suspend called. So in the
pm runtime resume process, the SEC DSIM de-reset and some init jobs
need to be done, and these jobs are no longer necessary to be done
during probe bind anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 7a7f17f5fb66135629ef20a2b4780dfef2f0f0ce)
This patch adds mipi panel enable/disable during the dsim
bridge enable/disable procedure and implements required
callbacks and helper functions for dsi panel peripheral
support.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 4ef0a4e4ba0faca91e5b556fd13483aafdb64519)
The current timeout values for 'BTA' and 'LPRX' in register
'DSIM_TIMEOUT' is not long enough for some dsi peripherals,
so increase them long enough for all current peripherals to
avoid timeout errors generation in some cases.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 8e2b86b317382635e74002a5b2a466804247e61a)
The macro 'CONFIG_NON_CONTINUOUS_CLOCK_LANE' has been misspelt
to 'CONFIG_NON_CONTINOUS_CLOCK_LANE'. So correct it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 24a05825b7299fc2f60768468fafbbc9a33804ad)
All the DSIM fifo pointers should be better to be put into the
initialized state before enabling DSIM to transfer commands or
data.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 1c1624e48c83623a538f4af862367e6b3cbf8d67)
According to the DSIM specification, the 'DSIM_FIFOCTRL'
register addr offset should be '0x4c' instead of '0x48'.
So correct it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 31850816f3aea109aff6c4bbcb44221e7d74afb5)
When the attached dsi device does not use all the data lanes
to transfer data, data lanes stop state check should only
check the lanes used precisely, since unused lanes state is
not guaranteed to be in some stable state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6787ee8505ab16bf7bba38c721da0bfa87e9de0e)
When a dsi device who is neither a bridge nor a panel requests
to be attached to the host, refuse this request directly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 2e80acc8a611327fcc77d2e73515bc062cdc4233)
During the mode set procedure, some dsi client device may detach
itself first and then attach it again according to the target
display mode parameters. In this case, the dsi client device
should be allowed to be re-attached again. So this is also true
for panel device.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f586625dd1a665c58b976405c7980b7414554481)
When the dsi device is detached, the dsi parameters saved when
the dsi device is attached should be cleaned to avoid to be
misused. And besides, add some sanity check along with this
cleanup.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit a02c30a0ed8acc4a136d2281431fa4b07d66b933)
Obviously, according to the drm_bridge_attach()'s definition,
the passing arguments of its function call should be corrected
here.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This is the abstracted bridge driver for Samsung MIPI DSIM
controller. This driver only foucses on the DSIM controller
itself configurations and never care about any config about
the platforms. So it can be shared by different platforms
without any modifications.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
ITE Tech. Inc. (abbreviated as ITE) is a fabless IC design house from Taiwan.
Website: www.ite.com.tw
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: change to YAML format ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
After the dispmix reset driver development, the reset flow
is better to be replaced by using this driver to hide the
reset details for all the dispmix submodules, and whose
driver code for reset can become platform independent.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
When CONFIG_PM_SLEEP is disabled, the suspend and resume hooks
are implemented as dummy functions, but GCC will report below
build warnings:
drivers/gpu/imx/lcdif/lcdif-common.c:731:12: warning: ‘imx_lcdif_suspend’ defined but not used [-Wunused-function]
static int imx_lcdif_suspend(struct device *dev)
^
drivers/gpu/imx/lcdif/lcdif-common.c:735:12: warning: ‘imx_lcdif_resume’ defined but not used [-Wunused-function]
static int imx_lcdif_resume(struct device *dev)
^
So remove these dummy functions to avoid these build warnings.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
According to the design spec for IMX8MN platform, the GPR reset
module for DISPMIX has some changes. So the reset code should be
adjusted accordingly. This is a temporary solution and will be
improved later.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
CC drivers/gpu/drm/imx/lcdif/lcdif-crtc.o
../drivers/gpu/drm/imx/lcdif/lcdif-crtc.c:26:21: fatal error: imx-drm.h: No such file or directory
#include "imx-drm.h"
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
According to the LCDIF function definition, the pixel format
configuration should not be done during LCDIF is running. So
if finding pixel format change is requested, the 'mode_changed'
needs to be set to make sure the commit become to be a full
modeset.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
When an atomic commit contains an active CRTC with no plane,
it may cause two potential issues:
First, this CRTC will fetch its last attached plane data
or has no data can be fetched depending on the plane
driver's atomic_disable() implementation.
Second, this CRTC's 'plane_changed' will be false during
the whole commit tail stage, and this will make vblank
wait to be bypassed which directly causes the later wait
flip done timeout.
So add this commit case check to the LCDIF CRTC's atomic
check to block this kind of commits.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This reverts commit 05d335b07b, since the
commit e07309cfdc567623a3f0cde6b79b972910248152 (MLK-19819-1 drm/imx:
lcdif: bypass atomic check when CRTC is disabled) can cover the function
that commit 05d335b07b can provide.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
On 4.14.y kernel branch, the DRM framework has been modified that
when no CONNECTOR attach to CRTC, the fb creation wil be deferred
until some CONNECTOR has been detected via hotplug. And the system
suspend workflow is also affected accordingly, if the CRTC atomic
check fails, the display-subsystem suspend also will be caused to
fail. So bypass the 'bus_format' check when CRTC is going to be
disabled.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
In the 'lcdif_crtc_atomic_check()', when the 'bus_format' is
zero which means that there is no valid display peripherals
attached to LCDIF, return directly to avoid below error log
to make noises, since the error log is not cared in this case.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 25d2b80f637af06094f56c60d46404af3b7ff381)
Add the check to LCDIF CRTC atomic check for the requested bus
format by encoder with the bus format which can be supported by
LCDIF CRTC to refuse unsupported case.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit e98afe9b6b20c2494c8570427b7811ed9ce202e8)
Since the LCDIF output data width can be different from the data
width of input pixel data, so the bus format check in the plane's
atomic check is not correct anymore, and need to be removed.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 2245702e7905fa7b75aec92fdbb9ffeb33bdb6de)
The 16bpp BGR order pixel formats 'DRM_FORMAT_ABGR1555' and
'DRM_FORMAT_XBGR1555' also require to be re-ordered to RGB
order for display, just like the format 'DRM_FORMAT_BGR565'
does.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f5cc4f4699570fe697d21cb47c54aa91b82c8458)
According to LCDIF specification, the input pixel data
width and the output pixel data width can be different,
and this conversion is done by LCDIF automatically. So
config the output data width according to the requested
bus format from the encoder, instead to be same with the
input pixel data width.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit bfd27f6d71d86a7f2fc8314f082565db3682b925)
According to the comments of 'struct drm_framebuffer', its
'width' field refers to the logical width of the visible
area of the framebuffer. This may be unequal to the total
pixels number of a line. So use the 'pitches' field to
replace 'width' for the horizontal cropping feature.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 9a2bbbf971ed79b32ae1c7da2d62b8a72f3ccffd)
Add horizontal cropping support when atomic plane update is
running, and if the attached CRTC needs modeset. And if the
width of visible portion of plane is equal to the fb surface
width, the Pigeon Mode will be disabled, so cropping will be
disabled.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 30672b2b18a07a2926979cc533cbb84ea4a642dd)
In DRM atomic modeset check, it will not check the fb's width
change, so in later atomic commit, it will not disable the CRTC
which has no mode changed. But for LCDIF, the fb width related
registers configuration can not be done when LCDIF is running.
So force 'mode_changed' to be true when fb width changed.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 518ff82756a39ff2d2f750596295baa4f5fca4c5)
According to the LCDIF specification, the Legacy Mode does not
support cropping function in the horizontal direction, so add
Pigeon Mode which can support this kind of function. And when
enable this mode, the legacy horizontal timings configuration
should use stride value but not the active width, and related
pigeon configuration should use the active width but not the
stride value.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit e6da9542693dd585972897f62748a101f5726a74)
Change the 'rpm_suspended' field to be an atomic type from
boolean type to make it have the counting ability which can
help to detect and avoid runtime suspend and resume calls
mismatch caused problems.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit dece6fbe51f9c0ea3cd42c52e1c174bd26ae70f1)
After supporting DISPMIX power domain, the LCDIF runtime
resume callback always write '0' to 'LCDIF_CTRL' register
which will clear previous pixel format related setting.
So the previous condition by comparing format change for
setting pixel format during plane atomic update is not
true anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 5f84c69799456f28fd8182fd156e9067921e9a4e)
Implement the suspend()/resume() callbacks to support system
power management functions for LCDIF.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 7e00487012753cb370eab4ff5c05f76f7361297f)
After the DISPMIX power domain enabled, all the related registers
will drop their values once runtime pm suspend called. So in the
pm runtime resume process, the LCDIF de-reset and some init jobs
need to be done, and these jobs are no longer necessary to be done
during probe stage anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f83aaaecaeb54d8b1231be2cb7175ce58682dae7)
Change the maximum height limitation to 1920 to support
'1080x1920' resolution mode. It is a temporary work
around and will be improved later.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 44d0209e97e0c574af30dd7a7d7e059d4ddf996d)
Add an function to get the LCDIF controller supported bus
formats according to the pixel format bpp. And change the
bus format sanity check in the plane's atomic check to see
if the bus format required by the peripheral attached to
LCDIF can be supported by LCDIF.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
For now, the higher resolution than '1920x1080' is not supported
yet. So limit the 'max_width' and 'max_height' of mode_config
to be 1920 and 1080.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
After adding LCDIF DRM/KMS driver, there will be a Kconfig recursive
dependency loop:
drivers/media/v4l2-core/Kconfig:7:error: recursive dependency detected!
drivers/media/v4l2-core/Kconfig:7: symbol VIDEO_V4L2 depends on I2C
drivers/i2c/Kconfig:8: symbol I2C is selected by FB_DDC
drivers/video/fbdev/Kconfig:63: symbol FB_DDC depends on FB
drivers/video/fbdev/Kconfig:12: symbol FB is selected by DRM_KMS_FB_HELPER
drivers/gpu/drm/Kconfig:75: symbol DRM_KMS_FB_HELPER depends on DRM_KMS_HELPER
drivers/gpu/drm/Kconfig:69: symbol DRM_KMS_HELPER is selected by DRM_IMX
drivers/gpu/drm/imx/Kconfig:2: symbol DRM_IMX depends on IMX_LCDIF_CORE
drivers/gpu/imx/lcdif/Kconfig:1: symbol IMX_LCDIF_CORE depends on RESET_CONTROLLER
drivers/reset/Kconfig:5: symbol RESET_CONTROLLER is selected by QCOM_SCM
drivers/firmware/Kconfig:218: symbol QCOM_SCM is selected by VIDEO_QCOM_VENUS
drivers/media/platform/Kconfig:482: symbol VIDEO_QCOM_VENUS depends on V4L_MEM2MEM_DRIVERS
drivers/media/platform/Kconfig:165: symbol V4L_MEM2MEM_DRIVERS depends on VIDEO_V4L2
Making IMX_LCDIF_CORE select RESET_CONTROLLER instead of depending on it
breaks this loop.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This is a new DRM/KMS driver for LCDIF which conforms
to the IMX DRM Core framework. It provides support for
CRTCs, Planes and mode config of KMS.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The LCDIF core driver is responsible to provide controller
registers configuration and create the platform devices for
the child port nodes. And the platform devices later will
attach to the corresponding DRM/KMS drivers via name match.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
[ Aisheng: Kconfig & Makefile update for a clean base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c:17:21: fatal error: imx-drm.h: No such file or directory
#include "imx-drm.h"
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Since we want to add i.MX DPU support into imx-drm, the IPUv3 KMS driver
can be put into the ipuv3 folder to organize the driver code better.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Since we want to add i.MX DPU support into imx-drm, the IPUv3 specific
KMS function names should be no more too generic with the prefix 'imx_drm'.
Let's rename them to be prefixed with 'ipu'.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Since we want to add i.MX DPU support into imx-drm, the imx-drm core
driver should be no more IPUv3 specific. Let's make imx-drm more generic
and extract IPUv3 specific KMS functions to ipuv3-kms.c.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: update to new kernel version accordingly ]
[ Aisheng: split imx-drm-core changes out of ipu ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This IP requires full stop and re-start when changing display timings,
but we can change the pixel format while running.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Besides the eLCDIF block, there is another IP block, used in the past
for EPDC panels. Since the iMX.8mq doesn't have an EPDC connector, this
block is not documented, but we can use it to do additional operations
on the frame buffer.
In this case, we can use the pigeon registers from this IP block in
order to do horizontal crop on the frame buffer processed by the eLCDIF
block.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Bit 21 can alter the CTRL2_OUTSTANDING_REQS value right after the eLCDIF
is enabled, since it comes up with default value of 1 (this behaviour
has been seen on some imx8 platforms).
In order to fix this, clear CTRL2_OUTSTANDING_REQS bits before setting
its value.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Currently, the enable of the axi clock return status is ignored, causing
issues when the enable fails then we try to disable it. Therefore, it is
better to check the return status and disable it only when enable
succeeded.
Also, remove the helper functions around clk_axi, since we can directly
use the clk API function for enable/disable the clock. Those functions
are already checking for NULL clk and returning 0 if that's the case.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
The eLCDIF controller has control pin for the external LCD reset pin.
Add support for it and assert this pin in enable and de-assert it in
disable.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Add new optional property 'max-memory-bandwidth', to limit the maximum
bandwidth used by the MXSFB_DRM driver.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Because of stability issues, we may want to limit the maximum bandwidth
required by the MXSFB (eLCDIF) driver.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Add mxsfb_atomic_helper_check to signal mode changed when bpp changed.
This will trigger the execution of disable/enable on
a modeset with different bpp than the current one.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Since version 4 of eLCDIF, there are some registers that can do
transformations on the input data, like re-arranging the pixel
components. By doing that, we can support more pixel formats.
This patch adds support for X/ABGR and RGBX/A. Although, the local alpha
is not supported by eLCDIF, the alpha pixel formats were added to the
supported pixel formats but it will be ignored. This was necessary since
there are systems (like Android) that requires such pixel formats.
Also, add support for the following pixel formats:
16 bpp: RG16 ,BG16, XR15, XB15, AR15, AB15
Set the bus format based on input from the user and panel
capabilities.
Save the bus format in crtc->mode.private_flags, so the bridge can
use it.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Use BIT(x) and GEN_MASK(h, l) for better representation the inside of
various registers.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Some of the registers, like LCDC_CTRL, CTRL2_OUTSTANDING_REQS and
CTRL1_RECOVERY_ON_UNDERFLOW needs to be properly cleared/initialized
for a better start and stop routine.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
Some of the existing registers in this controller are not defined, but
also not used. Add them to the register definitions, so that they can be
easily used in future improvements or fixes.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
The bridge might have special requirmentes on the input bus. This
is e.g. used by the imx-nwl bridge.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Currently, the MXSFB DRM driver only supports a panel. But, its output
display signal can also be redirected to another encoder, like a DSI
controller. In this case, that DSI controller may act like a drm_bridge.
In order support this use-case too, this patch adds support for drm_bridge
in mxsfb.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
i.MX8QXP uses two LDBs(one primary, one auxiliary) to support
dual channel mode. This patch adds the dual channel mode support
for i.MX8QXP. Note that the drivers contain specific sequence
needed by this mode - LDB VSYNC polarity and channel selection settings
should be configured into the register a bit earlier in ->atomic_mode_set
instead of in ->enable, and DC subsystem pixel link enablement is moved
from the DPU driver to the LDB driver to make sure it happens later
than LDB clocks enablement in ->enable.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
i.MX8qxp LDB dual channel mode uses two LDB channels from two LDB
instances, while all other LDB variants in other SoCs use two LDB
channels from one LDB instance. This patch adds documentation
for the special case of i.MX8qxp LDB dual channel mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Not only i.MX8qm LDB requires pixel and bypass clocks, but also
i.MX8qxp LDB does. This patch corrects pixel and bypass clock
description by explicitly saying that i.MX8qxp LDB requires
the clocks.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds system power management support for imx-ldb drm driver
by proper PHY exit/init handling and pixel link re-initialization in
the resume operation. The driver depends on the imx-drm core driver
to handle ldb bridge power management operations.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The changed was introduced by Liu Ying from 4.19 kernel.
But we observed it caused the latest kernel color display is wrong.
So revert to the original version which worked before.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch adds i.MX8qxp LDB support.
Logics are added to make i.MX8qxp LDB cope with Mixel LVDS combo PHY.
Also, logics are added to handle pixel link quirks for i.MX8qxp LDB.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds device tree binding support for i.MXqxp LDB,
including compatible string and additional properties.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds i.MX8qm LDB support.
Logics are added to make i.MX8qm LDB cope with Mixel LVDS PHY.
Also, logics are added to handle pixel link padding quirks for i.MX8qm LDB.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix headfile include conflict during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch adds device tree binding support for i.MXqm LDB,
including compatible string and additional properties.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Fast-forward imx8_dprc driver from imx_4.14.y.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Liu Ying: scfw call updates and other small tweaks for upgrade]
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
To make sure SCU misc settings are in valid status at system resume
stage, let's initialize them in dpu_resume().
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The KACHUNK_CNT SCU misc setting is for DPU blit engine's prefetch engine.
It represents how many cycles are needed to trigger prefetch engine after
DPU shadow being loaded. Set it to be 32, which is recommended and tested.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The SCU misc settings of DC subsystem contain pixel link settings
and other settings, like DC sync mode and KACHUNK_CNT. So, it would
be better to rename dpu_pxlink_init() to dpu_sc_misc_init(), which
includes initialization code for all SCU misc settings of DC subsystem.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The function dpu_sc_misc_init() actually gets the SCU handle only.
So, renaming it to dpu_sc_misc_get_handle() better reflects what it does.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The LVDS encoder driver for i.MX8qxp SoC needs to enable/disable pixel link
in order to meet some sequence requirements, otherwise, display artifacts
will be seen on LVDS display. This patch avoids to enable/disable pixel
link in the FrameGen driver for this special encoder.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
i.MX8qxp LDB dual channel mode uses two LDB channels from two LDB
instances, while i.MX8qm LDB uses two LDB channels from one LDB
instance. So, this patch adds flag has_dual_ldb in struct dpu_data
so that it can be used to tell the difference.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch caches encoder_type in struct dpu_framegen when we
call framegen_cfg_videomode(). This cached type can be used
later when determining whether to enable pixel link in the
FrameGen driver or not.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
As DPU fetchunits support ITU601(limited range)/ITU601_FR(full range)
and ITU709(limited range) YUV to RGB color space conversions, we may
add color encoding and color range properties support for planes.
Considering software backward compatibility, the default color encoding
is set to ITU601 with full color range.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds mulitple pixel blend modes for DPU plane.
The modes are "None", "Pre-multiplied" and "Coverage".
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Now that we've already got proper default blend mode support,
we may introduce alpha in pixel feature for overlay planes.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
DPU has no limitations on the plane's zpos, so we don't
have to limit the primary plane zpos to be zero and the
overlay plane zpos to be non-zero.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch improves bailout path of dpu_plane_create().
As we'll add more drm properties to the planes later,
this would simply the code.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Without the new blend modes("None", "Pre-multiplied" and "Coverage")
introduced in the below commit, the old userspace assumes alpha in
pixel is per-premultiplied by default. So, let's support the default
blend mode properly.
commit a5ec8332d4 ("drm: Add per-plane pixel blend mode property")
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pixel combiner support in the DPU KMS driver.
Pretty much logics are implemented to allocate/organize the
CRTC resources(extdst, framegen, tcon, pixel combiner, etc)
and plane resources(extdst, fetchunit, layerblend, etc) which
are needed to drive a high pixel rate display via pixel combiner.
Additional logics are implemented to support sync up mode fixup
found in the new version of DPU IP.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds extdst_pixengcfg_syncmode_master() helper support
so that the callers may control if a extdst is master or slave
when it works in sync mode. The bit16 of extdst's PIXENGCFG_STATIC
register controls this and it's a part of sync mode fixup logic.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Bit7 of framegen's SECSTATCONFIG register is used to control
the sync mode fixup logic implemented in framegen. This patch
adds framegen_syncmode_fixup() helper so that the callers
may enable/disable the fixup logic for a framegen.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Store9 unit can be shared bewteen display engine(for sync mode fixup)
and blit engine. It's proper to get the store resource in the DPU
common driver and then provide it to client platform device via
platform data.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Bit16 of store9's PIXENGCFG_STATIC register is used to control
the sync mode fixup logic implemented in store9. So, let's
add store9 support in the DPU core driver and export a function
for users to enable/disable the fixup logic.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch sets master stream id to be 1 for i.MX8QM DPU.
The master stream id is used when FrameGen works in sync mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pixel combiner support in the DPU core driver.
Users may get and enable/disable/control a pixel combiner instant
via tcon functions and may tell if it is needed in a specific usecase
via the dpu_get_syncmode_min_prate() and dpu_get_singlemode_max_width()
helpers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Cache the auxiliary CRTC resources in struct dpu_crtc via the
dpu_aux_{unit}_peek() helpers so that the DPU CRTC driver may
use them later.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DPU CRTC device driver may get the CRTC group id from
the pdata of the device. Let's cache it in struct dpu_crtc
so that the driver may use it later.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds side-by-side support for tcon so that
two tcons can participate in the dual display streams
to work with pixel combiner to drive a high pixel rate
display.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds side-by-side support for framegen so that
two framegens can work in sync mode to participate in the
dual display streams to drive a high pixel rate display
via a pixel combiner.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds helper dpu_pxlink_set_dc_sync_mode() support
so that callers may enable or disable DC sync mode.
In DC sync mode, high pixel rate video mode can be supported
by combining two display streams together.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds tcon_is_master/slave() helpers support so that
callers may know if a tcon is a master or slave tcon.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds extdst_is_master() helper support so that
callers may know if a extdst is a master extdst or not.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds framegen_is_master/slave() helpers support so that
callers may know if a framegen is a master or slave framegen.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds helper dpu_get_master_stream_id() support
so that callers may know the master stream when FrameGen
works in sync mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch introduces master_stream_id flag in struct dpu_data
so that master stream can be chosen when FrameGen works in sync mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds a new di_grp_id entry in display client pdev's data
so that the relevant display platform driver may know the display
group ID of the display device.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Pixel combiner found in i.MX8 SoCs may combine two display
streams(one master and the other slave) to drive a high
pixel rate display. This patch adds DT property descriptions
in imx-drm device tree documentation for pixel combiner.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The CRTC background should be full screen instead of partial
screen, because the DRM core is likely to add configurable
background color support in the future. We may cover the full
screen with ConstFrame0/1, upon which builds planes. With this,
it is easier to compute each plane's layer offset vs CRTC start
point and all ConstFrame units can be controlled by CRTC.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Although the hardware spec doesn't mention the additional operation to
wait for FrameGen secondary syncup for FrameGen non-sync mode when we
enable a display, it doesn't hurt to do it and we may get warning message
in case it's not syncup.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DPU planes' fetch units are built upon the CRTC's FrameGen secondary
channel. Empty FIFO read request from the channel is very likely caused
by insufficient AXI bandwidth for the fetch units, which makes display
underrun. This patch warns users via dmesg on the empty FIFO read request.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds two helpers to get and clear FrameGen secondary channel
status respectively. Via the two helpers, users may know if there is
empty FIFO read request on this channel or not after getting the status.
And, if yes, users may choose to clear the status. According to the IP
spec, the empty FIFO read request indicates that data stream from a Fetch
unit(e.g., AXI bandwidth not sufficient) fell down. Assuming the display
driver sets things up properly, the falling down is very likely caused by
the insufficient AXI bandwidth, that is, display underrun.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
If CRTC is active, we should send vblank event in vblank
interrupt handler to make sure it's sent precisely. This
patch caches the event to be sent at dpu_crtc->event in
the ->atomic_enable() and the ->atomic_flush() callbacks
and finally sends it out in dpu_vbl_irq_handler(). Since
we rely on the interrupt handler to send the event, we
call drm_crtc_vblank_get() to get a vblank refcount to
guarantee the interrupt is enabled when caching the event
in dpu_crtc_queue_state_event() and call drm_crtc_vblank_put()
to drop a vblank refcount in the interrupt handler.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DRM atomic core ensures crtc->state->event is not NULL when
calling the ->atomic_disable() or the ->atomic_flush() callbacks.
So, let's remove the unnecessary NULL check warning on it.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
When a full modeset is needed, the CRTC could be totally disabled or
enabled/re-enabled after the modeset. If it's re-enabled, a vblank
event would be sent during the CRTC enablement procedure. So, a bogus
event should be killed in the ->atomic_disable() callback.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The Kdoc for the event entry of struct drm_crtc_state mentions that the
simplest way to send vblank event when a CRTC is being disabled is that
calling drm_crtc_send_vblank_event() somewhen after drm_crtc_vblank_off()
has been called. This patch takes the way mentioned above to send vblank
event in the ->atomic_disable() callback.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch checks array index 'k' in function
dpu_atomic_assign_plane_source_per_crtc() to make sure it's
no less than zero before using it to access array sources[].
Signed-off-by: Liu Ying <victor.liu@nxp.com>
We should return properly in case we fail to get plane state to check.
For example, a race condition on the plane state would happen when one
thread does page flip and another thread updates CRTC properties on
that CRTC simultaneously. '-EDEADLK' should be returned when the
condition occurs.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
To workaround the errata TKT320950, DPR/PRG need to evade the first dumb frame
which is generated by DPU. The way we achieve that is to bypass TCON(but set
the TCON sync signals and KA_CHUCK strobe signal up) before enabling the DPU
display controller, and then 1) enable the display controller, 2) wait for the
frame index starting to move and 3) finally switch TCON to operation mode.
Steps 1) to 3) should be done within a frame, so we disable local irq and
preemption to make sure we don't relinquish CPU during the procedure.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
We don't need holding mutex when accessing registers in display engine
units, because KMS is the only relevant client driver and it has ww mutex
mechansim to ensure there is no race condition on the CRTC resources.
Also, we are naturally safe when the driver initializes the units at the
probe and system power management stages.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The Display Prefetch Resolve(DPR) is a processor of fetching display data
before the display pipeline which needs data to drive pixels in the active
display region. The data is transformed, or resolved from a variety of
tiled buffer formats into linear format. The DPR transaction sequences are
issued with a high level of DRAM efficiency. This patch adds device tree
binding doc support for i.MX8qm/qxp DPR.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The Pretch Resolve Gasket(PRG) is a digital core function as a gasket
interface between RTRAM controller and DPU. The main function of PRG
is to convert the AXI interface to RTRAM interface and remapping the
ARADDR to a RTRAM address. This patch adds device tree binding doc
support for i.MX8qm/qxp PRG.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Implement Blt engine as DRM renderer.
Add dpu blit engine device. And as dpu bliteng has
no device tree node, so to set dpu's of_node as the
platform data for imx-drm component compare_of.
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Acked-by: Liu Ying <victor.liu@nxp.com>
This patch specifies encoder type for framegen_cfg_videomode()
so that framegen driver may program display clock tree properly
for different kinds of encoders.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch sets display clock's parent to bypass clock when display
encoder type is TMDS, otherwise, to pll clock when other types of
encoder.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
../drivers/gpu/drm/imx/ipuv3/ipuv3-plane.c:17:21: fatal error: imx-drm.h: No such file or directory
#include "imx-drm.h"
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Due to below commit:
05c452c115 ("drm: Remove users of drm_format_num_planes")
../drivers/gpu/drm/imx/dpu/dpu-kms.c: In function ‘dpu_atomic_assign_plane_source_per_crtc’:
../drivers/gpu/drm/imx/dpu/dpu-kms.c:144:3: error: implicit declaration of function ‘drm_format_num_planes’ [-Werror=implicit-function-declaration]
num_planes = drm_format_num_planes(fb->format->format);
^
../drivers/gpu/drm/imx/dpu/dpu-plane.c: In function ‘dpu_plane_atomic_check’:
../drivers/gpu/drm/imx/dpu/dpu-plane.c:313:2: error: implicit declaration of function ‘drm_format_num_planes’ [-Werror=implicit-function-declaration]
if (drm_format_num_planes(fb->format->format) > 1) {
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Due to below commit:
f3e9632cb6 ("drm: Remove users of drm_format_(horz|vert)_chroma_subsampling")
../drivers/gpu/drm/imx/dpu/dpu-plane.c: In function ‘drm_plane_state_to_uvbaseaddr’:
../drivers/gpu/drm/imx/dpu/dpu-plane.c:164:2: error: implicit declaration of function ‘drm_format_horz_chroma_subsampling’ [-Werror=implicit-function-declaration]
x /= drm_format_horz_chroma_subsampling(fb->format->format);
^
../drivers/gpu/drm/imx/dpu/dpu-plane.c:165:2: error: implicit declaration of function ‘drm_format_vert_chroma_subsampling’ [-Werror=implicit-function-declaration]
y /= drm_format_vert_chroma_subsampling(fb->format->format);
^
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/gpu/drm/imx/dpu/dpu-kms.c:23:21: fatal error: imx-drm.h: No such file or directory
#include "imx-drm.h"
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Due to below commit:
b0f986b4b0 ("drm: Remove users of drm_format_info_plane_cpp")
../drivers/gpu/drm/imx/dpu/dpu-plane.c: In function ‘drm_plane_state_to_baseaddr’:
../drivers/gpu/drm/imx/dpu/dpu-plane.c:150:9: error: implicit declaration of function ‘drm_format_plane_cpp’ [-Werror=implicit-function-declaration]
drm_format_plane_cpp(fb->format->format, 0) * x;
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The dpu is found in i.MX8qm/qxp SoCs.
It has a display controller and a blit engine to support graphics.
This patch adds dpu common driver support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds device tree binding for the Display Processing Unit(DPU),
as found in i.MX8qxp SoC.
The DPU is comprised of two main components that include a blit engine
for 2D graphics accelertations and a display controller for display
output processing, as well as a command sequencer.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Allows the LCDIF to be one of the supported client
components. And set the 'legacyfb_depth' of LCDIF
to be 32.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
In case ->bind() fails, we should avoid leaking dangling pointer
dev->driver_data which is set by dev_set_drvdata(), otherwise
it would be leaked, and seen/dereferenced by PM ops, thus hang
happens. Moving dev_set_drvdata() down just before ->bind()
successfully returns may address this issue.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Since we want to add i.MX DPU support into imx-drm, the imx-drm core
driver should be no more IPUv3 specific. Let's make imx-drm more generic
and extract IPUv3 specific KMS functions to ipuv3-kms.c.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: update to new kernel version accordingly ]
[ Aisheng: split IPU changes out of imx-drm-core change ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The new imx folder may contain ipu-v3 and dpu common drivers.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix source path ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
DPU CRTC found in i.MX8qm/qxp SoCs can be hooked into imx-drm.
Thus, move ipuv3-crtc out of imx-drm-core.
Revert "drm/imx: merge imx-drm-core and ipuv3-crtc in one module"
This reverts commit 3d1df96ad4.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: fix conflicts ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This pixel format is a fully packed and 10bits variant of NV12.
A luma pixel would take 10bits in memory, without any
filled bits between pixels in a stride.
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Add a new fb modifier for Vivante compressed and tiled
pixle layout which can be decompressed by DEC400D module
in DCSS.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
These formats will be used by VPU and DCSS.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
[ Aisheng : VENDOR_VSI changed to 0xf1 ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
A component master may have both OF based and non-OF based components to be
bound with. This patch adds a helper drm_of_component_probe_with_match()
similar to drm_of_component_probe() so that the new helper may get an
additional provided match pointer(contains match entries for non-OF based
components) to support this case.
Tested-by: Meng Mingming <mingming.meng@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit c3cad72234)
Amphion VPU has a tiled layout using 8x128 pixel vertical strips,
where each strip contains 1x16 groups of 8x8 pixels in a row-major layout.
Signed-off-by: Song Bing <bing.song@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng : AMPHION changed to 0xf1 ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This patch adds 30bit RGB101010 LVDS pixel formats support for
the SPWG and JEIDA LVDS mapping standards. Each pixel is transferred
on 5 lanes with 7bit respectively.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
As some USB3 port will lose link state while system sleep, then
the link state will be at rxdect after resume, we need a warm
reset to bring it back, so add the rxdect condition for CAS
missing.
Signed-off-by: Li Jun <jun.li@nxp.com>
i.MX8MQ USB3 host needs XHCI_MISSING_CAS quirk to warm reset the port to
enum the USB3 device plugged in while system sleep, as the port state is
stuck in polling mode after resume.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 9f1f431677)
There is already one quirk for usb3 xhci flag XHCI_MISSING_CAS, for
those platform with OF we can use usb3-resume-missing-cas to enable
this quirk to work around usb3 resume from system sleep.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ba58ff8d3a)
This is required for USB OTG and EH compliance test 6.7.22(A-UUT “Device No
Response” for connection timeout). When the connected usb device(PET) does
not response to transactions, host will fail to get device descriptor.
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 86d0bd661ecbbdf97dd9a8ddbaf0d3811de7f39e)
(cherry picked from commit 858af83637291d2ececfc7b2b4b17e3a371b53f3)
Some platforms (eg: Cadence USB3) have special requirements to add
platform USB register setting between xhci_bus_suspend and
platform USB controller suspend routine. Eg, The Cadence USB3 needs
RX detect clock switch from 24Mhz to 32Khz within 100ms after set
port to U3, but sometimes, for USB3 HUB connection, the USB2
bus suspend will cost more than 100ms, and introduce the disconnection
before the PHY enters low power mode, then the state is in mess from
controller side.
So in this commit, we introduce .bus_suspend for xhci_driver_overrides
for above use cases.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit f6baa57913)
Current XHCI implementation does not consider completion interrupt
for SETUP packet standalone, so it will show warning message
and return error status for URB. In fact, it can support it. In
this commit, we change warning message as debug message and set
status as zero for URB.
Support completion interrupt for SETUP packet is needed for USB EH2.0
SINGLE_STEP_SET_FEATURE Test.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 78b212e8c2)
The NXP Cadence XHCI host has the same issue with Intel's,
it is triggered by reboot test, the test case is described
at this jira ticket.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 5e35313293)
This function is similar with EHCI's, but implemented using XHCI.
The USB2 host needs to send SETUP packet first, then wait 15
seconds before DATA (IN) + STATUS stage.
It is needed at USB Certification test for Embedded Host 2.0, and
the detail is at CH6.4.1.1 of On-The-Go and Embedded Host Supplement
to the USB Revision 2.0 Specification
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 8d46e3bca5)
Since other USB 2.0 host may need it, like USB2 for XHCI. We move
this design to HCD core.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 035a27e1a3)
Enable park mode will improve the performance a lot at USB ethernet use
case, but a little at USB mass storage use case, and it is not harm from
the tests. Below the performance comparison at imx6sl:
USB Ethernet (Mbps)
Default Enable Park
TX 192 262
RX 262 290
USB Mass Storage (MB/s)
Read 21.8 22.9
Write 19.5 22.8
This patch is used for freescale internal.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit b2289a78958859cff37508e4db0314463f33c2e0)
(cherry picked from commit 233f37db41)
The default TPL is for USB OTG & EH compliance test, the supported
class is: mass storage, hub, and hid.
Besides, we add one match criterion that matching targeted device
through class at interface descriptor.
Tested-by: Li Jun <b47624@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 483c071d989ceb36cacf76e1e3e779c67e5b8280)
(cherry picked from commit defcf3883f)
When the USB charger is inserted or removed, the users could get
USB charger state and type through the uevent.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Current USB charger framework only shows charger state for user, but the
user may also need charger type for further use, add support for it.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The DCD is a hardware IP in USB PHY which is used for USB charger
detection, we use polling method for charger detection in this
design to avoid unknown USB PHY interrupt. Currently, the
imx8qm, imx8qxp and imx7ulp have DCD module.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
USB2 PLL use ring VCO, when the PLL power up, the ring VCO’s supply also
ramp up. There is a possibility that the ring VCO start oscillation at
multi nodes in this phase, especially for VCO which has many stages, then
the multiwave will kept until PLL power down. Hold_ring_off(bit11) can
force the VCO in one determined state when VCO supply start ramp up, to
avoid this multiwave issue. Per IC design's suggestion it's better this
bit can be off from 25us after pll power up to 25us before USB TX/RX.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit a094377f04c9ed2c8e702ee7bfab843caa03eb96)
We only have below cases to disconnect line when suspend:
1. Device mode without connection to any host/charger(no vbus).
2. Device mode connect to a charger(w/ vbus), usb suspend when
system is entering suspend.
This patch can fix usb phy wrongly does disconnect line in case
some usb host enters suspend but vbus is off.
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 2af48913f77cec3658f5863b13f63619d8101279)
USB phy driver may need to know the current working mode of
the controller, and does some different settings according to
host mode or device mode.
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 2286cb30feedd6f4a5cb82a0f0af5aa3a04ab698)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
For imx6ul PHY, when the system enters suspend, its 1p1 is off by default,
that may cause the PHY get inaccurate USB DP/DM value. If the USB wakeup
is enabled at this time, the unexpected wakeup may occur when the system
enters suspend.
In this patch, when the vbus is there, we enable weak 1p1 during the PHY
suspend API, in that case, the USB DP/DM will be accurate for USB PHY,
then unexpected usb wakeup will not be occurred, especially for the USB
charger is connected scenario. The user needs to enable PHY wakeup for
USB wakeup function using below setting.
echo enabled > /sys/devices/platform/soc/2000000.aips-bus/20c9000.usbphy
/power/wakeup
Cc: Shaojun Wang <shaojun.wang@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For mxs PHY, if there is a vbus but the bus is not enumerated,
force the dp/dm as SE0 from the consider side. If not, there
is possible USB wakeup due to unstable dp/dm, since there is
possible no pull on dp/dm, eg, there is a USB charger on the
port. Note, the vbus event is only occurred at device mode,
and sent by udc driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This wakeup setting can enable USB wakeup function even the
controller's power is lost, and both A7 and M4 are in VLLS mode.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Per IC engineer request, we need to keep USBPHY2's clk always on,
in this way, the USBPHY2 (PLL7) power can be controlled by
hardware suspend signal totally. It is benefit of USB remote wakeup
case which needs the resume signal be sent out as soon as
possible (without software interfere).
It is intended to fix the issue which this ticket describes, the
reason for this issue is the host does not send resume in time.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 98888b352377f9ebaee03bedce8c239691f45262)
It is one of PHY's power, and we need to enable it to keep signal
quality good, and pass eye diagram test.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 3a8670ee7ff698521369e8292bba7ef288a12335)
Implementation of notify_suspend and notify_resume will be different
according to mxs_phy_data->flags.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit d1ce766d9aabdfb823131d38056ff67c94e7e20a)
Add typec irq as system wakeup source, in case typec irq is not enabled
as system wakeup soruce by user, disable typec irq when suspend to avoid
the threaded irq handler will access some resource(i2c/rpmsg) which is
not ready in early resume phrase.
Signed-off-by: Li Jun <jun.li@nxp.com>
Some usb controller driver only can support legacy extcon to set
data roles, if it use typec connector, need change data role
according to typec states, so add extcon for tcpm to control
data role.
Signed-off-by: Li Jun <jun.li@nxp.com>
As the cc setting while drp toggling may not be the correct value
for attached state, which only means the start value in case of
tcpci, so update the cc setting when src/snk attached state.
Signed-off-by: Li Jun <jun.li@nxp.com>
While system suspend, the typec event handling required service
maybe is not available(suspended), so we need freeze those event
handling by using freezable workqueue, e.g while tcpm is handling
PD message but system suspend started.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
We may do tcpm port unregister in middle of tcpm state transitions,
if there are delayed works queued, we need cancel them before finish
the tcpm unregsiter.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
In case source only for power, but dual data role on USB, we
enable drp toggling for detect source(host), then keep it at
SNK_ATTACHED state, this is mainly for get orientation.
Signed-off-by: Li Jun <jun.li@nxp.com>
Some single power role port with dual data role, this kind of
port connects non-typec port for usb data will need tcpm to
work to get polarity for orientation change, so remove the drp
port condition for now.
Signed-off-by: Li Jun <jun.li@nxp.com>
This patch adds a simple typec switch driver which only needs
a GPIO to switch the super speed active channel according to
typec orientation.
Signed-off-by: Li Jun <jun.li@nxp.com>
Some typec super speed active channel switch can be controled via
a GPIO, this binding can be used to specify the switch node by
a GPIO and the remote endpoint of its consumre.
Signed-off-by: Li Jun <jun.li@nxp.com>
When DWC3 is set to host mode by programming register DWC3_GCTL, VBUS
(or its control signal) will be turned on immediately on related Root Hub
ports. Then, the VBUS is turned off for a little while(15us) when do xhci
reset (conducted by xhci driver) and back to normal finally, we can
observe a negative glitch of related signal happen.
This VBUS glitch might cause some USB devices enumeration fail if kernel
boot with them connected. Such as LS1012AFWRY/LS1043ARDB/LX2160AQDS
/LS1088ARDB with Kingston 16GB USB2.0/Kingston USB3.0/JetFlash Transcend
4GB USB2.0 drives. The fail cases include enumerated as full-speed device
or report wrong device descriptor, etc.
One SW workaround which can fix this is by programing all xhci PORTSC[PP]
to 0 to turn off VBUS immediately after setting host mode in DWC3 driver
(per signal measurement result, it will be too late to do it in
xhci-plat.c or xhci.c). Then, after xhci reset complete in xhci driver,
PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
no glitch happen and normal enumeration process has no impact.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
When DWC3 is set to host mode by programming register DWC3_GCTL, VBUS
(or its control signal) will turn on immediately on related Root Hub
ports. Then the VBUS will be de-asserted for a little while during xhci
reset (conducted by xhci driver) for a little while and back to normal.
This VBUS glitch might cause some USB devices emuration fail if kernel
boot with them connected. One SW workaround which can fix this is to
program all PORTSC[PP] to 0 to turn off VBUS immediately after setting
host mode in DWC3 driver(per signal measurement result, it will be too
late to do it in xhci-plat.c or xhci.c).
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
As the usb role switch use device connection which uses the fwnode
of dwc3 for match, so set the role switch fwnode to be the fwnode
of dwc3.
Signed-off-by: Li Jun <jun.li@nxp.com>
In case the USB3 PHY enters P3, then ep command may need a long
time to complete, per test of ep0out enable, the dwc3 trace time
stamp shows the time is more then 280us, so increase the timeout
loop count to be 2000, this has no side effect for HW which has
no this problem.
Signed-off-by: Li Jun <jun.li@nxp.com>
During the USB certification CV9 test, if we report OTG descriptor
to test suite, it will require doing OTG test, but in fact, it does
not support OTG-compliance in dwc3 driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Since the new dwc3 use bulk clks including the suspend clk, so we can
use it to calculate the power down scale value.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
For imx chipidea controllers, if they use mxs PHY, they need pinctrl
for HSIC. Otherwise, it doesn't need pinctrl and usbmisc control. Like
imx7d and imx8mm.
Reported-by: André Draszik <git@andred.net>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
- -EPROBE_DEFER is an error, but without need show error message
- If pinctrl is not existed, set pinctrl as NULL
Signed-off-by: Peter Chen <peter.chen@nxp.com>
As we use bvalid for vbus wakeup source, to save power when
suspend, turn off the vbus comparator for imx7d and imx8mm.
Below is this bit description from RM of iMX8MM
"VBUS Valid Comparator Enable:
This signal controls the USB OTG PHY VBUS Valid comparator which
indicates whether the voltage on the USB_OTG*_VBUS pin is below
the VBUS Valid threshold. The VBUS Valid threshold is nominally
4.75V on this USB PHY. The VBUS Valid threshold can be adjusted
using the USBNC_OTGn_PHY_CFG1[OTGTUNE0] bit field. Status of the
VBUS Valid comparator, when it is enabled, is reported on the
USBNC_OTGn_PHY_STATUS[VBUS_VLD] bit.
When OTGDISABLE0 (USBNC_USB_OTGx_PHY_CFG2[10])is set to 1'b0 and
DRVVBUS0 is set to 1'b1, the Bandgap circuitry and VBUS Valid
comparator are powered, even in Suspend or Sleep mode.
DRVVBUS0 should be reset to 1'b0 when the internal VBUS Valid comparator
is not required, to reduce quiescent current in Suspend or Sleep mode.
- 0 The VBUS Valid comparator is disabled
- 1 The VBUS Valid comparator is enabled"
Signed-off-by: Li Jun <jun.li@nxp.com>
As there maybe more APIs of usbmisc for suspend and resume, group
them into imx_usbmisc_suspend/resume, no function change.
Signed-off-by: Li Jun <jun.li@nxp.com>
On some imx host, if USB PHY is active when bus suspended, host may
have problem on taking over resume signal of remote wakeup from usb
device, resolve this by making PHY enter low power mode right after
bus suspended.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Like commit d144dfea8a ("usb: chipidea: otg: change workqueue
ci_otg as freezable"), the power_lost work item may try to remove
hcd if controller is powered off during the system suspend, and
the similar deadlock happens, see below dumps.
Meanwhile, with this change, we need to disable USB interrupt
during the work item runs (after driver resume has finished),
otherwise, USB transfer will be timeout (5s) due to USB interrupt
is disabled and IAA watchdog is still not ready at that time.
Workqueue: events ci_power_lost_work
Call trace:
[<ffff000008085c44>] __switch_to+0x8c/0xd0
[<ffff000008d7bbf4>] __schedule+0x19c/0x5d8
[<ffff000008d7c068>] schedule+0x38/0xa0
[<ffff000008d7f3b4>] schedule_timeout+0x19c/0x338
[<ffff000008d7cc10>] wait_for_common+0xa0/0x148
[<ffff000008d7cccc>] wait_for_completion+0x14/0x20
[<ffff0000080e6040>] flush_work+0xd8/0x1f0
[<ffff0000080e61f4>] flush_delayed_work+0x3c/0x48
[<ffff0000081ae1c8>] wb_shutdown+0x90/0xd0
[<ffff0000081ae688>] bdi_unregister+0x58/0x1c0
[<ffff000008413a60>] del_gendisk+0x218/0x228
[<ffff00000871683c>] sd_remove+0x64/0xc0
[<ffff0000086b6eec>] device_release_driver_internal+0x154/0x1f0
[<ffff0000086b6f9c>] device_release_driver+0x14/0x20
[<ffff0000086b5d40>] bus_remove_device+0xc8/0x108
[<ffff0000086b2a08>] device_del+0x1f8/0x300
[<ffff0000087049ec>] __scsi_remove_device+0xec/0x128
[<ffff000008702c70>] scsi_forget_host+0x70/0x78
[<ffff0000086f7ee8>] scsi_remove_host+0xa0/0x140
[<ffff0000088e0588>] usb_stor_disconnect+0x50/0xc0
[<ffff00000887eab8>] usb_unbind_interface+0x78/0x280
[<ffff0000086b6eec>] device_release_driver_internal+0x154/0x1f0
[<ffff0000086b6f9c>] device_release_driver+0x14/0x20
[<ffff0000086b5d40>] bus_remove_device+0xc8/0x108
[<ffff0000086b2a08>] device_del+0x1f8/0x300
[<ffff00000887c364>] usb_disable_device+0xa4/0x210
[<ffff000008872cfc>] usb_disconnect+0x7c/0x240
[<ffff000008872e40>] usb_disconnect+0x1c0/0x240
[<ffff000008878e10>] usb_remove_hcd+0xc0/0x1d8
[<ffff0000088e7bac>] host_stop+0x34/0x90
[<ffff0000088e4088>] ci_handle_id_switch+0x70/0x1d0
[<ffff0000088e3038>] ci_power_lost_work+0x90/0xa8
[<ffff0000080e7100>] process_one_work+0x1e0/0x340
[<ffff0000080e72b0>] worker_thread+0x50/0x458
[<ffff0000080ed32c>] kthread+0xfc/0x128
[<ffff000008084eb8>] ret_from_fork+0x10/0x18
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At current code, it doesn't maintain ci->gadget.dev's runtime PM
status well. Eg, after system resume, call pm_runtime_put_sync for
ci->dev will cause ci->dev's runtime suspend is called if its
power.usage is 0 even the power.usage is 1 for its child ci->gadget.dev.
at that time. It causes the oops this ticket describes that visiting
clock without AHB clock.
To fix this issue, we use ci_hdrc device instead of ci->gadget.dev
for runtime PM APIs at udc driver, in the way, we handle runtime
PM APIs for single device structure.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The pinctrl setting may lost during the system suspend
(eg, imx7ulp), we need to restore it after system resume.
Meanwhile, some platforms may need to set special pinctrl
for power comsumption.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Since USB generic PHY doesn't have USB charger interface, we
implement imx7d (using USB generic PHY) USB charger detection
at usbmisc.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Some platforms (eg, imx6/imx7ulp/imx8qm) which implements charger
detection at USB PHY driver can use framework directly. Other
platforms (eg, imx7d/imx845) which do not implement charger detection
at their USB PHY driver, just assign the charger detection results
for usb_phy structure.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
These two parameters are used to improve USB signal for board level,
in this commit, we read it from the dtb, and write to related register
during the initialization.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
imx7ulp uses different USB PHY with imx7d (MXS PHY vs PICO PHY), so the
features are supported by non-core register are a little different.
For example, autoresume feature is supported by all controllers for
imx7ulp, but for imx7d, it is only supported by non-HSIC controller.
Besides, these two platforms use different HSIC controller, imx7ulp
needs software operation, but imx7d doesn't.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Some chipidea hardware needs to disable low power mode for controller
due to IC issue or hardware issue, add one quirk for it.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Since the DP pullup can be finished at glue layer, we can delete
it at common code, but we still need to keep DP pulldown operation
since the DP may have already pulled up before.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The ci_handle_id_switch is called at two places, at very rare situations,
it may be running at the same time. Eg, when the system is back from
the resume, the id event is occurred from extcon driver, as well as
power_lost work item is called due to the controller is poweroff at
the suspend.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
After enters one specific role, notify usb phy driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit d3aa2a13f4e47bc7fae7f2eee1e86291d7513312)
After commit 4967018428 ("usb: chipidea: otg: change workqueue
ci_otg as freezable"), we have fixed the bug that ID removed
wakeup (ID: 0->1) will lock up system resume, we delete the
workaround code in this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When the vbus is off during the suspend controller is powered off, if we
do not want to see disconnection from USB core, we need to make sure the
device pulls DP up before USB core resume runs. However, several devices
are slow to pull DP up when see vbus (maybe it needs vbus to power up
system), so we need to wait connection at platform code.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For all imx Socs later than imx6 (including imx6), the USB_nSBUSCFG.AHBBRST
will be set as 0 at dtsi file, so the non-burst setting needs to be
set at non-core register, or there will be no burst for USB AHB/AXI
transfer.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add USB PHY event for below situation:
- vbus connect
- vbus disconnect
- gadget driver is enumerated
USB PHY driver can get the last event after above situation
occurs.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Fix chipidea usb driver compile warning if CONFIG_USB_CHIPIDEA_HOST
is disabled:
In file included from drivers/usb/chipidea/otg.c:26:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
CC drivers/usb/chipidea/otg_fsm.o
In file included from drivers/usb/chipidea/otg_fsm.c:34:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
Signed-off-by: Li Jun <jun.li@nxp.com>
After we put gadget disconnect and connect in id switch handling,
update power lost work accordingly.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit fd49596ece)
During system sleep, if we switch otg role from gadget to host, and host
vbus is directly controlled by ID signal, we will lose vbus drop event
after resume because the vbus is on both at system suspend and resume, so
we will miss gadget disconnect handling before start host role. This patch
is to fix it by adding gadget disconnect for this case.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 79aab6fc3c)
During system sleep, if we switch otg role from host to gadget, because
the vbus is on both at system suspend and resume, we will lose vbus
connect event after system resume, thus, no chance to setup vbus session
for gadget so enumeration will not happen. This patch is to fix it by
adding vbus connect handling for this case.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit bd54eea0f7)
It is better we disconnect (pulldown dp) host when the system enters
suspend if the host did not suspend bus beforehand, it can avoid
unnecessary udc suspend irq during usb enters suspend. This unexpected
suspend irq occurs due to the udc still pulls up dp, but the host
suspends bus due to it finds the device has disconnected. The device
turns off high speed terminal will be considered a disconnection event
from the host.
It also fixes the bug ENGR00325724 describes.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 9d9ddd142cdbfb4bcbaae161a452596668441b1a)
If ID or VBUS is from external block, don't enable its wakeup
because it isn't used at all.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
This is an optional regualator, without this change, it will
tried to get dummy regulator, and cause the kernel dump by
calling regulator_disable.
Reported-by: Anson Huang <anson.huang@nxp.com>
Tested-by: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For imx7ulp, the power of USB controller may be lost, add power_lost_check
API for USB recovery.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 64a3e0c3eb)
When the usb in idle, it calls release_bus_req.
When the usb is going to use, it calls request_bus_req.
This is a rework patch of ENGR00286459 and ENGR00286926.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
LDO2p5 cannot be disabled in low power idle mode when the USB driver
enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy
regulator that the USB driver will enable when VBUS wakeup is required.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 1c75404665)
Add power lost check implementation for i.MX7D.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 59102c3b9756923f1c8cdba8bcab7b8611685321)
Disable usb wakeup as initial setting in probe.
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit bf54f23766bcebd781f1c09bd68bc00d790160c8)
We have different wakeup setting for different roles:
For peripheral-only mode, we may only enable vbus wakeup.
The Micro-AB cable should not be considered as wakeup source.
For host-only mode, the ID change or vbus change should not be
considered as wakeup source. For OTG mode, all wakeup setting
should be considered as wakeup source.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The glue layer may need to know current available role, add
ci_hdrc_query_available_role for that.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 5c340402131ca6eacaeb122deb1ee59bcea2778c)
This patch is to prevent usb entering low power mode if vbus is on even gadget
driver is not binded, by holding the PM count of ci->dev.
So, there are 3 pm usage_count status:
- ci->dev: 1 ci->gadget.dev: 1
Device mode with gadget driver binded and vbus on.
- ci->dev: 1 ci->gadget.dev: 0
USB vbus on but gadget driver not binded.
- ci->dev: 0 ci->gadget.dev: 1
USB OTG FSM is in a_peripheral mode.
Above 2 device's pm usage_count hold by ci otg(ci->dev) and usb gadget
(ci->gadget.dev).
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 673c6bf1b3aa0b1b698569b9259712b0e765be32)
This patch adds a timer to delay turn on vbus after detecting data pulse
from B-device, this is required by OTG SRP timing.
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit f02ee3e93715c41f5b1e11140f36e350c7ed4d6b)
This patch is to complete support usb resume from power lost in non-otg
fsm mode:
- Re-init usb phy.
- Support role changes during system sleep with power lost.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
This is to fix possible deadlock of usb host with mass storage removal after
system resume, by waiting host finish device disconnection and then stop host
This is a patch merge for ideas from below 2 patches:
ENGR00308442-2 usb: chipidea: otg: wait devices disconnected before stop host.
ENGR00310498 usb: chipidea: otg: fix otg role switch from host to device failure
How to reproduce:
Failure case 1:
- Enable console wakeup:
echo enabled > /sys/class/tty/ttymxc0/power/wakeup
- Connect a udisk with ID cable to OTG port.
- Suspend the system:
ehco mem > /sys/power/state
- Remove ID cable together with udisk.
- Wakeup the system by console.
- OTG port cannot switch to device role.
Failure case 2:
- Connect a udisk with ID cable to OTG port.
- Enable usb wakeup by ./low_power_usb.sh
- Suspend the system:
ehco mem > /sys/power/state
- Remove ID cable together with udisk.
- System wakeup but OTG port cannot switch to device role.
Root cause:
In this case, ID change interrupt generates before port change interrupt,
so with irq disabled, ci_handle_id_switch() will find there is usb device
still connected and wait it to disconnect by sleep, but disconnect will not
happen since usb irq still disabled so port change irq has no chance to be
handled.
How this patch is fixing this issue:
This patch waits host finish handle usb device disconnection before stop host,
and enables irq before sleep and disables irq after, thus port change
rq can be handled and usb device disconnection can timely happen, then
ci_handle_id_switch() can stop host and switch to device role correctly.
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit 56d79fbaa4bea3670542a96354ee7034239a1c1f)
(cherry picked from commit d5350035b22cfa1cef15956612a4eec36b4dc0de)
This patch adds a new API ci_hdrc_host_has_device to check if there
is usb device connected on host port.
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit fd68eb8ef9cdac1ca861ccbc3d01d874123bf52a)
(cherry picked from commit 13ad3de98a)
Export ci_handle_id_switch interface for controller handle id
changes during system sleep with power lost.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit e130afe623307b69b3737cb5a41905400082ca36)
(cherry picked from commit 7acb88a1d4d4f49cebe7c92ce92937e94c2b6486)
(cherry picked from commit 509c78374c)
This patch implements the suspend and resume routine for udc resume
from power lost.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit a1389afb0c70d4024e07ff9634f10eba559af374)
(cherry picked from commit 733d0547c2cc90299b35b1b0d34073838ffcf6d9)
(cherry picked from commit 458b611c60)
This patch implements the suspend and resume routine for save and restore
registers of ehci, this is to support host resume from a system sleep with
power lost.
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit ab8e5ef4265b706b47b2e3ee36e079d63a3f0bce)
(cherry picked from commit 31039b54ec0bd2429f758626c0abfc9898c5aa82)
(cherry picked from commit 77aaaabe4b)
Host needs to reset controller for recovery from power lost.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit 136222e683d40890f11985e61b447f2481b8bff5)
(cherry picked from commit 606efc2e85)
We may need to do extra things for system suspend/resume per different
roles(e.g. power lost during system sleep), so define system suspend/resume
handler for roles.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit cac6f339b30102c63f8bb5c56e77d5c7a6c6b4b5)
(cherry picked from commit 11fe36e4b3)
i.MX6SX mega off can shutdown domain power supply if none of peripheral
in this domain is registered as wakeup source, this patch adds usb controller
imx specific re-init after resume from such power lost during system sleep.
Signed-off-by: Li Jun <b47624@freescale.com>
(cherry picked from commit cd37f9b7157322e28c1d336e42813d441eb1f778)
Signed-off-by: Peter Chen <peter.chen@nxp.com>
- Change .notify's return value from void to int, update msm notify_event
return value accordingly.
- Add CI_HDRC_CONTROLLER_VBUS_EVENT and
CI_HDRC_CONTROLLER_CHARGER_POST_EVENT to finish the USB charger
detection flow.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <jun.li@freescale.com>
(cherry picked from commit 681ca18061)
If the port receives the resume during the suspending, it needs to
quit instead of going on, it could keep controller status correct,
and eliminating below timeout warning message.
cdns-usb3 5b110000.usb3: wait lpm_clk_req timeout
cdns-usb3 5b110000.usb3: wait phy_refclk_req timeout
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
If the non-control endpoints want to halt, but there are pending
requests on this endpoint, we need to return -EAGAIN, otherwise,
the controller may be in stuck if we stall the doolbell'ed
endpoint.
With this change, we could pass the USB certification MSC test.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The NXP Cadence XHCI host has the same issue with Intel's,
it is triggered by reboot test, the test case is described
at this jira ticket.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
- If the UDC is not started, we need not to access register at .udc_stop
- Clear all priv_ep flags except EP_CLAIMED which should be cleared at
.udc_stop
- Clear warning message that the .ep_disable may be called twice, one
from class driver, one from UDC driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At Android ADB and MTP use case, TD consumes very fast compared to TD has
finished, so we need to enlarge the TD list to avoid "no free TD error".
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
define_trace.h needs to know how to find our header, otherwise
we will have below build error:
In file included from drivers/usb/cdns3/trace.h:446:0,
from drivers/usb/cdns3/trace.c:11:
./include/trace/define_trace.h:89:43: fatal error: ./trace.h: No such
file or directory
#include TRACE_INCLUDE(TRACE_INCLUDE_FILE)
^
compilation terminated.
scripts/Makefile.build:326: recipe for target
'drivers/usb/cdns3/trace.o' failed
make[3]: *** [drivers/usb/cdns3/trace.o] Error 1
make[3]: *** Waiting for unfinished jobs....
CC drivers/usb/host/pci-quirks.o
CC drivers/usb/isp1760/isp1760-core.o
CC drivers/usb/misc/ehset.o
CC drivers/usb/isp1760/isp1760-if.o
scripts/Makefile.build:585: recipe for target 'drivers/usb/cdns3' failed
make[2]: *** [drivers/usb/cdns3] Error 2
make[2]: *** Waiting for unfinished jobs....
CC drivers/usb/misc/usb3503.o
CC drivers/usb/host/ehci-hcd.o
CC drivers/usb/isp1760/isp1760-hcd.o
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit b0067d4b7c)
The Cadence xHCI doesn't support BEI well, it causes the disconnection
of ISOC devices can't be detected, so we disable it.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 258bb7de5b)
Keep the internal framework, just use the UDC driver from
upstream version which supports multiple TD.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
It is an experimental feature, and tested by internal team for
Carplay feature.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 270c1ea516)
When the interrupt occurs during the USB is entering suspend, the
cdns->lpm flag may not be updated well, the below oops may occur.
We treat above interrupt as wakeup interrupt, it should be handled
after lpm flag is set.
irq 120: nobody cared (try booting with the "irqpoll" option)
CPU: 0 PID: 107 Comm: kworker/0:1 Tainted: G O 4.14.78 #1
Hardware name: Freescale i.MX8QM MEK (DT)
Workqueue: pm pm_runtime_work
Call trace:
[<ffff000008083230>] el1_irq+0xb0/0x124
[<ffff000009028fcc>] _raw_spin_unlock_irqrestore+0x18/0x48
[<ffff000008147a6c>] __irq_put_desc_unlock+0x1c/0x44
[<ffff000008149e4c>] enable_irq+0x54/0x90
[<ffff0000089cb08c>] cdns3_enter_suspend+0x30c/0x3ac
[<ffff0000089cb274>] cdns3_runtime_suspend+0x40/0x78
[<ffff000008796cd8>] pm_generic_runtime_suspend+0x28/0x48
[<ffff0000087a7400>] genpd_runtime_suspend+0x90/0x21c
[<ffff00000879a14c>] __rpm_callback+0x130/0x264
[<ffff00000879a2a4>] rpm_callback+0x24/0x78
[<ffff000008798ec8>] rpm_suspend+0x10c/0x668
[<ffff0000087996b4>] rpm_idle+0x1c0/0x390
[<ffff00000879aa6c>] pm_runtime_work+0x94/0xe0
[<ffff0000080fac88>] process_one_work+0x140/0x3f8
[<ffff0000080fb078>] worker_thread+0x138/0x3e4
[<ffff0000081014e0>] kthread+0x104/0x130
[<ffff00000808552c>] ret_from_fork+0x10/0x18
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 1befe1d04e)
(cherry picked from commit 35574d63d9)
USB3 device should accept LGO_U1 request after receiving SET_CONFIGURATION.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 979c91e49c)
The USB compliance link test TD 7.23 requires the U1 exit time
is from 900ns to 1.2us, the current code is 744ns, the default
value is 1.104us, so changing it as default value.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ec499d83ba)
(Merged upstream reviewing patch, and add cdns support -- Peter Chen)
Ensure that the shared_hcd pointer is valid when calling usb_put_hcd()
The shared_hcd is removed and freed in xhci by first calling
usb_remove_hcd(xhci->shared_hcd), and later
usb_put_hcd(xhci->shared_hcd)
Afer commit fe190ed0d6 ("xhci: Do not halt the host until both HCD have
disconnected their devices.") the shared_hcd was never properly put as
xhci->shared_hcd was set to NULL before usb_put_hcd(xhci->shared_hcd) was
called.
shared_hcd (USB3) is removed before primary hcd (USB2).
While removing the primary hcd we might need to handle xhci interrupts
to cleanly remove last USB2 devices, therefore we need to set
xhci->shared_hcd to NULL before removing the primary hcd to let xhci
interrupt handler know shared_hcd is no longer available.
xhci-plat.c, cdns/host.c first create both their hcd's before
adding them. so to keep the correct reverse removal order use a temporary
shared_hcd variable for them.
For more details see commit 4ac53087d6 ("usb: xhci: plat: Create both
HCDs before adding them")
Fixes: fe190ed0d6 ("xhci: Do not halt the host until both
HCD have disconnected their devices.")
Cc: Joel Stanley <joel@jms.id.au>
Cc: Chunfeng Yun <chunfeng.yun@mediatek.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Jianguo Sun <sunjianguo1@huawei.com>
Cc: <stable@vger.kernel.org>
Tested-by: Peter Chen <peter.chen@nxp.com>
Tested-by: Jack Pham <jackp@codeaurora.org>
Reported-by: Jack Pham <jackp@codeaurora.org>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ab8ddbf8e9)
It may be used by xhci platform driver, fixed below error when
building xhci as module.
ERROR: "xhci_bus_suspend" [drivers/usb/cdns3/cdns3.ko] undefined!
linux-imx/scripts/Makefile.modpost:92: recipe for target '__modpost' failed
make[2]: *** [__modpost] Error 1
linux-imx/Makefile:1231: recipe for target 'modules' failed
make[1]: *** [modules] Error 2
Reported-by: Bruce Zhang <bo.zhang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit f4211724d6)
When the USB port goes to suspend, PowerState should set to "D1"
(the D2 and D3hot are not supported now); PowerState should set to
"D0" when the USB port goes to resume.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit c57f21e103)
The controller needs to set CFG_RXDET_P3_EN within 100ms after
USB3 port is set to U3, but when there is a USB3 HUB in port, the
USB2 port bus suspend may take more than 100ms to finish, it causes
disconnection and PHY can't enter low power mode in system suspend
routine.
To fix this issue, we implement the platform .bus_suspend, and set
CFG_RXDET_P3_EN just after xhci_bus_suspend. The LPM_2_STB_SWITCH_EN
only needs to be set one time, and OTG_STB_CLK_SWITCH_EN isn't needed
to set for host/device mode according to IC engineer's sugguestion.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 2bc2bc9d40)
We only unmap the request which is demanded from the gadget driver.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
- The gadget speed should be reset to USB_SPEED_UNKNOWN at any de-init
process
- The TRB buffer should be free when the gadget is removed
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Move all memory allocation to usb_ss_allocate_trb_pool and align with
usb_ss_free_trb_pool.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit cfed2bf84c)
It is necessary to add ep0 request for its ep request list,
ep0 request may need to be dequeued when remove gadget driver,
see composite_dev_cleanup for detail.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 0e666f6b02)
spin_unlock_irqrestore is missing if usb_gadget_map_request_by_dev
fails.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit ce04a997e4)
In case a ZLP is required to finish the transfer, this patch implements it
by adding a request with a preallocated buffer, which is shared with all
EPs, please be noted this patch is only for non-EP0, ZLP for EP0 will be
added later.
Reported-by: Andy Tian <yang.tian@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 03d202e88c)
Confirmed from CDNS, this code is from bare metal, and not needed
for Linux. Below are their response:
This is alternative deferred interrupt.
This is intended to be used in Bare Metal to not block system in
interrupt.
This was not fully checked in Linux, so we do not recommend to use it
there.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit e5a1abc937)
If the user buffer is not 8-byte aligned, it needs to use debounce
buffer for DMA transfer, and in this commit, we do below two
improvements:
- Copy back the request buffer when the transfer has completed
- Using Macro for default debounce buffer size
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 648aa52282)
When using usbtest <--> f_sourcesink to do usb test, the current
code can't do test on same EP twice (eg EP1OUT), the DMA engine
can't restarted for the second test, the real reason is unknown.
The workaround for this problem is reset EP at .ep_enable, and
this operation is reasonable since we can reset EP at its
initialized state before using it. The fail cause for current
code like below:
./testusb -a -t 1
/* do it again */
./testusb -a -t 1
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 57781498d1)
There are may active transfers when we would like dequeue request
or disable endpoint, so it needs to flush the on-chip buffer before
dequeue software request.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 4e88d4a56b)
Add API pair wait_reg_bit_set/clear to replace infinite wait code.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 5621f390aa)
For Cadence USB3 device mode, the onchip buffer size is fixed
(eg: 18KB at this version), and the software needs to judge
if the onchip buffer is full when tries to configure endpoint.
For IN endpoint, each endpoint has its own onchip buffer;
For OUT endpoint, all endpoints share the same onchip buffer.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 2ceddbe5e4)
With Linux PC USB2 connection, if L1 enable bit is set during the
initialization, the usbsts.cfgsts can't be 1 (device is in the
configured state) after setting usbconf.cfgset, move L1 enable
after USB configuration done can workaround this issue.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit a05fbc0cdd)
When the EP is going to enable, it should not be stalled, and the
software flag needs to be updated. It fixes the mass_storage gadget
can't work after re-plug in.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 32cee02f2e)
When we receive the bus reset, according to CH 9.4.5, the U1
and U2 should be reset to disabled status.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 74168280c3)
Implement selfpower setting between USB gadget core and
controller driver
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 79c2172df4)
Superspeed device should support USB 2.0 LPM feature.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit d4c99663dd)
We add endpoints to ep_match_list when adding gadget module, but
we delete the endpoints from the ep_match_list before set configuration.
When the re-enumeration after the new connection, the ep_match_list
is empty, in that case, the non-ep0s have not configurated, the
transfer on them will be failed.
In this commit, we only delete the endpoints from the list when we
remove the gadget module.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ad13dd3ffd)
For mass_storage gadget, when we remove the module after disconnection,
the request->complete at .ep_dequeue can't be executed, then the
wakeup_thread for certain endpoints is not called, the sleep_thread
will be dead lock.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ac0d56a6df)
The TPL support is used to identify targeted devices during
EH2.0 and EH3.0 certification test.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 3e96618557)
Cadence3 low power sequence doesn't allow too much time gap
between xhci bus suspend and controller suspend,
otherwise, the disconnection will be seen between them.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 3c70ec34f7)
Improve USB PHY operation, and keep 32K clock for RX detection
all the time, it can fix SS connection can't be recognition
from U3.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit db01f49aaa)
Current design tries to switch role no matter it is a dual-role device
or a single-role device. It produces extra switch process, and have an
error message at console when tries to start a non-exist role.
In this commit, we do below changes
- The role switch work queue is only for dual-role or peripheral-only
device.
- For peripheral-only device, we need to switch role to CDNS3_ROLE_END
since we need to close vbus and turn off clocks at this role when the
cable is disconnected from the host; And we do noop when the external
cable indicates we are host.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 2000169e68)
At imx8qm/imx8qxp A0 chip, there is a vbus toggle issue, so we need to
force the vbus as high before connection, otherwise, there will be endless
connect/disconnect interrupts for USB2 and causes enumeration failure.
The current work flow only cover this during the role switch, but omit
it when the connection has established at module probe routine.
This patch fixes it by moving force vbus operation to cdns_set_role to
cover both static and dynamic recognition issue.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit c89cf074ea)
Cadence IP has one limitation that all endpoints must be configured
(Type & MaxPacketSize) before setting configuration through hardware
register, it means we can't change endpoints configuration after
set_configuration.
In this patch, we add non-control endpoint through usb_ss->ep_match_list,
which is added when the gadget driver uses usb_ep_autoconfig to configure
specific endpoint; When the udc driver receives set_configurion request,
it goes through usb_ss->ep_match_list, and configure all endpoints
accordingly.
At usb_ep_ops.enable/disable, we only enable and disable endpoint through
ep_cfg register which can be changed after set_configuration, and do
some software operation accordingly.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit a7146b650c)
At current setup packet handling flow, the setup packet buffer
is only prepared after the controller receives the setup packet,
then stores it at its internal buffer, and trigger DESCMIS interrupt
(Transfer descriptor missing) to prepare TRB for it.
The shortcoming of this design is there is an extra DESCMIS interrupt,
and consume more time on enumeration process. As an improvement,
we parepare setup buffer beforehand, it is prepared at below situations:
- After bus reset has finished.
- For non-data stage setup transfers, prepare it before sending ACK for
status stage.
- For data stage setup transfers, prepare it after data stage but
before sending ACK for status stage.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit a5fae341d8)
The __cdns3_gadget_stop holds spinlock before calling
usb_ss->gadget_driver->disconnect which calls ep_disable,
and ep_disable tries to hold spinlock too.
To fix it, let spinlock only protect the variable and register access.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 69c8b18235)
This patch set adds both runtime and system-level pm support.
For runtime-pm: both host and device wakeup events are supported.
For system-pm: only host wakeup events are supported, device wakeup
events are from other peripherals, and will support later.
BuildInfo:
- SCFW 245582b, IMX-MKIMAGE 0ad6069a, ATF 6bd98a3
- U-Boot 2017.03-imx_v2017.03+gfa65b0a
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 248fa444f3)
Since the runtime endpoint type is decided by device descriptors,
we delete useless is_iso_flag which is decided during the initialization.
It also fixed a bug the max_packet_size is determined wrongly for
high/full speed connection.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 644e1c75c5)
Since the controller doesn't know vbus status well due to IC limitation,
it needs to force vbus status for controller when the connection and
disconnection occur.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit e5c88818c1)
The IP has some issues to detect vbus status correctly, we have to
force vbus status accordingly, so we need a status to indicate
vbus disconnection, and add some code to let control know vbus
removal, in that case, the controller's state mechine can be correct.
In this commit, we increase one role 'CDNS3_ROLE_END' to for
this status.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 287d40d92e)
At probe, the main hcd is added first, then shared_hcd is added later,
so when we tries to remove hcds, the shared_hcd needs to remove first.
BuildInfo:
- SCFW 1f59442e, IMX-MKIMAGE fb52c576, ATF
- U-Boot 2017.03-imx_v2017.03+g34be5a2
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 3e56a1e631)
When it goes to start new role, the interrupt may be occurred before
role_start returns, but at this time, the cdns->role is still the old
role, so the interrupt handler will make mistake.
In this commit, we set desired role before role_start, if the role_start
has failed and the desired role is different with current one, it tries
to back current role.
BuildInfo:
- SCFW 1f59442e, IMX-MKIMAGE fb52c576, ATF
- U-Boot 2017.03-imx_v2017.03+g34be5a2
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 0f21c9e70b)
Add PHY shutdown and clock disable operations at cdns3_remove.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit fc7ec8ba1a)
Since the USB Type-C port only has two data roles, host and device,
the controller driver can only receive above two events, it can't
remain 'disconnection' state alone at controller driver due to there
is no such event from Type-C.
Due to above, we delete the controller state "CDNS3_ROLE_END" which
stands for 'disconnection' state before. Instead, when we use
"CDNS3_ROLE_GADGET" stands for it, and this state is the default
state for controller.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit cb3c8642c4)
At the extcon notifier, it will queue a work item, so we need to
make sure the work is initialized before it is used.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 99c0401ec8)
We should set wMaxPacketSize according to connection speed,
and add missing ep0 descriptor.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 2118444b58)
After USB_CONF.DEVDS is set, the device mode will be disabled, and the
host will set the disconnection, this bit is just like DP pullup bit
at USB2.
And we add disable/enable device mode logic at .pullup function for
UDC core.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 5847b6c6e6)
When the UDC core calls ->udc_stop, we need to free related non-ep TRB
memory.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 57a2906928)
When the port does not connect to host, the controller's gadget
mode is enabled, so we need to avoid visiting register at this situation.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit f7da0154aa)
We need to destroy both host and gadget roles when removing module.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit f4ba47c18f)
If there are too many interrupts for non-control ep, the
no-one handled interrupt issue will occur due to without
return IRQ_HANDLED for them.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ea3d9d8759)
Add Cadence USB3 IP driver, this is the 1st version for this driver,
so wrapper layer and PHY layer are still IP core file (core.c).
Below functions are supported:
- Basic host function
- Limited gadget function, only ACM (old g_seiral) are supported, and
mass_storage support is not very well.
- Role switch between host and device through extcon design
(Eg, Type-C application NXP PTN5150).
Below functions are missing:
- Multi-queue support at gadget function, without this feature, many
gadget function are missing.
- Low power mode support, including system PM and runtime PM
- Wakeup support
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ef808bfac1)
Upstream version is an initial version, it can't be used directly.
We will use downstream version for v5.4 instead.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
cherry-pick below patch from imx_3.14.y
ENGR00330403-3: ASoC: fsl: port si476x machine driver from imx_3.10.y
Port si476x machine dirver for i.MX series SoC and binding doc from imx_3.10.y
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
By using gstreamer plugin v4l2radio, it will call VIDIOC_S_CTRL with
V4L2_CID_AUDIO_MUTE, but return failed.
So add V4L2_CID_AUDIO_MUTE CTRL support for radio-si476x.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit c18520adfd6de40dcc0659ddd778b0a2bd383cd4)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
There is issue that system can't enter suspend while the si476x is
working.
The reason is that with the workqueue thread is still working after
i2c enter suspend, then cause the cpu_suspend function failed.
This patch is to use the system_freezable_wq instead of the system_wq,
that the workqueue will be freeze before system enter suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The si476x_core_get_revision_info will send i2c command to FM module, if it
return error, there is no FM modules attached, so we need't to register the
sound card. otherwise, the pulseaudio will access this sound card, but
return a lot of i2c error.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 4c8e9916128f05f9b4115e1ee1af4a1e7d800c4a)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Currently, si476x-rev1.0 and si476x-rev4.0 board just support A10
compatible command set. For si476x-rev1.0 board, its firmware revision is
unsupported and will revert to A10 compatible function. For si476x-rev4.0
board, its firmware revision is two and will use A30 function, but A30
command set function can't work for the rev4.0 board.
So make the command set configurable in dts. If "revision-a10" is present,
set the revision to SI476X_REVISION_A10 to use A10 compatible commit set.
Otherwise, get the revision from si476x register.
Signed-off-by: Zidan Wang <b50113@freescale.com>
(cherry picked from commit b648714c3b71ee084188ae04b1e6a6f2554fe2cb)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add of_compatible for si476x-codec, then si476x-codec driver will have
codec_of_node, So machine driver can use the codec_of_node.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit e2ec44f91a21b127e155e8317d06e8ead7fd2678)
(cherry picked from commit ac6decaf5414e784ae81a524edc2f32060061b59)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
cherry-pick below patch from imx_3.14.y
ENGR00276567-6 mfd: si476x: Use default configuration when no platform data
This would allow the driver to work normally without specific platform
data, when using devicetree for example.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit 23e369b88b546d7b699ca9ec46e195a05c61b717)
(cherry picked from commit a2449e1d303e341f32556fb7f4ebc7dcbdd9ead1)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
cherry-pick below patch from imx_3.14.y
ENGR00276567-4 mfd: si476x: Fix power up failure
This's some logical error in power-up code, thus fix it.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit 77d97ad1bb77c0e3c60b9781a06b61d4b4667de1)
(cherry picked from commit b656522da2685ef9a4da2229b6786d5cd0c12189)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With dual fifo enabled, the case recording mono sound
in the background, playback sound twice in parallal,
the second time playback sound may distort, the possible
reason is using dual fifo to playback mono sound is not
recommended.
This patch is to provide a option to use multi fifo script,
which can be dynamically configured as one fifo or two fifo
mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 9d71068cf7d1fc1ec36e5fb34a321c1bdbaad324)
On recent kernels clks which are marked with CLK_SET_RATE_GATE are
"protected" against further changes at clk_prepare time, including clk
reparent. Wrap clk set_parent and set_rate operations with
disable_unprepare and prepare_enable.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Allow PLL switch for playback stream only and remove
PLL switch guard with regard to capture stream as the
clock for capture stream is provided externally.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit c8213da5fbcd370acb4d764bef5df5981a517c11)
Set SPDIF master clock frequency as function of rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 407430a03994e4acff508afe8c9772680558c1c5)
iMX8 platforms typically have 2 AUDIO PLLs being configured to handle
8k and 11k audio rates. The patch implements the functionality to
select at runtime the appropriate AUDIO PLL as function of audio
file rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 3a29374cfbe0bfaf1785fa66163ffd3b9e30aca3)
Use txclk array to keep all 7 TxClk sources instead of keeping clocks per
rate - need to do this in order to avoid multiple prepare_enable /
disable_unprepare of the same clock during suspend/resume.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 61bc5c83af0713a09b520486051a2efcbe852763)
Since i.MX8 MQ SPDIF interface is able to capture raw data.
Add support in SPDIF driver for this functionality.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit e13a302391f56a6bb547ff89e3fac73941cee429)
specify the spdif in imx8mm for the ipg clock is higher that
it can support 192kHz
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Base on latest power management design in MLK-17074, every driver
need to enter runtime suspend state in suspend, so the driver should
call the pm_runtime_force_suspend in suspend. with this implementation
the suspend function almost same as runtime suspend function. so remove
the suspend function, just use pm_runtime_force_suspend instead.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8 when systerm enter suspend state, the power of subsystem will be
off, the clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8qm/imx8qxp, the power domain of IP is enabled when
pm_runtime_get_sync() is called, and disabled when pm_runtime
_put_sync() is called. when power domain is disabled, the value
of registers will lost, so we need to use the regcache_sync()
to restore the registers in fsl_spdif_runtime_resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Introduce a SoC data struct which contains the differences between
the different SoCs this driver supports. This makes it easy to support
more differences without having to introduce a new switch/case each
time.
And in imx8qm, the spdif has two interrupt numbers and the burst size
should be 2 for EDMA limitation to support dual FIFO.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Validity bit is set in default, which means the data is not reliable,
The receive device may drop this data. So clear it in default, and
provide a mixer interface for user to control this bit.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Add snd_soc_pm_ops in machine driver to make the trigger suspend/resume
be called in suspend/resume. Remove platform_set_drvdata for redundance,
When register card, it has been called.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit fe21119eed18804b2bc7c47216b6f4478de0268d)
In imx6qp, there is no mega fast. After suspend, but before resume,
there will be spdif interrupt, if set cache only in suspend, then we
can't clear the interrupt, because regmap_write only write to cache.
So the system will hang for the interrupt can't be cleared.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 2a6a522c86d6c0fe80023c4327ca7ce4792035c8)
cherry-pick below patch from imx_3.14.y
ENGR00331799-2 ASoC: fsl_spdif: don't change the root clock rate of spdif in driver
The spdif root clock may be used by other module or defined with
CLK_SET_RATE_GATE, so we can't change the clock rate in driver.
In this patch remove the clk_set_rate and clk_round_rate to protect the
clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit c77170b2c9a9737f6fd61a5ea85a43b90e8ef02b)
[ Aisheng: fix incorrectly removing u64 rate_actual ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This is needed so that at resume will restore the
correct SAI registers.
Looks like the call to regcache_mark_dirty was missed when
porting commit 760bd61874 ("MLK-15960-2: ASoC: fsl_sai: refine
the pm runtime function")
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
In file included from ../sound/soc/fsl/fsl_sai.c:15:0:
../sound/soc/fsl/fsl_sai.c: In function ‘fsl_sai_startup’:
../sound/soc/fsl/fsl_sai.c:957:51: error: ‘offset’ undeclared (first use in this function)
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
^
../include/linux/regmap.h:77:31: note: in definition of macro ‘regmap_update_bits’
regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
^
../sound/soc/fsl/fsl_sai.h:84:37: note: in expansion of macro ‘FSL_SAI_TCR3’
#define FSL_SAI_xCR3(tx, off) (tx ? FSL_SAI_TCR3(off) : FSL_SAI_RCR3(off))
^
../sound/soc/fsl/fsl_sai.c:957:34: note: in expansion of macro ‘FSL_SAI_xCR3’
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
^
../sound/soc/fsl/fsl_sai.c:957:51: note: each undeclared identifier is reported only once for each function it appears in
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
^
../include/linux/regmap.h:77:31: note: in definition of macro ‘regmap_update_bits’
regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
^
../sound/soc/fsl/fsl_sai.h:84:37: note: in expansion of macro ‘FSL_SAI_TCR3’
#define FSL_SAI_xCR3(tx, off) (tx ? FSL_SAI_TCR3(off) : FSL_SAI_RCR3(off))
^
../sound/soc/fsl/fsl_sai.c:957:34: note: in expansion of macro ‘FSL_SAI_xCR3’
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The patch enable mapping the number of pins required to play or record
a specific number of channels to a specific dataline mask.
Three consequent elements in "fsl,dataline" and "fsl,dataline,dsd" defines a
particular mapping, for instance for: fsl,dataline = "0 0xff 0xff 2 0x11 0x11"
there are two mappings defined:
default (0 pins) "rx" and "tx" dataline masks: 0 0xff 0xff
2 pins "rx" and "tx" dataline masks: 2 0x11 0x11
In case if property is missing, then default value "0 0x1 0x1" is considered.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Both dataline_off and dataline_off_dsd fields are unsigned,
thus checking negative values make no sense. Use a signed
variable to calculate offset instead.
This fixes Coverity issue: CID1899299
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Commit 786c8bd56324 ("MLK-19734-3: dmaengine: imx-sdma: change
fifo offset of fifo_num") change the offset of fifo_off, so
the sai driver need to be updated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit c94ce8776e01f1f40a866d4da89603ab042dde0f)
Make fsl_get_pins_state function inline.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit badcb97ebd8c0aae89f76e979bcc801be35c7400)
Similar to DSD512 case we need a PCM pinctrl state option to map SAI BCLK
to codec MCLK pin. Given that bitclock rate is function of slots number and
slot width - pass bclk rate as parameter value from SAI driver.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 826caeae32713cff7ad50de8ebc9915de975edd9)
The FSL_SAI_VERID and FSL_SAI_PARAM only available
when reg_offset is 8
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0a0695672dc7ecf07a7642ff6f99f0b9d3a26b32)
Currently SAI master clock derives from an audio pll that cannot be
changed at runtime. iMX8 SoC has 2 audio plls usually configured to support
either 8000Hz (8k,16k,32k,48k,etc) or 11025Hz (11k,22k,44.1k,88.2k,etc)
ranges of rates - thus at runtime a SAI interface is able to play only one
range of rates. The patch allows dynamic SAI master clock reparenting to
the appropriate audio pll as function of the audio stream rate to be
played/recorded.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
ALSA API has a standard way to configure DAI BCLK by calling
"snd_soc_dai_set_bclk_ratio" function. So use it to set BCLK ratio
and calculate SAI BCLK frequency.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split machine imx-pdm changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
a) Add support for new SAI (VERID, PARAM, MCTL, MDIV) registers
available in i.MX 850d (SAI v3.00) and i.MX 845s (SAI v3.01).
b) Handle SAI MCLK register as function of SAI IP version.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
For some cases (like AMIX) pinctrl may be null - this
breaks SAI functionality. Enforce pinctrl null pointer
checking prior calling any function which involves
pins state changes.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Transmit data pins will output zero when slots are masked or channels
are disabled. In CHMOD TDM mode, transmit data pins are tri-stated when
slots are masked or channels are disabled. When data pins are tri-stated,
there is noise on some channels when FS clock value is high and data is
read while fsclk is transitioning from high to low.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
ULP B0 integrate the latest SAI IP, there is version id and
parameter id register in the beginning, so update the offset
for ULP B0
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The register definition is not completed for SAI support
8 transmit data register and 8 receive data register.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Because fsl_sai_dai rates doesn't have a specific set of
rate values (.rates = SNDRV_PCM_RATE_KNOT) we need to provide
rate_min and rate_max otherwise functions trying to get
supported parameters will get confused and return an error.
Fixes: 1b6f0496e0 ("MLK-17428-8: ASoC: fsl_sai: support 768KHz sample rate")
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
With the existing implementation the SAI pinctrl state is restored to
default after resume - this breaks DSD playback after resume.
Restore DSD pinctrl state in snd_soc_dai_driver resume callback.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Fix build warning
sound/soc/fsl/fsl_sai.c: In function ‘fsl_sai_trigger’:
sound/soc/fsl/fsl_sai.c:736:3: warning: this ‘while’ clause does not guard... [-Wmisleading-indentation]
while (tx && i < channels)
^~~~~
sound/soc/fsl/fsl_sai.c:742:4: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘while’
j++;
^
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The codec always mux the LRCLK pin to DSD data line, so when
we want to support DSD, the pinmux is different. For two channel
DSD, the DSDL is mapped to TX0, but the DSDR is mapped to TX4,
there is address offset for the fifo address of TX0 and TX4, TX4's
fifo is not adjacent to TX0's.
Usually, if mapping is TX0 and TX1, that will be easy for SAI
and SDMA to handle, that SAI can use the FIFO combine mode, SDMA
can use the normal script.
so for DSD:
1. The SDMA should use the multi-fifo script, and SAI can't
use the FIFO combine mode.
2. driver should to check the dts configuration(fsl,dataline) for
which dataline is used corrently
3. maxburst is the multiply of datalines
4. each channel of DSD occupy one data lane
5. according to data lane, set TRCE bits
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The filter_data should be used for dma_filter_fn function,
but we used the filter_data wrongly for dma channel name.
This patch is to fix the issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviwed-by: Daniel Baluta <daniel.baluta@nxp.com>
[ Aisheng: split out esai and pcm changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Allow set SAI bit clock frequency trough snd_soc_dai_set_sysclk
function call on machine sound drivers.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
xMR setting must be set as min(channels,slots) since
both "channels < slots" and "channels > slots" scenarios
are possible.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
When there is multi data line enabled, the xMR setting is
wrong if according to the channel number. which should
according to the slot number
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
If there is only two channels input and slots is 2, then enable one
port is enough for data transfer. so enable the TCE/RCE according to
the input channels and slots configuration.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The patch introduces the master flag handling
as function of direction and the option to provide
the flag value from DTS.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
In imx8qm/imx8qxp, the power domain of IP is enabled when
pm_runtime_get_sync() is called, and disabled when pm_runtime
_put_sync() is called. when power domain is disabled, the value
of registers will lost, so we need to use the regcache_sync()
to restore the registers in fsl_sai_runtime_resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The fifo_depth is changed to 64 in imx8qm/imx8qxp, in imx8mq, the
fifo_depth is 128. which is mentioned in their ADD.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
EDMA requires the period size to be multiple of maxburst. Otherwise the
remaining bytes are not transferred and thus noise is produced.
We can handle this issue by adding a constraint on
SNDRV_PCM_HW_PARAM_PERIOD_SIZE to be multiple of tx/rx maxburst value.
This is based on a similar patch we have for ESAI:
commit bd3f3eb2a37c
("MLK-15109-2: ASoC: fsl_esai: add constrain_period_size")
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The version of sai is upgrate in imx8mq, which add two register
in beginning, there is VERID and PARAM. the driver need to be
update
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
When starting a playback the initialization data used to reduce underruns
was send to the transmit data register after the DMA requests were enabled.
This patch moves the initialization phase before enabling the DMA so the
data is transmitted in correct order.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
With current clock configuration we cannot derive bitclk for S20_3LE
format in SAI master mode. There was an attempt to fix this in commit
65e6b5f1b4a7 ("MLK-14536: ASoC: wm8960: Fix playback in CPU DAI master mode")
but this broke codec-master mode, thus the patch was partially reverted in
96f0d36e420 ("MLK-14798: arm: dts: imx6ul: Fix wm8960 codec master mode")
So, remove S20_3LE support for SAI master mode. Clients using this
feature should use codec master mode, which is the default one in the
dts anyway.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit c768ed336b ("ASoC: fsl-sai: set xCR4/xCR5/xMR for
SAI master mode")
This change was already introduced by commit 51659ca069 ("ASoC: fsl-sai:
set xCR4/xCR5/xMR for SAI master mode") from upstream.
Manually adjust the code to match the changes introduced by subsequent
commit b2936555bb38 ("MLK-13609: ASoC: fsl_sai: fix for synchronize mode")
by removing updates to FSL_SAI_TMR/FSL_SAI_RMR registers.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
which don't request the dma channel in the probe, but request
dma channel when needed. for the dma channel of cpu dai in BE
can be reused by the FE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: split PCM changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Set specific fmt, for i2s xtor receiver is
in slave mode and i2s xtor transmitter is in master mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
The SAI interface can be a clock supplier or consummer
as function of stream direction, ie when interacting
with I2S XTOR. Removed FSL_SAI_RFR define as it is now
referred as FSL_SAI_RFR0.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
SAI & ESAI interfaces may share the same interrupt with EDMA,
so that we need a flag to trigger proper shared interrupt
handling. For compatibility the same DT flag, "shared-interrupt",
is introduced as the one used in drivers/dma/fsl-edma-v3.c.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split easi changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
TX synchronous with receiver: the RMR should not be changed and
the RCSR.RE should be set in playback.
RX synchronous with transmitter: the TMR should not be changed and
the TCSR.TE should be set in recording.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In imx7ulp1, the sai can support two TX channel and two RX
channels, So the usage need to be updated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
When audio stop, it will first stop dma, then stop cpu_dai.
If there is delay between dma stop and cpu dai stop, there
will be underrun error, the print will cost time, then will
cause another underrun error, it is a infinite loop.
Which will cause the cpu dai can't stop.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4),
RCR5(TCR5) and RMR(TMR) for playback(capture), or there will be sync
error sometimes.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 51659ca069)
After playback audio with sai<->wm8960 sound card, is_slave_mode
will be set, but it will not be cleared. So playback audio with
sai<->sii902x sound card will have no voice.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Just one device can playback(captrue) when using the same SAI.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 7981a488c4da440db21f0544b519b44636a0cabb)
Write initial words to SAI FIFO to reduce underrun error
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 7ba8ae883d84540fac5ed4147d124399537bc0b3)
(cherry picked from commit f4435f35aa2a97551d2c4a12ca316c354a880f85)
When suspend, the widget "AK4497 DAC" is powered down
then there is no sound output, which is not accepted
by LPA definition.
so ignore suspend with DAPM, that the widget will not
be powered down
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
IMX RPMSG is still not ready.
In file included from ../sound/soc/codecs/rpmsg_wm8960.c:27:0:
../sound/soc/codecs/../fsl/fsl_rpmsg_i2s.h:278:29: fatal error: linux/imx_rpmsg.h: No such file or directory
#include <linux/imx_rpmsg.h>
^
compilation terminated.
../scripts/Makefile.build:278: recipe for target 'sound/soc/codecs/rpmsg_wm8960.o' failed
make[4]: *** [sound/soc/codecs/rpmsg_wm8960.o] Error 1
make[4]: *** Waiting for unfinished jobs....
AR arch/arm/mach-imx/built-in.a
In file included from ../sound/soc/codecs/rpmsg_cs42xx8.c:25:0:
../sound/soc/codecs/../fsl/fsl_rpmsg_i2s.h:278:29: fatal error: linux/imx_rpmsg.h: No such file or directory
#include <linux/imx_rpmsg.h>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
we can call the snd_pcm_period_elapsed in timer's callback
to achieve pseudo period wake up, so the nonblock constraint
can be removed
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
add more rates in constraint list, Fixes commit ee959e2c9b
("MLK-19581-3: ASoC: fsl_rpmsg_i2s: support multipul rate and DSD format")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The rpmsg wm8960 codec driver is completed to support
full function, not only the volume control. which cause
an issue that there is no sound when recording, the reason
is that the MIC Bias not enabled, and it should be enabled
through audio routing.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The reason is same as commit d4eb8ab263 ("MLK-19854-1: ASoC:
imx-cs42888: fix error when m4 image is not loaded")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In LPA mode, the system will be resumed by audio notification, when the
period size is small, there will be occasion that when notification
the underrun is happen, but the substream runtime state is not running
so the aplay won't trigger stop first, then start. just only trigger
the start, which don't comply with the convention.
So in this patch, we change the substream runtime state to running, when
the notification happened at resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
For the LPA mode, when the system enter suspend, the M4 will
continue to play the data, but for normal ALSA case, the digital
mute should be called at suspend, so the codec will be mute,
which conflict with the requirement of LPA.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With the case that underrun happened, the aplay will trigger
stop and start, if the period index is not reset at stop, the
counter of period will be wrong
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
with this patch,codec driver can support tx and rx in
different master/slave mode, for example, tx in master mode,
rx in slave mode
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With LPA mode, if the period size is small, the timer for query
buffer pointer will be triggered immediately after suspend, the MU
interrupt will resume the system quickly.
This patch is to disable timer when suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 9c5e78cf50855bd73f2b5c3dc8bc48f8a0907b39)
register the codec when needed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 241b6b3275924f3dc63be26d1442b55b80ac53ef)
The Ak4497 support large range rate and DSD format, so increase
the supported scope of cpu dai.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 29155a9161bfb9985918ed9130aebafc2293c734)
For ak4497, the dai fmt should be SND_SOC_DAIFMT_CBS_CFS.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit ecd184c46e2916d2bcdde8db9b2281b89e8b0189)
The difference of rpmsg_ak4497 and ak4497 driver is first one
will send command through rpmsg, second one send command through
i2c.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 337f70c4ea5278db28abe1e6eaefbf2d0082aec5)
On imx8qm mek, the cs42888 is connected with i2c in cm41 domain,
but wm8960 is connected with i2c1, which is not in m4 domain.
So we only need to eable rpmsg for cs42888.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 9d2368aef40e4d107e4deee1a2c7e191c1afe644)
support more codecs, codec is specified by compatible string
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 7c92a75fcf83ec0aa3fe6773e4cb5f5e88a1ff09)
register rpmsg wm8960 and cs42xx8 codec
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit c49f8d20c6fd4479ad45d76290bb5c57d4800d9e)
The difference of rpmsg_cs42xx8 and cs42xx8 driver is previous one
will send command through rpmsg, others are same.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit dda40ff395bb1d86fc75920bb2bc2ea99099ed4b)
The difference of rpmsg_wm8960 and wm8960 driver is previous one
will send command through rpmsg, others are same.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 094521755ae806a572fd841455371b23408c36d1)
The format send to M4 through rpmsg is wrong, that make the
driver treat the data as S32_LE, it looks like data is right
shift 8 bit.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 508550b70e80339d3d49594ffc23946dd80b0c82)
Some platform the rpmsg device only support playback or record. So
Add a property to differentiate them.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit aa8b9304d207e5f00cca8a41772c130dd4c6944b)
In imx8mm, there is no controls for wm8524, so we use the
dummy codec instead.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 43bcd3a8e9f4c1b2af9974f2082a34beacfba4a1)
Update the read and write function for the send_message function
changes
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 4610826f39ee4124588b818e5589c25448aa3dba)
Add ack function, which is to info M4 side how many data
has been writen to buffer.
Add timer, which is to get the position of hw pointer in m4.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 0fd349fbab28d97f8c5501ec635bff053e3b1470)
Add two new message command I2S_TX_POINTER and I2S_RX_POINTER,
which are used to get the hw pointer in m4 side. For in low
power audio mode, m4 won't send notification every period, the
notification only be sent when hw pointer reach end of buffer,
so we need these command to get the position of hw pointer,
user can use it to calculate the timestamp.
Restructure send message and recv message together for i2s_rpmsg,
that every send message has a recv message. so the
i2s_send_message can store the recv message indepedently. one
reason is that the receive message is async withe send message.
The low power audio is disabled in default, user need to enabled
it by add "fsl,enable-lpa" in dts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 753e7b819609ad4791e32069a124d4411c720947)
The microphone only connect to left input, when record stereo channel
data, the right channel is mute. Add 'ADC Data Output Select' mixer
control that user can select the wanted configure. The default setting
is 'Left Data = Left ADC; Right Data = Left ADC'.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Receive message is only used when the type is B. originally
we copy the receive message to revg_msg all the time, when
the message type is C, which will overide the revg_msg, which
cause the get codec data command return wrong value.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This codec is accessed by rpmsg. As the wm8960 is controlled
mainly by M4, so we only add volume in this rpmsg_wm8960 codec.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
rpmsg provide command for A7 side to set the codec value and get
codec value by i2c. In this case, the A7 can control the codec.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
with "echo 1 > /sys/class/graphics/fb0/blank", and there is no
usb connected on board, the system may enter low power mode,
then audio playback will be failed. use pm_qos to prevent A7
core enter low power mode during audio playback and recording.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The pulse audio will set a wrong buffer size which is not the integral
multiple of period size, it will cause the DMA can't work correctly in
M4 side.
The reason is that we always need to add a constraint for
SNDRV_PCM_HW_PARAM_PERIODS, which make it integer.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 54a10a6c2130a69aca4c1923dac3a15137911146)
In suspend and resume, the M4 side will reset hw parameter for tx
and rx, when only tx is working, the parameter of rx is a old value,
which will cause the parameter is not sync with tx and rx.
currently the M4 audio can only work in sync mode, so set both
parameter in same time.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The test case is to playback a bitstream, then repeat ctrl+z and fg,
several times later, the playback is failed to continue.
The reason is if the work is pending in work queue, send second time
of this work, the second work is dropped by work queue. so use one
work for one cmd is not fit for audio case. use a work loop for audio
cmd to fix this issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Currently the M4 audio driver don't support mono channel, so remove it.
After mono channel is supported in M4 os, this commit should be reverted.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
some cmd is sent by workqueue, others are sent by call send message
function directly, for workqueue may have delay, so there is occasion
that cmd is not sent in order.
Add flush_workqueue before the CLOSE and SUSPEND to make sure previous
cmd is finished in that time.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The M4 audio driver only support 8k/16k/32k/44k/48kHz sample rate.
so remove other rate in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
This typo issue will cause that wrong cmd send to M4 side.
Fixes: 3e13a631aee0 ("MLK-13904-1: ASoC: fsl: add audio cpu dai driver base on rpmsg")
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Add platform driver, each step like set hw param, trigger start
trigger stop, and so on, will call the rpmsg api.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
[Aisheng: clean for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add the cpu dai driver, as the rpmsg_send api can't be used in
atomic context, so using the workqueue instead of calling
rpmsg_send() directly.
The detail communication stack is defined in header file.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: split out imx-pcm.h changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
With the case below, there is issue that after recording with
8 channels, the recording of 1 channel will fail.
arecord -Dhw:2,0 -r 32000 -f S16_LE -c 8 -d 5 -t raw /tmp/test1.pcm
arecord -Dhw:2,0 -r 32000 -f S16_LE -c 1 -d 5 -t raw /tmp/test2.pcm
arecord: pcm_read:2143: read error: Input/output error
The reason is that we need to reset channel output data Flag before
we start the recording
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 45ea3acd0c)
Merge the changes from imx_4.19.y
The top commit is:
b5472e3f3d ("MLK-21775-4: ASoC: fsl_micfil: synchronize HWVAD enable/disable")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
As per commit 4cb1ea925e ("ASoC: fsl: dma: replace platform to
component"), replace platform to component.
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
In order to support 44kHz and 48kHz sample rate together, we need to
reconfigure the parent clock of mclk.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
There is error log:
[ 31.988272] hdmi-audio-codec hdmi-audio-codec.1: Not able to map channels to speakers (-22)
[ 31.996659] hdmi-audio-codec hdmi-audio-codec.1: ASoC: can't set i2s-hifi hw params: -22
which is caused by the channel map read from device don't match
with current channel number.
Orignal method is just return error, but this channel number is
supported by device, so we think should not return error directly,
the playback can ongoing with UNKNOWN channel map.
This issue happen on some TV set (SUMSUNG UA40KUF30EJXXZ).
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The codec dai name is changed in 4.14，so the machine driver need to
be updated
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The codec dai name is changed in 4.14，so the machine driver need to
be updated
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The most difference with TX is that RX don't need to get edid
information.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The FB_MX8_HDMI is removed, the dependency is changed
to DRM_IMX_HDP.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
switch to generic hdmi codec, which provide the api for get
the edid information.
Add snd controls which is the interface for user to query
the HDMI capibility. ( channels, rates, formats)
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Constraint rate depends on the clock rata of cpu dai, which is
defined in dts, so we add constraint-rate property in dts, then
driver can get it.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Since commit 3f5780eb45 ("MLK-16538-2: hdmi api: Relocate hdmi api
soure code") change the api. And hdmi video driver provide a new api
for hdmi audio. Machine driver need to be updated accrodingly
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
-Relocate hdmi api source code from drivers/video/fbdev/mxc/cdn_hdp
to drivers/mxc/hdp.
-Add displayport and hdcp api function.
-Move t28hpc_hdmitx function from api source code folder
to hdmi fb driver folder.
-Update imx8 hdmi fb driver according api source code change.
-Sync api source code with CDN_API_1_0_33 release.
Acked-by: Robby Cai <robby.cai@nxp.com>
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
According the HDMI spec, the N value depends on the TMDS
rate, and sample rate. As we set the vic mode in dts file,
use the vic_table to get the TMDS rate, then choose the
proper N value.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
The machine driver will call the API which is provided by
the cadence to configure the audio features.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: clean for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The calculation "runtime->status->hw_ptr * (runtime->frame_bits / 8)" may
exceed the integer scope, then appl_bytes is no correct.
This patch is to fix this issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In the frame_to_bytes(), when hw_ptr*frame_bits exceed the maxmum of unsigned
long, the return value is saturated, so the appl_bytes is wrong.
This patch is to correct the usage of frame_to_bytes().
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 9e66132d9c96305b65aa5fa3ba8a35271a04ded9)
cherry-pick below patch from v3.14.y:
ENGR00330403-2: ASoC: fsl_hdmi: port hdmi audio driver from imx_3.10.y
Port HDMI audio driver (CPU driver, machine driver, platform driver) from
imx_3.10.y.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
During 4.14 rebase converted from snd_pcm_ops.copy to copy_user because
copy was removed by upstream
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
[ Aisheng: fix conflicts for a clean base and merge MLK-12244
file onwership change ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Remove tasklet for it may cause the xrun interrupt not be
handled immediately, that will be endless interrupt.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
When stopping audio, ASoC will first stop DMA then CPU DAI.
Sometimes there is a delay between DMA stop and CPU DAI stop, which
triggers an underrun error. Now, because of the delay introduced
by dev_err another underrun error will occur causing a vicious circle
making impossible to stop CPU DAI.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With this patch, esai driver can support tx and rx in
different master/slave mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: split codec cs42xx8 changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
SAI & ESAI interfaces may share the same interrupt with EDMA,
so that we need a flag to trigger proper shared interrupt
handling. For compatibility the same DT flag, "shared-interrupt",
is introduced as the one used in drivers/dma/fsl-edma-v3.c.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split SAI changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Modified parameter msg in dsp, make sure still can transfer right msg
between DSP and user, modified parameter msg in kernel.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Because we are re-initializing the proxy at close it might
happen that work is still pending which causes the following crash:
[ 94.699835] Unable to handle kernel NULL pointer dereference at virtual address 00000008
[ 94.707923] Mem abort info:
[ 94.710722] Exception class = DABT (current EL), IL = 32 bits
[ 94.716637] SET = 0, FnV = 0
[ 94.719686] EA = 0, S1PTW = 0
[ 94.722822] Data abort info:
[ 94.725698] ISV = 0, ISS = 0x00000005
[ 94.729530] CM = 0, WnR = 0
[ 94.732504] user pgtable: 4k pages, 48-bit VAs, pgd = ffff8008d9ba3000
[ 94.739035] [0000000000000008] *pgd=0000000938419003, *pud=0000000000000000
[ 94.746015] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[ 94.751589] Modules linked in:
[ 94.754652] CPU: 0 PID: 2068 Comm: kworker/0:2 Not tainted 4.14.98-dirty #75
[ 94.761700] Hardware name: Freescale i.MX8QM MEK (DT)
[ 94.766768] task: ffff8008f23ae200 task.stack: ffff000014378000
[ 94.772705] PC is at process_one_work+0x34/0x414
[ 94.777325] LR is at process_one_work+0x1e0/0x414
In order to fix this, we make sure that no work is pending before starting
the re-initialization.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 2c00c24be5)
In order to support in parallel FSL DSP and SOF Linux drivers
we will need to use different compatible strings for DSP nodes.
Use fsl,imx8qxp-dsp-v1 for FSL DSP driver. Note that our goal is
to only support SOF Linux driver, so FSL DSP driver will be deprecated.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
API change due to:
adb76b5b9c ("ASoC: soc-core: remove legacy style dai_link")
../sound/soc/fsl/imx-dsp.c: In function ‘imx_dsp_audio_probe’:
../sound/soc/fsl/imx-dsp.c:123:14: error: ‘struct snd_soc_dai_link’ has no member named ‘codec_dai_name’
data->dai[0].codec_dai_name = "snd-soc-dummy-dai";
^
../sound/soc/fsl/imx-dsp.c:124:14: error: ‘struct snd_soc_dai_link’ has no member named ‘codec_name’
data->dai[0].codec_name = "snd-soc-dummy";
^
../sound/soc/fsl/imx-dsp.c:125:14: error: ‘struct snd_soc_dai_link’ has no member named ‘cpu_dai_name’
data->dai[0].cpu_dai_name = dev_name(&cpu_pdev->dev);
^
../sound/soc/fsl/imx-dsp.c:126:14: error: ‘struct snd_soc_dai_link’ has no member named ‘cpu_of_node’
data->dai[0].cpu_of_node = cpu_np;
^
../sound/soc/fsl/imx-dsp.c:127:14: error: ‘struct snd_soc_dai_link’ has no member named ‘platform_of_node’
data->dai[0].platform_of_node = platform_np;
^
../sound/soc/fsl/imx-dsp.c:140:14: error: ‘struct snd_soc_dai_link’ has no member named ‘codec_dai_name’
data->dai[1].codec_dai_name = "cs42888";
^
../sound/soc/fsl/imx-dsp.c:141:14: error: ‘struct snd_soc_dai_link’ has no member named ‘codec_of_node’
data->dai[1].codec_of_node = codec_np;
^
../sound/soc/fsl/imx-dsp.c:142:14: error: ‘struct snd_soc_dai_link’ has no member named ‘cpu_dai_name’
data->dai[1].cpu_dai_name = "snd-soc-dummy-dai";
^
../sound/soc/fsl/imx-dsp.c:143:14: error: ‘struct snd_soc_dai_link’ has no member named ‘cpu_name’
data->dai[1].cpu_name = "snd-soc-dummy";
^
../sound/soc/fsl/imx-dsp.c:144:14: error: ‘struct snd_soc_dai_link’ has no member named ‘platform_name’
data->dai[1].platform_name = "snd-soc-dummy";
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
With non fsl-imx8qxp-mek-dsp.dts, the clock is not assigned
to dsp node, which cause error message when kernel boot up.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Remove the clock operation in cpu dai, all clock will be
moved to platform driver.
The reason is that the suspend and resume of dsp is handled in
platform driver, if the clock is disabled before the suspend,
the dsp framework can't access the registers of device in suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Revert "MLK-18497-13: ASoC: fsl: dsp: Skip SDRAM section update if
fw is already loaded"
This reverts commit a0cffd9a92.
This is just to avoid reconfigure the edma isr handler in dsp
framework, which should be handled by dsp framework.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
We set system address offset select to 0 on QM because of the following reasons:
* SC_C_OFS_PERIPH, it is not available for QM
* SC_C_OFS_AUDIO, it is not used
* SC_C_OFS_IRQ, needs to get outside of the VPU.
A simplified version of the code is:
if (dsp_priv->dsp_board_type == DSP_IMX8QXP_TYPE) {
sc_misc_set_control(ipcHndl, SC_R_DSP, SC_C_OFS_SEL, 1);
sc_misc_set_control(ipcHndl, SC_R_DSP, SC_C_OFS_PERIPH, 0x5A);
sc_misc_set_control(ipcHndl, SC_R_DSP, SC_C_OFS_IRQ, 0x51);
sc_misc_set_control(ipcHndl, SC_R_DSP, SC_C_OFS_AUDIO, 0x80);
}
} else {
sc_misc_set_control(ipcHndl, SC_R_DSP, SC_C_OFS_SEL, 0);
}
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
On QM the DSP is inside the VPU subsystem while in QXP
it is inside the Audio DMA subsystem. For this reason
there are "subtle" differences.
Introduce new compatible string for QM to help us correctly
configure the DSP depending on the board they run.
dsp_mem_msg structure is shared with the DSP, so by introducing
new member dsp_board_type we can let DSP know on which target it runs.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
We enable the ASRC clocks from CPU side. We only need
the following clocks: "mem", "ipg" and "asrc0..3".
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
strtab is always non-null so remove unnecessary check.
This is a follow up of patch
167a6d79f ("ASoC: fsl: Skip checking for string section type")
and finally fixes CID3901026
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
e_shstrndx already contains the section header index, so
shdr->sh_type will always be SHT_STRTAB.
Remove this redundant check and make Coverity happy.
Fixes: CID3901026
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
xf_cmd_send_recv returns with lock taken if waiting was
interrupted by a signal.
This fixes Coverity issues: CID5233120 / CID5233060
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Return value is not used so better use atomic_dec.
This also silences coverity warning CID3344689.
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
xf_cmd_recv will return with lock taken in two cases:
* msg was received
* waiting for msg was interrupted by a signal
Make sure we unlock proxy->lock in both cases.
This fixes Coverity issue: CID3335482.
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
We must find a way to no longer touch resources after they are
cleand up.
Now, after a stress test we get the following crash:
[ 2156.863772] fsl-dsp 596e8000.dsp: xf_pool_alloc failed
[ 2156.869337] Unable to handle kernel NULL pointer dereference at
virtual address 00000060
[ 2157.148594] [<ffff000008d8839c>] _raw_spin_lock+0x14/0x48
[ 2157.153995] [<ffff000008b3e0b8>] xf_cmd_send_recv_complete+0x40/0xf0
[ 2157.160354] [<ffff000008b3e470>] xf_close+0x40/0x88
[ 2157.165239] [<ffff000008b3f7a4>] xaf_comp_delete+0x5c/0x70
[ 2157.170730] [<ffff000008b40530>] dsp_platform_compr_free+0xa0/0xe8
[ 2157.176917] [<ffff000008b287fc>] soc_compr_free_fe+0x144/0x1a0
[ 2157.182754] [<ffff000008b11b24>] snd_compr_free+0x64/0x98
This happens because:
1) dsp_platform_process work handler waits in a loop for
messages to arrive.
2) when cplay process finishes it cleans up most of the
resources.
3) when another cplay process starts it reinitializes the
resources including queues for example.
4) a message will be generated and kernel will crash because
dsp_platform_process uses the older queues.
A solution for this is to make sure dsp_platform_process work loop
is stopped at cleanup time.
We use is_active state and signal dsp_platform_process handler to
finish because we are on the cleanup path.
While at it replace cancel_work with cancel_work sync to be sure
that work handler ends before going on with the rest of the cleanup.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Because we don't correctly free resources when an error occurs
on component creation path we can end up with partially initialized
components.
Freeing such partially initialized components most of the time leads
to kernel crashing in pain.
Avoid this by making sure we either:
* return a fully initialized component, comp->active = true
* don't "create" the component at all, comp->active = false
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
In case of error no cleanup was done leaving thus reasources
in an undefined state.
This can cause crashes like this:
[ 34.259281] fsl-dsp 596e8000.dsp: load codec wrap lib error
[ 34.266333] fsl-dsp 596e8000.dsp: create component failed, type = 1,
err = -2
[ 34.273493] err pool alloc ret = -2
[ 34.298363] Unable to handle kernel NULL pointer dereference at
virtual address 00000000
... which happens when lib_dsp_codec_wrap.so is not present.
While at it, we also realign some lines of code in order to avoid
going over the 80 characters limit that Linux kernel coding style
preaches on.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Old implementation uses /usr/lib/imx-mm/audio-codec
to look for codec libraries.
Also this is the patch where Yocto rootfs stores the codec
libraries. So until we align Yocto with the kernel lets
change the driver to use the old path.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
If the DSP firmware binary is already loaded it is wrong to update
SDRAM located sections because we will overwrite and data stored there.
This makes suspend/resume work.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
DSP driver now supports two interfaces. Old ioctl chardev based
interface and ALSA compress inteface.
Because some part of the open/close code is common introduce
two new functions which encapsulate the common functionality.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This is based on RF-2016.4-linux package received from Cadence
and introduce the API for loading shared libraries into memory.
Based on this we create xf_load_lib/xf_load_unlib functions
which are used to tell DSP framework that codec libraries
are mapped in memory and it can start using them.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This will allow DSP driver to create/destroy a client on
DSP audio-framework proxy.
Registering a client on remote DSP proxy means creating
a component.
The implementation is similar with userspace application
proxy implementation.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Memory is allocated to clients from memory pools. A memory pool
allocation is requested to DSP framework via XF_ALLOC command and
freed via XF_FREE.
Memory pool allocation API offers two functions:
* xf_pool_alloc, allocate a number of buffers of given length
* xf_pool_free, free memory area allocated for a pool.
Once a buffer pool is allocated users can handle buffers using the
following API:
* xf_buffer_get(pool), gets a buffer from a pool
* xf_buffer_put(buf), puts back a buffer into its pool
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This commit adds 3 new function helpers for sending
messages to DSP framework and waiting for response.
While at it cleanup spaces around struct client fields.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
xf_cmd_send_recv function returns with a lock taken
in case of success. Fix this, now!
This bug is present since the beginning of time and it didn't
show up because no one used xd_cmd_alloc/xf_cmd_free.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Move client freeing later when no one needs it.
This fixes Coverity Issue 3344686.
Note that this also fixes a potential memory leak, if proxy happens to
be NULL.
Reported-by: Ioan-alexandru Palalau <ioan-alexandru.palalau@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit a0bb3e2d5a)
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit b6fa30e239da2f38cf31508e98a405ef697e233b)
We load DSP firmware from the ARM side at 0x556e8000 but because the
compiler generated memory layout starts at 0x596e8000 we need to do
some fixups.
Thus, each address (in DSP local memory) generated by the compiler
needs to be substracted an offset = 0x596e8000 - 0x556e8000 = 0x4000000.
Because this only happens on QM we will use dts to specify the offset.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 8d4518d2a5d956549e829470af15003d7adff841)
The reserved memory for dsp is defined in dts file, however, the dsp
driver has also defined the address and size of this reserved memory,
which is repeated and inflexible.
So by cancelling the definition in dsp driver and use system API to
get the information of reserved memory from dts dynamically to fix
this problem.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
The driver don't need to explicit enable the power domain, which
can be done by runtime power management, when the power domain tree
defined in device tree.
in this case, the MU initialization can be moved to runtime pm function.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In order to avoid the name problem going forward with
integration with Qcom, Qcom has their own dsp and hifi
is competitor, so the hifi name should not be used in
our code.
So use the name of dsp instead of hifi to fix this
problem.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
The architecture of dsp framework has been changed, so update dsp
driver to support suspend & resume test of new dsp framework.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
When using memcpy() or fread() function in dsp unit test or wrapper code,
an unhandled alignment fault error will occur randomly, this issue
is caused by the setting of mmap(). After using pgprot_writecombine()
function instead of pgprot_noncached() function, this error will not
occur.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
The architecture of dsp framework has been changed, the role of
dsp driver is transferring messages between dsp framework and user space
application, so change dsp driver to support this function.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
In order to avoid license problem of Cadence header files, these
license files has been wrappered into a library and new interface
has been abstracted to replace the interface of Cadence header
files.
So update the mxc_hifi4.h file to provide new interface for
user space to use.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
add reset command declaration into mxc_hifi4.h file,
this command is used to reset hifi4 codec when seeking
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
update the mxc_hifi4.h header file to support multi-codec
decoding or encoding together for hifi4 dsp.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Reviewed-by: Mihai Serban <mihai.serban@nxp.com>
This patch is used to fix Coverity-1793874, Coverity-1793875,
Coverity-1793876, Coverity-1793877 issue.
The icm_base_info_t is not initialized before using, so
use memset() to initialize it to fix these issues.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
When loading the codec libs in driver, if the destination is
not 4-bytes alignment when doing memset_hifi(), the driver
will print a warning message and the driver may crash in some
cases.
So by changing the memset() function and aligning the virtual address
based on the physical address to fix this issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
In order to manage the memory simply, all the memory which is
shared between hifi driver and hifi framework are managed by
hifi framework.
So when the driver wants to get free memory, it can send
"ICM_PI_LIB_MEM_ALLOC" command to hifi framework, then hifi
framework will return the address of available memory to
driver. When the driver wants to release the memory, it can
send "ICM_PI_LIB_MEM_FREE" command to hifi framework, the hifi
framework will mark this memory available.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
In current hifi driver, some resources are shared when multi
codec decodes together. When switching between multi-codec,
the hifi driver and framework need to save and restore the shared
resources,this will waster time and complicate the hifi driver.
So by distributing private resources for each codec to avoid
this problem. When the user space wants to enable a new codec,
it can send "HIFI4_CLIENT_REGISTER" command to hifi driver to apply
an available resource, the driver will send a client id to
user space. When the user space wants to release the resource,
it can send "HIFI4_CLIENT_UNREGISTER" command to hifi driver,
then the driver will mark this resource available.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
For hifi need to enter runtime suspend state in suspend,
then the power of HIFI can be down. In this case content
in internal RAM will be lost, and need to be recovered
in resume.
Move the loading firmware to runtime resume function, and
define ICM_SUSPEND and ICM_RESUME command, with ICM_SUSPEND
the hifi framework will store the data in RAM and with
ICM_RESUME the hifi framework will restore the data to RAM.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
move hifi4 dsp firmware's code and data section to SDRAM space
move hifi4 dsp codec lib's code section to SDRAM space
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
When error occurs in fsl_hifi4_open() function, before this
function exists, "hifi4_priv->hifi4_mutex" should be unlocked.
If not, when the device is opened next time, the kernel will
be hanged.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Enable pm runtime for hifi4, so the firmware may load many times,
The shdr->sh_addr can't be refined in hifi4_load_firmware, otherwise
it should impact the load operation in next time.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
add cases to support resetting the hifi4 codec when receiving
HIFI4_RESET_CODEC command from the user space.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
When abnormal situation occurs and the current process terminates
abnormally, the hifi4 driver can't get the HIFI4_CODEC_CLOSE CMD
from user space to release the multi-codec resource, so the current
resource can't be used again.
Have found that the fsl_hifi4_close() function can be called
implicitly when process terminates abnormally, so add a reference
counter in fsl_hifi4_open() and fsl_hifi4_close() to check this
abnormal situation, when the number is same for opening and closing
hifi4 device, the multi-codec should be reinitialized again and
the hifi4 driver should send ICM_EXT_MSG_ADDR CMD to hifi4 framework
to initialize the multi-codec resources too.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
The previous hifi4 driver and framework code can't support
multi-codec decoding or encoding together, so change the driver
code to support this feature.
Currently, the hifi4 driver and framework can support at most
5 codec working together.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Reviewed-by: Mihai Serban <mihai.serban@nxp.com>
When loop testing the hifi4 dirver, a random crash issue always
occur when doing memcpy() in decode function.
Have found that memcpy() is not suited to transfer data between
kernel space and user space, so use copy_from_user() and copy_
to_user() function to replace memcpy() to fix this issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Move the load firmware operation from probe function to open,
Then firmware can be loaded from rootfs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
As the fsl_hifi4.c uses the function from uboot/cmd/elf.c,
so need to add the copyright of elf.c, and change licence to
Dual BSD/GPL.
And mxc_hifi4.h is used by user space, so change license to BSD.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
In fsl_hifi4_probe(), the length for dma_alloc_coherent() is
MSG_BUF_SIZE + INPUT_BUF_SIZE + OUTPUT_BUF_SIZE +
FIRMWARE_DATA_BUF_SIZE + SCRATCH_DATA_BUF_SIZE;
However, in fsl_hifi4_remove(), the length for dma_free_coherent()
is MSG_BUF_SIZE + INPUT_BUF_SIZE + OUTPUT_BUF_SIZE +
FIRMWARE_DATA_BUF_SIZE;
By keeping the same length between dma_alloc_coherent() and
dma_free_coherent() to fix this issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
When dsp driver can't find the dsp core lib in loading codec
process, the kernel will be crashed. This issue is caused
by unreasonable way of error handling.
By changing the way of error handling to fix this issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
When building sound/soc/fsl/fsl_hifi4.c file, a warning
occurs:
warning: cast to pointer from integer of different
size [-Wint-to-pointer-cast]
(struct timestamp_info_t *)pext_msg->dtstamp;
By forced conversing int type to long type to fix this
issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
1. add cases to receive error value from hifi4 firmware and
return this error to hifi4 driver's caller.
2. add cases to receive input over indicator variable from
hifi4 dirver's caller and pass this value to hifi4 firmware
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
when transferring struct icm_open_resp_info_t type
between hifi4 framework and hifi4 driver, because this
struct has an element "*dtstamp" which is a pointer,
but for hifi4 firmware, this pointer occupies 4 bytes,
for hifi4 driver, this pointer occupies 8 bytes.
different pointer length will cause issue when reading
this structure's content in hifi4 driver.
By changing the pointer type to unsigned int type to
fix this issue.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
In order to use the hifi4's Cache to cache the firmware's
.rodata, .text, .data, .bss section and hifi4 core lib's
.text section, the firmware's .rodata, .text, .data and
.bss section should be remaped to 0x20700000 - 0x20FFFFFF
address range. This patch is used to parse the firmware
and load each section to corresponding address range.
This patch also set csr_gpr_control to 0x515A2080 to
remap the hifi4's address range in SCFW.
In addtion, add cases to support hifi4 framework's
performance test.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
The function of driver is to communicate with hifi firmware.
The mu13 is dedicated for hifi communication, driver allocate
a share memory for message transfer between driver and firmware.
The calling sequence is that LOAD_CODEC,INIT_CODEC,CODEC_OPEN,
DECODE_ONE_FRAME, CODEC_CLOSE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: clean up for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
sound/soc/fsl/imx-pcm-dma-v2.c: In function ‘imx_pcm_preallocate_dma_buffer’:
sound/soc/fsl/imx-pcm-dma-v2.c:131:6: error: void value not ignored as it ought to be
ret = snd_pcm_lib_preallocate_pages(substream,
^
sound/soc/fsl/imx-pcm-dma-v2.c: In function ‘imx_pcm_free_dma_buffers’:
sound/soc/fsl/imx-pcm-dma-v2.c:144:2: error: void value not ignored as it ought to be
return snd_pcm_lib_preallocate_free(substream);
^
sound/soc/fsl/imx-pcm-dma-v2.c:145:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
In order to support multi-fifo sdma script, the audio driver need to send
the fifo number to dma driver through dma_slave_config, and the cpu_dai
driver should config fifo_num for the audio platform driver, then platform
driver can config fifo_num to dma.
So add new variable fifo_num for struct snd_dmaengine_dai_dma_data.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Robin Gong<yibin.gong@nxp.com>
In some platform, the low power audio playback should be
supported, which need the audio buffer allocated from
OCRAM/IRAM. So move the buffer allocation to .open
function at that time the dma chan is allocated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 85c59acfc5c8d17aa0f369dbe30e4a5fb128c25f)
The filter_data should be used for dma_filter_fn function,
but we used the filter_data wrongly for dma channel name.
This patch is to fix the issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviwed-by: Daniel Baluta <daniel.baluta@nxp.com>
[ Aisheng: split out DAI sai&esai changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
query the caps of dma, then update the hw parameters according
the caps. for EDMA can't support 24bit sample, but we didn't
add any constraint, that cause issues.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Same as commit c55075170214 ("MLK-14582: ASoC: imx-pcm-rpmsg: fix
audio noise issue with pulseaudio"), need to add a constraint for
SNDRV_PCM_HW_PARAM_PERIODS, which make the period number integer.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Fix build error when SOC_IMX_PCM_DMA is not enabled
error: expected identifier or ‘(’ before ‘{’ token})
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
which don't request the dma channel in the probe, but request
dma channel when needed. for the dma channel of cpu dai in BE
can be reused by the FE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: spli SAI DAI changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add the cpu dai driver, as the rpmsg_send api can't be used in
atomic context, so using the workqueue instead of calling
rpmsg_send() directly.
The detail communication stack is defined in header file.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: split out rpmsg changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
cherry-pick below patch from imx_3.14.y
ENGR00274585-9 ASoC: change error message to debug message
This error message is not actual error, which is a warning. When using
FE/BE, if there is widget which is used by playback and capture route, then
this message will be printed.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit ad60b0e03d058b57f2fd9538e1158da8eefcea1f)
Enable Daisy Chain if in TDM mode and the number of played
channels is bigger than the maximum supported number of channels.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 5ae97f159bfd9c4a37e7e60cd20aa3437041b251)
(Vipul: apply manually whilre rebase on v4.19)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Save error so that the following error checking now make sense.
This fixes Coverity issue: CID2828734
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Vipul: apply manuallly while rebase on v4.19
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The constraint is not needed for back end bistream for
the sample rate is fixed by dts and the constraint
is propagate to front end bistream for they share same
snd_soc_pcm_runtime.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
cs42xx8 will call regcache_sync to refresh its register cache. However,
it will send a long msg which length is greater than the max buffer size
of virtual i2c driver. It will cause the regcache_sync operation failed.
So, use the single read/write to send i2c msg in regcache functions.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit 0153e60c26a0fdcf463fb16b090511da7e52df0c)
Due to below patch:
999f7f5af8 ("ASoC: remove Codec related code")
codec related structures have been removed.
Need update legacy drivers accordingly.
CC sound/soc/codecs/hdmi-codec.o
CC sound/soc/codecs/si476x.o
../sound/soc/codecs/fsl_mqs.c: In function 'fsl_mqs_hw_params':
../sound/soc/codecs/fsl_mqs.c:65:35: error: 'struct snd_soc_dai' has no member named 'codec'
struct snd_soc_codec *codec = dai->codec;
^
../sound/soc/codecs/fsl_mqs.c:66:9: error: implicit declaration of function 'snd_soc_codec_get_drvdata' [-Werror=implicit-function-declaration]
struct fsl_mqs *mqs_priv = snd_soc_codec_get_drvdata(codec);
^
../sound/soc/codecs/fsl_mqs.c:66:29: warning: initialization makes pointer from integer without a cast
struct fsl_mqs *mqs_priv = snd_soc_codec_get_drvdata(codec);
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
with this patch, codec driver can support tx and rx in
different master/slave mode, for example, tx in master mode,
rx in slave mode
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: fix big conflicts for next-20190730 upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Initialize gpr_np in order to avoid potential unitialized
pointer read in the section following the "out:" label.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Base on latest power management design in MLK-17074, every driver
need to enter runtime suspend state in suspend, so the driver should
call the pm_runtime_force_suspend in suspend. with this implementation
the suspend function almost same as runtime suspend function. so remove
the suspend function, just use pm_runtime_force_suspend instead.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Base on latest power management design in MLK-17074, every driver
need to enter runtime suspend state in suspend, so the driver should
call the pm_runtime_force_suspend in suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The CLOCKING2 is a volatile register, but some bits should
be restored when resume, for example SYSCLK_SRC. otherwise
the output clock is wrong
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8 when systerm enter suspend state, the power of subsystem will be
off, The clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Save the values of registers at suspend and restore
it at resume.
We don't need to implement runtime PM support because
MQS is already enabled in startup() and disabled in
shutdown().
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
According RM, the FLL_LAMBDA must be set to non-zero value in
integer and Franctional modes.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Mihai Serban <mihai.serban@nxp.com>
IOMUXC_GPR2 register is not used for imx8, there is a new register
designed for this usage in imx8, so it also need the ipg clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
There is error log "wm8962 3-001a: Unsupported BCLK ratio 6"
When the bitstream's format is S20_3LE.
The reason is that the pll output is samplerate*256, which
can't divide to clock samplerate*20*2. So in this patch change
the pll output to samplerate*384, and use the physical_width
for S20_3LE to calculate the bclk.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: split card changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Using a higher bitclk then expected doesn't always work.
Here is an example:
aplay -Dhw:0,0 -d 5 -r 48000 -f S24_LE -c 2 audio48k24b2c.wav
In this case, the required bitclk is 48000 * 24 * 2 = 2304000
but the closest bitclk that can be derived is 3072000.
Now, for format S24_LE, SAI will use slot_width = 24, but since
the clock is faster than expected, it will start to send bytes
from the next channel so the sound will be corrupted.
Thus, remove bitclk relaxation condition which was added mostly
for supporting S20_3LE format which was removed from SAI in
commit 739e6d654b5c0a ("MLK-14870: ASoC: fsl_sai: Remove support
for S20_3LE").
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
There is occasion that wm8960 reset failed in the beginning,
Especially after board reboot. The issue is found in the
imx7d-sdb board Rev.C. After retry, the reset operation is
successful.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The input MCLK is 12.288MHz, The desired output sysclk is 11.2896MHz
the sample rate is 44100Hz, with the pllprescale=2, postscale=sysclkdiv=1,
some chip may have wrong bclk and lrclk output in master mode. then there
will be no sound.
With the pllprescale=1, postscale=2, the output clock is correct. so use
this configuration to workaround this issue.
Tested 8k/11k/16k/22k/32k/44k/48kHz case.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
After the suspend/resume, hw_params may be called in bias_level is not
BIAS_ON, then the PLL is not disable/enabled, if the sample rate is
changed, the output clock is not correct.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
fix mqs_priv->name overrun issue. Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit ef1c59f93981b15412a0207d5517a26901bb2ecd)
Attempt to read volatile register when cache_only is set will return
EBUSY. After playback/record, wm8962_runtime_suspend function will set
cache_only flag, so the volitale register ALC2 can't be read from cache.
Separate ALC Coefficients to four reigsters, the volatile register ALC2
will be read from hardware instead of cache.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 5ec8878be12530517b4c8ae307441a0ac16071a3)
The hw parameter is set failed for si476x if si476x is not powerup,
the codec use the default value of this module. So add startup/shutdown
to powerup/powerdown FM, then we can set parameter successfully.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 796665760605e020e6835f13db6ce49e0a0e03f5)
Delete PWR widget, enable it in probe to fix pop noise
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 4fdb40165706bba3de6aa47e6328136d1eb597fc)
It is too early to put clk get rate in probe, because the rate for
the clock may not be ready.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Implement codec driver for mqs. mqs is a very simple IP. which support:
Word length: 16bit.
DAI format: Left-Justified, slave mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 9da6bdd2072b850e9bb910512123eff7d80a0e2f)
Move the operation for sii902x module to mxsfb_sii902x_audio.c
platform driver. change codec from dummy to hdmi-codec
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
API change due to:
adb76b5b9c ("ASoC: soc-core: remove legacy style dai_link")
../sound/soc/fsl/imx-wm8960.c:538:3: warning: statement with no effect [-Wunused-value]
imx_wm8960_dai[0].codec_name = "rpmsg-audio-codec-wm8960";
^
../sound/soc/fsl/imx-wm8960.c:539:20: error: ‘struct snd_soc_dai_link’ has no member named ‘codec_dai_name’
imx_wm8960_dai[0].codec_dai_name = "rpmsg-wm8960-hifi";
^
../sound/soc/fsl/imx-wm8960.c:539:3: warning: statement with no effect [-Wunused-value]
imx_wm8960_dai[0].codec_dai_name = "rpmsg-wm8960-hifi";
^
../sound/soc/fsl/imx-wm8960.c:547:20: error: ‘struct snd_soc_dai_link’ has no member named ‘codec_of_node’
imx_wm8960_dai[0].codec_of_node = codec_np;
^
../sound/soc/fsl/imx-wm8960.c:547:3: warning: statement with no effect [-Wunused-value]
imx_wm8960_dai[0].codec_of_node = codec_np;
^
../sound/soc/fsl/imx-wm8960.c:549:19: error: ‘struct snd_soc_dai_link’ has no member named ‘cpu_dai_name’
imx_wm8960_dai[0].cpu_dai_name = dev_name(&cpu_pdev->dev);
^
../sound/soc/fsl/imx-wm8960.c:549:2: warning: statement with no effect [-Wunused-value]
imx_wm8960_dai[0].cpu_dai_name = dev_name(&cpu_pdev->dev);
^
../sound/soc/fsl/imx-wm8960.c:550:19: error: ‘struct snd_soc_dai_link’ has no member named ‘platform_of_node’
imx_wm8960_dai[0].platform_of_node = cpu_np;
^
../sound/soc/fsl/imx-wm8960.c:550:2: warning: statement with no effect [-Wunused-value]
imx_wm8960_dai[0].platform_of_node = cpu_np;
^
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
API change due to:
adb76b5b9c ("ASoC: soc-core: remove legacy style dai_link")
Caused below error:
../sound/soc/fsl/imx-cs42888.c:272:3: error: unknown field ‘codec_dai_name’ specified in initializer
.codec_dai_name = "cs42888",
^
../sound/soc/fsl/imx-cs42888.c:272:3: warning: initialization from incompatible pointer type
../sound/soc/fsl/imx-cs42888.c:272:3: warning: (near initialization for ‘imx_cs42888_dai[0].cpus’)
../sound/soc/fsl/imx-cs42888.c:279:3: error: unknown field ‘codec_name’ specified in initializer
.codec_name = "snd-soc-dummy",
^
../sound/soc/fsl/imx-cs42888.c:279:3: warning: initialization from incompatible pointer type
../sound/soc/fsl/imx-cs42888.c:279:3: warning: (near initialization for ‘imx_cs42888_dai[1].cpus’)
../sound/soc/fsl/imx-cs42888.c:280:3: error: unknown field ‘codec_dai_name’ specified in initializer
.codec_dai_name = "snd-soc-dummy-dai",
^
../sound/soc/fsl/imx-cs42888.c:280:3: warning: initialization makes integer from pointer without a cast
../sound/soc/fsl/imx-cs42888.c:280:3: warning: (near initialization for ‘imx_cs42888_dai[1].num_cpus’)
../sound/soc/fsl/imx-cs42888.c:280:3: error: initializer element is not computable at load time
../sound/soc/fsl/imx-cs42888.c:280:3: error: (near initialization for ‘imx_cs42888_dai[1].num_cpus’)
../sound/soc/fsl/imx-cs42888.c:290:3: error: unknown field ‘codec_dai_name’ specified in initializer
.codec_dai_name = "cs42888",
^
../sound/soc/fsl/imx-cs42888.c:290:3: warning: initialization from incompatible pointer type
../sound/soc/fsl/imx-cs42888.c:290:3: warning: (near initialization for ‘imx_cs42888_dai[2].cpus’)
../sound/soc/fsl/imx-cs42888.c:291:3: error: unknown field ‘platform_name’ specified in initializer
.platform_name = "snd-soc-dummy",
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
./sound/soc/fsl/imx-wm8962.c: In function 'hpjack_status_check':
../sound/soc/fsl/imx-wm8962.c:116:3: error: implicit declaration of function 'snd_soc_codec_get_dapm' [-Werror=implicit-function-declaration]
snd_soc_dapm_disable_pin(snd_soc_codec_get_dapm(priv->codec), "Ext Spk");
^
../sound/soc/fsl/imx-wm8962.c:116:3: warning: passing argument 1 of 'snd_soc_dapm_disable_pin' makes pointer from integer without a cast
In file included from ../include/sound/soc.h:413:0,
from ../sound/soc/fsl/imx-wm8962.c:24:
../include/sound/soc-dapm.h:449:5: note: expected 'struct snd_soc_dapm_context *' but argument is of type 'int'
int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm,
^
../sound/soc/fsl/imx-wm8962.c:120:3: warning: passing argument 1 of 'snd_soc_dapm_enable_pin' makes pointer from integer without a cast
snd_soc_dapm_enable_pin(snd_soc_codec_get_dapm(priv->codec), "Ext Spk");
^
In file included from ../include/sound/soc.h:413:0,
from ../sound/soc/fsl/imx-wm8962.c:24:
../include/sound/soc-dapm.h:445:5: note: expected 'struct snd_soc_dapm_context *' but argument is of type 'int'
int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm,
^
../sound/soc/fsl/imx-wm8962.c: In function 'micjack_status_check':
../sound/soc/fsl/imx-wm8962.c:147:3: error: implicit declaration of function 'snd_soc_update_bits' [-Werror=implicit-function-declaration]
snd_soc_update_bits(priv->codec, WM8962_THREED1,
^
../sound/soc/fsl/imx-wm8962.c:161:3: warning: passing argument 1 of 'snd_soc_dapm_disable_pin' makes pointer from integer without a cast
snd_soc_dapm_disable_pin(snd_soc_codec_get_dapm(priv->codec), "DMIC");
^
In file included from ../include/sound/soc.h:413:0,
from ../sound/soc/fsl/imx-wm8962.c:24:
../include/sound/soc-dapm.h:449:5: note: expected 'struct snd_soc_dapm_context *' but argument is of type 'int'
int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm,
^
../sound/soc/fsl/imx-wm8962.c:165:3: warning: passing argument 1 of 'snd_soc_dapm_enable_pin' makes pointer from integer without a cast
snd_soc_dapm_enable_pin(snd_soc_codec_get_dapm(priv->codec), "DMIC");
^
In file included from ../include/sound/soc.h:413:0,
from ../sound/soc/fsl/imx-wm8962.c:24:
../include/sound/soc-dapm.h:445:5: note: expected 'struct snd_soc_dapm_context *' but argument is of type 'int'
int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm,
^
../sound/soc/fsl/imx-wm8962.c: In function 'imx_wm8962_gpio_init':
../sound/soc/fsl/imx-wm8962.c:441:41: error: 'struct snd_soc_dai' has no member named 'codec'
struct snd_soc_codec *codec = codec_dai->codec;
^
cc1: some warnings being treated as errors
../scripts/Makefile.build:278: recipe for target 'sound/soc/fsl/imx-wm8962.o' failed
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../sound/soc/fsl/imx-wm8958.c: In function 'hpjack_status_check':
../sound/soc/fsl/imx-wm8958.c:88:3: error: implicit declaration of function 'snd_soc_codec_get_dapm' [-Werror=implicit-function-declaration]
snd_soc_dapm_disable_pin(snd_soc_codec_get_dapm(priv->codec), "Ext Spk");
^
../sound/soc/fsl/imx-wm8958.c:88:3: warning: passing argument 1 of 'snd_soc_dapm_disable_pin' makes pointer from integer without a cast
In file included from ../include/sound/soc.h:413:0,
from ../sound/soc/fsl/imx-wm8958.c:19:
../include/sound/soc-dapm.h:449:5: note: expected 'struct snd_soc_dapm_context *' but argument is of type 'int'
int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm,
^
../sound/soc/fsl/imx-wm8958.c:92:3: warning: passing argument 1 of 'snd_soc_dapm_enable_pin' makes pointer from integer without a cast
snd_soc_dapm_enable_pin(snd_soc_codec_get_dapm(priv->codec), "Ext Spk");
^
In file included from ../include/sound/soc.h:413:0,
from ../sound/soc/fsl/imx-wm8958.c:19:
../include/sound/soc-dapm.h:445:5: note: expected 'struct snd_soc_dapm_context *' but argument is of type 'int'
int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm,
^
../sound/soc/fsl/imx-wm8958.c: In function 'imx_hifi_hw_params':
../sound/soc/fsl/imx-wm8958.c:126:41: error: 'struct snd_soc_dai' has no member named 'codec'
struct snd_soc_codec *codec = codec_dai->codec;
^
../sound/soc/fsl/imx-wm8958.c:210:2: error: implicit declaration of function 'snd_soc_update_bits' [-Werror=implicit-function-declaration]
snd_soc_update_bits(codec, WM8994_GPIO_1, 0x1f, 0x2);
^
../sound/soc/fsl/imx-wm8958.c: In function 'imx_wm8958_gpio_init':
../sound/soc/fsl/imx-wm8958.c:292:41: error: 'struct snd_soc_dai' has no member named 'codec'
struct snd_soc_codec *codec = codec_dai->codec;
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
In TDM mode with Daisy Chain enabled (CPLD mode 0x04) DAC1 and DAC2
AK4458 codecs on audio board are able to play 16 channels, so extend
the TDM mode constraint to 16 channels.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
If the FMT of tx and rx is different, there will be issue. for example
tx is working at TDM mode, but rx want to work at I2S mode, this case
is not supported in current ALSA driver, the best way to support this
is to distinguish substream in set_fmt function.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
When enable DSD for ak4458 with imx8mm platform, in DSD256 mode
the mclk calculated from ak4458_get_mclk_rate is 256fs, but
the codec require the mclk should be 512fs. so just hard code
the clock to be 512fs in DSD mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With rpmsg sound, when the m4 image is not loaded. There is error log
[ 46.275223] imx-wm8960 sound-rpmsg-wm8960: ASoC: CODEC DAI rpmsg-wm8960-hifi not registered
[ 46.284543] imx-wm8960 sound-rpmsg-wm8960: snd_soc_register_card failed (-517)
The issue is caused by that codec is not registered, the sound
card registration will fail
So add check in probe function for codec dai is ready or not.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With rpmsg sound, when the m4 image is not loaded. There is error log
[ 46.257647] imx-cs42888 sound-rpmsg-cs42888: ASoC: CODEC DAI cs42888 not registered
[ 46.265413] imx-cs42888 sound-rpmsg-cs42888: snd_soc_register_card failed (-517)
The issue is that codec is not register, the sound registeration will fail
So add check in probe function for codec dai ready or not.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
We first add the jack kcontrol in commit c2c7959e3a ("MLK-11479-09
pulseaudio5.0 mute Headphone volume when Headphone plugged")
After that there is change in kernel by commit f63e8581e2 ("ASoC: jack:
create kctls according to jack pins info"), the jack kcontrol will be
created with snd_soc_jack_add_pins.
So our change for jack kcontrol in machine driver is not need now, for
driver already call imx_wm8958_gpio_init -> snd_soc_card_jack_new ->
snd_soc_jack_add_pins. otherwise the jack kcontrol will be created twice.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
We first add the jack kcontrol in commit c2c7959e3a ("MLK-11479-09
pulseaudio5.0 mute Headphone volume when Headphone plugged")
After that there is change in kernel by commit f63e8581e2 ("ASoC: jack:
create kctls according to jack pins info"), the jack kcontrol will be
created with snd_soc_jack_add_pins.
So our change for jack kcontrol in machine driver is not need now, for
driver already call imx_wm8962_gpio_init -> snd_soc_card_jack_new ->
snd_soc_jack_add_pins. otherwise the jack kcontrol will be created twice.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
We first add the jack kcontrol in commit c2c7959e3a ("MLK-11479-09
pulseaudio5.0 mute Headphone volume when Headphone plugged")
After that there is change in kernel by commit f63e8581e2 ("ASoC: jack:
create kctls according to jack pins info"), the jack kcontrol will be
created with snd_soc_jack_add_pins.
So our change for jack kcontrol in machine driver is not need now, for
driver already call imx_wm8960_gpio_init -> snd_soc_card_jack_new ->
snd_soc_jack_add_pins. otherwise the jack kcontrol will be created twice.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Fix the build when IMX_WM8960 machine driver is compiled as module:
CONFIG_SND_SOC_IMX_WM8960=m
Signed-off-by: Florent Tomasin <florent.tomasin@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 233f1db5c861034acb29ade544d05604d08ef040)
According to AK5558 MCLK frequence must not exceed 36.864 MHz.
Limit maximum supported rate as function of max MCLK frequency,
sample bits and number of slots.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 236796cad225daa39d5b77d763a1d964dd4de4c9)
The existing implementation calculates mclk rate as function
of audio sample rate multiplied to multiplier taken from Table 5.
However this is not accurate for Manual Setting Mode - tables 3 & 4 from
AK4458 RM defines rate (LRCK/FS) and frame width (MCLK/16fs..1152fs) ranges
as parameters to calculate mclk frequency. Aside of this - adjust
bclk:mclk ratio from machine driver as function of "compatible" id.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 527b8b7032dcb75c14bb2790330ab96743d83b16)
Use a specific compatible string for 850D in order to limit DSD MCLK
frequency for platforms newer than 850D.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
SAI interface now is able to change at runtime the pll parent of the
master clock, so enable both 8k and 11k range of rates for AK codecs.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
ALSA API has a standard way to configure DAI BCLK by calling
"snd_soc_dai_set_bclk_ratio" function. So use it to set BCLK ratio
and calculate SAI BCLK frequency.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split DAI sai changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Using TDM256 mode (our only supported mode) in order to
support 192KHz we would need a MCLK of 192000 * 512 = 98304000.
But maximum frequency supported by the Audio PLL is 4.91 MHz.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
In order for TDM to correctly work we need that MCLK and
BCLK to follow the values in Table 9.
Thus,
* TDM128: BCLK = 128fs, MCLK = 128-1024fs
* TDM256: BCLK = 256fs, MCLK = 256-1024fs
* TDM512: BCLK = 512fs, MCLK = 512-1024fs
We assume only support TDM256 for the moment.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
With the current multipliers SAI isn't able to derive a correct bitclk.
e.g: When playing at 786Khz with current multiplier
MCLK = 22579200, requested freq 22579200 but SAI wants:
MCLK = (DIV + 1) * 2 * freq [SAI TCR2], so an acceptable solution
is to add a 2x factor to mclk.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split codec changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
With the current multipliers SAI isn't able to derive a correct bitclk.
e.g: When recording at 786Khz with current multiplier
MCLK = 24576000, requested freq 24576000 but SAI wants:
MCLK = (DIV + 1) * 2 * freq [SAI TCR2], so an acceptable solution
is to add a 2x factor to mclk.
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
MCLK frequency is determined based on LRCK frequency, according
to the operation mode. Because AK5558 runs in Auto Mode, we use
table 5 from datasheet to set the correct MCLK.
Multiplier must be set twice as value shown in RM because SAI
MCLK must be at least double the BCLK.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Cosmin Samoila <cosmin.samoila@nxp.com>
According to AK4458 RM the MCLK freq need to be set
externaly as function of LRCK frequency. Notice that
multiplier is twice the value shown in RM since SAI
MCLK must be at least double the BCLK.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The current implementation suggest that MAST1 frequency is to be changed,
which is wrong. Use FSL_SAI_CLK_BIT clock id instead of FSL_SAI_CLK_MAST1
in order to make the code more intuitive and to signal proper
clk_id to SAI.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
There is two ak4458 codecs which share some pdn gpio. If assign
the pdn gpio to one codec, will cause the another codec error:
ak4458 1-0012: Unable to sync registers 0x0-0x0. -6
The reason is that if the codec driver is trying to do regcache_sync,
but another codec is resetting the pdn gpio in same time, the
regcache_sync will fail.
So Move the pdn gpio to machine driver, machine driver will
control this gpio for two codecs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin Samoila <cosmin.samoila@nxp.com>
When in TDM mode, change constraints for rate and allow only
rates in [8KHz, 96KHz] due to the limitations of SAI master
clock. If rate is higher than 96KHz, the TX rate cannot be
obtained using only a 49MHz SAI clock.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
In normal mode we need to test SAI capability of supporting
higher rates so adjust constraints list to allow 384KHz
and 768KHz.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Add 384KHz and 768KHz as supported rates and add
different constraints for number of channels when
in tdm mode.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
TDM mode is enabled when "fsl,tdm" property is added in machine
driver dts node. When using TDM mode, SND_SOC_DAIFMT_DSP_B format
is used and the tdm slot_width is set to 32.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
sound/soc/fsl/imx-wm8962.c: In function ‘imx_wm8962_probe’:
sound/soc/fsl/imx-wm8962.c:810:2: warning: ‘cpu_np’ may be used uninitialized in this function [-Wmaybe-uninitialized]
of_node_put(cpu_np);
^~~~~~~~~~~~~~~~~~~
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Support only even number of channels greater than 2 and
rates multiple of 8000.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
for dsd, specify the slot number is 1, SND_SOC_DAIFMT_PDM is
used for DSD, and add constraint for sample rate.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
For 768kHz sample rate, the codec can't support 64fs mclk, only
can support 32fs mclk, so we can't fix the slot_width to 32, which
is for S32_LE, use params_physical_width(params) to instead of
hard code.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
For 768kHz sample rate, the codec can't support 64fs mclk, only
can support 32fs mclk, so we can't fix the slot_width to 32, which
is for S32_LE, use params_physical_width(params) to instead of
hard code.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
For 768kHz sample rate, the codec can't support 64fs mclk, only
can support 32fs mclk, so we can't fix the slot_width to 32, which
is for S32_LE, use params_physical_width(params) to instead of
hard code.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
This glues SAI interface with AK4497 DAC codec on i.MX boards.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: Makefile clean for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add machine driver for i.MX boards that have AK5558 ADC attached to SAI.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: clean for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add machine driver for i.MX boards that have AK4458 DAC attached to SAI.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: clean for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
i.MX Sound SoC Audio support for PDM mics on SAI
Set audio recording hardware constrains, support
Sample rates: 8000, 16000, 32000, 48000, 64000
PDM decimation factor property fixed to 64
Number of channels: 1
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: clean for a new base ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
In imx8 when systerm enter suspend state, the power of subsystem will be
off, the clock enable state will be lost after resume, the startup
function isn't called after resume, so the clock will be enabled after
resume, the clock operation should be moved to pm runtime resume function.
For the mclk is for codec, this clock enablement and disablement will be
move to code driver's runtime resume and runtime suspend
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The esai and cs42888 can use different mclk, which has different
frequency. But machine driver thought they are same frequency, which
may cause issue in some case.
Base on above conclusion, the codec can support 12.288MHz mclk.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The rate returned by clk_get_rate in probe function is not correct,
for the power domain in that time may be closed, kernel get 0 rate
from scfw, so move the clk_get_rate to hw_params, in that time, the
power domain should be enabled
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The rate returned by clk_get_rate in probe function is not correct,
for the power domain in that time may be closed, kernel get 0 rate
from scfw, so move the clk_get_rate to hw_params, in that time, the
power domain should be enabled
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The rate returned by clk_get_rate in probe function is not correct,
for the power domain in that time may be closed, kernel get 0 rate
from scfw, so move the clk_get_rate to hw_params, in that time, the
power domain should be enabled
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
This is similar with commit c79a82aec8 ("ASoC: fsl: imx-wm8960: Refactor
GPR parsing") and it is needed for easier adding support for non-gpr boards.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
A side effect of commit 5555277e69 ("MLK-13574-1: ASoC: imx-wm8960:
remove the gpr dependency") is that a warning was printed for boards
without gpr. This can be confusing.
imx7d boards do not have a gpr setting, so use imx7d-evk-wm8960
compatible string to avoid printing the warning.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The maximum channel supported by sii902 is 2, but machine
driver use dummy codec, and there is no constraint list
from codec, so add constraint directly in machine driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 037051e60f)
Dynamic constraints for supported sampling rates cannot prevent aplay to
play audio files with higher rates. So we remove the constraints and hard
reject the unsupported samples.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Same as commit cfe36e2e7f ("MLK-15043-2: ASoC: imx-cs42888: fix
noise issue with FE-BE case"). need to add same configuration
for imx-wm8960, imx-wm8962, imx-mqs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 7195ad8ff5)
The case is "aplay -Dhw:0,1 -d 5 -r 8000 -f S16_LE -c 9 audio8k16b9c.wav",
which is to playback 9 channel bitstream. But the maximum supported channel
of codec is 8, ALSA didn't return error for this case, but continue to
playback.
The reason is that in FE-BE case, ASLA only get the FE's hw parameter for
constraint list, omit the BE's parameter. This patch is to merge BE's
parameter to FE. in this situation with the 9 channel case, ASLA will
return error "aplay: set_params:1303: Channels count non available"
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit cfe36e2e7f)
There are boards without gpr setting, so it's better not to fail
in such cases and only print a warning.
This is related to commit ce72b6d2668049 ("MLK-13574-1: ASoC: imx-wm8960:
remove the gpr dependency").
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
For samples with more than 2 and odd number of channels the I2S mode
does not work correctly. In I2S mode we are required to activate an even
number of channels (possibly on multiple datalines) and thus configure
the BCLK for even channels. In this case samples with odd (smaller) number
of channels are played faster and the sound is distorted.
To fix this behavior we can enable TDM mode for the special cases of
samples with 3, 5 or 7 channels. But even TDM has some restrictions that
prevent us from having full support for the special cases:
1. TDM is not supported by codec in master mode so 3, 5 and 7 channels
usage is denied.
2. In codec slave mode TDM works only with 8 slots and slot width of 32
bits. For an often used MCLK frequency of 24MHz and the above restrictions
the maximum sample rate is limited to 48KHz = 24576000/(2*8*32).
The 2 denominator is required by ESAI BCLK divisors.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
There is error log "wm8962 3-001a: Unsupported BCLK ratio 6"
When the bitstream's format is S20_3LE.
The reason is that the pll output is samplerate*256, which
can't divide to clock samplerate*20*2. So in this patch change
the pll output to samplerate*384, and use the physical_width
for S20_3LE to calculate the bclk.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: split codec changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
There is hard code for gpr address in machine driver, imx-wm8960
and imx-wm8958, when the sai interface changed to sai1 or sai3,
there will be issue, so remove the hard code, use the property
from the device tree.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Add codec-master property for imx-wm8962. If set this in device
tree, the codec will work as master, if don't set it, the cpu dai
will work as master.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In imx6ull, the esai errata ERR008000 for imx6q/dl is fixed, so remove the
workaround from imx6ull.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: split ESAI DAI changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
After suspend and resume, the wm8960 codec will change the state from
BIAS_OFF to BIAS_ON, in this time, the hw_free is called, the PLL will be
diabled, and next instance is started in rapid sequence, hw_params is called
But PLL is not enabled, because the bias state is not BIAS_ON.
As PLL is disabled in BIAS_ON->BIAS_STANDBY, so don't need to disable pll
in hw_free of machine driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
When load sound card, the pulseaudio will using the sound card to
playback and record. It may be cause a kernel crash when the sound
card is unloaded while the playback/record is active
After setting the sound card owner field, when pulseaudio is running,
the sound card module ref-count will not be 0 and the sound card will
not be unloaded. So you should stop the pulseaudio when you want to
unload the sound card.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
[ Aisheng: hdmi change merged into hdmi branch ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Revert "MLK-11623 ASoC: imx-cs42888: add 32k and 64k sample rate support"
This reverts commit 314a01f405.
In Async mode, record and playback use different samplerate, one is 32k,
another is 48kHz, there will be issue "unsupported sysclk ratio".
example case is
arecord -Dhw:0,1 -f S16_LE -r 32000 -c 2 | aplay -f S16_LE -r 32000 -c 2
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Add headphone/micphone/headset jack support for different board.
There are headphone detect gpio and microphone detect gpio which
can be configured from device tree.
If headphone and microphone using the same gpio for jack detect,
it suppose to be a headset and will register a headphone jack for it.
If headphone and microphone using different gpio for jack detect,
it suppose not to be a headset, and will register headphone jack
and microphone jack respectively.
Is't not appropriate to set the adc data output in machine driver.
It will not be compatibly when we change hardware connection.
wm8960 codec driver has added "ADC Data Output Select" kcontrol,
so that we can set the ADC data output from user space.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 92f65b4bee51fabdfa3a3c191f511c2ec7cb18a1)
Report by coverity (CID 18428). The return value need be checked
for snd_soc_dai_set_sysclk().
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
init codec_np to avoid wild pointer. Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 76665930654867cf38a86ba747a9f8a5bf2665e2)
init asrc_np to avoid wild pointer and check return value of
set_fmt(). Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 4ccc87a93e180e09b6494fd6c6d81b07dc054e9b)
init sii902x_np to avoid wild pointer. Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 780e27683c38f785ea7f7e07e83b00ffd3c22d78)
init codec_np to avoid wild pointer. Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 8e27b90c9adf5033038a40e0b61a7ffe4c971290)
check return value for set_fmt and set_sysclk function, and init
codec_np to avoid wild pointer. Reported by coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 68021ab9ada4a7f3037993a3887453e12271d4ed)
When codec sysclk is 24576000, the sample rate ratio can be 128, 192,
256, 384, 512, 768, 1024. So 32k, 48k, 64k, 96k, 192k can be support.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit b436254cd5)
imx7d-sdb board using one SAI for wm8960 and sii902x hdmi audio, wm8960
using SAI as slave mode and sii902x hdmi audio using SAI as master mode,
so SAI can't be used at the same time.
Forbid palyback(capture) when SAI is being used capture(playback) by other
device.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit bac15c28c3)
Add machine driver for sii902x hdmi audio. Restricting by SAI master clock,
the hdmi audio just support 16bit 24bit sample width and 32k 48k sample rate.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 8dc359b46c)
Enable ASRC p2p for ssi->wm8962, base on the new p2p script,
which support to select dualfifo for source/destination device.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: split ASRC changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
cherry-pick below patch from v3.14.y:
ENGR00307635-5 ASoC: imx-wm8962: Add non-SSI cpu dai support
The current imx-wm8962 machine driver is designed for SSI as CPU DAI only
while as its name we should make the driver more generic to any other CPU
DAI on i.MX serires -- ESAI, SAI for example.
So this patch makes the driver more general so as to support those non-SSI
cases.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit b6fca438dde1b4c0bbdee31729871d601f287dc9)
[ Aisheng: split dts changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
cherry-pick below patch from v3.14.y:
ENGR00312217-1 ASoC: fsl: pop noise with wm8962
The reason of pop noise is that we change the sysclk in hw_free, which is
for another wm8962 issue. So in currently the pop noise can't be resolved
with no confliction. So for Android, because the samplerate is fixed. we can
use other workaround for this issue: change the sysclk in the set_bias().
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 84babc7fa0a56f6620f8b04a86baece620297dda)
cherry-pick below patch from v3.14.y:
ENGR00306857 pulseaudio5.0 mute Headphone volume when Headphone plugged
Pulseaudio will detect the Headphone Jack, then swith to Headphone.
So register new Jack for Headphone, the iface=CARD.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
(cherry picked from commit 6a715373c43f16e48883061049e67919281878d1)
cherry-pick below patch from v3.14.y:
ENGR00277715-3 ASoC: fsl: Add WM8962 jack detecting support
There're two GPIOs connected to the headphone jack and microphone jack,
thus add the states detection.
Reviewed-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
cherry-pick below patch from v3.14.y:
ENGR00277471 ASoC: fsl: Fix set-mute-failed issue after WM8962 capture
We only need to mute WM8962 after playback, so add direction check
before doing mute.
And a mute failure would cause hw_free() abruptly return after it,
which might drop the essential procedure code for FLL controlling.
Thus put mute before FLL controlling code and drop its return check.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit 3133b6cfb31b202805d31d449bfa70383e5e1c75)
cherry-pick below patch from v3.14.y:
ENGR00274386-2 ASoC: imx-wm8962: Set MCLK source clock to 0Hz in hw_free()
When DAPM closed WM8962 after playback, its driver would prompt
'wm8962 0-001a: Unsupported sysclk ratio 500' due to the invalid
divisor calculated by WM8962 codec driver.
To fix it, we can work around by setting its MCLK source to 0Hz,
so the codec driver would never get an invalid divisor any more.
Since hw_params() would re-set the MCLK source, no need to worry
about any side-effect.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit a935f7680ac3958ce72cf7413cac278c0683d4c0)
We followed community way by using set_bias() to set FLL of WM8962.
But this can't meet our requirement: aplay -Dhw: 16khz.wav 24khz.wav.
Thus use hw_params() and hw_free() instead.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
add snd_soc_pm_ops for mqs machine driver to make the trigger
suspend/resume be called in suspend/resume.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 7887d4d9ab461f8d1d67f62c6cbc032e082193c2)
If there is no codec device, the machine driver will not register the
card. then alsa will not return RETRY error. update the error handling
for machine driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 01ffd8e5e828d20214a196e64b981c9fd94c913e)
cherry-pick below patch from imx_3.14.y
ENGR00330403-1: ASoC: imx-cs42888: port cs42888 machine driver from imx_3.10.y
Port the cs42888 machine driver from imx_3.10.y and do update according to
new esai driver and asrc driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 7ed3aac83630a38eb397ed92f815a28e07198748)
If the mclk is 24.576MHz, mqs can't support 96k and 192kHz, because
the we can't get a proper clock divider for mqs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Implement machine driver for mqs, which use the sai as cpu dai.
sai work on master mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit cac9eb41debc6444d753dc936cdf76874260b9e4)
port wm8958 machine driver from imx_3.14.y.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Fix build for DRIVER_ATTR removal during 4.14 rebase
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
port wm8960 machine driver from imx_3.14.y branch
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Fix build for DRIVER_ATTR removal during 4.14 rebase
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
When two stream start to run, the trigger function
may be called by two substream in same time, that
the priv->tdms may be updated wrongly
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
After suspend & resume, there may be noise in asrc output. The reason
is the coeff variable is local, in resume function this variable is
invalid to access, so that cause the prefilter coeff not correctly be
setted.
This patch is to change the coeff variable to be global that we can
get the correct value in resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 56aa181b23)
When record bitstream with ASRC+AK5558, there may be I/O error
for the high sample rate case (352kHz/768kHz).
The reason is that the context is not fully reset after
conversion, the ASRC does not start to work in next conversion.
In order to fully reset the context, we need to enable RUN_STOP,
then clear the RUN_EN bit.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 7b44c3c653)
Wrap the common code to fsl_easrc_config_one_slot function, that
is to make the code more clear.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0a640c4dde)
When run conversion in parrallel, one is down sampling, another
is up sampling, so one enables PF_BYPASS_MODE, another disable
PF_BYPASS_MODE, when the allocated slots in a same context
processor, there is noise in the result of down sampling.
If we alway disable PF_BYPASS_MODE, the issue can't be reproduced.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 3a1a4abc02)
The maximum prefilter memory size is 6144 entry, it is not allowed to
require memory size exceed this size.
When we calculate the available channel in the context processer, we
need to consider if the prefilter memory is not enough for the maxmum
channels, then we need to reduce the channels in this context processor,
move the left channel to another context processor.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 5a15d81a1c)
The audio float point data range is (-1, 1), the asrc would output
all zero for float point input and integer output case, that is to
drop the fractional part of the data directly.
In order to support float to int conversion or int to float conversion
we need to do special operation on the coefficient to enlarge/reduce
the data to the expected range.
For float to int case:
Up sampling:
1. Create a 1 tap filter with center tap (only tap) of 2^31
in 64 bits floating point.
double value = (double)(((uint64_t)1) << 31);
2. Program 1 tap prefilter with center tap above.
Down sampling,
1. If the filter is single stage filter, add "shift" to the exponent of
stage 1 coefficients.
2. If the filter is two stage filter , add "shift" to the exponent of
stage 2 coefficients.
The "shift" is 31, same for int16, int24, int32 case.
For int to float case:
Up sampling:
1. Create a 1 tap filter with center tap (only tap) of 2^-31
in 64 bits floating point.
2. Program 1 tap prefilter with center tap above.
Down sampling,
1. If the filter is single stage filter, subtract "shift" to the
exponent of stage 1 coefficients.
2. If the filter is two stage filter , subtract "shift" to the
exponent of stage 2 coefficients.
The "shift" is 15,23,31, different for int16, int24, int32 case.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 8a18a7a2dd)
Fix build warning with CONFIG_PM_SLEEP=n, the message is
In file included from sound/soc/fsl/fsl_easrc.c:2204:0:
sound/soc/fsl/fsl_easrc_m2m.c:960:13: warning: ‘fsl_easrc_m2m_resume’ defined but not used [-Wunused-function]
static void fsl_easrc_m2m_resume(struct fsl_easrc *easrc)
^~~~~~~~~~~~~~~~~~~~
sound/soc/fsl/fsl_easrc_m2m.c:927:13: warning: ‘fsl_easrc_m2m_suspend’ defined but not used [-Wunused-function]
static void fsl_easrc_m2m_suspend(struct fsl_easrc *easrc)
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 0b6e34f8aa)
fix build warning with CONFIG_PM_SLEEP=n, the warning message is
In file included from sound/soc/fsl/fsl_asrc.c:968:0:
sound/soc/fsl/fsl_asrc_m2m.c:1021:13: warning: ‘fsl_asrc_m2m_resume’ defined but not used [-Wunused-function]
static void fsl_asrc_m2m_resume(struct fsl_asrc *asrc_priv)
^~~~~~~~~~~~~~~~~~~
sound/soc/fsl/fsl_asrc_m2m.c:990:13: warning: ‘fsl_asrc_m2m_suspend’ defined but not used [-Wunused-function]
static void fsl_asrc_m2m_suspend(struct fsl_asrc *asrc_priv)
^~~~~~~~~~~~~~~~~~~~
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit a3ec5433cf)
Fix issue reported by coverity:
a. Resource leak for ctx is not freed when m2m allocation
failed
b. Use of untrusted scalar value
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Some definition of parameter's width is wrong, that cause the
failure of conversion for more than 16 channels.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With multi-instance case, the fsl_easrc_config_slot will be called
in parallel, the fsl_easrc_slot is independent with context, so
we need to lock to protect the access of fsl_easrc_config_slot,
otherwise, the slot configuration will be fail for some instance
that cause "input DMA task timeout".
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The input audio float data range is normalized to (-1, 1), but
the hardware will drop to fractional part if output format
is integer format, so the output is all zero, which does not flow
the normal audio case, that to shift the output to Q15/Q31.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The hardware don't support big endian format. which only
support bit reverse.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
When error happen, user may not call STOP_CONV to stop the context,
then there will be "input DMA task timeout" issue for next m2m task.
In this patch, fsl_easrc_stop_context is called in RELEASE_PAIR to
make sure context is stopped.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Add error handler for format check, if the format is not supported
should return error, otherwise it cause "input DMA task timeout"
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
EASRC M2M function is not able to put upstream due to its self-designed
ioctl protocol. So make a single patch for it and make it merge
into P2P driver as simply as possible.
The patch can only be maintained internally unless some one designs a
new protocol or implement the originally protocol by using some common
approach provided by Linux Kernel.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
EASRC (Enhanced ASRC) is a new IP module found on i.MX8 MN. It is
different from old ASRC module.
The primary features for the EASRC are as follows:
1. 4 Contexts - groups of channels with an independent time base
2. Fully independent and concurrent context control
3. Simultaneous processing of up to 32 audio channels
4. Programmable filter charachteristics for each context
5. 32, 24, 20, and 16-bit fixed point audio sample support
6. 32-bit floating point audio sample support
7. 8kHz to 384kHz sample rate
8. 1/16 to 8x sample rate conversion ratio
9. Software control of fine conversion ratio
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
EASRC (Enhanced ASRC) is a new IP module found on i.MX8 MN. It is
different from old ASRC module.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Support S24_3LE for m2m with SDMA, but add constraint
for EDMA case, for EDMA don't support 3bytes copy.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
In order to support the new ASRC in i.MX815, we update the
user api file mxc_asrc.h.
The reason is that the new ASRC support more sample width, and
support endianness, sign, float format, iec958 format setting,
All these type can be expressed by snd_pcm_format_t type.
So we use the in(out)put_format to instead the in(out)put_word_width.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit b95c32c4d4)
Previously we get dma channel for p2p from Back-End, but the
channel maybe allocated already by Back-End platform driver.
that we switch to imx-pcm-dma-v2.
But if we get dma channel for p2p from Front-End then we don't
need to switch to imx-pcm-dma-v2 driver. this more formal
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
for non ideal ratio mode, the clock rate should divide the sample rate
with no remainder, and the quotient should be less than 1024.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
When 3 asrc pair are working in parallel, there will be
error log randomly
output DMA task timeout
fsl-asrc 2034000.asrc: Pair B: failed to process buffer: -62
The reason is that the initialization is not finished for
some pair, the prefill data is failed to be input in FIFO.
The patch is to increase the retry times to make sure that
initialization is success.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Compare with imx6, the conversion of 8kHz 5channel to 176kHz is ok.
And compare the output we found that about every 48K bytes, there will be
additional data be added, which cause noise.
In this case, there will be two sg_nodes, for the maxmum output size exceed
the ASRC_MAX_BUFFER_SIZE, each size is ASRC_MAX_BUFFER_SIZE, it is 49152.
the value can't be exact divided by channel * word_with * watermark = 40.
So the EDMA can't finish the copy with correct size.
There is limitation of EMDA described in commit 3519b67ac0
("MLK-19151: ASoC: fsl_asrc: fix dma timeout issue for imx8qxp")
EDMA just copy 49120 bytes, there will 32 bytes wrong data.
According to this limitation, this commit is to change the maxburst to 1
for EDMA case, then EDMA can do what we expect correctly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
There is error log after suspend resume with asrc alsa plugin.
"fsl-asrc 2034000.asrc: Pair A: failed to process buffer: -16"
"asrc_pair_convert_s16: Convert ASRC pair 0 failed,
[0x989410][440][0x9895d0][1764]"
Which is caused by the return value is -EBUSY when signal_pending, in this
case we can use the -ERESTARTSYS to instead, that system will recall the
convert function after resume.
Fixes commit e1e9de8e93 ("MLK-10048-2: ASoC: fsl_asrc: change
the return value")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
If the initialization is not finished, then we input data to
the FIFO will fail, which still cause the error
"output dma task timeout"
So we need to ad initial check in the resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
There will be "output DMA task timeout" after suspend and resume.
The reason is there is not enough data in the input FIFO.
In the fsl_asrc_start_pair function we initialize the FIFO with
zero data after pair is enabled, it looks like we add more data
to input FIFO. For example if the input buffer length is 100,
but the actual length is 100 + channel*4. so we need to do same
work in resume for the asrc pair is disabled in suspend, the
input FIFO is cleared.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In the imx8qxp, the DMA is EDMA, which require the buffer size
should be divided by burst size with no remainder, otherwise
the remainder is not transferred by EDMA, so the input buffer
is not consumed by ASRC, then there will be dma output timeout
issue. This behavior is different with SDMA.
This patch is to change the input burst size to be 1 to avoid
the issue, and refine the last_period_size for output buffer.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The dma_len is the size that how many data dma should transmit. As
the asrc use channel as unit, so the dma_len should also in channel unit.
Otherwise the output data is not align in channel, there will be noise.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Fixes commit feb06839682c ("MLK-16839-1: ASoC: fsl_asrc: selec
a proper clock source from the clock list")
When inclk is INCLK_ASRCK1_CLK, the driver will config module
to be non ideal ration mode, But the divider should be less
than 1024 and exact division. otherwise there will be distortion.
If the divider larger than 1024 or it is not exact division, asrc
should switch to ideal ratio mode, which don't care about the
divider.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
The output size of asrc for a dedicate input is uncertain.
For example, if the input size is 1k, the output ratio is
2, so the output size should be 2k. but the actual output
size is not 2k, is less than 2k. if we set the dma size
to be 2k, the dma can't get enough data that can't finish
the transmission, then there will be
"output DMA task timeout"
So we need to set the dma size a proper value but we don't know
how many data less than expected. so we defined the last period
size for assumption of reduced size.
The last period size should not be too large, if it is large
there will be
"input DMA task timeout"
The reason is the output FIFO is full, which will block the
input data comsumption.
In this patch, the last period size is set to the difference
of configured buffer size and the expected output size, plus
a fix size.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
For multi p2p instance an ASRC device cannot be closed successfully
when two threads plays streams simultaneously on same ASRC device.
'pair_streams' variable shall be moved to 'struct fsl_asrc_pair'
for multi p2p instance in order to handle pair release properly.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The error is "aplay: pcm_write:2023: write error: Input/output error"
query the caps of dma, then update the hw parameters according
the caps. for EDMA can't support 24bit sample, but we didn't
add any constraint, that cause issues.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In internal ratio mode, when the clock rate can't be divided with no
remainder, The final convert ratio is not as expected, there is distortion
in output data.
So need to select a proper clock source for this mode, if can't find a good
clock source, then swith to ideal ratio mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
When open 2 instances of m2m, there is kernel dump. The reason is we
use the dev_set_drvdata to set drvdata for each instance, but each
instance share a same device, the result is drvdata will be changed
by other instances, then cause issue. so the dev_set_drvdata can't be
used, need to combine the pair data with file handler.
Fixes: 58ab1eb5b8c5 ("MLK-13945-3: ASoC: fsl_asrc: support two asrc
devices")
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Use automatic selection of processing options and internal measured
ratio for P2P conversions.
The conversion done by ASRC depends on the IPG master clock frequency
that can have any value between 130MHz and 200MHz. The documentation
states that to support 10 channels with 192KHz sampling rate the
master clock frequency must be at least 160MHz.
When the master clock cannot be configured to faster frequencies the
ASRC can still convert the samples but it have to be configured to
automatically adjust the processing options and conversion ratio.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Fix configuration for automatic selection of processing options and
internal measured ratio.
ASRC can automatically select its pre-processing and post-processing
options based on the frequencies it detects. To use this option the
two parameter registers ASR76K and ASR56K must be correctly configured
based on IPG clock frequency and the corresponding ATSx bits from the
ASRCTR register must be set.
When both the input sampling clock and the output sampling clock are
physically available, the rate conversion can work by configuring the
physical clocks. For this use case the ASRCTR:USRx and ASRCTR:IRDx
bits have to be configured as 1 and 0 respectively.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8qm/imx8qxp, the power domain of IP is enabled when
pm_runtime_get_sync() is called, and disabled when pm_runtime
_put_sync() is called. when power domain is disabled, the value
of registers will lost, so we need to use the regcache_sync()
to restore the registers in fsl_asrc_runtime_resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In imx8qm, there is two asrc devices, so using global structure
"miscdevice" will cause error. Each instance should have their
own structure.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The ASRC support 24 bit input width, but for S20_3LE the input width
is 20 bit, asrc will treat it as 24bit, which like a 24bit data shift
4 bit right, the result is the volume is lower than expected.
ASRC can't shift the 20bit data left 4 bit internally, so remove the
S20_3LE in supported list, add S24_3LE in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit e65a014efe)
Power domain need to be enabled when asrc m2m start to work, and
disabled when it stop.
Switch back to use the pm_runtime_get_sync and pm_runtime_put_sync
for which is removed in commit 1a3d82e08fa2 ("ASoC: fsl: refine
the asrc driver for imx8qm").
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
For arm64, the dma_map_sg and dma_unmap_sg need the device parameter,
otherwise, it will return error.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Add warning message for both divider of input clock and output clock
exceed the maximum value. which is useful for debugging.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The test case is one p2p playback + two m2m converter running
simultaneously. There are three root cause for this issue:
1. hw_free() of p2p may be called twice in the end, which cause
release twice of one pair, if another pair request is called between
this two release, there will be issue.
2. In m2m close(), the asrc_priv->pair[i] will be set NULL twice,
which is same issue as 1.
3. when output rate is more than eight multiple of input rate for m2m,
the last_period_size should be larger.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The maximum divider of asrc clock is 1024, but there is no judgement
for this limitaion in driver, which may cause the divider setting not
correct.
When IDEAL_RATIO_RATE 200kHZ, the cost time of conversion from 192kHz
to 96kHz is 24ms every 1024 sample, but these sample's playback time
is 1024/96=11ms, so there will be underrun. So need to enlarge this RATE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
commit 743cead0f8 is not a complete fix.
There is low possibility that this issue still occur.
Last commit add init_completion() in the suspend function, but if the
dma callback function is called after convert error, the complete is
done, the init_completion will not be called, so the complete state is
not correct in the next conversion.
This patch is to move init_completion to the beginning of conversion
to fix the issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In suspend function, the complete will be set to done in callback.
After resuming, the convert will not spend time to wait the complete.
which is a wrong complete.
So in suspend function, the complete need to be reinited for next convert.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
free pair after allocating m2m failed. Reported by coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 237a35db5b48b78250a019f891d9d746c3411d49)
After allocating memory for m2m, we should null check for m2m instead of pair.
In fsl_asrc_close(), null-checking pair suggests that it may be null, but it
has already been dereferenced before the null check. pair will be alloceted
in fsl_asrc_open(), pair is null means that open dev file failed, and
close should not be called in user space. So remove null check for pair.
buf_len should not greater than ASRC_DMA_BUFFER_SIZE, otherwith dma buffer will
be overrun.
Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit b0dc15375b12b6c1bf46b9071b92267b827d8ce0)
check the return value for snd_pcm_hw_constraint_integer().
Reported by Coverity.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 26f8fea617fcebd8835f660534a988c58b9f0517)
Enable ASRC p2p for ssi->wm8962, base on the new p2p script,
which support to select dualfifo for source/destination device.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
[ Aisheng: split imx-wm8962.c changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
For p2p output, the output divider should align with the output sample
rate, if use the Ideal sample rate, there will be a lot of overload, which
will cause underrun.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 5ab043f1a020ae8c3aeb3d91f6894bbd6a6ec147)
cherry-pick below patch from imx_3.14.y
ENGR00307592 ASoC: fsl_asrc: Add delay after enabling ASRC p2p
When using ASRC p2p as a for-end with other back-end modules like ESAI,
it'd be safer to add 1ms delay, less might be futile for extreme cases,
after enabling ASRC so as to keep ASRC output FIFO with enough data to
content the DMA burstsize of back-ends and accordingly prevent underrun
that might happen to them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit c68c1874c07c30a3483eed70fb2abe82e19d1d20)
Merged from 49108fcf7b79ed77d34be33b53a3964b2ac27204
1. Watermark level in sdma use byte as its unit. but asrc driver use
word, there is mismatch between them. Here fix this issue and sdma can
work more efficiency.
2. Enlarge the larst_period_size, when use small size, for some case,
the dma task will timeout, because sdma has no much data for output.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 8a96e09e265294f396bd3af29b429e4b7bdff461)
merge 7e1a620a030d17f93fdd97d076f1cdd042e79337
The reason of crach is that some variables are not protected in
function mxc_asrc_suspend(), when suspend, there is possibility to
access one NULL pointer.
Refine the spin lock usage, add protecting for pair_hold.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit e90c73f8170bc929cff54b0478da0573e4e26c23)
Merge from c086d0151ee3e131b52bef96c5096d1ee603c852
Return value -ERESTARTSYS is not visible for user space according
to include/linux/errno.h. So use -EBUSY replace it.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 69d529646a610d8d1360bd116ceec1341aef4211)
cherry-pick below patch from v3.14.y:
ENGR00330403-4: ASoC: fsl_asrc: Add Memory to Memory support
ASRC M2M function is not able to put upstream due to its self-designed
ioctl protocol. So I just make a single patch for it and make it merge
into P2P driver as simply as possible.
The patch can only be maintained internally unless some one designs a
new protocol or implement the originally protocol by using some common
approach provided by Linux Kernel.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Fixed missing includes in 4.14 rebase
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
There are no u/v planars in the pixel formats
IPU_PIX_FMT_BGRA4444/IPU_PIX_FMT_BGRA5551/IPU_PIX_FMT_AYUV,
so we should explicitly get zero u/v_offset from __ipu_ch_offset_calc()
for those pixel formats. Without this patch, '-EINVAL' will be
returned from __ipu_ch_offset_calc() as the function return value
and input parameter u/v_offset will not be touched, which is not a
good behavior, because the caller is likely to ignore the function
return value and take the u/v_offset as valid value. The MXC IPUv3 fb
driver is a such kind of caller, which may get the u/v_offset
for those pixel formats without checking the function return value,
and hence wrongly pass the u/v_offset to PRE driver(finally causes
malfunction).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch forwards IPUv3 V4l2 output driver from imx_4.19.y kernel.
[ Liu Ying: remove unused get_jiffies(), resolve conflicts related to
vb->ts, some ioctrls(vidioc_cropcap, vidioc_g_crop and
vidioc_s_crop) and mxc_vout_template->device_caps ]
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch forwards IPUv3 common driver from imx_4.19.y kernel.
This includs IPUv3 common, IPUv3 prefetch engine and VDOA support.
[ Liu Ying: Fixed a minor build warning for PRE driver. ]
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
If use dma pool when iram does not exist, the iram_pool will be NULL.
The previous version of lib/genalloc.c will check the pointer status
first. In 5.4, it will not check NULL pointer.
Therefore, add NULL check here.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Upstream rejected ARCH_FSL_IMX8QM so just depend on ARCH_MXC or
COMPILE_TEST.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Because CONFIG_ARCH_MXC_ARM64 is not used since 4.19, add devtype in
imx_mlb_hwdata to distinguish between imx6 and imx8 platform when init
the ipg and hclk clocks.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Due to IP integration difference, there are 2 ahb irqs
for imx6 and only 1 ahb irq for imx8. This patch makes
mlb driver compatible with irq difference.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
mlb 6 pin mode is not supported in current release,
so remove clk for mlb 6 pin mode.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
As a result that the wrong operation is used for the mlb status
in mlb_isr(), some results are independent of their operations.
for example:
rx_cis = (cdt_val[2] & ~MASK) >> SHIFT, where, MASK = 0xf0000000
and SHIFT = 28. So, the result is always 0 regardless of the values
of its operands.
This patch fixes the operation for mlb status in mlb_isr().
(reported by coverity check)
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
After coverity code check, it tips:
unsigned_compare: This less-than-zero comparison of an unsigned value is
never true.
Interrupt variable must be signed type.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
As per commit 6aa7de0591 ("locking/atomics: COCCINELLE/treewide: Convert
trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()"), replace
ACCESS_ONCE with READ_ONCE to fix the compilation errors.
drivers/mxc/mlb/mxc_mlb.c: In function ‘mlb_rx_isr’:
drivers/mxc/mlb/mxc_mlb.c:1664:9: error: implicit declaration of function ‘ACCESS_ONCE’; did you mean ‘READ_ONCE’? [-Werror=implicit-function-declaration]
tail = ACCESS_ONCE(rx_rbuf->tail);
^~~~~~~~~~~
READ_ONCE
CC drivers/of/of_mdio.o
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add mlb support on imx_4.1.y. The files are copied from imx_3.14.y.
Signed-off-by: Gao Pan <b54642@freescale.com>
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 24e36b318a)
Add value adjustment for cwt/bwt timer, otherwise it will fail with
ultimate cwt/bwt value.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
It can't receive when transmitting on EMVSIM IP. ICC will send response
quickly when Terminal transmits last character with guard time. If the
response came to Terminal before the guard time expired, the Terminal
would not receive the respone. So should transmit last character with no
guard time.
This patch intends to fix the communication failure when setting guard
time.
This will cause about 1 ETU delay before transmitting last character
(according to timing measured), but it does not matter.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Should read TS character before updating value of GPCNT1, because TS
character will also cost 12 etus.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Shouldn't clear PEF/FEF flag in irq handler as they are just a flag which
can't trigger interrupt. And they will be check later in irq handler.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Once detected a valid TS, the ICM bit is cleared and the data format bit,
IC bit , is set to appropriate value depending on the data format
detected using the initial character.
When TS is 0x3B (direct convention) in cold reset, and then become 0x3F
(inverse convention) in warm reset, it will not in ICM mode.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Enable CWT for ATR, and switch to RX_DATA_IM to detect receiving data
in fifo.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Card Presence Detect Status Bit SPDP in EMV_SIM_PCSR is
synchronized by two posedge of low_ref_clk which is 32KHz.
So there should be 1.5 low_ref_clk cycles(about 90us) before
reading SPDP Bit.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
The EMVSIM module is designed to facilitate communication to
Smart Cards compatible to the EMV ver4.3 standard and compatible
with ISO/IEC 7816-3 Standard.
This patch adds driver to support EMVSIM module for imx8.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
Kernel space cannot access user space memory directly.
In fact, the issue always exited. Since 4.4, the kernel
handle the action as page abort.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
SIM1 IOMUX is changed into reset state in LPSR mode.As a result,
sim can't work again.
This patch sets sim1 IOMUX to default state after existing from LPSR mode.
(cherry-picked from commit 8e237775cd)
Signed-off-by: Gao Pan <b54642@freescale.com>
sim_activate() process is contained in the cold reset.
Thus, it is redundant and should be removed.
This patch also adds comments to cold reset process.
Signed-off-by: Gao Pan <b54642@freescale.com>
The API devm_request_and_ioremap meets compile error
on branch imx_4.1.y. It is recommend to replace the api
with devm_ioremap_resource.
Signed-off-by: Gao Pan <b54642@freescale.com>
The EMV4.3 has strict requirement about the reset sequence. The old code use the mdelay, udelay to
achievet, which is not precise enough. Replace it with the timer interrupt. The EMV4.3 requires
40000~45000 clock cycles duration when reset is low.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from a006fe283c8b97f0a711cb0829bfbdaaf4a5f31f)
In EMV4.3 after warm/cold reset, there would be a receiving window. The receiving
window would be 42000 clock length.If the receiving window expires without receiving
one byte, IFD need to take actions as EMV4.3 spec. The driver need to support this
to identify the sequence of the receiving window expiring event and the receiving event.
Since theinterrupt latency in linux OS is not certain, we need to tune this setting to
pass the cases. Current tuning parameter can work.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from faf1d8d881a6ad2c6b88fdf312cef142996937c1)
The CWT timer is used to detect the the character interval in the data traffic.
When tx, SIM IP can guarantee the interval based our setting. When RX, we need
to enalbe the CWT timer to check whether the interval is in the range. This patch
fix this.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from 9c92dfd070e7427eb1e0166f368b89b4a7ac1bff)
Modify the driver to support the SIM on i.MX6UL-EVK platform. The main modification is:
1. Add port index to support different port on platform.
2. Add POS-CARD support. The POS card has external IC to assert when SVEN to low. Add support.
3. Using a function to calculate the strict timing delay.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from 17d1315b0704e2db63ee6bd7aaefa0c796f53104)
Add the option to enable SIM driver build.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Signed-off-by: Gao Pan <b45643@freescale.com>
(cherry picked from 0f7a6fa3c141bfc7333d9056639b7a5b1154ed1d)
This driver is based on the current code which runs the the EMV test on the i.MX258 platform.
Since there are still many cases that can't pass on the i.MX258 and i.MX7d platform. The
driver will need to be improved after per-test work. Just check in as a base code. There
would be definitly some timing improvement work to do in the future.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from 3ac1ad5b2a68ecb052ccacca4ac7459ead04415e)
if the eos flag is not clear after output streamoff,
it may cause firmware hang with multi instances
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
VPU decoder driver create some debug fs,
but don't set the release function,
in open function, it will alloc some memory,
it should be freed when release function is called.
otherwise, memory will be leaked.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
the csr register 'CM0Px_CPUWAIT' will be cleared to '1' after
reset(poweroff then poweron), hence we could check is vpu poweroff
when suspend according to this value.
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: ming_qian <ming.qian@nxp.com>
Acked-by: Zhou Peng <eagle.zhou@nxp.com>
platform vzalloc may call wait_completion to sleep,
but sleep is forbidden during spinlock,
so use mutex instead
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Acked-by: Zhou Peng <eagle.zhou@nxp.com>
If close is called without calling streamoff,
the status of decode is enable,
some buffer status may be wrong.
disable before release it will avoid such error.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Acked-by: Zhou Peng <eagle.zhou@nxp.com>
Add a missing semicolon. This missing semicolon is not breaking the
build in defconfig since the next MODULE_DEVICE_TABLE() expand to an
empty string, so the next semicolon is used. When this macro expands
to a non-empty string, the build breaks. This was found by a
"make allmodconfig" build.
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Acked-by: Zhou Peng <eagle.zhou@nxp.com>
Add a missing semicolon. This missing semicolon is not breaking the
build in defconfig since the next MODULE_DEVICE_TABLE() expand to an
empty string, so the next semicolon is used. When this macro expands
to a non-empty string, the build breaks. This was found by a
"make allmodconfig" build.
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Acked-by: Zhou Peng <eagle.zhou@nxp.com>
Upstream rejected per-SOC kconfig symbols such as CONFIG_ARCH_FSL_IMX8MQ
so just use CONFIG_ARCH_MXC instead.
There is already an ARM64 check in drivers/mxc/Kconfig so this
shouldn't change anything except that we can drop CONFIG_ARCH_FSL_IMX8MQ
from linux-nxp tree.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Zhou Peng <eagle.zhou@nxp.com>
If the writeable flag is not change synchronously,
the flag may not changed correct,
it'll case the encode stream hang.
It's likely to happen when small resolution stream do suspend.
Signed-off-by: ming_qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
- Enable mailbox for vpu decoder
The mailbox of mu_m0 is used by imx8qxp and imx8qm
- Unify code between 4.19 and 5.x
Update code from 4.19
Separate sc and mu contents to vpu_mu.h/vpu_mu.c
Separate pm_domain contents to vpu_pm.h/vpu_pm.c
Add kfifo for better hold received mu message
Sync v4l2 change
Use ktime_get_real_ts64() replace do_gettimeofday()
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
- Enable mailbox for vpu encoder
The mailbox of mu1_m0 is used by imx8qxp
The mailbox of mu2_m0 are used by imx8qm
- Unify code between 4.19 and 5.x
Update code from 4.19
Separate sc and mu contents to vpu_encoder_mu.h/.c
Separate pm_domain contents to vpu_encoder_pm.h/.c
Add kfifo for better hold received mu message
Sync v4l2 change
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
compat_ptr() depends on CONFIG_COMPAT.
Make hx280enc_ioctl() conditionally compiled to avoid a build
break in case CONFIG_COMPAT is not defined.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
fix dma_alloc_attrs failure issue:
need to set valid device pointer instead of null pointer in
parameters of functions: dma_alloc_coherent/dma_free_coherent
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
Due to below commit:
7e98b7b542 ("media: v4l2: Get rid of ->vidioc_enum_fmt_vid_{cap, out}_mplane")
We met the following build error:
../drivers/mxc/vpu_malone/vpu_b0.c:1721:2: error: unknown field ‘vidioc_enum_fmt_vid_cap_mplane’ specified in initializer
.vidioc_enum_fmt_vid_cap_mplane = v4l2_ioctl_enum_fmt_vid_cap_mplane,
^
../drivers/mxc/vpu_malone/vpu_b0.c:1722:2: error: unknown field ‘vidioc_enum_fmt_vid_out_mplane’ specified in initializer
.vidioc_enum_fmt_vid_out_mplane = v4l2_ioctl_enum_fmt_vid_out_mplane,
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Fix build error for kernel 5.x:
- power domain adjustment
use dev_pm_domain_attach_by_name()/device_link_add
- remove sc fw api
comment fuse related function
- definition of vb2_qbuf() changed
set 'media_device' for vb2_qbuf()
- 'vidioc_g_crop'/'vidioc_s_crop' removed
comment function 'v4l2_ioctl_g_crop'
- remove legacy macro, such as 'VB2_BUF_STATE_PREPARED'
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
Fix build error for kernel 5.x:
- power domain adjustment
use dev_pm_domain_attach_by_name()/device_link_add
- remove sc fw api
comment fuse related function
- definition of vb2_qbuf() changed
set 'media_device' for vb2_qbuf()
- 'vidioc_g_crop' removed
comment function 'v4l2_ioctl_g_crop'
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c: In function ‘show_buffer_info’:
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:3951:23: error: ‘VB2_BUF_STATE_REQUEUEING’ undeclared (first use in this function)
" %d:requeueing,", VB2_BUF_STATE_REQUEUEING);
Due to this macro was removed by the following commit:
commit c6e4e2c403
Author: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Date: Thu Feb 28 07:35:46 2019 -0500
media: vb2: drop VB2_BUF_STATE_REQUEUEING
The last user of this state has been converted, so we can now drop
this. Requeueing causes the queue to become unordered, which causes
problems with requests and (in the future) fences.
Since it is no longer needed, just get rid of this.
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c: In function ‘show_buffer_info’:
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:4001:21: error: ‘VB2_BUF_STATE_PREPARED’ undeclared (first use in this function)
" %d:prepared,", VB2_BUF_STATE_PREPARED);
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c: At top level:
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:1415:2: error: unknown field ‘vidioc_g_crop’ specified in initializer
.vidioc_g_crop = vpu_enc_v4l2_ioctl_g_crop,
^
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:1415:2: warning: initialization from incompatible pointer type
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:1415:2: warning: (near initialization for ‘vpu_enc_v4l2_ioctl_ops.vidioc_dqbuf’)
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:1416:2: error: unknown field ‘vidioc_s_crop’ specified in initializer
.vidioc_s_crop = vpu_enc_v4l2_ioctl_s_crop,
^
Module owner can double check later if need implement the same function
in other callbackes.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c: In function ‘vpu_enc_v4l2_ioctl_qbuf’:
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:1048:8: warning: passing argument 2 of ‘vb2_qbuf’ from incompatible pointer type
ret = vb2_qbuf(&q_data->vb2_q, buf);
^
In file included from ../include/media/v4l2-mem2mem.h:20:0,
from ../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:47:
../include/media/videobuf2-v4l2.h:144:5: note: expected ‘struct media_device *’ but argument is of type ‘struct v4l2_buffer *’
int vb2_qbuf(struct vb2_queue *q, struct media_device *mdev,
^
../drivers/mxc/vpu_windsor/vpu_encoder_b0.c:1048:8: error: too few arguments to function ‘vb2_qbuf’
ret = vb2_qbuf(&q_data->vb2_q, buf);
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/mxc/vpu_malone/vpu_b0.c: In function ‘v4l2_ioctl_qbuf’:
../drivers/mxc/vpu_malone/vpu_b0.c:920:8: warning: passing argument 2 of ‘vb2_qbuf’ from incompatible pointer type
ret = vb2_qbuf(&q_data->vb2_q, buf);
^
In file included from ../include/media/v4l2-mem2mem.h:20:0,
from ../drivers/mxc/vpu_malone/vpu_b0.c:47:
../include/media/videobuf2-v4l2.h:144:5: note: expected ‘struct media_device *’ but argument is of type ‘struct v4l2_buffer *’
int vb2_qbuf(struct vb2_queue *q, struct media_device *mdev,
^
../drivers/mxc/vpu_malone/vpu_b0.c:920:8: error: too few arguments to function ‘vb2_qbuf’
ret = vb2_qbuf(&q_data->vb2_q, buf);
^
In file included from ../include/media/v4l2-mem2mem.h:20:0,
from ../drivers/mxc/vpu_malone/vpu_b0.c:47:
../include/media/videobuf2-v4l2.h:144:5: note: declared here
int vb2_qbuf(struct vb2_queue *q, struct media_device *mdev,
^
../drivers/mxc/vpu_malone/vpu_b0.c: At top level:
../drivers/mxc/vpu_malone/vpu_b0.c:1150:2: error: unknown field ‘vidioc_g_crop’ specified in initializer
.vidioc_g_crop = v4l2_ioctl_g_crop,
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
../drivers/mxc/hantro/hantrodec.c: In function ‘hantrodec_ioctl’:
../drivers/mxc/hantro/hantrodec.c:1033:62: error: macro "access_ok" passed 3 arguments, but takes just 2
err = !access_ok(VERIFY_WRITE, (void *) arg, _IOC_SIZE(cmd));
^
../drivers/mxc/hantro/hantrodec.c:1033:10: error: ‘access_ok’ undeclared (first use in this function)
err = !access_ok(VERIFY_WRITE, (void *) arg, _IOC_SIZE(cmd));
^
../drivers/mxc/hantro/hantrodec.c:1033:10: note: each undeclared identifier is reported only once for each function it appears in
../drivers/mxc/hantro/hantrodec.c:1035:61: error: macro "access_ok" passed 3 arguments, but takes just 2
err = !access_ok(VERIFY_READ, (void *) arg, _IOC_SIZE(cmd));
^
CC drivers/mtd/nand/raw/nand_base.o
CC drivers/irqchip/irq-mvebu-odmi.o
CC drivers/mtd/nand/raw/nand_legacy.o
../drivers/mxc/hantro/hantrodec.c: In function ‘get_hantro_core_desc32’:
../drivers/mxc/hantro/hantrodec.c:1266:61: error: macro "access_ok" passed 3 arguments, but takes just 2
if (!access_ok(VERIFY_READ, up, sizeof(struct core_desc_32)) ||
^
../drivers/mxc/hantro/hantrodec.c:1266:7: error: ‘access_ok’ undeclared (first use in this function)
if (!access_ok(VERIFY_READ, up, sizeof(struct core_desc_32)) ||
^
../drivers/mxc/hantro/hantrodec.c: In function ‘put_hantro_core_desc32’:
../drivers/mxc/hantro/hantrodec.c:1280:62: error: macro "access_ok" passed 3 arguments, but takes just 2
if (!access_ok(VERIFY_WRITE, up, sizeof(struct core_desc_32)) ||
^
../drivers/mxc/hantro/hantrodec.c:1280:7: error: ‘access_ok’ undeclared (first use in this function)
if (!access_ok(VERIFY_WRITE, up, sizeof(struct core_desc_32)) ||
^
../scripts/Makefile.build:278: recipe for target 'drivers/mxc/hantro/hantrodec.o' failed
make[4]: *** [drivers/mxc/hantro/hantrodec.o] Error 1
../scripts/Makefile.build:489: recipe for target 'drivers/mxc/hantro' failed
make[3]: *** [drivers/mxc/hantro] Error 2
../scripts/Makefile.build:489: recipe for target 'drivers/mxc' failed
make[2]: *** [drivers/mxc] Error 2
make[2]: *** Waiting for unfinished jobs...
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
gpu_probe set coherent_dma_mask with 40BIT configuration,
L5.4 dma_alloc_wc will return physical address beyond 4GB,
that will cause GPU hang and kernel panic problem on QM.
default coherent_dma_mask is 32BIT, can meet GPU requirement,
this patch remove coherent_dma_mask setting from GPU driver.
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
fix the gpu dump when enable vProfile on 8MN_EVK
Date: 7th Nov ,2019
Signed-off-by Ya Zhou <ya.zhou@nxp.com>
(cherry picked from commit 053c97c0387673c4e730d9b2f780f8cde5fcdf5b)
Update the imx platform gpu driver to accommodate layerscape soc,
so that both platform can share the same platform driver.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
dummy draw is required for 8MM GPU errata - HBN1285,
this fix shall be applied for GPU power-up transition,
otherwise GPU shader hang with the unnecessary flush.
check GPU MMU state to enable dummy draw fix only.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
When vm_mmap fail, code jump to OnError with error status and userLogical variable != 0.
Then _CMAFSLUnmapUser is called with a invalid virtual address (MdlMap->vmaAddr) and cause panic.
Check userLogical to avoid GPU kernel panic for error handling.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Fix GPU memory problem when disable CMA allocator,
set LINUX_CMA_FSL=0 in gc_hal_kernel_platform_imx.config
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
there are lots of PFNs busy message when run GPU tests:
[ 622.370671] alloc_contig_range: [4ea70, 4ea7c) PFNs busy
[ 626.518072] alloc_contig_range: [4ea90, 4ea9c) PFNs busy
this problem is related with CMA migration for fragments,
move CMA allocator after GFP to avoid memory migration,
also fix CMA preempt for contiguous memory request.
can improve CTS and gpubench benchmarks on M850D.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit ad77ed61b72c8362b04361acd2deb685fee15436)
When alloc NonContiguous1MPages, if malloc fail, need free the pages to avoid memory leak
Date: 24 Oct, 2019
Signed-off-by: Xianzhong Li <xianzhong.li@nxp.com>
The intension of this code is that, if current core is null, go to get the next one.
If it's already the last one, no need to do this.
Date: 23 Oct, 2019
Signed-off-by: Ella Feng <ella.feng@nxp.com>
The SCU API used in this file is for 4.19 kernel version and need to upgrade,
Need to modify the method to distinguish 8QM.8QXP by compatible string
drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx.c
This api was removed from kernel. Use new instead.
../drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c: In function ‘gckOS_GetTime’:
../drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c:3006:5: error: implicit declaration of function ‘do_gettimeofday’ [-Werror=implicit-function-declaration]
do_gettimeofday(&tv);
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
gc_hal_kernel_platform_imx.c:90:14: fatal error: linux/busfreq-imx.h: No such file or directory
# include <linux/busfreq-imx.h>
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
This reverts commit f2538f9993.
This patch causes the jffs2 failed to be written, which leads to several
storage test failed. This patch should be reverted in 5.4 release.
Signed-off-by: Han Xu <han.xu@nxp.com>
We need this in Jailhouse to map at specific virtual addresses, at
least for the moment.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 94bb285491a9a9e15c82c0761505b1073d6b7a47)
There's some discussion on how to do this the best, and Tejun prefers
that BFQ just create the file itself instead of having cgroups support
a symlink feature.
Hence revert commit 54b7b868e8 and 19e9da9e86 for 5.2, and this
can be done properly for 5.3.
Signed-off-by: Jens Axboe <axboe@kernel.dk>
(cherry picked from commit cf8929885d)
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Instead of scraping dmesg for messages such as 'Linked as a consumer to'
or 'Dropping the link to' export two new sysfs entries in the device
folder that list the consumer and supplier devices.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Adding back skb_recycle() as it's used by the DPAA Ethernet driver.
This was removed from the upstream kernel because it was lacking users.
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
There is a version 1.0 MU on i.MX7ULP platform.
One new version ID register is added, and it's offset is 0.
TRn registers are defined at the offset 0x20 ~ 0x2C.
RRn registers are defined at the offset 0x40 ~ 0x4C.
SR/CR registers are defined at 0x60/0x64.
Extend this driver to support it.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" compatible
to support it.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
IRQF_NO_SUSPEND flag is set for MU IRQ of IPC work, but with this
flag set, IRQD_WAKEUP_ARMED flag will NOT be set during
suspend_device_irq() phase, then when MU IRQ arrives, it will NOT
wake up system from suspend.
To fix this issue, pm_system_wakeup() is called in general MU IRQ
handler to make sure system can be waked up when MU IRQ arrives.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Change firmware init level to subsys_initcall_sync to ensure it's
probed before most devices to avoid unneccesary defer probe.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
When system loading is high, we can met some command timeout
issue occasionaly, so increase the timeout to a more safe value.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Add basic support for S32V234 SIUL2 pin controller, based on i.MX model.
Definitions of MSCR PADs, which are used for I/O (MSCR < 512), were added.
Definitions of IMCR (input only) PADs (MSCR >= 512), corresponding to
specific peripherals like ENET, I2C, UART or uSDHC are going to be added
along with the drivers which need them.
Add configurations for specific S32 SoC selection and pinmuxing driver.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Costin Carabas <costin.carabas@nxp.com>
Signed-off-by: Nica Dan <dan.nica@nxp.com>
Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
Signed-off-by: Matthew Nunez <matthew.nunez@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Add configuration option for the NXP S32 platform family in
Kconfig.platforms. For starters, the only SoC supported will be Treerunner
(S32V234), with a single execution target: the S32V234-EVB (rev 29288)
board.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
(cherry picked from commit 3d4e0158c1)
Pinctrl support of a device tree property "pinctrl-assert-gpios"
under client device node to select function at a board level pin
multiplexer. The pin route is controlled by a GPIO or i2c/spi expander
GPIO.
For i2c/spi expander GPIO, it may be loaded after client device that
set "pinctrl-assert-gpios" property in devicetree. Then the client device's
pin function doesn't work.
So it should add defer probe check for the GPIO pin.
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
It's pretty common that on some reference design or validation boards,
one pin could be used by two devices on board, and the pin route is
controlled by a GPIO. So to assert the pin for given device, not only
the pinmux controller in SoC needs to be set up properly but also the
GPIO needs to be pulled up/down.
The patch adds support of a device tree property "pinctrl-assert-gpios"
under client device node. It plays pretty much like a board level pin
multiplexer, and steers the pin route by controlling the GPIOs. When
client device has the property represent in its node, pinctrl device
tree mapping function will firstly pull up/down the GPIOs to assert the
pins for the device at board level.
[shawn.guo: cherry-pick commit e5a718edab82 from imx_3.10.y]
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
On these boards, the irq_set_type must point one valid function pointer
that can correctly set both edge and falling edge.
Signed-off-by: Song Hui <hui.song_1@nxp.com>
The per-SoC devtype structures can contain their own callbacks that
overwrite mpc8xxx_gpio_devtype_default.
The clear intention is that mpc8xxx_irq_set_type is used in case the SoC
does not specify a more specific callback. But what happens is that if
the SoC doesn't specify one, its .irq_set_type is de-facto NULL, and
this overwrites mpc8xxx_irq_set_type to a no-op. This means that the
following SoCs are affected:
- fsl,mpc8572-gpio
- fsl,ls1028a-gpio
- fsl,ls1088a-gpio
On these boards, the irq_set_type does exactly nothing, and the GPIO
controller keeps its GPICR register in the hardware-default state. On
the LS1028A, that is ACTIVE_BOTH, which means 2 interrupts are raised
even if the IRQ client requests LEVEL_HIGH. Another implication is that
the IRQs are not checked (e.g. level-triggered interrupts are not
rejected, although they are not supported).
Fixes: 82e39b0d85 ("gpio: mpc8xxx: handle differences between incarnations at a single place")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
While this will work, it will mess up userspace accounting of the number
of interrupts per second in tools such as vmstat. The reason is that
for every GPIO interrupt, /proc/interrupts records the count against GIC
interrupt 68 or 69, as well as the GPIO itself. So, for every GPIO
interrupt, the total number of interrupts that the system has seen
increments by two.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Song Hui <hui.song_1@nxp.com>
Use platform_get_irq_optional() to avoid error message for the
optional irq.
Fixes: 7723f4c5ec ("driver core: platform: Add an error message to platform_get_irq*()")
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
If device node don't specify the vcc regulator that means the
regulator maybe always on, so it don't need to do regcache sync
after system resume back.
The patch doesn't change other code logical.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The pca953x type of devices, e.g. max7310, may have a reset which needs
to be handled to get the device start working. Add a device_reset()
call for that, and defer the probe if the reset controller for that is
not ready yet.
The patch merge below two commits:
1a5c743f463f("MLK-11293: gpio: pca953x: add device_reset() call")
7500d014297a("MLK-13773 gpio: pca953x: correct device_reset() return
value check on kernel 4.1")
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
This patch enables gpio pin's pad wakeup function which
is supported by SCFW, with pad wakeup enabled, GPIO's
power is no need to be enabled after suspend, hence
save a sub-system's power.
To enable pad wakeup, dtb needs to provide pad wakeup
number for each gpio port, and each pin has to provide
<pin_id, type, line>, they should be inside each gpio node,
To enable pad wakeup, dtb needs to provide pad wakeup
number for each gpio port, and each pin has to provide
<pin_id, type, line>, they should be inside each gpio node,
this is for calling SCFW APIs to enable/disable pad wakeup,
example of adding GPIO4_22 pad wakeup in dtb:
&lsio_gpio4 {
/* total pad wakeup number in gpio4 */
pad-wakeup-num = <1>;
/* SC_P_USDHC1_CD_B, SC_PAD_WAKEUP_LOW_LVL, LINE 22 */
pad-wakeup = <27 4 22>;
};
Pad wakeup will be enabled after GPIO port suspend, and
once any pad wakes up system, gpio driver will get the
wakeup line and handles the event during noirq resume
phase.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
For some platform such as imx7D SDB, one pin of 74x164 to
control all peripheral power supply(PERI_3V_EN).
The pin should keep in high voltage level when 74x164 loading,
otherwise the module depend on PERI_3V3 will lose power.
So add new property registers-default into 74x164 driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 61fe7af7e47dd8bf6acc91ceabd9e660d28de28a)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Add rpmsg virtual gpio driver support.
i.MX7ULP GPIO PTA and PTB resource are managed by M4 core, setup one
simple protocol with M4 core based on RPMSG virtual IO to let A core
access such GPIOs that is what the driver do.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Currently, i2c_imx_bus_busy in i2c_imx_xfer is called before
pm_runtime_get which means the clocks are still not enabled.
This will cause a hang on IMX as IMX requires accessing registers
with clocks.
So let's change the order to ensure the clocks are enabled before
accessing registers. This is also a more safe way to access registers,
suppose shouldn't affect other platforms.
Fixes: 4a6ebf1c125c ("i2c: imx: add workaround for erratum ERR010027")
Reviewed-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
We can't use CONFIG_ARCH_LAYERSCAPE for one Image multiple platforms
support.
Reviewed-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Based on the I2C specification, if the data line (SDA) is stuck low,
the master should send nine clock pulses. The I2C slave device that
held the bus low should release it sometime within those nine clocks.
Because pinctrl is not supported on Layerscape, current bus recovery
is not avalible for Layerscape. This patch uses an open drain GPIO
pin to connect to the IICx_SCL to drive nine clock pulses to unlock
the I2C bus.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
ERR010027: Attempting a start cycle while the bus is busy may
generate a short clock pulse.
Software must ensure that the I2C BUS is idle by checking the
bus busy before switching to master mode and attempting a Start
cycle.
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
"i2c_clk_rate / 2" might be zero when the i2c_clk_rate gets the clock is
0 or 1, so add a judgment to avoid the denominator is equal to 0.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
[Arul: Add support to check return value everywhere in the driver]
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
(cherry picked from commit d382de595bffc0975ab7c0582e08dd4f7afc0c1a)
(cherry picked from commit 456caa9ba2)
According the e7805 in Errata, the SCK low level period should be less
than 1.3us.
The other series platform use this same IP can match the errata, and
ensure the low level period longer than 1.3us when the speed set to
400KHz. However, only at imx7d platform, the low level period is less
than 1.3us in the same situation.
Therefore, limit the maximum transfer speed to 384KHz when probe at
imx7d platform.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit 19f553846e872b5c379b37ed029132b79566cab0)
(cherry picked from commit 5d35540781)
When we do system suspend, the runtime pm will be disabled, but we need
to control the PMIC to power on/off the regulator, if the runtime pm is
disabled, if will failed to request runtime wakeup. So data transfer will
failed.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 93adab7140)
The i2c irq is masked when pcie starts a i2c transfer process
during noirq suspend stage. As a result, i2c transfer fails.
To solve the problem, IRQF_NO_SUSPEND is added to i2c bus.
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit d21259d913)
use subsys_initcall for i2c driver to improve i2c driver probe priority
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry picked from commit 3661eef81a)
(cherry picked from commit 9c867985d2)
During porting commit ede264acf0 ("MLK-14982-1 imx8: lpi2c: add ipg
clk for lpi2c driver") which replaced the single clk
with clk_ipg and clk_per was skipped.
Part of the code was later added in commit 96dbdd8c3d0b ("MLK-16713 i2c:
imx-lpi2c: add runtime pm support") except the "clk" field was kept and
clk_get calls were not updated.
Fix imx7ulp boot by fetching both clocks.
Fixes: 96dbdd8c3d0b ("MLK-16713 i2c: imx-lpi2c: add runtime pm support")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 1b9c92f344)
- Add runtime pm support to dynamicly manage the ipg and per clocks.
- Put the suspend to suspend_noirq.
- Call .pm_runtime_force_suspend() to force runtime pm suspended
in .suspend_noirq().
BuildInfo:
- SCFW 88456c73, IMX-MKIMAGE 06bc2767, ATF a438801
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g7953d47
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
During 4.14 rebase added pm_runtime_get_sync/pm_runtime_put around
the reading of LPI2C_PARAM.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 31cc4be3e8)
A NACK flag in ISR means i2c bus error. In such codition,
there is no need to do read/write operation. It's better
to return ISR directly and then stop i2c transfer.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-pick from 839d59e48b6fdbd882776a48a88ce26ff14d8b86)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 3d05274613)
Add defer probe when rpbus probe, so if the rpmsg channel is not
created, the rpbus will try to probe later.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
For some chips may need long time to get the response from M4 sometimes,
enlarge timeout to 500ms.
Add a judgement to check if the received data is the current transfer
wanted.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit 222e201b52)
(cherry picked from commit 6cfc8578cc)
I2c_lock_bus function in i2c-core-base will not stop the transfer to
different devices on different buses at the same time.
Since the multiple rpmsg i2c buses share one rpmsg channel, so it has to
add mutex to protect rpmsg resource accessing.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit d592afe901)
(cherry picked from commit 44622ff8c8)
The alias ID must be defined in device tree, because
that will be used as BUS ID to Cortex M4. If the alias ID
not defined, linux kernel will automatically allocate one
ID which might not be the same number used in Cortex M4 and
Cortex M4 will not send msg to I2C controller.
So let's add BUG_ON to catch issue as earlier as possible to avoid
wasting efforts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit b9ff203550)
(cherry picked from commit 8e509705dd)
Add virtual i2c driver to send SRTM i2c messages to M4.
Each virtual I2C bus has a specal bus id, which is abstracted by M4.
Each SRTM message include a bus id for the bus which the device is on.
Virtual i2c rpmsg bus will bind rpbus nodes with compatible string
"fsl,i2c-rpbus". And "rpmsg-i2c-channel" will probe only one rpmsg
channel for all rpbuses.
This virtual i2c driver depends on CONFIG_I2C and CONFIG_RPMSG.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit 9feeac93a7)
(cherry picked from commit 379ab8392e)
At some systems, the pinctrl setting will be lost or needs to
set as "sleep" state to save power consumption. So, we need to
configure pinctrl as "sleep" state when system enters suspend,
and as "default" state after system resumes. In this way, the
pinctrl value can be recovered as "default" state after resuming.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Depends on board design, the gpio controlling regulator may
connects with a big capacitance. When need off, it takes some time
to let the regulator to be truly off. If not add enough delay, the
regulator might have always been on, so introduce off-on-delay to
handle such case.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/1572311875-22880-3-git-send-email-peng.fan@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit f7907e57ae)
The Linux kernel regulator core implementation does not accept negative
voltage values; all negative values are treated as errors.
The problem with the EPDC is that the panel uses a negative voltage
regulator which fails to be enabled by the regulator core. This issue has
slipped up until the 4.9 rebase because the voltage range [min, max] was
checked against only when min = max. This has been fixed in 4.9, resulting
in errors in the VCOM regulator driver.
The fix is to use the negative values when communicating with the hardware,
but send only positive values to the regulator core.
This patch sends the absolute value to the regulator core and transforms
the received value (from the regulator core) to negative one before sending
it to hardware.
Fix device tree to deal with negative voltage regulator values by setting
min_value = -real_max_value and vice versa. Boards affected:
- imx6dl-sabresd
- imx6ull-14x14-ddr3-arm2
- imx7d-12x12-lpddr3-arm2
- imx7d-sdb
- imx6sll-evk
- imx6sl-evk
- imx6sll-lpddr3-arm2
Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>
[Arul: Fix merge conflicts]
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
[Robby: split original patch to driver and dts part. this is driver part.]
Signed-off-by: Robby Cai <robby.cai@nxp.com>
i2c device client shouldn't be freed by i2c device driver, there have
problems in below cases:
- one device match to different drivers, the second matched driver will
cannot access i2c device client if it is freed by the first matched
driver.
- one module driver insmod: the first insmod fail free client due to system
low memory, after kswapd system free pages and has enough free pages, the
second insmod will cause match failed.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
This patch added linux/mod_devicetable.h to fix the compilation error.
drivers/hwmon/max17135-hwmon.c:57:40: error: array type has incomplete element type ‘struct platform_device_id’
static const struct platform_device_id max17135_sns_id[] = {
^~~~~~~~~~~~~~~
drivers/hwmon/max17135-hwmon.c:57:40: warning: ‘max17135_sns_id’ defined but not used [-Wunused-variable]
scripts/Makefile.build:303: recipe for target 'drivers/hwmon/max17135-hwmon.o' failed
make[2]: *** [drivers/hwmon/max17135-hwmon.o] Error 1
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add PMIC 'MAX17135' module drivers to 4.1.y kernel. These are necessary
to supply power for E-ink panel display functions.
Signed-off-by: Robby Cai <r63905@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add the rpmsg tty demo for iMX AMP platforms.
Use the "echo <string> > /dev/*RPMSG*", after insmod the module.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
- Enable the tx_block mechanism to make sure that every transmission is
complete when mailbox is used.
- Refine the data exchange in the rpmsg_rx_callback and some info
messages and codes comments.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
- Clean up the codes, move the tx/rx mailbox initializations into one
function.
- Fix the mu msg data exchange bug.
- Fix to stop autoload pingpong test module.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Based on "virtio_rpmsg_bus" driver, This patch-set is used to set up
the communication mechanism between A core and M core on i.MX AMP SOCs.
Add the initial imx rpmsg support glue driver and one pingpong demo,
demonstrated the data transactions between A core and remote M core.
Distributed framework is used in IMX RPMSG implementation, refer to the
following requirements:
- The CAN functions contained in M core and RTOS should be ready and
complete functional in 50ms after AMP system is turned on.
- Partition reset. System wouldn't be stalled by the exceptions (e.x
the reset triggered by the system hang) occurred at the other side.
And the RPMSG mechanism should be recovered automactilly after the
partition reset is completed.
In this scenario, the M core and RTOS would be kicked off by bootloader
firstly, then A core and Linux would be loaded later. Both M core/RTOS
and A core/Linux are running independly.
One physical memory region used to store the vring is mandatory required
to pre-reserved and well-knowned by both A core and M core
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
As of now, if somebody masks/unmasks any irq while the set_wake goes
to TF-A, the masking/unmasking might be overwritten. So add new irq_chip ops
that implement the masking, unmasking, set_wake and set_affinity and each
calls into TF-A internally. Also add the ERR11171 knob that allows
initializing the core wake-up workaround by registering our own
smp_cross_call funtion and call the old one from within. The ERR11171 knob
gets enabled by default if the machine is i.MX8MQ.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
The wakeup irq info need to be provided to ATF side, then
ATF side can config the correct wakeup IRQ when entering
suspend.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Fix below build error when built with imx_v6_v7_defconfig:
drivers/irqchip/irq-imx-gpcv2.c: In function 'imx_gpcv2_wake_request_fixup':
drivers/irqchip/irq-imx-gpcv2.c:112:28: error: '__smp_cross_call' undeclared (first use in this function); did you mean 'set_smp_cross_call'?
__gic_v3_smp_cross_call = __smp_cross_call;
^~~~~~~~~~~~~~~~
set_smp_cross_call
drivers/irqchip/irq-imx-gpcv2.c:112:28: note: each undeclared identifier is reported only once for each function it appears in
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Not all EL3 have the FSL_SIP_CONFIG_GPC_CORE_WAKE, therefore disable
the cpuidle to avoid all the cores going to sleep ending up with a
hang. This allows all the EL3 implementations to work with i.MX8MQ
even if they do not support core wake-up through GPC as a workaround.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
i.MX8MQ is missing the wake_request signals from GIC to GPCv2. This indirectly
breaks cpuidle support due to inability to wake target cores on IPIs.
Here is the link to the errata (see e11171):
https://www.nxp.com/docs/en/errata/IMX8MDQLQ_0N14W.pdf
Now, in order to fix this, we can trigger IRQ 32 (hwirq 0) to all the cores by
setting 12th bit in IOMUX_GPR1 register. In order to control the target cores
only, that is, not waking up all the cores every time, we can unmask/mask the
IRQ 32 in the first GPC IMR register. So basically we can leave the IOMUX_GPR1
12th bit always set and just play with the masking and unmasking the IRO 32 for
each independent core.
Since EL3 is the one that deals with powering down/up the cores, and since the
cores wake up in EL3, EL3 should be the one to control the IMRs in this case.
This implies we need to get into EL3 on every IPI to do the unmasking, leaving
the masking to be done on the power-up sequence by the core itself.
In order to be able to get into EL3 on each IPI, we 'hijack' the registered smp
cross call handler, in this case the gic_raise_softirq which is registered by
the irq-gic-v3 driver and register our own handler instead. This new handler is
basically a wrapper over the hijacked handler plus the call into EL3.
To get into EL3, we use a custom vendor SIP id added just for this purpose.
All of this is conditional for i.MX8MQ only.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
In some subsystem of IMX8, irqsteer is under multi power domains
and they need to be actived when irqsteer work.
irqsteer of imx8qxp image subsystem need CSI and ISI power domains
to be actived, so add multi-pd support as an optional feature for
irqsteer driver
The power-domains on imx8qxp are meant to look like this:
power-domains = <&pd IMX_SC_R_CSI_0>, <&pd IMX_SC_R_ISI_CH0>;
power-domain-names = "pd_csi", "pd_isi_ch0";
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
- Refine the tx/rx impedance ratio setting.
- Set the RxWaterMark to fix the GEN3 link unstable issue on iMX8QM.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Original driver expect a register node with name "sata-ecc"
this node is of 64 bit wide.
In ACPI such nodes can be provided with QWordMemory, but
QWordMemory can not hold DescriptorName more than 4 characters.
Therefore this patch changes platform property retrival based
upon index instead of named.
Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
There is a erratum on lx2160a which is: "SATA link is
going down sometime during sata initialization"
The workaround for it is to reset the lane. This patch
implements this workaround.
This erratum only exists on lx2160 Rev1, will be addressed
on Rev2 and later.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Enable iMX8QM SATA PM support.
Regarding to the different PCIe link, the PHYx2 APB clocks should be
turn on and off accordingly in PM operations on iMX8QM.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Setup SATA its own HSIO regmap to fix the kernel dump,
when the HSIO regmap is set as system syscon.
/sys/kernel/debug/regmap# cat dummy-hsio@5f080000/register
NOTE: devm_ioremap is used to get the virtual address, because that the
devm_ioremap_resource would return -EBUSY when there is a resource
overlap between different HSIO consumers.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
- Add one ext_osc parameter for imx8qm ahci.
Add one parameter to distinguish the different ref_clk
source, internal pll or the external osc.
NOTE: The value of the ext_osc should be aligned to the one
of the PCIe's, since both of them share one ref_clk source.
- Fix can't find ahb clk issue.
The ahb clock is not mandatory required by iMX8QM SATA, fetch it only
when there is "ahb" clock.
- Specify the 32-bit dma limitation and the softreset for iMX8QM SATA.
- Use the standard ahci_error_handler on iMX8QM SATA.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
In order to do SATA compliance tests, add the bist mode
sysfile callback to generate kinds of test patterns.
- Add the "ahci-imx.bist=1" into kernel command line to
register the bist mode enable callback.
- Use "echo <pattern_#> /sys/devices/.../ahci_bist_pattern"
to generate the responding test pattern.
- Use "cat /sys/devices/.../ahci_bist_pattern" to check
the current pattern configuration.
NOTE:
LBP 0, LFTP 1, MFTP 2, HFTP 3.
- Adjust the TX-DEEMP and COMINT to pass the compliance tests.
BuildInfo:
- SCFW 685bd659, SECO-FW 00000000, IMX-MKIMAGE 53974947, ATF 625d9ed
- U-Boot 2017.03-01018-g6045484
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
errata:
When a read command returns less data than specified in the PRDs (for
example, there are two PRDs for this command, but the device returns a
number of bytes which is less than in the first PRD), the second PRD of
this command is not read out of the PRD FIFO, causing the next command
to use this PRD erroneously.
workaround
- forces sg_tablesize = 1
- modified the sg_io function in block/scsi_ioctl.c to use a 64k buffer
allocated with dma_alloc_coherent during the probe in ahci_imx
- In order to fix the scsi/sata hang, when CD_ROM and HDD are
accessed simultaneously after the workaround is applied.
Do not go to sleep in scsi_eh_handler, when there is host failed.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
After set the STROBE SLV delay target value, it need to wait some
time to let the usdhc lock the REF and SLV clock. In normal case,
1~2us is enough for imx8/imx6 and imx7d, and 4~5us is enough for
imx7ulp, but when do reboot stress test or do the bind/unbind stress
test, sometimes need to wait about 10us to get the status lock.
This patch optimize delay handle method, only print the warning
message if the status is still not lock after 1ms delay.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
When force clock off, check the SDOFF of register PRSSTAT to make sure
the clock is gate off. Before force clock on, check the SDSTB of register
PRSSTAT to make sure the clock is stable, this will eliminate the clock
glitch.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
S32V234 uSDHC is compatible with the driver implemented for i.MX.
Notes:
- Errata ESDHC_FLAG_ERR004536 is not applicable for S32V234 uSDHC.
- MMC driver is selected based on the SOC that is part of the Freescale S32
family.
Signed-off-by: Gilles Talis <gilles.talis@nxp.com>
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Acked by: Haibo Chen <haibo.chen@nxp.com>
A previous patch implemented an incomplete workaround of erratum
A-008171. The complete workaround is as below. This patch is to
implement the complete workaround which uses SW tuning if HW tuning
fails, and retries both HW/SW tuning once with reduced clock if
workaround fails. This is suggested by hardware team, and the patch
had been verified on LS1046A eSDHC + Phison 32G eMMC which could
trigger the erratum.
Workaround:
/* For T1040, T2080, LS1021A, T1023 Rev 1: */
1. Program TBPTR[TB_WNDW_END_PTR] = 3*DIV_RATIO.
2. Program TBPTR[TB_WNDW_START_PTR] = 5*DIV_RATIO.
3. Program the software tuning mode by setting TBCTL[TB_MODE] = 2'h3.
4. Set SYSCTL2[EXTN] and SYSCTL2[SAMPCLKSEL].
5. Issue SEND_TUNING_BLK Command (CMD19 for SD, CMD21 for MMC).
6. Wait for IRQSTAT[BRR], buffer read ready, to be set.
7. Clear IRQSTAT[BRR].
8. Check SYSCTL2[EXTN] to be cleared.
9. Check SYSCTL2[SAMPCLKSEL], Sampling Clock Select. It's set value
indicate tuning procedure success, and clear indicate failure.
In case of tuning failure, fixed sampling scheme could be used by
clearing TBCTL[TB_EN].
/* For LS1080A Rev 1, LS2088A Rev 1.0, LA1575A Rev 1.0: */
1. Read the TBCTL[31:0] register. Write TBCTL[11:8]=4'h8 and wait for
1ms.
2. Read the TBCTL[31:0] register and rewrite again. Wait for 1ms second.
3. Read the TBSTAT[31:0] register twice.
3.1 Reset data lines by setting ESDHCCTL[RSTD] bit.
3.2 Check ESDHCCTL[RSTD] bit.
3.3 If ESDHCCTL[RSTD] is 0, go to step 3.4 else go to step 3.2.
3.4 Write 32'hFFFF_FFFF to IRQSTAT register.
4. if TBSTAT[15:8]-TBSTAT[7:0] > 4*DIV_RATIO or TBSTAT[7:0]-TBSTAT[15:8]
> 4*DIV_RATIO , then program TBPTR[TB_WNDW_END_PTR] = 4*DIV_RATIO and
program TBPTR[TB_WNDW_START_PTR] = 8*DIV_RATIO.
/* For LS1012A Rev1, LS1043A Rev 1.x, LS1046A 1.0: */
1. Read the TBCTL[0:31] register. Write TBCTL[20:23]=4'h8 and wait for
1ms.
2. Read the TBCTL[0:31] register and rewrite again. Wait for 1ms second.
3. Read the TBSTAT[0:31] register twice.
3.1 Reset data lines by setting ESDHCCTL[RSTD] bit.
3.2 Check ESDHCCTL[RSTD] bit.
3.3 If ESDHCCTL[RSTD] is 0, go to step 3.4 else go to step 3.2.
3.4 Write 32'hFFFF_FFFF to IRQSTAT register.
4. if TBSTAT[16:23]-TBSTAT[24:31] > 4*DIV_RATIO or TBSTAT[24:31]-
TBSTAT[16:23] > 4* DIV_RATIO , then program TBPTR[TB_WNDW_END_PTR] =
4*DIV_RATIO and program TBPTR[TB_WNDW_START_PTR] = 8*DIV_RATIO.
/* For LS1080A Rev 1, LS2088A Rev 1.0, LA1575A Rev 1.0 LS1012A Rev1,
* LS1043A Rev 1.x, LS1046A 1.0:
*/
5. else program TBPTR[TB_WNDW_END_PTR] = 3*DIV_RATIO and program
TBPTR[TB_WNDW_START_PTR] = 5*DIV_RATIO.
6. Program the software tuning mode by setting TBCTL[TB_MODE] = 2'h3.
7. Set SYSCTL2[EXTN], wait 1us and SYSCTL2[SAMPCLKSEL].
8. Issue SEND_TUNING_BLK Command (CMD19 for SD, CMD21 for MMC).
9. Wait for IRQSTAT[BRR], buffer read ready, to be set.
10. Clear IRQSTAT[BRR].
11. Check SYSCTL2[EXTN] to be cleared.
12. Check SYSCTL2[SAMPCLKSEL], Sampling Clock Select. It's set value
indicate tuning procedure success, and clear indicate failure.
In case of tuning failure, fixed sampling scheme could be used by
clearing TBCTL[TB_EN].
Fixes: b1f378ab53 ("mmc: sdhci-of-esdhc: add erratum A008171 support")
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
The ESDHC_FLUSH_ASYNC_FIFO bit which is set to flush asynchronous FIFO
should be polled until it's auto cleared by hardware.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Currently sdhci driver free irq in host suspend, and call
request_threaded_irq() in host resume. But during host resume,
Ctrl+C can impact sdhci host resume, see the error log:
CPU1 is up
PM: noirq resume of devices complete after 0.637 msecs imx-sdma 30bd0000.sdma: loaded firmware 4.1
PM: early resume of devices complete after 0.774 msecs
dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -4
PM: Device 30b40000.usdhc failed to resume: error -4
dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -4
PM: Device 30b50000.usdhc failed to resume: error -4
dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -4
PM: Device 30b60000.usdhc failed to resume: error -4 fec 30be0000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: Timeout waiting for hardware interrupt.
mmc0: error -110 during resume (card was removed?)
mmc2: Timeout waiting for hardware interrupt.
mmc2: Timeout waiting for hardware interrupt.
mmc2: error -110 during resume (card was removed?)
In request_threaded_irq-> __setup_irq-> kthread_create
->kthread_create_on_node, the comment shows that SIGKILLed will
impact the kthread create, and return -EINTR.
This patch replace them with disable|enable_irq(), that will prevent
IRQs from being propagated to the sdhci driver.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Since L4.15, community involve the commit 105819c8a5 ("mmc: core: use mrq->sbc
when sending CMD23 for RPMB"), let the usdhc to decide whether to use ACMD23 for
RPMB. This CMD23 for RPMB need to set the bit 31 to its argument, if not, the
RPMB write operation will return general fail.
According to the sdhci logic, SDMA mode will disable the ACMD23, and only in
ADMA mode, it will chose to use ACMD23 if the host support. But according to
debug, and confirm with IC, the imx6qpdl/imx6sx/imx6sl/imx7d do not support
the ACMD23 feature completely. These SoCs only use the 16 bit block count of
the register 0x4 (BLOCK_ATT) as the CMD23's argument in ACMD23 mode, which
means it will ignore the upper 16 bit of the CMD23's argument. This will block
the reliable write operation in RPMB, because RPMB reliable write need to set
the bit31 of the CMD23's argument. This is the hardware limitation. Due to
imx6sl use SDMA, so for imx6qpdl/imx6sx/imx7d, it need to broke the ACMD23 for
eMMC, SD card do not has this limitation, because SD card do not support reliable
write.
For imx6ul/imx6ull/imx6sll/imx7ulp/imx8, it support the ACMD23 completely, it
change to use the 0x0 register (DS_ADDR) to put the CMD23's argument in ADMA mode.
This patch handle 'auto-cmd23-broken' from devicetree.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
i.MX8MM contains USDHC which support eMMC V5.1 (including CMDQ and
HS400ES), besides i.MX8MM also support bus frequency, so add a new
esdhc_soc_data for i.MX8MM.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
When suspend usdhc, it will access usdhc register. So usdhc clock
should be enabled, otherwise the access usdhc register will return
error or cause system.
Take this into consideration, if system enable a usdhc and do not
connect any SD/SDIO/MMC card, after system boot up, this usdhc
will do runtime suspend, and close all usdhc clock. At this time,
if suspend the system, due to no card persent, usdhc runtime resume
will not be called. So usdhc clock still closed, then in suspend,
once access usdhc register, system hung or bus error return.
This patch make sure usdhc clock always enabled while doing usdhc
suspend.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
strobe-dll-delay-target is the delay cell add on the strobe line.
Strobe line the the uSDHC loopback read clock which is use in HS400
mode. Different strobe-dll-delay-target may need to set for different
board/SoC. If this delay cell is not set to an appropriate value,
we may see some read operation meet CRC error after HS400 mode select
which already pass the tuning.
This patch add the strobe-dll-delay-target setting in driver, so that
user can easily config this delay cell in dts file.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
When pm_runtime_suspend is run, a call to SCFW power off the SS in
which the resource resides is made. The SCFW can power off the SS
if no other resource in active in tha SS. If so, all state associated
with all the resources within the SS that is powered off is lost,
this includes the clock rates, clock state etc. When pm_runtime_resume
is called, the SS associated with that resource is powered up. But
the clocks are left in the default state.
This patch restore clock rate in pm_runtime_resume, make sure the
clock is right rather than depending on the default state setting
by SCFW.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
For Mega/Mix enabled SoCs like MX7D and MX6SX, uSDHC will lost power in
LP mode no matter whether the MMC_KEEP_POWER flag is set or not.
This may cause state misalign between kernel and HW, especially for
SDIO3.0 WiFi cards.
e.g. SDIO WiFi driver usually will keep power during system suspend.
And after resume, no card re-enumeration called.
But the tuning state is lost due to Mega/Mix.
Then CRC error may happen during next data transfer.
So we should always fire a mmc_retune_needed() for such type SoC
to tell MMC core retuning is needed for next data transfer.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
When using jailhouse to support two Linux on i.MX8MQ EVK,
we use the 1st Linux to configure pinctrl for the 2nd Linux.
Then the 2nd Linux could use the mmc without pinctrl driver.
So give a warning message when no pinctrl available, but no fail probe.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add feature of setting slot index via devicetree alias, to hard code the
mmc/sd root device.
The patch requires additional alias_id fix or it won't work.
Note: minor device number keep independent with this device alias.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
The default max segment size of IOMMU is 64KB, which exceed the ADMA
limitation. ADMA only support max to 65535, 64KB - 1Byte. IOMMU will
optimize the segments it received, merge the little segment into one
big segment. If we use the default IOMMU config, then ADMA will get
some segments which it's size is 64KB. Then ADMA error will shows up.
Currently, when use standard tuning, driver default disable DMA. But
on i.MX usdhc, this is not enough. Need also clear DMA_SEL. If not,
once the DMA_SEL select AMDA2, even dma already disabled, when send
tuning command, usdhc will still prefetch the ADMA script from wrong
DMA address, then we will see IOMMU report some error which show
lack of TLB mapping.
This patch fix these two issue, make sure usdhc can work well by
operate data through IOMMU.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
With igore pm notify feature, MMC core will not re-detect card
after system suspend/resume. This is needed for some special cards
like Broadcom WiFi which can't work propertly on card re-detect
after system resume.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
This will cause meaningless CPU overhead by polling the card at backgroud
if the CD is broken.
Most board does not intend to use this function, so remove it.
Platform driver could add it for test if needed.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
We may meet the following errors with a SD3.0 DDR50 cards during reboot test.
mmc0: new ultra high speed DDR50 SDHC card at address aaaa
mmcblk0: mmc0:aaaa SU08G 7.40 GiB
mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
mmcblk0: retrying using single block read
mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
end_request: I/O error, dev mmcblk0, sector 0
.....
Buffer I/O error on device mmcblk0, logical block 0
mmcblk0: unable to read partition table
The root cause is still unknown.
Since there's an errata of Sandisk eMMC card before that it requires delay for CMD6
for eMMC DDR mode to work stable, we also suspect the SD3.0 DDR requires similar delay.
(Still not confirmed by Sandisk)
By adding the delay, the overnight reboot test(run 2000+ times) did not
show the issue anymore. Originally it can easy show the error after about 20 times of
reboot test.
So this patch would be the temporary workaround for Sandisk SD3.0 DDR50 mode
unstable issue.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
After adding mega fast support, the default enabled usdhc wakeup will block
M/F to gate off power domain.
To avoid this issue, we only claim wakeup capability and reply on user to enable
it via sysfs according to real needs.
The drawback of such change is that for SDIO WiFi Wakeup On Wireless feature,
User has to enable both uSDHC and WiFi WoW wakeup mannually to make
WoW work well.
BTW, due to the wakeup feature is controller itself, so we do not need to reply
on WiFi PM flags to enable it.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Except SDHCI_QUIRK_BROKEN_CARD_DETECTION and MMC_CAP_NONREMOVABLE,
we also do not need to handle controller native card detect interrupt
for gpio cd type.
If we wrong enabled the card detect interrupt for gpio case, it will
cause a lot of unexpected card detect interrupts during data transfer
which should not happen.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Some sandisk emmc cards need certain delay before sending cmd13 after cmd6.
Original CR: ENGR174296 (commit: fd031f9)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
NXP LS1028A lpuart is the same IP as LS1021A, but it is
little endian for register accessing instead of big endian
on LS1021A.
So add LS1028A matching data to distiguish the chips.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Add two stop bits support.
User can run the command to enable two stop bits
for test: stty cstopb -F /dev/ttyLPx
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
When use lpuart with DMA mode as wake up source, it still switch to
cpu mode in .suspend() that enable cpu interrupts RIE and ILIE as
wakeup source. Enable the wakeup irq bits in .suspend_noirq() and
disable the wakeup irq bits in .resume_noirq().
For DMA mode, after system resume back, it needs to setup DMA again,
if DMA setup is failed, it switchs to CPU mode. .resume() will share
the HW setup code with .startup(), so abstract the same code to the
api like lpuartx_hw_setup().
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add runtime pm support to manage lpuart clock and its power domain
to save power in system idle and system suspend stages.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Do HW reset for communication port after the port is registered
if the UART controller support the feature.
Do partition reset with LPUART's power on, LPUART registers will
keep the previous status, like on i.MX8QM platform, which is not
expected action, so reset the HW is required.
Currently, only i.MX7ULP and i.MX8QM LPUART controllers include
global register that support HW reset.
Tested-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit c2bc1f62ec)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
(cherry picked from commit 9f396f540093402317c3c1b9a8fe955b91c89164)
The dmaengine_prep_slave_sg needs to use sg count returned
by dma_map_sg, not use sport->dma_tx_nents, because the return
value of dma_map_sg is not always same with "nents".
When enabling iommu for lpuart + edma, iommu framework may concatenate
two sgs into one.
Fixes: 6250cc30c4 ("tty: serial: fsl_lpuart: Use scatter/gather DMA for Tx")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
There have a corner case that tx DMA .callback() is coming after
.flush_buffer(), then .callback() should check dma_tx_in_progress
flag and return in directly.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
imx8qxp lpuart support eDMA for dma mode, support EOP (end-of-packet)
feature. But eDMA cannot detect the correct DADDR for current major
loop in cyclic mode, so it doesn't support cyclic mode.
The patch is to enable lpuart prep slave sg dma mode for imx8qxp.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Register offset needs to be applied on mapbase also.
dma_tx/rx_request use the physical address of UARTDATA.
Register offset is currently only applied to membase (the
corresponding virtual addr) but not on mapbase.
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Add busfreq and pm qos support for DMA mode.
DMA mode cannot work stablely at low busfreq mode, so request
high busfreq once DMA is enabled.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The IP module clock maximum clock rate is 80MHz, Once the module
clock is great than 80MHz, there may have risk.
So set the maximum module clock to 80MHz.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Add fb name check function pwm_backlight_check_fb_name(),
pwm driver can banding to fb with fb name when driver working
in device tree architecture.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
As the below diagram shows, to achieve a particular serial clock rate,
we should choose an appropriate CO divider value(1/2/4/8) so that PLL
VCO frequency(fvco) is in specified range(640MHz ~ 1500MHz).
--------- 640MHz ~ 1500MHz ------------ --------------
| PLL VCO | ----------------> | CO divider | -> | serial clock |
--------- ------------ --------------
1/2/4/8 div 7 * phy_clk_rate
This patch configures CO divider to be appropriate value to meet the fvco
range requirement. This may address display flicker issue seen on some
SoC samples.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds Mixel LVDS combo PHY support(MIPI DSI and LVDS combo).
This LVDS PHY supports one LVDS channel in single mode and two channels in
dual mode.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Mixel, Inc. is a provider of mixed-signal mobile IPs.
Website: www.mixel.com
Signed-off-by: Liu Ying <victor.liu@nxp.com>
[ Aisheng: change to YAML format ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Use 'ARCH_MXC' config to replace 'ARCH_FSL_IMX8MM' and
'ARCH_FSL_IMX8MN' configs which are not defined for
dispmix reset kconfig entry.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
devm_regmap_init_mmio_clk() will try to get clock by matching
clock-names property in dts with its clk_id. So the clock name
should be identical to name which clock registered. Otherwise,
devm_regmap_init_mmio_clk() will fail with -ENOENT error.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Add pinctrl comsuser header file that defile the pintrl
interfaces for different configs define.
Reported-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Ran Wang <ran.wang_1@nxp.com>
This is an reset driver to implement a reset controller
device DISPMIX on IMX8MM and IMX8MN platforms. Dispmix
reset is used to reset or enable related buses and clks
for the submodules in DISPMIX.
All the dispmix resets are divided into three subgroups:
sft_rstn, clk_en and mipi_rst, and each of them contains
several reset lines to control several different modules
on and off in DISPMIX which doesn't require the standard
reset flow, but only line assert and deassert operations.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The reset PIN may loss its state when system suspend due to GPIO
controller power off. Set pinctrl as "sleep" state to keep PIN
voltage during system suspend, and configurate pinctrl as "default"
state after system resume back. Because GPIO resume back earlier
than gpio-reset, then GPIO signal can control the PIN voltage again.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
(cherry picked from commit ea5a9cdc1941afc36fd0f5a223ea762b85512130)
Some devices need to wait for some milliseconds after reset, so add
post reset delay in the gpio-reset chip.
The post reset delay is optional.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
GPIO is widely used as the reset control for various devices. Let's
build the support in by default.
[shawn.guo: cherry-pick commit 795fcb3bc5bb from imx_3.10.y]
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
(cherry picked from commit 0cbf78b5b02c57e6fd0e57e811cfe56509c4fd24)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
It's a little bit late to register gpio-reset driver at module_init
time, because gpio-reset provides reset control via gpio for other
devices which are mostly probed at module_init time too. And it
becomes even worse, when the gpio comes from IO expander on I2C bus,
e.g. pca953x. In that case, gpio-reset needs to be ready before I2C
bus driver which is generally ready at subsys_initcall time. Let's
register gpio-reset driver in arch_initcall() to have it ready early
enough.
The defer probe mechanism is not used here, because a reset controller
driver should be reasonably registered early than other devices. More
importantly, defer probe doe not help in some nasty cases, e.g. the
gpio-pca953x device itself needs a reset from gpio-reset driver start
working.
[shawn.guo: cherry-pick commit 7153f05108ef from imx_3.10.y]
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
(cherry picked from commit 11e3543010d4ed50db78a5fc809f24c89e8c6e30)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
This driver implements a reset controller device that toggle a gpio
connected to a reset pin of a peripheral IC. The delay between assertion
and de-assertion of the reset signal can be configured via device tree.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
bcm4339 has no clm_blob firmware, so add chip id check before
clm_blob firmware loaded.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The commit 9ef77fbedad9(brcmfmac: send mailbox interrupt twice for
specific hardware device) broken cyw4356 suspend.
kernel suspend log:
Timeout on response for entering D3 substate
At least, PCIE wireless device with core revision 0xb should not involve
the workaround.
Fixes:9ef77fbedad9(brcmfmac: send mailbox interrupt twice for specific hardware device)
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Current code error path process like as below:
brcmf_pcie_setup()
brcmf_attach()
if attach error, brcmf_detach();
if attach error, call brcmf_pcie_remove()
call brcmf_detach() again
To avoid attach/detach() mismatch, free wiphy when brcmf instance
attach failed.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
When system suspend, pcie bus write BRCMF_H2D_HOST_D3_INFORM cmd
into tcm32 mem to let host enter D3 mode, and wait the D3 ACK
interrupt. But sometime, the interrupt is comming lately then
cause wait event timeout, so double check the D3 ACK state.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
Not all firmware set channel/ulp_sdioctrl, so change the error message
to debug level for reading chanspec/ulp_sdioctrl iovar data.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Only set wowlan parameters when the interface's BRCMF_FEAT_WOWL
flag is set.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Move the func->num check early in .brcmf_ops_sdio_suspend() to
save suspend time.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Moving the brcmf_bus_preinit() call allows the bus code to do some
required initialization before handling firmware control messages.
.brcmf_bus_preinit() already is called in .brcmf_bus_started() when
bus is ready. So remove it from .brcmf_c_preinit_dcmds().
Fixes: 383c26d2ea2f(MLK-18675-20 brcmfmac: Support wake on ping packet)
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
func0 is not provided by the mmc stack as a function when probing.
commit 99d7b6fdfc8c(brcmfmac: Remove func0 from function array)
already remove the func0.
But commit c37fa19e0128(brcmfmac: Remove array of functions) add
fun0 again. That cause NULL pointer issue.
Fixes: c37fa19e0128(brcmfmac: Remove array of functions)
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
commit 861cb5eb46 ("brcmfmac: Fix access point mode") upstream.
Since commit 1204aa17f3 ("brcmfmac: set WIPHY_FLAG_HAVE_AP_SME flag")
the Raspberry Pi 3 A+ (BCM43455) isn't able to operate in AP mode with
hostapd (device_ap_sme=1 use_monitor=0):
brcmfmac: brcmf_cfg80211_stop_ap: setting AP mode failed -52
So add the missing mgmt_stypes for AP mode to fix this.
Fixes: 1204aa17f3 ("brcmfmac: set WIPHY_FLAG_HAVE_AP_SME flag")
Suggested-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
With asynchronous suspend/resume feature, suspend and resume callbacks to
be executed in parallel with each other. It makes bus changes the state to
BRCMF_BUS_DOWN before all brcmf_cfg80211_suspend IOVAR executions.
The same situation also happens in resume procedure and causes PM mode
keeps in PM_MAX after resume. In order to fix the race condition, We add
one second sleep in bus suspend and cfg80211 resume function.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit fdb676ce00)
We got ifp null pointer kernel panic in brcmf_txfinalize after removing
Wi-Fi USB dongle when data was transmitting, The root cause is that
interface was removed before calling brcmf_txfinalize in
brcmf_fws_dequeue_worker and finally caused kernel panic.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 3f94bfe6fe)
To trunkcate the addtional bytes, if extra bytes are received.
Current code only have a warning and proceed without handling it.
But in one crash dump reported by DVT, these causes the
crash intermittently. So the processing is limit to the skb->len.
Signed-off-by: Raveendran Somu <raveendran.somu@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit f7112c027e)
Add brcmfmac platform device pinctrl state support. That is useful
for dynamically configurate pin group for different wlan chips.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 88f2834cd5)
- The current timeout value is not enough for MB transaction read
when modem enter D3 mode, so increase the timeout value to match
the D3 mode timing requirement.
- Add 10 ms delay for pcie device to exit D3 state and enter D0 state.
- Remove the duplicated code for SBMBX register access.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 05601af462)
There are two D11 cores in RSDB chips like 4359. We have to reset two
D11 cores simutaneously before firmware download, or the firmware may
not be initialized correctly and cause "fw initialized failed" error.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked commit from 8f50bea935)
Not all chips support wowlan, then get wowlan wakeup event failed.
Change the log into debug level.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 47b205952c)
In WLAN, priority among various access categories of traffic is
always set by the AP using WMM parameters and this may not always
follow the standard 802.1d priority.
In this change, priority is adjusted based on the AP WMM params
received as part of the Assoc Response and the same is later used
to map the priority of all incoming traffic.
This change should fix the following 802.11n certification tests:
* 5.2.31 ACM Bit Conformance test
* 5.2.32 AC Parameter Modification test
Signed-off-by: Saravanan Shanmugham <sasm@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit:62657fc5931db1c1d48c3181f2f4effebf37a74b)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Will enable FMAC to push more packets to bus tx queue and help
improve throughput when fws queuing is enabled. This change is
required to tune the throughput for passing WMM CERT tests.
Signed-off-by: Madhan Mohan R <MadhanMohan.R@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit:48195bf1b7dea8c6030dfce45900dda60f2d0ea4)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
P2p spec mentioned that the p2p device address should be the globally
administered address with locally administered bit set. Therefore,
follow this guideline by default.
When the primary interface is set to a locally administered address, the
locally administered bit cannot be set again. Generate a random locally
administered address for this case.
Signed-off-by: Chi-Hsien Lin <chi-hsien.lin@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit:930ac6e9230a48a775e55ee6cb31c4dffe5d5dcc)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The variable "wq_flags" is not used anymore. Remove it.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit:453591909a747bede4ff3fabe1d4073370f920f4)
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
With setting sdio_wq_highpri=1 in module parameters, tasks submitted to
SDIO workqueue will put at the head of the queue and run immediately.
This parameter is for getting higher TX/RX throughput with SDIO bus.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit: 7c2b310299f051be555c6928f0f858fdbac35abb)
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Set wowl configuration in disconnect state is redundant.
Remove it to fix no scan result issue after resume.
Signed-off-by: Lo-Hsiang Lo <double.lo@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
FMAC driver need to provide a dummy wowlan filter for kernel and
provided the well configured wowlan stack. So the system will
keep driver in connected state in suspend mode and can be wake
up by ping packet.
Enable unicast packet filter before system suspend and
disable it after resume.
Signed-off-by: Lo-Hsiang Lo <double.lo@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
When eap_restrict is enabled, firmware will toss non-802.1x frames from
tx/rx data path if station not yet authorized.
Internal firmware eap_restrict is disabled by default. This patch makes
it possible to enable firmware eap_restrict by specifying
eap_restrict=1 as module parameter.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
To enhance RX throughput, we add a module parameter "sdio_dpc_prio" to let
user can set scheduling priority for sdio_dpc. It can improve RX
throughput by reducing the receiving time in sdio_dpc.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Hostap daemon has a parameter "ap_isolate which is used to prevent
low-level bridging of frames between associated stations in the BSS.
For driver side, we add cfg80211 ops method change_bss to support
setting AP isolation from user space.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The device 43428 is a new SDIO device ID but shares the same WLAN core
with device 43430a1. It is a 1x1 802.11b/g/n 2.4GHz HT20,
256-QAM/Turbo QAM WLAN chip.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
This patch fix the below compilation errors.
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c: In function ‘brcmf_sdio_ulp_pre_redownload_check’:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2631:10: error: implicit declaration of function ‘brcmf_sdiod_regrb’; did you mean ‘brcmf_sdiod_readb’? [-Werror=implicit-function-declaration]
value = brcmf_sdiod_regrb(bus->sdiodev, SDIO_CCCR_IOEx, &err);
^~~~~~~~~~~~~~~~~
brcmf_sdiod_readb
In file included from drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:42:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h:437:2: error: implicit declaration of function ‘brcmf_sdiod_regrl’; did you mean ‘brcmf_sdiod_readl’? [-Werror=implicit-function-declaration]
brcmf_sdiod_regrl(sdh, D11SHM_ADDR(offset), ret)
^~~~~~~~~~~~~~~~~
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2636:18: note: in expansion of macro ‘D11SHM_RD’
ulp_wake_ind = D11SHM_RD(bus->sdiodev, M_ULP_WAKE_IND(
^~~~~~~~~
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h:434:2: error: implicit declaration of function ‘brcmf_sdiod_regwl’; did you mean ‘brcmf_sdiod_readl’? [-Werror=implicit-function-declaration]
brcmf_sdiod_regwl(sdh, D11SHM_ADDR(offset), val, ret)
^~~~~~~~~~~~~~~~~
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2654:4: note: in expansion of macro ‘D11SHM_WR’
D11SHM_WR(bus->sdiodev, M_DS1_CTRL_SDIO(
^~~~~~~~~
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c: In function ‘brcmf_sdio_firmware_callback’:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:4388:9: error: implicit declaration of function ‘brcmf_bus_started’; did you mean ‘brcmf_bus_txctl’? [-Werror=implicit-function-declaration]
err = brcmf_bus_started(dev);
^~~~~~~~~~~~~~~~~
brcmf_bus_txctl
cc1: some warnings being treated as errors
scripts/Makefile.build:303: recipe for target 'drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.o' failed
make[6]: *** [drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.o] Error 1
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
As per 'commit d09ae51a4b ("brcmfmac: pass struct in
brcmf_fw_get_firmwares()")', make changes in the brcmf_fw_get_firmwares()
call to fix the compilation error.
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c: In function ‘brcmf_sdio_ulp_reinit_fw’:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2597:45: error: ‘BRCMF_FW_REQUEST_NVRAM’ undeclared (first use in this function); did you mean ‘BRCMF_FW_TYPE_NVRAM’?
err = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
^~~~~~~~~~~~~~~~~~~~~~
BRCMF_FW_TYPE_NVRAM
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2597:45: note: each undeclared identifier is reported only once for each function it appears in
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2598:17: error: passing argument 3 of ‘brcmf_fw_get_firmwares’ from incompatible pointer type [-Werror=incompatible-pointer-types]
sdiodev->fw_name, sdiodev->nvram_name,
~~~~~~~^~~~~~~~~
In file included from drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h:22,
from drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:42:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h:93:14: note: expected ‘void (*)(struct device *, int, struct brcmf_fw_request *)’ but argument is of type ‘char *’
void (*fw_cb)(struct device *dev, int err,
~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
struct brcmf_fw_request *req));
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:2597:8: error: too many arguments to function ‘brcmf_fw_get_firmwares’
err = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
^~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h:22,
from drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c:42:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h:92:5: note: declared here
int brcmf_fw_get_firmwares(struct device *dev, struct brcmf_fw_request *req,
^~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
In Deep Sleep mode ARM is off and once Exit trigger comes than
Mail Box Interrupt comes to Host and whole Re Initiation should be done
in the ARM to start TX/RX.
Signed-off-by: Naveen Gupta <nagu@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Vipul: Fixed merge conflicts
Conflict:
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Linux 3.6 introduces TSQ which has a per socket threshold for TCP Tx
packet to reduce latency. In fcmode 1/2, host driver enqueues skb in
hanger and TCP doesn't push new skb frees until host frees the skb when
receiving fwstatus event. So using skb_orphan before sending skb to bus
will make the skb removing the ownership of socket. With this patch, we
got better throughput in fcmode 1/2.
Tested 43455 TCP throughput in 20 MHz bandwidth with/without this patch.
fcmode 0: 59.5 / 59.6 (Mbps)
fcmode 1: 59.3 / 23.4 (Mbps)
fcmode 2: 59.6 / 21.5 (Mbps)
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
APSTA can work on two band concurrently with using VSDB(Virtual
Simultaneous Dual-Band) or RSDB(Real Simultaneous Dual-Band) features.
In this case, we have to keep apsta is 1 in firmware side. However, if
we start wpa_supplicant on wlan0 and then start hostapd on wlan 1, the
apsta will be set to 0, and we will see data stall on wlan0(station)
So that, we only set apsta to 1 when AP start on primary interface.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Firmware returns proprietary error code when getting error in
fil_cmd_data_set or fil_cmd_data_get. Sometimes the vendor tool or
utilities which uses libnl may stuck in some commands when wl is down.
For example, issue "scan" command after issuing "down" command, the
"scan" command will be the blocking call and stuck as no response from
firmware. It is caused by that firmware returns BCME_NOTUP(-4) when wl
is down, but in Linux the -4 is -EINTR, so libnl catches the error and
not pass to upper layer.
Because of that, the driver should return Linux error code instead of the
proprietary error code, and the tools or utilities need to get the real
firmware error code by another command "bcmerrorstr" after receiving
the error.
Signed-off-by: Wright Feng <wright.feng@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
broken_sg_support, sd_head_align, and sd_sgentry_align are used in
brcmfmac code but not configurable in dts file. Add the parsing logic.
Now they can be configured like below in dts:
brcm,broken_sg_support;
brcm,sd_head_align = /bits/ 16 <4>;
brcm,sd_sgentry_align = /bits/ 16 <4>;
Signed-off-by: Chi-hsien Lin <chi-hsien.lin@cypress.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Pulling the following commits and some general changes from custom
v3.10 kernel for supporting qcacld2.0 on kernel v4.9.11.
1. cfg80211: Using new wiphy flag WIPHY_FLAG_DFS_OFFLOAD
When flag WIPHY_FLAG_DFS_OFFLOAD is defined, the driver would handle
all the DFS related operations. Therefore the kernel needs to ignore
the DFS state that it uses to block the userspace calls to the driver
through cfg80211 APIs. Also it should treat the userspace calls to
start radar detection as a no-op.
Please note that changes in util.c is not picked up explicitly.
Kernel v4.9.11 uses wrapper cfg80211_get_chans_dfs_required which takes
care of this change.
Change-Id: I9dd2076945581ca67e54dfc96dd3dbc526c6f0a2
IRs-Fixed: 202686
2. New db.txt from git/sforshee/wireless-regdb.git
CONFIG_CFG80211_INTERNAL_REGDB is enabled in build. This causes
kernel warn messages as db.txt is empty. A new db.txt is added
from:
git://git.kernel.org/pub/scm/linux/kernel/git/sforshee/wireless-regdb.git
IRs-Fixed: 202686
3. Picked up the declaration and definition of the function
cfg80211_is_gratuitous_arp_unsolicited_na
Change-Id: I1e4083a2327c121073226aa6b75bb6b5b97cec00
CRs-fixed: 1079453
Signed-off-by: Nakul Kachhwaha <nkachh@codeaurora.org>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(Vipul: Fixed merge conflicts)
(TODO: checkpatch warnings)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
In probe function, if probe fails, the enabled regulator will cause a
WARN_ON.
Add regulator_diable when error occurs in probe function.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
In probe function, if probe fails, the enabled regulator will cause a
WARN_ON.
Add regulator_diable when error occurs in probe function.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
In probe function, if probe fails, the enabled regulator will cause a
WARN_ON.
Add regulator_diable when error occurs in probe function.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
This is fixing the build when the driver is enabled as a module, when
CONFIG_MXC_MMA8451=m
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add mma8451 driver support for i.MX6Q/DL/SX platform. The code derives from 3.10.y branch.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Added explicit dependency on INPUT_POLLDEV during 4.14 rebase so that it
doesn't break the arm64 build
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Use global variable instead of macro "MAG3110_IRQ_USED" that is more
flexible.
Signed-off-by: Fugang Duan <B38611@freescale.com>
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
When CONFIG_SENSOR_FXLS8471=m build was failing due to missing
exported symbol. This patch export the missing symbol.
Signed-off-by: Julien Olivain <julien.olivain@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The driver kfree the global memory that is not correct. The patch
remove them.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Support ±2g/±4g/±8g dynamically selection for motion sensor fxls8471.
Set the sensor mode to standby mode before changing the scale range
with the command "echo 0 > enable". The scale range can be changed
with the command "echo 0/1/2 > range".
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 6824cff93d368eafbf96c71fad541f9bc2502e3a)
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Fix the Coverity warning "divide_by_zero".
If "rext" is incorrectly set as zero in dts file, "divide_by_zero" will
happen at line 960. So add a judgment condition here, and let "rext" uses
default value when it is equal to zero.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
(cherry picked from commit 999f94e0d7524640381eb4b3f6590f213533679e)
evbug will open the mma8450 on i.MX6SL_EVK and mma8450 will work in 2G mode
by default.
That is the reason why mma8450 logs will be printed out. The main changes
is below:
* Remove the open(), close() hook out of the drivers. The open() and
close() hook in input framework is defined as void type. It isn't
strictly safe in logic when some error happends. So remove them out.
* Modify the mma8450 to standby mode by default. It will be more power
saving and there would be no log printing out after booting up.
* Provide the sys interface to modify the mma8450 work modes. Then the
higher layer can modify the the mma8450 work mode via the interface. It
would be much safer.There would be a sclaemode interface in the folder
of
/sys/devices/soc0/soc.1/2100000.aips-bus/21a0000.i2c/i2c-0/0-001c/scalemode
User can use cat to read the current scalemode and echo to write. The
mode is defined as: MODE_STANDBY: 0 MODE_2G:1 MODE_4G:2 MODE_8G:3
* Add mutex to protect and some error handling.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit c51a786078fd569ce95eb6dcf09c76d1b3c0f172)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Add chip ID check in probe function. The mma8450 is
on the E-INK daughter board. When the daughter board
is not pluged, there would be polling error log
continuously. Add the check to avoid this.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit e9f2c4cf673dee1527925f30a9f3fd137d9799ad)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
NXP i.MX7ULP EVK boards all sensors connect with M4 core, A core
has to conmunicate with sensors by virtual io bus like rpmsg bus.
The driver implement the virtual sensor input driver to configure
sensors active/idle/delay actions and report the sensors' event to
user space.
Supply below sysfs for user to enable/disable detector and counter,
set poll delay:
/sys/class/misc/step_counter/enable
/sys/class/misc/step_detector/enable
/sys/class/misc/step_counter/poll_delay
Reviewed-by: Elven Wang <elven.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The sensors share an interrupt pin on imx8qm/imx8qxp mek.
As a result, the interrupt signals will be interfered by
each other in default push-pull status.
This patch sets sensor interrupt pins as open-drain when
necessary.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-picked from 48bcb7aafa2a3ced923d1a1753bb19d89a9fc273)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The sensors share an interrupt pin on imx8qm/imx8qxp mek.
As a result, the interrupt signals will be interfered by
each other in default push-pull status.
This patch sets sensor interrupt pins as open-drain when
necessary.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry-picked from 48bcb7aafa2a3ced923d1a1753bb19d89a9fc273)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Support ±2g/±4g/±8g dynamically selection for motion sensor fxos8700.
Set the sensor mode to standby mode before changing the scale range
with the command "echo 0 > enable". The scale range can be changed
with the command "echo 0/1/2 > range".
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 74c9af0a5806fb5c926ffdab3145fc1680fc87e6)
TODO: checkpatch warnings
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
The SCU message should be 32-bit aligned, as MU transmits data with
32-bits aligned and SCU could modify the message data, if the message
is NOT 32-bit aligned, it will cause stack corruption when SCU writes
the response data, with CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG enabled,
kernel stack protection will have panic. Correct the message to 32-bit
width to avoid this issue.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
It makes more sense to trigger system-wide device cooling for
all thermal zones rather than thermal zone0 ONLY.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Thermal Monitor Unit v2 is introduced on new Layscape SoC.
Compared to v1, TMUv2 has a little different register layout
and digital output is fairly linear.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Register device cooling for thermal zone manually, when temperature
exceeds passive trip, system wide cooling notification will be triggered.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Register device cooling for first thermal zone manually, when
temperature exceeds passive trip, system wide cooling notification
will be triggered.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
i.MX8MM has a thermal monitoring unit(TMU) inside, it ONLY has one
sensor for CPU, add support for reading immediate temperature of
this sensor.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Register device cooling for first thermal zone manually, when
temperature exceeds passive trip, system wide cooling notification
will be triggered.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Register device cooling for each thermal zone manually, when
temperature exceeds passive trip, system wide cooling notification
will be triggered.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
To compatible with previous implementation, add generic device
cooling support, each thermal zone will register a cooling
device, and when temperature exceed passive trip, the device
cooling driver will send out a system wide notification, each
device supporting cooling will need to register device cooling
and takes action when passive trip is exceeded;
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add i.MX8QM system controller thermal driver support,
as there are multiple thermal zones in i.MX8QM, and when
resource is powered off, getting temperature from SCU
firmware will fail, so this patch also handles this case
by printing the failure once and return temperature 0 for
the powered-off resource.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC to get each thermal sensor's temperature,
it supports multiple sensors which are passed from device tree,
please see the binding doc for details.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Add support of suspend, resume function to support deep sleep.
Also make sure of SRAM initialization during resume.
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The System Controller Firmware (SCFW) is a low-level system function
which runs on a dedicated Cortex-M core to provide power, clock, and
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
(QM, QP), and i.MX8QX (QXP, DX).
SCU driver manages the IPC interface between host CPU and the
SCU firmware running on M4.
For i.MX8, stop mode request is controlled by System Controller Unit(SCU)
firmware.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Stop mode is entered when Stop mode is requested at chip level and
MCR[LPM_ACK] is asserted by the FlexCAN.
Double check with IP owner, should poll MCR[LPM_ACK] for stop mode
acknowledgment, not the acknowledgment from chip level.
Fixes: 5f186c257fa4(can: flexcan: fix stop mode acknowledgment)
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
When suspending, when there is still can traffic on the interfaces the
flexcan immediately wakes the platform again. As it should :-). But it
throws this error msg:
[ 3169.378661] PM: noirq suspend of devices failed
On the way down to suspend the interface that throws the error message does
call flexcan_suspend but fails to call flexcan_noirq_suspend. That means the
flexcan_enter_stop_mode is called, but on the way out of suspend the driver
only calls flexcan_resume and skips flexcan_noirq_resume, thus it doesn't call
flexcan_exit_stop_mode. This leaves the flexcan in stop mode, and with the
current driver it can't recover from this even with a soft reboot, it requires
a hard reboot.
This patch can fix deadlock when using self wakeup, it happenes to be
able to fix another issue that frames out-of-order in first IRQ handler
run after wakeup.
In wakeup case, after system resume, frames received out-of-order,the
problem is wakeup latency from frame reception to IRQ handler is much
bigger than the counter overflow. This means it's impossible to sort the
CAN frames by timestamp. The reason is that controller exits stop mode
during noirq resume, then it can receive the frame immediately. If
noirq reusme stage consumes much time, it will extend interrupt response
time.
Fixes: de3578c198 ("can: flexcan: add self wakeup support")
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
For i.MX7D LPSR mode, the controller will lost power and got the
configuration state lost after system resume back.
So we need to set pinctrl state again and re-start chip to do
re-configuration after resume.
For wakeup case, it should not set pinctrl to sleep state by
pinctrl_pm_select_sleep_state.
For interface is not up before suspend case, we don't need
re-configure as it will be configured by user later by interface up.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
The CAN FD protocol allows the transmission and reception of data at a higher
bit rate than the nominal rate used in the arbitration phase when the message's
BRS bit is set.
The TDC mechanism is effective only during the data phase of FD frames
having BRS bit set. It has no effect either on non-FD frames, or on FD
frames transmitted at normal bit rate.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
ISO CAN FD is introduced to increase the failture detection capability
than non-ISO CAN FD. The non-ISO CAN FD is still supported by FlexCAN so
that it can be used mainly during an intermediate phase, for evaluation
and development purposes.
Therefore, it is strongly recommended to configure FlexCAN to the ISO
CAN FD protocol by setting the ISOCANFDEN field in the CTRL2 register.
NOTE: If you only set "fd on", driver will use ISO FD mode by default.
You should set "fd-non-iso on" after setting "fd on" if you want to use
NON ISO FD mode.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This patch adds CAN FD BitRate Switch (BRS) support to driver.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This patch intends to add CAN FD mode support in driver, it means that
payload size can extend up to 64 bytes.
Bit timing always set in CBT register other than CTRL1 register when
CANFD supports BRS, it will extend the range of all CAN bit timing
variables (PRESDIV, PROPSEG, PSEG1, PSEG2 and RJW), which will improve
the bit timing accuracy.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This patch prepares for CAN FD mode, using struct canfd_frame can both
for classic format frame and fd format frame.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
In the previous patch the function flexcan_write64() was introduced.
This patch replaces the open coded variant in flexcan_mailbox_read()
that marks a mailbox as read, by a single call to flexcan_write64().
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.
The driver will always use the last mailbox for TX, which falls into the iflag2
register.
To support CANFD the payload size has to increase to 64 bytes and the number of
mailboxes will decrease so much that the TX mailbox will be handled in the
iflag1 register.
This patch add support to handle the TX mailbox independent whether it's
in iflag1 or iflag2 by introducing th flexcan_read_reg_iflag_tx()
function, similar to flexcan_read_reg_iflag_rx(), for the read path.
For the write path the function flexcan_write64() is added.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.
In the timestamp (i.e. non FIFO) mode the driver needs to mask all non RX
interrupt sources, it uses the precomputed value rx_mask of struct flexcan_priv
for this.
In certain use cases, for example the CANFD mode, the contents of the iflag2
register is completely masked.
This patch optimizes the flexcan_read_reg_iflag_rx() function by not reading
the iflag1 or iflag2 register if the contents is masked.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The current driver uses FLEXCAN_IFLAG2_MB() to generate the mask to check for
the TX complete interrupt. This works well, as the driver will always use the
last mailbox for TX, which falls into the iflag2 register.
To support CANFD the payload size has to increase to 64 bytes and the
number of mailboxes will decrease so much that the TX mailbox will be
handled in the iflag1 register.
This patch introduces a tx_mask in the struct flexcan_priv (similar to rx_mask)
and makes use of it. The actual support to handle the TX mailbox in iflag1 will
be added in the next patches.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.
In the timestamp (i.e. non FIFO) mode the driver needs to mask out all non RX
interrupt sources and uses the precomputed values rx_mask1 and rx_mask2 of
struct flexcan_priv for this.
This patch merges the two u32 rx_mask1 and rx_mask2 to a single u64 rx_mask
variable, which simplifies the code a bit.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.
In the timestamp (i.e. non FIFO) mode the driver needs to mask out all
non RX interrupt sources and uses the precomputed values rx_mask1 and
rx_mask2 of struct flexcan_priv for this.
Currently these values cannot be used directly, as they contain the TX
mailbox flag. This patch removes the TX flag from flexcan_priv::rx_mask1
and flexcan_priv::rx_mask2, and sets the TX flag directly when writing
the regs->iflag1 and regs->iflag2 into the hardware.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The flexcan IP core has up to 64 mailboxes, each one has a corresponding
interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
imask1 or imask2 registers.
In the timestamp (i.e. non FIFO) mode the driver needs to mask out all
non RX interrupt sources and uses the precomputed values
reg_imask1_default and reg_imask2_default of struct flexcan_priv for
this.
However in the current driver the reg_imask{1,2}_default cannot be used
directly to get the pending RX interrupts. The TX interrupt is part of
these variables, so it needs to be masked out, too.
This is a preparation patch to clean up calculation of the pending RX
interrupts, it only renames the variables from
reg_imask{1,2}_default
to
rx_mask{1,2}
To better reflect their meaning after the complete conversion. This
change is done with the following sed command:
sed -i -e "s/reg_imask\(1\|2\)_default/rx_mask\1/" drivers/net/can/flexcan.c
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This patch renames the variable reg_iflag in the flexcan_irq() function
to reg_iflag_rx. This better reflects the contents of the varibale. It
does not hold the unmodified iflag registers, instead all non RX
interrupts have been masked.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The macro FLEXCAN_IFLAG_MB() is always used for the iflag2 register, so
rename it to FLEXCAN_IFLAG2_MB()
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The function flexcan_irq_state() checks the controller for CAN state
changes and pushes a skb with the new state and a timestamp into the
rx-offload framework.
This patch optimizes the function by only reading the timestamp, if a
state change is detected.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together to simplify
the code.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Reviewed-by: Sean Nyekjaer <sean@geanix.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The skbs for classic CAN and CAN FD frames are allocated with seperate
functions: alloc_can_skb() and alloc_canfd_skb().
In order to support CAN FD frames via the rx-offload helper, the driver
itself has to allocate the skb (depending whether it received a classic
CAN or CAN FD frame), as the rx-offload helper cannot know which kind of
CAN frame the driver has received.
This patch moves the allocation of the skb into the struct
can_rx_offload::mailbox_read callbacks of the the flexcan and ti_hecc
driver and adjusts the rx-offload helper accordingly.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This patch removes the function can_rx_offload_reset(), as it does
nothing. If we ever need this function, add it back again.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Add sufficient enough definitions so that drivers which call
request_bus_freq and release_bus_freq can compile even if
CONFIG_HAVE_IMX_BUSFREQ is missing.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
iMX8 fuse word index represent as one 4-bytes word,
it should not be divided by 4.
Exp:
- MAC0 address layout in fuse:
offset 708: MAC[3] MAC[2] MAC[1] MAC[0]
offset 709: XX xx MAC[5] MAC[4]
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
When offset is not 4 bytes aligned, directly shift righty by 2 bits
will cause reading out wrong data. Since imx ocotp only supports
4 bytes reading once, we need handle offset is not 4 bytes aligned
and enlarge the bytes to 4 bytes aligned. After finished reading,
copy the needed data from buffer to caller and free buffer.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add structure dma_buf_phys to store physical address.
Add DMA_BUF_IOCTL_PHYS to export physical address.
Change-Id: Ib2f24b33462d603f2cbeef975689aaf82447d088
Signed-off-by: ivan.liu <xiaowen.liu@nxp.com>
[ Aisheng: update ioctl NR to 2 due to the original 1 is used in upstream ]
[ Aisheng: update ioctl NR to 10 according to GPU team's request ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
FSL-MC bus devices uses device-ids from 0x10000 to 0x20000.
So to support MSI interrupts for mc-bus devices we need
vgi-ITS device-id table of size 2^17 to support deviceid
range from 0x10000 to 0x20000.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Instead of hardcoding checks for qman cacheable
mmio region physical addresses extract mapping
information from the user-space mapping.
The involves several steps;
- get access to a pte part of the user-space mapping
by using get_locked_pte() / pte_unmap_unlock() apis
- extract memtype (normal / device), shareability from
the pte
- convert to S2 translation bits in newly added
function stage1_to_stage2_pgprot()
- finish making the s2 translation with the obtained bits
Another explored option was using vm_area_struct::vm_page_prot
which is set in vfio-mc mmap code to the correct page bits.
However, experiments show that these bits are later altered
in the generic mmap code (e.g. the shareability bit is always
set on arm64).
The only place where the original bits can still be found
is the user-space mapping, using the method described above.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[Bharat - Fixed mem_type check issue]
[changed "ifdef ARM64" to CONFIG_ARM64]
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
[Ioana - added a sanity check for hugepages]
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
[Fixed format issues]
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
Add parameter allowing to specify s2 page table
protection and type bits and update the callers
accordingly.
The parameter will be used in a forthcoming patch.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
In the current implementation, trying to flush
memory not covered by the linear map (e.g. device
memory) causes a crash. Add support for flushing
"non-normal" memory by explicitly ioremap()-ing
it when such a case appears and do the cache flush
through this temporary mapping.
This allows dropping the special checks for qman
cacheable region when doing cache flushes.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[fixed formatting issue]
Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
We need this in Jailhouse to map at specific virtual addresses, at
least for the moment.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
External hypervisors, like Jailhouse, need this address when they are
deactivated, in order to restore original state.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jailhouse allows explicitly enabled cells to write character-wise
messages to the hypervisor debug console. Make use of this for a
platform-agnostic boot diagnosis channel, specifically for non-root
cells. This also comes with earlycon support.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 60685bd589aef4972d20724863079edf2039eaa2)
From http://git.kiszka.org/?p=linux.git;a=shortlog;h=refs/heads/queues/jailhouse
The skb field has been removed by 4f296edeb9.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 80c301552ec0b500dd46a2b4f0c9fef78a610ee6)
This should make the state transitioning logic clearer. Also avoid the
harmless but redundant netif_carrier_on/ivshm_net_run in RUN state.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 8539efe70fbdf4a0bea75a97c1628fbb38b6590b)
If we are in READY but the remote is still in INIT, we so far fell back
to RESET which caused the setup to get stuck. Fix this by only
transitioning from READY/RUN to RESET in ivshm_net_state_change if the
remote is in RESET as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit b58915e11eba2643d5c68ea0328823a62c21dc49)
At least Linaro's gcc 6.3 does not see the initialization and usage
dependency of fhead and num. Let's silence this false positive.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 4d067d37d835c35e8f85481b97c51f20b713ae71)
Allow ifconfig, ip and other such tools to change the MAC of the
virtual NIC.
Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 7744d59d11101f75afaa6f550cabba38c2c0d260)
We do not support the use of any flags. Make sure the remote does not
confuse us using flags.
Signed-off-by: Henning Schild <henning.schild@siemens.com>
[Jan: Remove wrong removal of next field initialization]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 986d58d84245e023a1a66ab6495b354b6b8cd2f0)
There where two lines with the same error message, change one of them.
Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit d66af388dd2512ea7c7a776c731409854ed40a45)
We are using chains of len==1 make that explicit and expect that from
the remote.
Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit f958c360044184f58605815d428b83fe4329cafd)
Required by 4.12, and it also simplifies our code. Needs to be folded
into the initial patch eventually.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit ea6e78c89582711f15a2711f0a35ac3a61d9d074)
Make sure that we do not depend on identity-mapped shared memory
regions.
This also fixes an off-by-one in the range check of ivshm_net_desc_data.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit fe9c9dd6373892591a7d6b165c3c43045eb349c1)
If the remote side is already in INIT state (or even higher) and has a
cached rstate of RESET, we won't make progress when signaling RESET
again because the remote side won't send a state update. Fix this by
enforcing a local check after probe completion.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit fceed9d0ab2486589c57c0793fbfbca4832442b9)
Helps debugging inconsistent states.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 81674136b6936fb8219dac1dcdb6df8fe424143d)
Improves the state signaling to the remote side after ifconfig down and
driver removal.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit d0f632b2830146d9892a2b1ab93f866f072412bb)
Pass a device name consisting of driver name and PCI ID to request_irq
and alloc_ordered_workqueue. This helps correlating resources with
devices in case there are multiple of them.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 43e2ff78b89cbdfaecba54601d85f3d40349a9b5)
Activate INTx notification when it has to be used instead of MSI-X,
disable it after use.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 8790717bdca6ea58f18baac1749ac347b23b7263)
Became unused by previous change.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit 3ea4b31deba3424784f0105c20dc90419e950e2c)
No need for special caching, simply map the shared memory region like
RAM, thus write-back. This gives us another order of magnitude in
throughput.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
(cherry picked from commit af59c6541a65622cab498851e01653dd378cd9f8)
Encrypted keys can use secure key-type as master key along with
trusted/user keys.
Secure key as master key uses, secure key type payload derieved
using CAAM hardware.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Secure keys are derieved using CAAM crypto block.
Secure keys derieved are the random number symmetric keys from CAAM.
Blobs corresponding to the key are formed using CAAM. User space
will only be able to view the blob of the key.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
The codes of qe_ic init from a variety of platforms are redundant,
merge them to a common function and put it to irqchip/irq-qeic.c
For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
qe_ic_cascade_low_mpic, qe_ic_cascade_high_mpic);" instead of
"qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
The PWM in i.MX8qxp MIPI subsystem needs to use the
'32k' clock to work properly. This patch gets this
clock in the PWM driver and uses it if it is supplied.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
2019-11-25 15:43:02 +08:00
2533 changed files with 863697 additions and 15614 deletions
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